Description: This portfolio shows the actual preparation of the test question and the evaluation of scores per

students. This also shows the computation of the measures of central tendency, the mean, median and mode. The questionnaire was based on the Table of Specification that we made. There is also the graphs and ogive that definitely explain the grades.

Purpose/Objectives:
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.

To be able to recognize the 5 basic logic gates. To be able to describe the function of each logic gates. To be able to explain Truth and Function table. To be able to decide how many combination from a given number of inputs. To be able to explain Boolean algebra. To be able to recognize Karnaugh Map (KMap). To be able to recognize relay and its function. To be able to describe Digital Circuit. To be able to distinguish Analog from Digital Circuit. To be able to select the best logic gates used in a circuit.

Presentation:

1, TOS test questionaire (test result)

TEST RESULT 52 52 52 51 49 47 46 45 44 43 42 41 38 38 36 35 35 33 25 25

STUDENT 1 STUDENT 2 STUDENT 3 STUDENT 4 STUDENT 5 STUDENT 6 STUDENT 7 STUDENT 8 STUDENT 9 STUDENT 10 STUDENT 11 STUDENT 12 STUDENT 13 STUDENT 14 STUDENT 15 STUDENT 16 STUDENT 17 STUDENT 18 STUDENT 19 STUDENT 20

2, Measure of a. central tendency for UNGROUP

a. -1> central tendency for GROUP

b. variability 3. Graph- Histogram - ogive 4.frequency distribution 5.index of difficulty 6. index of discrimanation
Insight:

Making test question is not just picking a question that you want to put in test paper. There are some procedures in making questions on a topic that have been discussed. The instruction of the test should be clear. We also have to make sure that our grammar should be properly written. You have to analyze and criticize the test questions before giving it to the students.

Documentation:

DIGITAL DESIGN USING LOGIC GATES

Name: Course:

Score: Date:

================= # TRUE OR FALSE # ================= Directions: Each item is 1 point. Write True if the statement is true and write False if the statement is false. Write your answer on the space provided. This exam of 30 items should be finished within 30 minutes only

1) 2) 3) 4) 5) 6) 7) 8) 9) 10)

A digital quantity has a discrete set of values. An inverter performs a NOT operation. Truth Table is the same with Function Table. 3 inputs can have 16 possible combinations. The symbol shown below is for a 2-input NAND gate is =D-. The output of an AND gate is LOW when any input is LOW. The Boolean expression for a 3-input AND gate is X = ABc. Relay is a digital switch that controls current flow in a circuit. A NOR gate's truth table is the opposite of that of an OR gate.

1) 2) 3) 4) 5) 6) 7) 8) 9)

___________ ___________ ___________ ___________ ___________ ___________ ___________ ___________ ___________

Greater accuracy and precision are possible with digital techniques. 11) This AB + CD expressions is in the products-of-sum (POS) form.

10) ___________ 11) ___________

12) 13)

Digital systems require that voltage levels change between high and low

12) ___________ 13) ___________ 14) ___________ 15) ___________ 16) ___________ 17) ___________ 18) ___________ 19) ___________ 20) ___________

In a positive logic system, the logic LOW could be between 0 V and 0.8 V. 14) Truth table shows the desired output from various combinations of inputs. 15) The methods in breaking down KMAP are rollover and overlap methods. 16) A Karnaugh map is a systematic way of reducing sum-of-products expression. 17) The systematic reduction of logic circuits is accomplished by using a truth table. 18) The output of a NAND gate is the same as the inverted output of an AND gate. 19) A small circle on the output of a logic gate is used to represent the NOT operation. 20) One advantage of analog circuits over digital circuits is that it's easier to store data. ================= # MATCHING TYPE # =================

Directions: On the line next to each item in Column A, place the letter of the symbol found in Column B that best describe item in column A. Answers in Column B must be used only once.

COLUMN A LOGIC GATES / RELAY ________ 1. SPST ________ 2. DPDT ________ 3. SPDT ________ 4. DPST ________ 5. NOT ________ 6. OR ________ 7.NAND A. B. C. D. E. F. G.

COLUMN B SYMBOL

________ 8. XNOR

H.

________ 9. AND

I.

________ 10. NOR

J.

K.

=================== # MULTIPLE CHOICE # =================== Directions: Each item is 1 point. From the given choices a,b,c and d; Encircle the letter that best describes the statements or the question. This exam of 30 items should be finished within 30 minutes only. 1. If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n): A) AND B) NAND C) NOR D) OR 2. Output will be a LOW for any case when one or more inputs are zero for a(n): A) OR gate B) NOT gate C) AND gate D) NOR gate 3. What does the small bubble on the output of the NAND gate logic symbol mean? A) open collector output B) tristate C) The output is inverted) D) none of the above 4. If the output of a three-input AND gate must be a logic LOW, what must the condition of the inputs be? A) All inputs must be LOW. B) All inputs must be HIGH. C) At least one input must be LOW. D) At least one input must be HIGH. 5. Logically, the output of a NOR gate would have the same Boolean expression as a(n): A) NAND gate immediately followed by an inverter

B) C) D)

OR gate immediately followed by an inverter AND gate immediately followed by an inverter NOR gate immediately followed by an inverter

6. With regard to an AND gate, which statement is true? A) An AND gate has two inputs and one output. B) An AND gate has two or more inputs and two outputs. C) A 2-input AND gate has eight input possibilities. D) If one input to a 2-input AND gate is HIGH, the output reflects the other input. 7. The logic gate that will have HIGH or "1" at its output when any one (or more) of its inputs is HIGH is a(n): A) OR gate B) AND gate C) NOR gate D) NOT operation 8. The logic gate that will have a LOW output when any one of its inputs is HIGH is the: A) OR gate B) AND gate C) NOR gate D) NOT operation 9. A table used to present in tabular form for the functions of a logic gates. A) Mapping Table B) Function Table C) Circuit Table D) Truth Table 10. How many truth table entries are necessary for a four-input circuit? A) 4 B) 8 C) 12 D) 16 11. How many possible combination of inputs for a three-input circuit? A) 4 B) 8 C) 12 D) 16 12. Which statement below best describes a Karnaugh map? A) It is simply a rearranged truth table. B) A Karnaugh map can be used to replace Boolean rules. C) Variable complements can be eliminated by using Karnaugh maps. D) The Karnaugh map eliminates the need for using NAND and NOR gates. 13. When grouping cells within a K-map, the cells must be combined in groups of : A) 2s B) 1, 2, 4, 8, etC) C) 4s D) 3s

14. Which of the following logical operations is represented by the + sign in Boolean algebra? A) inversion B) AND C) OR D) complementation 15. When reading a Boolean expression, what does the word "NOT" indicate? A) the same as B) inversion C) high D) 16. Which of the following is not a basic Boolean operation? A) OR B) NOT C)

low

AND

D)

FOR

17. Which of the following gates is described by the expression X=ABC? A) OR B) AND C) NOR 18. What is the Boolean expression for a four-input OR gate? A) Y=A+B+C+D B) Y = A B C D C) Y=ABCD D) Y=A$B$C$D

D)

NAND

19. Determine the values of A, B, C, and D that make the sum term equal to zero. A) A = 1, B = 0, C = 0, D = 0 B) A = 1, B = 0, C = 1, D = 0 C) A = 0, B = 1, C = 0, D = 0 D) A = 1, B = 0, C = 1, D = 1 20. How many gates would be required to implement the following Boolean expression before simplification? XY + X(X + Z) + Y(X + Z) A) 1 B) 2 C) 4 D) 5 21. What is the primary motivation for using Boolean algebra to simplify logic expressions? A) It may reduce the number of gates. B) It may reduce the number of inputs required C) It may make it easier to understand the overall function of the circuit. D) all of the above 22. This is an electromechanical switch that activates when its coil is energized A) Toggle switch B) push button C) transistor 23. A type of contact that connects the circuit when the relay is activated A) NO (Normally Open) B) NC (Normally Closed) C) CO (Change Over) D) DT (Double Throw)

D)

relay

24. A type of contact that disconnects the circuit when the relay is activated A) NO (Normally Open) B) NC (Normally Closed) C) CO (Change Over) D) DT (Double Throw) 25. What electronic components that can suppress the electrical spikes produced by a relay? A) Transistor B) Capacitor C) Resistor D) Diode

======================= # IDENTIFICATION TYPE# =======================

Directions: Supply the right name of each parts for the relay switch symbol in the box provided.

KEY TO CORRECTION
True / False : 1) T 2) T 3) F 4) 5) 6) 7) 8) 9) 10) 11) 12) 13) 14) 15) 16) 17) 18) 19) 20) F F T T T T T F T T T T T F T T F 1) 2) 3) 4) 5) 6) 7) 8) 9) 10) Matching type: K H I J D A E F B G 1) 2) 3) 4) 5) 6) 7) 8) 9) 10) 11) 12) 13) 14) 15) 16) 17) 18) 19) 20) 21) 22) 23) 24) 25) Multiple choice : B C C C B D A C B D B A B C B D D A B D D D A B D 1) 2) 3) 4) 5) Identification : NO ( Normally Open) Charging Coil / Coil NC ( Normally Close ) Arm Contact / Mech Arm input / power source