Philips Chassis Ves1.1e La

Colour Television
Chassis
VES1.1E
LA
See table of contents on page 3
Published by MB/SC 1270 Quality
Printed in the Netherlands
Subject to modification
EN 3122 785 19391

2012-Oct-12
2012 TP Vision Netherlands B.V.
All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
EN 2
1.
VES1.1E LA
Revision List
1. Revision List
Manual xxxx xxx xxxx.0
First release.
Manual xxxx xxx xxxx.1
Added the CSM menu on page 49
2. Technical Specifications and Connections

Index of this chapter:
Technical specifications
Directions for Use
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).
Technical Specifications
For on-line product support please use the links in Table 2-1. Here is
product information available, as well as getting started, user manuals,
frequently asked questions and software & drivers.
Table 2-1 Described Model numbers
CTN
Styling
Published in:
22PFL2807H/12
2800
3122 785 19390
32PFL2807H/12
Directions for Use

You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com
2012-Oct-12
back to
div. table
Contents
1
Introduction .............................................................................................................................................. 6
1.1
General Block Diagram ................................................................................................................... 6
1.2
MB62 Placement of Blocks............................................................................................................... 7
Tuner (TU3) ............................................................................................................................................... 8

2.1
General description of the Sony RE216 tuner .................................................................................. 8
2.2
Pinning ............................................................................................................................................ 9
Audio amplifier stage with AZAD2102 (U163, U164) ............................................................................. 10

3.1
General description ........................................................................................................................ 10
3.2
Features .......................................................................................................................................... 10
3.3
Absolute Ratings ........................................................................................................................... 11
3.3.1
Electrical Characteristics ....................................................................................................... 11
3.3.2
Operating specifications ....................................................................................................... 12
3.4
4
Pinning ............................................................................................................................................ 13
Audio amplifier stage with TPA3113 (U168) .......................................................................................... 13

4.1
General Description ........................................................................................................................ 13
4.2
Absolute Ratings ............................................................................................................................. 14
4.2.1
Electrical Characteristics......................................................................................................... 14
4.2.2
Operating Specifications ....................................................................................................... 15
4.3
5
Pinning ........................................................................................................................................... 15
Power stage............................................................................................................................................. 16
5.1
Power management ....................................................................................................................... 19
Microcontroller MSTAR (U5) ............................................................................................................... 21

6.1
Description ..................................................................................................................................... 21
6.2
MSTAR block diagram..................................................................................................................... 25
6.3
Reset circuit .................................................................................................................................... 26
CI interface .............................................................................................................................................. 26
USB interface .......................................................................................................................................... 27
DDR2 SDRAM K4T1G164QF (U155) ........................................................................................................ 28

9.1
Description ..................................................................................................................................... 28
9.2
Features .......................................................................................................................................... 28
Pinning ........................................................................................................................................................ 29
10
Scaler and LVDS sockets ...................................................................................................................... 30
10.1
LVDS sockets block diagram ........................................................................................................... 30
10.2
Panel supply switch circuit ............................................................................................................. 30
11
11.1
SPI flash memory - MX25L1005 (U158) .............................................................................................. 31

General Description........................................................................................................................ 31
11.2
Features .......................................................................................................................................... 31
11.3
Absolute maximum ratings ............................................................................................................ 32
11.4
Pinning ............................................................................................................................................ 32
12
NAND Flash memory NAND512XXA2C (U162) ................................................................................ 33
12.1
General Description........................................................................................................................ 33
12.2
Features .......................................................................................................................................... 33
12.3
Pinning ............................................................................................................................................ 34
13
LNBH23L (U6) ..................................................................................................................................... 35
13.1
Description ..................................................................................................................................... 35
13.2
Features .......................................................................................................................................... 35
13.3
Block diagram ................................................................................................................................. 36
14
Advanced DVB-S/S2 demodulator M88DS3002 (U3) ....................................................................... 36
14.1
Description ..................................................................................................................................... 36
14.2
Features .......................................................................................................................................... 36
14.3
Pin Assignment ............................................................................................................................... 38
15
LM1117 (U175, U180, U181) .............................................................................................................. 39
15.1
15.2
Features .......................................................................................................................................... 39
15.3
Applications .................................................................................................................................... 39
15.4
Absolute maximum ratings............................................................................................................. 39
15.5
Pinning ............................................................................................................................................ 40
16
MP2012 (U176)................................................................................................................................... 40
17
General description ............................................................................................................................ 40
17.1
Features .......................................................................................................................................... 40
17.2
Pinning ............................................................................................................................................ 41
18
RTA8283A (U23, U173) ....................................................................................................................... 41
18.1
18.2
Features .......................................................................................................................................... 41
18.3
Pinning ............................................................................................................................................ 43
19
MP1583 (U174)................................................................................................................................... 44
19.1
19.2
Features .......................................................................................................................................... 44
19.3
Pinning ............................................................................................................................................ 44
20
FDC642................................................................................................................................................ 45
20.1
20.2
Features .......................................................................................................................................... 45
20.3
Pinning ............................................................................................................................................ 45
21
21.1
FDC604P.............................................................................................................................................. 46
21.2
Features .......................................................................................................................................... 46
21.3
Pinning ............................................................................................................................................ 46
22
Connectors.......................................................................................................................................... 47
22.1
SCART (SC1) .................................................................................................................................... 47
22.2
HDMI (CN707, CN708) .................................................................................................................... 47
22.3
VGA (CN711) ................................................................................................................................. 48
23
Customer service mode (CSM) ........................................................................................................... 49
24
Service menu mode ............................................................................................................................ 49
24.1
Main service menu ......................................................................................................................... 49
24.2
Video Settings ................................................................................................................................. 50
24.3
Audio Settings ................................................................................................................................. 50
24.4
Options 1 ........................................................................................................................................ 51
24.5
Options 2 ........................................................................................................................................ 51
24.6
Tuning Settings ............................................................................................................................... 52
24.7
Source Settings ............................................................................................................................... 52
24.8
Diagnostic ....................................................................................................................................... 52
24.9
USB operations ............................................................................................................................... 52
24.10 Profile Operations........................................................................................................................... 55

24.10.1
Upload profile Data from USB ............................................................................................ 55
24.10.2
PQ Files Operations ............................................................................................................ 55
24.10.3
Upload PQ files from USB ................................................................................................... 55
24.10.4
Ci+ credentials key update ................................................................................................. 55
24.10.5
HDCP keys update............................................................................................................... 55
24.10.6
Edid update ........................................................................................................................ 56
24.10.7
DDR settings update ........................................................................................................... 56
24.10.8
MAC address update .......................................................................................................... 56
25
Software update .................................................................................................................................. 56
26
Troubleshooting ................................................................................................................................. 56
26.1
No backlight problem ..................................................................................................................... 56
26.2
CI module problem ......................................................................................................................... 58
26.3
LED blinking problem ...................................................................................................................... 60
26.4
IR problem ...................................................................................................................................... 60
26.5
Keypad touchpad problems ........................................................................................................... 61
26.6
USB problems ................................................................................................................................. 62
26.7
No sound problem .......................................................................................................................... 62
26.8
No sound problem at headphone .................................................................................................. 63
26.9
Standby On/Off problem ................................................................................................................ 63
26.10 DVD problems................................................................................................................................. 64

26.11 No signal problem .......................................................................................................................... 64
27
Styling sheet ....................................................................................................................................... 66
28
Schematics SSB ................................................................................................................................... 67
1 Introduction
The 17MB62 mainboard is driven by a MStar SOC. This IC is capable of handling
Video and audio processing, Scaling-Display processing, 3D comb filter, OSD and text
processing, LVDS transmitting, channel and MPEG2/4 decoding, integrated DVB-T/C
demodulator and media center functionality.
The TV supports PAL, SECAM, NTSC colour standards and multiple transmission
standards as B/G, D/K, I/I, and L/L including German and NICAM stereo. Also DVB T,
DVB-C are supported internal demodulators of Mstar IC and DVB-S/S2 is supported with
external demodulator.
Sound system output is supplying max. 2 2.5 W (less 10% THD at maximum output)
with 4 speakers or 2 6 W for stereo 8 speakers.
Supported peripherals are:
1 RF input VHF I, VHF III, UHF @ 75 (Common)
1 Side AV (CVBS, R/L_Audio)
1 SCART socket (Common)
1 YPbPr (Optional)
1 PC input (Common)
2 HDMI 1.3 input (1 HDMI input is common, 1 input is optional)
1 S/PDIF output (Optional)
1 Headphone (Optional)
1 Common interface (Common)
1 USB (Common)
1 DVD (Optional)
1 On-board Keypad (Optional)
1 External Keypad (Optional)
1 External TouchPad (Optional)
1.1 General Block Diagram
1.2 MB62 Placement of Blocks
2 Tuner (TU3)
A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3
Bands (From 48 MHz to 862 MHz for COFDM, from 45.25 MHz to 863.25 MHz for CCIR
channels). The tuning is available through the digitally controlled I2C bus (PLL).
In the active antenna option, the following circuits are used. ANT_CTRL pin is controlled by
microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high, ANT_PWR wil
be high.
OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT is low
ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is done by
circuits and microcontroller.
2.1 General description of the Sony RE216 tuner

The SUT-RE216 is designed for terrestrial TV (digital & analog) and digital cable reception. It
includes a full band tuner and a channel filtering for digital signals. It provides a low IF output afte
channel filtering to drive a channel demodulator. Tuning, band switching and initialization are
made via an I2C bus
interface. The module is built on a low-loss printed circuit
board carrying all the components in a metal housing frame
with top and rear covers. The single aerial connector is
mounted on one frame side and all other connections are
made via pins at the bottom.
Features:
Full frequency range from 47 to 870 Mhz

Digital Platform (DVB-T/T2, DVB-C, ISDB-T & ATSC)
Analog platforms (PAL B/G/I/D/K, NTSC M & SECAM L/L)
Low IF tuner concept
Programmable channel
Filter bandwidth
Fully I2C bus controlled
For Hybrid TV applications
2.2 Pinning
3 Audio amplifier stage with AZAD2102 (U163, U164)

3.1 General description
17MB62 uses two 2,5 W Class D Mono Audio Amplifers for from 16" to 24"
TVs. AZAD2102B is a 2.9 Watts (max. can offer 3.0 Watts @ Load =
3 ,THD = 10%, AVdd = DVdd = 5.5 Volt) with high efficiency filter-free class-D
audio power amplifier in a 1613 mm x 1613 mm wafer chip scale package
(WCSP). AZAD2102B uses Current- switch technology to achieve high
performance class-d amplifier that features 0.03% THD, 85% efficiency, 70 dB
PSRR, to improve RF-rectification immunity.
AZAD2102B provide a Vibration-Spectrum modulation clock for PWM Output.
This vibration frequency is around 10 kHz shift (+/- 5 kHz of Fpwm).
The advantage of the small size package (WCSP) makes AZAD2102B very suitable
for mobile phone and PDA device application. And the Class-D amplifier structure let
AZAD2102B to have highly efficiency power consumption than Class-AB amplifier.
AZAD2102B can shrink the application board, reduce system cost, and external
components.
ESD level protection I/O embedded in AZAD2102B. For general applications,
there is no need to add extra ESD protection devices (like Varistors) in application
systems for AZAD2102Bs I/O
3.2 Features
CMOS Technology
High Efficiency 85%
High PSRR 70 dB at 217 Hz
Differential OP-amp Input
AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI
Provide Mute function (set Mute_B to GND will go into Mute status)
For the input stage AZAD2102B built-in a 10Kohm resistors (Gain
setting = 29.5 dB)
Maximum Battery Life and Minimum Heat
Efficiency With an 8 Speaker:
3.5 mA Quiescent Current
Output Power at 10% THD
2.85 Watts at AVdd = DVdd = 5.0 Volt, Rload = 4
Eliminate Power on and Power-off Pop noise
A fewer external components
Optimized PWM output stage eliminates LC output filter
Internally generate 290 kHz switching frequency to eliminate capacitor and resistor
Improve PSRR (70 dB) and wide supply voltage (3.0 V to 5.5 V)
Fully differential design reduces RF rectification
This chip has been built-in a very strong ESD protection.
System level ESD 4 KV (IEC 61000-4-2 ESD Contact Level)
Wafer chip scale package (W CSP)
TSSOP package with exposed pad
3.3 Absolute Ratings

3.3.1
Electrical Characteristics
VDD = AVdd = DVdd, VSS = AVss = DVss = Ground

TA = 25C, Filter Bandwidth = 20 Hz -20 kHz
PARAMETER
Symbol
TEST COND TIONS
Operating Votlage
Output offset voltage
Power supply rejection

ratio
Common mode rejection
ratio
High level nput
current
Low level Input
current
Operation current
Output
switching
frequency
Vibration-Spectrum
Modulation clock Ranqe
Under Voltage
Protection
Vop
vos
MNI
TYP
MAX
3.0
5.5
VDD = 5.5 V,VI= 0 V,AV = 6 V/V
4.5
6.5
VDD = 3.6 V,VI= 0 V,AV = 6 V/V
2.1
4.0
VDD = 3.0 V,VI= 0 V,AV = 6 V/V
1.2
3.0
AVdd-DVdd to AVss-DVss
UNIT
v
mV
VDD = 3.0 V to 5.5 V, AV = 2 V/V

input ac grounded with
PSRR
Cf':lRR
-68
dB
-65
dB
25
uA
Ci=2.2uF,Vripple=200mVpp,
RL=80 f=217Hz
VDD = 3.0 V to 5.5 V,Vic = VDD/2 to
0.5 V,Vi c = VDD/2 to 0.5 VDD -0.8 V,
IIIHII
VDD= 5.5V,Vi=5.8V
IIlLI
VDD= 5.5V,Vi=-0.3V
VDD = 5.5 V,no load
3.6
5.0
VDD = 3.6 V,no load
3.0
4.2
VDD = 3.0 V,no load
2.5
3.5
lop
uA
VDD = 5.5 V,no load
290
VDD = 3.6 V,no load
300
VDD = 3.0 V,no load
315
Fvs
VDD = 5.0 V,no load
+/-5
+/-10
UVP
Vin+ and Vin- connect to GND,no load
2.0
2.5
Fpwm
Mute_B pin Impedance RMuB
Mute_B to Ground
Gain
VDD=5.0V,Ri=5K0+10K
O (Av=20V/V)
Gain
KHz
20
KHz
v
KQ
270
18
mA
22
V/V
3.3.2
Operating specifications
TA = 25C,Gain = 20 V/V,
PARAMETER
TEST COND TIONS
THO+ N = 10%, f = 1kHz,RL

= 4Q
THO + N =
RL = 4 Q
Pw
1%, f = 1 kHz,
MIN
VDD = 5.0V
2.85
VDD = 3.6 V
1.45
VDD = 3.0 V
0.77
VDD = 5.0 V
2.25
VDD = 3.6 V
1.15
VDD = 3.0 V
0.60
VDD = 5.0 V
1.75
VDD = 3.6 V
0.87
VDD = 3.0 V
0.47
VDD = 5.0 V
1.39
VDD = 3.6 V
0.70
VDD = 3.0 V
0.36
THO + N =
RL = 8 Q
1%, f = 1 kHz,
VDD = 5.0 V,PO = 1W,RL = 8 Q, f = 1kHz
UNIT
0.15
Total harmonic
VDD = 3.6 V,PO = 0.5 W,RL = 8 Q, f = 1 kHz
distortion plus noise
0.12
VDD = 3.0 V,PO = 200 mW, RL = 8 Q, f = 1kHz
0,09
F = 217 H.z,
VRipple = 200
mVpp
-67
Supply ripple
rejection ratio
VDD = 3.6 V,
Av=20V/V,Inputs connect to
grounded with Ci = l.OJ,JF
SNR
Signal-to-noise ratio
VDD = 5 V,PO = 1W,RL = 8 Q
45
Output noise level
VDD = 3.6 V,f = 20 Hz to 20

kHz, nputs ac-grounded with
Ci = l.OJJF
No weighting
Vnoise
A weighting
40
VDD = 3.6 V,Vin = 100mVpp
f = 217Hz
-72
PSRR
MAX
Output power
THO+ N = 10%, f = 1kHz,RL
= 8Q
THD+N
TYP
dB
95
dB
J,JVRMS
CMRR
Common mode
rejecti on ratio
ZI
Input impedance
10
12
kQ
ZF
Feedback resistor
120
150
180
kQ
dB
3.4 Pinning
4 Audio amplifier stage with TPA3113 (U168)

4.1 General Description
17MB62 uses a 6W Class D Mono Audio Amplifers for from 26 to 32 TVs. The
TPA3113D2 is a 6-W (per channel) efficient, Class-D audio power amplifier for driving
bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of
inexpensive ferrite bead filters at the outputs while meeting EMC requirements.
SpeakerGuard speaker protection circuitry includes an adjustable power limiter and a
DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage
rail lower than the chip supply to limit the amount of current through the speaker. The DC
detect circuit measures the frequency and amplitude of the PWM signal and shuts off the
output stage if the input capacitors are damaged or shorts exist on the inputs.
The TPA3113D2 can drive stereo speakers as low as 4 . The high efficiency of the
TPA3113D2, 87%, eliminates the need for an external heat sink when
playing music.
The outputs are also fully protected against shorts to GND, VCC, and output-to-output.
The short-circuit protection and thermal protection includes an auto-recovery feature.
3.2.
Features
6-W/ch into an 8- Loads at 10% THD+N From a 10-V Supply

12-W into a 4- Mono Load at 10% THD+N From a 10-V Supply
87% Efficient Class-D Operation Eliminates Need for Heat Sinks
Wide Supply Voltage Range Allows Operation from 8 V to 26 V
Filter-Free Operation
SpeakerGuard Speaker Protection Includes Adjustable Power Limiter plus DC
Protection
Flow Through Pin Out Facilitates Easy Board Layout
Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto
Recovery Option
Excellent THD+N / Pop-Free Performance
Four Selectable, Fixed Gain Settings
Differential inputs
4.2 Absolute Ratings

4.2.1
Electrical Characteristics
4.2.2
Operating Specifications
AC CHARACTERISTICS
TA = 25c, Vee = 12 V, RL = 8 0 (unless otherwise noted)
PARAMETER
TEST COND
ITIONS
MIN
TYP
MAX
UNIT
Supply ripple rejection
200 mVpp ripple from 20 Hz-1kHz,

Gain = 20 dB,Inputs ac-coupled to AGNO
-70
THO+N Total harmonic distortion +noise
RL = 8 0, f = 1kHz, Po = 3 W (half-power)
0.06
65
IJV
KsvR
Output integrated noise
20 Hz to 22 kHz,A-weighted filter, Gan

i = 20 dB
Crosstalk
P0 = 1 W,Gain = 20 dB, f = 1 kHz
SNR
Signa-l to-noise ratoi
Maximum output at THO+N < 1%, f = 1 kHz,

Gain = 20 dB, A-weighted
fosc
Oscillator frequency
Vn
dB
-80
dBV
-100
dB
102
250
Thermal trip point
310
dB
350
150
Thermal hysteresis
15
kHz
c
c
4.3 Pinning
PIN
Pin
Number
110/P
so
Shutdown logic input for audio amp (LOW = outputs Hi-Z,HIGH = outputs
enabled).TTL logic levels with compliance to AVCC.
FAULT
Open drain output used to display short circuit or de detect fault status.Votlage
compilant to AVCC.Short circuit faults can be set to auto-recovery by connecting
FAULT pin to SO pin. Otherwise, both short circuit faults and de detect faults must
be reset by cycling PVCC.
LINP
Postiive audio input for left channeL Biased at 3V.
LINN
Negative audio input for left channeL Biased at 3V.
GAlNO
Gan
i select least significant bit. TTL logic levels with compliance to AVCC.
NAME
DESCRIPTION
GAIN1
Gan
i see
l ct most significant bit TTL logic levels with compliance to AVCC.
AVCC
Analog supply
AGNO
GVOO
High-side FET gate drive supply.Nominalvoltage is 7V. Also should be used

as supply for PLIMIT function
PLIMIT
10
Power limti leveladjust Connect a resistor divider from GVOO to GND to set
powerlimit. Connect directly to GVOO for no power limit.
R
INN
11
Negative audio input for right channe.

l Biased at 3V.
R
INP
12
Positive audio input for right channeL Biased at 3V.
NC
13
PBTL
14
ParallelBTL mode switch
PVCCR
15
Power supply for right channel H-bridge. Right channeland left channelpower
supply inputs are connect internally.
PVCCR
16
Power supply for right channel H-bridge. Right channelandleft

channelpower supply inputs are connect internally.
BSPR
17
Bootstrap 110 for right channel, positive high-side FET.
OUTPR
18
Class-0 H-bridge positive output for right channel.
PGNO
19
OUTNR
20
Class-0 H-bridge negative output for right channel.
BSNR
21
Bootstrap 1/0 for right channel, negative high-side FET.
BSNL
22
Bootstrap 1/0 for left channe,l negative high-side FET.
OUTNL
23
Class-0 H-bridge negative output for left channel.
PGNO
24
OUTPL
25
Class-0 H-bridge positive output for left channeL
BSPL
26
Bootstrap 1/0 for left channe,

l positive high-side FET.
PVCCL
27
Power supply for left channelH-bridge. Right channel and left channel power
PVCCL
28
Power supply for left channelH-bridge. Right channel and left channel power
Analog signalground. Connect to the thermal pad.
Not connected
Power ground for the H-bridges.
Power ground for the H-bridges.
5 Power stage
The DC voltages required at various parts of the chassis and panel are provided by a
main power supply unit. MB62 chassis can operate with IPS60, IPS16, IPS17, PW26,
PW27 as main power supply and also with 12V adaptor.
CN706 is used for IPS60, IPS16 and IPS17 and CN1 is used for PW26 and PW 27.
JK9 is used for the adapter option and also CN705 inverter socket or DB32 chassis with
CN706 is used to supply backlight.
The power supplies generate 18V, 12V, 5V, 3,3V and 12V, 5V, stand by mode DC
voltages. Power stage which is on-chassis generates 5V, 3V3 stand by voltage and 12V,
8V, 5V, 3V3, 2.5V, 1,8V and 1,2V supplies for other different parts of the chassis. Chassis
block diagram is indicated below.
The blocks on power block diagram is using dependent to main supply. For PW26 and
PW27 just common blocks are enough for proper operation.
For IPS16, IPS17, IPS60 below blocks must work properly.
For adopter case also below blocks are necessary.
Short CCT Protection Circuit

Short circuit protection is necessary for protecting chassis and main IC against damages
when any Vcc supply shorts to ground. Protect pin should be logic high while normal
operation. When there is a short circuit protect pin shold be logic low. After any short
detection, SW forces LEDs on LED card to blink.
5.1 Power management
---MB62 Power Management with Adaptor---
---MB62 Power Management with PW25/ PW26---
---MB62 Power Management with IPS16/IPS17/IPS60/PW05---
---MB62 Power Management with PW03/PW04/PW07---
6 Microcontroller MSTAR (U5)

6.1 Description
MSD9WB9PT-2 (Main IC) (U5)
The MSD9WB9PT-2 is MStars most up-to-date system-on-chip solution for flat panel
integrated digital television products. Building on the success of MStars preceding SOC
series, the MSD9WB9PT-2 provides most cost-effective solution for DTV application with
creative and attractive features exclusively presented by MStar.
The MSD9WB9PT-2 integrates DTV/multi-media all-purpose AV decoder, DVB-T
demodulator, VIF demodulator, and Sound/Video processor into a single device. This
allows the overall BOM to be reduced significantly making the MSD9WB9PT-2 a very
competitive multi-media DTV solution. For ATV users, the MSD9WB9PT-2 provides multistandard analog TV support with adaptive 3D video decoding and VBI data extraction.
The build-in audio decoder is capable of decoding FM, AM, NICAM, A2, BTSC and EIA-J
sound standards. The MSD9WB9PT-2 supplies all the necessary A/V inputs and outputs
to complete a receiver design including a multi-port HDMI receiver and component video
ADC. All input selection multiplexed for video and audio are integrated, including full
SCART support with CVBS output. The equipped MStar MACE-5 color engine is the
latest masterpiece from
MStar famous color engine series providing excellent video and picture quality in Full-HD
and large-scale displaying system.
To meet the increasingly popular energy legislative requirements without the use of
additional hardware, the MSD9WB9PT-2 has an ultra low power standby mode during
which an embedded MCU can act upon standby events and wake up the system as
required.
The MSD9WB9PT-2 is composed of several modules:
High Performance Micro-processor

o Ultra high speed/performance 32-bit RISC CPU
o One full duplex UARTs
o Supports USB and ISP programming
o DMA Engine
Transport Stream De-multiplexer
o Supports parallel and serial TS interface, with or without sync signal
o Supports TS input and output for external CI module
o Maximum TS data rate is 104 Mb/sec for serial or 16 MB/sec for parallel
o 32 general purpose PID filters and section filters for each transport stream
de-multiplexer
o Supports additional audio/video/PCR filters
o Supports TS DMA channel for time-shift
o Supports 3DES/DES and AES encryption/decryption
MPEG-2 Video Decoder
o ISO/IEC 13818-2 MPEG-2 video MP@HL
o Automatic frame rate conversion
o Supports resolution up to HDTV (1080i, 720p) and SDTV
MPEG-4 Video Decoder

o ISO/IEC 14496-2 MPEG-4 ASP video decoding
o Supports resolutions up to HDTV (1080p@30fps)
o Supports DivX1 Home Theater & HD profilesOptional
o Supports VC-1Optional, FLV video format decoding
Hardware JPEG
o Supports sequential mode, single scan
o Supports both color and grayscale pictures
o Following the file header scan the hardware decoder fully handles the
decode process
o Supports programmable Region of Interest (ROI)
o Supports formats: 422/411/420/444/422T
o Supports scaling down ratios: 1/2, 1/4, 1/8
o Supports picture rotation
NTSC/PAL/SECAM Video Decoder
o Supports NTSC-M, NTSC-J, NTSC-4.43, PAL (B,D, G, H, M, N, I, Nc),
and SECAM standards
o Automatic standard detection
o Motion adaptive 3D comb filter
o Five configurable CVBS & Y/C S-video inputs
o Supports Teletext, Closed Caption (analog CC 608/ analog CC 708/digital
CC 608/digital CC708), V-chip and SCTE
Multi-Standard TV Sound Processor
o SIF audio decoding
o Supports BTSC/A2/EIA-J demodulation
o Supports NICAM/FM/AM demodulation
o Supports MTS Mode Mono/Stereo/SAP in BTSC/ EIA-J mode
o Supports Mono/Stereo/Dual in A2/NICAM mode
o Built-in audio sampling rate conversion (SRC)
o Audio processing for loudspeaker channel, including volume, balance,
mute, tone, EQ,virtual stereo/surround and treble/bass controls
o Advanced sound processing options available,for example: SRS1, BBE2,
QSound3, Audyssey4
o Supports digital audio format decoding:
MPEG-1, MPEG-2 (Layer I/II), MP3, Dolby Digital (AC-3), AAC-LC
Supports Optional Dolby Digital Plus, Dolby mPulse, and MS10
multistream decoder, including Dolby Digital Encoder for
transcoding streams to Dolby Digital 5.1 (DDCO)
Supports MPEG Audio, Dolby Digital, Dolby Digital Plus format AD
(Audio Description)
o Supports PVR and time-shifting
Audio Interface
o One SIF audio input interface with minimal external saw filters
o Four L/R audio line-inputs
o Two L/R outputs for main speakers and additional line-outputs
o Supports stereo headphone driver
o I2S digital audio input & output
o S/PDIF digital audio output
o HDMI audio channel processing
o Programmable delay for audio/video synchronization
Analog RGB Compliant Input Port

Three analog ports support up to 1080P
Supports PC RGB input up to SXGA@75Hz
Supports HDTV RGB/YPbPr/YCbCr
Supports Composite Sync and SOG Sync-on-Green
Automatic color calibration
AV-link support
Analogue RGB Auto-Configuration & Detection
Auto input signal format and mode detection
Auto-tuning function including phasing, positioning, offset, gain, and jitter
detection
o Sync Detection for H/V Sync
DVI/HDCP/HDMI Compliant Input Port
o Two HDMI/DVI Input ports
o HDMI 1.3 Compliant
o HDCP 1.1 Compliant
o 225 MHz @ 1080P 60 Hz input with 12-bit Deep-color support
o CEC support
o Single link DVI 1.0 compliant
o Robust receiver with excellent long-cable support
MStar Advanced Color Engine (MStarACE-5)
10/12-bit internal data processing
Fully programmable multi-function scaling engine
o Nonlinear video scaling supports various modes including Panorama
o Supports dynamic scaling for VC-1
High-Quality DTV video processor
o 3D motion video deinterlacer with motion object stabilizer
o Edge-oriented deinterlacer with edge and artifact smoother
o Automatic 3:2/2:2/M:N pull-down detection and recovery
o 3D multi-purpose noise reduction for DTV or lousy air/cable input
o MPEG artifact removal including de-blocking and mosquito noise
reduction
o Arbitrary frame rate conversion
MStar Professional Picture Enhancement:
o Dynamic brilliant and fresh color
o Dynamic Blue Stretch
o Intensified contrast and details
o Dynamic Vivid Skin
o Dynamic sharpened Luma/Chroma edges
o Global and local dynamic depth of field perception
o Accurate and independent color control
o Supports sRGB and xvYCC color processing
o Supports HDMI 1.3 deep color format
Programmable 12-bit RGB gamma CLUT
Output Interface
o Single/dual link 8/10-bit LVDS output
o Supports panel resolution up to Full-HD (1920x1080) @ 60Hz
o Supports TH/TI format
o Supports dithering options to 6/8-bit output
o Spread spectrum output for EMI suppression
CVBS Video Encoder
o Supports all NTSC/PAL TV Standard
o Stand-alone scaling engine
o Programmable Hue, Contract, Brightness
o Supports TTX/CC/WSS output
o
o
o
o
o
o
o
o
o
o
o CVBS Video Output
o Allows CVBS output of all source inputs

2D Graphics Engine
o Hardware Graphics Engine for responsive
o Interactive applications
o Supports point draw, line draw, rectangle draw/fill, text draw and trapezoid
draw
o BitBlt, stretch BitBlt, trapezoid BitBlt, mirror BitBlt and rotate BitBlt
o Raster Operation (ROP)
o Support Porter-Duff
VIF Demodulator
o Compliant with NTSC M/N, PAL B, G/H, I, D/K, SECAM L/L' standards
o Audio/Video dual-path processor
o Stepped-gain PGA with 25 dB tuning range and 1 dB tuning resolution
o Maximum IF gain of 37 dB
o Programmable TOP to accommodate different tuner gain and SAW filter
insertion loss to optimize noise and linearity performance
o Multi-standard processing with single SAW
o Supports silicon tuner low IF output architecture
DVB-T Demodulator
o Digital carrier frequency offset correction: 500KHz
o Optimised for SFN channels with pre/post-cursive echoes inside/outside
the guard
o Acquisition range 857kHz includes up to 3x 1/6 MHz transmitter offset
o Meets Nordig Unified 1.0.3, D-Book 5.0, EICTA E-Book/C-Book test
requirement
o 400kHz internal carrier offset recovery range
o 6.8 usecs echo cancellation at 7 Msym/s
o Supports IF, low-IF, zero-IF inputs
o Ultra-fast automatic blind UHF/VHF channel scan (constellations and
symbol rate)
Connectivity
o Two USB 2.0 host ports
o USB architecture designed for efficient support of external storage
devices in conjunction with off air broadcasting
Miscellaneous
o DRAM interface supporting one 16-bit DDR2 @1066MHz
o Supports PVR
o Supports Common Interface for conditional access support
o Bootable SPI interface with serial flash support
o Parallel interface for external NAND flash support
o Power control module with ultra low power MCU available in standby
mode
o 380-ball LFBGA package
o Operating Voltages: 1.26V (core), 1.8V (DDR2), 2.5V and 3.3V (I/O and
analog)
6.2 MSTAR block diagram
6.3 Reset circuit

Reset circuit using for initiliazing main Mstar IC. Reset condition is high and nomal
working condition is low for RESET pin.
7 CI interface
CI Interface Power Switch:
It is used for CI module supply, when Module is inserted (it means CI detect is low) This
circuit is opened or closed by CI_POWER_CTRL port of main uController
8 USB interface
Main Concept IC has integrated 2 USB 2.0 interface. One of them is used for ethernet
function, the other one is used for USB connectivity for last user. Last user can play video,
picture and audio files. Also digital channels can be record to external storage device by
this interface. All SW files can be updated with interface.
USB circuit has 3 main parts
Integrated USB 2.0 Host interface of D3K (U5)
Protection IC (U145)
Over current protection IC (U8)
9 DDR2 SDRAM K4T1G164QF (U155)

9.1 Description
The 1Gb DDR2 SDRAM is organized as a 16Mbit x 8 I/Os x 8 banks, 8Mbit x 16 I/Os x 8
banks device. This synchronous device achieves high speed double-data-rate transfer
rates of up to 1066Mb/sec/pin (DDR2-1066) for general applications. The chip is designed
to comply with the following key DDR2 SDRAM features such as posted CAS with additive
latency, write latency = read latency - 1, Off-Chip Driver (OCD) impedance adjustment and
On Die Termination. All of the control and address inputs are synchronized with a pair of
externally supplied differential clocks. Inputs are latched at the crosspoint of differential
clocks (CK rising and CK falling). All I/Os are synchronized with a pair of bidirectional
strobes (DQS and DQS) in a source synchronous fashion. The address bus is used to
convey row, column, and bank address information in a RAS/CAS multiplexing style. For
example, 1Gb (x8) device receive 14/10/3 addressing. The 1Gb DDR2 device operates
with a single 1.8V 0.1V power supply and 1.8V 0.1V VDDQ. The 1 Gb DDR2 device is
available in 60 ball FBGA(x8) and 84ball FBGA(x16).
9.2 Features
JEDEC standard VDD = 1.8V 0.1V Power Supply

VDDQ = 1.8V 0.1V
533MHz fCK for 1066Mb/sec/pin
8 Banks
Posted CAS
Programmable CAS Latency: 4, 5, 6, 7
Programmable Additive Latency: 3, 4, 5. 6
Write Latency(WL) = Read Latency(RL) -1
Burst Length: 4 , 8(Interleave/nibble sequential)
Programmable Sequential / Interleave Burst Mode
Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional
feature)
Off-Chip Driver(OCD) Impedance Adjustment
On Die Termination
Special Function Support - PASR(Partial Array Self Refresh) - 50ohm ODT - High
Temperature Self-Refresh rate enable
Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE <
95C
All of products are Lead-free, Halogen-free, and RoHS compliant
Pinning
UOQS
OQ14
OQ9
UOM
UOQS
VooQ
VoDQ
DQ15
OQ12
OQ13
LDQS
OQ7
VooQ
VoDQ
OQ3
OQ2
DQO
OQ5
Voo
OOT
Voo
1 2 3 4
Ball Locations (x16)
Populated ball
Ball not populated
Top view
(See the balls throughpackage)
AB ++++++
ED +++
++
++
H
+++
KL
++++
+
+
MN +
+++
+++
+
+
R ++++
c
10 Scaler and LVDS sockets

10.1 LVDS sockets block diagram
10.2 Panel supply switch circuit

This switch is used to open and close panel supply of TCON. It is controlled by port of
main ucontroller. Also with this circit panel sequency could be adjusted correctly. 3 panel
supplys are connected to this circuit. All of them are optional according to panels.
11 SPI flash memory - MX25L1005 (U158)

MX25L1005 is a CMOS 1,048,576 bit serial Flash memory, which is configured as
131,072 x 8 internally.The MX25L1005 feature a serial peripheral interface and software
protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock
input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the
device is enabled by CS# input. The MX25L1005 provide sequential read operation on
whole chip. After program/erase command is issued, auto program/ erase algorithms
which program/ erase and verify the specified page or sector/block locations will be
executed. Program command is executed on page (256 bytes) basis, and erase
command is executes on chip or sector(4K-bytes) or block(64K-bytes). To provide user
with ease of interface, a status register is included to indicate the status of the chip. The
status read command can be issued to detect completion status of a program or erase
operation via WIP bit. When the device is not in operation and CS# is high, it is put in
standby mode and draws less than 10uA DC current. The MX25L1005 utilize MXIC's
proprietary memory cell, which reliably stores memory contents even after 100,000
program and erase cycles.
11.2 Features
Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3

1,048,576 x 1 bit structure
32 Equal Sectors with 4K byte each, Any Sector can be erased individually
2 Equal Blocks with 64K byte each, Any Block can be erased individually
Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations

Latch-up protected to 100mA from -1V to Vcc +1V
Low Vcc write inhibit is from 1.5V to 2.5V
11.3 Absolute maximum ratings
RATING
Ambient Operating
Temperature
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
VALUE
0C to 70C
-55C to 125C
-0.5v to 4.6v
-0.5v to 4.6v
-0.5v to 4.6v
11.4 Pinning
8-PIN SOP (150mil)
SYMBOL
CS#
SI
SO
SCLK
HOLD#
VCC
GND
DESCRIPTION
Chip select
Serial Data Input
Serial Data Output
Clock Input
Hold, to pause the device without
deselecting the device
+3.3v Power Supply
Ground
12 NAND Flash memory NAND512XXA2C (U162)

The NAND flash 528-byte/ 264-word page is a family of non-volatile flash memories that
uses the single level cell (SLC) NAND technology. It is referred to as the small page
family.
The NAND512R3A2C, NAND512R4A2C, and NAND512W3A2C have a density of 512
Mbits and operate with either a 1.8 V or 3 V voltage supply. The size of a page is either
528 bytes (512 + 16 spare) or 264 words (256 + 8 spare) depending on whether the
device has a x8 or x16 bus width.
The address lines are multiplexed with the Data Input/Output signals on a multiplexed x8
or x16 input/output bus. This interface reduces the pin count and makes it possible to
migrate to other densities without changing the footprint.
To extend the lifetime of NAND flash devices it is strongly recommended to implement an
error correction code (ECC). The use of ECC correction allows to achieve up to 100,000
program/erase cycles for each block. A write protect pin is available to give a hardware
protection against program and erase operations.
12.2 Features
High density NAND flash memories
o 512-Mbit memory array
o Cost effective solutions for mass storage applications
NAND interface
o x8 or x16 bus width
o Multiplexed address/ data
Supply voltage: 1.8 V, 3 V
Page size
o x8 device: (512 + 16 spare) bytes
o x16 device: (256 + 8 spare) words
Block size
o x8 device: (16K + 512 spare) bytes
o x16 device: (8K + 256 spare) words
Page read/program
o Random access: 12 s (3 V)/15 s (1.8 V) (max)
o Sequential access: 30 ns (3 V)/50 ns (1.8 V) (min)
o Page program time: 200 s (typ)
Copy back program mode
Fast block erase: 2 ms (typ)
Status register
Electronic signature
Chip Enable dont care
Security features
o OTP area
Serial number (unique ID) option

Hardware data protection
o Program/erase locked during power transitions
Data integrity
o 100,000 program/erase cycles (with ECC)
o 10 years data retention
RoHS compliant packages
Development tools
o Error correction code models
o Bad blocks management and wear leveling algorithms
12.3 Pinning
13 LNBH23L (U6)
13.1 Description
Intended for analog and digital satellite receivers,the LNBH23L is a monolithic voltage
regulator
and interface IC, assembled in QFN32 5 x 5 specifically designed to provide the 13 / 18 V
power supply and the 22 kHz tone signalling to the LNB down-converter in the antenna
dish or to
the multi-switch box. In this application field, it offers a complete solution with extremely
low
component count, low power dissipation together with simple design and IC standard
interfacing.
13.2 Features
Complete interface between LNB and IC bus
Built-in DC-DC converter for single 12 V supply operation and high efficiency (typ.
93% @ 0.5 A)
Selectable output current limit by external resistor
Compliant with main satellite receivers output voltage specification
Auxiliary modulation input (EXTM pin) facilitates DiSEqC 1.X encoding
Accurate built-in 22 kHz tone generator suits widely accepted standards
Low-drop post regulator and high efficiency step-up PWM with integrated power
NMOS allow low power losses
Overload and over-temperature internal protections with IC diagnostic bits
LNB short circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
13.3 Block diagram
14 Advanced DVB-S/S2 demodulator M88DS3002 (U3)

14.1 Description
The M88DS3002 is an advanced single-chip demodulator for digital satellite television
broadcasting. It is fully compliant with the DVB-S/S2 standard and can support QPSK,
8PSK, 16APSK and 32APSK demodulation schemes. The chip provides a fast, easy-toapply and cost-effective front-end solution for digital satellite receiver. The M88DS3002
accepts baseband differential or single ended I and Q signals from a tuner, then
digitizes, demodulates and decodes the signals, and finally outputs an MPEG transport
stream. The M88DS3002 supports symbol rate from 1 Msps up to 45 Msps, and code
rate from 1/4 to 9/10. Its features cover blind scan, fade detection, timing and carrier
recovery, performance monitoring, co-channel interference cancellation, command
interface, and DiSEqC 2.X interface, etc. The device is controlled via a 2-wire serial
bus. The M88DS3002 works properly with 1.25 V and 3.3 V voltage supplies. Typically,
the power consumption is around 390 mW. The chip is available in a 64-pin QFN
package and is RoHS compliant.
14.2 Features
Multi-standard demodulation
Compliant with DVB-S/S2 specification
QPSK, 8PSK, 16APSK and 32APSK demodulation schemes
Maximum channel bit rate is 130 Mbps
Maximum symbol rates are: 45 Msps for QPSK and 8PSK; 36 Msps for 16APSK
and 28 Msps for 32APSK
DSP features
Symbol rate sweeping
I/Q impairment cancellation
Automatic spectrum inversion
Adaptive equalizer for RF reflection removal
Roll-off factor automatic identification
Blind scan for programming search
High performance on-chip micro-controller
Multi-error monitor
Accurate SNR estimation
Multi-lock indicators
Clipping rate reporter
DC removal
Automatic frequency correction (AFC)
Fast timing loop acquisition
Robust frame synchronization scheme
Phase noise indicator
Fast system recovery from fading or other abnormal conditions
Co-channel interference cancellation
Constellation monitor
Interface
DVB-S/S2 common, parallel and serial MPEG output interface compliant
2-wire serial bus to configure the device
2-wire bus repeater for tuner configuration
DiSEqC 2.X compliant interface
General purpose output (GPO)
Dedicated reference clocks (13.5MHz / 27MHz) generation
System
o On-chip 8-bit ADC
o On-chip PLL for master clock from a 27 MHz external clock or quartz
crystal
o Sleep mode supported
---Block Diagram of M88DS3002---
14.3 Pin Assignment
15 LM1117 (U175, U180, U181)

The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA
of load current. It has the same pin-out as National Semiconductors industry standard
LM317. The LM1117 is available in an adjustable version, which can set the output
voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also
available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers
current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within 1%. The LM1117 series is
available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10F
tantalum capacitor is required at the output to improve the transient response and
stability.
15.2 Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions

Space Saving SOT-223 Package
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range
LM1117 0C to 125C
LM1117I -40C to 125C
15.3 Applications
2.85V Model for SCSI-2 Active Termination

Post Regulator for Switching DC/DC Converter
High Efficiency Linear Regulators 15
32 TFT TV Service Manual 10/01/2005
Battery Charger
Battery Powered Instrumentation
15.4 Absolute maximum ratings
15.5 Pinning
16 MP2012 (U176)
17 General description
The MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM
step-down converter. It is ideal for powering portable equipment that runs from a single
cell Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can
provide up to 1.5A of load current with output voltage as low as 0.8V. It can also operate
at 100% duty cycle for low dropout applications. With peak current mode control and
internal compensation, the MP2012 is stable with ceramic capacitors and small inductors.
Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.
17.1 Features
2.7-6V Input Operation Range

Output Adjustable from 0.8V to VIN
1 A Max Shutdown Current.
Up to 95% Efficiency
100% Duty Cycle for Low Dropout
Applications
1.2MHz Fixed Switching Frequency
Stable with Low ESR Output Ceramic
Capacitors
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Short Circuit Protection
Available in 6-pin 3x3mm QFN
17.2 Pinning
Pin
#
1
Name
3
4
5
GND,
Exposed
Pad
SW
PVIN
VIN
EN
FB
Description
Feedback input. An external resistor divider from
the output to GND, tapped to the FB pin sets the
output voltage.
Ground pin. Connect exposed pad to ground
plane for proper thermal performance.
Switch node to the inductor.
Input supply pin for power FET.
Input Supply pin for controller. Put small
decoupling ceramic near this pin.
Enable input, High enables MP2012. EN is
pulled to GND with 1Meg internal resistor.
18 RTA8283A (U23, U173)

The RT8283A is a high-efficiency, monolithic synchronous step-down DC/DC converter
that can deliver up to 3A output current from a 4.5V to 23V input supply. The RT8283A's
current mode architecture and external compensation allow the transient response to be
optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit
provides protection against shorted outputs and soft-start eliminates input current surge
during start-up. The RT8283A also provides output under voltage protection and thermal
shutdown protection. The low current (<3A) shutdown mode provides output disconnect,
enabling easy power management in batterypowered systems. The RT8283A is available
in a SOP-8 package.
18.2 Features
1.5% High Accuracy Feedback Voltage

Integrated N-MOSFET Switches
Current Mode Control
Fixed Frequency Operation : 340kHz
Output Adjustable from 0.8V to 20V
Thermal Shutdown Protection
18.3 Pinning
Pin No.
1
Pin
Name
BOOT
VIN
3
4, 9 (Exposed
Pad)
5
SW
GND
COMP
EN
SS
FB
Description
Bootstrap for high-side gate driver. Connect a 0.1F or
greater ceramic capacitor from BOOT to SW pins.
Input Supply 4.5V to 23V. Must bypass with a suitably
large ceramic capacitor.
Phase Node--Connect to external L-C filter..
Ground.
Feedback Input pin is connected to the converter output.
It is used to set the output of the converter to regulate to
the desired value via an internal res divider. For an
adjustable output, an external res divider is connected to
this pin.
Compensation Node. COMP is used to compensate the
regulation Control loop. Connect a series RC network
from COMP to GND. In some cases, an additional
capacitor from COMP to GND is required.
Enable Input Pin. Logic high enables the converter; a
logic low forces the RT8253A into shutdown mode.
Attach this pin to VIN with a 100k pull up resistor for
automatic startup.
Soft-Start Control Input. SS controls the soft-start period.
Connect a capacitor from SS to GND to set the soft-start
period. A 0.1F capacitor sets the soft-start period to
13.5ms.
19 MP1583 (U174)
The MP1583 is a step-down regulator with a built-in internal Power MOSFET. It
achieves
3A of continuous output current over a wide input supply range with excellent load and
line regulation. Current mode operation provides fast transient response and eases
loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and
thermal shutdown. An adjustable soft-start reduces the stress on the input source at startup. The MP1583 requires a minimum number of external components, providing a
compact solution.
19.2 Features
3A Output Current
Programmable Soft-Start
100m Internal Power MOSFET Switch
Stable with Low ESR Output Ceramic Capacitors
20A Shutdown Mode
Fixed 385KHz Frequency
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Wide 4.75V to 23V Operating Input Range
Output Adjustable from 1.22V to 21V
Under-Voltage Lockout
19.3 Pinning
Pin
No.
1
Pin
Name
BOOT
2
3
IN
SW
4
5
GND
FB
COMP
Description
High-Side Gate Drive Bootstrap Input. BS supplies the drive for the
high-side N-Channel MOSFET switch.
Power Input. Drive IN with a 4.75V to 23V power source.
Power Switching Out is the switching node that supplies power to the
output
Ground.
Feedback Input. FB senses the output voltage and regulates it. Drive
FB with a resistive voltage divider from the output voltage. FB
threshold is 1.222V.
Compensation Node is used to compensate the regulation control
loop.
EN
SS
Enable/UVLO. A voltage greater than 2.71V enables operation. For

complete low current shutdown the EN pin voltage needs to be at less
than 900mV. When the voltage on EN exceeds 1.2V, the internal
regulator will be enabled and the soft-start capacitor will begin to
charge. The MP1583 will start switching after the EN pin voltage
reaches 2.71V.
Soft-Start Control Input. SS controls the soft-start period.
20 FDC642
This P-Channel 2.5V specified MOSFET is produced using Fairchilds advanced
PowerTrench process that has been especially tailored to minimize on-state resistance
and yet maintain low gate charge for superior switching performance.
These devices have been designed to offer exceptional power dissipation in a very small
footprint for applications where the larger packages are impractical.
20.2 Features
20.3 Pinning
Max rDS(on) = 65 m at VGS = -4.5 V, ID = -4.0 A

Max rDS(on) = 100 m at VGS = -2.5 V, ID = -3.2 A
Fast switching speed
Low gate charge (11nC typical)
High performance trench technology for extremely low rDS(on)
SuperSOTTM-6 package: small footprint (72% smaller than standard
SO-8); low profile (1 mm thick)
Termination is Lead-free and RoHS Compliant
21 FDC604P
This P-Channel 1.8V specified MOSFET uses Fairchilds low voltage PowerTrench
process. It has been optimized for battery power management applications.
21.2 Features
5.5 A, 20 V. RDS(ON) = 33 m @ VGS = 4.5 V

RDS(ON) = 43 m @ VGS = 2.5 V
RDS(ON) = 60 m @ VGS = 1.8 V
Fast switching speed.
High performance trench technology for extremely low RDS(ON)(S)
21.3 Pinning
22 Connectors
22.1 SCART (SC1)
22.2 HDMI (CN707, CN708)
22.3 VGA (CN711)
23
Customer service mode (CSM)
To enter the Customer Service Mode, press MENU-1-2-3-6-5-4 keys consecutively, on the remote
control. The read-only top-level service menu will appear. Pressing theRETURN or MENU key will exit
service menu.
24
Service menu mode
To enter the service menu, press MENU-4-7-2-5 keys consecutively, on the remote control. The top-level
service menu will appear. All submenus can be selected via Up/Down keys and displayed by pressing OK
key. When a submenu is displayed, top-level service menu disappears. Pressing RETURN key, returns to
the one level higher menu. Pressing the MENU key will exit service menu.
Some items are changeable at service menu, the values of which are stored in the NVM when the menu is
closed. Some items are read-only, which can only be changed by Profile Manager and displayed in service
menu for convenience.
24.1 Main service menu

Service menu or a sub-menu is displayed on the screen when the TV is in one of the TV/AV/PC modes. It
shows what the items are set in Profile Manager. It is a read-only screen, not writable.
It shows the following items:
TV Life Time: The number of minutes the set is in the On mode.
Standby SW Version: The version number of the Stand-by software.
Mboot Version: The version number of the Mboot software.
PANEL: The LCD panel identification including the software version information.
PQ: Picture quality tool version information.
PROFILE: TV specific option profile
PIX FILES: Not applicable
HW Profile Version: The version number of the hardware profile.
SW Profile Version: The version number of the software profile.
Lan Profile Version: The version number of the Lan profile.
Customer: Philips
Items exist in the main screen of service menu. Also, software version number and DCF id are written in
the header of service menu.
The main items in Service Menu:
24.2 Video Settings

RF AGC adjustments for neighbour and image channels exist or don't. Also, ADC Calibration gain
and offset values for RGB separately due to selected sources
24.3 Audio Settings

Surround type and surround mode text items are displayed.
24.4 Options 1
Profile options such as AUTO TV off time, Power up mode, EPG type, etc. are displayed in options 1.
24.5 Options 2
Profile options such as APS sorting, Dynamic Menu, Auto zoom mode etc. are displayed in Options 2.
24.6 Tuning Settings

Tuner type is displayed.
24.7 Source Settings

Enable and disabled sources are displayed.
When TV is disabled, Items which are connected to Tuner are picked off from menu. (Install and Retune
Menu, Channel List Menu...).
24.8 Diagnostic
The result of various diagnostic tests are displayed here.
24.9 USB operations

USB operations are performed by pressing that button.
See Service Menu Design Idea for Menu structure, look and feel, position, etc
Video Settings
RF AGC SECAM
RF AGC NEIGHBOUR NO IMAGE NO
RF AGC NEIGHBOUR NO IMAGE YES
RF AGC NEIGHBOUR YES IMAGE NO
RF AGC NEIGHBOUR YES IMAGE YES
RF AGC
ADC Calibration Source
ADC Calibration R Gain
ADC Calibration G Gain
ADC Calibration B Gain
ADC Calibration R Offset
ADC Calibration G Offset
ADC Calibration B Offset

Audio Settings
Surround Type
Surround Mode Text

Options 1
Auto TV OFF
Power Up mode
Backlight Trick Mode
Cable Support
EPG Type
Hotel Mode
LCN
PC Standby
Stby Search
Test Tool
Local Key
Volume Level
Options 2
Aps Sorting
Dynamic Menu
EPG Menus
Transparent Text
HDMI Number
Remote control type
DCF ID
Tuning Settings
Source Settings
Tuner Type
TV
EXT1
EXT2
EXT2-S
FAV
S-VIDEO
HDMI 1
HDMI 2
HDMI 3
HDMI 4
YPBPR
VGA/PC
Blu-ray
Diagnostic
Remote control test

UHF test
VHF test
Factory reset
Tuner I2C
IF I2C
HDMI I2C
Ethernet
EDID Status
HDCP Status
DDR Settings
CI+ Credentials
MAC Address
USB Operations
Press this button to perform USB operations.
USB stick should be connected before this operation.
24.10 Profile Operations

VES1.1E LA profile data are kept in the flash file system as separate files. So they can be downloaded to
USB memory stick or uploaded to TV from a memory stick individually.
24.10.1
1.
2.
3.
4.
Upload profile Data from USB

Create a folder named profile in the USB stick.
Copy mb62_swprofile.bin and mb62_hwprofile.bin into the USB profile folder.
Plug the USB stick into the TV.
Open service menu and select USB Operations.
The files will be automatically copied to the TV flash file system.

After a reboot, App/Mw will start to use new profiles. It is possible to upload hardware or software profiles
separately.
24.10.2
PQ Files Operations
It is also possible to download/upload PQ files from/into MB62 when USB Operations button in service
menu is pressed.
Whenever a USB stick is connected to TV set and USB Operations button in service menu is pressed, /pq
folder is checked.
If it exists and if they include some files, necessary copy/delete operations are performed.
24.10.3
Upload PQ files from USB
1. Create a folder named pq in the USB stick.

2. Copy VESTEL_D1_Plus_PNL.bin, Titania2_Main.bin and Titania2_Main_Text.bin into USB pq
folder.
3. Connect USB stick to TV.
4. Open service menu, select USB Operations.
The files named VESTEL_D1_Plus_PNL.bin, Titania2_Main.bin, Titania2_Main_Ex.bin and
Titania2_Main_Text.bin will be copied from USB to TV.
24.10.4
Ci+ credentials key update
1. Create a spi folder in root of the memory stick

2. Copy mb62_credentials.bin to spi folder
3. Connect the USB stick to the TV.
4.
Perform USB Operations in the service menu.
24.10.5
1.
2.
3.
4.
HDCP keys update

Create a spi folder in roof of the memory stick.
Copy mb62_hdcp.bin to spi folder.
Connect the USB stick to the TV.
Perform USB operations in the service menu.
24.10.6
1.
2.
3.
4.
24.10.7
1.
2.
3.
4.
5.
DDR settings update
Create a spi folder in root of the memory stick.

Rename the ddr binary file to be used which resides in the config_mb62 folder as mb62_ddr.bin.
Copy the file mb62_ddr.bin to the spi folder.
24.10.8
1.
2.
3.
4.
Edid update
Create a spi folder in root of the memory stick.

Copy edid.edid to the spi folder.
MAC address update
Create spi folder in root of the memory stick.

Copy the file mb62_mac.bin to the spi folder.
25 Software update
In the VES1.1E LA there is only one software package. From following steps
software update procedure can be seen:
1. MB62_en.bin, mboot.bin and usb_auto_update_T4.txt documents should copy directly
inside of a flash memory(not in a folder).

2. Put flash memory to the tv when tv is powered off.
3. Power on the and wait when the tv is opened.
4. If first time installation screen is displayed, it means software update procedure is
successful.
26 Troubleshooting
26.1 No backlight problem
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin
Backlight pin should be high in open position. If it is low, please check Q181 and panel
cables.
Dimming pin should be high or square wave in open position. If it is low, please check
S16 for Mstar side and panel or power cables, connectors.
Backlight power supply should be in panel specs. Please check CN705 for MB62, related
connectors for power supply cards.
STBY_ON/OFF should be low for standby on condition, please check R1677.
26.2 CI module problem

Problem: CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins
CI supply shoul be 5V when CI module inserted. If it is not 5V please check
CI_POWER_CTRL, this pin should be low.
Please check mechanical positions ofCI module.

Detect ports should be low. If it is not low please check Cl connector pins, Cl module pins
and 3V3_VCC on MB62.
R1632
Cl Detect
7
8
10
11
12
13
14
21
22
23
24
25
".
Cl Detect
'A
27
28
29
30
31
PCM D3
PCM D4
PCM DS
PCM D6
PCM
PCM CB N
PCM AlO
PCM OB_N
PCM All
PCM A9
PCM AS
PCM A13
PCM A14
3V3_VCC
12p
sov
26.3 LED blinking problem

Problem: LED blinking, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while
normal operation. When there is a short circuit protect pin will be logic low. If you detect
logic low on protect pin, unplug the TV set and control voltage points with a multimeter to
find the shorted voltage to ground.
26.4 IR problem
Problem: LED or IR not working
Check LED card supply on MB62 chasis.
LED SOCKET
L--<J SV STBY
F259
+----2-- - -[>IR IN
C949
600R
H
Ql70
Ql7l
26.5 Keypad touchpad problems

Problem Keypad or Touchpad is not working.
Check keypad supply and keyboard pin on the SSB.
.-<
BC949B
26.6 USB problems

Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V.
26.7 No sound problem

Problem: No audio at main TV speaker outputs.
Check supply voltages of VDD_AUDIO, 5V_VCC and 3V3_VCC with a voltage-meter.

There may be a problem in headphone connector or headphone detect circuit (when
headphone is connected, speakers are automatically muted). Measure voltage at
HP_DETECT pin, it should be 3.3v.
26.8 No sound problem at headphone

Problem: No audio at headphone output.
Check HP detect pin, when headphone is. Check 5V_VCC and 3V3_VCC with a voltagemeter.
26.9 Standby On/Off problem

Problem:
Device cannot boot, TV hangs in standby mode.
There may be a problem about power supply. Check 12V_VCC, 5V_VCC and 3V3_VCC with a
voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW.
Additionally it is goood to check SW printouts via hyper-terminal (or Teraterm). These
printouts may give a clue about the problem.
26.10 DVD problems

Problem: DVD is not working.
Check that DVD source is selected in Service menu. Check supply voltage of DVD
namely 12V_VCC.
26.11 No signal problem

Problem: No signal in TV mode.
Check tuner supply voltage; 3V3_TUN. Check tuner options are correctly set in Service menu.
Check AGC voltage at IF_AGC pin of tuner.
BACK COVER METAL 32130
SCREW P C ZN YFMB 3 x 9.5
COVER FOOT
10
11
METAL FRAME 32" LED
BACK COVER 32130 LED DVD
DISPLAY ASM 32" LED
ASM
SCREW P C ZN Y
IR
10
17LD98
11
5
1
3
2
27 Styling sheet
CN17
3V3_VCC
3V3_VCC
3V3_VCC
1V2_VCC
F1
C60
22u
16V
F4
60R
F3
60R C58
22u
6V3
50V
60R
1n
TU1
FK1601
F2
60R
C5V6
GND
SDA
SCL
VCC
IF_AGC
IF_P
IF_N
CLK_OUT
50V
1n
S25
C57
100n 10V
C41
100n 10V
C20
C16
C59
22u
6V3
50V
1n
2p2 3.3pF
50V
C63
D206
IF_AGC_TUNER
DIGITAL_IF_P
DIGITAL_IF_N
TUN_SDA
TUN_SCL
3V3_TUNER
TP48
ACTIVE_ANT_SUPPLY
S138
50V
1n
3V3_S2_TUN
3V3_S2_VDDA
C17
C56
100n 10V
C37
100n 10V
C38
C52
100n 10V
C36
100n 10V
C19
ANT-DC
NC
50V
1n
C62
C42
100n 10V
C18
C44
100n 10V
LNB_OUT
0.5pF
3V3_S2_TUN
4n7
L1
S5
NC
21
20
19
18
17
16
15
3V3_S2_TUN
R39
3k3
10n
16V
C27
C49
100n 10V
3V3_S2_VDDD
C48
100n 10V
S11
10V 100n
C39
100n 10V
C46
100n 10V
C53
100n 10V
C45
100n 10V
C40
100n 10V
C54
100n 10V
C47
100n 10V
C43
100n 10V
C55
100n 10V
2p2
50V
C50
100n 10V
3V3_S2_TUN
14
TEST
LNA_IN
RESET
NC
50V
50V
1V25_S2_VDDI
M88TS2022
RFBYPASS
CKDIV_OPT
CAP
RES
SONY TUNER
IF_AGC
IF_P
IF_N
RESET
GND
SDA
SCL
+3V3
ANT-DC
1
2
QP
QN
VDDA1
IN
IP
CK_OUT
VDDA2
50V
R35
33R
R36
33R
16V
X1
TP47
S41
S40
3V3_TUNER
DIGITAL_IF_P
50V
4
27MHz
3
S2_IN
SDA_S2_TUN
SCL_S2_TUN
10k
16V
S2_QP
S2_QN
R32
1k
47R
R30
47R
R29
TUN_SDA
S2_IP
3V3_S2_TUN
R22
16V
C965
100n
16V
TUN_SCL
3V3_S2_TUN
IF_AGC_TUNER
3V3_S2_TUN
R31
1k
C61
22u
6V3
DIGITAL_IF_N
RESET_TUNER
C904
100n
10V
S2_AGC
S2_QP
S2_QN
S2_IN
S2_IP
TUN_SDA_MST
TUN_SCL_MST
ACTIVE_ANT_SUPPLY
27 MHZ KULLANILACAK
C30 10n
16V
C29 10n
16V
C31 10n
16V
C32 10n
16V
OVER_CUR_DETECT
ACTIVE_ANT_SUPPLY
S2_AGC
R1594
10k
1k
F304
4
3
NUTUNE/SEMCO/LG
SDA
VDDA4
VDAA5
22
S20
S12
12
TEST2
SCL
SDA_S2_TUN
SCL_S2_TUN
16V
R44
2k
1V25_S2_VDDI
1V25_S2_VDDI
3V3_S2_VDDD
11
10
NC
NC7
VCC_2
VCC_1
VDDD_1
NC6
QP
QN
GNDA_3
VDDA_2
IN
IP
GNDA_2
VDDA_1
XTAL_OUT
XTAL_IN
GNDA_1
3V3_S2_VDDD
16
15
14
13
NC 12
3V3_S2_VDDA
3V3_S2_VDDA
TH1
FDN336P
Q175
64
TU3
SUT-RE216
11
TEST3
U4
13
TEST1
VDD_DIG
23
VDD_REG
26
C28
24
C23
27p
8
3V3_S2_TUN
C22
10
VDDA3
9
XTALN
AGC
C8
C10
C26
10p
10p
C9
10p
10p
C11
R1586
20k
X3
10n
XTALP
VDDA6
27
C24
Q172
BC848B
R1581
1k
R1595
10k
R1590
10k
12V_VCC
M88DS3002
NC
ANT_CTRL
IF_AGC_MST
NC
NC
NC
R1597
10k
VCC_6
M_DATA0
M_DATA1
M_DATA2
M_DATA3
VCC_7
M_DATA4
M_DATA5
VDDD_3
M_DATA6
M_DATA7
M_ERR
M_VAL
VCC_8
M_SYNC
M_CKOUT
50V
50V
R38
33R
R37
33R
SDA_SYS
SCL_SYS
KONTROL EDILECEK
00 SEILDI WRITE:D0H READ:D1H
SCLT
18
C21
C25
25
27p
SDAT
19
27p
10n
28
10n
27p
VCC_3
20
27MHz
5V_VCC
2R1
10k
R1593
NC5
10k
R4
63
GPO
SDA
21
C35
33p
50V
C33
61
NC4
1V25_S2_VDDI
62
VCC_10
SCL
22
C34
50V
33p
3V3_S2_VDDD
10n
60
NC3
3V3_S2_VDDD
59
VDDD_4
VDDD_2
23
1
2
58
NC2
ADDR_SEL1
24
1V25_S2_VDDI
57
NC1
ADDR_SEL0
25
18p
C73
R15
4k7
1
56
NC9
VCC_4
26
3V3_S2_VDDD
AAGC
55
NC8
VSEL
27
1V25_S2_VDDI
17
54
LOCK
1V25_S2_VDDI
53
VCC_9
DISEQC_IN
28
C72
2
1
52
LNB_EN
DISEQC
29
DISEQC_OUT
18p
50
OLF
VCC_5
30
1V25_S2_VDDI
R14
4k7
R13
4k7
1
51
CKXTAL_13
CKXTAL_27
31
U3
GNDD 49
RESET
32
2
R16
4k7
33
34
35
36
37
38
39
40
41
42
43
R26
47R
R27
47R
C910
100n
10V
1V25_S2_VDDI
R28
47R
12p
50V
C71
TS_MDI0
TS_MDI1
TS_MDI2
TS_MDI3
TS_MDI4
TS_MDI5
TS_MDI6
TS_MDI7
TSMIVALID
TSMISYNC
TSMICLK
A3
OF:
14-03-2011_17:04
SHEET:
17mb62-1
R1
1
R1583
R2
R3
47R
R4 4
R1
1
47R
R1584
R2
R3
R4
IF_AGC_TUNER
PROJECT NAME :
RESET_S2
1V25_S2_VDDI
1V25_S2_VDDI
3V3_S2_VDDD
44 NC
45
46
47
48
R1963
100R
C912
100n
10V
TUNER&S2_TUNER&DEMOD
DRAWN BY : Ulas Dereli
SCH NAME :
3V3_S2_VDDD
AX M
28 Schematics SSB
D1
SCART LT1
SC1
RED
2
1
3
WHT
DVD_SENSE
DVD_CVBS_IN
JK7
YEL
30064869
DVD_SPDIF
CDA4C16GTH
SCART_AUD_R_IN
600R
F201 600R
3n3
F206
C854
50V
C831
75R
R1489
SCART_AUD_L_IN
50V
220p
C15V
D178
R1245
100R
4n7
50V
C858
50V
220p
3n3
C972
50V
220p
DVD_IR_ON/OFF
IR_IN
R1623
100R
TP4
TP42
R1624
100R
TP44
R1652
75R
R1650
180R
10
CN704
TP38
DVD_IR
DVD_IR
TP43
TP5
TP1
R694
4k7
4n7
50V
C857
R1244
100R
4A/24VDC
DVD_WAKEUP
SC_AUD_R_OUT
12V_VCC
VGA_G
SC_B
SC_G
SC_R
R1423
470R
RCA_Y
RCA_PB
RCA_Y
RCA_PR
SC_CVBS_IN
VGA_B
VGA_G
VGA_R
SC_PIN8
SC_G
SC_AUD_L_OUT
100n
10V
C664
R1182
4k7
C832
R1480
75R
50V
220p
1
SC_CVBS_OUT
SC_FB
SC_AUD_L_IN
SC_B
RX/SCL_SC
TX/SDA_SC
SC_R
47p
50V
C860
SC_CVBS_IN
R1249
47R
SC_AUD_R_IN
600R
F200
600R
F205
30062423FS1
NC
S80
3V3_VCC
C973
10u
16V
R1187
22k
75R
R1483
C833
75R
R1481
75R
R1482
C853
50V
D2
C836
R1233
220R
75R
R1479
220p
50V
50V
220p
R1422
33R
R1420
33R
C807
L5
L6
H2
H3
C809 H1
J3
16V
N4
M5
L1
16V C881 R2
47n
16V C805
R3
47n
16V C883 P2
47n
16V C803
P1
47n
16V C886 N1
47n
C804
16V
N2
47n
P3
470R
C859
R1494
1n
50V
SC_FB
50V
C884 N3
47n
M2
16V C885 M3
47n
L2
C796
16V 47n
R1505
C862
470R
1n
C797
16V
K3
K2
C810 J2
47n
16V
C808
16V C882 L3
47n
K1
VGA_VSNC
16V C798
47n
47n
16V
47n
16V
47n
VGA_HSNC
C802
47n
C861
R1421
33R
50V 1n
16V
47n
16V C806
47n
16V
1k
U5
CVBS4
CVBS3
CVBS2
CVBS1
CVBS0
SOGIN2
BIN2P
BIN2M
GIN2P
GIN2M
RIN2P
RIN2M
VSYNC1
HSYNC1
SOGIN1
BIN1P
BIN1M
T2
T3
V2
U3
U2
T1
R620
100R
VCOM U1
CVBSOUT0
R1587
75R
Q146
BC858B
MSD9WB9PT-2
GIN1P
GIN1M
RIN1P
RIN1M
VSYNC0
HSYNC0
SOGIN0
BIN0P
BIN0M
GIN0P
GIN0M
RIN0P
RIN0M
F179
SC_CVBS_OUT
R124
220R
C120
CDA4C16GTH
C835
DVD INTERFACE (for 26" to 32")
SCART_AUD_R_IN
SCART_AUD_L_IN
SC_CVBS_IN
INDIA OPTION
10
11
12
13
14
15
16
17
18
19
20
21
BC848B
Q157
10V
100n
C628
4k7
R1616
50V
27p
100n
16V
SCART VIDEO OUTPUT AMPLIFIER
16V
47n
16V
47n
Q119
BC848B
47n
R1415
33R
C794
62R
16V
47n
SCART_CVBS_OUT
R1412
33R
R1411
33R
62R
R1413
33R
62R
10u
10V
C378
C799
16V C800
1UF
47n
C795
R103
68k
R104
33k
R102
390R
C959 16V
12V_VCC
62R
SCART_CVBS_OUT
75R
R1485
2
75R
R1486
SAV_CVBS_IN
SC SVHS opt
SC_R
JK1
CDA4C16GTH
R1419
33R
R1408
33R
R1409
33R
DVD_CVBS_IN
SC_CVBS_IN
CN711
10
11
12
13
14
15
6
1
8
2
7
3
6
4
5
1
3
TP50
D3
R1976
33R
R1975
33R
R1974
33R
2
1
4
WHT 3
JK3
C663
100n
10V
R1949
100R
R1243
100R
S9
TP49
TP245
S39
S42
SAV_R
F203
600R
SAV_L 600R
TP247 F202
TP250
TP13
TP3
TP2
3n3
50V
C855
3n3
PROJECT NAME :
PERIPHERALs
SCH NAME :
50V
C856
SAV Slim INPUT
SAV_R
SAV_L
SAV_CVBS_IN
VGA_R
VGA_G
VGA_B
VGA_HSNC
VGA_VSNC
5V_VCC
YPbPr Slim INPUT
SAV RCA INPUT

30062840
JK4
6
YEL 5
RED
PC INPUT
5
4
6
3
R1209
2k7
R1206
2k7
2 NUP4004M5
2
1
7
2
D4 27p 50V
D5
R1311
10k
R1310
10k
1
2
1
8
1
C650
D171
2
1
TP242
C5V6
C829
300R
R11
R1265
10k
1
75R
R1516
2
75R
R1515
2
1
2
75R
R1517
C830
50V 27p
2
1
R221
100R
33R
R1530
1
2
C823
4
5
CDA4C16GTH
220p
50V
2
27p 50V
C828
SCART
SAV_R_IN
SAV_L_IN
RCA_PB
RCA_Y
RCA_PR
SAV_CVBS_IN
A3
OF:
14-03-2011_17:05
SHEET:
17mb62-1
R498
47k
1
2
75R
R1619
75R
R1620
75R
R1621
2
AX M
A_MADR2
A_MADR0
A_CASZ
A_RASZ
A_MADR3
A_MADR9
A_MADR7
A_MADR12
A_BADR_BA2
A_MADR1
A_MADR10
A_MADR5
A_MADR11
A_MADR8
A_MADR6
A_MADR4
A_MDATA13
A_MDATA10
A_MDATA8
A_MDATA15
A_MDATA6
A_MDATA1
A_MDATA3
A_MDATA4
A_MDATA5
A_MDATA2
A_MDATA0
A_MDATA7
A_MDATA14
A_MDATA9
A_MDATA12
A_MDATA11
A_MCLK
A_MCLKZ
C12
B11
C20
F18
R1380
1 R1
2 R2
3 R3
4 R4
22R
R1370
1 R1
2 R2
3 R3
4 R4
22R
R1368
1 R1
2 R2
3 R3
4 R4
22R
1
2
3
4
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
AA_MADR2
AA_MADR0
AA_CASZ
AA_RASZ
A_DDR2_DQSB1
A_DDR2_DQS1
R8
R7
R3
L1
E2
A2
B3
A8
B7
B9
B1
D9
D1
D3
D7
C2
C8
F9
F3
E8
F7
F1
H9
H1
H3
H7
R1987
22R
22R
R1986
R1984
22R
22R
R1985
R1982
22R
22R
R1983
R1332
22R
R1313
22R
8
7
6
5
R1603
22R
R1613
R1
R2
R3
R4
22R
A_DDR2_DQSB0
A_DDR2_DQS0
AA_MADR3
AA_MADR9
AA_MADR7
AA_MADR12
A_MCLKZ
A_MCLK
AA_BADR_BA2
AA_MADR1
A_DDR2_DQM0
AA_MADR10
AA_MADR5
A_DDR2_DQM1
1
2
3
4
DDR18V
AA_BADR_BA2
AA_DDR2_DQM1
AA_DDR2_DQSB1
AA_DDR2_DQS1
AA_MDATA15
AA_MDATA14
AA_MDATA13
AA_MDATA12
AA_MDATA11
AA_MDATA10
AA_MDATA9
AA_MDATA8
AA_MDATA7
AA_DDR2_DQM0
AA_DDR2_DQSB0
AA_DDR2_DQS0
AA_MDATA6
AA_MDATA5
AA_MDATA4
AA_MDATA3
AA_MADR11
A_ODT
AA_MADR8
AA_MADR6
AA_MADR4 A_WEZ
A_MCLKE
A_BADR_BA1
A_BADR_BA0
AA_MDATA13
AA_MDATA10
AA_MDATA8
AA_MDATA15
AA_MDATA6
AA_MDATA1
AA_MDATA3
AA_MDATA4
AA_MDATA5
AA_MDATA2
AA_MDATA0
AA_MDATA7
AA_MDATA14
AA_MDATA9
AA_MDATA12
AA_MDATA11
MVREF
A_WEZ
B20
A_RASZ
B10
A_CASZ
A10
C21 A_BADR_BA0
B21 A_BADR_BA1
D19 A_BADR_BA2
A_ODT
C11
A_MCLKE
A_DDR2_DQM0
A_DDR2_DQM1
B16
C17
A16 A_DDR2_DQS0
C16 A_DDR2_DQSB0
A15 A_DDR2_DQS1
B15 A_DDR2_DQSB1
A_MDATA0
A_MDATA1
A_MDATA2
A_MDATA3
A_MDATA4
A_MDATA5
A_MDATA6
A_MDATA7
A_MDATA8
A_MDATA9
A_MDATA10
A_MDATA11
A_MDATA12
A_MDATA13
A_MDATA14
A_MDATA15
C13
A19
A12
B19
A20
B12
C19
A13
B14
C18
C14
A18
B18
B13
B17
C15
R1367
R1
R2
R3
R4
22R
R1369
1 R1
2 R2
3 R3
4 R4
22R
R1610
1 R1
2 R2
3 R3
4 R4
22R
R1366
1 R1
2 R2
3 R3
4 R4
22R
R1609
1 R1
2 R2
3 R3
4 R4
22R
MVREF
A_WEZ
A_RASZ
A_CASZ
A_BADR[0]
A_BADR[1]
A_BADR[2]
A_ODT
A_MCLK
A_MCLKZ
A_MCLKE
A_DQM[0]
A_DQM[1]
A_DQS[0]
A_DQSB[0]
A_DQS[1]
A_DQSB[1]
A_MDATA[0]
A_MDATA[1]
A_MDATA[2]
A_MDATA[3]
A_MDATA[4]
A_MDATA[5]
A_MDATA[6]
A_MDATA[7]
A_MDATA[8]
A_MDATA[9]
A_MDATA[10]
A_MDATA[11]
A_MDATA[12]
A_MDATA[13]
A_MDATA[14]
A_MDATA[15]
AA_MDATA2
R1
VDD5
J1
VDDL
1V8_VCC
DDR18V
AA_DDR2_DQSB0
AA_DDR2_DQS0
AA_DDR2_DQSB1
AA_DDR2_DQS1
AA_MCLKZ
AA_MCLK
AA_DDR2_DQM0
AA_DDR2_DQM1
AA_WEZ
AA_MCLKE
AA_BADR_BA1
AA_BADR_BA0
AA_ODT
C687
220n
10V
1k
R1364
NC6
NC5
NC4
NC3
NC2
NC1
UDM
UDQS_P
UDQS
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
LDM
LQDS_P
LQDS
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
AVDD_DDR
60R
F181
C718
220n
10V
C683
220n
10V
C709
100n
10V
C714
220n
10V
1k
R1365
C712
100n
10V
C715
220n
10V
MVREF
C710
100n
10V
C716
220n
10V
BA1
BA0
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
P9
N1
J3
E3
A3
K9
DDR18V
5 R4
6 R3
7 R2
8 R1
33R
R1395
P_A2
R4
P_REG_N 5 R3
6
P_A3
R2
P_RESET 7 R1
8
33R
R1392
P_A14
5 R4
P_A10
6 R3
P_A9
7 R2
P_A5
8 R1
33R
R1394
P_A7
5 R4
P_A8
6 R3
P_A11
7 R2
P_A12
8 R1
33R
R1396
P_A1
P_D3
P_D4
P_A4
P_D5
P_D6
P_D7
P_A6
C1214
220n
10V P_D1
P_D0
P_D2
P_A0
AA_MCLKZ
AA_MCLK
AA_MCLKE
AA_WEZ
AA_CASZ
AA_RASZ
D205
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
C657
100n
10V
PCM_A7
PCM_A8
PCM_A11
PCM_A12
PCM_A14
PCM_A10
PCM_A9
PCM_A5
PCM_A2
PCM_REG_N
PCM_A3
PCM_RST
1
2
3
4
NAND_WPz
17
NAND_ALE
F_RBZ
18k
R1606
R19
P19
N21
N19
V20
U20
T20
T19
P17
N18
U17
V16
R20
R17
T16
V19
P_A0
P_A1
P_A2
P_A3
P_A4
P_A5
P_A6
P_A7
P_A8
P_A9
P_A10
P_A11
P_A12
P_A13
P_A14
P_RESET
18k R1607
33R
R1942
PF_ALE
PF_AD15
PF_CE0Z
PF_CE1Z
PF_OEZ
PF_WEZ
U10
T9
V11
U11
U9
T10
V9
G21
G20
G19
P_IRQA_N W21
P_OE_N
U16
P_IORD_N V17
P_CE_N
T17
V21
P_WE_N
PCM_CD2_N T14
P_WAIT_N M21
P_IOWR_N P16
N20
P_REG_N
K21
L19
M19
T12
U13
V14
V12
V18
P_D0
P_D1
P_D2
P_D3
P_D4
P_D5
P_D6
P_D7
NAND_WPz
U162
NC15
NC14
NC13
NC12
NC11
WP
AL
CL
NC10
NC9
VSS1
PF_ALE/GPIO135
PF_AD[15]/GPIO130
PF_CE0Z/GPIO131
PF_CE1Z/GPIO132
PF_OEZ/GPIO133
PF_WEZ/GPIO134
F_RBZ/GPIO136
GPIO125
GPIO128
GPIO127
25
26
27
28
29
30
31
32
33
34
35
36
3V3_VCC
GPIO66
GPIO67
GPIO68
GPIO69
IF_AGC
RF_AGC
SIFP
SIFM
VIFP
VIFM
IP
IM
PCM_A0
PCM_A1
PCM_A2
PCM_A3
3V3_VCC
AA4
Y4
W6
Y5
W5
W4
Y3
AA3
AA2
Y2
W1
Y1
K20
L20
M20
T13
U14
U12
T11
U18
U19
P20
K19
1k
100R
R5
R6
100R
4k7
R10 0R
5V_VCC
F8
Q181
BC848B
C653
100n
10V
TS0_D4
TS0_D5
TS0_D6
TS0_D7
TS0_D2
TS0_D1
TS0_D0
TS0_D3
4
3
2
1
5
6
7
8
4
3
2
1
4
3
2
1
VCC_PCMCIA
C970
22u
6V3
TSMICLK
TS_MDI4
TS_MDI5
TS_MDI6
TS_MDI7
TS_MDI0
TS_MDI1
TS_MDI2
TS_MDI3
A3
14-03-2011_17:06
SHEET:
OF:
TSMOCLK
TSMOSTART
TSMOVALID
TS_MDO4
TS_MDO5
TS_MDO6
TS_MDO7
TS_MDO2
TS_MDO1
TS_MDO0
TS_MDO3
TSMISYNC
17mb62-1
8
3V3_VCC
AX M
PCM_IRQA_N
TSMIVALID
BACKLIGHT_ON/OFF
TS0_CLK
4 R4
3 R3
2 R2
1 R1
33R
R1384
5 R4
6 R3
7 R2
8 R1
33R
R1390
R1402
33R
R1401
33R
R1424
33R
5
6
7
8
R4
R3
R2
R1
33R
R1383
TS1_D4
R4
TS1_D5 5 R3
TS1_D6 6 R2
TS1_D7 7 R1
8
33R
R1382
R1512
TS1_CLK
33R
R1514
TS1_VALID
33R
R1513
TS1_SYNC
33R
TS1_D0
TS1_D1
TS1_D2
TS1_D3
TS0_SYNC
R344
1k2
NC
VCC_PCMCIA
12p
50V
C966
TSMICLK
R1172
4k7
R1425
33R
TS IN& OUT
C654
100n
10V
TS0_VALID
Q208
BC848B
4k7
R1177
PCM_A12
PCM_A7
PCM_A6
PCM_A5
PCM_A4
PCM_A3
PCM_A2
PCM_A1
PCM_A0
PCM_D0
PCM_D1
PCM_D2
TSMIVALID
VCC_PCMCIA
PCM_D3
PCM_D4
PCM_D5
PCM_D6
PCM_D7
PCM_CE_N
PCM_A10
PCM_OE_N
PCM_A11
PCM_A9
PCM_A8
PCM_A13
PCM_A14
PCM_WE_N
CI INTERFACE
PROJECT NAME :
R1950
10k
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
RAM&NAND&CI
IF_AGC_MST
S81
NC
SCH NAME :
DIGITAL_IF_N
3V3_TUNER
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
CN141
DIGITAL_IF_P
R1953
4k7
R1951
4k7
R1661
4k7
PANEL_VCC_ON/OFF
TUN_SCL_MST
TUN_SDA_MST
C905
100n
330R 10V
4k7 9k1
R1971
10V
100n
C906
50V 30022165 KULLANILDI
TS0_D0
TS0_D1
TS0_D2
TS0_D3
TS0_D4
TS0_D5
TS0_D6
TS0_D7
TS0_CLK
TS0_VALID
C968
TS0_SYNC
12p
PCM_RST
R1642
10k
12V_VCC
CI_POWER_CTRL
3V3_VCC
C969
12p
50V NC
50V
R1171
4k7
R1427
33R
4p7
TS_MDI4
TS_MDI5
TS_MDI6
TS_MDI7
VCC_PCMCIA
PCM_IORD_N
PCM_IOWR_N
TSMISYNC
TS_MDI0
TS_MDI1
TS_MDI2
TS_MDI3
TS_MDO3
TS_MDO4
TS_MDO5
TS_MDO6
TS_MDO7
R1632
10k
C967
R47
4k7
R48
4k7
PCM_REG_N
TSMOVALID
TSMOSTART
TS_MDO0
TS_MDO1
TS_MDO2
PCM_CD2_N
TSMOCLK
R50
4k7
4k7
R49
PCM_CD1_N
3V3_VCC
PCM_WAIT_N
TS1_D0
P18
R18
TS1_D1
T18
TS1_D2
TS1_D3
W19
TS1_D4
Y21
TS1_D5
Y19
R21
TS1_D6
T21
TS1_D7
TS1_CLK
Y20
W20 TS1_VALID
R16 TS1_SYNC
R1
8
1
33R
R1389
7 R2
6 R3
PCM_A4
PCM_A5
PCM_A6
PCM_A7
FLH_3.3V
3V3_VCC
FLH_3.3V
R1
1
33R
R1398
5 R4
7 R2
6 R3
5 R4
TS0DATA[0]
TS0DATA[1]
TS0DATA[2]
TS0DATA[3]
TS0DATA[4]
TS0DATA[5]
TS0DATA[6]
TS0DATA[7]
TS0CLK
TS0VALID
TS0SYNC
U5
MSD9WB9PT-2
PCM_IRQ/CI_INT
PCMOEN
PCMIOR/CI_RD
PCMCEN/CI_CS
PCMWEN
CI_CD
PCMWAIT/CI_WACK
PCMIOW/CI_WR
PCMREG/CI_CLK
PCMADR[0]/CI_A[0]
PCMADR[1]/CI_A[1]
PCMADR[2]/CI_A[2]
PCMADR[3]/CI_A[3]
PCMADR[4]/CI_A[4]
PCMADR[5]/CI_A[5]
PCMADR[6]/CI_A[6]
PCMADR[7]/CI_A[7]
PCMADR[8]/CI_A[8]
PCMADR[9]/CI_A[9]
PCMADR[10]/CI_A[10]
PCMADR[11]/CI_A[11]
PCMADR[12]/CI_A[12]
PCMADR[13]/CI_A[13]
PCMADR[14]/CI_A[14]
CI_RST
NC16
NC17
NC18
NC19
I/O0
I/O1
I/O2
I/O3
NC20
NC21
NC22
VSS2
37
38
39
40
41
42
43
44
45
46
47
48
TS1DATA[0]
TS1DATA[1]
TS1DATA[2]
TS1DATA[3]
TS1DATA[4]
TS1DATA[5]
TS1DATA[6]
TS1DATA[7]
TS1CLK
TS1VALID
TS1SYNC
VDD2
NC23
NC24
NC25
I/O4
I/O5
I/O6
I/O7
NC26
NC27
NC28
NC29
NAND512-A
VDD1
NC8
NC7
RB
NC6
NC5
NC4
NC3
NC2
NC1
PCMDATA[0]/CI_DATA[0]
24
23
22
21
20
19
18
16
NAND_CLE
15
14
13
12
11
10
NAND_CEz
FLH_3.3V
NAND FLASH
R33
33R
R34
PF_WEZ
33R
R1495
3k9
FLH_3.3V
NAND_WPz
NAND_ALE
NAND_CLE
NAND_CEz
PF_OEZ
F_RBZ
PCM_WAIT_N
PCM_CE_N
PCM_OE_N
PCM_IRQA_N
3V3_VCC
FLH_3.3V
FLH_3.3V
C656
100n
10V
PCM_IOWR_N
PCM_IORD_N
PCM_A13
PCM_WE_N
HDMI1_5V
PCM_D5
PCM_D6
PCM_D7
PCM_A6
PCM_D1
PCM_D0
PCM_D2
PCM_A0
4
3
2
1
4
3
2
1
PCM_A1
PCM_D3
PCM_D4 OVER_CUR_DETECT
PCM_A4
HDMI0_5V
5 R4
6 R3
7 R2
8 R1
33R
R1397
R1393
33R
5 R4
6 R3
7 R2
8 R1
R1388
33R
PF_AD15 8 R1
PF_ALE 7 R2
PF_CE1Z 6 R3
PF_CE0Z 5 R4
C868
22u
6V3
R4
R3
R2
8 R1
33R
R1385
5 R4
6 R3
7 R2
8 R1
33R
R1399
P_IOWR_N
P_IORD_N5
6
P_A13
P_WE_N 7
C5V6
P_WAIT_N
P_CE_N
P_OE_N
P_IRQA_N
AA_BADR_BA1
AA_BADR_BA0
AA_MADR12
AA_MADR11
60R
F187
AA_MADR10
AA_MADR9
AA_MADR8
AA_MADR7
AA_MADR6
AA_MADR5
AA_MADR4
AA_MADR3
AA_MADR2
AA_MADR1
AA_MADR0
AA_ODT
K8
J8
K2
L8
K3
L7
K7
L3
L2
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
DDR18V
3V3_VCC
C713
220n
10V
VSS5
VSS4
VSS3
VSS2
VSS1
ODT
CK_P
CK
CKE
CS_P
WE_P
CAS_P
RAS_P
C782
22u
6V3
C711
220n
10V
VREF
J2
G2
VSSDL
J7
G8
VSSQ10
H8
AA_MDATA1
VSSQ9
H2
AA_MDATA0
VSSQ8
F8
VSSQ7
F2
1 A_MADR[0]
A_MADR[1]
A_MADR[2]
A_MADR[3]
A_MADR[4]
A_MADR[5]
A_MADR[6]
A_MADR[7]
A_MADR[8]
A_MADR[9]
A_MADR[10]
A_MADR[11]
A_MADR[12]
VSSQ6
E7
C1
VDDQ2
VSSQ5
D8
A9
VDDQ1
VSSQ4
D2
A_MADR0
A_MADR1
A_MADR2
A_MADR3
A_MADR4
A_MADR5
A_MADR6
A_MADR7
A_MADR8
A_MADR9
A_MADR10
A_MADR11
A_MADR12
E1
VSSQ3
B8
R1356
1k
R1355
1k
M9
VDD4
J9
VDD3
VSSQ2
B2
VDD2
A1
VDD1
G9
VDDQ10
128 MEGABYTE
G7
VDDQ9
G3
VDDQ8
HY5PS121621C
U155
G1
VDDQ7
E9
VDDQ6
C9
VDDQ5
C7
VDDQ4
C3
VDDQ3
VSSQ1
C10
D21
A9
E20
B9
E19
C9
F20
B8
F19
D20
C8
F21
R1660
4k7
1
A7
R1496
4k7
33k
R1605
33k
R1604
100n
16V
10V
100n
C1220
U5
MSD9WB9PT-2
C913
1
180R
R1977
R12
4k7
2
1
4k7
R8
4k7
R9
4k7
R1618
4k7
R1663
Q209
BSH103
3V3_VCC
R1662
1k2
100u
16V
C1171
10u
10V
4u7
L120
C1170
10u
10V
4u7
L119
R222
100R
R223
100R
SC_AUD_L_IN
R1903
10k
R1904
10k
SAV_R_IN
SAV_L_IN
R1901
10k
SC_AUD_R_IN
DSP_MAIN_R
R1897
100R
DSP_SCART_R
DSP_SCART_L
DSP_HP_R
DSP_HP_L
DSP_MAIN_L
R1900
100R
SAV_AUDIO_IN_L
SAV_AUDIO_IN_R
SCART_AUDIO_IN_L
SCART_AUDIO_IN_R
AUDIO INPUTs
C1169
100u
16V
C1168
R1902
10k
SC_R_OUT
SC_L_OUT
HP_R
HP_L
MAIN_R
R1898
220k
R1921
12k
R1920
12k
MAIN_L
C1187
C1188
R1918
12k
R1899
220k
AUDIO OUTPUTs
C1185
C1186
R1924
22k
R1925
22k
R1858
220R
R1859
220R
4n7
50V
C1189
AMP_MUTE
PROTECT
RESET_TUNER
DVD_IR_ON/OFF
ANT_CTRL
STBY_INFO
C1183
R1919
12k
NC
1u
C1201
6V3
C1200
4u7
10V
DSP_MAIN_L
DSP_MAIN_R
DSP_SCART_L
DSP_SCART_R
DSP_HP_L
DSP_HP_R
C1197
C1198 10u 10V
10u 10V
10u 10V
10u 10V C1196
C1195
RESET_S2
MODE SELECTION
MODE SELECTION
MODE SELECTION
10V
16V
100n C1174 10u C1199
SCART_AUDIO_IN_L
SCART_AUDIO_IN_R
SAV_AUDIO_IN_L
SAV_AUDIO_IN_R
JK10
SC_R_OUT
2
3
1
1u
6V3
C1203
SC_AUD_R_OUT
3V3_VCC
4n7
50V
C1190
2
1
3V3_VCC
R1601
4k7
1
3V3_STBY
P4
E4
C4
D3
D4
D6
F4
F5
U5
U6
U4
N6
R6
W9
AA9
Y7
AA7
N5
L4
R5
T6
P6
P5
T4
T5
RXA0N
RXA0P
RXA1N
RXA1P
RXA2N
RXA2P
RXACKN
RXACKP
DDCDA_CK
DDCDA_DA
HOTPLUGA
SPDIFO
I2S_IN_BCK
I2S_IN_SD
I2S_IN_WS
I2S_OUT_MCK
I2S_OUT_SD
I2S_OUT_WS
I2S_OUT_BCK
CEC
RXB0N
RXB0P
RXB1N
RXB1P
U5
RXB2N
MSD9WB9PT-2 RXB2P
AUVRP
RXBCKN
3
AUVAG
RXBCKP
AUVRM
DDCDB_CK
DDCDB_DA
HOTPLUGB
AUOUTL0
AUOUTR0
AUOUTL1
AUOUTR1
EAR_OUTL
EAR_OUTR
AUL0
AUR0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
H4
B2
B1
C2
C1
D2
D1
A2
C3
J5
K4
K5
E2
F3
F2
G3
G2
G1
E3
E1
H5
H6
J6
R1917
10R
1
CEC
HDMI_0_RX0N
HDMI_0_RX0P
HDMI_0_RX1N
HDMI_0_RX1P
HDMI_0_RX2N
HDMI_0_RX2P
HDMI_0_CLKN
HDMI_0_CLKP
HDMI_0_SCL
HDMI_0_SDA
HDMI_1_RX0N
HDMI_1_RX0P
HDMI_1_RX1N
HDMI_1_RX1P
HDMI_1_RX2N
HDMI_1_RX2P
HDMI_1_CLKN
HDMI_1_CLKP
HDMI_1_SCL
HDMI_1_SDA
HDMI1_5V
2
NC
NC
47p
50V
R1927
82k
C1206
100n
10V
C1176
C1179
50V
220p
R1929
20k
10u
10V
C1181
V+
VDD 8
U178
IN2-
IN2+
3 IN1+
4 VSS
OUT2 7
TL062
2 IN1-
1 OUT1
R1914
33k
100n
16V
C1177
R1916
220k
V+
600R
F301
S92
Q202
BC848B
1
100n
10V
C1175
F5
600R
NC
R1907
100R
47p
50V
R1926
82k
2
R1913
33k
C1205
12V_VCC
COAX SPDIF OUT
V+
C1182
10u
10V
R1928
20k
Q203
BC848B
1u
6V3
C1202
HDMI0_HPD
Q204
BC848B
HDMI1_HPD
SC_L_OUT
SC_AUD_L_OUT
R1910
1k
R1911
1k
R1909
1k
SPDIF_OUT
5V_VCC
10u
10V
C1180
12V_VCC
R1912
1k
PRE-AMP for SCART AUDIO
SPDIF_OUT
3V3_STBY
C1184
100p
50V
100p
50V
470p
50V
470p
50V
470p
50V
470p
50V
10k
R1838
3V3_STBY
3V3_STBY
C15
10k
R1839
10k
R1840
4k7
R17
4k7
R1892
10k
R1836
4k7
R1656
4k7
R1614
1
220k
R1915
2
R1889
4k7
50V
220p
D199
1
R1908
1k
1
100n
16V
1
2
1
2
R1890
4k7
1
TP251
C5V6
2
1
4k7
R1896
HDMI0_5V
C1178
HDMI1_5V
HDMI1_HPD
HDMI_1_SCL
HDMI_1_SDA
HDMI_1_CLKN
CEC
HDMI_1_RX0N
HDMI_1_CLKP
HDMI_1_RX1N
HDMI_1_RX0P
HDMI_1_RX2N
HDMI_1_RX1P
HDMI_1_RX2P
R1874
10R
10R
R1885
10R
R1879
10R
R1867
10R
R1868
R1877
10R
10R
R1881
R1873
10R
R1883
10R
R1882
10R
R1871
10R
R1870
10R
10R
R1878
R1888
10R
R1880
10R
R1886
10R
R1887
10R
R1869
10R
PROJECT NAME :
PL4
PL3
PL2
PL1
21
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CN707
21
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CN708
A3
OF:
14-03-2011_17:06
SHEET:
17mb62-1
AUDIO_IO&HDMI_INPUTs
10R
R1875
SCH NAME :
10R
R1876
10R
R1872
10R
R1884
HDMI1
HDMI0_5V
HDMI0_HPD
HDMI_0_SCL
HDMI_0_SDA
HDMI_0_CLKN
CEC
HDMI_0_RX0N
HDMI_0_CLKP
HDMI_0_RX1N
HDMI_0_RX0P
HDMI_0_RX2N
HDMI_0_RX1P
HDMI_0_RX2P
HDMI2
4k7
R1895
1
2
1
47k
R1864
47k
R1865
1
2
1
47k
R1863
47k
R1862
1
OPTIONAL
COMMON
AX M
VDD_AUDIO
4 R4 5
R1741
3 R3
2 R2
VDD_AUDIO
C665
100n
10V
U164
PT2333
S85
MAIN_R
C1073
1u
25V
C1074
1u
25V
R1687
10k
1u
50V
C1123
6V3
1u
C1078
30050557 KULLANILDI
6V3
C1076
30050557 KULLANILDI
1u
R1696
10k
ANALOG VCC
CONNECT TO DSP_M_L GND
C1075 1u
6V3
30050557 KULLANILDI 6V3
1u
30050557 KULLANILDI
C1077
MAIN_L
C666
10V
100n
SDB
R_AUDIO_P_OUT
L_AUDIO_P_OUT
14
13
12
11
10
RINP
RINN
PLIMIT
GVDD
AGND
PBTL
NC
U168
PVCCR2
PVCCR1
BSPR
OUTPR
PGND2
OUTNR
BSNR
BSNL
OUTNL
PGND1
OUTPL
BSPL
PVCCL1
PVCCL2
TPA3110D2
AVCC
GAIN1
GAIN0
LINN
LINP
FAULT
SD
C1045
220n
25V
15
60R
F281
17 C1043 220n
25V
16
18
19
C1046
25V
220n
21 C1044
25V
220n
20
22
23
24
25
26
27
28
60R
F282
5V_VCC
24V_VCC
12V_VCC
VDD_AUDIO
R_AUDIO_P_OUT
R_AUDIO_N_OUT
L_AUDIO_N_OUT
VDD_AUDIO
L_AUDIO_P_OUT
AUDIO AMP for 26" to 32"
VDD_AUDIO
CONNECT TO DSP_M_R GND
100k
R1715
100k
R1714
NC
30022132 KULLANILDI
NC100k
R1717
10k
R1716 100R
1
8
R1
R613
4k7
R_AUDIO_N_OUT
220n
10V
C602
BC848B
Q133
VDD_AUDIO
VDD_AUDIO
MAIN_R
VDD_AUDIO
R817
100R
L_AUDIO_N_OUT
220n
10V
R623
4k7
INP
A1
C612
PT2333
GNDA
A2
Q160
BC848B
U163
OUTN
A3
MAIN_L
INP
A1
GNDA
A2
OUTN
A3
VDDA
B1
VDDA
B1
VDD1
B2
VDD_AUDIO
VDD1
B2
GNDB
B3
AMP_EN
R818
100R
GNDB
B3
C617
C2
AMP_EN
INN
C1
R624
4k7
INN
C1
R614
4k7
10V
220n
C3
OUTP
C3
220n
10V
SDB
C2
AMP_EN
C608
OUTP
AUDIO AMP for 16" to 24"
C1122
60R
F297
60R
F298
60R
F299
60R
F296
60R
F294
60R
F285 NC
60R
F283
10V
220u
C615
10V
220u
C870
W/2.5W opt.
SK24
35V
100u
C1209
3
4
5
L_AUDIO_P
L_AUDIO_N
R_AUDIO_P
R_AUDIO_N
L_AUDIO_N
R_AUDIO_N
CN710
VDD_AUDIO
R_AUDIO_P
W/6W opt.
L_AUDIO_P
35V
100u
C1208
D192 30049510 KULLANILDI
30001734 KULLANILDI
AMP_MUTE
2N7002
Q210
HP_R
R1684
10k
AMP_EN
2N7002
Q192
HP_L
TP229
R1960
680R
R1704
680R
NC
NC
NC
BC848B
Q185
TP230
C729
10n
16V
HP_DETECT
C1172
10n
16V
C1058
100n
16V
BC848B
Q186
5V_VCC
12V_VCC
R1702
10k
Q195
BC858B
3
3V3_VCC
JK6
PROJECT NAME :
AUDIO_AMP&HP_AMP
SCH NAME :
C1032
16V
10u
S86
S87 NC
3V6 lik zener kullanilmali
4k7
R1149
TP52
TP51
POP NOISE CIRCUIT
HP_MUTE
A3
OF:
14-03-2011_17:07
SHEET:
17mb62-1
SLIM HEADPHONE OUTPUT
2
1
R1855
10k
1
10u
16V
D203
1N4148
C1121
10u
16V
2
2
R1980
100R
1
R1
8
R2
7
C1219
R1981
100R
1
R1
8
7 R2
C1218
3
6 R3
10n
50V
3
R3
VDD_AUDIO
2
1
5 R4
C943
4
C944
R4
5
6
10n
50V
1n
50V
C945
C942
1n
50V
1n
50V
1n
50V
3V3_STBY
R1712
15k
R616
10k
2
3k9
R1711
1
C5V6
R1854
10k
3V3_VCC
R1309
10k
D191
2
R1699
47k
2
R1718
100k
1
R1941
1k
R1701
100k
AX M
SCL_SYS
SDA_SYS
3V3_VCC
R1
4k7
100R
R1666
S38
LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
LVACKP
LVACKM
LVA3P
LVA3M
LVA4P
LVA4M
GPIO12
SCZ
SCK
SDI
SDO
GPIO14
USB0_DP
USB0_DM
USB1_DP
USB1_DM
GND0
GND1
HWRESET
XIN
XOUT
IRIN
DDCR_CK
DDCR_DA
R1668
1k
C1015
100n
10V
4k7
R1198
5V_VCC
5
VOUT
U8
2 GND
FPF2124
3 ON
4
ISET
C610
10u
10V
1 VIN
CN128 1
R46
560R
IO3
U145
IO2
GND 2
AZ099-04S
VDD
IO4
IO1
RESET
R845
10R
B7
E6
F6
Y9
W7
AA10
Y10
W14
Y15
W13
Y14
AA13
Y13
AA12
W12
W11
Y12
W10
Y11
AA19
AA20
AA18
W18
W17
Y18
W16
Y17
AA16
Y16
AA15
W15
R844
10R
GPIO10
GPIO11
GPIO7
4
GPIO137
SPDIFI/GPIO139
GPIO141
GPIO143
U5
MSD9WB9PT-2
DDCA_CK/UART0_RX
DDCA_DA/UART0_TX
SAR0
SAR1
SAR2
RESET
B3
A3
W8
Y8
J9
H9
E5
Y6
AA6
A4
H19
H20
K6
M6
B6
C7
B5
C6
A6
A7
B4
C5
V3
LVB0P
LVB0M
LVB1P
LVB1M
LVB2P
LVB2M
LVBCKP
LVBCKM
LVB3P
LVB3M
LVB4P
LVB4M
PWM0
PWM1
PWM2
USB INTERFACE
3V3_STBY
R1543
100R
RX/SCL_SC
TX/SDA_SC
SPI_CSN_1
SPI_SCK
SPI_SDI_1
SPI_SDO
FLASH_WPN
NC
USB_DP
USB_DM
IR_IN
RESET
3V3_VCC
DVD_WAKEUP
3V3_STBY
KEYBOARD
DVD_SENSE
SC_PIN8
C952
33p
50V
C951
33p
50V
X2
R1524
4k7
R1527
4k7
R1533
1M
24MHz
R1528
4k7
D189
R1959
4k7
100R
R1954
R1952
4k7
USB_DP
1
2
R1967
100R
100RR1968
100R
R1969
3V3_STBY
R1567
10k
STBY_ON/OFF_NOT
LED1
LED2
3V3_VCC
3V3_STBY
HP_MUTE
DVD_SPDIF
HP_DETECT
CI_POWER_CTRL
S76
TOUCH_PAD_OPTION
MECH_SWITCH
SPI_CSN_1
SPI_SDO
FLASH_WPN
USB_DM
TX_A_0_P
TX_A_0_N
TX_A_1_P
TX_A_1_N
TX_A_2_P
TX_A_2_N
TX_A_CLK_P
TX_A_CLK_N
TX_A_3_P
TX_A_3_N
TX_A_4_P
TX_A_4_N
TX_B_0_P
TX_B_0_N
TX_B_1_P
TX_B_1_N
TX_B_2_P
TX_B_2_N
TX_B_CLK_P
TX_B_CLK_N
TX_B_3_P
TX_B_3_N
TX_B_4_P
TX_B_4_N
C1215
3V3_STBY
10n
16V
C1016
1N4148
R1667
10k
C1031
100n
16V
22u
6V3
R1617
4k7
R1672
4k7
R1671
4k7
600R
F249
BC858B
Q174
1
2
3
4
VCC 8
CS#
SO
HOLD# 7
WP#
SCLK 6
GND
SI 5
U158
MX25L512
R1936
47R
2
SCL_SYS
SDA_SYS
TX_A_CLK_P
TX_A_CLK_N
TX_A_2_P
TX_A_2_N
TX_A_1_P
TX_A_1_N
TX_A_0_P
TX_A_0_N
S57 & S10&S4= 0R
15.6 LVDS OPTION

PIN12,16,18,20 JUMPER TAKILACAK
3V3_STBY
27p
50V
C949
TP57
Q173
600R
5V_STBY
BC858B
IR_IN
5V_STBY
D165
SW5
3V3_STBY
R1568
10k
SPI_SCK
SPI_SDI_1
C658 1N5819
100n
10V
R1248
R1970 100R
100R
1
3 BUTTONS KEYBOARD OPTION
E2
Q171
BC848B
TP56
F259
19
17
15
13
11
E1
ONBOARD KEYBOARD
PANEL VCC = 5V/12V
SERIAL FLASH
TP55
Q170
BC848B
TP54
TP53
R1937
47R
600R
20
18
16
14
12
10
CN3
15.6" LVDS OPTION

C630
100n
10V
KEYBOARD
PIN 6 LVDS KABLOSUNDA n.C YAPILMALI
F248
LED SOCKET
EXT KEYPAD
R793
47R
KEYBOARD_ONBOARD
3
CN703
3V3_STBY
R1563
10k
J21
J20
J19
LED2
R1940
150R
R23
10k
R1615
4k7
TP10
1
C
G3
3V3_STBY
USB
2
1
5
2
3
G4
R45
2k
T
G2
D204
3
2
1
220R
R1571
220R
R1569
1
2
1
1
S26
DIMMING
BACKLIGHT_ON/OFF
PIN_04
12V_VCC
PIN_05
12V_VCC
PIN_02
KEYBOARD_ONBOARD
OPTION1
S27
S28
S31
PIN_03
MEGA_DCR_OUT
PIN_01
PANEL_VCC
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
CN136
S4
S10
TP6
TX_A_4_P
TP7
TX_A_4_N
S98
OPTION2
2
MEGA_DCR_OUT
OPTION1
S57
PIN_02
PIN_01
PIN_05
PIN_03
S15
S33
S32
PANEL_VCC
TX_A_3_P
TX_A_3_N
TX_A_CLK_P
TX_A_CLK_N
TX_A_2_P
TX_A_2_N
TX_A_1_P
TX_A_1_N
TX_A_0_P
TX_A_0_N
TX_B_3_P
TX_B_3_N
TX_B_CLK_P
TX_B_CLK_N
TX_B_2_P
TX_B_2_N
TX_B_1_P
TX_B_1_N
TX_B_0_P
TX_B_0_N
PROJECT NAME :
CN139
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
OF:
A3
PANEL_VCC = 5V/12V
14-03-2011_17:07
SHEET:
17mb62-1
GPIOs&USB&LVDS_OUT
SCH NAME :
PIN_04
PANEL_VCC
MEGA_DCR_OUT
3V3_VCC
3V3_VCC
PANEL_VCC
TP9
TX_B_4_N
TP8
TX_B_4_P
10k
R1266
NC 10k
R1301
NC
SINGLE LVDS FFC OPTIONS
MEGA_DCR_IN
TX_A_CLK_P
TP33
TX_A_3_N
TP35
TX_A_3_P
TP32
TP25
TP28
TP26
TP24
TP22
TP20
TP18
TP16
TP17
TP19
TP23
TP29
TX_A_2_N
TP31
TX_A_2_P
TP34
TX_A_CLK_N
TP27
TX_A_1_P
TP30
TX_A_1_N
TX_A_0_P
TX_A_0_N
TX_B_3_P
TX_B_3_N
TX_B_CLK_P
TX_B_CLK_N
TX_B_2_P
TX_B_2_N
TX_B_1_P
TX_B_1_N
TX_B_0_P
TX_B_0_N
TWISTED PAIR LVDS OPTION

1
PCM_CD1_N
R7
470R
2
G1
LED1
CN138
MEGA_DCR_OUT
2
220R
R1572
R1562
10k
TP14
1
2
1
B5V1
PANEL_VCC
5
MEGA_DCR_IN
2
1
2
S99
PANEL_VCC
1
10k
R1280
2
2
1
S56
S3
OPTION2
1
CN137
S14
NC
2
S13
1
9
1
S19
10
2
2
1
11
3
PANEL_VCC
5
S58
1
2
12
OPTION1
TX_A_3_P
13
TX_A_3_N
14
6
3V3_VCC
BACKLIGHT_DIM
3V3_STBY
15
7
TX_A_CLK_P
16
8
TX_A_CLK_N
17
9
S30
NC 10k
R1300
4
18
10
TX_A_2_P
19
11
TX_A_2_N
20
12
21
13
TX_A_1_P
22
14
TX_A_1_N
23
15
17
CN709
1
24
16
TX_A_0_P
25
18
20
1
1
R1357
4k7
4k7
R1358
TP15
TP40
TP11
1
26
19
S35
TP21
S6
2
S37
2
S36
1
S34
1
PANEL_VCC
S55
PANEL_VCC
TX_A_0_N
R1295
10k
1
2
21
NC
27
2
1
28
28
10k
R1835
10k
R1833
29
29
R1183
4k7
TP41
30
22
220R
R1570
TP12
1
OPTION3
25
NC
23
NC
OPTION5
R1296
NC
10k
PANEL_VCC
R1297
10k
OPTION4
24
10k
R1274
26
PANEL_VCC
S94
27
19" TO 22" DOUBLE LVDS FFC OPTIONS

PANEL_VCC
30
AX M
C1024
100n
16V
C1029
10u
6V3
C1014
100n
16V
C990 100n
22u
16V
6V3
C1004
C1030
10u
6V3
VDD_3V3
100n
16V
C1001
VDDC_1V2
2V5_VCC
AVDD_3V3
C1070
100n
16V
C1022
100n
16V
AVDD_DDR
C1025
100n
16V
C1005
100n
16V
15
13
11
16
14
12
10
CN706
17
18
PIN_11
PIN_9
PIN_7_8
SOFT_SW
STBY_ON/OFF
11
13
15
17
19
21
23
25
27
10
12
14
16
18
20
22
24
26
28
PIN_7_8
PIN_10
12V_VCC
CN1
5V_VCC
24V_VCC
A/D DIMMING SELECTION

NC
R2
3V3_VCC
4k7
PIN_11
STBY_ON/OFF
W/IPS16
S95
600R
F250
BACKLIGHT_ON/OFF
DIMMING
PIN_9
PIN_7_8
3V3_VCC
BACKLIGHT_ON/OFF
DIMMING
3V3_VCC
26" to 32" POWER SOCKET
12V_VCC
PIN_10
PIN_7_8
5V_VCC
19
20
16" to 24" POWER SOCKET
60R
F270
60R
F272
STBY_INFO
3V3_VCC
1V8_VCC
60R
F271
C997
100n
16V
MECH_SWITCH
PIN_9
PIN_7_8
C1028
10u
6V3
F295
C1007
100n
16V
S23
S1
S24
S7
W/PW26
W/IPS16
W/IPS16
MEGA_DCR_IN
3V3_STBY
C1225
100n
16V
C1224
100n
16V
C1223
100n
16V
AVSS_PGA
PIN_11
S18
NC
12V_VCC
5V_VCC
3V3_VCC
PANEL_VCC_ON/OFF
NC
S16
60R
F290
60R
F288
60R
F289
60R
F302
S82
R1685
10k
220p
50V
C838
R1165
4k7
NC
PIN_10
AVDD2V5_MOD
AVDD2V5_AUD
AVDD2V5_REF
AVDD2V5_ADC
MEGA_DCR_OUT
5V_STBY
5V_VCC
12V_STBY
C1222
100n
16V
C1221
100n
16V
C1008
100n
16V
C1009
100n
16V
W/PW26
BACKLIGHT_DIM
1k
F308
1k
F307
1k
F306
1k
F305
60R 402 ferrite secilecek
60R
1k
W/PW26
W/IPS16
W/IPS16
S21
S22
S8
220p
50V
C840
R1166
4k7
220p
50V
C839
R1158
4k7
3
4
5 R4
Q188
BC848B
6 R3
R1761
100R
1
R1
7 R2
Q193
BC858B
Q190
BC848B
R1725
47R
PANEL SUPPLY SWITCH
Q189
BC848B
R1693
10k
C1042
100n
Q19410V
BC848B
DIMMING CIRCUIT
5V_VCC
12V_VCC
5V_STBY
AVDD_REF25_0
AVDD_REF25_1
AVDD_2V5_PGA
U1
LM1117
AP211H
STBY_ON/OFF_NOT
DIMMING
S29
R1748
4k7
5V_STBY
OUT 2
VOUT
ADJ
IN
NC
PANEL_VCC
C774
10u
10V
R1679
100R
PIN_7_8
PIN_7_8
3V3_STBY
Q191
BC848B
R1677
4k7
3V3_STBY
PW04 LOW POWER Option
AVDD_MOD25_0
AVDD_MOD25_1
R7
R8
AVDD2V5_MOD
F274
AVDD_PGA25
U8
AVDD_2V5_PGA
C1081
10u
6V3
2V5_VCC
AVDD_ALIVE_0
AVDD_ALIVE_1
AVDD_ALIVE_2
E8
F8
G8
6
AVDD_DMPLL
3V3_STBY
C6
22u
16V
VDDC_1V2
C64
12V_VCC
C971
100n
10V
Q178
L2
10u
R1638
10k
Q180
BC858B
C70
470n
25V
BC848B
1
SDA_SYS
SCL_SYS
C13
220n
25V
35V
100u
C65
Q211
V_UP
LX
VCC
VCC_L
SDA
SCL
TTX
RSV_1
RSV_2
R1649
33k
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
VO_TX
EXTM
VO_RX
PDC
DSQIN
D7
1N4001
R1973
100R
1
2
3
7
8
16
17
23
24
25
26
31
32
22
13
21
11
12
R40
20k
R21
10k
OF:
A3
LNB_OUT
12V_STBY
14-03-2011_17:08
SHEET:
17mb62-1
C12
220n
25V
3
U7
VCC
LM809 RST GND
2
1
3V3_STBY
2
12V_VCC
24V_VCC
AX M
ADAPTOR OVER VOLTAGE PROTECTION
3V3_TUNER
5V_VCC
3V3_VCC
10k
R1631
R1727
33k
R1750
22k
PROJECT NAME :
1u
6V3
C974
POWER_1&LNBP
SCH NAME :
C14
220n
25V
U6
LNBH23L
C69
1u
50V
R20
10k
BC848B
1
LNB CIRCUIT
R1636
10k
R1635
10k
3V3_VCC
27
4
19
18
6
9
14
29
30
3V3_STBY
SHORT CCT PROTECTION
STBY_ON/OFF
12V_VCC
AVDD_CVBS33_0
AVDD_CVBS33_1
60R
C5
22u
16V
C7
22u
16V
3V3_VCC
2
AVDD_AU33
E9
F9
C1128
AVDD_EAR33
J8
1V2_VCC
SOFT_SW
1u
25V
33k
R1734
1
R1749
22k
4
3
DVDD_DDR
H14
5
2
R1221
1k
3V3_VCC
2
4k7
R1678
AVDD_126
K14
6
1
AVDD_3V3
VDDC0
VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
H15
H16
H17
J14
J15
J16
J17
1
AVDD_ADC25_0
AVDD_ADC25_1
N7
N8
AVDD2V5_ADC
AVDD_AU25
P7
P8
FDC642P
Q199
TP213
1
AVDD2V5_REF
T8
AVDD2V5_AUD
PGA_VCOM
V8
AVSS_PGA
U5
MSD9WB9PT-2
2
TP202
1
G9
1
PROTECT
H8
35V
100u
2
1
S17
L9
M9
N9
P9
R9
D10
E10
F10
G10
H10
J10
K10
L10
M10
N10
P10
R10
D11
E11
F11
G11
H11
J11
K11
L11
M11
N11
P11
R11
D12
E12
F12
G12
H12
J12
K12
L12
M12
N12
P12
R12
D13
E13
F13
G13
H13
J13
K13
L13
M13
N13
P13
R13
D14
E14
VDDP0
VDDP1
G16
G17
VDD_3V3
AVDD_LPLL
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
4k7
R1676
E15
E16
E17
F16
F17
AVDD_DDR
G15
L14
M14
N14
P14
R14
D15
SK24
10k
R18
1
2
1
2
1
AVDD_DDR_0
AVDD_DDR_1
AVDD_DDR_2
AVDD_DDR_3
AVDD_DDR_4
GND58
GND59
GND60
GND61
GND62
GND63
D8
R19
10k
3V3_VCC
R1639
10k
K15
L15
M15
N15
P15
R15
D16
K16
L16
M16
D17
K17
L17
M17
K18
L18
M18
D185
BAW56
D186
BAW56
D184
BAW56
10
15
28
5
20
15k
R43
BYPASS
K9
W2
W3
V4
V5
V6
GND81
GND82
GND83
GND84
GND85
R42
2k2
4k7
R41
DISEQC_OUT
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
ADDR
BYP
I_SEL
P_GND
A_GND
GND86 D9
GND87 D18
15n C68
50V
D6
F277
1N5819
5V_VCC
CN705
TP239
TP36
60R
NC
R1692
10k
OUT 2
STBY_ON/OFF_NOT
STBY_ON/OFF
GND VOUT
IN
U175
LM1117
SW1
LDO1
12V_STBY
BACKLIGHT_ON/OFF
MOSFET_CONTROL
F303
7A/32VDC
FS2
12V_INV
12V_STBY
S83
S89
NC
C1033
22u
6V3
Q182
BC848B
R1724
47R
100R
R1720
3V3_VCC
MOSFET_CONTROL
2V5_VCC
12V_STBY
60R
C1091
22u
16V
F287 0R
C1092
22u
16V
C1037
100n
16V
C1112
10n
16V
DC/DC1
1
2
3
4
15u
C1102
22u
16V
L118
BS
IN
SW
GND
SS
EN
COMP
FB
U174
MP1583
8
7
6
5
1
5n6
50V
C1130
MOSFET_CONTROL
12V_STBYR1709
3k9
DC/DC2
5V_STBY
C1103
22u
16V
16V
R1972
10k
R1690
10k
C1038
100n
R1698
10k
5V_STBY
SW2
25V
W/ADAPTOR
Q184
BC848B
R1722
47R
2
5V_VCC
SW3
12V_STBY
FS5
C1093
22u
6V3
60R
F291
3V3_STBY
7A/32VDC
4A
1u
6V3
C1107
60R
F286
2
C1094
22u
6V3
MP2012
SW 3
4 PVIN
FB
GND 2
U176
5 VIN
6 EN
R1738
20k
DC/DC3
12V_STBY
12V_VCC
C1089
22u
16V
C1114
10n
16V
C1101
22u
6V3
10u
10UH
L116
R1769
100k
U23
R1770
150k
150K
C1096
22u
6V3
GND
SW
FB
COMP 6
2
3N3
5n6
50V
1
R1689
10k
C1129
2
R1708
5k6
C1097
22u
6V3
3V3_STBY
R3
6k8
12V_STBY
C1098
22u
6V3
1V8_VCC
12V_VCC
60R
F273
C1085
22u
16V
COMMON
10u
15u
L16
SS
EN 7
MP1484
IN
BS
for 3v3 Panel Sup.

L123
NC
C1090
22u
16V
30068939
C1084
22u
16V
C1113
10n
16V
U173
10u
L117
GND
SW
8
EN 7
SS
C1087
22u
6V3
FB
COMP 6
MP1484
IN
BS
30068939
DC/DC4
R1691
10k
C1131
5n6
50V
R1768
1k
MOSFET_CONTROL
12V_VCC
R1710
3k9
R1686
39k
1V2_VCC
C1086
22u
6V3
R1697
10k
3V3_STBY
5V_VCC
R1723
47R
Q183
BC848B
DC
DC
DC
DC-DC2
DC
DC-DC1
SW1
2A
ADJ
3 IN
100R
R25
C1212
22u
6V3
POWER_2
PROJECT NAME :
VOUT
OUT 2
U2
LM1117
DC
LDO
LDO1
DC
DC-DC3
3V3_VCC
5V_VCC
1V2_VCC
AP211H
3V3_VCC
DC
LDO2
SCH NAME :
330R
F300
FS4
SW3
3V3_STBY
7A/32VDC
DC
DC-DC4
SW2
5V_STBY
12V_VCC
POWER BLOCK DIAGRAM
W/ADAPTOR & W/IPS16&17&60&PW25&PW06
INVERTER SOCKET W/ADAPTER
DIMMING
TP39
12V_INV
TP37
CCFL INVERTER SOCKET
JK9
C1049
FDC642P
Q200
TP45
TP46
FDC604P
Q1
R1732
33k
R1733
33k
TP238
1
7A/32VDC
R1978
100R
1
R1
8
2
R2
7
220n
3
R3
6
R1737
33k
2
1
R1729
33k
2
R1728
1k
6V3
C1080
4
R4
5
C1216
C1048
220n
25V
W_ADAPTER
100u
R1735
22k
4
3
FDC642P
Q2
220n
25V
R1721
100R
TP241
1
10n
50V
C1036
100n
10V
2
TP244
1
2
1
R1731
33k
2
R1730
10k
R1979
100R
1
R1
8
5
2
2
R2
7
C1217
FDC604P
Q197
FS3
3
R3
6
4
3
R1736
22k
TP243
FDC604P
Q198
1
SS33
5
2
TP231
1
D197
1
6
1
C1035
100n
10V
6
1
C1079
ADAPTER SOCKET
22u
6V3
C1047
4
R4
5
10n
50V
R24
100R
2
C1034
100n
10V
3V3_TUNER
2V5_VCC
A3
OF:
14-03-2011_17:08
SHEET:
17mb62-1
3V3_TUN
1V8_VCC
LDO
LDO2
AX M

Philips Chassis Ves1.1e La

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Philips Chassis Ves1.1e La

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Colour Television

See table of contents on page 3

Published by MB/SC 1270 Quality

Printed in the Netherlands

EN 3122 785 19391

2012 TP Vision Netherlands B.V.

2. Technical Specifications and Connections

3122 785 19390

Directions for Use

General Block Diagram ................................................................................................................... 6

MB62 Placement of Blocks............................................................................................................... 7

Tuner (TU3) ............................................................................................................................................... 8

General description of the Sony RE216 tuner .................................................................................. 8

Audio amplifier stage with AZAD2102 (U163, U164) ............................................................................. 10

General description ........................................................................................................................ 10

Absolute Ratings ........................................................................................................................... 11

Electrical Characteristics ....................................................................................................... 11

Operating specifications ....................................................................................................... 12

Audio amplifier stage with TPA3113 (U168) .......................................................................................... 13

General Description ........................................................................................................................ 13

Absolute Ratings ............................................................................................................................. 14

Operating Specifications ....................................................................................................... 15

Power management ....................................................................................................................... 19

Microcontroller MSTAR (U5) ............................................................................................................... 21

MSTAR block diagram..................................................................................................................... 25

Reset circuit .................................................................................................................................... 26

USB interface .......................................................................................................................................... 27

DDR2 SDRAM K4T1G164QF (U155) ........................................................................................................ 28

Scaler and LVDS sockets ...................................................................................................................... 30

LVDS sockets block diagram ........................................................................................................... 30

Panel supply switch circuit ............................................................................................................. 30

SPI flash memory - MX25L1005 (U158) .............................................................................................. 31

Absolute maximum ratings ............................................................................................................ 32

NAND Flash memory NAND512XXA2C (U162) ................................................................................ 33

LNBH23L (U6) ..................................................................................................................................... 35

Block diagram ................................................................................................................................. 36

Advanced DVB-S/S2 demodulator M88DS3002 (U3) ....................................................................... 36

Pin Assignment ............................................................................................................................... 38

LM1117 (U175, U180, U181) .............................................................................................................. 39

General description ........................................................................................................................ 39

Absolute maximum ratings............................................................................................................. 39

General description ............................................................................................................................ 40

RTA8283A (U23, U173) ....................................................................................................................... 41

General description ........................................................................................................................ 41

General description ........................................................................................................................ 44

General description ........................................................................................................................ 45

SCART (SC1) .................................................................................................................................... 47

HDMI (CN707, CN708) .................................................................................................................... 47

VGA (CN711) ................................................................................................................................. 48

Customer service mode (CSM) ........................................................................................................... 49

Service menu mode ............................................................................................................................ 49

Main service menu ......................................................................................................................... 49

Video Settings ................................................................................................................................. 50

Audio Settings ................................................................................................................................. 50

Tuning Settings ............................................................................................................................... 52

Source Settings ............................................................................................................................... 52

USB operations ............................................................................................................................... 52

24.10 Profile Operations........................................................................................................................... 55

Upload profile Data from USB ............................................................................................ 55

PQ Files Operations ............................................................................................................ 55

Upload PQ files from USB ................................................................................................... 55

Ci+ credentials key update ................................................................................................. 55

HDCP keys update............................................................................................................... 55

Edid update ........................................................................................................................ 56