8051 Tutorial: Program Flow

When an 8051 is first initialized, it resets the PC to 0000h. The 8051 then begins to execute instructions sequentially in e ory unless a !rogra instruction causes the PC to be other"ise altered. There are #arious instructions that can odify the #alue of the PC$ s!ecifically, conditional branching instructions, direct %u !s and calls, and &returns& fro subroutines. 'dditionally, interru!ts, "hen enabled, can cause the !rogra flo" to de#iate fro its other"ise sequential sche e.

Conditional Branching
The 8051 contains a suite of instructions "hich, as a grou!, are referred to as &conditional branching& instructions. These instructions cause !rogra execution to follo" a non(sequential !ath if a certain condition is true. Ta)e, for exa !le, the *+ instruction. This instruction exa !le of the *+ instruction ight beJB 45h,HELL ! P HELL : """" .n this case, the 8051 "ill analyze the contents of bit /5h. .f the bit is set !rogra execution "ill %u ! i ediately to the label 01223, s)i!!ing the 43P instruction. .f the bit is not set the conditional branch fails and !rogra execution continues, as usual, "ith the 43P instruction "hich follo"s. Conditional branching is really the funda ental building bloc) of !rogra logic since all &decisions& are acco !lished by using conditional branching. Conditional branching can be thought of as the &.5...T014& structure in 8051 asse bly language. 'n i !ortant note "orth entioning about conditional branching is that the !rogra ay only branch to instructions located "ithi 168 bytes !rior to or 167 bytes follo"ing the address "hich follo"s the conditional branch instruction. This eans that in the abo#e exa !le the label 01223 ust be "ithin 89( 168 bytes of the e ory address "hich contains the conditional branching instruction. eans &*u ! if +it ,et.& 'n

#ir$ct Jum%&
While conditional branching is extre ely i !ortant, it is often necessary to a)e a direct branch to a gi#en e ory location "ithout basing it on a gi#en logical decision. This is equi#alent to saying &:oto& in +',.C. .n this case you "ant the !rogra flo" to continue at a gi#en e ory address "ithout considering any conditions. This is acco !lished in the 8051 using &;irect *u ! and Call& instructions. 's illustrated in the last !aragra!h, this suite of instructions causes !rogra flo" to change unconditionally.

Consider the exa !leLJ'P !E()*##+E,, " " " !E()*##+E,,: """" The 2*<P instruction in this exa !le eans &2ong *u !.& When the 8051 executes this instruction the PC is loaded "ith the address of 41W=';;>1,, and !rogra execution continues sequentially fro there. The ob#ious difference bet"een the ;irect *u ! and Call instructions and the conditional branching is that "ith ;irect *u !s and Calls !rogra flo" al"ays changes. With conditional branching !rogra flo" only changes if a certain condition is true. .t is "orth entioning that, aside fro 2*<P, there are t"o other instructions "hich cause a direct %u ! to occur- the ,*<P and '*<P co ands. 5unctionally, these t"o co ands !erfor the exact sa e function as the 2*<P co and((that is to say, they al"ays cause !rogra flo" to continue at the address indicated by the co and. 0o"e#er, ,*<P and '*<P differ in the follo"ing "ays

The ,*<P co and, li)e the conditional branching instructions, can only %u ! to an address "ithin 89( 168 bytes of the ,*<P co and. The '*<P co and can only %u ! to an address that is in the sa e 6) bloc) of e ory as the '*<P co and. That is to say, if the '*<P co and is at code e ory location ?50h, it can only do a %u ! to addresses 0000h through 0755h @0 through 60/7, deci alA.

Bou ay be as)ing yourself, &Why "ould . "ant to use the ,*<P or '*<P co and "hich ha#e restrictions as to ho" far they can %u ! if they do the sa e thing as the 2*<P co and "hich can %u ! any"here in e oryC& The ans"er is si !le- The 2*<P co and requires three bytes of code e ory "hereas both the ,*<P and '*<P co ands require only t"o. Thus, if you are de#elo!ing an a!!lication that has e ory restrictions you can often sa#e quite a bit of e ory using the 6(byte '*<P9,*<P instructions instead of the D(byte instruction. >ecently, . "rote a !rogra that required 6100 bytes of e ory but . had a e ory restriction of 6) @60/8 bytesA. . did a search9re!lace changing all 2*<Ps to '*<Ps and the !rogra shrun) do"nto 1E50 bytes. Thus, "ithout changing any logic "hatsoe#er in y !rogra . sa#ed 150 bytes and "as able to eet y 60/8 byte e ory restriction. 43T1- ,o e quality asse blers "ill actually do the abo#e con#ersion for you auto atically. That is, theyFll auto atically change your 2*<Ps to ,*<Ps "hene#er !ossible. This is a nifty and #ery !o"erful ca!ability that you ay "ant to loo) for in an asse bler if you !lan to de#elo! any !ro%ects that ha#e relati#ely tight e ory restrictions.

#ir$ct Call&
'nother o!eration that "ill be fa iliar to seasoned !rogra ers is the 2C'22 instruction. This is si ilar to a &:osub& co and in +asic. When the 8051 executes an 2C'22 instruction it i ediately !ushes the current Progra Counter onto the stac) and then continues executing code at the address indicated by the 2C'22 instruction.

+$turn& -rom +outin$&

'nother structure that can cause !rogra flo" to change is the &>eturn fro ,ubroutine& instruction, )no"n as >1T in 8051 'sse bly 2anguage. The >1T instruction, "hen executed, returns to the address follo"ing the instruction that called the gi#en subroutine. <ore accurately, it returns to the address that is stored on the stac). The >1T co and is direct in the sense that it al"ays changes !rogra flo" "ithout basing it on a condition, but is #ariable in the sense that "here !rogra flo" continues can be different each ti e the >1T instruction is executed de!ending on fro "here the subroutine "as called originally.

.nt$rru%t&
'n interru!t is a s!ecial feature "hich allo"s the 8051 to !ro#ide the illusion of & ulti(tas)ing,& although in reality the 8051 is only doing one thing at a ti e. The "ord &interru!t& can often be subsituted "ith the "ord &e#ent.& 'n interru!t is triggered "hene#er a corres!onding e#ent occurs. When the e#ent occurs, the 8051 te !orarily !uts &on hold& the nor al execution of the !rogra and executes a s!ecial section of code referred to as an interru!t handler. The interru!t handler !erfor s "hate#er s!ecial functions are required to handle the e#ent and then returns control to the 8051 at "hich !oint !rogra execution continues as if it had ne#er been interru!ted. The to!ic of interru!ts is so e"hat tric)y and #ery i !ortant. 5or that reason, an entire cha!ter "ill be dedicated to the to!ic. 5or no", suffice it to say that .nterru!ts can cause !rogra flo" to change.