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W255BU/W258BUQ-C/W258BUQ/W252BUM/W255BU/W251BUQ/W251BUQC/W258BWQ/W258BWQ-C/W251BWQ-C/W251BWQ/W255BW
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Notebook Computer
W255BU/W258BUQ-C/W258BUQ/W252BUM/W255BU/W251BUQ/W251BUQC/W258BWQ/W258BWQ-
C/W251BWQ-C/W251BWQ/W255BW
Service Manual
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Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
October 2011
Trademarks
AMD is a registered trademark of Advanced Micro Devices, Inc.
Windows
is a registered trademark of Microsoft Corporation.

Other brand and product names are trademarks and/or registered trademarks of their respective companies.
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About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the W255BU/
W258BUQ-C/W258BUQ/W252BUM/W255BUC/W251BUQP/W251BUQC/W258BWQ/W258BWQ-C/W251BWQ-
C/W251BWQ/W255BW series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS
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IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 1.58A (30 Watts) Or (for E-300, E350, E450 APU only) 19V, 3.42A or 18.5V, 3.5A (65W) minimum AC/DC
Adapter.
CAUTION
This Computers Optical Device is a Laser Class 1 Product
FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.
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Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Dont drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
2. Keep it dry, and dont overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
3. Follow the proper working procedures for the computer. Shut the computer down properly and dont forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not expose the computer
to any shock or vibration.
Do not place it on an unstable
surface.
Do not place anything heavy
on the computer.
Do not expose it to excessive
heat or direct sunlight.
Do not leave it in a place
where foreign matter or mois-
ture may affect the system.
Dont use or store the com-
puter in a humid environment.
Do not place the computer on
any surface which will block
the vents.
Do not turn off the power
until you properly shut down
all programs.
Do not turn off any peripheral
devices when the computer is
on.
Do not disassemble the com-
puter by yourself.
Perform routine maintenance
on your computer.
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4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Power Safety
The computer has specific power requirements:
Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected fromany external power supplies.
Use only approved brands of
peripherals.
Unplug the power cord before
attaching peripheral devices.
Do not plug in the power
cord if you are wet.
Do not use the power cord if
it is broken.
Do not place heavy objects
on the power cord.
Power Safety
Warning
Before you undertake
any upgrade proce-
dures, make sure that
you have turned off the
power, and discon-
nected all peripherals
and cables (including
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
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Battery Precautions
Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
Recharge the batteries using the notebooks system. Incorrect recharging may make the battery explode.
Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
Keep the battery away frommetal appliances.
Affix tape to the battery contacts before disposing of the battery.
Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have.
If you do not use the battery for an extended period, then remove the battery fromthe computer for storage.
Before removing the battery for storage charge it to 60% - 70%.
Check stored batteries at least every 3 months and charge themto 60% - 70%.
Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturers instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
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Related Documents
You may also need to consult the following manual for additional information:
Users Manual on CD
This describes the notebook PCs features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the computer (e.g.
keyboard and mouse) to their ports.
5. Attach the AC/DC adapter to the DC-In jack on the left of the computer, then plug
the AC power cord into an outlet, and connect the AC power cord to the AC/DC
adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not exceed
130 degrees); use the other hand to support the base of the computer (Note:
Never lift the computer by the lid/LCD).
7. Press the power button to turn the computer on.
Shut Down
Note that you should
always shut your
computer down by
choosing Shut Down
from the Start Menu.
This will help prevent
hard disk or system
problems.
130
Figure 1
Opening the Lid/LCD/Com-
puter with AC/DC Adapter
Plugged-In
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Contents
System Startup ............................................................................1-VIII
Introduction ..............................................1-1
Overview .........................................................................................1-1
Models Differences .........................................................................1-1
Specifications ..................................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right side Views .................................1-5
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7
Mainboard Overview - Top (Key Parts) .........................................1-8
Mainboard Overview - Bottom (Key Parts) ....................................1-9
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11
Disassembly ...............................................2-1
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-8
Removing the System Memory (RAM) ..........................................2-9
Removing the Wireless LAN Module ...........................................2-10
Removing the 3.75G Module ........................................................2-11
Removing the Keyboard ................................................................2-12
Part Lists ..................................................A-1
Part List Illustration Location ........................................................A-2
Top (W248BUQ) ............................................................................A-3
Top (W245BUQ) ........................................................................... A-4
Top (W240BUQ, W241BU-C, W240BW) .................................... A-5
Bottom (W240BU, W241BU) W/O USIM ................................... A-6
Bottom (W240BU, W241BU) With USIM ................................... A-7
Bottom (W248BUQ, W249BU-C) ................................................ A-8
Bottom (W240BW) WITH USIM ................................................. A-9
Bottom (W240BW) W/O USIM .................................................. A-10
LCD (W240BU, W241BU, W240BW) ....................................... A-11
LCD (W245BUQ) ....................................................................... A-12
LCD (W248BUQ - C) ................................................................. A-13
SATA-DVD SUPER MULTI (W245BUQ/ W240BUQ/ W241BU-C)
A-14
SATA-DVD SUPER MULTI (W248BUQ) ................................ A-15
SATA-DVD SUPER MULTI (W240BW) .................................. A-16
HDD ............................................................................................. A-17
Schematic Diagrams................................. B-1
System Block Diagram ...................................................................B-2
ONTARIO MEM & PCIE I/F, AP .................................................B-3
ONTATIO DISPLAY/ CLK/ MISC ...............................................B-4
ONTARIO POWER & DECOUPLING .........................................B-5
INAGUA DDR3 SO-DIMMS A ....................................................B-6
INAGUA DDR3 SO-DIMMS B ....................................................B-7
Robson S3 PCIE/ LVDS 1/6 ...........................................................B-8
Robson S3 MAIN 2/6 .....................................................................B-9
Robson S3 MEM Interface 3/6 .....................................................B-10
Robson S3 Straps 4/6 ....................................................................B-11
Robson S3 Power 5/6 ....................................................................B-12
Robson S3 Power 6/6 ....................................................................B-13
Robson DDR3 MEM CH-A .........................................................B-14
Robson DDR3 MEM CH-B ..........................................................B-15
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HUDSON PCIE/ PCI/ CLOCK/ FCH .......................................... B-16
HUDSON GPIO/ USB/ STRAP .................................................. B-17
HUDSON SATA/ DEBUG IO/ SPI ............................................. B-18
HUDSON POWER DECOUPLING ............................................ B-19
POWERGOOD/ TPM .................................................................. B-20
LVDS, INVERTER ......................................................................B-21
HDMI/ CRT ................................................................................. B-22
CCD/ 3G ....................................................................................... B-23
Card Reader/ LAN J MC261C ...................................................... B-24
MINI PCIE/ SATA HDD/ ODD .................................................. B-25
AUDIO CODEC ALC261C ......................................................... B-26
USB 3.0 VL800 ............................................................................B-27
KBC- ITE IT8518 ........................................................................B-28
LED/ MDC/ BT ............................................................................B-29
USB/ FAN/ TP/ MULTI CON ..................................................... B-30
5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS .............................................. B-31
POWER VDD3/ VDD5 ............................................................... B-32
Power 1.5V/ 0.75 ..........................................................................B-33
Power 1.1V/ 1VS ..........................................................................B-34
Power 1.8VS ................................................................................. B-35
APU CORE/ NB CORE ............................................................... B-36
VGA POWER .............................................................................. B-37
CHARGER/ DC IN ......................................................................B-38
Click Board .................................................................................. B-39
Audio Board/ USB .......................................................................B-40
Power Switch & LID Board ......................................................... B-41
EXTERNAL ODD Board ............................................................ B-42
Updating the FLASH ROM BIOS......... C-1
Introduction
Overview 1 - 1
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Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the W255BU/W258BUQ-C/W258BUQ/W252BUM/
W255BU/W251BUQ/W251BUQC/W258BWQ/W258BWQ-C/W251BWQ-C/W251BWQ/W255BW series notebook
computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the Users Manual.
Information about drivers (e.g. VGA & audio) is also found in Users Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows 7 etc.) have their own manuals as do application software (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.
The W255BU/W258BUQ-C/W258BUQ/W252BUM/W255BU/W251BUQ/W251BUQC/W258BWQ/W258BWQ-C/
W251BWQ-C/W251BWQ/W255BW series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for
a detailed description of the upgrade procedures for each specific component. Please note the warning and safety infor-
mation indicated by the symbol.
The balance of this chapter reviews the computers technical specifications and features.
Models Differences
This notebook series includes different models that vary slightly in design style, color and general appearance. Note that though your
computer may look slightly different fromthat pictured throughout this documentation, all ports, jacks, indicators, specifications and
general functions are the same for all the design styles.
Introduction
1 - 2 Specifications
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Specifications
Latest Specification Information

The specifications listed here are correct at the
time of sending them to the press. Certain items
(particularly processor types/speeds) may be
changed, delayed or updated due to the manu-
facturer's release schedule. Check with your
service center for more details.
CPU
The CPU is not a user serviceable part. Ac-
cessing the CPU in any way may violate your
warranty.
Processor Options
AMD-C Series Accelerated Processing Unit - C-30 1C
(1.2GHz)
512KB L2 Cache, 40nm, DDR3-1066MHz, TDP 9W
AMD-C Series (Dual-Core) Accelerated Processing Unit -
C-50 2C (1.0GHz)
1MB L2 Cache, 40nm, DDR3-1066MHz, TDP 9W
AMD-C Series (Dual-Core) Accelerated Processing Unit -
C-60 2C (1.0GHz)
AMD-E Series (Dual-Core) Accelerated Processing Unit -
E-300 (1.3GHz)
E-350 (1.6GHz)
E-450 (1.65GHz)
BIOS
One 16Mb SPI Flash ROM
AMI BIOS
Core Logic
AMD A50M FCH
LCD
15.6" (39.62cm) HD TFT LCD
Security
Security (KensingtonType) Lock Slot
BIOS Password
Memory
One 204 Pin SO-DIMM Socket Supporting DDR3 1066/
1333MHz Memory
Memory Expandable up to 4GB
Card Reader
Embedded Multi-In-1 Card Reader
MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC
MS (Memory Stick) / MS Pro / MS Duo
Video Adapter
AMD Radeon HD 6250 (C-30/ C-50/ C-60 APU
Integrated)
Shared Memory Architecture of up to 1469MB
MicrosoftDirectX11 Compatible
AMD Radeon HD 6310 (E-300/ E-350/ HD630 APU
Integrated)
Shared Memory Architecture of up to 1469MB (under Win-
dows 7 32 Bit with 4GB Memory)
MicrosoftDirectX11 Compatible
Storage
(Factory Option) One Changeable 12.7mm(h) Super Multi
Optical Device Drive
One Changeable 2.5" 9.5 mm (h) SATA HDD
Audio
High Definition Audio Compliant Interface
2 * Built-In Speakers
Built-In Microphone
Pointing Device
Built-in Touchpad
Introduction
Specifications 1 - 3
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Keyboard
Full-size WinKeykeyboard (with numeric keypad)
Communication
Built-In 10Mb/100Mb Ethernet LAN
(Factory Option) 300K/1.3M Pixel USB PC Camera Module
(Factory Option) 3.75G/HSPA Mini-Card Module
WLAN/ Bluetooth Half Mini-Card Modules:
(Factory Option) Wireless LAN (802.11b/g/n)
(Factory Option) Wireless LAN (802.11b/g/n) +Bluetooth
3.0
Interface
Three USB 2.0 Ports
One HDMI-Out Port
One Headphone-Out J ack
One Microphone-In J ack
One RJ -45 LAN J ack
One DC-in J ack
One External Monitor Port
Environmental Spec
Temperature
Operating: 5C - 35C
Non-Operating: -20C - 60C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%
Mini Card Slots
Slot 1 for WLAN Module or WLAN and Bluetooth Combo
Module
(Factory Option) Slot 2 for 3.75G/HSPA Module
Power
(for C-30, C-50, C-60 APU only)
3 Cell Smart Lithium-Ion Battery Pack, 24.42WH
(Factory Option) 6 Cell Smart Lithium-Ion Battery Pack,
48.84WH
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 1.58A (30W)
Or
(for E-300, E350, E450 APU only)
6 Cell Smart Lithium-Ion Battery Pack, 48.84WH
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 3.42A or 18.5V, 3.5A (65W)
Dimensions & Weight
374mm (w) * 250mm (d) * 14.3 - 34.1mm (h)
2.25 kg (with 24.42WH Battery and ODD)
Or
374mm (w) * 250mm (d) * 14.3 - 34.1mm (h)
2.3 kg (with 48.84WH Battery and ODD)
Introduction
1 - 4 External Locator - Top View with LCD Panel Open
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External Locator - Top View with LCD Panel Open
Figure 1
Top View
1. Optional Built-In
PC Camera
2. LCD
3. Power Button
4. LED Status
Indicators
5. Keyboard
6. Built-In
Microphone
7. Touchpad &
Buttons
5
3
4
6
1
7
15.6 (39.62cm)
2
Introduction
External Locator - Front & Right side Views 1 - 5
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External Locator - Front & Right side Views
Figure 2
Front Views
1. LED Power
Indicators
Figure 3
Right Side Views
1. Microphone-In
J ack
2. Headphone-Out
J ack
3. USB 2.0 Port
4. Optical Device
Drive Bay
5. Security Lock
Slot
6. Security Lock
Slot
1
1 4 2 3
5
Introduction
1 - 6 External Locator - Left Side & Rear View
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External Locator - Left Side & Rear View
Figure 4
Left Side View
1. DC-In J ack
2. External Monitor
Port
3. RJ -45 LAN J ack
4. HDMI-Out Port
5. 2 * USB 2.0 Ports
6. Vent
7. Multi-in-1 Card
Reader
1
4
3
6
2
5
5
7
Figure 5
Rear View
1. Battery
2. Security Lock Slot
1
2
Introduction
External Locator - Bottom View 1 - 7
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External Locator - Bottom View
Figure 6
Bottom View
1. Battery
2. Component Bay
Cover
3. Vent/Fan Intake/
Outlet
4. Hard Disk Bay
Cover
5. 3.75G/HSPA
USIM Card
Cover (optional)
6. Speakers
Overheating
To prevent your com-
puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.
2
3
1
4
3
3
6 6
5
3
Introduction
1 - 8 Mainboard Overview - Top (Key Parts)
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Mainboard Overview - Top (Key Parts)
Figure 7
Mainboard Top
Key Parts
1. J MC261
2. ITE 8518E
3. AZALIA Codec
3
4
2
1
Introduction
Mainboard Overview - Bottom (Key Parts) 1 - 9
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Mainboard Overview - Bottom (Key Parts)
7
1
2
3
4
5
6
8
Figure 8
Mainboard Bottom
Key Parts
1. Memory Slots
DDR3 SO-DIMM
2. Accelerated
Processing Unit
3. AMD Hudson M1
FCH
4. Mini-Card
Connector (3G
Module)
5. SIMLOCK
6. Mini-Card
Connector (WLAN
Module)
7. CMOS Battery
8. Card Reader
Socket
Introduction
1 - 10 Mainboard Overview - Top (Connectors)
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Mainboard Overview - Top (Connectors)
Figure 9
Mainboard Top
Connectors
1. HDMI-Out Port
2. USB Port 2.0
3. Speaker Cable
Connector
4. Microphone
Cable Connector
5. Audio Board
Connector
6. TouchPad Cable
Connector 2
7. TouchPad Cable
Connector 1
8. Keyboard Cable
Connector
9. Switch Board
Cable Connector
1
2
8
2
3
4
6
7
5
9
Introduction
Mainboard Overview - Bottom (Connectors) 1 - 11
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Mainboard Overview - Bottom (Connectors)
Figure 10
Mainboard Bottom
Connectors
1. Battery
Connector
2. ODD Connector
3. HDD Connector
4. CPU Fan Cable
Connector
5. RJ -45 LAN J ack
6. External Monitor
Port
7. DC-In J ack
8. CCD Cable
Connector
9. LCD Cable
Connector
1
2
4
5
6
7
8
9
3
Introduction
1 - 12
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Disassembly
Overview 2 - 1
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Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the W255BU/W258BUQ-C/W258BUQ/W252BUM/
W255BU/W251BUQ/W251BUQC/W258BWQ/W258BWQ-C/W251BWQ-C/W251BWQ/W255BW series notebooks
parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the Users Manual but are
repeated here for your convenience.
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure #will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.
Information
Warning
Disassembly
2 - 2 Overview
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NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away fromits base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it fromside to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away fromits socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock themfromside to side as
you pull themapart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
Disassembly
Overview 2 - 3
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Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions:
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
Before removing or servicing any part fromthe computer, turn the computer off and detach any power supplies.
When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Power Safety
Warning
Before you undertake
any upgrade proce-
dures, make sure that
you have turned off the
power, and discon-
nected all peripherals
and cables (including
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
Disassembly
2 - 4 Disassembly Steps
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Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery:
1. Remove the battery page 2 - 5
To remove the HDD:
2. Remove the HDD page 2 - 6
To remove the Optical Device:
2. Remove the Optical device page 2 - 8
To remove the System Memory:
2. Remove the system memory page 2 - 9
To remove the WLAN Module:
2. Remove the wireless LAN page 2 - 10
To remove the 3.75G Module:
2. Remove the 3.75G page 2 - 11
To remove the Keyboard:
2. Remove the keyboard page 2 - 12
Disassembly
Removing the Battery 2 - 5
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Removing the Battery
1. Turn the computer off, and turn it over.
2. Slide the latch in the direction of the arrow (Figure 1a).
3. Slide the latch in the direction of the arrow, and hold it in place (Figure 1a).
4. Slide the battery in the direction of the arrow (Figure 1b).
3. Battery
1
2
63 4
Figure 1
Battery Removal
a. Slide the latch and hold it
in place.
b. Slide the battery in the di-
rection of the arrow.
1
a.
b.
3
2
4
Disassembly
2 - 6 Removing the Hard Disk Drive
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Removing the Hard Disk Drive
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating systems installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the Users Manual) when setting up a new hard disk.
Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screws & (Figure 2a).
Figure 2
HDD Assembly
Removal
a. Locate the HDD bay cover
and remove the screws.
2 Screws
1 2
2 1
a.

HDD System Warning
New HDDs are blank. Before you
begin make sure:
You have backed up any data
you want to keep from your old
HDD.
You have all the CD-ROMs and
FDDs required to install your op-
erating system and programs.
If you have access to the internet,
download the latest application
and hardware driver updates for
the operating system you plan to
install. Copy these to a remov-
able medium.
Disassembly
Removing the Hard Disk Drive 2 - 7
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3. Remove the hard disk bay cover (Figure 3b).
4. Grip the tab and slide the hard disk in the direction of arrow (Figure 3c).
5. Lift the hard disk assembly out of the bay (Figure 3d).
6. Remove the screw - and the mylar cover from the hard disk (Figure 3e).
7. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
63
4
65 6
7 10 11 12
4
b.
c.
6
9
d.
3
e.
11
8
7
12
5
10
3
4
5
6
3. HDD Bay Cover

5. HDD Assembly
11. Mylar Cover
12. HDD
4 Screws
Figure 3
HDD Assembly
Removal (contd.)
b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD assembly in the di-
rection of the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screws and
mylar cover.
Disassembly
2 - 8 Removing the Optical (CD/DVD) Device
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Removing the Optical (CD/DVD) Device
1. Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6).
2. Remove the screw at point (Figure 4a).
3. Use a screwdriver to carefully push out the optical device at point (Figure 4b).
4. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
5. Restart the computer to allow it to automatically detect the new device.
Figure 4
Optical Device
Removal
a. Remove the screw at
point .
b. Use a screwdriver to
carefully push out the
optical device at point
.
1
2
1
3 2
3. Optical Device
1 Screw
1
b.
3
a.
2
Disassembly
Removing the System Memory (RAM) 2 - 9
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Removing the System Memory (RAM)
The computer has one memory socket for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDR3 1333/ 1066MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported are 1GB,
2GB and 4GB and DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn
on your computer.
Memory Upgrade Process
1. Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
2. The RAM modules will be visible at point on the main board.
3. Gently pull the two release latches on the sides of the memory socket.
4. The RAM module will pop-up (Figure 7b), and you can then remove it.
5. Insert a new module holding it at about a 30 angle and fit the connectors firmly into the memory slot.
6. The modules pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
7. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
8. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay
cover).
9. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
Figure 5
RAM Module
Removal
a. Locate the memory
socket.
b. Remove the mod-
ule.
Contact Warning
Be careful not to touch
the metal pins on the
modules connecting
edge. Even the clean-
est hands have oils
which can attract parti-
cles, and degrade the
modules perfor-
mance.
1
2. RAM Module
2
2
b.
a.
1
Disassembly
2 - 10 Removing the Wireless LAN Module
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Removing the Wireless LAN Module
2. The Wireless LAN module will be visible at point on the mainboard.
3. Carefully disconnect cables - , then remove screw from the module socket.
4. Lift the Wireless LAN module (Figure 6c) up and off the computer.
Figure 6
Wireless LAN
Module Removal
a. Remove the cover.
b. Disconnect the cables
and remove the screw.
c. Lift the WLAN module
out.
Note: Make sure you
reconnect the antenna
cable to 1 +
2socket (Figure
b).
1
2 3 4
5
b.
a.
2
3
5
1
c.
4
5. WLAN Module.
1 Screw
Disassembly
Removing the 3.75G Module 2 - 11
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Removing the 3.75G Module
2. The 3.75G module will be visible at point on the mainboard.
3. Carefully disconnect the cable , then remove the screw from the module socket.
4. The 3.75G module will pop-up.
5. Lift the 3.75G module (Figure 7d) up and off the computer.
Figure 7
3.75G Module
Removal
a. Remove the cover.
b. Disconnect the cable
and remove the screw.
c. The 3.75G module will
pop up.
d. Lift the 3.75G module
out.
1
2 3
4
4
b.
a.
d.
2
3
4
1
c.
d.
4. 3.75G Module.
1 Screw
Disassembly
2 - 12 Removing the Keyboard
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Removing the Keyboard
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Remove screws - from the bottom of the computer. Press at points to unsnap the LED cover module
(you may need to use the Eject Pin Tool to do this (Figure 10a).
3. Remove the LED cover module and screws - from the keyboard (Figure 10b).
4. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable . Disconnect the keyboard
ribbon cable from the locking collar socket (Figure 10c)
5. Carefully lift up the keyboard (Figure 10d) off the computer.
Figure 8
Keyboard Removal
a. Remove screws from the
bottom of the computer.
Press at points to un-
snap the LED cover
module.
b. Remove the LED cover
module and screws
from the keyboard.
c. Carefully lift the key-
board up and disconnect
the keyboard ribbon ca-
ble from the locking col-
lar socket.
d. Remove the keyboard.
5
1 4 5 6
6 7 11
12
12 13
14
Re-Inserting the
Keyboard
When re-inserting the
keyboard firstly align the
four keyboard tabs at the
bottom (Figure 10c) at
the bottom of the key-
board with the slots in the
case.
a.
Keyboard Tabs
1
3 2 4
7
5
c.
b. d.
8
9
14
10 11
12
6
5
13
6. LED Cover Module

14. Keyboard
9 Screws
Part Lists
A - 1
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Appendix A: Part Lists
This appendix breaks down the W255BU/W258BUQ-C/W258BUQ/W252BUM/W255BU/W251BUQ/W251BUQC/
W258BWQ/W258BWQ-C/W251BWQ-C/W251BWQ/W255BW series notebooks construction into a series of illustra-
tions. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturers part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
Part Lists
A - 2 Part List Illustration Location
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Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
Parts W251BUQ W251BWQ W255BU W258BUQ W258BWQ
Top page A - 3 page A - 4 page A - 5 page A - 6
Bottom page A - 8 page A - 8 page A - 7 page A - 8
LCD page A - 9
DVD-DUAL page A - 10
SATA DVD page A - 11
DUMMY ODD page A - 12
Part Lists
Top (W251BUQ) A - 3
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Top (W251BUQ)

Figure A - 1
Top (W251BUQ)
Part Lists
A - 4 Top (W251BWQ)
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Top (W251BWQ)

Figure A - 2
Top (W251BWQ)
Part Lists
Top (W255BU) A - 5
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Top (W255BU)

Figure A - 3
Top (W255BU)
Part Lists
A - 6 Top (W258BUQ, W258BWQ)
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Top (W258BUQ, W258BWQ)

Figure A - 4
Top (W258BUQ,
W258BWQ)
Part Lists
Bottom (W251BUQ, W255BU, W258BUQ) A - 7
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Bottom (W251BUQ, W255BU, W258BUQ)
Figure A - 5
Bottom
(W251BUQ,
W255BU,
W258BUQ)
Part Lists
A - 8 Bottom (W251BWQ, W258BWQ)
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Bottom (W251BWQ, W258BWQ)
Figure A - 6
Bot-
tom(W251BWQ,
W258BWQ)
Part Lists
LCD A - 9
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LCD
Figure A - 7
LCD
Part Lists
A - 10 DVD DUAL
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DVD DUAL
Figure A - 8
DVD DUAL
Part Lists
SATA-DVD (W258BWQ) A - 11
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SATA-DVD (W258BWQ)
Figure A - 9
SATA-DVD
(W258BWQ)
Part Lists
A - 12 DUMMY ODD
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DUMMY ODD
Figure A - 10
DUMMY ODD
Schematic Diagrams
B - 1
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Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the W255BU/W258BUQ-C/W258BUQ/W252BUM/W255BU/W251BUQ/
W251BUQC/W258BWQ/W258BWQ-C/W251BWQ-C/W251BWQ/W255BW notebooks PCBs. The following table
indicates where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page
System Block Diagram - Page B - 2 HUDSON PCIE/ PCI/ CLOCK/ FCH - Page B - 16 USB/ FAN/ TP/ MULTI CON - Page B - 30
ONTARIO MEM & PCIE I/F, AP - Page B - 3 HUDSON GPIO/ USB/ STRAP - Page B - 17 5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS - Page B - 31
ONTATIO DISPLAY/ CLK/ MISC - Page B - 4 HUDSON SATA/ DEBUG IO/ SPI - Page B - 18 POWER VDD3/ VDD5 - Page B - 32
ONTARIO POWER & DECOUPLING - Page B - 5 HUDSON POWER DECOUPLING - Page B - 19 Power 1.5V/ 0.75 - Page B - 33
INAGUA DDR3 SO-DIMMS A - Page B - 6 POWERGOOD/ TPM - Page B - 20 Power 1.1V/ 1VS - Page B - 34
INAGUA DDR3 SO-DIMMS B - Page B - 7 LVDS, INVERTER - Page B - 21 Power 1.8VS - Page B - 35
Robson S3 PCIE/ LVDS 1/6 - Page B - 8 HDMI/ CRT - Page B - 22 APU CORE/ NB CORE - Page B - 36
Robson S3 MAIN 2/6 - Page B - 9 CCD/ 3G - Page B - 23 VGA POWER - Page B - 37
Robson S3 MEM Interface 3/6 - Page B - 10 Card Reader/ LAN JMC261C - Page B - 24 CHARGER/ DC IN - Page B - 38
Robson S3 Straps 4/6 - Page B - 11 MINI PCIE/ SATA HDD/ ODD - Page B - 25 Click Board - Page B - 39
Robson S3 Power 5/6 - Page B - 12 AUDIO CODEC ALC261C - Page B - 26 Audio Board/ USB - Page B - 40
Robson S3 Power 6/6 - Page B - 13 USB 3.0 VL800 - Page B - 27 Power Switch & LID Board - Page B - 41
Robson DDR3 MEM CH-A - Page B - 14 KBC- ITE IT8518 - Page B - 28 EXTERNAL ODD Board - Page B - 42
Robson DDR3 MEM CH-B - Page B - 15 LED/ MDC/ BT - Page B - 29
Table B - 1
Schematic
Diagrams
Version Note
The schematic dia-
grams in this chapter
are based upon ver-
sion 6-7P-W2405-
003. If your main-
board (or other
boards) are a later
version, please
check with the Serv-
ice Center for updat-
ed diagrams (if
required).
Schematic Diagrams
B - 2 System Block Diagram
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System Block Diagram
Sheet 1 of 41
System Block
Diagram

512MB DDR3
(USB2)
TOUCH PAD
LPC
CARD
READER
GPU POWER, VDDC
SO-DIMM1
HP
OUT
INT SPK R
CLICK BOARD
SOCKET
PCIE
480 Mbps
DDRIII
Mini PCIE
SPI
DDRIII
INT MIC
25
MHz
LCD CONNECTOR
AMD FUSION APU
CRT Connector
HDMI Conne ctor
24 MHz
SHEET 6
MIC
IN
SHEET 5
128pins LQFP
SO-DIMM2
32.768KHz
(USB6)
Bluetooth
1.1V, 1VS
EC SMBUS
USB PORT
AZALIA LINK
(USB0) (USB1)
USB PORT
SATA ODD SATA HDD
BIOS
SPI
LAN
ITE 8518
INT. K/B
Azalia Codec
EC
5V,3V,5VS,3.3VS
1.5V,0.75VS(VTT_MEM)
USB2.0
ATI ROBSON
VDD3,VDD5
UMI*4
W83L771AWG
32.768 KHz
JMICRO
APU_CORE,NB_CORE
SATA I/II 3.0Gb/s
1066MHz
DDR3 / 1.5V
(Reserve)
TPM
CCD
(USB5)
REALTEK
ALC269 33 MHz
THERMAL
SENSOR
100 MHz
14 *1 4*1 .6m m
(S3 TYPE)
SMART
FAN
SMART
BATTERY
AC-IN
PCIE*4
JMC261C
W240BU/W250BUQ/W250BAQ System Block Diagram
SHEET 38
RJ-45 7IN1
SOCKET
INT SPKER
POWER SWITCH+HOTKEY X 3
6-71-E51QS-D02
CLICK BOARD
EXT. ODD
EXTERNAL ODD BOARD
6-71-W2402-D01
POWER SWITCH BOARD
USB+EARPHONE+EXT.MIC
AUDIO BOARD
6-71-E51QN-D01
(Reserve)
6-71-W2408-D02
(USB4)
USB PORT
Ontario FT1
41 3-BALL
19 mmX19mm BGA
VGA DAC
DI SP LAY P ORT X2
4 X1 P CIE GE N2 GP P
1 X4 UMI-L INK GE N1
S INGLE CHANNE L DDR3
DX11 IGP
AMD HUDSON-M1
23mmX23mmBGA
HW MONITOR
GB MAC
605-BALL
AZALIA HD AUDI O
S PI I/F
INT. CLK GE N
USB2. 0(12) + 1.1 (2)
P CIE GE N1 I/F (4 x1)
LP C I/ F
S AT AI I (3 P ORTS )
CHARGER,DC IN
USB 3.0 3G CARD
(USB9)
(Optional) WLAN
1.8VS
1.5VS,1.1VS
MVDDQ,1.8V_REG,1.0V_REG
(USB3)
Schematic Diagrams
ONTARIO MEM & PCIE I/F, AP B - 3
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ONTARIO MEM & PCIE I/F, AP
Sheet 2 of 41
ONTARIO MEM &
PCIE I/F, AP

VG A_ R XP 3 7
VG A_ R XP 2 7
VG A_ R XN 2 7
VG A_ R XN 3 7
ME M _ DA T A6 3
C1 0 0 . 1 u _ 10 V _ X 7 R_ 0 4
ME M _ DA T A4
C1 1 0 . 1 u _ 10 V _ X 7 R_ 0 4
C1 2 0 . 1 u _ 10 V _ X 7 R_ 0 4
ME M _ DA T A3 5
C1 3 0 . 1 u _ 10 V _ X 7 R_ 0 4
C _U MI _ P _ R X 0 1 5
C1 4 0 . 1 u _ 10 V _ X 7 R_ 0 4
C _U MI _ N _ RX 0 1 5
ME M _ DA T A5
C _U MI _ P _ R X 1 1 5
C _U MI _ N _ RX 1 1 5
C _U MI _ N _ RX 2 1 5
C _U MI _ P _ R X 2 1 5
C1 5 0 . 1 u _ 10 V _ X 7 R_ 0 4
C _U MI _ P _ R X 3 1 5
C _U MI _ N _ RX 3 1 5 C1 6 0 . 1 u _ 10 V _ X 7 R_ 0 4
ME M _ DA T A3 6
C8 4 2
1 0 u_ 6 . 3 V _ X 5 R_ 0 6
C_ U MI _ P _ T X0 1 5
C_ U MI _ N _ TX0 1 5
C_ U MI _ N _ TX1 1 5
C_ U MI _ P _ T X1 1 5
C_ U MI _ N _ TX2 1 5
C_ U MI _ P _ T X2 1 5
C_ U MI _ N _ TX3 1 5
C_ U MI _ P _ T X3 1 5
ME M _ DA T A6
R 1 1. 27 K _ 1 % _ 0 4
ME M _ DA T A3 7
ME M _ DA T A7
ME M _ DQ S _ H0 5 , 6
M E M_ E V E NT # 5 , 6
M E M_ A D DR [1 5 :0 ] 5 , 6
ME M _ DA T A3 9
M E M_ C LK _H 0 5
ME M _ DA T A8
ME M _ DA T A3 8
ME M _ DA T A9
M E M _B ANK 1 5 , 6
M E M _B ANK 2 5 , 6
ME M _ DA T A4 0
ME M _ DA T A1 0
ONT ARI O ( 2. 0)
PA RT 1 O F 5
M
E
M
O
R
Y
I/F
U1 E
O N TA R I O _A P U
V1 7 M_WE_L
V1 9 M_CA S_L
U1 8
M_RA S_L
V1 6 M1_CS _L1
U1 7
M1_CS _L0
W 1 6 M0_CS _L1
T 1 7 M0_CS _L0
W 1 5 M1_O DT1
U1 9 M1_O DT0
V1 5 M0_O DT1
W 1 9 M0_O DT0
E 1 5 M_CK E1
F 1 5 M_CK E0
N1 7 M_EV ENT _L
L 2 3
M_RE SET _L
L 1 7 M_C LK_L3
L 1 8
M_C LK_H 3
N1 9 M_C LK_L2
N1 8 M_C LK_H 2
M1 8 M_C LK_L1
M1 9 M_C LK_H 1
M1 6 M_C LK_L0
M1 7 M_C LK_H 0
AC1 6
M_DQ S_L 7
AB1 6 M_DQ S_H 7
AC2 1 M_DQ S_L 6
AC2 0 M_DQ S_H 6
V2 2 M_DQ S_L 5
W 2 2 M_DQ S_H 5
P 2 2 M_DQ S_L 4
R2 2 M_DQ S_H 4
J 2 3
M_DQ S_L 3
J 2 2 M_DQ S_H 3
E 2 2 M_DQ S_L 2
E 2 3
M_DQ S_H 2
A2 0 M_DQ S_L 1
B2 0 M_DQ S_H 1
B1 6 M_DQ S_L 0
A1 6 M_DQ S_H 0
AA1 6 M_DM7
AB2 0 M_DM6
V2 3
M_DM5
P 2 3 M_DM4
H2 2 M_DM3
D2 1 M_DM2
B1 9 M_DM1
D1 5 M_DM0
F 1 6 M_BA NK2
T 1 8
M_BA NK1
R1 8 M_BA NK0
G1 5
M_AD D15
E 1 6 M_AD D14
W 1 7 M_AD D13
E 1 8 M_AD D12
F 1 7 M_AD D11
T 1 9
M_AD D10
E 1 9 M_AD D9
F 1 9 M_AD D8
G1 8
M_AD D7
H1 5 M_AD D6
G1 7 M_AD D5
H1 7 M_AD D4
H1 8 M_AD D3
J 1 7 M_AD D2
H1 9 M_AD D1
R
17
M_AD D0
M 2 2 M_Z VDDI O_ME M_S
M 2 3 M_V RE F
A C1 5 M_DATA 63
A B1 5 M_DATA 62
A B1 8 M_DATA 61
A C1 8 M_DATA 60
A C1 4 M_DATA 59
A B1 4 M_DATA 58
Y 1 6
M_DATA 57
A C1 7 M_DATA 56
Y 1 8 M_DATA 55
A B1 9 M_DATA 54
A A2 0 M_DATA 53
A A2 3 M_DATA 52
A A1 8 M_DATA 51
A C1 9
M_DATA 50
A B2 2 M_DATA 49
Y 2 0 M_DATA 48
Y 2 1 M_DATA 47
W 23 M_DATA 46
U 2 3 M_DATA 45
T 2 1 M_DATA 44
Y 2 2 M_DATA 43
Y 2 3 M_DATA 42
V 21 M_DATA 41
V 20
M_DATA 40
T 2 2 M_DATA 39
R 2 3 M_DATA 38
P 20 M_DATA 37
M 2 0 M_DATA 36
T 2 3 M_DATA 35
T 2 0 M_DATA 34
P 21
M_DATA 33
N 2 3 M_DATA 32
K 23
M_DATA 31
K 20 M_DATA 30
H 2 0 M_DATA 29
G 2 3 M_DATA 28
K 21 M_DATA 27
K 22 M_DATA 26
H 2 3 M_DATA 25
H 2 1 M_DATA 24
F 21 M_DATA 23
F 20 M_DATA 22
D 2 2 M_DATA 21
C 2 2 M_DATA 20
F 22 M_DATA 19
F 23 M_DATA 18
D 2 3 M_DATA 17
C 2 3
M_DATA 16
C 2 0 M_DATA 15
A 21
M_DATA 14
B 18 M_DATA 13
A 18 M_DATA 12
D 2 0 M_DATA 11
B 21 M_DATA 10
A 19
M_DAT A9
C 1 8 M_DAT A8
D 1 6
M_DAT A7
C 1 6 M_DAT A6
C 1 4 M_DAT A5
A 14 M_DAT A4
D 1 8 M_DAT A3
A 17 M_DAT A2
A 15 M_DAT A1
B 14 M_DAT A0
M E M_ C LK _L 1 5
M E M_ C LK _L 2 6
M E M_ C LK _H 2 6
M E M_ C LK _L 3 6
M E M_ C LK _H 3 6
ME M _ DA T A4 1
ME M _ DA T A1 1
be directly to the plane without a long trace
R6 connection to VDDIO_SUS should
Note: Open the sodlermask for Vi as on Mem interface
ME M _ DA T A1 2
ME M _ DA T A4 2
ME M _ CK E 1 5, 6
ME M _ CK E 0 5, 6
ON TAR I O (2. 0)
P ART 2O F 5
U
M
I
I/F
P
C
IE
I/F
U1 A
O NT AR I O_ AP U
AB 7 P _UMI _RX N3
A C7 P _UMI _RX P3
A C1 0 P _UMI _RX N2
A B1 0
P _UMI _RX P2
Y 1 0 P _UMI _RX N1
A A1 0 P _UMI _RX P1
Y 1 2 P _UMI _RX N0
A A1 2 P _UMI _RX P0
Y 1 4 P _ZV DD_10
Y 3 P _GPP_ RXN 3
Y 4 P _GPP_ RXP 3
AA 2 P _GPP_ RXN 2
AA 1 P _GPP_ RXP 2
A C4 P _GPP_ RXN 1
AB 4
P _GPP_ RXP 1
Y 6 P _GPP_ RXN 0
AA 6 P _GPP_ RXP 0
AC8 P _UMI _TX N3
AB 8 P _UMI _TX P3
Y 8 P _UMI _TX N2
AA 8
P _UMI _TX P2
AB 1 1 P _UMI _TX N1
AC1 1 P _UMI _TX P1
AC1 2 P _UMI _TX N0
AB 1 2 P _UMI _TX P0
AA 1 4 P_ ZVS S
V4 P_GPP _TX N3
V3 P_GPP _TX P3
Y 2 P_GPP _TX N2
Y 1 P_GPP _TX P2
AC3 P_GPP _TX N1
AB 3
P_GPP _TX P1
AC6 P_GPP _TX N0
AB 6 P_GPP _TX P0
C 8 4 4
0 . 1u _ 1 0 V_ X7R _ 04
ME M _ DA T A1 3
ME M _ DA T A4 3
D I MM 0 _O DT 1 5
D I MM 0 _O DT 0 5
D I MM 1 _O DT 1 6
D I MM 1 _O DT 0 6
M E M_ C LK _L 0 5
D I MM 0 _C S #1 5
D I MM 0 _C S #0 5
D I MM 1 _C S #1 6
D I MM 1 _C S #0 6
ME M _ DA T A1 4
ME M _ DA T A4 4
PLACE NEAR U1
Analog Thermal Sensor
3
2
1
C3 6 4
0 . 1u _ 1 0 V_ X 5R _ 0 4
Q1 5
G 7 11 S T 9 U
OU T
1
VC C
2
G ND
3 C 3 65
0 . 1 u _ 10 V_ X5 R _ 0 4
1:2 (4mils:8mils) T HE R M _ VOL T 2 7
3. 3V
R 67 9 * 0 _0 4
ME M _ DA T A1 5
ME M _ DA T A4 5
1 . 5 V
ME M _ DA T A1 6
ME M _ DA T A4 6
C5 * 0. 1u _ 1 0 V_ X7 R _ 04
ME M _ DA T A1 7
ME M _ DA T A4 7
ON _ ZV S S ON _Z V DD
ROUTE A-LINK DIFF PAI R@ 85 OHM +/- 10%
ME M _ RA S # 5, 6
ME M _ W E # 5, 6
ME M _ CA S # 5, 6
ME M _ DA T A1 8
1 VS
R 68 0 0 _ 0 4
ME M _ DA T A4 8
ME M _ DA T A1 9
ME M _ DA T A4 9
ME M _ DA T A2 0
MEM_A DDR0
M E M _A DD R 1 0
M E M _A DD R 1 2
M E M _A DD R 1 1
M E M _A DD R 1 3
M E M _A DD R 1 4
M E M _A DD R 2
M E M _A DD R 3
M E M _A DD R 5
M E M _A DD R 1 5
M E M _A DD R 4
M E M _A DD R 1
M E M _A DD R 8
M E M _A DD R 7
M E M _A DD R 9
M E M _A DD R 6
ME M _ DA T A5 0
M E M_ R E S E T # 5 , 6
M E M _D M1
M E M _D M3
M E M _D M0
M E M _D M2
C 84 3
1 0 0 0 p_ 5 0 V_ X 7R _ 0 4
M E M _D M7
M E M _D M5
M E M _D M6
M E M _D M4
R 2 2 K _ 1% _ 0 4
ME M _ DA T A2 1
M E M _Z VDD I O
ME M _ DA T A5 1
R 67 8
1 K _ 1 % _0 4
ME M _ DQ S _ H1 5 , 6
ME M _ DQ S _ L 0 5 , 6
ME M _ DQ S _ L 2 5 , 6
ME M _ DQ S _ H2 5 , 6
ME M _ DQ S _ L 1 5 , 6
ME M _ DQ S _ H4 5 , 6
ME M _ DQ S _ L 3 5 , 6
ME M _ DQ S _ H3 5 , 6
ME M _ DQ S _ H5 5 , 6
ME M _ DQ S _ L 4 5 , 6
ME M _ DQ S _ L 6 5 , 6
ME M _ DQ S _ H6 5 , 6
ME M _ DQ S _ L 5 5 , 6
ME M _ DQ S _ L 7 5 , 6
ME M _ DQ S _ H7 5 , 6
ME M _ DA T A2 2
M E M_ D M[7 :0 ] 5 , 6
M E M _B ANK 0 5 , 6
For W250BAQ
M E M _D A T A[6 3 :0 ] 5 , 6
ME M _ DA T A5 2
ME M _ DA T A2 3
ONTARIO MEM & PCIE I/F, AP
ME M _ DA T A5 3
VGA _ R XN0 7
VGA _ R XP 1 7
VGA _ R XN1 7
C6 * 0. 1u _ 1 0 V_ X7 R _ 04
VGA _ R XP 0 7
ME M _ DA T A2 4
ME M _ DA T A5 5
ME M _ DA T A2 5
ME M _ DA T A5 4
ME M _ DA T A2 6
R 6 3 9. 2_ 1 % _ 0 4
M E M_ C LK _H 1 5
R 68 1
1 K _ 1 % _0 4
ME M _ DA T A5 6
ME M _ DA T A2 7
C1 * 0. 1u _ 1 0 V_ X7 R _ 04
C2 * 0. 1u _ 1 0 V_ X7 R _ 04
C3 * 0. 1u _ 1 0 V_ X7 R _ 04
ME M _ DA T A2 8
C4 * 0. 1u _ 1 0 V_ X7 R _ 04
ME M _ DA T A0
ME M _ DA T A5 7
V G A_ TXN 0 7
V G A_ TXP 0 7
VT T _M E M
V G A_ TXN 1 7
V G A_ TXP 1 7
ME M _ DA T A2 9
ME M _ DA T A5 8
C7 * 0. 1u _ 1 0 V_ X7 R _ 04
ME M _ DA T A3 0
ME M _ DA T A5 9
ME M _ DA T A3 1
ME M _ DA T A6 0
ME M _ DA T A1
ME M _ DA T A3 2
V G A_ T X P 3 7
V G A_ T X N2 7
V G A_ T X N3 7
V G A_ T X P 2 7
ME M _ DA T A6 1
C8 * 0. 1u _ 1 0 V_ X7 R _ 04
ME M _ DA T A2
ME M _ DA T A3 3
ME M _ DA T A6 2
ME M _ DA T A3
1 . 5 V
C9 0 . 1 u _ 10 V _ X 7 R_ 0 4
ME M _ DA T A3 4
Schematic Diagrams
B - 4 ONTATIO DISPLAY/ CLK/ MISC
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
ONTATIO DISPLAY/ CLK/ MISC

R 3 8
0 _ 0 4
1 . 8 V S
R5 1
1 K _ 0 4
C P U_ S V D
A P U _ P W R G D
R 5 93 1 0 0 K _ 0 4
R5 4 * 1 K _ 04
R5 3 * 1 K _ 04
R7 1 *0 _ 0 4 J 1 08 _ P L L T S T 1 AP U _ T E S T 1 8 _P L LT E S T 1
AP U _ T E S T 1 9 _P L LT E S T 0 J 1 08 _ P L L T S T 0 R7 0 *0 _ 0 4
R 42 5 1 _ 04
R 43 5 1 _ 04
D BRE Q# R6 9 3 0 0_ 1 % _ 0 4
R 5 0 0 _ 0 4
D BRD Y
5V S
ONTARIO DISPLAY/CLK/MISC
A P U _T E S T 3 6
R4 0 5 1 0 _ 1 % _ 04
CP U _ T HE RM T RI P # 1 6
A P U _C L K P 1 5
C P U _ S VD 3 5
CP U_ S VC 3 5
H DT + H E A D E R / P L A C E O N T O P
P OR T C_ H P D 2 1
A P U _C L K N 1 5
1 . 8 V S
L V D S -L CL K P 2 0
L V D S -L CL K N 2 0
R3 1 *0 _ 0 4
R3 2 *0 _ 0 4
1. 8V S 1 . 8 V S
A P U _S I D
A P U _P W R GD 1 5, 35
L D T _R S T # 15
R 3 5 0 _ 0 4
R 3 6 0 _ 0 4
R 6 5 * 0 _0 4
R 5 9
1 K _ 0 4
L DT _ R S T #
R 6 6 * 1 0K _ 04
R4 1 5 1 0 _ 1 % _ 04
R 4 4 * 1K _0 4
AP U_ T A L E R T # 1 7 , 2 7
R 5 91 1 0 0 K _ 0 4
A L LO W _ L D T S T P 1 5
R 5 8 1 K _ 0 4
1. 8V S
1 . 8 V S
C 2 3 0 . 1 u_ 1 6 V_ Y 5 V_ 0 4
C 2 4 0 . 1 u_ 1 6 V_ Y 5 V_ 0 4
1 . 8 V S
L DT _ R S T #
J 1
* HD R 10 X2 - B LU E - VE R T I CAL P L UG
1
CP U_ VDDI O
2
C PU _TC K 3
G ND
4
CP U_T MS 5
G ND
6
CP U_ TD I
7
G ND
8
CP U_T DO
9
CP U_ TR ST_ L
10
CP U_P WROK _BU F 1 1
CP U_ DB RDY 3
12
C PU _R ST_ L_BU F 1 3
CP U_ DB RDY 2
14
C PU _DB RD Y0
1 5
CP U_ DB RDY 1
16
CP U_D BR EQ_L 1 7
G ND
18
CP U_ PLLT ES T0 1 9
CP U_ VDDI O
20
CP U_ PLLT ES T1
A P U_ S I D 1 6
A P U_ S I C 1 6
ONT AR IO (2. 0)
PA RT 3 OF 5
T
E
S
T
V
G
A
D
A
C
J
TA
G
C
T
RL
S
E
R
C
LK
D
P
M
IS
C
D
IS
P
L
AY
P
O
R
T 0
D
IS
P
L
AY
P
O
R
T 1
ANALOG/DISPLAY/MISC
U 1 B
ON T A R I O_ A P U
V 5 RS VD_3
W 1 1 RS VD_2
B4
RS VD_1
F 1 VS S_ SEN SE
F 3 VD DI O_MEM_S _S ENS E
G 1 VD DC R_C PU _S EN SE
F 4 VD DC R_N B_ SE NS E
M 1 DB RE Q_L
M 3 DB RDY
M 4 TR ST _L
P 2 TMS
P 1 T CK
N 1 TD O
N 2
TD I
T 2 AL ER T_L
U 2 TH ER MTR IP _L
U 1
PR OCH OT_L
T 4 PW ROK
T 3 RE SE T_L
P 4 SI D
P 3 S I C
J 2 SV D
J 1 S VC
D 1
DI SP _CLK I N_L
D 2 DI SP _CLK I N_H
V 1
C LK IN _L
V 2 C LK IN _H
C 8 LT DP 0_TX N3
D 8
LT DP 0_TX P3
B6 LT DP 0_TX N2
A 6 LT DP 0_TX P2
C 6 LT DP 0_TX N1
D 6 LT DP 0_TX P1
A 5 LT DP 0_TX N0
B5 LT DP 0_TX P0
B1 0
TD P1 _TX N3
A1 0 TD P1 _TX P3
C1 0 TD P1 _TX N2
D1 0
TD P1 _TX P2
A 9 TD P1 _TX N1
B9
TD P1 _TX P1
B8 TD P1 _TX N0
A
8
TD P1 _TX P0
T1
D MAA CT IV E_L
K 3 T ES T38
R5 T ES T37
N5 T ES T36
H4
T ES T35
T1 5 T ES T34_L
U1 5 TE ST 34_H
J 1 9 T ES T33_L
J 1 8 TE ST 33_H
M2 1 T ES T31
M5 T ES T28_L
L5
TE ST 28_H
K 2 T ES T25_L
K 1 TE ST 25_H
M2 T ES T19
L2
T ES T18
L1 T ES T17
K 4 T ES T16
E 4 T ES T15
T5 T ES T14
R6 T ES T6
R2 T ES T5
R1
T ES T4
D1 2 D AC_ ZV SS
D4
DAC _S DA
F 2 D AC _SC L
E 2
DA C_V SY NC
E 1 DA C_H SY NC
B1 3 DA C_B LU EB
A1 3
D AC _BL UE
B1 2 DA C_G R EE NB
A1 2 DAC _GRE EN
D1 3 D AC_ RE DB
C1 2
DAC _R ED
D3 LT DP 0_H PD
B3 LTD P0_ AU XN
A3 LTD P0_ AU XP
C1
T DP 1_H PD
C2 TD P1_ AU XN
B2 TD P1_ AU XP
H1 DP _VA RY _BL
H
2
D P_DIG ON
G
2
DP_ BLON
H
3
DP_ ZV SS
DA C_ H S Y NC 2 1
DA C_ VS Y N C 21
DAC _ DD C A DA T A 2 1
DA C_ D DC A C L K 2 1
A P U _ T RS T #
A P U _S I C
R1 9 1K _ 04
R1 5 *1 K _ 0 4
3 . 3 V S
A P U _ TH E R MT R I P #
A P U _ S I C
A P U _ S I D
3 . 3 V
A P U _ TA L E RT #
R2 2 1K _ 04
R2 4 1K _ 04
R2 0 1K _ 04
R1 7 1K _ 04
P RO C HO T #
H DM I B_ D 2B P 2 1
O N_ VA R Y
O N_ D I GO N
O N_ BL O N
H DM I B_ D 2B N 2 1
H D MI B_ C L K BP 2 1
H D MI B_ C L K BN 2 1
L VDS -L 2P 2 0
L VDS -L 2N 2 0
L VDS -L 1P 2 0
L VDS -L 0N 2 0
L VDS -L 0P 2 0
L VDS -L 1N 2 0
HD MI _ D D C_ C LK 2 1
HD MI _ D D C_ D A T A 2 1
HD MI _ D D C_ D A T A
HD MI _ D D C_ C LK
R 6 7 * 1 0K _ 04
R 6 8 * 1 0K _ 04
R5 6
1 K _ 0 4
HD MI
LVD S
C 2 2
* 1 5 0p F _ N P O _ 50 V _0 4 0 2
C 2 1
* 1 50 p F _ N P O _ 50 V_ 0 4 0 2
R5 2
1 K _ 0 4
R 5 98 0 _ 0 4
L D T RS T_ R
L D T P W R GD _ R
R3 7 1 K _0 4
Reserve
R2 5 0_ 0 4
R6 1 1 K _ 0 4 A P U _ T CK
1 . 8 V S
AP U _ TD I
AP U _ TM S
AP U _ TC K
AP U _ TD O
AP U _ TR S T #
R6 3 1 K _ 0 4 A P U _ T MS
R6 4 1 K _ 0 4
AP U _ S I C
AP U _ S I D
A P U _ T DI
A P U _ T DO
R 3 0
4 9 9 _1 % _ 0 4
DB RD Y
DB RE Q #
S B_ P RO C HO T # 1 7
CP U _ VD DN B_ RU N _ F B_ H 35
P R OC H OT #
A P U _B P 1 _ T S T UP D _ US CL K 1
A P U_ P W RG D
A P U _T E S T 1 8_ P L L T E S T 1
A P U _T E S T 2 5_ L _ BY P AS S CL K
A P U _T E S T 1 9_ P L L T E S T 0
A P U _T E S T 2 5_ H _ BY P A S S C L K
A P U _T E S T 3 3_ L _ M _C L K T S T _ L
A P U _T E S T 3 3_ H _ M_ C L K T S T _ H
A P U _T E S T 3 5
A P U _T H E R MD A
R 6 2 *1 0 0 K _ 0 4
A P U _T H E R MD C
AP U _ TH E R MT R I P #
C P U _V DD N B_ RU N_ F B _ L 3 5
C P U _V DD 0 _ RU N_ F B_ L 3 5
LV DS _ D D C_ D A T A 2 0
LV DS _ D D C_ C LK 2 0
LV DS _ D D C_ D A T A
LV DS _ D D C_ C LK
DA C _ RS E T
L DT R S T _ R
L DT P W RG D_ R
ON _ D I GO N
L D T_ R S T #
ON _ V A R Y
ON _ BL O N
P R OC HO T #
ON D P _ CA LR
ON _ D MA A CT I V E #
VD DC R_ C P U _S E N S E
VD DI O _ S U S _ S E N S E
VD DC R_ N B_ S E N S E
VS S _ S E NS E
R3 9 1 K _0 4
R 2 1 1 5 0 _ 1% _ 0 4
R 12 1 K _ 0 4
R 5 92 1 0 0 K _ 0 4
R 14 3 0 0_ 1 % _ 0 4
R 6 0 *1 0 0 K _ 0 4
P RO C HO T # 1 5
R 11 1 K _ 0 4
A P U_ P W R GD
U4 4 * 74 AH C 1 G0 8 GW
1
2
5
4
3
L DT _ R S T #_ BUF
A P U _ P W R G D_ BU F
R 3 4 0 _ 0 4
R 3 3 0 _ 0 4
L DT _ R S T #_B UF
1. 8V S
N B_ E N A V D D 2 0
R 13
3 0 0_ 1 % _ 0 4
S MC _ CP U_ T HE RM 1 6 , 1 7 , 2 7
S MD _ CP U_ T HE RM 1 6 , 1 7 , 2 7
R 4 5 *1 0 m i l _s h o rt_ 0 4
C P U _V DD 0 _ RU N_ F B_ H 3 5
C 84 0
0 . 1 u _1 6 V _ Y 5 V _ 0 4
BL O N 2 0
R 1 6 0 _ 0 4
R 4 6 *1 0 m i l _s h o rt_ 0 4
C P U_ S V C
H DT _ T RS T #
D A C_ R E D 2 1
D A C_ B LU E 2 1
D A C_ G R E E N 2 1
R2 7 1 5 0_ 1 % _ 0 4
R2 8 1 5 0_ 1 % _ 0 4
R 4 8 *1 0 m i l _s h o rt_ 0 4
R2 9 1 5 0_ 1 % _ 0 4
A P U _ P W R G D_ BU F
DI S P _ CL K N 1 5
DI S P _ CL K P 1 5
R 4 9 *1 0 m i l _s h o rt_ 0 4
U4 5 * 74 AH C 1 G0 8 GW
1
2
5
4
3
1. 8V S
Sheet 3 of 41
ONTATIO
DISPLAY/ CLK/
MISC
Schematic Diagrams
ONTARIO POWER & DECOUPLING B - 5
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
ONTARIO POWER & DECOUPLING

1 . 8 VS
C 8 4
1 8 0 P _ 5 0 V _ N P O _0 4
C7 7
1 0 u _6 . 3 V _X5 R _ 0 6
C 76
1 0 u _ 6 . 3 V _ X5 R_ 0 6
C 7 8
1 0u _ 6 . 3 V_ X5 R _0 6
C 7 9
1 0 u _ 6 . 3 V _ X5 R_ 0 6
VD DC R _C P U
C8 5
1 8 0 P _ 5 0V _ NP O _ 0 4
C 3 0
10 u _ 6 . 3 V _ X5 R_ 0 6
C 8 9
1 u _ 6 . 3 V _ X5 R_ 0 4
C 9 2
1 u _ 6 . 3 V_ X5 R_ 0 4
C4 6
1 0 u _6 . 3 V _X5 R _ 0 6
C 45
1 0 u _ 6 . 3 V _ X5R _ 0 6
C 9 6
0 . 1 u_ 1 0 V _ X5 R _0 4
C 4 7
1 0u _ 6 . 3 V_ X5 R _0 6
C 94
0 . 1 u _ 1 0 V _ X5R _ 0 4
C 4 8
1 0 u _ 6 . 3 V _ X5 R_ 0 6
C5 0
1 0 u _6 . 3 V _X5 R _ 0 6
C 49
1 0 u _ 6 . 3 V _ X5R _ 0 6
C9 5
0 . 1 u _ 10 V _X5 R _ 0 4
C9 1
1 u _ 6. 3V _ X5 R _ 0 4
C 9 7
0. 1u _ 1 0 V_ X5 R_ 0 4
C 90
1 u _ 6 . 3 V_ X5 R_ 0 4
C 6 8
1 8 0 P _ 5 0 V _ N P O _0 4
C8 6
1 8 0 P _ 5 0V _ NP O _ 0 4
V D DC R _ CP U
3 . 3 V S
C8 7
1 8 0 P _ 5 0 V _ NP O_ 0 4
1 . 5 V
C 3 7
1 0u _ 6 . 3 V_ X5 R _0 6
C 3 8
1 0 u _ 6 . 3 V _ X5 R_ 0 6
C 7 0
1 80 P _5 0 V _ N P O _ 0 4
C 39
1 u _ 6 . 3 V _ X5 R_ 0 4
C6 9
1 8 0 P _ 5 0V _ NP O _ 0 4
C 4 1
0 . 1 u _1 0 V _ X5 R _ 04
C4 0
1 u _ 6 . 3 V _ X5 R_ 0 4
C 4 2
0 . 1 u _ 1 0 V_ X5 R_ 0 4
. L 6 3
HC B1 6 0 8 K F -1 2 1 T 2 5
C 4 3
1 u _ 6 . 3 V _ X5 R_ 0 4
C 5 5
1 u _ 6 . 3 V _ X5 R_ 0 4
C 5 9
0. 1u _ 1 0 V _ X5 R_ 0 4
C 60
0 . 1 u _ 1 0 V _ X5R _ 0 4
C6 1
0 . 1 u _ 10 V _X5 R _ 0 4
C 8 8
0 . 1 u _ 1 0 V _ X5 R_ 0 4
C 6 3
0. 1u _ 1 0 V_ X5 R_ 0 4
C 6 2
0 . 1 u_ 1 0 V _ X5 R _0 4
EMC CAPS
1 . 5 V
V DD P L _ 1 0 1V S
1 V S
ON TA RI O ( 2 .0)
P AR T 5 OF 5
G
R
O
U
N
D
U 1 D
O N TA RI O _ AP U
N1 1 V SS _49
N8 V SS _48
N6 V SS _47
N4
V SS _46
M7 V SS _45
L 2 2 V SS _44
L 2 0 V SS _43
L 1 3
V SS _42
L 1 1 V SS _41
L 8 V SS _40
L 6 V SS _39
L 4
V SS _38
K 1 4 V SS _37
K 1 0 V SS _36
J 2 0 V SS _35
J 7
V SS _34
J 5 V SS _33
J 4 V SS _32
H1 3 V SS _31
H1 1
V SS _30
H6 V SS _29
G2 2 V SS _28
G2 0 V SS _27
G1 2
V SS _26
G9 V SS _25
G7 V SS _24
G5 V SS _23
G4
V SS _22
F 1 3 V SS _21
F 1 1 V SS _20
F 8 V SS _19
E 2 0
V SS _18
E 1 2 V SS _17
E 9 V SS _16
E 7 V SS _15
D1 9
V SS _14
D1 7 V SS _13
B1 5 V SS _12
D1 4 V SS _11
D1 1
V SS _10
D9 V SS _9
D7 V SS _8
D5 V SS _7
C4
V SS _6
B2 2 V SS _5
B1 7 V SS _4
B1 1 V SS _3
B7
V SS _2
A 7 V SS _1
A1 1 V SS BG _D AC
AC 1 3 VS S_97
AC 9 VS S_96
AC 5
VS S_95
AB2 1 VS S_94
AB1 7 VS S_93
AB1 3 VS S_92
AB9
VS S_91
AB5 VS S_90
AB2 VS S_89
AA 2 2 VS S_88
AA 4
VS S_87
Y 1 9 VS S_86
Y 1 7 VS S_85
Y 1 5 VS S_84
Y 1 3
VS S_83
Y 1 1 VS S_82
Y 9 VS S_81
Y 7 VS S_80
Y 5
VS S_79
W 2 0 VS S_78
W 1 2 VS S_77
W 7 VS S_76
W 5
VS S_75
W 4 VS S_74
W 2 VS S_73
W 1 VS S_72
V1 3
VS S_71
V1 1 VS S_70
V9 VS S_69
V8 VS S_68
U2 2
VS S_67
U2 0 VS S_66
U1 2 VS S_65
U7 VS S_64
U5
VS S_63
U4 VS S_62
T 1 3 VS S_61
T 1 1 VS S_60
T 9
VS S_59
T 6 VS S_58
R2 0 VS S_57
R7 VS S_56
R4
VS S_55
P 1 4 VS S_54
P 1 0 VS S_53
N2 2 VS S_52
N2 0
VS S_51
N1 3 VS S_50
ON TA RI O (2.0 )
P AR T 4 OF 5
P
O
W
E
R
U 1C
O NT A RI O _ A P U
U1 6 V DD I O_MEM_S _11
W 1 8 V DD I O_MEM_S _10
R1 9
V DD I O_MEM_S _9
R1 6 V DD I O_MEM_S _8
N1 6 V DD I O_MEM_S _7
L 1 9 V DD I O_MEM_S _6
L 1 6
V DD I O_MEM_S _5
J 1 6 V DD I O_MEM_S _4
E 1 7 V DD I O_MEM_S _3
G1 9 V DD I O_MEM_S _2
G1 6
V DD I O_MEM_S _1
P 1 3 V DD CR _N B_22
P 1 1
V DD CR _N B_21
N1 4 V DD CR _N B_20
M1 3
V DD CR _N B_17
M1 2 V DD CR _N B_16
M1 1 V DD CR _N B_15
L 1 4 V DD CR _N B_14
L 1 2
V DD CR _N B_13
L 1 0 V DD CR _N B_12
K 1 3 V DD CR _N B_11
K 1 1 V DD CR _N B_10
H1 2
V DD CR _N B_9
H9 V DD CR _N B_8
G1 3 V DD CR _N B_7
G1 1 V DD CR _N B_6
F 1 2
V DD CR _N B_5
F 9 V DD CR _N B_4
E 1 3 V DD CR _N B_3
E 1 1 V DD CR _N B_2
E 8
V DD CR _N B_1
R8 V DD CR _C PU _15
N7
V DD CR _C PU _14
M8 V DD CR _C PU _13
M6 V DD CR _C PU _12
L 7 V DD CR _C PU _11
J 8
V DD CR _C PU _10
J 6 V DD CR _C PU _9
H7 V DD CR _C PU _8
H5 V DD CR _C PU _7
G8
V DD CR _C PU _6
G6 V DD CR _C PU _5
F 7 V DD CR _C PU _4
F 5 V DD CR _C PU _3
E 6
V DD CR _C PU _2
E 5 V DD CR _C PU _1
A 4 V DD_33
T 1 2
VD D_1 0_4
V 12 VD D_1 0_3
W 1 3 VD D_1 0_2
U 1 3 VD D_1 0_1
U 1 1 V DD PL _10
W 9
V DD _18_DAC
V 7 VD D_1 8_7
T 7
VD D_1 8_6
W 6 VD D_1 8_5
U 9 VD D_1 8_4
U 6 VD D_1 8_3
W 8
VD D_1 8_2
U 8 VD D_1 8_1
C 9 3
1 u _ 6 . 3 V _ X5 R_ 0 4
C 56
1 u _ 6 . 3 V_ X5 R_ 0 4
C8 7 3
*1 0 u _ 6 . 3 V _ X5 R_ 0 6
C 2 7
1 u _ 6 . 3 V _ X5 R_ 0 4
V D D CR _ CP U
1 . 8 VS
R 7 3 0 _0 4
C5 7
1 u _ 6. 3V _ X5 R _ 0 4
V D D CR _ NB
C 71
1 8 0 P _ 5 0 V _ NP O_ 0 4
C7 2
1 8 0P _ 50 V _N P O _ 0 4
3. 3V S
V D D P L _ 10
C 8 7 4
*1 0 u _ 6 . 3 V _ X5R _ 0 6
1 VS
C 5 8
1 u _ 6 . 3 V_ X5 R_ 0 4
V D DA N_ 1 8 _ DA C
C 2 9
1 u_ 6 . 3 V _ X5 R _ 04
C5 1
10 u _ 6 . 3 V _ X5 R_ 0 6
C6 4
0 . 1 u _ 1 0 V _ X5 R_ 0 4
C8 0
1 u _ 6. 3V _ X5 R _ 0 4
C 8 7 5
* 1 0 u _6 . 3 V _X5 R _ 0 6
C5 3
*2 2 u _ 6 . 3 V _ X5 R_ 0 8
C 4 4
1 0 u _ 6 . 3 V _ X5 R_ 0 6
1. 5V
C 5 2
1 0 u _ 6 . 3 V _ X5 R_ 0 6
C 7 3
0 . 1 u _ 1 0 V _ X5 R_ 0 4
C 5 4
*2 2 u _ 6 . 3 V _ X5R _ 0 8
C 28
* 1 u _6 . 3 V _X5 R _ 0 4
V D DA N _ 1 8 _ DA C
C 8 7 2
*1 0 u _ 6 . 3 V _ X5R _ 0 6
C 7 5
1 0 u _ 6 . 3 V _ X5 R_ 0 6
V DD C R_ N B
C 87 1
* 1 0u _ 6 . 3 V _ X5 R _0 6
C 8 6 9
*1 0 u _ 6 . 3 V _ X5R _ 0 6
C 8 7 0
*1 0 u _ 6 . 3 V_ X5R _ 0 6
C7 4
* 0. 1u _ 1 0 V_ X7 R_ 0 4
C 3 5
1 u _ 6. 3V _ X5 R _ 0 4
C 3 4
1 0u _ 6 . 3 V _ X5 R _0 6
C 36
0 . 1 u _ 1 0 V_ X5 R_ 0 4
VD DC R _N B
C 26
1 u_ 6 . 3 V_ X5 R _ 04
ONTARIO POWER & DECOUPLING
1 . 5 V
1 . 8 V S
C3 1
0. 1u _ 1 0 V_ X5 R_ 0 4
C 6 7
1 80 P _5 0 V _ N P O _ 0 4
C 6 5
0 . 1 u _ 1 0 V _ X5 R_ 0 4
C6 6
* 0 . 1 u _1 0 V _ X7 R _ 04
C 8 1
1 u _6 . 3 V _X5 R _ 0 4
C8 2
1 u _ 6. 3V _ X5 R _ 0 4
C 32
1 0 u _ 6 . 3 V_ X5R _ 0 6
C 3 3
1 u _ 6 . 3 V _ X5 R_ 0 4
C 8 3
*1 u _ 6 . 3 V _ X5 R_ 0 4
Sheet 4 of 41
ONTARIO POWER
& DECOUPLING
Schematic Diagrams
B - 6 INAGUA DDR3 SO-DIMMS A
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
INAGUA DDR3 SO-DIMMS A

+C104
*150u_4V_B_A
MEM_ADDR[15:0] 2,6
INAGUA DDR3 SO-DIMMS A SO-DIMM A
MEM_DATA3
MEM_DATA2
MEM_DATA1
MEM_DATA32
MEM_DATA31
MEM_DATA30
MEM_DATA29
MEM_DATA4
MEM_DATA39
MEM_DATA37
MEM_DATA36
MEM_DATA35
MEM_DATA34
MEM_DATA33
MEM_DATA44
MEM_DATA43
MEM_DATA42
MEM_DATA41
MEM_DATA40
MEM_DATA49
MEM_DATA38
MEM_DATA47
MEM_DATA46
MEM_DATA45
MEM_DATA54
MEM_DATA53
MEM_DATA52
MEM_DATA51
MEM_DATA28
MEM_DATA50
MEM_DATA56
MEM_DATA6
MEM_DATA5
MEM_DATA48
MEM_DATA55
MEM_DATA62
MEM_DATA61
MEM_DATA60
MEM_DATA58
MEM_DATA57
MEM_DATA11
MEM_DATA9
MEM_DATA8
MEM_DATA7
MEM_DATA59
MEM_DATA63
MEM_DATA16
MEM_DATA15
MEM_DATA14
MEM_DATA13
MEM_DATA12
MEM_DATA21
MEM_DATA10
MEM_DATA19
MEM_DATA18
MEM_DATA17
MEM_DATA26
MEM_DATA25
MEM_DATA24
MEM_DATA23
MEM_DATA0
MEM_DATA22
MEM_DATA20
MEM_DATA27
MEM_BANK0 2,6
MEM_BANK2 2,6
MEM_BANK1 2,6
C117
0.1u_16V_Y5V_04
+
C105
*220u_4V_V_A
C123
0.1u_16V_Y5V_04
C111
1u_6. 3V_X5R_04
C120
0.1u_16V_Y5V_04
C112
1u_6. 3V_X5R_04
C107
10u_10V_Y5V_08
C110
1u_6. 3V_X5R_04
C116
0.1u_16V_Y5V_04
C121
0.1u_16V_Y5V_04
C114
0.1u_16V_Y5V_04
C109
1u_6. 3V_X5R_04
C126
1u_6.3V_X5R_04
C119
0.1u_16V_Y5V_04
C99
0.1u_16V_Y5V_04
C106
10u_10V_Y5V_08
C127
1u_6.3V_X5R_04
R75 1K_04
C124
10u_10V_Y5V_08
C108
10u_10V_Y5V_08
J DIMM1A
DDRRK-20401-TR4B
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
BA0
109
BA1
108
RAS#
110
WE#
113
CAS#
115
S0#
114
S1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
SDA
200 SCL
202 SA1
201 SA0
197
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
ODT0
116
ODT1
120
BA2
79
C113
1u_6. 3V_X5R_04
C128
1u_6.3V_X5R_04
C98
1u_6.3V_X5R_04
C115
0.1u_16V_Y5V_04
C118
0.1u_16V_Y5V_04
C125
1u_6.3V_X5R_04
JDIMM1B
DDRRK-20401-TR4B
VDD1
75
VDD2
76
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD11
105
VDD12
106
VDDSPD
199
NC1
77
NC2
122
NCTEST
125
VREF_DQ
1
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16
44
VSS17
48
VSS18
49
VSS19
54
VSS20
55
VSS21
60
VSS22
61
VSS23
65
VSS24
66
VSS25
71
VSS26
72
VSS27
127
VSS28
128
VSS29
133
VSS30
134
VSS31
138
VSS32
139
VSS33
144
VSS34
145
VSS35
150
VSS36
151
VSS37
155
VSS38
156
VSS39
161
VSS40
162
VSS41
167
VSS42
168
VSS43
172
VSS44
173
VSS45
178
VSS46
179
VSS47
184
VSS48
185
VSS49
189
VSS50
190
VSS51
195
VSS52
196
G2
GND2 G1
GND1
VTT2
204 VTT1
203
VREF_CA
126
RESET#
30 EVENT#
198
VDD13
111
VDD14
112
VDD16
118 VDD15
117
VDD17
123
VDD18
124
C122
0.1u_16V_Y5V_04
3.3VS
1.5V
1.5V
1.5V
VTT_MEM
VTT_MEM
1.5V
MEM_RAS# 2,6
MEM_CLK_H1 2
MEM_RESET# 2,6 DIMM0_ODT1 2
MEM_WE# 2,6
MEM_CAS# 2,6
MEM_CLK_L1 2
DIMM0_ODT0 2
MEM_CKE0 2,6
MEM_CLK_H0 2
MEM_DATA[63:0] 2,6
MEM_CKE1 2,6
MEM_EVENT# 2,6
MEM_CLK_L0 2
SDATA0 6,10,16
MEM_DM[7:0] 2,6
20mi ls
MEM_ADDR1
R76 1K_1%_04
R77
1K_1%_04
C LOS E TO S O- DI MM A
C103
0.1u_10V_X5R_04
1.5V MVREF_DIMM0
(REV)4.0mm
MEM_DQS_L0 2,6
MEM_DQS_L7 2,6
MEM_DQS_H7 2,6
MEM_DQS_L5 2,6
MEM_DQS_L1 2,6
MEM_DQS_H1 2,6
MEM_DQS_H2 2,6
MEM_DQS_H6 2,6
MEM_DQS_L2 2,6
MEM_DQS_H4 2,6
MEM_DQS_H5 2,6
MEM_DQS_L6 2,6
MEM_DQS_L3 2,6
MEM_DQS_H0 2,6
MEM_DQS_H3 2,6
MEM_DQS_L4 2,6
MEM_ADDR2
MEM_ADDR3
MEM_ADDR4
MEM_ADDR5
DIMM0_CS#1 2
DIMM0_CS#0 2
MEM_ADDR6
MEM_ADDR7
MEM_ADDR8
MEM_ADDR9
MEM_ADDR10
MEM_ADDR11
MEM_ADDR12
MEM_ADDR13
MEM_ADDR14
SCLK0 6,10,16
MEM_ADDR15
MEM_DM5
MEM_DM6
MEM_DM7
MEM_DM0
MEM_DM2
MEM_DM1
MEM_DM3
MEM_DM4
MVREF_DIMM0
MEM_ADDR0
C100
1u_6.3V_X5R_04
C101
0.1u_10V_X7R_04
C102
1000p_50V_X7R_04
Sheet 5 of 41
INAGUA DDR3 SO-
DIMMS A
Schematic Diagrams
INAGUA DDR3 SO-DIMMS B B - 7
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
INAGUA DDR3 SO-DIMMS B

MEM_DATA34
MEM_DATA33
MEM_DATA32
MEM_DATA31
MEM_DATA30
MEM_DATA29
MEM_DATA4
MEM_DATA3
MEM_DATA2
MEM_DATA1
MEM_DATA28
MEM_DATA50
MEM_DATA49
MEM_DATA38
MEM_DATA47
MEM_DATA46
MEM_DATA45
MEM_DATA44
MEM_DATA43
MEM_DATA42
MEM_DATA41
MEM_DATA40
MEM_DATA39
MEM_DATA37
MEM_DATA36
MEM_DATA35
MEM_DATA59
MEM_DATA63
MEM_DATA62
MEM_DATA61
MEM_DATA60
MEM_DATA58
MEM_DATA57
MEM_DATA56
MEM_DATA6
MEM_DATA5
MEM_DATA48
MEM_DATA55
MEM_DATA54
MEM_DATA53
MEM_DATA52
MEM_DATA51
MEM_DATA0
MEM_DATA22
MEM_DATA21
MEM_DATA10
MEM_DATA19
MEM_DATA18
MEM_DATA17
MEM_DATA16
MEM_DATA15
MEM_DATA14
MEM_DATA13
MEM_DATA12
MEM_DATA11
MEM_DATA9
MEM_DATA8
MEM_DATA7
MEM_DM0
MEM_DM2
MEM_DM1
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
MEM_DATA20
MEM_DATA27
MEM_DATA26
MEM_DATA25
MEM_DATA24
MEM_DATA23
MEM_ADDR0
MEM_ADDR4
MEM_ADDR3
MEM_ADDR2
MEM_ADDR1
MEM_ADDR15
MEM_ADDR14
MEM_ADDR13
MEM_ADDR12
MEM_ADDR11
MEM_ADDR10
MEM_ADDR9
MEM_ADDR8
MEM_ADDR7
MEM_ADDR6
MEM_ADDR5
MVREF_DIMM1
MVREF_DIMM1
R80
1K_1%_04
C156
1u_6. 3V_X5R_04
C134
0.1u_10V_X5R_04
C158
1u_6.3V_X5R_04
C142
1u_6.3V_X5R_04
C137
10u_10V_Y5V_08
C138
10u_10V_Y5V_08
JDIMM2B
DDRRK-20401-TP8D
VDD1
75
VDD2
76
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD11
105
VDD12
106
VDDSPD
199
NC1
77
NC2
122
NCTEST
125
VREF_DQ
1
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16
44
VSS17
48
VSS18
49
VSS19
54
VSS20
55
VSS21
60
VSS22
61
VSS23
65
VSS24
66
VSS25
71
VSS26
72
VSS27
127
VSS28
128
VSS29
133
VSS30
134
VSS31
138
VSS32
139
VSS33
144
VSS34
145
VSS35
150
VSS36
151
VSS37
155
VSS38
156
VSS39
161
VSS40
162
VSS41
167
VSS42
168
VSS43
172
VSS44
173
VSS45
178
VSS46
179
VSS47
184
VSS48
185
VSS49
189
VSS50
190
VSS51
195
VSS52
196
G2
GND2 G1
GND1
VTT2
204 VTT1
203
VREF_CA
126
RESET#
30 EVENT#
198
VDD13
111
VDD14
112
VDD16
118 VDD15
117
VDD17
123
VDD18
124
C133
1000p_50V_X7R_04
C148
0.1u_16V_Y5V_04
C144
1u_6.3V_X5R_04
J DIMM2A
DDRRK-20401-TP8D
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
BA0
109
BA1
108
RAS#
110
WE#
113
CAS#
115
S0#
114
S1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
SDA
200 SCL
202 SA1
201 SA0
197
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
ODT0
116
ODT1
120
BA2
79
C143
1u_6.3V_X5R_04
C131
1u_6.3V_X5R_04
C151
0.1u_16V_Y5V_04
C140
1u_6.3V_X5R_04
C141
1u_6.3V_X5R_04
C145
0.1u_16V_Y5V_04
+
C136
*220u_4V_V_A
C157
1u_6.3V_X5R_04
C129
1u_6.3V_X5R_04
C139
10u_10V_Y5V_08
C159
1u_6. 3V_X5R_04
C150
0.1u_16V_Y5V_04
C132
0.1u_10V_X7R_04
C154
0.1u_16V_Y5V_04
C155
10u_10V_Y5V_08
C152
0.1u_16V_Y5V_04
C130
0. 1u_16V_Y5V_04
C149
0.1u_16V_Y5V_04
C146
0. 1u_16V_Y5V_04
R79 1K_1%_04
C147
0.1u_16V_Y5V_04
C153
0.1u_16V_Y5V_04
1.5V
3. 3VS
1.5V
VTT_MEM
VTT_MEM
1.5V
1.5V
DIMM1_ODT1 2
MEM_RAS# 2,5
MEM_CLK_H3 2
MEM_CAS# 2,5
MEM_CLK_L3 2
MEM_RESET# 2,5
MEM_CLK_H2 2
DIMM1_ODT0 2
MEM_WE# 2,5
MEM_DATA[63: 0] 2,5
MEM_CKE1 2,5
MEM_CKE0 2,5
SDATA0 5,10,16
MEM_EVENT# 2,5
MEM_CLK_L2 2
MEM_BANK0 2,5
MEM_ADDR[15:0] 2,5
MEM_DM[7:0] 2,5
DIMM1_CS#1 2
DIMM1_CS#0 2
MEM_BANK2 2,5
MEM_BANK1 2,5
MEM_DQS_H7 2,5
MEM_DQS_H6 2,5
MEM_DQS_H4 2,5
MEM_DQS_H2 2,5
MEM_DQS_L6 2,5
MEM_DQS_L4 2,5
MEM_DQS_L2 2,5
MEM_DQS_H3 2,5
MEM_DQS_L7 2,5
MEM_DQS_L0 2,5
MEM_DQS_L1 2,5
MEM_DQS_H1 2,5
MEM_DQS_L5 2,5
MEM_DQS_H5 2,5
MEM_DQS_L3 2,5
MEM_DQS_H0 2,5
C LOSE TO SO- DI MM B
INAGUA DDR3 SO-DIMMS B
20mil s
SO-DIMM B
3.3VS
+ C135
560u_2.5V_6. 6*6.6*5. 9
SCLK0 5,10,16
R78 4.7K_04
(REV)8.0mm
SN:6-86-24204-XXX
Sheet 6 of 41
INAGUA DDR3 SO-
DIMMS B
Schematic Diagrams
B - 8 Robson S3 PCIE/ LVDS 1/6
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Robson S3 PCIE/ LVDS 1/6
Sheet 7 of 41
Robson S3 PCIE/
LVDS 1/6
Schematic Diagrams
Robson S3 MAIN 2/6 B - 9
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Robson S3 MAIN 2/6
VBIOS FLASH ROM
R_DAC1
GP I O8
GP IO2 8_ TDO
GP IO2 4_ TRS T B
TMDS _T X1 P 21
TMDS _T X2 N 21
TMDS _T X2 P 21
TMDS _T X1 N 21
GP U_T ALE RT# 10 , 17
TMDS _T X0 P 21
TMDS _T XCN 21
TMDS _T XCP 21
TMDS _T X0 N 21
*5 . 11 K_ 1% _0 6
R 115
S B_MXM_CL KRE Q# *1 0K _ 04 R68 5
ROBS ON_GP I O1 6
N OTE: D es ig ns t hat do not i nc lu de an EEP ROM m us t sti l l pr ovi de
a cc es s to the ROM i nter fac e s i gnal s for debug pur pos es
GE N_ B
1Mbi t SERIAL EEPROM i s r equi red for Par k /Robson GDDR5 Des i gn
(1.0V@110m A DPC_VDD10)
For PX_EN, refertotheBACO
referenceschematics fordetail
(1.8V @20m A TSVDD)
(1.0V@125m A DPLL_VDDC)
(1.8V@75mA DPLL_PVDD)
GND Opti on If
XO_IN/XO_IN2
not used
T S_ F DO
XTALI N
PLA CE VREFG DIV IDER A ND CAP
C LOSE TOASIC
XTALOUT
COMPONENTS SHOWN ARE EXAMPLES ONLY
AND NOT NECESSARILY QUALIFIED
HP D1 21
SCL
S DA
Access to SCL and SDA is
mandatory on BACO designs
for debug purposes
DNI
ROM_S O
HP D_ 4
GP I O10 S CK /W E b
GP I O22
GP I O9
CS b
S I /A1 6
T E ST EN
0. 1"~ 0.5 "
(1.8V@150m A DPC_VDD18)
P X_E N (3.3V @130mA A 2VDD)
For Seymour ,
DPC_ PVDDi s DPC_ VDD18
DPC_ PVSS and al l DPC_VSSR ar e DP_ VSSR
(1.8V @2mA A2VD DQ)
1Mbi t SERIAL EEPROM i s opti onal for Seymour GDDR5 Des i gn
(1.8V @65m A AVD D)
(1.8V @100mA VDD1DI)
(1.8V @100mA V DD2DI)
M EM_ I D1
M EM_ I D0
M EM_ I D2
M EM_ I D3
ME M_ I D0
ME M_ I D1
ME M_ I D2
ME M_ I D3
B_DAC2
G_DAC2
R_DAC2
NC o n Seymou r
DDC1 DAT A 2 1
DDC1 CLK 2 1
DDCDATA_AUX3N
AUX2N
AUX2P
DDC1DAT A
DDCDATA_AUX5N
DDCCLK _ AUX3P
DDC1CL K
AUX1N
AUX1P
DDC6CL K
DDC2DAT A
DDC2CL K
GP I O24 _T RST B
DDC6DAT A 21
DDC6CL K 21
DDCCLK _ AUX5P
DDC6DAT A
GP I O25 _T DI
RB_DAC2
GB_DAC2
BB_ DAC2
GP I O7_ BLON
GP I O26 _T CK
GP I O27 _T MS
S B_MXM_CL KRE Q#
GP I O21
GP I O22
GP I O20
GP I O_1 9_ CTF
Se ymou r
DAC2 i s NC on Se ymo ur
GP I O26 _T CK
GP I O24 _T RS TB
GP I O25 _T DI
HP D1
GP I O28 _T DO
GP I O27 _T MS
GP I O6
GP I O0
GP I O7_ BLON
GP I O13
GP I O12
GP I O1
GP I O11
GP I O10
MXM_S DATA
GP I O9
GP I O8
GP I O2
HP D2
ROBS ON_GP I O1 5
GP U_ TALE RT#
GP I O18 _HP D3
GP I O5
MXM_S CL K
ROBS ON_GP I O15 36
GE N_ A
R71 6 *1 50 _1 %_0 4
G_DAC1
*5. 1 1K _1 %_ 06 R1 16
512Kbit
XTALOUT
XTAL IN
S B_ MXM_ CLK RE Q# 1 6
S B_MXM_CL KR EQ#
*2. 2 K_ 04
R16 7
3. 3 VS _ GPU
XTAL Opt ion
*1u _6 .3 V_X5 R_0 4
C179
*1 0K _ 04 R10 8
*0 . 1u _10 V_X5 R_0 4
C2 03
*1 0K _ 04 R11 0
*10 u_ 6. 3 V_ X5 R_0 6
C1 97
*10 u_ 6. 3V_ X5 R_06
C19 3
*1K _0 4 R11 3
*EN2 5P 0 5-50 GCP
U5
S
1
VCC
8
Q
2
HOL D
7
VS S
4
D
5
C
6
W
3
L 64
*HCB16 08 KF -12 1T 25
*2 2p_ 50 V_NP O_0 4 C2 00
*1u _6 .3 V_X5R_0 4
C1 75
*10 u_ 6. 3V_ X5 R_06
C20 1
*1u _6 .3 V_X5 R_0 4
C188
R71 5 *1 50 _1 %_0 4
L 67
* HCB1 60 8K F -121 T2 5
*0_ 04 R1 02
*0 _04
R1 17
*1 0u _6 .3 V_X5R_0 6
C186
*10 u_6 . 3V_X5R_ 06
C17 4
*1 0u_ 6. 3 V_ X5 R_0 6
C1 80
*1 0K _ 04
R9 8
*0. 1u _1 0V_X5R_ 04
C182
*1 50_ 1% _0 4 R1 03
*4 99 _1% _0 4
R1 12
*2 2p_ 50 V_NP O_0 4 C1 96
R71 7 *1 50 _1 %_0 4 BB_ DAC1
B_DAC1
R94 * 33_ 04
*0. 1 u_1 0V_ X5R_ 04
C17 6
G_DAC1 21
L 70
* HCB1 60 8K F -121 T2 5
*1 0K _ 04 R10 9
B_ DAC1 21
R_DAC1 21
*1 u_ 6. 3V_ X5 R_04
C19 8
HS Y NC_ DAC1 10, 2 1
VS Y NC_DAC1 1 0, 21
*1 0K _ 04 R10 6
*1u _6 .3 V_X5 R_0 4
C185
RB_DAC1
GB_DAC1
R92 * 33_ 04
*4 99 _1 %_0 4
R1 18
*0 . 1u _10 V_X5R_0 4
C1 84
X2
*F SX8L _2 7MHz
1
2
*2 49 _1 %_0 4
R1 20
*71 5_ 1%_ 04 R1 19
*1 0K _0 4
R99
*4 . 7K _0 4
R1 04
L 68
* HCB1 60 8K F -121 T2 5
*1 u_ 6. 3V_ X5R_ 04
C19 0
*1 0K _ 04 R10 7
*0 . 1u _10 V_X5R_0 4
C17 8
L 71
*HCB1 60 8K F-1 21 T2 5
*1 u_ 6. 3V_ X5R_ 04
C18 1
*1K _0 4 R11 4
*1 0K _ 04 R11 1
*1 0u _6 .3 V_X5R_0 6
C183
*0 .1 u_ 10 V_ X5 R_0 4
C1 70
L6 5
*HCB16 08 KF -12 1T 25
L 73
*HCB1 60 8K F-1 21 T2 5
*1u _6 . 3V_X5R_ 04
C194
*0 . 1u _10 V_X5R_0 4
C1 87
*0 . 1u _10 V_X5R_0 4
C1 71
*1u _6 . 3V_X5R_ 04
C17 2
GP I O7_ BLON 20
DP A
DP B
D VO
I 2 C
G ENE RA L PU RPO SE I / O
DA C1
DA C2
DD C/ AU X
THE RM AL
PL L/ CLO CK
DP C
*ROBS ON XT S3
U4 B
DMI NUS
T 2
DPL L_ PVDD
AF1 4
DPL L_ PVS S
AE1 4
DPL L_ VD DC
AD1 4
DPL US
T 4
DPC_ VSS R#1
U1
DVDAT A_ 7
AC7
T X2 M_DP C0N
Y 2
TXCCM_DP C3N
U5
DPC_ VSS R#5
AA1
TX1P _DP C1 P
Y 4
DVDAT A_ 0
Y 7
T X0 M_DP C2N
V2
DPC_ VDD18 #1
AC6
DPC_ P VDD
W 6
DVDAT A_ 9
AD7
TX2P _DP C0 P
AA3
DVDAT A_ 8
AC8
DPC_ VDD10 #1
AA5
DVDAT A_ 12
AE 8
DPC_ VDD10 #2
AA6
DVCNT L_ 0
AE 9
DVDAT A_ 3
AB4
DVDAT A_ 1
Y 8
DVDAT A_ 11
AD9
DVDAT A_ 2
AB2
DVDAT A_ 10
AC1 0
DPC_ VDD18 #2
AC5
T XCCP _DP C3 P
V4
DVDAT A_ 4
AB7
DPC_ VSS R#2
W 1
DVDAT A_ 5
AB8
TX0P _DP C2 P
W3
DVDAT A_ 6
AB9
T X1 M_DP C1N
W5
GENE RI CA
AB1 3
GENE RI CB
W 8
GENE RI CC
W 9
GENE RI CD
W 7
GENE RI CE _HP D4
AD1 0
GPI O_ 0
U6
GPI O_ 1
U1 0
GPI O_ 10 _ROMS CK
P 2
GPI O_ 11
N6
GPI O_ 12
N5
GPI O_ 13
N3
GPI O_ 14 _HP D2
Y 9
GPI O_ 15 _P WRCN TL_ 0
N1
GPI O_ 16 _S S IN
M4
GPI O_ 17 _T HERMAL _I NT
R6
GPI O_ 18 _HP D3
W1 0
GPI O_ 19 _CT F
M2
GPI O_ 2
T1 0
GPI O_ 20 _P WRCN TL_ 1
P 8
GPI O_ 21 _BB_E N
P 7
GPI O_ 22 _ROMCS B
N8
GPI O_ 23 _CL KRE QB
N7
GPI O_ 3_ SMBDATA
U8
GPI O_ 4_ SMBCL K
U7
GPI O_ 5_ AC_ BAT T
T 9
GPI O_ 6
T 8
GPI O_ 7_ BL ON
T 7
GPI O_ 8_ ROMSO
P1 0
GPI O_ 9_ ROMSI
P 4
H2 SY NC
AL1 3
HPD1
AC1 4
HSY NC
AH26
J T AG_ TCK
L 3 J T AG_ TDI
L 5
J T AG_ TDO
K 4 J T AG_ TMS
L 1
J T AG_ TRS TB
L 6
DDCDAT A_ AUX3N
AC20 DDCCL K _AUX3 P
AD20
TS _F DO
R5
TS VDD
AD1 7
TS VSS
AC1 7
VRE F G
AC1 6
VSS 1 DI
AD23
VSS 2 DI
AC19
XT AL I N
AM2 8
XT AL OUT
AK2 8
A2 VDD
AE2 0
A2 VDDQ
AE1 7
A2VS SQ
AE1 9
AUX1N
AD4 AUX1 P
AD2
AUX2N
AD11 AUX2 P
AD13
AVDD
AG24
AVS SQ
AE2 2
B
AH24
B2
AK1 0
B2 B
AL9
BB
AG25
C
AH12
COMP
AJ 9
DDC1CL K
AE6
DDC1DAT A
AE5
DDC2CL K
AC11
DDC2DAT A
AC13
DDC6CL K
AC1
DDC6DAT A
AC3
DDCDAT A_ AUX5N
AD16 DDCCL K _AUX5 P
AE1 6
G
AL2 5
G2
AL1 1
G2 B
AJ 1 1
GB
AJ 2 5
R
AM26
R2
AM12
R2 B
AK1 2
R2S E T
AG13
RB
AK2 6
RS E T
AD22
SCL
R1
SDA
R3
TX0 M_DP A2N
AG5 T X0 P_ DPA2 P
AG3
TX1 M_DP A1N
AH1 T X1 P_ DPA1 P
AH3
TX2 M_DP A0N
AK1 T X2 P_ DPA0 P
AK3
TX3 M_DP B2N
AM5 T X3 P_ DPB2 P
AK6
TX4 M_DP B1N
AH6 T X4 P_ DPB1 P
AJ 7
TX5 M_DP B0N
AL7 T X5 P_ DPB0 P
AK8
T XCAM_DP A3N
AF4 TXCAP_ DPA3 P
AF2
T XCBM_DP B3N
AM3 TXCBP_ DPB3 P
AK5
V2 SY NC
AJ 1 3
VDD1 DI
AE2 3
VDD2 DI
AD19
VSY NC
AJ 2 7
Y
AM10
XO_ IN2
AB2 2 XO_ IN
AC2 2
TE S TE N_L EGACY
AF2 4
DVCNT L_ 2
N9
DPC_ VSS R#3
U3
DPC_ P VS S
V6
DPC_ VSS R#4
Y 6
DVCNT L_ 1
L 9
DVCL K
Y 1 1
DP C_CALR
J 8
PX_E N
AB1 6
TE S TE N
K 7
*1 0u _6 . 3V_X5R_ 06
C1 73
R95 * 33_ 04
L 69
* HCB1 60 8K F -121 T2 5
R93 * 33_ 04
*1 0u _6 .3 V_X5R_0 6
C1 89
*0 . 1u _10 V_X5 R_0 4
C1 95
*4. 7 K_ 04
R10 5
*10 K_ 04
R97
*0_ 04 R1 00
*0. 1 u_1 0V_ X5R_ 04
C19 2
L7 2
*HCB1 60 8K F-1 21 T2 5
*1 M_0 4
R1 21
L 66
* HCB1 60 8K F -121 T2 5
* 0. 1u _1 0V_X5R_ 04
C1 99
*1 0u _6. 3 V_X5 R_0 6
C1 77
*1 0K _0 4
R96
*1 0K _0 4
R10 1
*0. 1u _1 0V_X5R_ 04
C191
*1 u_6 . 3V_X5R_ 04
C20 2
DP C_ VDD1 8 1 . 0V_RE G
DP C_ VDD1 0
1. 0 V_ REG
1. 8 V_ REG
DPL L_ PVDD
1. 8 V_ REG
DP LL _P VDD
1 . 8V_RE G
T SVDD
DP LL _VDDC
3. 3VS _GP U
3 . 3VS_ GP U3. 3VS _GP U
3. 3 VS _ GPU
A2VDD
3. 3 VS _G PU
1. 8 V_ RE G
DPC_ VD D18
VDD2DI
A2VDDQ
VDD1 DI
AVDD
1 . 8 V_RE G
DPC_ VDD18
1. 8 V_ RE G
VDD1DI
AVDD
3 . 3 VS_ GP U
VD D2DI
A2VDDQ
A2VDD
GP U_DP LUS 1 0
3. 3 VS _ GPU
S CL 20
GP U_DMI NUS 1 0
S DA 20
GP I O2 1 10
VSY NC_ DAC2 10
HS Y NC_DAC2 1 0
GP I O0 10
GP I O5 10
GP I O2 2 10
GP I O9 10
GP I O2 10
GP I O1 10
GP I O13 10
GP I O12 10
GP I O11 10
MXM_S DATA 10
GE NE RI CC 10
GP I O8 10
ROBS ON_GP I O16 36
MXM_ S CLK 10
Sheet 8 of 41
Robson S3 MAIN 2/
6
Schematic Diagrams
B - 10 Robson S3 MEM Interface 3/6
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Robson S3 MEM Interface 3/6
Sheet 9 of 41
Robson S3 MEM
InTERFACE 3/6

RPD1
*4.99K_ 1%_04
T97
CSHUNT1
*0402_120pF_50V_ 5%
RSER2
*49. 9_1%_ 04
M
E
M
O
R
Y

I
N
T
E
R
F
A
C
E
GDDR5/ DDR3
GDDR5 / DDR3
GDDR5/ DDR3
*ROBSONXTS3
U4C
DQA0_0/DQA_ 0
K27
DQA0_1/DQA_ 1
J 29
DQA0_10/ DQA_10
A28
DQA0_11/ DQA_11
C28
DQA0_12/ DQA_12
E27
DQA0_13/ DQA_13
G26
DQA0_14/ DQA_14
D26
DQA0_15/ DQA_15
F25
DQA0_16/ DQA_16
A25
DQA0_17/ DQA_17
C25
DQA0_18/ DQA_18
E25
DQA0_19/ DQA_19
D24
DQA0_2/DQA_ 2
H30
DQA0_20/ DQA_20
E23
DQA0_21/ DQA_21
F23
DQA0_22/ DQA_22
D22
DQA0_23/ DQA_23
F21
DQA0_24/ DQA_24
E21
DQA0_25/ DQA_25
D20
DQA0_26/ DQA_26
F19
DQA0_27/ DQA_27
A19
DQA0_28/ DQA_28
D18
DQA0_29/ DQA_29
F17
DQA0_3/DQA_ 3
H32
DQA0_30/ DQA_30
A17
DQA0_31/ DQA_31
C17
DQA1_0/DQA_ 32
E17
DQA1_1/DQA_ 33
D16
DQA1_2/DQA_ 34
F15
DQA1_3/DQA_ 35
A15
DQA1_4/DQA_ 36
D14
DQA1_5/DQA_ 37
F13
DQA1_6/DQA_ 38
A13
DQA1_7/DQA_ 39
C13
DQA0_4/DQA_ 4
G29
DQA1_8/DQA_ 40
E11
DQA1_9/DQA_ 41
A11
DQA1_10/ DQA_42
C11
DQA1_11/ DQA_43
F11
DQA1_12/ DQA_44
A9
DQA1_13/ DQA_45
C9
DQA1_14/ DQA_46
F9
DQA1_15/ DQA_47
D8
DQA1_16/ DQA_48
E7
DQA1_17/ DQA_49
A7
DQA0_5/DQA_ 5
F28
DQA1_18/ DQA_50
C7
DQA1_19/ DQA_51
F7
DQA1_20/ DQA_52
A5
DQA1_21/ DQA_53
E5
DQA1_22/ DQA_54
C3
DQA1_23/ DQA_55
E1
DQA1_24/ DQA_56
G7
DQA1_25/ DQA_57
G6
DQA1_26/ DQA_58
G1
DQA1_27/ DQA_59
G3
DQA0_6/DQA_ 6
F32
DQA1_28/ DQA_60
J 6
DQA1_29/ DQA_61
J 1
DQA1_30/ DQA_62
J 3
DQA1_31/ DQA_63
J 5
DQA0_7/DQA_ 7
F30
DQA0_8/DQA_ 8
C30
DQA0_9/DQA_ 9
F27
MVREFDA
K26
MVREFSA
J 26
MEM_ CALRN0
J 25
MEM_ CALRP0
K25
CASA0B
G19
CASA1B
G16
CKEA0
K20
CKEA1
J 17
CLKA0
H26
CLKA0B
H25
CLKA1
G9
CLKA1B
H9
CSA0B_ 0
H22
CSA0B_ 1
J 22
CSA1B_ 0
G13
CSA1B_ 1
K13
WCKA0_0/DQMA_ 0
E32
WCKA0B_0/DQMA_ 1
E30
WCKA0_1/DQMA_ 2
A21
WCKA0B_1/DQMA_ 3
C21
WCKA1_0/DQMA_ 4
E13
WCKA1B_0/DQMA_ 5
D12
WCKA1_1/DQMA_ 6
E3
WCKA1B_1/DQMA_ 7
F4
MAA0_0/ MAA_ 0
K17
MAA0_1/ MAA_ 1
J 20
MAA1_ 2/MAA_10
J 11
MAA1_ 3/MAA_11
J 13
MAA1_ 4/MAA_12
H11
MAA1_ 5/MAA_13/BA2
G11
MAA1_ 6/MAA_14/BA0
J 16
MAA1_ 7/MAA_15/BA1
L15
MAA0_2/ MAA_ 2
H23
MAA0_3/ MAA_ 3
G23
MAA0_4/ MAA_ 4
G24
MAA0_5/ MAA_ 5
H24
MAA0_ 6/MAA0_ 6
J 19
MAA0_ 7/MAA0_ 7
K19
MAA1_0/ MAA_ 8
J 14
MAA1_1/ MAA_ 9
K14
ADBI A0/ODTA0
L18
ADBI A1/ODTA1
K16
RASA0B
G22
RASA1B
G17
EDCA0_ 0/RDQSA_ 0
H28
EDCA0_ 1/RDQSA_ 1
C27
EDCA0_ 2/RDQSA_ 2
A23
EDCA0_ 3/RDQSA_ 3
E19
EDCA1_ 0/RDQSA_ 4
E15
EDCA1_ 1/RDQSA_ 5
D10
EDCA1_ 2/RDQSA_ 6
D6
EDCA1_ 3/RDQSA_ 7
G5
MAA1_8_RSVD
G14 MAA0_ 8/MAA_13
G20
DDBI A0_ 0/WDQSA_ 0
H27
DDBI A0_ 1/WDQSA_ 1
A27
DDBI A0_ 2/WDQSA_ 2
C23
DDBI A0_ 3/WDQSA_ 3
C19
DDBI A1_ 0/WDQSA_ 4
C15
DDBI A1_ 1/WDQSA_ 5
E9
DDBI A1_ 2/WDQSA_ 6
C5
DDBI A1_ 3/WDQSA_ 7
H4
WEA0B
G25
WEA1B
H10
DRAM_ RST
L10
CLKTESTA
K8
CLKTESTB
L7
*0.1u_10V_ X5R_ 04
C206
*51. 1_1%_04
R129
*40. 2_1%_04
R122
*0.1u_10V_X5R_04
C204
*100_04
R123
RSER1
*10_04
*0. 1u_10V_X5R_04
C207
*0. 1u_ 10V_X5R_04
C205
*100_04
R127
*243_1%_ 04 R125
*51.1_1%_04 R128
*40.2_1%_ 04
R126
*243_1%_ 04 R124
MVDDQ
MVDDQ
MVDDQ
QSA0_2B 13
MAA[12..0] 13,14
CKEA0 13
CSA0b_0 13
QSA0_3B 13
CLKA0 13
DQA0_[31. .0] 13
DQMA0_[3..0] 13
QSA0_0B 13
ODTA0 13
MEM_RST 13, 14
QSA0_1B 13
MAA13 13,14
RASA0# 13
WEA0# 13
CASA0# 13
CKEA0
RASA0#
CSA0b_0
CASA0#
CLKA0
ODTA0
QSA1_[3..0] 14
A_BA0 13,14
A_BA2 13,14
A_BA1 13,14
CLKA1#
CASA1#
RASA1#
CLKA0#
CKEA1
WEA1# 14
CKEA1 14
RASA1# 14
DQMA1_ [3. .0] 14
DQMA1_ 2
DQMA1_ 3
DQMA1_ 0
DQMA1_ 1
CLKA1# 14
CASA1# 14
WEA1#
CLKA0# 13
CLKA1 14
CLKA1
ODTA1 14
ODTA1
CSA1b_0 14
CSA1b_0
DQA1_[31. .0] 14
25mm (max)
DQA0_ 10
DQA0_ 3
DQA0_ 20
DQA0_ 19
DQA0_ 4
DQA0_ 22
DQA0_ 21
DQA0_ 24
DQA0_ 23
DQA0_ 5
DQA0_ 11
DQA0_ 0
DQA0_ 26
DQA0_ 25
DQA0_ 28
DQA0_ 27
DQA0_ 12
DQA0_ 6
DQA0_ 30
DQA0_ 29
DQA0_ 8
DQA0_ 1
DQA0_ 7
DQA0_ 2
DQA0_ 9
DQA0_ 31
DQA0_ 14
DQA0_ 13
DQA0_ 18
DQA0_ 17
DQA0_ 16
DQA0_ 15
COMPONENTS SHOWNARE EXAMPLES ONLY
DMEM_ RST
1 0. 0
DDR3 Memory
Interface
F
r
o
m

G
P
U
MAA1_8
DDR3/GDDR3 Memory Stuff Option
WEA0#
MAA6
MAA1
MAA11
MAA9
MAA2
MAA10
MAA0
MAA8
MAA4
MAA7
MAA5
MAA3
DQMA0_ 3
DQMA0_ 0
DQMA0_ 1
DQMA0_ 2
Pl ace al l t hese component s ver y cl ose t o GPU ( Wi t hi n
25mm) and keep al l component cl ose to each Ot her (wi t hi n
5mm) except Rser 2
MAA12
Ra
Ra
Ra
Rb
Rb
Rb
GDDR5
MVDDQ
5mm (max)
QSA1_0B 14
QSA1_3B 14
QSA1_2B 14
QSA0_[3.. 0] 13
QSA1_1B 14
QSA1_3B
QSA1_1B
QSA1_2B
QSA1_0B
MAA13
1.5V/1.8V
25mm (max)
Thi s basi c t opo l ogy s houl d be use d f or DRAM_ RST f o r DDR3/ GDDR5. Thes e
Capaci t or s and Resi st or val ues ar e an exampl e onl y . The Ser i es R and
| | Cap val ues wi l l de pend o n t he DRAM l oad and wi l l have t o be
cal c ul at ed f or di f f e r ent Memor y , DRAM Load and bo ar d t o pass Rese t
Si gnal Spec.
DDR3
DMEM_RST
1.5V
100R
40.2R 40.2R
100R
QSA0_2B
QSA0_3B
QSA0_1B
QSA0_2
QSA0_0
QSA0_1
QSA0_3
QSA0_0B
CLKTESTA
PLACEMVREF DIVIDERS
AND CAPS CLOSE TOASIC
CLKTESTB
r out e 50o hms si n gl e- ende d/ 1 00oh ms d i f f
a nd k eep sho r t
Debug onl y, f or cl oc k ob ser vat i on, i f n ot need ed, DNI
DQA1_ 6
DQA1_ 3
DQA1_ 2
DQA1_11
DQA1_10
DQA1_ 5
DQA1_ 4
DQA1_ 7
DQA1_ 9
DQA1_ 8
DQA1_13
DQA1_12
DQA1_15
DQA1_14
DQA1_23
DQA1_22
DQA1_19
DQA1_18
DQA1_ 0
DQA1_ 1
DQA1_17
DQA1_16
DQA1_21
DQA1_20
DQA1_29
DQA1_28
DQA1_31
DQA1_30
DQA1_27
DQA1_26
DQA1_25
DQA1_24
QSA1_1
QSA1_3
QSA1_2
QSA1_0
Schematic Diagrams
Robson S3 Straps 4/6 B - 11
B
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Robson S3 Straps 4/6
Sheet 10 of 41
Robson S3 Straps
4/6

*2.2K_04
R147
*W83L771AWG
U6
SCLK
8
VDD
1
ALERT
6
THERM
4
SDATA
7
GND
5
D+
2
D-
3 *0_04 R152
*0_04 R153
*10K_04 R145
*10K_04 R135
*0_04 R155
*0_04 R154
R159
*6.8K_1%_04
*2.2K_04 R156
*10K_04 R139
R160
*6.8K_1%_04
*10K_04 R137
*10K_04 R136
*10K_04 R140
*2.2K_04
R146
*0_04 R151
R158 *0_04
*10K_04 R130
Q4
*MTN7002ZHS3
G
D S
*10K_04 R134
*10K_04 R144
*10K_04 R131
Q5
*MTN7002ZHS3
G
D S
*0_04 R150
*10K_04 R133
*10K_04 R138
*10K_04 R132
*1000p_50V_X7R_04
C208
*10K_04 R141
*2200p_50V_X7R_04 C209
*2.2K_04 R157
*10K_04 R143
*10K_04 R142
3.3VS_GPU
3.3VS_GPU
3.3VS_GPU
3.3VS_GPU
3.3VS_GPU
GPIO5 8
GPU_DMINUS 8
GPU_DPLUS 8
HSYNC_DAC1 8,21
VSYNC_DAC1 8,21
GENERICC 8
GPIO22 8
VSYNC_DAC2 8
HSYNC_DAC2 8
GPIO8 8
GPIO2 8
GPIO1 8
GPIO0 8
GPIO21 8
GPIO9 8
GPIO13 8
GPIO12 8
GPIO11 8
MXM_SCLK 8
MXM_SDATA 8
SCLK0 5, 6,16
SDATA0 5, 6,16
MXM_RST# 7
SMC_VGA_THERM 27
SMD_VGA_THERM 27
GPU_TALERT# 8, 17
W250BAQ
GP IO0 1
GP IO1 1
VGA_ALERT#27
GP IO2 0
GP IO8 0
GP IO9 0
GP IO11 1
GP IO12 0
GP IO13 0
VSY NC_DAC1 1
HSY NC_DAC1 1
GENERICC 1
VSY NC_DAC2 0
HSY NC_DAC2 0
GP IO21 0
GP IO22 0
GP IO5 1
MXM_SDATA
MXM_SCLK
MXM_SCLK
3.3VS_GPU
MXM_SDATA
SEE DA TABOOK FOR DE TA IL
SMBus gating circuit
X HSYNC
ALLOW FOR PULLUP PADS FOR THESESTRAPS AND IF THESEGPI OS ARE USED,
THEY MUST NOT CONFLICT DURI NG RESET
X
AUD[1]
GPI O1
TX_PWRS_ENB PCIEFULLTXOUTPUTSWING GPI O0
EN ABLE EXTER NA L BIOS R OM
X X X
PCIETRANSMITTERDE-EMPHASIS ENABLED TX_DEEMPH_EN
BIF_VGADIS VGAENABLED GPI O9 0
X
X
IGNOREVIP DEVICESTRAPS(RemovedonSeymour/Whistler) V2SYNC VIP_DEVICE_STRAP_ENA
PIN DESCRIPTIONOF DEFAULTSETTINGS STRAPS
GPIO_22_ROMCSB
RECOMMENDEDSETTINGS
0=DONOTINSTALLRESI STOR
1=I NSTALL3K RESISTOR
X=DESIGNDEPENDANT
NA =NOTAPPLICABLE
SER IAL ROM TYP E OR MEMORY AP ER TUR E S IZE S ELEC T ROMIDCFG(2:0) GPIO[13: 11]
BIOS_ROM_EN
CONFIGURATION STRAPS-- SEE EACH DATABOOK FOR STRAP DETAILS
H2SYNC
AUD[0] X VSYNC
X
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT I NST ALL RESI STOR. IF THESE GPI OSARE USED,
THEY MUST KEEP "LOW" AND NOT CONFLICT DURI NG RESET .
NOTE1: AMD RESERVED CONFIGURATI ON STRAPS
GPIO21 GENERICC
0 RESERVED GPI O2 RSVD
PIN STRAPS
GPI O8 RSVD
GPUThermal Sensor
GPI O21 RSVD
0 RESERVED
RSVD
0 RESERVED
GENERICC RSVD
0 RESERVED H2SYNC
GPIO2
SEE DA TABOOK FOR DE TA IL
0 RESERVED
GPIO21 MUST BE LOW DURING PERSTB WHEN BEING USED TO CONTROL MVDDQ
GPIO8
Schematic Diagrams
B - 12 Robson S3 Power 5/6
B
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Robson S3 Power 5/6
Sheet 11 of 41
Robson S3 Power
5/6

*150_1%_04 R163
GND
*ROBSONXTS3
U4E
PCIE_VSS#1
AA27
PCIE_VSS#10
AF32
PCIE_VSS#11
AG27
PCIE_VSS#12
AH32
PCIE_VSS#13
K28
PCIE_VSS#14
K32
PCIE_VSS#15
L27
PCIE_VSS#16
M32
PCIE_VSS#17
N25
PCIE_VSS#18
N27
PCIE_VSS#19
P25
PCIE_VSS#2
AB24
PCIE_VSS#20
P32
PCIE_VSS#21
R27
PCIE_VSS#22
T25
PCIE_VSS#23
T32
PCIE_VSS#24
U25
PCIE_VSS#25
U27
PCIE_VSS#26
V32
PCIE_VSS#27
W25
PCIE_VSS#28
W26
PCIE_VSS#29
W27
PCIE_VSS#3
AB32
PCIE_VSS#30
Y25
PCIE_VSS#31
Y32
PCIE_VSS#4
AC24
PCIE_VSS#5
AC26
PCIE_VSS#6
AC27
PCIE_VSS#7
AD25
PCIE_VSS#8
AD32
PCIE_VSS#9
AE27
VSS_MECH#1
A32
VSS_MECH#2
AM1
VSS_MECH#3
AM32
GND#1
A3
GND#10
AD8
GND#11
AE7
GND#12
AG12
GND#13
AH10
GND#14
AH28
GND#15
B10
GND#16
B12
GND#17
B14
GND#18
B16
GND#19
B18
GND#2
A30
GND#20
B20
GND#21
B22
GND#22
B24
GND#23
B26
GND#24
B6
GND#25
B8
GND#26
C1
GND#27
C32
GND#28
E28
GND#29
F10
GND#3
AA13
GND#30
F12
GND#31
F14
GND#32
F16
GND#33
F18
GND#34
F2
GND#35
F20
GND#36
F22
GND#37
F24
GND#38
F26
GND#39
F6
GND#4
AA16
GND#40
F8
GND#41
G10
GND#42
G27
GND#43
G31
GND#44
G8
GND#45
H14
GND#46
H17
GND#47
H2
GND#48
H20
GND#49
H6
GND#5
AB10
GND#50
J 27
GND#51
J 31
GND#52
K11
GND#53
K2
GND#54
K22
GND#55
K6
GND#56
M6
GND#57
N11
GND#58
N12
GND#59
N13
GND#6
AB15
GND#60
N16
GND#61
N18
GND#62
N21
GND#63
P6
GND#64
P9
GND#65
R12
GND#66
R15
GND#67
R17
GND#68
R20
GND#69
T13
GND#7
AB6
GND#70
T16
GND#71
T18
GND#72
T21
GND#73
T6
GND#74
U15
GND#75
U17
GND#76
U20
GND#77
U9
GND#78
V13
GND#8
AC9
GND#79
V16
GND#80
V18
GND#81
Y10
GND#82
Y15
GND#83
Y17
GND#84
Y20
GND#9
AD6
GND#85
R11
GND#86
T11
L75
*HCB1608KF-121T25
L74
*HCB1608KF-121T25
*1u_6.3V_X5R_04
C214
*1u_6.3V_X5R_04
C215
*0.1u_10V_X5R_04
C221
L77
*HCB1608KF-121T25
*0.1u_10V_X5R_04
C213
*0.1u_10V_X5R_04
C210
*10u_6.3V_08_H125
C218
*1u_6.3V_X5R_04
C217
*0.1u_10V_X5R_04
C216
*10u_6.3V_08_H125
C219
*10u_6.3V_08_H125
C211
DP PLL POWER
DP A/ B POWER DP E/ F POWER
*ROBSONXTS3
U4G
DPA_PVDD
AG8
DPA_PVSS
AG7
DPA_VDD10#1
AF6
DPA_VDD10#2
AF7
DPA_VDD18#1
AE11
DPA_VDD18#2
AF11
DPA_VSSR#1
AE1
DPA_VSSR#2
AE3
DPA_VSSR#3
AG1
DPA_VSSR#4
AG6
DPA_VSSR#5
AH5
DPAB_CALR
AE10
DPB_PVDD
AG10
DPB_PVSS
AG11
DPB_VDD10#1
AF8
DPB_VDD10#2
AF9
DPB_VSSR#1
AF10
DPB_VSSR#2
AG9
DPB_VSSR#3
AH8
DPB_VSSR#4
AM6
DPB_VSSR#5
AM8
DPB_VDD18#1
AE13
DPB_VDD18#2
AF13
DPE_PVDD
AG18
DPE_PVSS
AF19
DPE_VDD10#1
AG20
DPE_VDD10#2
AG21
DPE_VDD18#1
AG15
DPE_VDD18#2
AG16
DPE_VSSR#1
AG14
DPE_VSSR#2
AH14
DPE_VSSR#3
AM14
DPE_VSSR#4
AM16
DPE_VSSR#5
AM18
DPEF_CALR
AF17
DPF_PVDD
AG19
DPF_PVSS
AF20
DPF_VDD10#1
AF22
DPF_VDD10#2
AG22
DPF_VDD18#1
AF16
DPF_VDD18#2
AG17
DPF_VSSR#1
AF23
DPF_VSSR#2
AG23
DPF_VSSR#3
AM20
DPF_VSSR#4
AM22
DPF_VSSR#5
AM24
*1u_6. 3V_X5R_04
C220
*10u_6.3V_08_H125
C212
L76
*HCB1608KF-121T25
*150_1%_04 R162
DPAB_VDD18
DPAB_VDD18
1.8V_REG
DPEF_VDD18
DPEF_VDD18
DPEF_VDD18 1.8V_REG
DPEF_VDD10
1.0V_REG
DPAB_VDD10
DPAB_VDD10
DPEF_VDD18
1.0V_REG
DPAB_VDD18
DPAB_VDD18
DPEF_VDD10
PARK/ROBSON- S3 (DP Power)
( 1. 8V@300mADPEF_VDD18)
(1. 0V@220mA DPEF_VDD10)
DP mode
LVDS mode
DP mode
LVDS mode ( 1. 0V@240mA DPEF_VDD10)
(1. 8V@440mA DPEF_VDD18)
( 1.8V@300m A DPAB_VDD18 )
( 1.0 V@220 mA DPAB_VDD1 0)
Schematic Diagrams
Robson S3 Power 6/6 B - 13
B
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Robson S3 Power 6/6

1.0V_REG
2A 80mil
*1 u_ 6. 3 V_X 5R _0 4
C28 9
*1 0u _ 6. 3 V_0 8_ H1 25
C2 99
*1 u_ 6 . 3V_ X5 R_ 04
C23 2
*1 u_ 6. 3 V_X5R _0 4
C2 84
*1 0u _6 . 3V_ 0 8_ H12 5
C25 2
* 0. 1 u_ 1 0V_ X5 R_ 04
C2 4 1
* 1u _6 . 3 V_ X5R _ 0 4
C2 5 8
L 82
*HC B1 6 08 K F -12 1T 25
*0 .1 u _1 0V_ X5 R_ 04
C2 91
*1 u_ 6. 3 V_X5 R_0 4
C2 3 4
*1u _ 6. 3 V_X5R_ 0 4
C 32 3
*1 u_ 6. 3 V_X5 R _0 4
C31 1
* 10 u_ 6. 3 V_0 8 _H1 2 5
C24 8
*1 u _6 . 3V_ X5 R_ 04
C26 3
*1 u_ 6 .3 V_ X5 R_0 4
C3 14
*1 0u _ 6. 3 V_0 8_ H1 25
C2 98
*0 . 1 u_ 10 V_X 5 R_0 4
C22 7
*1 u_ 6. 3 V _X5R _0 4
C 27 3
*1 u_ 6 . 3V_ X5 R_ 04
C3 12
*1 u_ 6. 3 V _X5 R_0 4
C2 79
* 1u _6 . 3 V_ X5R _ 0 4
C2 74
N C1
S H ORT
*1 0u _ 6. 3 V _0 8_ H1 25
C3 02
* 0. 1 u_ 1 0V_ X5 R_ 04
C2 2 9
*1u _ 6. 3 V_X 5R _0 4
C2 44
* HCB 1 60 8K F -1 21 T2 5 L7 9
*1 0u _ 6. 3 V_0 8_ H1 25
C24 5
* 0. 1 u_ 1 0V_ X5 R_ 04
C22 2
* 1u _6 . 3 V_ X 5R_ 0 4
C2 6 8
*0 . 1u _ 10 V_X5R _ 0 4
C2 26
C3 0 5
*1 u _6 . 3V_ X5 R_ 04
*1 u_ 6. 3 V_X 5R _0 4
C27 5
*1 u_ 6. 3 V _X5 R_0 4
C 25 4
*1 0u _6 . 3 V_ 0 8_ H1 25
C2 6 0
* 0. 1 u_ 1 0V_ X5 R_ 04
C2 23
* 1u _6 . 3V_ X5R_ 04
C3 07
L 7 8
*HC B1 6 08 K F-1 2 1T 25
* 1u _6 . 3 V_ X 5R_ 0 4
C 23 3
*1 u_ 6. 3 V_X 5R _0 4
C 26 2
*1 u _6 . 3V_ X5 R_ 04
C3 10
* 0. 1 u_ 10 V_X5 R _0 4
C3 24
*1u _6 . 3 V_ X5R_ 0 4
C27 1
C 30 4
*1 u _6 . 3V_ X5 R_ 04
L8 0 * HCB 1 60 8K F -1 21 T2 5
*1 u _6 . 3V_ X5 R _ 04
C2 88
*1 0u _ 6. 3 V_0 8_ H1 25
C3 16
*1 u_ 6. 3 V_X5R _0 4
C2 5 9
*1 u_ 6 . 3V_ X5 R_ 04
C2 80
* 1u _6 . 3V_ X5R_ 04
C2 8 7 *1 0u _ 6. 3 V_0 8_ H1 25
C27 6
*1 u_ 6. 3 V_X5R _0 4
C2 42
*1 0u _6 . 3 V_ 0 8_ H1 25
C32 2
*1 u _6 . 3V_ X5 R _ 04
C2 8 2
* 10 u_ 6. 3 V_0 8 _H1 2 5
C2 61
* 1u _6 . 3 V_ X 5R_ 0 4
C3 09
*1 u_ 6. 3 V_X 5 R_0 4
C2 56
*1 u_ 6. 3 V_X5R _0 4
C2 55
*1 0u _6 . 3 V_ 0 8_ H1 25
C 31 7
*10 u _6 . 3V_ 08 _ H12 5
C24 9
*1 0 u_ 6. 3 V _0 8_ H1 25
C3 0 3
R16 4 * 10 mi l_ s ho rt
* 0. 1 u_ 10 V_X5 R_0 4
C22 4
*1 0u _ 6. 3 V_0 8_ H1 25
C3 15
*1 u _6 . 3V_ X5 R_ 04
C2 65
*1 u _6 . 3V_ X5 R_ 04
C3 21
*0 . 1u _ 10 V_X5R _0 4
C 24 0
* 1u _6 . 3V_ X5 R_ 04
C2 43
P
O
W
E
R
PLL
PCI E
CORE
MEMI /O
MEMCLK
I/ O
LEVEL
TRANSLATI ON
ISOLATED
CORE I/ O
*R OBS ON XT S3
U4D
P CI E _ P VD D
A M3 0
NC _MP V 1 8
L 8
S P V18
H7
P CI E _ VDDC#1
L 2 3
P CI E _VDD C#1 0
T 2 2
P CI E _VDD C#1 1
U 22
P CI E _VDD C#1 2
V 2 2
P CI E _ VDDC#2
L 2 4
P CI E _ VDDC#3
L 2 5
P CI E _ VDDC#4
L 2 6
P CI E _ VDDC#5
M 22
P CI E _ VDDC#6
N 22
P CI E _ VDDC#7
N 23
P CI E _ VDDC#8
N 24
P CI E _ VDDC#9
R 22
P CI E _ VDDR #1
A B2 3
P CI E _ VDDR #2
A C2 3
P CI E _ VDDR #3
A D2 4
P CI E _ VDDR #4
A E 2 4
P CI E _ VDDR #5
A E 2 5
P CI E _ VDDR #6
A E 2 6
P CI E _ VDDR #7
A F 2 5
P CI E _ VDDR #8
A G2 6
S P V10
H8
S P VS S
J 7
V DDR 1#1
H1 3
V DDR 1#10
K 2 4
V DDR 1#11
K 9
V DDR 1#12
L1 1
V DDR 1#13
L1 2
V DDR 1#14
L1 3
V DDR 1#15
L2 0
V DDR 1#16
L2 1
V DDR 1#17
L2 2
V DDR 1#2
H1 6
V DDR 1#3
H1 9
V DDR 1#4
J 1 0
V DDR 1#5
J 2 3
V DDR 1#6
J 2 4
V DDR 1#7
J 9
V DDR 1#8
K 1 0
V DDR 1#9
K 2 3
V DDR 3#1
A A1 7
V DDR 3#2
A A1 8
V DDR 3#3
A B1 7
V DDR 3#4
A B1 8
V DDR 4#1
V1 2
V DDR 4#2
Y 1 2
NC _VDDR HA
L1 7
NC _VS S RHA
L1 6
V DD_ CT #1
A A2 0
V DD_ CT #2
A A2 1
V DD_ CT #3
A B2 0
V DD_ CT #4
A B2 1 VDDC#1
A A1 5
VDD C#1 0
T 1 7
VDD C#1 1
T 2 0
VDD C#1 2
U 13
VDD C#1 3
U 16
VDD C#1 4
U 18
BI F _ VDDC#2
U 21
VDD C#1 6
V 1 5
VDD C#1 7
V 1 7
VDD C#1 8
V 2 0
VDD C#1 5
V 2 1
VDDC#2
N 15
VDD C#1 9
Y 13
VDD C#2 0
Y 16
VDD C#2 1
Y 18
VDDC#7
Y 21
VDDC#3
N 17
VDDC#4
R 13
VDDC#5
R 16
VDDC#6
R 18
BI F _ VDDC#1
R 21
VDDC#8
T 1 2
VDDC#9
T 1 5
VDDCI #1
M 13
VDDCI #2
M 15
VDDCI #3
M 16
VDDCI #4
M 17
VDD C#2 2
M 11
VDD C#2 3
M 12
VDDCI #5
M 18
VDDCI #7
M 21 VDDCI #6
M 20
VDDCI #8
N 20
NC #1
A A1 1
NC #3
V1 1
NC #4
U1 1
V DDR 4#3
U1 2
NC #2
A A1 2
* 0. 1 u_ 1 0V_ X5 R _0 4
C3 20
* 1u _6 . 3V_ X5R_ 04
C27 7
*10 u _6 . 3V_ 08 _H 12 5
C25 1
L8 3
*HCB1 60 8 K F-1 2 1T 25
*1 u_ 6. 3 V _X5R _0 4
C 25 7
*1 0 u_ 6. 3 V_0 8 _H1 25
C3 00
*1 u _6 . 3V_ X5 R_ 04
C29 0
*1 u_ 6 . 3V_ X5 R_ 04
C 23 1
* 10 u_ 6. 3 V_0 8 _H1 25
C3 01
* 0. 1 u_ 10 V_X 5 R_0 4
C 26 4
* 1u _6 . 3 V_ X5R _ 0 4
C2 53
*1u _ 6. 3 V _X5R _0 4
C2 83
*1 u_ 6. 3 V_X5R _0 4
C3 1 3
*10 u _6 . 3V_ 08 _H 12 5
C 30 6
*1 u _6 . 3V _ X5 R_ 04
C 28 1
L8 1
* HCB16 0 8K F -12 1 T2 5
*0 . 1 u_ 10 V_X5R _0 4
C30 8
*0 . 1 u_ 10 V_X5 R _0 4
C2 28
*1u _ 6. 3 V_ X5R_ 0 4
C 26 7
* 1u _6 . 3 V_ X5R_ 0 4
C23 0
* 1u _6 . 3V _ X5 R_ 04
C2 69
*1 u_ 6 .3 V_ X5 R _0 4
C2 38
*1 u_ 6. 3 V_X5 R _0 4
C27 2
*0. 1 u _1 0V_ X5 R_ 04
C 22 5
*1 u_ 6. 3 V_X5R _0 4
C2 70
* 1u _6 . 3V_ X 5R_ 04
C 27 8
* 1u _6 . 3V_ X5 R_ 04
C2 35
L 8 4
*HCB1 60 8K F -1 21 T2 5
*1 u_ 6 . 3V_ X5 R_ 04
C2 66
VDD R4
MP V18
3. 3 VS _GP U
1 . 8V _ RE G
VDDR4
S P VS S
P CI E _ VD DR_ VG A
S P V1 8
V DDC _CT
P C I E _ VDDR_ VGA
BIF _ VDDC
1. 0 V_R E G
B I F _ VDDC
1 . 8V_ R E G
1 . 0V_ R E G
VDDCI
VDDC
VDDC
MV DDQ
VDDC
S P VS S
SP V1 8
MP V18
MVDDQ
2.8A 210mil
PCIE_VDDR
400mA 20mil
VDDC
12.9A 520mil
3.3VS_GPU
60mA 4mil
VDDC_CT+VDDR4
187mA 10mil
VDDCI
2A80mil
BIF_VDDC shorts with VDDC if
BACOis notsupported
+
C8 37
* 22 0u _ 4V_ V_ A
VD DC
1. No BACO Suppo rt:
For Seymour,PCIE_ PV DDisPC IE _ VDDR
2. BACO Su pport :
N ote 1
See Not e 1
VDDCI and VDDC share one common regul at or
0.9- 1. 12V @2A ( DDR3) ??( GDDR5)
War ni ng: Select the cor rect Bead to
suppor t expected VDDCI curr ent. See
dat abook f or detail s.
Refer totheBACOreference schematics/Application
notefordetailaboutBIF_VDDC Rail if BACO is
Supported
(Par k : 1.8V @75m A MPV 18)
(1.8V @75mA SPV 18)
Sheet 12 of 41
Robson S3 Power
6/6
Schematic Diagrams
B - 14 Robson DDR3 MEM CH-A
B
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Robson DDR3 MEM CH-A

QS A0_ 0
QS A0_ 0B
DQMA0 _0
VRE F C_U 7
CHANNEL A: 64M X 16 bi t X8 DDR3 (RANK0)
DQMA0 _3
DQMA0 _0
DQMA0 _1
DQMA0 _2
VRE F D_ U8
QS A0 _ 1B
QS A0 _ 2B
VRE F C_ U8
Q SA0 _2
QS A0 _ 3B
Q SA0 _0
Q SA0 _1
Q SA0 _3
QS A0 _ 0B
ODT A0
QS A0_ 0 B 9
MAA 9
M AA1 1
MAA 7
MAA 2
MAA 3
MAA 6
M AA1 0
MAA 8
MAA 1
M AA1 2
MAA 4
MAA 5
MAA 0
MAA 13
D QA 0_ 17
D QA 0_ 20
D QA 0_ 16
D QA 0_ 19
D QA 0_ 21
D QA 0_ 23
D QA 0_ 18
D QA 0_ 22
DQA0 _[2 3. . 1 6] 9
ODT A0
MAA1 1
MAA 9
MAA 6
MAA 7
MAA 8
MAA 3
MAA 0
MAA 2
MAA 1
MAA 5
MAA 4
MAA1 0
VRE F D_U 7
VRE F C_U 7
MAA1 2
VRE F D_U 7
MA A13
MA A2
MAA 1 1
MA A7
MAA 1 3
MA A3
MA A6
MA A8
MAA 1 0
MA A9
V RE FD _U8
V RE FC _U8
MA A0
MA A1
MA A5
MA A4
MAA 1 2
ODT A 0
DQ A0 _ 31
DQ A0 _ 29
DQ A0 _ 30
DQ A0 _ 27
DQ A0 _ 25
DQ A0 _ 28
DQA0_ 8
D QA0_ 12
DQ A0 _ 24
DQ A0 _ 26 D QA0_ 13
D QA0_ 15
D QA0_ 14
D QA0_ 9
D QA0_ 10
DQA0_ 11
QS A 0 _3 B
QS A0 _1 QS A0_ 3
QS A0 _1 B
DQ MA0_ 1 DQMA0 _3
* 4. 9 9K _ 1% _0 4
R1 7 8
*1
0
u_
6.3
V
_X
5
R
_0
6
C3 78
*
0.1
u_
10
V
_X
5
R
_0
4
C3 42
*0
.1u
_1
0V
_
X
5R
_
04
C34 1
*1
u
_6
.3V
_
X5
R
_
04
C3 34
* 4. 9 9K _ 1% _0 4
R1 7 4
* 4. 9 9K _ 1% _0 4
R1 7 0
*0
.1u
_1
0V
_
X
5R
_
04
C36 2
*4 . 99 K _1 %_ 04
R1 77
*
0.1
u_
10
V
_X
5
R
_0
4
C3 63
*4 . 99 K _1 %_ 04
R1 73
*1
0
u_
6.3
V
_X
5R
_0
6
C3 76
*0
.1
u
_1
0V
_
X
5R
_
04
C36 0
* 0. 1 u_ 10 V_X5R _0 4
C 32 9
*4 . 99 K _1 %_ 04
R1 69
*24 3_ 1 %_ 04 R1 65
* 4. 9 9K _ 1% _0 4
R1 8 2
*1u
_
6.3
V_
X
5R
_0
4
C33 3
*1
u_
6.3
V
_X
5R
_0
4
C33 7
*1
u
_6
.3V
_
X5
R
_
04
C3 55
*4 . 99 K _1 %_ 04
R1 81
*0
.1
u_
10
V
_X
5
R
_0
4
C3 38
*0
.1
u_
10
V
_X
5
R
_0
4
C3 59
*1
u
_6
.3V
_
X5
R
_
04
C3 57
10 0-BA LL
SD RA M DDR3
U 7
* K 4W 1G 16 46 G-BC11
W E
L 3
RAS
J 3
CAS
K 3
CS
L 2
CK E
K 9
CK
J 7
CK
K 7
DQS U
B 7
B A0
M2
B A1
N8
A 2
P 3
A 3
N2
A 4
P 8
A 5
P 2
A 6
R8
A 7
R2
A 8
T 8
A 9
R3
A 10 /A P
L 7
A 11
R7
DQL0
E 3
DQL1
F 7
DQL2
F 2
DQL3
F 8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
V S S Q#D1
D1
VS S #A9
A 9
VS S #E1
E 1 VS S #B3
B 3
NC#J 1
J 1
VDD#B2
B 2
VD D#D9
D9
V DDQ#A1
A 1
V DDQ#A8
A 8
V DD Q#C1
C1
V DD Q#C9
C9
NC#L1
L 1
NC#J 9
J 9
V DDQ#E9
E 9
Z Q
L 8
RE S E T
T 2
DQS L
F 3
DMU
D3 DML
E 7
V S S Q#B1
B 1
V S S Q#B9
B 9
V S S Q#D8
D8
V S S Q#E2
E 2
DQS U
C7
V S S Q#E8
E 8
DQS L
G3
V DDQ#F1
F 1
V S S Q#F9
F 9
V S S Q#G1
G1
V DD Q#H2
H2
V DD Q#H9
H9
V S S Q#G9
G9
V RE F CA
M8
VS S #G8
G8
VD D#G7
G7
ODT
K 1
A 0
N3
A 1
P 7
VDD#K2
K 2
A 12 /B C
N7
VSS #J 2
J 2
VDD#K8
K 8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A 7
DQU5
A 2
DQU6
B 8
DQU7
A 3
DQU0
D7
A 13
T 3
A 14
T 7
A 15
M7
B A2
M3
V RE F DQ
H1
NC#L9
L 9
VD D#N1
N1
VD D#N9
N9
VD D#R1
R1
VD D#R9
R9
VSS #J 8
J 8
VS S #M1
M1
VS S #M9
M9
VS S #P1
P 1
VS S #P9
P 9
VSS #T1
T1
VSS #T9
T9
V DD Q#D2
D2
*0 . 1u _1 0V _ X5 R_ 04
C3 30
*0 . 0 1u _1 6V _ X7 R_ 04
C3 5 3
*10
u
_6
.3V
_
X5
R
_
06
C37 5
*0
.1
u
_1
0V
_
X
5R
_
04
C33 9
* 0. 1 u_ 10 V_X5R _0 4
C 32 5
1 0 0-BA LL
S DR AM DDR3
U8
* K4 W 1G1 6 46 G-BC11
W E
L3
RAS
J 3
CAS
K3
CS
L2
CK E
K9
CK
J 7
CK
K7
DQS U
B7
B A0
M2
B A1
N8
A 2
P3
A 3
N2
A 4
P8
A 5
P2
A 6
R8
A 7
R2
A 8
T8
A 9
R3
A 10 /A P
L7
A 11
R7
D QL0
E3
D QL1
F7
D QL2
F2
D QL3
F8
D QL4
H3
D QL5
H8
D QL6
G2
D QL7
H7
V SS Q #D1
D1
VS S #A9
A9
VS S #E 1
E1 VS S #B3
B3
NC#J 1
J 1
VD D#B2
B2
V DD #D9
D9
VDD Q#A1
A1
VDD Q#A8
A8
VDDQ #C1
C1
VDDQ #C9
C9
NC#L1
L1
NC#J 9
J 9
VDD Q#E 9
E9
Z Q
L8
RE S E T
T2
DQS L
F3
DMU
D3 DML
E7
V S S Q#B1
B1
V S S Q#B9
B9
V SS Q #D8
D8
V S S Q#E 2
E2
DQS U
C7
V S S Q#E 8
E8
DQS L
G3
VDD Q#F 1
F1
V S S Q#F 9
F9
V SS Q #G1
G1
VDDQ #H2
H2
VDDQ #H9
H9
V SS Q #G9
G9
V RE F CA
M8
VS S #G8
G8
V DD #G7
G7
ODT
K1
A 0
N3
A 1
P7
VD D#K 2
K2
A 12 /B C
N7
VS S #J 2
J 2
VD D#K 8
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A 13
T3
A 14
T7
A 15
M7
B A2
M3
V RE F DQ
H1
NC#L9
L9
V DD #N1
N1
V DD #N9
N9
V DD #R1
R1
V DD #R9
R9
VS S #J 8
J 8
VS S #M1
M1
VS S #M9
M9
VS S #P 1
P1
VS S #P 9
P9
VS S #T1
T1
VS S #T9
T9
VDDQ #D2
D2
*1u
_
6.3
V_
X
5R
_0
4
C35 4
*
0.1
u_
10
V
_X
5
R
_0
4
C3 40
*1u
_
6.3
V_
X
5R
_0
4
C35 6
*
0.1
u_
10
V
_X
5
R
_0
4
C3 61
*0 . 1u _1 0V _ X5 R_ 04
C3 26
*5 6_ 04
R18 5
* 24 3_ 1% _0 4 R1 66
*1
u_
6.3
V
_X
5R
_0
4
C35 8
*1
u
_6
.3V
_
X5
R
_
04
C3 36
*1u
_
6.3
V_
X
5R
_0
4
C33 5
*10
u
_6
.3V
_
X5
R
_
06
C37 7
MV DDQ
MV DDQ
MV DDQ
M VD DQ
M VD DQ
MVDD Q
M VD DQ
MVDD Q M VD DQ
MVDDQ
MVDDQ
DQMA 0_ [3. . 0 ] 9
QS A 0_ [3. . 0 ] 9
ODT A0 9
MAA [1 3. . 0 ] 9, 1 4
CL KA 0 # 9
CL KA 0 9
CAS A0 # 9
CK E A0 9
W EA 0 # 9
CLK A0 # 9
CS A0b _0 9
CLK A0 9
RAS A0 # 9
CS A0 b_ 0 9
C LK A0 9
W E A0# 9
C AS A0 # 9
R AS A0 # 9
C LK A0# 9
C KE A0 9
DQA0_ [31 . . 24 ] 9 DQA 0 _[1 5. . 8 ] 9
ME M_ RS T 9, 1 4
A_ BA2 9 ,1 4
ME M_R ST 9, 1 4
A_ BA0 9 ,1 4
A_ BA2 9, 1 4
A_ BA1 9, 1 4
A_ BA0 9, 1 4
A_ BA1 9 ,1 4
QS A0_ 1 B 9
QS A0 _2
DQ MA 0_ 2
QS A0 _2 B
QS A0_ 2 B 9
*5 6_ 04
R18 6
QS A0_ 3 B 9
VRE F D_U 7
VRE F C_U 7
DQ A0 _ 3
DQ A0 _ 4
DQ A0 _ 0
DQ A0 _ 2
DQ A0 _ 5
DQ A0 _ 1
DQ A0 _ 7
DQ A0 _ 6
DQA0 _[7 . . 0 ] 9
VRE F C_ U8
COMPONENTSSHOWN AREEXAMPLES ONLY
ANDNOT NECESSARILY QUALIFIED
VRE F D_ U8
Sheet 13 of 41
Robson DDR3 MEM
CH-A
Schematic Diagrams
Robson DDR3 MEM CH-B B - 15
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Robson DDR3 MEM CH-B

CHANNEL A: 64M X 16 bi t X8 DDR3 (RANK1)
VR EF C_ U12
DQA1 _5
D QA1 _ 3
D QA1 _ 1
DQA1 _7
DQA1 _6
DQA1 _4
DQA1 _2
DQA1 _0 DQA1 _[1 5. . 8] 9
MAA13
QS A1_ 3B
QS A1_ 1B
QS A1_ 2B
QS A1_ 0B
QS A1_ 2B
DQMA1 _2
QS A1_ 2
QS A1 _ [ 3 . . 0] 9
QS A1_ 2
QS A1_ 0
QS A1_ 1
QS A1_ 3
DQA1 _[3 1. . 24 ] 9
DQA1 _[2 3. . 16 ] 9
DQA1 _2 0
DQA1 _1 8
DQA1 _2 1
DQA1 _2 3
DQA1 _1 6
DQA1 _1 7
DQA1 _1 9
DQA1 _2 2
DQA1 _2 4
DQA1 _2 5
DQA1 _2 8
DQA1 _2 6
DQA1 _3 0
DQA1 _3 1
DQA1 _2 9
DQA1 _2 7
+C83 8
* 22 0u _4 V_V_A
QS A1_ 1B 9
MVDDQ
QS A1_ 2B 9
QS A1_ 3B 9
DQ MA1 _ [3 . . 0] 9
QS A1_ 3
QS A1_ 3B
DQMA1 _3
VRE F C_ U11
D QA1 _ 13
D QA1 _ 15
D QA1 _ 8
D QA1 _ 11
D QA1 _ 14
D QA1 _ 10
D QA1 _ 12
D QA1 _ 9
DQA1 _[7 . .0 ] 9
ODT A1
QS A1 _0
QS A1 _0 B
DQ MA1_ 0
*4. 9 9K _ 1% _0 4
R22 4
10 0 -BAL L
S DRAM DDR3
U1 2
*K 4W 1 G16 46 G-BC11
W E
L3
R AS
J 3
C AS
K 3
C S
L2
C KE
K 9
C K
J 7
C K
K 7
D QSU
B7
BA0
M2
BA1
N8
A2
P 3
A3
N2
A4
P 8
A5
P 2
A6
R8
A7
R2
A8
T8
A9
R3
A1 0/ AP
L7
A1 1
R7
D QL0
E 3
D QL1
F 7
D QL2
F 2
D QL3
F 8
D QL4
H 3
D QL5
H 8
D QL6
G 2
D QL7
H 7
VS SQ #D1
D 1
VS S #A9
A9
VS S #E 1
E 1 VS S #B3
B3
N C#J 1
J 1
VDD#B2
B2
VDD #D9
D 9
VDDQ#A1
A1
VDDQ#A8
A8
VDDQ #C1
C 1
VDDQ #C9
C 9
N C#L 1
L1
N C#J 9
J 9
VDDQ#E 9
E 9
ZQ
L8
R ES E T
T2
D QSL
F 3
D MU
D3 D ML
E 7
VS S Q#B1
B1
VS S Q#B9
B9
VS SQ #D8
D 8
VS S Q#E 2
E 2
D QSU
C7
VS S Q#E 8
E 8
D QSL
G3
VDDQ#F 1
F 1
VS S Q#F 9
F 9
VS SQ #G1
G 1
VDDQ #H2
H 2
VDDQ #H9
H 9
VS SQ #G9
G 9
VRE F CA
M8
VS S #G8
G 8
VDD #G7
G 7
O DT
K 1
A0
N3
A1
P 7
VDD#K 2
K 2
A1 2/ BC
N7
VSS #J 2
J 2
VDD#K 8
K 8
DQU1
C 3
DQU2
C 8
DQU3
C 2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D 7
A1 3
T3
A1 4
T7
A1 5
M7
BA2
M3
VRE F DQ
H1
N C#L 9
L9
VDD #N1
N 1
VDD #N9
N 9
VDD #R1
R 1
VDD #R9
R 9
VSS #J 8
J 8
VS S #M1
M 1
VS S #M9
M 9
VS S #P 1
P 1
VS S #P 9
P 9
VSS #T1
T 1
VSS #T9
T 9
VDDQ #D2
D 2
1 00 -BAL L
S DRAM DDR3
U1 1
*K 4 W1 G16 4 6G-BC1 1
W E
L3
R AS
J 3
C AS
K 3
C S
L2
C KE
K 9
C K
J 7
C K
K 7
D QS U
B7
BA0
M2
BA1
N8
A2
P 3
A3
N2
A4
P 8
A5
P 2
A6
R8
A7
R2
A8
T8
A9
R3
A1 0/ AP
L7
A1 1
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VS S Q#D1
D1
VS S #A9
A9
VS S #E1
E1 VS S #B3
B3
N C#J 1
J 1
VDD#B2
B2
VD D#D9
D9
VDDQ#A1
A1
VDDQ#A8
A8
VDD Q#C1
C1
VDD Q#C9
C9
N C#L 1
L1
N C#J 9
J 9
VDDQ#E9
E9
ZQ
L8
R ES E T
T2
D QS L
F 3
D MU
D3 D ML
E 7
VS S Q#B1
B1
VS S Q#B9
B9
VS S Q#D8
D8
VS S Q#E2
E2
D QS U
C7
VS S Q#E8
E8
D QS L
G3
VDDQ#F1
F1
VS S Q#F9
F9
VS S Q#G1
G1
VDD Q#H2
H2
VDD Q#H9
H9
VS S Q#G9
G9
VRE F CA
M8
VS S #G8
G8
VD D#G7
G7
O DT
K 1
A0
N3
A1
P 7
VDD#K2
K2
A1 2/ BC
N7
VSS #J 2
J 2
VDD#K8
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A1 3
T3
A1 4
T7
A1 5
M7
BA2
M3
VRE F DQ
H1
N C#L 9
L9
VD D#N1
N1
VD D#N9
N9
VD D#R1
R1
VD D#R9
R9
VSS #J 8
J 8
VS S #M1
M1
VS S #M9
M9
VS S #P1
P1
VS S #P9
P9
VSS #T1
T1
VSS #T9
T9
VDD Q#D2
D2
*
1u
_6
.3V
_X
5
R
_0
4
C3 9 1
*
10
u_
6.3
V_
X
5R
_
06
C4 3 4
*0.1
u_
10
V
_X
5
R
_0
4
C39 8
*0.1
u_
10
V
_X
5R
_0
4
C41 8
*0
.1u
_1
0V
_
X
5R
_
04
C4 00
COMPONENTS SHOWN ARE EXAMPLES ONLY
*10
u_
6.3
V
_X
5
R
_0
6
C43 5
*1
0u
_6
.3
V
_X
5
R
_0
6
C43 6
*1
u_
6.3
V
_X
5
R
_0
4
C3 95
*24 3_ 1% _0 4
R20 5
*1
u_
6.3V
_
X
5R
_
04
C41 4
MAA13 MAA1 3
QS A1_ 0B 9
MAA2
MAA1 1
MAA7
MAA3
MAA6
MAA1 2
MAA8
MAA1 0
MAA9
VRE F C_U 12
MAA0
MAA1
MAA5
MAA4
VRE F D_U 12
VRE F D_U1 2
VRE F D_U1 1
ODT A1
*56 _0 4
R23 6
* 4. 9 9K _1 %_ 04
R2 3 5
*0 . 1u _1 0V_ X5 R_0 4
C3 87
*
0.1
u_
10
V_
X
5R
_
04
C3 96
*0. 1 u_ 10 V_X5R_ 04
C39 0
*
1u
_6
.3V
_X
5
R
_0
4
C4 1 2
*1
u_
6.3V
_
X
5R
_
04
C39 3
*1
u_
6.3
V
_X
5R
_
0
4
C4 15
*4. 9 9K _ 1% _0 4
R23 2
*24 3_ 1% _0 4
R20 6
*4 .9 9 K_ 1% _0 4
R23 4
*0.1
u_
10
V
_X
5
R
_0
4
C41 9
*1
u_
6.3
V
_X
5
R
_0
4
C4 16
*0
.1u
_1
0V
_
X5
R
_
04
C4 20
*4 .9 9 K_ 1% _0 4
R22 6
*0
.1u
_1
0V
_
X5
R
_
04
C3 99
*0 .0 1u _ 16 V_ X7 R_ 04
C41 1
*0. 1 u_ 10 V_X5R_ 04
C38 8
*0.1
u_
10
V
_X
5R
_0
4
C39 7
*1
0u
_6
.3V
_
X5
R
_
06
C4 37
*
0.1
u_
10
V_
X
5R
_
04
C4 17
* 4. 99 K _1 %_ 04
R2 33
*1u
_6
.3V
_
X5
R
_
04
C41 3
*1
u_
6.3
V
_X
5R
_
0
4
C3 94
*0
.1u
_1
0V
_
X
5R
_
04
C4 21
*0 . 1u _1 0V_ X5 R_0 4
C3 89
*1u
_6
.3V
_
X5
R
_
04
C39 2
* 4. 9 9K _1 %_ 04
R2 2 7
* 4. 99 K _1 %_ 04
R2 25
*56 _0 4
R23 7
MVDDQ
MVDDQ
MVDDQ MVDDQ
MVDDQ
MVDDQ
MVDDQ
MVDDQ
MVDDQ
MVDDQ
DQ MA1 _ 1
QS A1 _1 B
QS A1 _1
MVDDQ
O DTA1 9
MAA[1 3. . 0] 9 ,1 3
ME M_ RS T 9 , 13
A_BA2 9 , 13
ME M_ RS T 9 , 13
A_BA0 9 , 13
A_BA1 9 , 13
A_BA0 9 , 13
A_BA2 9 , 13
A_BA1 9 , 13
C LK A1 9
C LK A1# 9
DQMA1 _0
DQMA1 _1
VRE F D_U1 1
CAS A1 # 9
CK E A1 9
DQMA1 _2
DQMA1 _3
W EA1 # 9
CLK A1 # 9
CS A1b _0 9
CLK A1 9
CS A1 b_ 0 9
RAS A1 # 9
WE A1 # 9
CASA1 # 9
RASA1 # 9
CLK A1 # 9
CK EA1 9
CLK A1 9
VRE F C_ U11
ODT A1
MAA6
MAA2
MAA1 1
MAA9
MAA7
MAA8
MAA1 0
MAA3
MAA0
MAA1
MAA5
MAA4
MAA1
MAA8
MAA7
MAA1 1
MAA9
MAA3
MAA2
MAA0
MAA4
MAA1 2
MAA1 0
MAA6
MAA5
VRE F D_U 11
VRE F C_U 11
MAA1 2
Sheet 14 of 41
Robson DDR3 MEM
CH-B
Schematic Diagrams
B - 16 HUDSON PCIE/ PCI/ CLOCK/ FCH
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
HUDSON PCIE/ PCI/ CLOCK/ FCH

R2 5 5
* 2 0K _ 0 4
3 . 3 VS
P C I _ CL K RUN # 19
2 5M _X1
C_ UM I _ N_ RX1 2
C_ UM I _ P _R X1 2
C_ UM I _ N_ RX0 2
C_ UM I _ P _R X3 2
C_ UM I _ N_ RX2 2
C_ UM I _ P _R X2 2
C_ UM I _ N_ RX3 2
C_ U MI _ P _T X0 2
W 250BAQ addR253, R254
GP I O3 1
D I S P _C LK P 3
AP U _C LK N 3
AP U _C LK P 3
D I S P _C LK N 3
C LK _ P C I E _J MC 2 3
VGA_ P C I E CL K _N 7
VGA_ P C I E CL K _P 7
CL K _ P CI E _ W L AN# 2 4
CL K _ P CI E _ W L AN 2 4
C LK _ P C I E _J MC # 2 3
P CI E _ US B3 0 _C LK N 2 6
P CI E _ US B3 0 _C LK P 2 6
HU DS ON -1 PA RT 1 OF 5
P CI I/ F
PCI EXP RE SS I /F
P CI C LKS
LP C
R TC
CLOCK GEN ERA TOR
C PU
HU DS ON M1 A1 3
U 19 E
L2 7
25M_X2
L2 6
25M_X1
L2 5
14M_25M_48M_OS C
T2 8
GPP _CLK8 N
T2 9
GPP _CLK8 P
N2 7
GPP _CLK7 N
N2 6
GPP _CLK7 P
P 2 8
GPP _CLK6 N
P 2 9
GPP _CLK6 P
M2 5
GPP _CLK5 N
P 2 5
GPP _CLK5 P
L2 3
GPP _CLK4 N
L2 4
GPP _CLK4 P
V2 5
GPP _CLK3 N
T2 5
GPP _CLK3 P
M2 8
GPP _CLK2 N
M2 9
GPP _CLK2 P
N2 8
GPP _CLK1 N
N2 9
GPP _CLK1 P
L2 8
GPP _CLK0 N
L2 9
GPP _CLK0 P
T2 3
S LT_GFX_ CLKN
V2 3
S LT_GFX_ CLKP
T2 1
C PU_H T_C LKN
V2 1
C PU_H T_C LKP
T2 7
N B_HT _CLK N
T2 6
N B_HT _CLK P
U2 8
N B_DI SP _CLK N
U2 9
N B_DI SP _CLK P
P 2 3
P CI E_RC LKN /N B_LNK _CLKN
M2 3
P CI E_RC LKP /N B_LNK _CLKP
W 2 5
GPP _RX3N
W 2 4
GPP _RX3P
V2 4
GPP _RX2N
W 2 3
GPP _RX2P
AA2 4
GPP _RX1N
AA2 5
GPP _RX1P
Y 2 1
GPP _RX0N
AA2 2
GPP _RX0P
W 2 9
GPP _TX3N
W 2 8
GPP _TX3P
Y 2 7
GPP _TX2N
Y 2 6
GPP _TX2P
Y 2 8
GPP _TX1N
Y 2 9
GPP _TX1P
AA2 9
GPP _TX0N
AA2 8
GPP _TX0P
AD2 8
P CI E_CA LRN
AD2 9
P CI E_CA LRP
AB2 4
U MI _RX 3N
AB2 5
U MI _RX 3P
AC2 5
U MI _RX 2N
AC2 4
U MI _RX 2P
AD2 4
U MI _RX 1N
AD2 5
U MI _RX 1P
AE 2 3
U MI _RX 0N
AE 2 4
U MI _RX 0P
AB2 7
U MI _TX 3N
AB2 6
U MI _TX 3P
AB2 8
U MI _TX 2N
AB2 9
U MI _TX 2P
AC2 9
U MI _TX 1N
AC2 8
U MI _TX 1P
AD2 7
U MI _TX 0N
AD2 6
U MI _TX 0P
L 1
A _RST #
P 1
P CI E_RS T#
B
1
VDDBT _RTC _G
B2
IN TR UDE R_ALE RT#
D2
RTC CLK
C2
32K_X2
C1
32K_X1
J 24
LDT_R ST#
G2 2
LDT_S TP#
K 1 9
LDT_P G
H2 1
P ROCHOT#
G2 1
ALLOW_LDT STP / DMA_AC TI VE#
AB1 9
S ER IR Q/ GPI O48
AA1 8
LDR Q1#/ CLK _RE Q6#/ GPI O49
J 25
LDR Q0#
G2 8
LF RAME#
H2 8
LAD3
H2 9
LAD2
J 26
LAD1
J 27
LAD0
H2 5
LPC CLK1
H2 4
LPC CLK0
AJ 4
IN TH#/ GPI O35
AG4
I NT G#/ GPI O34
AG6
IN TF#/ GPI O33
AJ 6
IN TE#/ GPI O32
AD7
LOCK#
AB1 1
CLKR UN#
AB1 2
GNT3#/ CLK _RE Q7#/ GPI O46
AH6
GN T2#/ GP O45
AJ 5
GN T1#/ GP O44
AD1 2
GNT0#
AC1 2
RE Q3#/ CLK _RE Q5#/ GPI O42
AH4
RE Q2#/ CLK _RE Q8#/ GPI O41
AH5
RE Q1#/ GPI O40
AE 1 1
RE Q0#
AE 4
SE RR#
AE 6
PE RR#
AF 5
STOP#
AC5
P AR
AE 7
TR DY#
AJ 3
IR DY#
AB9
DEV SEL#
AE 8
F RAME#
AA1 0
C BE3#
AD8
C BE2#
AD5
C BE1#
AA8
C BE0#
AH3
AD31/ GPI O31
AG2
AD30/ GPI O30
AH2
AD29/ GPI O29
AF 3
AD28/ GPI O28
AF 4
AD27/ GPI O27
AF 6
AD26/ GPI O26
AC1 1
AD25/ GPI O25
AD9
AD24/ GPI O24
AE 9
AD23/ GPI O23
AF 2
AD22/ GPI O22
AG1
AD21/ GPI O21
AF 1
AD20/ GPI O20
AE 3
AD19/ GPI O19
AF 8
AD18/ GPI O18
AE 1
AD17/ GPI O17
AE 2
AD16/ GPI O16
AC6
AD15/ GPI O15
AD2
AD14/ GPI O14
AD1
AD13/ GPI O13
AC1
AD12/ GPI O12
AC4
AD11/ GPI O11
AC3
AD10/ GPI O10
AC2
AD9/ GPI O9
AA6
AD8/ GPI O8
AB5
AD7/ GPI O7
AB6
AD6/ GPI O6
AB2
AD5/ GPI O5
AA5
AD4/ GPI O4
AB1
AD3/ GPI O3
AA3
AD2/ GPI O2
AA4
AD1/ GPI O1
AA1
AD0/ GPI O0
V2
PC IR ST#
Y 1
PC IC LK4/ 14M_OS C/ GP O39
W 4
PC IC LK3/ GP O38
W 3
PC IC LK2/ GP O37
W 1
PC IC LK1/ GP O36
W 2
P CI CLK0
12/9
U1 7
* 74 AH C1 G0 8G W
1
2
5
4
3
A_R S T#_ C
3 . 3VS
J _ RT C1
*8 5 20 5 -0 27 0 1
1
2
R2 5 7
2 0 K _0 4
1 . 8 VS
C4 6 6
* 1u _ 6 . 3V_ X5R _ 04
MXM_ GP I O 1 7 , 3 6
C4 5 3 0. 1 u _1 0 V_ X7 R_ 0 4
P C I E _R XN3 _W L AN 24
P C I E _R XP 3_ W L AN 24
C4 5 4 *0 . 1u _ 1 0V_ X7R _0 4
C4 5 5 *0 . 1u _ 1 0V_ X7R _0 4
X5
F S X5L _ 2 5M HZ
1
2
R2 5 8
2 0K _ 0 4
X3
* MC-1 4 6 _3 2 . 76 8 K Hz
1
4 3
2
5 N A NA
7 US B3 .0 7
2 N A NA
GF X_ CLK MXM G
FC H_GP P D EVI CE CL KRE Q#
1 W LAN 1
8 N A NA
6 N A NA
0 J MC2 61C 0
4 N A NA
R2 4 7 2 0 K _0 4
3 . 3 V
2 5M _X2
C_ U MI _ P _T X2 2
C_ U MI _ P _T X1 2
C_ U MI _ P _T X3 2
C_ U MI _ N_ TX0 2
C_ U MI _ N_ TX2 2
C_ U MI _ N_ TX1 2
L P C_ AD0 1 9, 2 7
C_ U MI _ N_ TX3 2
L P C_ AD3 1 9, 2 7
L P C_ AD1 1 9, 2 7
L P C_ AD2 1 9, 2 7
R 2 53 *3 3 _0 4
R 2 54 *0 _ 04
C 45 9
*1 50 p F _N P O_ 5 0V_ 0 4 02
S B_AR S T #_ GAT E
R 80 5 * 0_ 0 4
Zo= 50O? 5%
GP I O3 0
R2 4 2 22 _ 0 4
R2 4 0 22 _ 0 4
R2 4 3 22 _ 0 4
R2 4 4 22 _ 0 4
P CI _ CL K 3 1 6
P CI _ CL K 2 1 6
P CL K _ K BC 1 6
P CI _ CL K 4 1 6
R2 6 0
1 0 M_ 0 4
C4 6 2
22 p _ 50 V_ NP O _0 4
C4 4 9 *1 50 p F _ NP O_ 5 0V_ 0 4 02
C4 6 3
22 p _ 50 V_ NP O _0 4
HUDSON PCIE/PCI/CLOCK/FCH
3 2K _ X1
I NT RUD E R_ AL E RT #
P CL K _ K BC_ R P CL K _ K BC R5 13 *1 0 _0 4
C7 50
*1 0 p _5 0 V_N P O_ 0 6
C4 6 5 22 P _ 50 V_ NP O _0 4
R 59 5 *1 0K _ 0 4 R 2 63 1 K _ 04
P CI E _ ARS T # 7
LP C _F R AME # 1 9, 27
C4 4 4 0. 1 u _1 0 V_ X7 R_ 0 4
P C LK _ T P M 1 9
R6 8 7 * 10 K _ 0 4
1 0 W 2 5 0BA Q
R 2 52 0 _0 4
R6 8 8 * 10 K _ 0 4
S E RI R Q
R 24 9 5 90
RT C_ VBAT _1
U1 8
* 74 AH C1 G0 8G W
1
2
5
4
3
R2 7 1 * 0_ 0 4 3 N A NA
R2 56
* 20 K _ 04
R2 59
2 0 K _0 4
L DT _ S TP #
C4 6 1
0 . 1u _ 16 V_ Y 5 V_ 04
3 . 3VS
10mils
20mils
20mils
M XM _P W RGD 36
R 25 0 2 K _1 % _0 4
R8 06 *0 _ 0 4
C4 6 7 22 P _ 50 V_ NP O _0 4
R 26 6
1 K _ 04
Reserve
1. 1 VS
X4
1T J S 1 25 DJ 4 A4 20 P _ 32 . 7 6 8K H z
1
4 3
2
P CI _R S T#
R 2 65
* 1 M_ 04
32 K _ X1
C8 2 2 0. 1 u _1 0 V_ X7 R_ 0 4
32 K _ X2
C8 2 3 0. 1 u _1 0 V_ X7 R_ 0 4
P CI E _ RXP 0 _J MC 2 3
P CI E _ RXN0 _ J M C 2 3
A_ RS T #_C
P CI E _ US B 30 _ NB_ RXN 2 6
P CI E _ US B 30 _ NB_ RXP 2 6
P CI E _ RS T #_G AT E 1 6
C4 64 1u _ 6 . 3V_ Y 5 V_ 0 4
C4 4 5 0. 1 u _1 0 V_ X7 R_ 0 4
BT _ ON 2 4, 2 8
F CH _G P P T XN 3
F CH _G P P T XN 0
F CH _G P P T XN 1
F CH _G P P T XP 0
VDD 3
A_ VBAT
F CH _G P P T XP 3
F CH _G P P T XP 1
C4 4 3 0. 1 u _1 0 V_ X7 R_ 0 4
D I S P _ CL K : CP U (no n -s pre a d)
C4 4 6 0. 1 u _1 0 V_ X7 R_ 0 4
C4 5 0 0. 1 u _1 0 V_ X7 R_ 0 4
C4 4 8 0. 1 u _1 0 V_ X7 R_ 0 4
J _R TC 2
AAA-BAT -02 2 -K 0 1
1
2
C4 5 1 0. 1 u _1 0 V_ X7 R_ 0 4
C4 4 7 0. 1 u _1 0 V_ X7 R_ 0 4
GP I O 30
GP I O 31
I NT RUD E R_ AL E RT #
L P CCL K _ 0
L DT _S T P #
L P CCL K _ 1
P CIE _ RST #I S F OR PCI E DE VI CES ON HU DSON
MXM_ GP I O2
MXM_ GP I O1
MXM_ P R E S E NT 2#
P CI E _ RS T #_C
P CI R S T#_ R
MXM_ GP I O0
P C I E _AR S T #I S F O R P C I E DE VI C E S ON F T1
P CI _ CL K 2 _ R
P CI _ CL K 1 _ R
P CI _ CL K 3 _ R
P CI _ CL K 4 _ R
S B_ ARS T #_G ATE
US B3 0 _C L K RE Q#
P CI E _ TXP 0 _ J M C 2 3
CAL RN
CAL RP
U_ RX0 N_ C
U_ RX1 P _ C
U_ RX2 N_ C
U_ RX0 P _ C
U_ RX1 N_ C
U_ RX3 P _ C
U_ RX3 N_ C
U_ RX2 P _ C
GP I O 3 0
0 0 W 2 4 0BU
GP I O 31
3 . 3 V
BOAR D I D
A_ VBAT
R2 6 8 5 1 0_ 1 % _0 4
R2 4 5 *3 3 _0 4
C 45 7
15 0 pF _ N P O_ 50 V_ 04 0 2
P C I E _R S T#_ C
R 2 67
1 M _0 4
M XM _G P I O0 7
P C I E _ RCL K : (S p re ad , F U S I ON M OD E )
P CI E _ TXN 0_ J MC 2 3
P CI E _ NB_ US B 30 _ TXN 2 6
P CI E _ NB_ US B 30 _ TXP 2 6
J OP E N 1
*O P E N_ 1 0m i l -1 M M
1
2
3 2K _ X2
C4 6 8
1 u_ 6 . 3V _X5 R_ 04
R2 4 1 33 _ 04
R8 12 *2 2 _ 04
C_ UM I _ P _R X0 2
C4 4 1 1 50 p F _N P O_ 5 0V_ 0 40 2
VBAT_ I N
W 25 0 BUQ
R 2 51 3 3_ 0 4 BUF _ P L T_ RS T # 1 9, 2 3 , 24 , 2 6 , 27
E C_ RS T # 2 7
R6 8 9 2 2_ 0 4
P C I E _T XP 3_ W L AN 24
C4 5 2 0. 1 u _1 0 V_ X7 R_ 0 4
P C I E _T XN3 _ W LAN 24
MXM_ P R E S E NT 1#
3 . 3V
C4 6 0
0 . 1u _ 16 V_ Y 5 V_ 04
L P C_ CL K 0 1 6, 2 7
L P C_ CL K 1 1 6
R2 61 2 2 _0 4
R2 62 2 2 _0 4
C
A
A
D4 6
BAT 54 C W GH
1
2
3
J M C_ 2 5M _I N 2 3
S E RI R Q 1 9, 2 7
P R OCH OT # 3
AL L OW _ L DT S TP 3
R6 8 6 * 0_ 0 4
L DT _ RS T # 3
AP U _P W RGD 3, 3 5
Sheet 15 of 41
HUDSON PCIE/
PCI/ CLOCK/ FCH
Schematic Diagrams
HUDSON GPIO/ USB/ STRAP B - 17
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
HUDSON GPIO/ USB/ STRAP

C4 7 0
*0 . 1u _ 1 6 V_Y 5 V_0 4
S B_ MXM _C L K RE Q # 8
R2 9 0
1 0K _ 0 4
US B _ P P 2 24
US B _ P N 2 24
R6 9 6 0 _ 0 4
U S B _P N6 28
U S B _P P 6 28
HD A_S DI N0 2 5
R 3 10 1 0 K _ 0 4
W L A N_ CL K R E Q# 2 4
R 3 12 1 0 K _ 0 4
R2 83 1 0 K _0 4
3 . 3 V
R 3 13 * 2 . 2K _0 4
R 3 14 * 2 . 2K _0 4
P C L K _ K B C 1 5
P C I _ CL K 2 1 5
L P C _C L K 0 1 5 , 27
P C I _ CL K 4 1 5
L P C _C L K 1 1 5
P C I _ CL K 3 1 5
R3 84 *2 . 2 K _0 4
R3 82 10 K _ 0 4
R3 85 2. 2 K _ 0 4
R3 81 10 K _ 0 4
R3 83 *1 0K _0 4
R3 79 10 K _ 0 4
R3 80 10 K _ 0 4
R3 77 10 K _ 0 4
R3 78 *1 0K _0 4
H DA_ S D OU T
V D DI O _ AZ
R4 69 3 3 _0 4
3 . 3 VS
Q 8
* MT N 70 0 2 Z HS 3 G
D
S
R6 95 3 3 _0 4
R4 73 3 3 _0 4
R4 70 3 3 _0 4
3 . 3V
STRAPPINS
R 3 69
1
0
K
_
0
4
R 3 71
*
1
0K
_
0
4
R3 68
*1
0
K
_
04
R3 7 2
*1
0
K
_
0
4
R3 7 0
*1
0
K
_
04
R3 7 3
*1
0
K
_
0
4
R 37 4
10
K
_
0
4
R 37 6
*1
0
K
_0
4
R3 7 5
1
0
K
_0
4
R6 9 0 *0 _ 0 4
MI N I P CI E _S L T 2 _ E N#
R6 9 1 0_ 0 4
E C
Ti mer PCIEGen2
S B_ BL ON 2 0 PCI_CLK4
H, L =SP I ROM
L PC_CLK0
CLOCK MODE
I GNORE
DEFAULT
ALLOW
P ULL
DEF AUL T
P CI _CLK 1 PCI _CLK2
F OR CE
J M_ D 3M OD E 23
S TRAP
MI NI PCI E _SLT2 _EN#
DEF AULT S TRAP
CLOCK MODE DI SABLED
USE
DEF AULT
DEFAULT
A Z_SDOUT
L, H=LPC ROM(DE FAULT)
L PC_CLK1
DEBUG
E NABLE D
P CI E Gen1
DE FAULT
MODE
H, H = Reserved HIGH
Ti mer
Di sabl ed
GPI O199
DEFA ULT
GPI O200 non_F usi on E C LOW POWE R CLKGE N
U S B _P P 9 22
U S B _P N9 22
Enabl ed
MODE
P ULL
MI NI PCI E _SLT3_ EN#
P ERF ORMANCE
DEBUG
LOW
E NABLE D
DI SABLED
Watchdog
Watchdog CLKGE N FUSI ON
P CI _CLK 3
L, L =FWH ROM
HUDSON-1
U SB O C
A CPI / WAK E UP E VE NTS
U SB MI SC
USB 1. 1
USB 2. 0
GB E LAN
GP IO
EMBE DDE DCT RL
HD AUD IO
P AR T 4O F 5
H UD S ON M1 A1 3
U1 9 A
E 2 7
PS2M_C LK/ G PI O19 2
F 2 9
PS2M_DAT/ G PI O191
F 2 8
PS2K B_C LK/ G PI O1 90
D2 7
PS2K B_DAT / G PI O189
G2 9
FC_R ST #/GP O160
F 2 1
SPI _C S2#/ GBE_S TA T2/ GPI O166
E 2 4
PS2_ CLK/ SC L4/ GP I O188
E 2 3
PS2_ DAT / S DA 4/GP I O 187
V7
GB E_P HY_I N TR
M9
GB E_P HY_R ST #
P 4
GB E_P HY_P D
M7
GB E_T XCT L/ TXE N
P 7
GB E_T XD0
T 7
GB E_T XD1
P 9
GB E_T XD2
M5
GB E_T XD3
P 5
GB E_T XCLK
V5
GB E_R XER R
T 5
GB E_R XCT L/ RXDV
U2
GB E_R XD0
T 2
GB E_R XD1
U3
GB E_R XD2
U1
GB E_R XD3
T 9
GB E_R XCLK
L 5
GB E_MDI O
L 6
GB E_MDC K
T 4
GB E_C RS
T 1
GB E_C OL
P 2
AZ_R ST #
N2
AZ_S YN C
M4
AZ_S DI N3/ GPI O170
M1
M2
L 2
N1
AZ_S DOUT
M3
AZ_B I TCLK
F 8
USB _OC0#/ TR ST#/ GEV EN T12#
E 7
USB _OC1#/ TD I/ GEV ENT 13#
F 7
USB _OC2#/ TC K/ GE VE NT 14#
E 8
USB _OC3#/ AC _PRE S/ TDO/GEV EN T15#
D4
USB _OC4#/ I R_RX 0/ GE VE NT16#
E 4
USB _OC5#/ I R_TX 0/ GE VE NT17#
D1
USB _OC6#/ I R_TX 1/ GE VE NT6#
H3
BLI NK / U SB_ OC 7#/GE VEN T18#
AA 2 0
CLK_ REQG#/ GP IO65/ OSC I N
K 3
GB E_S TAT 0/ GE VE NT11#
G5
GB E_LE D2/ G EVE NT 10#
D7
GB E_LE D1/ G EVE NT 9#
D5
GB E_LE D0/ G PI O18 3
H4
DDR 3_RS T#/ G EVE NT 7#
A J 2 1
SMAR TVOLT 2/S HU TDOWN #/G P I O51
E 1
IR _LED#/LLB #/ GP IO184
AB 1 8
CLK_ REQ1#/ FA NOUT 4/GP I O61
AH2 1
CLK_ REQ2#/ FA NI N4/ G PI O62
F 4
SDA 1/ GP IO228
F 5
SCL1 / GPI O227
AE 2 2
SDA 0/ GP IO47
AD2 2
SCL0 / GPI O43
AF 1 9
SPK R/ GPI O66
AE 1 9
SAT A_I S5#/ F ANI N3 /G PI O59
AF 2 0
SAT A_I S4#/ F ANOU T3/ GP I O55
AC1 8
CLK_ REQ0#/ SA TA_ IS 3#/ GP I O 60
AB 2 1
SMAR TVOLT 1/S AT A_I S2#/ GPI O50
AA 1 6
AD1 9
G1
RSMR ST#
AC1 9
NB_P WRGD
J 6
THR MTRI P#/ S MB ALE RT#/GEV EN T2#
F 3
IR _RX 1/GEV EN T20#
H6
WAK E#/ GE VE NT8#
J 1
SYS _RE SET #/ GE VE NT19 #
H2
GE VE NT5#
J 2 9
LPC_ SMI#/ GEV ENT 23#
K 2
LPC_ PME#/ G EVE NT 3#
AE 2 1
KBR ST #/GE VEN T1#
AD2 1
GA 20I N/ GE VE NT0#
F 6
TES T2
C4
TES T1/ TMS
B3
TES T0
G6
SUS _ST AT#
H5
PWR _GOOD
F 2
PWR _BTN #
H1
SLP_ S5#
F 1
SLP_ S3#
D3
SPI _C S3#/ GBE_S TA T1/ GEVE NT 21#
K 1
RI #/ G E VEN T22#
J 2
PCI _P ME #/ GE VEN T4#
B22
K SO_17/ GP I O226
A22
K SO_16/ GP I O225
C2 2
K SO_15/ GP I O224
D2 2
K SO_14/ GP I O223
A23
K SO_13/ GP I O222
B23
K SO_12/ GP I O221
C2 4
K SO_11/ GP I O220
B24
K SO_10/ GP I O219
D2 4
K SO_9/ GP I O218
A25
K SO_8/ GP I O217
B25
K SO_7/ GP I O216
A24
K SO_6/ GP I O215
C2 6
K SO_5/ GP I O214
A26
K SO_4/ GP I O213
D2 6
K SO_3/ GP I O212
B27
K SO_2/ GP I O211
A27
K SO_1/ GP I O210
B28
K SO_0/ GP I O209
C2 8
K SI _7/ GP I O208
C2 9
K SI _6/ GP I O207
D2 8
K SI _5/ GP I O206
D2 9
K SI _4/ GP I O205
E 29
K SI _3/ GP I O204
E 28
K SI _2/ GP I O203
G2 5
K SI _1/ GP I O202
G2 4
K SI _0/ GP I O201
E 21
EC_P WM3/E C_T IME R3/ GP I O200
F 22
E 22
F 25
E 26
S DA3_ LV/ GP I O196
B26
SCL3_ LV/ GP I O195
F 23
SDA2/ GP I O194
D2 5
SC L2/ GP I O193
B16
USB _HS D0N
A16
USB _HS D0P
A17
USB _HS D1N
B17
USB _HS D1P
J 1 8
USB _HS D2N
J 1 6
USB _HS D2P
E 16
USB _HS D3N
E 18
USB _HS D3P
A14
USB _HS D4N
B14
USB _HS D4P
C1 6
USB _HS D5N
D1 6
USB _HS D5P
G1 8
USB _HS D6N
G1 6
USB _HS D6P
G1 4
USB _HS D7N
G1 2
USB _HS D7P
C1 3
USB _HS D8N
D1 3
USB _HS D8P
B13
USB _HS D9N
A13
USB _HS D9P
J 1 4
U SB _HS D10N
J 1 2
U SB _HS D10P
E 12
U SB _HS D11N
E 14
U SB _HS D11P
E 11
U SB _HS D12N
F 11
U SB _HS D12P
A12
U SB _HS D13N
B12
U SB _HS D13P
J 8
USB _FS D0N
H9
US B_F SD0P/ GP I O185
H1 1
USB _FS D1N
J 1 0
US B_F SD1P/ GP I O186
G1 9
U SB _RC OMP
A10
U SB CLK/ 14M_25M_48M_OSC
R 2 75 0 _ 04
R 2 70 0 _ 04
K BC_ R S T# 2 7
GA 2 0 2 7
R7 3 0 *0 _0 4
LI D _ S W # 2 0, 2 7 , 2 9
Q6
*M T N7 0 02 ZH S 3 G
D
S E C _S MI # 2 6, 2 7
E C _S CI # 2 7
P C I E _ W AK E # 2 3 , 2 4, 26
C P U_ T HE R MT RI P # 3
S W I #
S US B # 1 9 , 2 6, 2 7 , 3 0
3 . 3V S
S US C # 2 7 , 3 0, 3 2
R 2 76 2 . 2 K _ 0 4
MI N I P CI E _S L T 3 _ E N#
R 2 77 2 . 2 K _ 0 4
R 2 78 4 . 7 K _ 0 4
R 2 79 4 . 7 K _ 0 4
AP U_ S I D 3
S US _ S T AT #
S DAT A 0
NB_ P W R GD
S CL K 0
R 2 96 0 _ 04
3 . 3V
GB E _P HY _ I N TR
R2 8 9
*1 0 K _ 04
3 . 3V
W F _ RAD I O
R 2 84 2 . 2 K _ 0 4
M XM _P W R_ E N 7
RS M RS T _ GA TE # 2 7
H DA _ S Y N C 2 5
R2 7 4
*2 0 K _ 04
S CL K 1
S DAT A 1
P W R _ BTN # 2 7
U S B _P P 5 22
U S B _P N5 22
9/14
R 7 28 *0 _ 0 4
R 7 52 *0 _ 0 4
Closed to SB.
U S B4 P OR T 3
P CI E _ RS T#_ GAT E 1 5
U S B9 3 G
U S B0 P OR T 0
U S B6 BL UE T O OT H
U S B1 P OR T 1
U S B2 MI N I CAR D
U S B5 CC D
S W I # 2 7
HUDSON GPIO/USB/AUDIO/STRAP
3 . 3 V
U S B _P N0 29
U S B _P P 0 29
R7 3 1 0_ 0 4
S DAT A 0 5 , 6, 10
S CL K 0 5 , 6, 10
H DA _ S P K R 2 5
S W I #
3 . 3V
C4 7 1
1 u _6 . 3 V_ Y 5 V_ 0 4
R2 8 2
1 0K _ 0 4
3 . 3V
S Y S _R S T #
GBE _ P H Y _ I NT R
H DA _ RS T # 2 5
OD D_ DA#_ F CH 2 4
P LAC E CL O S E T O S O UT H B RI D GE
R 2 91 1 0 K _ 0 4
US B _ O CP 0 _ 1# 26 , 2 9
R7 4 2 *2 . 2 K _0 4
R2 8 7 1 0 K _0 4
S Y S _ R S T# R 2 81 * 2 . 2K _0 4
US B3 0 _P W R_ E N 2 6
HDA _B I TC LK 2 5
8/18
R7 4 3 *2 . 2 K _0 4
U S B _P P 1 29
U S B _P N1 29
R7 4 4 *2 . 2 K _0 4
E C_ S C I # R 2 92 1 0 K _ 0 4
E C_ S M I # R 2 93 1 0 K _ 0 4
3 . 3V
3 . 3 V
S W I #
R 28 0
* 20 K _ 0 4
R 2 73
* 2 2K _ 0 4
C 4 69
* 2 . 2u _ 6 . 3V _X5 R_ 0 4
S 4 _ S T ATE # 1 9
MXM_ P W R _ E N
R 6 93 *0 _ 0 4
GE VE NT 0#
GE VE NT 1#
OD D_ DE T E C T# 2 4
R 6 92 0 _0 4
M I NI P C I E _ S L T2 _ E N#
R 6 94 *0 _ 0 4
M I NI P C I E _ S L T3 _ E N#
NB_ P W R GD
R S MR S T #
RS M RS T #
S B_ AC_ OK
S CL K 1
S C LK 2
AP U _ S I C
S C L K 2
S D AT A2
S DA T A1
AP U _ S I D
S D A T A2
S US _ S T AT #
S Y S _ R S T#
S B_ P W R GD 1 9
US B_ R COM P
W F _ RAD I O
GBE _C RS
GBE _C OL
R8 1 3 *0 _0 4
U S B _P P 4 29
U S B _P N4 29
S Y S _ RS T # 1 9
R2 72 1 1 K _1 % _ 0 4
HDA _S D OU T 2 5
R 2 88 2 . 2 K _ 0 4
S MC _C P U_ T HE RM 3, 1 7 , 2 7
S MD _C P U_ T HE RM 3, 1 7 , 2 7
G B E _ RXE RR
AP U_ S I C 3
R2 8 5 10 K _ 0 4
R2 8 6 10 K _ 0 4
AC _I N # 2 7 , 2 9, 3 7
R 8 07
* 1 0K _0 4
Sheet 16 of 41
HUDSON GPIO/
USB/ STRAP
Schematic Diagrams
B - 18 HUDSON SATA/ DEBUG IO/ SPI
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
HUDSON SATA/ DEBUG IO/ SPI

SATA_LED# 28
R333 *0_04
R335 *0_04
SB_PROCHOT#_C
C487
330p_50V_X7R_04
SB_PROCHOT# 3
C486
330p_50V_X7R_04
C488
*0.1u_16V_Y5V_04
R340 *11K_1%_04
R336 *0_04
R337 *0_04
R341 *10K_04
R576 *10K_04
APU_TALERT#3,27
GPU_TALERT#8,10
HSPI _MSO 27
HSPI _MSI 27
HSPI _SCLK 27
HSPI _CE#27
R799 10K_04
R350
*10K_04
SMD_CPU_THERM3,16, 27
SMC_CPU_THERM3,16, 27
3.3V
3.3VS
C490
*0.1u_16V_Y5V_04
R349
10K_04
SATARXN0 24
HUDSON-1 PA RT 2OF 5
S PI ROM
G P I OD
S ER I AL AT A
H W MON I TOR
U19B
HUDSONM1A13
G2
ROM_R ST #/ GP I O161
K9
SP I _CS 1#/ G PI O165
K4
SP I _CLK / GP I O162
E2
SP I _DO/ G PI O163
J 5
SP I _DI / G PI O164
AC16
SA TA _X2
AD16
SA TA _X1
AD11
SA TA _AC T#/GP I O6 7
AA14
SA TA _CA LR N
AB14
SA TA _CA LR P
AJ 19
SA TA _RX 5P
AH19
SA TA _RX 5N
AH18
SA TA _TX 5N
AJ 18
SA TA _TX 5P
AH17
SA TA _RX 4P
AJ 17
SA TA _RX 4N
AF17
SA TA _TX 4N
AG17
SA TA _TX 4P
AF14
SA TA _RX 3P
AG14
SA TA _RX 3N
AJ 14
SA TA _TX 3N
AH14
SA TA _TX 3P
AH12
SA TA _RX 2P
AJ 12
SA TA _RX 2N
AF12
SA TA _TX 2N
AG12
SA TA _TX 2P
AF10
SA TA _RX 1P
AG10
SA TA _RX 1N
AJ 10
SA TA _TX 1N
AH10
SA TA _TX 1P
AH8
SA TA _RX 0P
AJ 8
SA TA _RX 0N
AJ 9
SA TA _TX 0N
AH9
SA TA _TX 0P
Y
2
N C
G
2
7
N C
A
8
VI N 7/ G BE _LED3/ G PI O182
B
8
V IN 6/ G BE _ST AT 3/ G PI O181
B
7
V I N 5/ G PI O180
A7
V I N 4/ G PI O179
C5
V I N 3/ G PI O178
A4
V I N 2/ G PI O177
B4
V I N 1/ G PI O176
A3
V I N 0/ G PI O175
C7
T EMP _C OMM
B5
TE MP I N3/ T ALE RT #/ G PI O174
A5
T EMP I N 2/ G PI O173
A6
B6
W8
F AN I N 2/ GPI O58
V9
F AN I N 1/ GPI O57
W7
F AN I N 0/ GPI O56
Y9
FA NOUT 2/ G PI O54
W6
FA NOUT 1/ G PI O53
W5
FA NOUT 0/ G PI O52
AH26
F C_A DQ15/ G P IOD143
AG25
AJ 25
AJ 24
AF23
AJ 23
AH22
F C_A DQ9/ G P I OD137
AF21
AG21
AJ 22
AH23
AG23
AH24
AH25
AJ 26
AJ 27
A
H
2
7
F C_ IN T2/ G P I OD147
A
F
2
9
F C_ IN T1/ G P I OD144
A
E
2
9
F C_C E2#/ G P IOD150
A
F
2
7
F C_C E1#/ G P IOD149
A
G
2
6
F C_ WE#/ G P IOD148
A
G
2
9
FC _AV D#/ G P IOD146
A
F
2
8
FC _OE#/ G P I OD145
A
F
2
6
FC _FB CLK I N
A
G
2
8
FC _F BC LKOU T
A
H
2
8
FC _C LK
R386 0_04
R572 0_04
R571 0_04
NEAR U19
R573 0_04
R351 *10K_04
SPI _CS#_SEL
R800 10K_04
VIN_VDDCR
HUDSON SATA/DEBUG IO/SPI
C492
*0.1u_16V_Y5V_04
R352
10K_04
VIN_VDDI O_SUS
Debug port
R732 *0_04
SATATXN0 24
ODD_PWR 24
U21
*25VF032B
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
SATARXP0 24
SPI _DATAIN
R330 *10K_04
SATATXN1 24
SATATXP1 24
SATARXP1 24
SATARXN1 24
R798 10K_04
3.3VS
R801 10K_04
R697 10K_04
R802 10K_04
Q9
*2N3904
B
E
C
R342
10K_04
SATATXP0 24
3. 3VS
SPI _DATAOUT
R331 1K_1%_04
3.3VS
R332 931_1%_04
C491
*0.1u_16V_Y5V_04
PLACEQ600UNDERDIMM
1.8VS
VDDCR_CPU
VDDCR_NB
1VS
AVDD_SATA
DEBUGONLY
DNI R652andR653forcustomerboard
ConnectC7andD8,thengotoGNDdirectly.
R346
*1K_04
R347
*10K_04
R803 10K_04
ASA10MI LTRACE
NOTE: ROUTETEMP_COMM
1.5V
togetaffectedwith2vias. AMDplatformsarevalidated
customerscanuse2viaswithGNDviawithin150milsof
meetsSATAlogorequirements. Returnlossisexpected
signal viaaslongasthey canensurethattheirplatform
SATAtrace shoulduseonly 1viaon the
trace.
withoneviaonly
R344 *4.99K_1%_04
HDD0_PWR
HUDSON_FANOUT0
HUDSON_FANTACH0
R345 *4.99K_1%_04
MB_THRMDA_SB
MB_THRMDC_SB
HUDSON_ROM_RST#
ODD_PWR
SATA_CALN
SATA_CALP GPI O58
U20
*74AHC1G08GW
1
2
5
4
3
SB_PROCHOT#_C
SB_TALERT#
SPI_CS#_SEL
SPI_CLK
D22 RB751V
A C
SPI_DATAIN
TEMPIN0
SPI_DATAOUT
VIN_VDDCR
VIN_VDDIO_SUS
VIN_VDDNB
VIN_VDDNB
SPI _CLK
Sheet 17 of 41
HUDSON SATA/
DEBUG IO/ SPI
Schematic Diagrams
HUDSON POWER DECOUPLING B - 19
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
HUDSON POWER DECOUPLING

VD DA N _ 3. 3 V _ H W M
C 5 03
0 . 1u _ 1 0V_ X5 R_ 0 4
60 0 m A
C 51 2
0 . 1u _ 1 0V _X 5 R_ 0 4
C 5 11
1 u _1 0 V _ Y 5 V _ 0 6
C 54 3
1u _ 6 . 3 V_X5 R_ 0 4
6 5 8m A
C5 3 1
1u _ 1 0V_ Y 5V _0 6
C 5 30
1u _ 1 0V _Y 5 V_0 6
C5 2 9
* 0. 1u _ 1 0V_ X7 R _ 0 4
T BDm A
C5 0 4
0 . 1u _ 1 0V _X5 R _ 0 4
C 50 9
4 . 7 u _6 . 3 V_ X5R _ 06
C 5 06
0 . 1 u _ 10 V_ X5R _ 04
1 3 1 mA
. L 9 6 H CB1 0 0 5 K F -1 21 T 2 0
C 4 97
* 0 . 1u _ 1 0V _X7 R_ 0 4
C5 5 5
1u _ 1 0V _Y 5 V_0 6
C 5 56
*0 . 1 u _1 0 V_ X 7R _ 04
7 1 m A
4 3 m A
51 0 m A
9 3 m A
T BDm A
5 6 7m A
5 m A
17 m A
VDD CR _ 1. 1 V
VDD I O_ 1 8_ F C
4 7m A
VDD P L _3 . 3 V _ P CI E
VDD P L _3 . 3 V _ S A T A
VDD XL_ 3 . 3 V TB D m A
VDD I O_ AZ
62 m A
3 2 m A
R 36 2 0 _0 4
T BDm A
1 9 7m A
C5 5 7
1 u _ 10 V_ Y 5 V_ 0 6
1 1 3m A
C 55 2
0. 1 u _ 1 0V_ X5 R_ 0 4
. L 9 4 H CB1 0 05 K F - 12 1 T 20
C 5 51
1 u _ 10 V _ Y 5V _ 0 6
C4 9 4
2 2u _ 6 . 3V _X 5 R_ 0 8
C5 4 5
1 0u _ 6 . 3 V _X 5 R_ 0 8
C4 96
0. 1u _ 1 0V_ X 5 R_ 0 4
C4 9 5
0 . 1u _ 1 0V _X5 R _ 0 4
12/9
3 . 3V S
C 51 9
1 u _ 6. 3V_ X 5 R_ 0 4
. L8 8 HC B 10 0 5 K F -1 2 1T 2 0
C 5 27
* 0 . 1u _ 1 0 V_X7 R _ 0 4
C 52 8
1u _ 1 0V _ Y 5V _0 6
. L 8 5
H CB 1 0 0 5K F -12 1 T 2 0
R 36 3 *0 _ 0 4
C5 5 0
1 u _ 10 V_ Y 5V_ 0 6
C 54 9
0 . 1 u_ 1 0 V_ X5 R _0 4
. L 9 3 H CB 1 0 0 5K F -12 1 T 20
. L 9 5 H CB1 0 0 5K F -12 1 T 20
HUDSON-1
PC I / GPI O I / O
PCI EX PRE SS
GBE L AN
FLA SH I / O
CORE S 5
C OR E S0
CLK GEN I / O
3. 3V_S5 I / O
SE RI AL AT A
P O WER
P LL
US B I /O
PAR T 3 OF 5
U 19 C
HU DS O N M 1 A1 3
D1 1
V DDA N_11_U SB _S
C1 1
V DDA N_11_U SB _S
E 1 9
V DDA N_33_U SB _S
D2 0
V DDA N_33_U SB _S
D1 9
V DDA N_33_U SB _S
D1 8
V DDA N_33_U SB _S
C2 0
V DDA N_33_U SB _S
C1 8
V DDA N_33_U SB _S
B 2 0
V DDA N_33_U SB _S
B 1 9
V DDA N_33_U SB _S
B 1 8
V DDA N_33_U SB _S
A 2 0
V DDA N_33_U SB _S
A 1 9
V DDA N_33_U SB _S
A 1 8
V DDA N_33_U SB _S
AE 1 6
V DDA N_11_S AT A
AD1 8
V DDA N_11_S AT A
AE 1 8
V DDA N_11_S AT A
AG1 9
V DDA N_11_S AT A
AH2 0
V DDA N_11_S AT A
AF 1 8
V DDA N_11_S AT A
AJ 2 0
V DDA N_11_S AT A
AD1 4
V DDP L_33_SA TA
W 2 6
V DDA N_11_P CI E
W 2 2
V DDA N_11_P CI E
V 2 9
V DDA N_11_P CI E
V 2 8
V DDA N_11_P CI E
V 2 7
V DDA N_11_P CI E
V 2 6
V DDA N_11_P CI E
V 2 2
V DDA N_11_P CI E
U2 6
V DDA N_11_P CI E
AE 2 8
V DDP L_33_PC I E
AC2 2
V DDI O _18_FC
AF 2 4
V DDI O _18_FC
AE 2 5
V DDI O _18_FC
AF 2 2
V DDI O _18_FC
AA 1 9
V DDI O _33_PC I GP
A F 7
V DDI O _33_PC I GP
A A9
V DDI O _33_PC I GP
A A7
V DDI O _33_PC I GP
A C8
V DDI O _33_PC I GP
A B4
V DDI O _33_PC I GP
A A2
V DDI O _33_PC I GP
AC2 1
V DDI O _33_PC I GP
A E 5
V DDI O _33_PC I GP
Y 1 9
V DDI O _33_PC I GP
V6
V DDI O _33_PC I GP
A H1
V DDI O _33_PC I GP
L 2 0
VDDX L_33_S
D 6
V DDA N_33_H WM_S
F 19
VDD PL_33_ USB _S
L 2 2
VDD PL_11_ SYS _S
M 2 1
VDDP L_33_SY S
B 11
V DDC R_11_ USB _S
A 11
V DDC R_11_ USB _S
M 8
V DDI O_AZ _S
G 2 6
VDDCR _11_S
F 26
VDDCR _11_S
T 8
VDDI O _33_S
T 6
VDDI O _33_S
J 9
VDDI O _33_S
L 1 0
VDDI O _33_S
K 10
VDDI O _33_S
B 21
VDDI O _33_S
D 2 1
VDDI O _33_S
A 21
VDDI O _33_S
P 8
V DD IO_GBE _S
M 6
V DD IO_GBE _S
L 9
VDDC R_11_GBE _S
L 7
VDDC R_11_GBE _S
M 1 0
V DDI O_33_GBE _S
V 1
VDDR F_GBE _S
J 2 2
VDDA N_11_C LK
K 21
VDDA N_11_C LK
J 2 0
VDDA N_11_C LK
J 2 1
VDDA N_11_C LK
K 26
VDDA N_11_C LK
J 2 8
VDDA N_11_C LK
K 29
VDDA N_11_C LK
K 28
VDDA N_11_C LK
W 18
VDDC R_11
W 12
VDDC R_11
V 18
VDDC R_11
V 12
VDDC R_11
U 1 7
VDDC R_11
U 1 3
VDDC R_11
N 1 7
VDDC R_11
R 1 5
VDDC R_11
N 1 3
VDDC R_11
C 49 8
2 2u _ 6 . 3V_ X5 R_ 0 8
C5 1 0
1 u _6 . 3 V_ X5R _ 04
C 50 8
1 u_ 6 . 3 V_ X5 R _0 4
C5 0 7
0. 1 u _ 10 V_ X 5 R_ 0 4
C5 0 5
0 . 1 u _1 0 V_ X5R _ 04
HUDSON-1
PAR T 5 OF 5
GR OU ND
H UD S ON M1 A1 3
U 19 D
J 23
V SSI O _PC I ECLK
V 20
V SSI O _PC I ECLK
T 24
V SSI O _PC I ECLK
T 22
V SSI O _PC I ECLK
T 20
V SSI O _PC I ECLK
P 26
V SSI O _PC I ECLK
P 24
V SSI O _PC I ECLK
P 22
V SSI O _PC I ECLK
M 26
V SSI O _PC I ECLK
M 24
V SSI O _PC I ECLK
M 22
V SSI O _PC I ECLK
P 20
V SSI O _PC I ECLK
P 21
V SSI O _PC I ECLK
M 19
V SSX L
D8
V SSA N_H WM
Y 4
E FUS E
H 19
V SSI O _US B
K 18
V SSI O _US B
K 16
V SSI O _US B
K 14
V SSI O _US B
K 12
V SSI O _US B
J 19
V SSI O _US B
J 11
V SSI O _US B
H 18
V SSI O _US B
H 16
V SSI O _US B
H 14
V SSI O _US B
H 12
V SSI O _US B
D9
V SSI O _US B
F 18
V SSI O _US B
G 11
V SSI O _US B
C9
V SSI O _US B
F 16
V SSI O _US B
F 14
V SSI O _US B
F 12
V SSI O _US B
F 9
V SSI O _US B
E 9
V SSI O _US B
D 17
V SSI O _US B
D 14
V SSI O _US B
D 12
V SSI O _US B
D 10
V SSI O _US B
B9
V SSI O _US B
K 11
V SSI O _US B
B 10
V SSI O _US B
A9
V SSI O _US B
AJ 16
V SSI O _SA TA
AJ 13
V SSI O _SA TA
AJ 11
V SSI O _SA TA
A J 7
V SSI O _SA TA
A H 16
V SSI O _SA TA
A H 13
V SSI O _SA TA
A H 11
V SSI O _SA TA
AH7
V SSI O _SA TA
AG8
V SSI O _SA TA
A F 16
V SSI O _SA TA
A F 13
V SSI O _SA TA
A F 11
V SSI O _SA TA
AF 9
V SSI O _SA TA
A E 14
V SSI O _SA TA
A E 12
V SSI O _SA TA
A C 14
V SSI O _SA TA
A B 16
V SSI O _SA TA
Y 16
V SSI O _SA TA
Y 14
V SSI O _SA TA
K 20
VS SI O_P CI EC LK
L 2 1
VS SI O_P CI EC LK
A E 26
VS SI O_P CI EC LK
W 20
VS SI O_P CI EC LK
W 21
VS SI O_P CI EC LK
Y 2 0
VS SI O_P CI EC LK
A C2 6
VS SI O_P CI EC LK
A A26
VS SI O_P CI EC LK
A D2 3
VS SI O_P CI EC LK
A B23
VS SI O_P CI EC LK
A A23
VS SI O_P CI EC LK
A A21
VS SI O_P CI EC LK
H 2 6
VS SI O_P CI EC LK
H 2 3
VS SI O_P CI EC LK
M 2 0
V SS PL_SY S
L 8
VS S
L 4
VS S
N 4
VS S
P 6
VS S
V 10
VS S
A H2 9
VS S
H 7
VS S
A F 25
VS S
M 1 2
VS S
G 9
VS S
G 8
VS S
J 4
VS S
G 4
VS S
A A12
VS S
A A11
VS S
Y 1 1
VS S
Y 1 2
VS S
Y 1 0
VS S
Y 1 8
VS S
U 4
VS S
B 29
VS S
A J 2 8
VS S
W 10
VS S
W 9
VS S
V 8
VS S
A C9
VS S
A B7
VS S
A D4
VS S
A D6
VS S
V 4
VS S
P 3
VS S
J 7
VS S
L 1 8
VS S
L 1 2
VS S
M 1 1
VS S
V 19
VS S
M 1 8
VS S
U 1 5
VS S
V 11
VS S
P 10
VS S
T 1 0
VS S
R 1 7
VS S
R 1 3
VS S
N 1 5
VS S
F 24
VS S
E 6
VS S
E 25
VS S
D 2 3
VS S
E 5
VS S
A 2
VS S
A 28
VS S
A J 2
VS S
C4 9 9
1u _ 6 . 3 V_X5 R _ 0 4
VD DP L _ 3 . 3V
C 50 1
10 u _ 6. 3 V_ X5 R_ 0 8
C5 0 2
0 . 1 u_ 1 0 V_ X5 R _0 4
. L 9 0
H CB1 0 0 5K F -12 1 T 20
A VD D_ U S B
VDD P L _1 . 1 V
R 7 7 1 * 10 m i l _ s h ort
V D DAN _ 1. 1 V_ U S B
C 5 34
1 u_ 6 . 3 V _ X5 R _0 4
C 5 53
1 u _ 1 0V_ Y 5V_ 0 6
C 55 4
*0 . 1 u _ 10 V_ X7R _ 04
R3 5 6 0_ 0 4
C5 4 0
0 . 1 u_ 1 0 V _ X5 R _0 4
C 53 9
10 u _ 6. 3 V_ X5 R_ 0 8
C 5 41
0 . 1u _ 1 0V_ X5 R_ 0 4
C5 2 1
0 . 1 u _1 0 V _ X5R _ 04
. L 91 HC B1 0 05 K F -1 2 1 T2 0
C5 4 2
1 u _ 6 . 3V_ X 5 R_ 0 4
C 54 4
10 u _ 6 . 3V_ X5 R_ 0 8
C 5 46
0 . 1u _ 1 0V_ X5 R_ 0 4
R3 6 1 0 _0 4
C 49 3
0 . 1 u _1 0 V _ X5R _ 04
R 77 2 * 10 m i l _ s h ort
HUDSON POWER DECOUPLING
C5 1 8
* 1 u_ 6 . 3 V_ X5 R _0 4
C5 2 0
0. 1 u _ 10 V _ X5 R _ 0 4
C 51 7
2 2u _ 6 . 3V _X5 R _ 0 8
R 77 3 * 10 m i l _ s h ort
. L 8 6 H CB1 0 0 5K F -12 1 T 20
. L 89 HC B1 0 05 K F -1 2 1 T2 0
C 5 33
1 u_ 6 . 3 V_ X5 R _0 4
C5 3 5
0. 1 u _ 10 V_ X 5 R_ 0 4
C 5 32
2 2u _ 6 . 3V _X5 R _ 0 8
C5 0 0
1 u _ 6. 3 V_ X5 R_ 0 4
C5 3 8
1 u _6 . 3 V_ X5R _ 04 VDD CR _ 1. 1 _ US B
C5 3 6
0 . 1 u _1 0 V_ X5 R _0 4
1. 8 V S
3 . 3VS
1 . 1 VS
C 53 7
1u _ 6 . 3V _ X5 R _ 0 4
1 . 1V S
3. 3VS
A VDD _S A TA
12/6D el R827
3 . 3 V A VDD _U S B
1 . 1 V
1 . 5 V
VD DI O _ AZ 3 . 3V
3 . 3 V S VD DP L _ 3. 3V VDD P L_ 1 . 1 V 1. 1 V
3. 3 V V DDA N_ 3 . 3V _H W M
1 . 1 V
3 . 3 V
. L 9 2
H CB1 0 0 5K F -12 1 T 20
1 . 1V
3 . 3V
C 54 8
1 u_ 1 0 V_ Y 5 V_ 06
C5 4 7
0. 1 u _ 10 V_ X5 R_ 0 4
1. 1 V S +1 . 1 V_ CK V DD
1 . 1 V S
R 3 5 5 0 _ 04
Sheet 18 of 41
HUDSON POWER
DECOUPLING
Schematic Diagrams
B - 20 POWERGOOD/ TPM
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
POWERGOOD/ TPM

R7 7 6 *0 _ 04
P W RG D_ VC ORE 3 5
R8 19 *0 _ 0 4
3 . 3 V
S Y S _P W R OK
S B _ P W RO K
BUF _ P L T _R S T # 1 5 , 23 , 2 4 , 26 , 2 7
L P C_ A D3 1 5 , 2 7
L P C_ A D1 1 5 , 2 7
L P C_ A D0 1 5 , 2 7
P C L K _T P M 1 5
LP C_ F RAM E # 15 , 2 7
L P C_ A D2 1 5 , 2 7
P CI _ C LK R UN # 1 5
S 4 _ S T ATE # 1 6
C 84 1
1 u_ 6 . 3 V_Y 5 V _0 4
R8 14 *0 _ 0 4
R8 16 *0 _ 0 4
R8 17 *0 _ 0 4
R8 18 *0 _ 0 4
1 . 1 V_ P W RG D 33
R7 7 5 0_ 0 4
ON
3 . 3 V
S US B# 1 6 , 2 6, 27 , 3 0
R7 74
10 K _ 0 4
R3 6 4 0 _0 4
R3 6 5 0 _0 4
3 . 3 V
D DR 1. 5 V_ P W R GD 3 2 , 35
R8 20 *0 _ 0 4 S E RI R Q 15 , 2 7
C8 8 2
*1 8 p_ 5 0 V _N P O_ 0 4
XTALO
X12 * 3 2. 7 6 8 K Hz
1 4
3 2
XTALI
C8 81
*1 8p _ 5 0V_ N P O_ 0 4
R8 24 *1 0 K _ 04
T P M_ P P
P CL K _ TP M
R8 23 *1 0 K _ 04
R8 21 *3 3 _ 04
R8 22 *1 0 K _ 04
LPC resettiming:
TPM 1.2
HI: 4E/ 4FH
LOW: 2E/ 2FH
TPM_PP
TPM_BADD
LPCP D#inactive to LRST#inactive32~96us
Asserted before entering S3
HI: ACCESS
LOW: NORMAL( Int er nal PD)
C 8 83 *1 0 p_ 5 0 V_0 4
3 . 3 VS
C8 7 6
*0 . 1 u _1 6 V_ Y 5 V_ 04
3 . 3 VS
3 . 3 VS
C 8 77
*0 . 1 u _1 6 V _ Y 5 V_ 04
C8 7 8
*0 . 1 u_ 1 6 V_Y 5 V_0 4
C 87 9
* 1u _ 1 6V_ X5 R_ 06
C8 8 0
*0 . 1 u _1 6 V_ Y 5 V_ 04
T P M3 0 05
T P M_ BAD D
TPM
U 5 0
* S L B96 3 5 TT
L A D3
1 7
L A D0
2 6
L A D1
2 3
L A D2
2 0
V DD 1
10
X T A LI
13
V DD 3
24 V DD 2
19
L F RAM E #
2 2
L CL K
2 1
L RE S E T#
1 6
S E R I RQ
2 7
C LK R UN #
1 5
GN D_ 1
4
GN D_ 2
11
GN D_ 3
18
GN D_ 4
25
G P I O
6
GP I O 2
2
XT AL O
14
T E S T I
8
T E S T B I / B AD D
9
P P
7
N C_ 1
1
N C_ 2
3
N C_ 3
1 2
L P CP D #
2 8
VS B
5
T P M3 0 0 2
T P M3 0 04
T P M_ P P
T P M3 0 0 3
T P M3 0 0 1
T P M_ BAD D
X13 * 3 2. 7 6 8 K Hz
1 4
3 2
U2 2 B
7 4 LVC 0 8P W
4
5
6
1
4
7
3 . 3 V
S Y S _ RS T# 16
R3 6 7
*1 0 K _ 04
U2 2 C
74 L VC0 8 P W
9
1 0
8
14
7
U2 2 A
7 4 LVC 0 8P W
1
2
3
1
4
7
3 . 3 V
S B _ P W R GD 16
AL L _ S Y S _ P W R GD 2 0 , 2 7
U 22 D
7 4 LVC 0 8P W
1 2
1 3
11
1
4
7
R8 15 *0 _ 0 4
1 . 8 V_ P W RG D 34
Sheet 19 of 41
POWERGOOD/
TPM
Schematic Diagrams
LVDS, INVERTER B - 21
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
LVDS, INVERTER

U2 5 C
7 4 LVC 0 8P W
9
10
8
1
4
7
R 6 21 * 0 _0 4
R 6 13 * 0 _0 4
R 39 0
1 0 0K _0 4
R 6 08 0 _ 0 4
R 6 10 0 _ 0 4
D2 3
*B AV99 R E CT I F I E R
A
C
AC
C 56 5
0 . 1u _ 1 6V_ Y 5V_ 0 4
C 5 66
* 0 . 1u _ 1 6V_ Y 5V _ 0 4
C5 6 7
*0 . 4 7u _ 10 V _ Y 5V_ 0 4
R 6 18 0 _ 0 4
R 5 7 7 2. 2 K _ 0 4
C5 63
0. 1 u _ 16 V_ Y 5 V_ 0 4
R 6 16 0 _ 0 4
U2 4
AP L 3 5 12 A
VI N
4
VI N
5
E N
3
VOU T
1
G ND
2
3 . 3V
VI N_ L CD
3. 3 V
3 . 3 V
3 . 3 V
J_LCD2For dual channel
J_LCD1For singl echannel
3. 3 VS
P L VDD
3 . 3 VS
P LV D D
3. 3 V S
3 . 3 V
V I N_ L CD
3 . 3 VS
P L V D D
L I D _S W # 16 , 2 7 , 29
A L L _ S Y S _ P W R GD 1 9 , 27
BR I GH TN E S S 2 7
BK L_ E N 2 7
L VDS -L 1 P 3
L VDS -L 1 N 3
S CL 8
NB_ E N A VDD 3
T XC L K _L P 7
L VDS -L 0 P 3
L VDS -L 0 N 3
L VDS -L C LK P 3
L VDS -L 2 N 3
T XO UT _ L 1P 7
T XO UT _ L 0N 7
L VDS -L 2 P 3
L VDS -L C LK N 3
T XO UT _ L 0P 7
T XO UT _ L 2P 7
T XO UT _ L 2N 7
L V DS _ DD C_ D ATA 3
S DA 8
T XO UT _ L 1N 7
T XC L K _L N 7
L V DS _ DD C_ C LK 3
T XO UT _ U0 N 7
T XO UT _ U0 P 7
T XO UT _ U2 N 7
T XO UT _ U2 P 7
RL VDS -L 2 P
C
5
59
0
.1
u
_5
0
V
_
Y
5
V
_0
6
C
5
6
0
0
.01
u
_
50
V
_
X
7
R
_
0
4
R2 3 8
*1 0 K _0 4
S
D
G
Q4 5 B
*MT D N7 0 02 ZH S 6R
5
3
4
R2 28
*2 00 _ 1 %_ 0 4
Q 4 9
M T N7 0 02 ZH S 3
G
D
S
S
D
G
Q 45 A
*M TD N7 0 02 ZH S 6 R
2
6
1
3. 3 V Q 4 6
P 20 0 3 E V G
4
6 2
5
7 3
1
8
.
L 1
*0 _ 0 6
3A
V I N
C1 8
*0 . 1 u _5 0 V_ Y 5 V _ 0 6
VI N_ L CD
E N AVDD
VI N
R5 8 6
1 M_ 0 4
1108
LVD S _ DAT A
LVD S _ CL K
BR I G HT NE S S
RL VDS -L 2 N
I NV_ B L ON
2 A
RL V D S -L1 N
RL V D S -L1 P
RL V D S -L0 N
RL V D S -L0 P
GP I O 7_ BL O N 8
R577, R578W250BAQDelete
Default UMA
T X OU T_ U 1N 7
TX O UT _U 1 P 7
W250BAQ R700Off,R701On
W250BAQR698Off, R699On
RL V D S -LC L K P
RL V D S -LC L K N
TXC LK _ U P 7
T XCL K _ UN 7
S B_ BLO N 1 6
12/7
PANEL CONNECTOR
2A
R L VDS -L 0 P
LVD S _ DAT A
R L VDS -L 1 P
R L VDS -L C LK N RL VDS -L2 N
R L VDS -L 1 N
I NV_ BL ON
R L VDS -L 0 N
R L VDS -L C LK P RL VDS -L2 P
BRI G HT NE S S
LV D S _ DD C_ DAT A
S DA
R 69 8 0 _ 04
80mi ls
L VD S _D AT A
EDID Mode
LV D S _ DD C_ CL K
S CL
LVD S _ CL K
L VD S _C L K
E N AV DD
2A
L VDS -L 1 P
T XOUT _ L 1P
G5243A 6- 02- 05243- 9C0
APL3512A 6- 02- 03512- 9C0
PANEL POWER
R LV DS -L 1 P
BRI G HT N E S S
T XOUT _ L 0N
VGA _D I GO N 7
L VDS -L 2 N
T XOUT _ L 2N
R LV DS -L 2 N
L VDS -L 2 P
T XOUT _ L 2P
L VDS -L 0 N
L VDS -L 0 P
T XOUT _ L 0P
R LV DS -L 2 P
R LV DS -L 0 P
LV D S -L CL K N
TX CL K _ L N
R LV DS -L CL K N
L VDS -L 1 N
T XOUT _ L 1N
R LV DS -L 0 N
R LV DS -L 1 N
LV D S -L CL K P
TX CL K _ L P
R LV DS -L CL K P
12/7
12/7
R 69 9 *0 _ 0 4
I N V_B LO N
BK L _ E N_ R
Z12 0 1
INVERTER CONNECTOR
B L ON 3
R 7 00 0 _ 0 4
R 7 01 * 0_ 0 4
Z1 20 2
Z1 20 3
R 6 11 * 0 _0 4
R 3 9 1 * 10 0 K _ 0 4
R 6 02 0 _ 0 4
R 3 92
* 1 M_ 0 4
C5 6 9
0 . 1u _ 1 6V _ Y 5V _ 0 4
R 6 20 0 _ 0 4
U2 5 B
74 L VC0 8 P W
4
5
6
14
7
R 6 03 * 0 _0 4
R3 8 8 *1 0 mi l _ sh o rt_ 04
R 5 7 8 2. 2 K _ 0 4
U2 5 D
74 L VC0 8 P W
1 2
1 3
1 1
14
7
R 6 06 0 _ 0 4
R 6 09 * 0 _0 4
C 56 4
*0 . 0 1u _ 1 6V_ X7 R_ 0 4
C5 6 1
0 . 1u _ 1 6V _ Y 5V _0 4
R 6 19 * 0 _0 4
U 2 5A
7 4 L VC0 8 P W
1
2
3
1
4
7
R3 8 7
1 00 K _ 0 4
J _ LC D1
87 2 1 6-3 0 0 6
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
1 0
1 0
1 1
11
1 2
1 2
1 3
13
1 4
1 4
1 5
15
1 6
1 6
1 7
17
1 8
1 8
1 9
19
2 0
2 0
2 1
21
2 2
2 2
2 3
23
2 4
2 4
2 5
25
2 6
2 6
2 7
27
2 8
2 8
2 9
29
3 0
3 0
C5 6 2
4. 7 u _ 6. 3 V_ X5 R_ 06
R 6 07 * 0 _0 4
R 6 17 * 0 _0 4
R 6 15 * 0 _0 4
R 6 04 0 _ 0 4
R 6 14 0 _ 0 4
J _ L CD 2
* 87 2 1 6-4 0 0 6
1
3
5
7
9
1 1
1 3
1 5
1 7
1 9
2 1
2 3
2 5
2 7
2 9
3 1
3 3
3 5
3 7
3 9
2
4
6
8
1 0
1 2
1 4
1 6
1 8
2 0
2 2
2 4
2 6
2 8
3 0
3 2
3 4
3 6
3 8
4 0
G
n
d
1
G
1
G
nd
2
G
2
R 38 9
* 10 0 K _ 04
R 6 05 * 0 _0 4
C5 6 8
*0 . 1 u _1 6 V _ Y 5 V _ 04
R 6 12 0 _ 0 4
Sheet 20 of 41
LVDS, INVERTER
Schematic Diagrams
B - 22 HDMI/ CRT
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
HDMI/ CRT

RHDMI B_ D2BP
RHDMI B_ D2BN
RHDMI B_ D1BN
RHDMI B_ CLK BN
RHDMI B_ D0BP
RHDMI B_ D1BP
R721 *0_ 04
RHDMI B_ CLK BP
DefaultUMA
CRT PORT
IP4772CZ16 6-02-47721-B60
TPD7S019 6-02-07019-B20
DDCLK RDAC_ DDCACLK
CRT_H SY NC
DDCDAT A
BL UE
GRN
RDAC_V S Y NC
RDAC_HS Y NC
VS Y NC CRT_V S Y NC
RED
RDAC_ DDCADA TA
HSY NC
DefaultUMA
R72 0
*1 00K _ 04
R
65
3
49
9_
1%
_04
R
65
4
49
9_
1%
_
04
R
4
06
*L
VA
R
0
40
2-24
0E
0R
0
5P
-LF
RD1
* BA V99 RECT I FI E R
A C
A
C
. L 10 4 F CM10 05MF -6 00T 01
C
58
9
0.2
2u_
10
V_
Y
5V
_0
4
C
5
82
1
0p
_5
0V
_N
P
O
_0
4
C
5
83
10
p_
50
V_
N
P
O
_0
4
L1 02
*HD MI2 01 2F 2S F -90 0T 04-s ho rt
1
4
2
3
C
5
91
0.2
2u
_10
V
_Y
5V
_0
4
RD2
* BA V99 R ECT I FI E R
A C
A
C
R 579 2. 2 K_ 04
RN1
2. 2K _ 8P 4R_ 04 8
1
7
2
65
34
HDMI B_ DATA1P
J _ CRT1
10 8A H15 F ST 04 A1 CC
8
7
6
5
4
3
2
1
9
10
11
12
13
14
15
G
N
D
2
G
N
D
1
R4 15 33 _04
R
39
8
*LV
A
R
04
02
-2
40
E0
R
05
P
-L
F R
4
00
*L
VA
R
04
02
-24
0E
0R
0
5P
-LF
. L 10 3 F CM10 05MF -6 00T 01
L99
*HDMI 2 012 F 2S F -9 00 T0 4-sh ort
1
4
2
3
L10 1
*HDMI 2 012 F 2S F -9 00 T0 4-sh ort
1
4
2
3
HDMI B_E XT 1_ SCL
HDMI B_ DATA1N
R
4
05
*L
VA
R
04
02
-24
0E
0R
0
5P
-LF
C5 78
*0 . 1u_ 16 V _Y 5V _ 04
HDMI PORT
U27
TP D7S 01 9
V CC_S Y NC
1
V CC_V I DE O
2
VI DE O_1
3
VI DE O_2
4
VI DE O_3
5
GND
6
V CC_DDC
7
BY P
8
DDC_ OUT1
9
DDC_ IN1
10
DDC_ IN2
11
DDC_ OUT2
1 2
S Y NC_I N1
13
SY NC_ OUT1
1 4
S Y NC_I N2
15
SY NC_ OUT2
1 6
HDMI B_ DATA0P C5 70
1 0u_ 10 V_ Y 5V _ 08
HDMI B_ DATA0N
R
40
7
*LV
A
R
04
02
-2
40
E0
R
05
P
-L
F
L1 00
*HDMI 2 01 2F 2S F -90 0T0 4-s ho rt
1
4
2
3
R4 16 33 _04
C
586
220
p_
50
V_
N
P
O
_0
4
R
3
97
*L
VA
R
0
40
2-24
0E
0R
0
5P
-LF
HDMI B_E XT 1_ HPD
For ESD
HDMI B_E XT 1_ SDA
C
5
87
2
20
p_5
0V
_N
PO
_
04
R 580 2. 2 K_ 04
C
58
5
10
00
p_
50
V_
X7
R
_0
4
R
40
4
*
LV
A
R
040
2-2
40
E0
R
05
P-L
F
. L 10 5 F CM10 05MF -6 00T 01
J _ HDMI 1
C1 28 17 -1 19 A5 -L
S HI E LD2
2
T MDS DAT A1 +
4
T MDS DAT A1 -
6
S HI E LD0
8
T MDS CL OCK +
10
T MDS CL OCK -
12
RE S E RVE D
14
S DA
16
+5V
18
TM DS DA TA 2 +
1
TMDS DAT A2-
3
SHI E L D1
5
TM DS DA TA 0 +
7
TMDS DAT A0-
9
CL K S HI E LD
1 1
CE C
1 3
S CL
1 5
DDC/ CE C GND
1 7
HOT P L UG DET E CT
1 9
L9 8
1_ 04
C5 71
2 2u_ 6. 3 V_ X5 R_0 8
C
58
4
10
p_
50V
_
N
PO
_
04
C
590
0
.22
u_1
0V
_
Y5
V_
04
C57 7
0. 1 u_ 16 V_ Y 5V _0 4
R3 93
1 _04
RD3
* BA V99 RECT I FI E R
A C
A
C
R
39
5
*
LV
A
R
040
2-2
40
E0
R
05
P-L
F
C
58
8
10
00
p_5
0V
_
X7
R
_0
4
5V S _HDMI
5VS _HDMI
5V S
3. 3 VS
3 . 3VS
5VS
3. 3V S
3. 3 VS 5 V S
HDMI B_ DATA2P
HDMI B_ CLOCK P
R
647
499
_1
%
_
04
HDMI B_ DATA2N
HDMI B_ CLOCK N
R6 62 *0_ 04
R6 64 *0_ 04
R6 63 0_ 04
C
5
79
1
0p
_50
V
_N
P
O
_0
4
C
581
10p
_5
0V
_N
P
O
_
04
R4 14
1 50 _1 %_0 4
C
58
0
10
p_
50
V_
N
PO
_04
R41 3
15 0_ 1%_ 04
R4 12
1 50 _1% _0 4
RDAC_BLUE
RDAC_GRE E N
R6 65 0_ 04
R6 66 *0_ 04
RDAC_RE D
R6 68 *0_ 04
R6 67 0_ 04
DDCDA TA
RE D
DDCL K
V S Y NC
HS Y NC
2 4 m il
GRN
BLUE
6- 20- 14X30-015
R6 69 0_ 04
R6 70 *0_ 04
R6 73 *0_ 04
R6 71 0_ 04
RDAC_ V SY NC
RDAC_ DDCA DAT A
RDAC_ HS Y NC
Q27
2N3 90 4
B
E
C
RDAC_ BLUE
R6 58
10 K _04
RDAC_ RE D
R5 5 20 0K _0 4
RDAC_ DDCA CLK
R65 7
*2 00 K _04
R6 37 0_ 04
3 .3 V S
RDAC_ GRE EN
R6 29 0_ 04
R6 40 *0_ 04
CLOSE TO HD MI CO NN.
HDMI _ SCL
R6 36 0_ 04
R6 31 0_ 04
HDMI B_E XT 1_ SDA
R6 38 *0_ 04
R6 34 *0_ 04
5VS
Q2 6
MT N70 02 ZHS 3
G
D S
R6 39 0_ 04
R6 41 0_ 04
R6 35 *0_ 04
R6 30 *0_ 04
R656
2. 2K _ 04
R65 9
4. 7 K _04
R6 33 0_ 04
R6 32 *0_ 04
R65 5
4. 7 K _04
HDMI B_E XT 1_ SCL
HS Y NC_DAC1 8, 1 0
DA C_VS Y NC 3
V SY NC_ DAC1 8, 1 0
3 . 3VS
3 . 3VS
R6 42 *0_ 04
DDC6DA TA 8
DA C_HS Y NC 3
3 . 3V S
3 . 3V S
Q2 8
MT N70 02 ZHS 3
G
D S
DAC_ BLUE 3
B_ DA C1 8
DAC_DDCADA TA 3
5VS
R660
2. 2K _ 04
DDC6CL K 8
DAC_ RE D 3
R_DA C1 8
DA C_GRE E N 3
G_DA C1 8
DAC_DDCACLK 3
R6 74 *0_ 04
R6 72 0_ 04
R6 25 0_ 04
R6 26 *0_ 04
HDMI _ DDC_CL K 3
R6 28 *0_ 04
TMDS _T XCN 8
DDC1CL K 8
HDMI B_ D2BN 3
TMDS _T X2 P 8
HDMI B_CL KBN 3
R6 27 0_ 04
HDMI B_ D1BN 3
TMDS _T X2 N 8
TMDS _T XCP 8
TMDS _T X1 P 8
TMDS _T X1 N 8
HDMI B_ D0BN 3
HDMI B_ D2BP 3
HDMI B_ D1BP 3
HDMI B_CL KBP 3
TMDS _T X0 N 8
TMDS _T X0 P 8
HDMI B_ D0BP 3
RHDMI B_ CLK BN
HDMI _DDC_ DATA 3
HDMI _S CL
DDC1DATA 8
RHDMI B_ D2BN
RHDMI B_ D1BP
RHDMI B_ D0BN
RHDMI B_ CLK BP
RHDMI B_ D2BP
HDMI _S DA
RHDMI B_ D0BP
RHDMI B_ D1BN
R6 75 0_ 04
R6 76 *0_ 04
W250BAQDel R719, AddR718
HP D1 8
RHDMI B_ D0BN
R7 19 0_ 04
C
8
65
2
2p
_50
V
_N
P
O
_0
4
C
86
7
22p
_5
0V
_N
P
O
_
04
C
86
6
22
p_
50
V_
N
P
O
_04
C83 6 0. 1u _1 0V_X7R_ 04
C82 9 0. 1u _1 0V_X7R_ 04
C83 1 0. 1u _1 0V_X7R_ 04
C83 0 0. 1u _1 0V_X7R_ 04
C83 3 0. 1u _1 0V_X7R_ 04
C83 2 0. 1u _1 0V_X7R_ 04
C83 4 0. 1u _1 0V_X7R_ 04
C83 5 0. 1u _1 0V_X7R_ 04
P ORTC_ HP D 3
R7 18 *0_ 04 HDM IB_ EXT1 _HP D
3 . 3V S
Q2 5 MT N70 02 ZHS 3
G
D
S
R
6
48
4
99
_1
%
_0
4
R
64
9
49
9_
1%
_04
R
65
0
49
9_
1%
_
04
HDMI B_DA T A0 N
HDMI B_DA T A2 N
FO R EM I FO R EM I
H DMIB_ DAT A1N
HDMI B_E XT1 _S CL
HDMI B_ DAT A 0P
HDMI B_E XT 1_ SDA
HDMI B_E XT1 _HP D
HDMI _ CEC
H DMIB_ DAT A1P
H DMIB_ CLOCK N
H DMIB_ CLOCK P
HDMI B_ DAT A 2P
5 V S_ HDMI
. L 139 FCM 100 5MF -60 0T 01
. L 137 FCM 100 5MF -60 0T 01
. L 138 FCM 100 5MF -60 0T 01
HDMI _S DA
R
6
52
4
99
_1
%
_0
4
R
651
4
99
_1
%
_0
4
R6 61 0_ 04
Sheet 21 of 41
HDMI/ CRT
Schematic Diagrams
CCD/ 3G B - 23
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CCD/ 3G

60mil s
C CD_ E N
Layo ut Show " 3.5G( HSDPA)" Note
From H8 default HI
48 mil
CC D_ DE T #
5
MJ_CCD1
1
CCD
U I M_ DA T A
MINI CARD 3G(Port 6)
U I M_ VP P
U I M_ P W R
U I M_ RS T
U I M_ CL K
Q 3 2
A O3 41 5
G
D S
C5 9 9
1 0u _ 1 0V_ Y 5V_ 0 8
S
D
G Q3 3 A
R T 3 K 4 4M
2
6
1
+C6 01
22 0 u _4 V_ V_ B
(TOP VIEW)
LOCK
OPEN
J _ S I M1
C 1 77 0 6 61 -1
U I M_ DAT A
C 7
U I M_ VP P
C 6
U I M_ GN D
C 5
U I M_ P W R
C1 U I M_ R S T
C2 U I M_ CL K
C3
C5 95
0. 1 u _1 6 V_ Y 5 V_ 04
C6 1 1
0 . 1 u _1 6 V_ Y 5 V_ 04
C 6 10
1 u _ 6. 3 V_ Y 5 V_ 0 4
C5 9 8
0 . 1u _ 1 6V_ Y 5V_ 0 4
C5 9 2
0 . 1u _ 1 6V_ Y 5V_ 0 4
R 7 92
1 0 _ 06
C6 02
*2 2p _ 5 0V_ N P O_ 0 4
R4 2 4
1 00 K _ 0 4 C 8 57 1u _ 6 . 3V_ Y 5V_ 0 4
C6 0 3
*2 2 p_ 5 0V _N P O_ 0 4
R4 2 6 3 3 0K _ 0 4
C 60 4
* 22 p _ 50 V_ NP O _0 4
R4 22
*1 0m i l _s h or t_0 4
R7 9 0 0 _ 06
L 1 0 6 *W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt
1
4
2
3
J _ CCD 1
8 5 20 5 -0 50 0 1
1
2
3
4
5
+C5 9 3
2 20 u _ 4V_ V _ B
C 61 2
* 1u _ 6 . 3V_ Y 5V_ 0 4
C 6 13
0 . 1 u _1 6 V_ Y 5 V_ 04
C8 4 6
1 u_ 6 . 3 V_Y 5 V_0 4
R7 9 3 1 0 0K _ 0 4
U4 7
*G 52 4 3 A
V I N
4
V I N
5
E N
3
VO UT
1
GN D
2
Q1 1
MT N7 0 0 2ZH S 3 G
D
S
S
D
G Q 3 3B
R T 3K 4 4 M
5
3
4
UI M _ VP P
R7 8 9 *0 _ 0 6
C6 14
1u _ 6. 3 V _ Y 5 V _ 0 4
UI M _C LK UI M _ DAT A
UI M _ R S T
UI M _ P W R
Q 1 0
MT P 3 4 03 N 3
G
D S
KEY
J _3 G 1
8 89 1 0 -52 0 4 M-0 1
CO E X1
3
CO E X2
5
CL K RE Q #
7
GN D0
9
R E F C LK -
1 1
R E F C LK +
1 3
W AK E #
1
GN D1
1 5
P E T n0
2 3
P E T p0
2 5
GN D2
2 1
GN D3
2 7
P E Rn 0
3 1
P E Rp 0
3 3
GN D4
2 9
Re s erv e d 0
1 7
Re s erv e d 1
1 9
W _D I S ABL E #
2 0
GN D1 2
3 7
3. 3 VAU X_ 3
3 9
3. 3 VAU X_ 4
4 1
GN D1 3
4 3
Re s erv e d 2
4 5
Re s erv e d 3
4 7
Re s erv e d 4
4 9
Re s erv e d 5
5 1 LE D _ W LAN #
4 4 L E D_ W W AN #
4 2
GND 6
1 8
UI M _VP P
1 6 UI M _R E S E T
1 4
3 . 3 V AUX_ 0
2
UI M _C L K
1 2 UI M _D AT A
1 0 U I M_ P W R
8 1. 5 V_ 0
6
GND 5
4
P E RS E T #
2 2
3 . 3 V AUX_ 1
2 4
GND 7
2 6
1. 5 V_ 1
2 8
S M B_C L K
3 0
S M B _D AT A
3 2
GND 8
3 4
US B_ D -
3 6
U S B_D +
3 8
GND 9
4 0
L E D_ W P AN #
4 6
1. 5 V_ 2
4 8
GN D1 0
5 0
3 . 3 V AUX_ 2
5 2
GN D1 1
3 5
R4 23
10 0 K _ 04
C6 0 5
*2 2 p _5 0 V _ NP O_ 0 4 C6 0 0
*0 . 1 u _1 6 V_ Y 5 V_ 04
C5 9 6
1 0u _ 10 V _ Y 5 V _ 0 8
R4 2 1
*1 0 mi l _s h o rt_0 4
C5 9 4
0. 1u _ 16 V _ Y 5 V _ 0 4
R7 9 1
2 0K _ 1 % _0 4
R 41 9 *1 5 m i l _ sh o rt_ 06
R 42 0 *4 . 7K _0 4
3 G_ 3 . 3 V
3 G_ 3 . 3 V
3G _ 3. 3 V
5 V
3 G_ 3 . 3 V
5V_ C CD
3 . 3 V
3G _3 . 3 V
3 . 3 V_ 3G
3 . 3 VS
US B_ P N 9 1 6
3 G _E N 2 7
3G _ DE T # 2 7
C CD _D E T # 2 7
US B _P P 5 16
US B_ P N5 16
US B_ P P 9 1 6
3G _ P OW E R 2 7
C CD _E N 27
S I ML OC K
David 8/25
SIM CONN
Layout?
1. SIM? ? ? ? ? ? ? ? (10mil)
2. ? ? ? ? ? ? ? ? GND
3. SIM hold ? ? ? ? ? GND? ?
4. SIM CONN ? ? MINI CARD
CONN
3A 120mils
Fr om SB GPI OP in defa ul t HI
Pow er Plan e: Susp end
S3: Def ined
AO3409( 90mohm) C hange
to AO3 415(45moh m).
3G POWER
AO3409? ? ?
ADDR128,Q2
So lut ionFor
PDA
BUG- When
Bat tery
dis char ge to
sh utd ow n,
th eCMOS
so me time s
los s.
3A 120mils
1A
1 A
C CD _E N
60 mils
C 86 8
0 . 1 u_ 1 6 V_Y 5 V_0 4
Sheet 22 of 41
CCD/ 3G
Schematic Diagrams
B - 24 Card Reader/ LAN JMC261C
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Card Reader/ LAN JMC261C
Sheet 23 of 41
Card Reader/ LAN
JMC261C

M LM X0-_ R
R 82 8 0 _ 0 4
10/28Modify value
S D_ CD #
S D_ D1
S D_ D0
S D_ CL K
S D_ D2
S D_ W P
D VDD
MS _ I NS #
S D_ D3
S D_ CL K
S D_ BS
S D_ BS
S D_ D3
S D_ D1
S D_ D0
S D_ D2
Card Reader
Power
4 IN 1 SOCKET SD/MMC/MS/MS Pro
IS
O
N
V D DR E G
Pin#35
S
D
_
D
1
6- 22- 25R00- 1B4
6- 22- 25R00- 1B5
near Pi n#41
L A NXOU T
L A NXI N
Pi n#52
Placeall capacitorsclosedtochip.
Thesubscript ineachCAP incicatesthepin
number of J MC251/J MC261that shouldbe
closedto.
Pi n#55
Pi n#43
Pi n#62
Pi n#43
Pi n#21 Pi n#59 Pi n#2
LA
N
X
IN
S D _ CL K
L A N _M DI N 2
L A N _M DI N 0
L A N _M DI N 1
L A N _M DI P 1
L A N _M DI P 0
M DI O 8
L A N _M DI P 3
L A N _M DI P 2
PC Ie D iff er en ti al
Pa ir s = 1 00 O hm
S
D
_B
S
JMC261 C
B U F _P LT _ RS T #
( >2 0m il)
MP D
L AN _S C L
C
R
_
C
D
1
N
M
D
IO
13
L
A
N
X
O
U
T
M
D
IO
7
( >2 0m il)
ML M X1 +
ML M X1 - M L MX 0 -
L AN _S D A
LAN _ P CI E _ W AK E #
M DI O 1 0
S
D
_
D
0
M P D
S D X C_ P OW E R
G9141
APL5603- 12B( no R201, R198)
L
A
N
_
L
E
D
1
MDI O1 3
T D_ C T
DV D D
M DI O 9
M
D
IO
1
1
R
E
G
L
X
S D _ CD#
RE G L X DVDD
S wit ch in g Reg ul at or
c los e to P IN3 3
Pi n#33 Pin#33
(> 20m il )
(> 20m il )
Fo r J MC 25 1/2 61 o nl y
LDOt ype ? J MC26 1C ,
S
D
_D
2
M S _ I NS #
need t o close to chip
B U F _ P LT _ RS T #
L A N _M DI N 3
S
D
X
C
_
P
O
W
E
R
S
D
_
D
3
C R_ CD 1N
A VDD 12 _ 62
R D_ CT
L A N _M DI N 0
L A N _M DI P 0
ML MX0 +
ML MX0 -
DC _N P
DD _N P
ML MX1 -
ML MX1 +
W240BU 6-21- B4000- 008
RX _ CT RX _ CT
L6 2 NC da vid 8 /25
ML M X1 -_ R
ML M X0 -_ R
ML M X0 +_ R
ML M X1 +_ R
T X_ CT
L A N _M DI N 1
L A N _M DI P 1
S D_ CL K
Card Reader Pull High/Low
Resistors
LA
N
_
LE
D
0
S D _ W P
S D_ CD #
S D _ W P
MS _ I N S # R 5 81
0 _ 0 6
M LM X0+_ R
Pi n#13 Pi n#7
S E E DAT
need to close t o chip
Da v i d 8 / 2 7
Pin#32
(> 20m il )
Pi n#31
(>2 0m il )
Pi n#32 Pin#31
ML MX 1 -_ R
LA N _ S CL
need t o cl ose to chip
P CI E _ W A K E #
W250BUQ 6- 21- B4040-008
V D D_ I N
ML MX 1 +_R
Reser ved
Pi n#7
LA N _ S DA
R8 26 *0 _ 0 4
R8 2 5
1 0K _ 0 4
Q7 9
M TN 7 00 2 ZHS 3 G
D
S
3 . 3V
J M _ D3 MO DE 1 6
J M _D 3 MO DE
R5 8 4
0 _0 6
Pi n#59
APL5603-12B Change AX6610.
M L MX 0 +
Ra
Vout=0.8(1+Ra/Rb).
Rb
for D3EC991022
S E E DA T
1.2V
for AX6610, Ra( 1. 69K_1%),
C8 1 6
0. 1 u _ 16 V _ Y 5 V_ 0 4
C 8 00
*0 . 1u _ 1 6V _Y 5V _0 4
R6 4 6 0 _ 0 4
R6 0 1 *0 _ 0 4
C 48 9
0
.0
1u
_
1
6V
_
X
7
R
_0
4
C 80 5
0 . 1 u_ 1 6 V _Y 5 V _0 4
C8 08
0. 1 u _ 16 V_ Y 5 V _ 0 4
C8 17
0. 1 u _ 16 V _ Y 5 V _ 0 4
R5 8 3 * 0_ 0 4
C 82 1
* 0. 1 u _ 16 V_ Y 5 V _ 0 4
C8 0 4
10 u _ 10 V _ Y 5 V _ 0 8
L 3 6
P 30 1 2
R D+
1
R D-
2 RX +
16
R X-
15
R D_ CT
3
R X _C T
14
N C
4
NC
12
N C
5
T D_ C T
6
T D+
7
NC
13
T X-
9
T D-
8
T X _C T
11
T X +
10
R4 4 7
*0 _ 0 6
(LQFP 64)
J MC261C
U3 0
J M C2 6 1 C
R
E
X
T
1
A
V
D
D
33
2
X
IN
3
X
O
U
T
4
G
N
D
10
L
X
3
3
A
V
D
D
1
2
7
CP P E N
2 3
C
LK
N
5
C
L
K
P
6
A
V
D
D
1
2
1
3
R
X
P
8
GND
2 2
T
X
N
1
1
T
X
P
12
P W RCR
3 0
R S TN
2 4
W A K E N
2 7 MP D
2 8
IS
O
N
4
5
L AN_ L E D2
2 6
C
R
_
C
D
1
N
16
C R_ CD 0N
1 7
R
X
N
9
M DI O 8
51
L
A
N
_
L
E
D
0
4
7
M
D
IO
7
1
5
MD I O6
2 0
G
N
D
4
4
M
D
IO
5
4
1
M
D
IO
4
40
M
D
IO
3
3
9
V
D
D
IO
4
3
M
D
IO
2
38
M
D
IO
1
3
7
M
D
IO
0
36
M DI O 9
50 M DI O 10
49
M
D
IO
1
1
4
8
M DI O1 2
1 9
VD DRE G
3 2
M
D
IO
1
3
14
M DI O1 4
1 8
CR _ LE D
2 5
T E S T
2 9
V DDI O
2 1
G
N
D
34
VC C3 V
3 1
F
B
1
2
3
5
LA
N
_
LE
D
1
4
6
V
D
D
O
42
VD D
52
VI P _1
53
VI N _ 1
54
AV DD1 2
55
VI P _2
56
VI N _ 2
57
G ND
58
AV DD3 3
59
VI P _3
60
VI N _ 3
61
AV DD1 2
62
VI P _4
63
VI N _ 4
64
C 64 7
2 . 2 u _6 . 3 V_ X5 R _0 6
C 80 3
* 0. 1 u _ 16 V_ Y 5 V _ 0 4
R3 3 4
75
_
1
%
_
0
4
C6 4 5
0. 1 u _ 16 V_ Y 5 V _ 0 4
R4 4 4 1 K _ 0 4
R4 3 4
*0 _ 06
P J S -0 8S L 3 B
J _R J 1
DD-
8 DD+
7
DB-
6
DC-
5 DC+
4
DB+
3 DA-
2 DA+
1
s h i e l d
GN D1
s h i e l d
GN D2
U 49
A X6 6 10
GN D
1
VC NT L
6
VO UT
3
VI N
5
VO UT
4
VF B
2
P OK
7
E N
8
VI N
9
R6 7 7 * 0_ 0 4
C 6 46
* 0 . 1u _ 1 6V _ Y 5V _ 0 4
R 44 0 0 _ 0 4
R4 5 0
*0 _ 04
R4 4 6
*4 . 7 K _ 04
C8 5 3
8 2 p _5 0 V _ NP O _0 4
C 8 10
* 10 u _ 6. 3V _ X 5 R_ 06
R4 3 6 *4 . 7 K _0 4
R7 3 6
*7 5_ 1 % _0 4
R6 4 4 0 _0 4
C6 5 0
1 0u _ 1 0V _Y 5V _0 8
Rb(2.7K_1%)
R 4 33 1 K _ 0 4
C8 5 2
1 u_ 1 0 V _Y 5 V_0 6
J _C A RD -RE V 1
MD R0 1 9-C 0 -10 4 2
DAT 2 _S D
P 2
V S S _ MS
P 2 1
CD/ D A T 3_ S D
P 3
CMD _ S D
P 4
V S S _ S D
P 5
V DD _S D
P 6
CL K _ S D
P 7
V S S _ S D
P 8
DAT 0 _S D
P 9
DAT 1 _S D
P 1 0
W P _ S D
P 1 1
V S S _ MS
P 1 2
V CC _M S
P 1 3
S CL K _ MS
P 1 4
DAT 3 _M S
P 1 5
I NS _ MS
P 1 6
DAT 2 _M S
P 1 7
S DI O / DA T 0 _M S
P 1 8
DAT 1 _M S
P 1 9
B S _M S
P 2 0
CD_ S D
P 1
G ND
P 23 G ND
P 22
R6 4 5 0 _ 0 4
R2 69
75
_
1
%
_
0
4
C 81 5
0 . 1 u_ 1 6 V _ Y 5 V_ 04
C 6 43
* 1 0p _ 50 V_ N P O_ 0 4
U4 3
*A P L 5 6 03 -1 2 B I -T RG
I N
1
S E T
4
GN D
2
S HD N#
3
OUT
5
R3 43
75
_
1%
_
0
4
R4 3 2 * 1M _ 04
C 65 2
1 0 u_ 1 0 V_Y 5 V _0 8
R5 8 2 1 0 K _ 04
C8 0 1
27 p _ 50 V _ NP O _ 04
C 81 9 0. 1 u _ 10 V _ X7R _ 04
R6 4 3 0 _ 0 4
C 8 13
0 . 1 u _1 6 V_ Y 5 V _ 04
C8 54
0. 1 u _ 16 V _ Y 5 V_ 0 4
D4 5
RB7 5 1V
A C
R 43 8 *1 0 K _0 4
C 81 2
* 0. 1 u _ 10 V _ X 7R _ 04
C 8 20
0 . 1 u _1 6 V _ Y 5 V _ 0 4
R 44 5 10 K _ 0 4
R3 4 8
75
_
1
%
_
0
4
R5 8 8 0 _ 04
C 6 20
1 0 0 0p _ 2 K V _X 7 R_ 1 2 _H 1 25
C8 0 7
0 . 1u _ 1 6V _ Y 5V _ 0 4
C 79 9
*1 0 u_ 1 0 V _ Y 5 V _ 08
C 80 6
0 . 1 u_ 1 6 V _ Y 5 V_ 04
C6 4 9 0 . 1 u_ 1 6 V_ Y 5 V _ 04
C8 0 9
0 . 1u _ 1 6V _Y 5V _0 4
.
L 6 2
*S W F 2 52 0 CF -4 R7 M -M
R 44 1 *0 _ 06 R4 3 5
12 K _ 1 %_ 0 4
L 13 1
*W C M2 0 12 F 2 S -1 6 1T 0 3
1
4
2
3
C8 39
10 u _1 0 V _ Y 5 V_ 0 8
R4 3 7
* 4 . 7K _ 0 4
L 13 2
*W C M2 0 12 F 2 S -1 6 1T 0 3
1
4
2
3
C 61 9
*0
.0
1
u_
1
6
V
_
X
7R
_
04
C 81 1 0. 1 u _ 10 V _ X7R _ 04
C6 5 1
0 . 1u _ 1 6V _ Y 5V_ 0 4
R5 8 5
2 . 7 K _1 % _ 04
R 72 9 *0 _ 06
C 6 44
1 0 u _1 0 V_ Y 5 V _ 08
C 81 4
0 . 1 u _1 6 V _ Y 5 V _ 04
C6 4 8
1 u_ 6 . 3 V_ Y 5 V _ 04
R 44 3 0_ 0 4
R 58 9 *4 . 7 K _0 4
C 8 18
0 . 1 u _1 6 V_ Y 5 V _ 04
R4 4 2
1 . 6 9K _ 1 % _0 4
U 31
*A T 2 4C 0 2BN
S CL
6
A0
1
A1
2
A2
3
W P
7
S DA
5
V CC
8
G ND
4
X8
F S X5 L _ 25 MH Z
1 2
C 8 02
27 p _ 50 V _ NP O_ 04
D
V
D
D
3. 3 V _ L AN
D
V
D
D
DV D D
3 . 3 V _ LA N
3 . 3 V_L A N
D VDD
3 . 3 V _ L A N
3 . 3 VS
V C C_ CAR D
3 . 3VS
3 . 3 V _ LA N
DV D D
DVD D
DVD D
VCC _ CA R D
V D D_ I N
V DD 3 3 . 3V
DVD D DV D D
3 . 3V _L A N
3 . 3 V _ LAN
VCC _ CA RD
3 . 3 V_ LA N
VC C_ CA R D
DV DD
3. 3 V S
5V
3 . 3 V _L AN
V D D3 3 . 3V
3 . 3 V
3. 3 V S V D D3
3 . 3 V _ LAN
V D D3
V DD 3
3 . 3V _ L A N
DV DD D VDD
D V DD DVD D
BUF _P L T _ RS T # 15 , 1 9 , 2 4, 2 6 , 2 7
P C I E _ W A K E # 16 , 2 4 , 26
VC C_ CA R D
P CI E _T X N0 _ J M C 1 5
P CI E _ RX N 0_ J MC 15
P CI E _T X P 0 _J MC 1 5
L A N_ P CI E _W AK E # 2 7
C LK _ P C I E _ J M C# 1 5
C L K _P CI E _ J MC 15
P CI E _ RX P 0 _ J M C 1 5
J M C_ 2 5M _I N 1 5
VD DR E G
10/21
need t o cl ose to chip
Fo r JM C2 51 C
Pi n#2 Pin#2
I S O N
Schematic Diagrams
MINI PCIE/ SATA HDD/ ODD B - 25
B
.
S
c
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D
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MINI PCIE/ SATA HDD/ ODD
Sheet 24 of 41
MINI PCIE/ SATA
HDD/ ODD

S A TA _ T XP 0
S A TA _ T XN0
H DD _N C1
H DD _N C2
H DD _N C3
H DD _N C0
SATA HDD
A L L T O P -C1 6 6 N 5 -1 2 2 0 5 -L
S A T A _ TX N 1
S A T A _ RX N1
S A T A _ TX P 1
S A T A _ RX P 1
P I N G ND 1 ~2 =G ND
SATA ODD
W250BUQ6- 20- 43750- 022
W240BU 6- 20-43730- 122
20 mil
20 mil
S A TA _ R XN 0
S A TA _ R XP 0
W LAN _ CL K RE Q #
P CI E _ W AK E #
3. 3 V AU X_1
BUF _P L T _ RS T #
20 mil
Port 2
20 mil
Layout Sho w " WLAN( Wimax, 802. 11N) " Not e
R4 9 4 * 1 0K _ 0 4
S ATA T X N0 1 7
S ATA T X P 0 1 7
S ATA R XN0 1 7
S ATA R XP 0 17
S AT ATX P 1 1 7
S AT ARXP 1 17
S AT ARXN1 1 7
S AT ATX N 1 1 7
3 I N1
C6 5 5 0 . 0 1 u_ 1 6 V_ X7 R_ 0 4
R4 5 2 *0 _ 04
R4 5 4 *0 _0 4
R 70 4
*1 0 K _0 4
C
6
7
2
0
.1
u_
1
6V
_Y
5
V
_
0
4
+
C
67
0
2
2
0u
_
6
.3V
_
6
.6
*5
.7
R4 5 6 * 1 0K _ 0 4
J _ OD D1
C1 8 5 53 -1 1 30 5 -L
S 1
S 2
S 3
S 4
S 5
S 6
S 7
P 1
P 2
P 3
P 4
P 5
P 6
KEY
J _ M I NI 1
BE L LW E TH E R 8 0 0 03 -1 0 21
C OE X1
3
C OE X2
5
C L K RE Q #
7
G ND 0
9
R E F C LK -
1 1
R E F C LK +
1 3
W AK E #
1
G ND 1
1 5
P E Tn 0
2 3
P E Tp 0
2 5
G ND 2
2 1
G ND 3
2 7
P E Rn 0
3 1
P E Rp 0
3 3
G ND 4
2 9
R e se rv e d 0
1 7
R e se rv e d 1
1 9
W _D I S AB L E #
2 0
G ND 1 2
3 7
3 . 3 V AU X_ 3
3 9
3 . 3 V AU X_ 4
4 1
G ND 1 3
4 3
R e se rv e d 2
4 5
R e se rv e d 3
4 7
R e se rv e d 4
4 9
R e se rv e d 5
5 1 LE D _ W L AN#
4 4 L E D_ W W AN#
4 2
GN D6
1 8
UI M _ VP P
1 6 UI M _R E S E T
1 4
3 . 3 V AU X_ 0
2
UI M _ CL K
1 2 UI M _D AT A
1 0 U I M_ P W R
8 1. 5 V_ 0
6
GN D5
4
P E RS E T #
2 2
3 . 3 V AU X_ 1
2 4
GN D7
2 6
1. 5 V_ 1
2 8
S M B_ CL K
3 0
S M B _D AT A
3 2
GN D8
3 4
US B _D -
3 6
U S B _ D+
3 8
GN D9
4 0
L E D _W P AN#
4 6
1. 5 V_ 2
4 8
GN D1 0
5 0
3 . 3 V AU X_ 2
5 2
G ND 1 1
3 5
C6 5 3 0 . 0 1 u_ 1 6 V_ X7 R_ 0 4
R7 2 2 1 00 K _ 0 4
C
6
7
5
2
2u
_
6.
3V
_
X
5
R
_
0
8
R 4 51 1 0 K _ 04
C 65 6 0. 0 1 u _1 6 V_ X7 R _0 4
R4 5 8 0 _0 4
C
6
7
4
1
u_
6
.3
V
_Y
5V
_
0
4
C6 6 5
0. 1 u _ 16 V_ Y 5 V_ 0 4
Q 7 *M TN 70 0 2 ZHS 3
G
D S
C
6
7
3
0
.1u
_
1
6V
_Y
5
V
_
0
4
R 70 3
* 1M _ 04
C6 6 2
*1 0 u _1 0 V _ Y 5 V_ 08
C6 6 6
1 u_ 6 . 3 V _ Y 5 V_ 04
J _ HD D1
A L L T OP -C 16 6 N5 -1 2 20 5 -L
S 1
S 2
S 3
S 4
S 5
S 6
S 7
P 1
P 2
P 3
P 4
P 5
P 6
P 7
P 8
P 9
P 1 0
P 1 1
P 1 2
P 1 3
P 1 4
P 1 5
C6 6 9
*0 . 1 u _1 6 V _ Y 5 V_ 04
C
6
7
1
0
.1
u_
1
6
V
_Y
5
V
_
0
4R7 0 2 0 _ 06
R7 2 7 0 _ 04
R7 0 5 0_ 0 4 OD D_ DE T E C T#
C6 5 4 0 . 0 1 u_ 1 6 V_ X7 R_ 0 4
C8 4 5
*1 00 0 p _5 0 V _ X7 R _0 4
C6 77
0. 0 1 u _1 6 V_ X7 R _0 4
R7 23 *1 0 m i l _ sh o rt
R 72 6 * 10 m i l_ s ho rt
R 72 5 * 10 m i l_ s ho rt
R7 24 *1 0 m i l _ sh o rt
C 6 78
0 . 0 1 u_ 1 6 V _X7 R_ 0 4
+ C 66 8
* 22 0 u _6 . 3 V_ 6. 6 * 5. 7
C 65 9 0. 0 1 u _1 6 V_ X7 R _0 4
C6 6 3
*0 . 1 u _1 6 V_ Y 5 V _ 04
C6 5 8 0 . 0 1 u_ 1 6 V_ X7 R_ 0 4
C 84 7
0 . 1 u _1 6 V_ Y 5 V _ 04
R4 5 7 * 0 _0 4
C 65 7 0. 0 1 u _1 6 V_ X7 R _0 4
R4 5 3
*1 0 K _0 4
Q 31
* MT N7 0 02 ZH S 3 G
D
S
C6 6 1
*0 . 0 1 u_ 1 6 V _ X7 R_ 0 4
C 66 7
1 0 u _1 0 V_ Y 5 V_ 08
R7 3 8 *0 _0 4
C 67 9
0 . 0 1u _ 1 6V _X 7 R_ 0 4
R7 0 7 * 1K _0 4
C 66 0 0. 0 1 u _1 6 V_ X7 R _0 4
C 66 4
0 . 1 u _1 6 V _ Y 5 V_ 04
C
6
7
6
22
u
_
6.3
V
_
X
5
R
_
0
8
R 70 6 *1 0 K _0 4
Q3 0
* AO3 4 0 9
G
D S
R7 3 9 *0 _0 4
OD D_ 5 V
5 VS
3 . 3V S
5V S
5VS
3 . 3 VS
OD D_ 5 V
3 . 3 V
OD D_ 5 V
3 . 3 V
3 . 3 V S
3 . 3 VS
3. 3 V
3 . 3 V
VD D3
3. 3 V
O DD _D A #_F C H 1 6
O DD_ D E TE CT # 16
BT _E N 27 , 2 8
B T_ ON 1 5 , 28
OD D_ P W R 1 7
W LA N _ DE T # 27
C LK _ P C I E _ W LA N# 15
W L A N_ CL K R E Q# 1 6
BT _D E T # 2 7 , 2 8
US B_ P N 2 1 6
C LK _P C I E _ W L AN 15
W LAN _ LE D # 27 , 2 8
US B_ P P 2 1 6
W L AN_ E N 2 7 , 2 8
BUF _ P L T _R S T # 1 5 , 1 9, 23 , 2 6 , 27
P CI E _ W AK E # 1 6, 2 3 , 2 6
8 0 CL K 2 7
P C I E _ RXN3 _ W L A N 1 5
P C I E _ T XN 3_ W L A N 1 5
P C I E _T XP 3 _ W LA N 1 5
BT _E N 2 7, 2 8
3I N 1 27
B T_ ON 1 5, 2 8
P C I E _R XP 3_ W L A N 1 5
8 0 CL K 2 7
3 I N 1 R5 0 8 0 _0 4
R4 9 6 0 _0 4
R4 55 *1 0 K _ 04
R5 0 9 *0 _ 0 4
MINI CARD (WLAN,Port 5)
VD D3
12/6Reserve
Schematic Diagrams
B - 26 AUDIO CODEC ALC261C
B
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AUDIO CODEC ALC261C
Sheet 25 of 41
AUDIO CODEC
ALC261C

P D#
S P K OU T R+
S P K OU T R-
R4 6 4 3 9 . 2 K _1 % _ 04
L 1 09 *H CB1 0 05 K F -1 2 1 T2 0 1 2
R4 6 8 2 0 K _ 1% _ 0 4
C 6 91
0 . 1 u _ 16 V_ Y 5 V_ 0 4
C7 1 2
*1 8 0 p_ 5 0 V_N P O_ 0 4
R4 6 1 *1 0 m il _ s ho rt
L 11 1
H CB1 0 0 5K F -12 1 T 20
1 2
R 46 5
4 . 7 K _ 04
C 69 4
1 0 u _1 0 V_ Y 5 V_ 08
R4 6 0 * 0 _0 4
R 45 9 0 _ 06
R4 7 6 2. 2 K _ 0 4
J _ I NT M I C1
8 8 2 66 -0 2 00 1
P CB F oo tp ri nt =8 8 2 66 -2 L
1
2
C6 9 2
1 0 u_ 1 0 V_Y 5 V_ 08
C6 8 9
10 u _ 10 V_ Y 5 V_ 0 8
J P 1 *1 0 mi l _ sh o rt
C7 0 4 2 . 2 u _6 . 3 V_ X5 R _0 6
C7 0 6
1u _ 6 . 3V _Y 5 V_0 4
C 69 0
0 . 1 u _1 6 V_ Y 5 V_ 04
C
A
A
D 28
BAT 5 4 CW G H
1
2
3
R4 6 6 * 10 0 K _ 04
C 68 6 0. 1u _ 1 6V_ Y 5V_ 0 4
L 11 0
H CB1 0 0 5K F -12 1 T 2 0
1 2
R4 6 3 2 0 K _ 1% _ 0 4
R4 7 2 1K _ 0 4
C 7 10
* 1u _ 1 0V _Y 5 V_0 6
C6 8 3
0 . 1 u _1 6 V_ Y 5 V_ 04
C6 8 5
*0 . 1 u _1 6 V_ Y 5 V_ 0 4
C7 0 7
2. 2 u _ 6. 3 V_ X5 R_ 0 6
R4 7 4 1K _ 0 4
C6 9 6 4 . 7 u _6 . 3 V_ X5 R _0 6
L 1 12
* F CM 16 0 8 K -1 21 T 0 6_ s h ort
R 4 71 2 2 _0 4
C6 9 7 4 . 7 u _6 . 3 V_ X5 R _0 6
C7 1 1
*1 8 0 p_ 5 0 V_N P O_ 0 4
C 7 02 22 p _ 50 V_ NP O _ 04
Q 13
* MT N7 0 0 2Z HS 3 G
D
S
C 6 80
1 0 u _1 0 V_ Y 5 V_ 0 8
DIGITAL ANALOG
U 32
A LC 2 69 Q -VB6 -GR
D
V
D
D
1
1
GP I O0 -DM I C-D AT
2
GP I O1 -DM I C-C L K
3
P D #
4
S D ATA- OUT
5
BI T -CL K
6
D
V
S
S
2
7
S D ATA- I N
8
D
V
D
D
-IO
9
S Y NC
1 0
RE S E T#
1 1
P C BE E P
1 2
S en s e A
1 3
L I NE 2 -L
1 4
L I NE 2 -R
1 5
M I C2 -L
1 6
MI C2 -R
1 7
S en s e -B
1 8
J DR E F
1 9
M ON O-O UT
2 0
M I C1 -L
2 1
MI C1 -R
2 2
L I NE 1 -L
2 3
L I NE 1 -R
2 4
A
V
S
S
1
26
VR E F
2 7
LD O_ C AP
2 8
MI C 2- VRE F O
2 9 M I C1 -VR E F O-R
3 0
M
IC
1
-V
R
E
F
O
-L
31
HP -O UT -L
3 2
A
V
S
S
2
3
7
OP V E E
3 4
CBN
3 5
C BP
3 6
HP -OUT -R
3 3
P
V
D
D
1
3
9
S P K -L +
4 0
S P K -L -
4 1
P
V
S
S
1
4
2
P
V
S
S
2
43
S P K -R +
4 5 S P K -R -
4 4
P
V
D
D
2
46
S P D I F C2 / E AP D
4 7
S P D I F O
4 8
A
V
D
D
2
38
A
V
D
D
1
2
5
G
N
D
49
12/6
C6 9 9 * 10 0 p _5 0 V_ NP O _ 04
C6 8 8
0 . 1u _ 1 6V _Y 5 V_0 4
C 68 7 0. 1u _ 1 6V_ Y 5V_ 0 4
C 69 8
6 8 0p _ 5 0V _X7 R_ 0 4
R4 7 5 2. 2 K _ 0 4
R4 7 8
4. 7 K _ 0 4
C7 0 9
10 0 p _5 0 V_ NP O _ 04
R4 67 1 K _ 04
C 68 1
0 . 1 u_ 1 6 V_ Y 5 V_ 04
C 68 4
* 1 0u _ 1 0V_ Y 5V_ 0 8
L 1 13
* F CM 16 0 8 K -1 21 T 0 6_ s h ort
C6 9 3
0. 1 u _ 16 V_ Y 5V_ 0 4
J P 2 *1 0 mi l _ sh o rt
R 4 77 4 7 K _ 0 4
R 4 62
1 0 K _ 04
C6 9 5
1 u_ 6 . 3 V_ Y 5 V_ 04
C7 0 3 0 . 1 u _1 6 V_ Y 5 V_ 04
C7 0 0 4 . 7 u _6 . 3 V_ X5 R _0 6
C7 0 5 1 0 u_ 1 0 V_ Y 5 V_ 08
C6 8 2
1 0 u_ 1 0 V_Y 5 V_ 08
C7 0 1 4 . 7 u _6 . 3 V_ X5 R _0 6
J _ S P K L 1
8 5 20 4 -0 20 0 1
P CB F o o tp rin t = 8 5 20 4 -0 2R
1
2
Q 1 2
*BS S 1 3 8 _N L G
D
S
C 7 08
2 . 2 u _6 . 3 V_ X5 R _0 6
5 VS
DVD D_ I O
5VS
5 VS
A UDG
3. 3 VS _ AU D
A UDG
5 VS
AU DG
3 . 3 VS _ AUD
AU DG
A UDG
3 . 3VS
1. 5VS
P VD D1 _ 2
5 VS _A UD
AU DG
AUD G
AUD G
K BC _M UT E # 2 7
HE A DP H ONE -L 29
HDA _S P K R 1 6
HDA _S D I N0 1 6
HD A_R S T # 1 6
H DA_ S Y NC 1 6
M I C_ S E N S E 2 9
K BC_ BE E P 2 7
HE A DP H ONE -R 2 9
HP _ S E N S E 2 9
H DA_ S DO UT 1 6
H DA_ BI T CL K 1 6
S P K O UT R- 2 9
MI C 1 -L M 2 9
MI C 1-R M 2 9
S P K O UT R+ 2 9
For 3. 3V HDA Li nk.
L 1 3 6 * F CM 1 60 8 K -1 21 T 0 6 _s h o rt
L 1 3 5 * F CM 1 60 8 K -1 21 T 0 6 _s h o rt
VT1802P 10u
Speak er 8ohm- --- -- > 20mil s
VT1802P
SPKOUTR+, R-, L+, L- Tr ace wi dth
2
AZ_RST#
AZ_RST# For 3.3V
HDA Li nk D e- pop
58 Co mp onent. AUDIO CODEC
1
Lay out note:
VT1802P
L75,C718 ? ? ?
Speak er 4ohm- --- -- > 40mil s
9/8
For 1.5V H DA Link .
FOR VOLUMN
ADJUST
5VS
DIGITAL
20ms
EMI Requi re
GN D and AUDG spac e is
60mil s ~ 100mi ls
PD#
Speak er wi r e length l es s than 8000mi ls , It don't need LC Fil ter .
I NT _ MI C _ OU T I NT _ MI C
3.3V S_AUD
PC BEEP
MI C 2- VRE F O
ALC269 VB
E AP D
CO DE C _ GP I O 1
CO DE C _ GP I O 0
S P DI F O
H DA_ R S T#
Therm al Pad pl ac e 9
Vi a hole.
BE E P _R
AZ _S D I N0 _ R
S P K O UT L +
S P K OU TL -
MI C 1- VRE F O -R
MI C 2- VRE F O VT1802P NC PIN
HE AD P HO NE - R
HE AD P HO NE - L
CO DE C _C BN
LI NE 1 _ R
MI C 1_ R _C
LI NE 1 _ L
AN ALOG
M I C1 -VRE F O-L
M I C1 -VRE F O-R
MI C 1-R
S E NS E _B
MO NO _O UT
MI C 1_ L _ C
P lease Let LC Filt er
t oget her and c lose t o
C odec. IF S peak er
w i re lengt h is less
t han 8000m ils It don't
need the LC Filt er.
HP _S E NS E
MI C_ S E NS E
S P K O UT L +_L
MI C 2_ R
LI NE 2 _ L
MI C 2_ L
LI NE 2 _ R
J_SPK1
BE E P
S P K O UT R-
S P K O UT L +
S P K O UT R+
S P K O UT L -
EMI Require
AZ_RST# For 1. 5V
HDA Link De-pop
PD# Cont r ol
VT1802P 5.1K_1%_04
M I C1 -VRE F O-L
AUD G
AUD G
S P K OU T L-_ L
C2 3 6 *1 8 0 p_ 5 0 V_ NP O _0 4
PN: 6-20- 43130- 104
C2 3 9 *1 8 0 p_ 5 0 V_ NP O _0 4
C2 3 7 *1 8 0 p_ 5 0 V_ NP O _0 4
J _ S P K 1
* 85 2 0 4-0 4 0 01
1
2
3
4
C2 4 6 *1 8 0 p_ 5 0 V_ NP O _0 4
S P K OUT R +_ R
C
A
A
D3 3
BAT 54 AW G H
1
2
3
BE E P _C
M I C1 -R _M
M I C1 -L _ M
S E NS E _A
HD A_ RS T #
S P K OU TL -_ L
CO DE C _V RE F
S P K O UT R+
H DA_ R S T#
S P K OUT R -_R
S P K OU T L+_ L
VT1802P 4.7K_1%_04
VT1802P 75_1%_04
Reserve
LD O_ C AP
J D RE F
2 1
J_INTMIC1
VT1802P
2.2K_04
VT1802P
330P
S P K O UT R-
MI C 1-L
CO DE C _C BP
Schematic Diagrams
USB 3.0 VL800 B - 27
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
USB 3.0 VL800
Sheet 26 of 41
USB 3.0 VL800
Schematic Diagrams
B - 28 KBC- ITE IT8518
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
KBC- ITE IT8518

K BC _W R E S E T #
6- 22- 32R76- 0BG
6- 22- 32R76- 0B2
R 83 0 * 0 _0 4
E C_ VCC
W L A N_ L E D#
C K 3 2K
Co- l ayout X2, X3
C K 3 2K E
R8 0 8 2. 2 K _ 0 4
( BE E P )
S M D_ BA T
S M C_ BA T
R 50 6 1 0K _ 0 4
R 50 7 *1 0 K _ 04
.
L 11 8
HC B1 00 5 K F -1 21 T 2 0
R5 2 8 1 K _ 0 4
R 50 2
1 0 0K _0 4
C8 5 6
0. 1 u _ 16 V _ Y 5 V_ 0 4
C7 4 2
1 0u _ 10 V_ Y 5 V _ 0 8
R5 3 2 4 . 7 K _ 04
C7 5 4
* 12 p _5 0 V _ NP O _0 4
R 50 1 *1 5 m i l _ sh o rt_ 06
J _ K B1
8 52 0 1 -24 0 5 1
24
23
22
14
12
11
21
8
20
19
6
5
18
4
17
10
9
7
3
2
1
16
15
13
C 7 53 0 . 1 u_ 1 6 V_Y 5 V _0 4
R 5 33 *0 _0 4
R5 3 0 4 7 _ 04
R5 3 5 * 10 m i l _ s h ort_ 0 4
C7 5 1 1 u _6 . 3 V_ X5 R _0 4
R5 0 3 1 0 K _ 04
K/B MATRIX
FLASH
LPC
SMBUS
PS/2
PWM
UART
DAC
CLOCK
IT8518
CIR
ADC
WAKE UP
PWM/COUNTER
LPC/WAKE UP
EXT GPIO
GP INTERRUPT
WAKE UP
GPIO
U3 8
I T8 5 1 8E
W R S T #
14
L P C CL K
13
L A D 0
10
L A D 1
9
L A D 2
8
L A D 3
7
L F R A ME #
6
( P D )L P CP D #/W UI 6 /GP E 6
1 7
S E R I RQ
5
E C S MI #/G P D4 ( P U )
15 E C S CI #/G P D3 ( P U )
23
G A2 0/ G P B5
1 26
K BR S T #/G P B6 ( P U )
4
K S I 0 / S T B#
5 8
K S I 1 /A F D #
5 9
K S I 2/I N I T #
6 0
K S I 3/S L I N #
6 1
K S I 4
6 2
K S I 5
6 3
K S I 6
6 4
K S I 7
6 5
K S O0 /P D 0
3 6
K S O1 /P D 1
3 7
K S O2 /P D 2
3 8
K S O3 /P D 3
3 9
K S O4 /P D 4
4 0
K S O5 /P D 5
4 1
K S O6 /P D 6
4 2
K S O7 /P D 7
4 3
K S O8 /A C K #
4 4
K S O 9/BU S Y
4 5
K S O 10 / P E
4 6
K S O1 1 /E RR #
5 1
K S O 1 2/S L C T
5 2
K S O 1 3
5 3
K S O 1 4
5 4
K S O 1 5
5 5
V
C
C
11
V
S
T
B
Y
2
6
V
S
T
B
Y
5
0
V
S
T
B
Y
9
2
V
S
T
B
Y
1
1
4
V
S
T
B
Y
1
2
7
V
S
T
B
Y
1
21
V
B
A
T
3
A
V
C
C
74
P S 2 C LK 0 / G P F 0( P U )
85
P S 2 D AT0 / G P F 1( P U )
86
P S 2 C LK 1 / G P F 2( P U )
87
( P D )T MR I 0/W U I 2 /GP C 4
1 2 0
( P D )T MR I 1/W U I 3 /GP C 6
1 2 4
L P C RS T #/ W UI 4 /GP D 2 ( P U )
22
( P D )W UI 5 /GP E 5
3 5
P W R S W /G P E 4( P U )
1 25
R I 1#/W U I 0 / GP D 0( P U )
18
R I 2#/W U I 1 / GP D 1( P U )
21
( P D )R I NG #/P W RF A I L #/L P CRS T#/GP B7
1 1 2
T X D/G P B1 ( P U )
1 09 R XD /GP B0 ( P U )
1 08
( P D )C TX /GP B2
1 2 3
P S 2 D AT1 / G P F 3( P U )
88
P S 2 C LK 2 / G P F 4( P U )
89
P S 2 D AT2 / G P F 5( P U )
90
( P D )T ACH 0 /GP D 6
4 7
( P D )T ACH 1 /GP D 7
4 8
P W M 0 /GP A0 ( P U )
24
P W M 1 /GP A1 ( P U )
25
P W M 2 /GP A2 ( P U )
28
P W M 3 /GP A3 ( P U )
29
P W M 4 /GP A4 ( P U )
30
P W M 5 /GP A5 ( P U )
31
P W M 6 /GP A6 ( P U )
32
P W M 7 /GP A7 ( P U )
34
AD C0 /GP I 0
66
AD C1 /GP I 1
67
AD C2 /GP I 2
68
AD C3 /GP I 3
69
AD C4 /GP I 4
70
AD C5 /GP I 5
71
AD C6 /GP I 6
72
AD C7 /GP I 7
73
V
S
S
1
V
S
S
1
2
V
S
S
2
7
V
S
S
4
9
V
S
S
1
22
V
S
S
1
1
3
A
V
S
S
75
C K 32 K E
2
C K 3 2K
1 2 8
D AC3 /GP J 3
79 D AC2 /GP J 2
78 G P J 1
77 G P J 0
76
( P D )E G CS #/GP E 2
8 3
( P D )E G CL K /GP E 3
8 4
( P D )E GA D/GP E 1
8 2
G I NT / GP D 5 ( P U )
33
L 8 0L L AT /GP E 7 ( P U )
20
V
S
S
9
1
D AC5 /GP J 5
81 D AC4 /GP J 4
80
P W U RE Q #/ GP C 7( P U )
16
( P D )CR X /GP C 0
1 1 9
( P D )K S O1 6 /GP C 3
5 6
( P D )K S O1 7 /GP C 5
5 7
( P D )G P H0 /I D 0
9 3
( P D )G P H1 /I D 1
9 4
( P D )G P H2 /I D 2
9 5
( P D )G P H3 /I D 3
9 6
( P D )G P H4 /I D 4
9 7
( P D )G P H5 /I D 5
9 8
( P D )G P H6 /I D 6
9 9
( P D )G P G1 /I D 7
1 0 7
S M CL K 0 /GP B3
1 10
S M DA T 0 /GP B4
1 11
S M CL K 1 /GP C 1
1 15
S M DA T 1 /GP C 2
1 16
S M CL K 2 /GP F 6 ( P U )
1 17
S M DA T 2 /GP F 7 ( P U )
1 18
F L F RA M E #/GP G 2
1 0 0
F L AD0 /S C E #
1 0 1
F L A D1 /S I
1 0 2
F L A D2 / S O
1 0 3
F LA D 3 /GP G 6
1 0 4
F LC L K /S CK
1 0 5
( P D )F L R S T#/W U I 7/G P G0 /T M
1 0 6
( P D )L 80 HL AT /GP E 0
1 9
C7 5 2
0 . 1 u _1 6 V _ Y 5 V _ 04
R 50 5 1 0K _ 0 4
X 1 1
* 1T J S 1 25 D J 4 A 4 2 0P _ 3 2 . 76 8 K Hz
1 4
3 2
C7 4 5
*0 . 1 u_ 1 6 V _Y 5 V_0 4
C 74 8
0 . 1 u_ 1 6 V _Y 5 V _0 4
C7 4 3
0 . 1u _ 1 6V _ Y 5V _ 0 4
C 74 9
1 u _6 . 3 V_ X5 R _0 4
C 7 46
* 0 . 1u _ 1 6V _ Y 5 V _ 0 4
R5 2 9 1 5 _ 1% _ 0 4
C7 4 1
0. 1 u _ 16 V_ Y 5 V _ 0 4
R 53 1 *1 0 M_ 0 4
.
L 1 17
H CB1 0 05 K F -1 2 1T 2 0
X1 0
* MC -14 6 _3 2 . 7 68 K H z
1 4
3 2
C 74 4
0 . 1 u_ 1 6V _Y 5V_ 0 4
R 7 87 1 K _ 0 4
C7 5 6 *0 . 1 u_ 1 6 V_Y 5 V _0 4
NC 2 S H ORT
R7 8 5 *0 _0 4
L C D_ BRI G HT NE S S
J _K B 2
* 8 52 0 1- 24 0 51
2 4
2 3
2 2
1 4
1 2
1 1
2 1
8
2 0
1 9
6
5
1 8
4
1 7
1 0
9
7
3
2
1
1 6
1 5
1 3
R5 2 6 4 7 _ 04
R 52 3 * 0 _0 4
R8 0 9 2. 2 K _ 0 4
U 37
* A T 25 F 5 1 2A N
CE #
1 S O
2
W P #
3
VS S
4
S I
5
S C K
6
HO L D#
7
V D D
8
R5 2 7 1 5 _ 1% _ 0 4
C 7 55
* 12 p _ 50 V _ NP O _ 04
R 70 8 0 _ 0 4
R5 0 4 * 1 0K _ 0 4
U 3 9
P C T 25 VF 0 1 6B -75 -4 I -S 2 A F
CE #
1
S O
2
W P #
3
V S S
4
S I
5
S C K
6
H OL D#
7
V D D
8
R7 8 6 0_ 0 4
C 74 7
0 . 1 u_ 1 6 V_Y 5 V _0 4
R 70 9 0 _ 0 4
R 7 10 0_ 0 4
C8 5 5
0 . 1u _ 1 6V_ Y 5V _ 0 4
V DD 3
V DD3
3 . 3 VS
VD D3
VD D3
K BC _ A GND
K BC _ AV DD V DD3
K BC_ AG ND
3 . 3 VS
V D D3
VD D3
V DD3
W E B_W W W # 2 9
S US C # 1 6 , 3 0, 3 2
VDD 3
H S P I _ CE # 1 7
3 I N1 2 4
S M D_ CP U_ TH E RM 3, 1 6 , 1 7
HS P I _ MS O 1 7
HS P I _ S C LK 1 7
HS P I _ MS I 17
C CD_ E N 22
P W R_ S W # 3 0
BT _E N 2 4 , 2 8
J _ 8 0D E BUG 1
*8 52 0 5 -05 0 0 1
1
2
3
4
5
L E D _C AP # 2 8
P W R_ BT N# 1 6
L I D_ S W # 16 , 2 0 , 29
S MD _BA T 37
S MC _ V GA_ T HE R M 1 0
K BC_ BE E P 25
CCD _ DE T # 2 2
L E D_ P W R 2 8
BK L _E N 2 0
L P C _A D 0 1 5, 1 9
L P C _A D 3 1 5, 1 9
L P C _A D 2 1 5, 1 9
3 G_ P OW E R 2 2
L P C_ F R AME # 1 5 , 19
L P C _A D 1 1 5, 1 9
V CO RE _ ON 3 5
S US B# 1 6 , 1 9, 2 6 , 3 0
BUF _ P L T_ R S T# 1 5 , 19 , 2 3 , 24 , 2 6
W L A N_ DE T # 2 4
RS M RS T _ GA T E # 16
W L AN_ L E D# 2 4, 2 8
W E B_E MA I L # 2 9
DD _O N 2 9 , 3 0, 3 1
CP U _F AN S E N 29
BA T _ DE T 3 7
S MD _ V GA_ T HE R M 1 0
K BC _ MUT E # 2 5
CP U _F A N 2 9
80PORT
RX
0V
CH G_ E N 37
L E D_ S C ROL L # 28
E C_ RS T # 1 5
AP _K E Y # 2 9
V CHG _ S E L 37
LE D _ B AT _C HG 2 8
EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE)
3G _E N 2 2
AC_ I N # 1 6, 2 9 , 3 7
S W I # 16
B T_ DE T # 2 4, 2 8
R5 03 10 K/ R5 04 X
M OD EL _ID
LE D _ A CI N 2 8
E C_ S CI # 1 6
3 G_ DE T # 2 2
MO DE L _ I D
3.3 V V 1. 0 W240BU
TH E RM _V OL T 2
80 CL K 2 4
W L A N _E N 2 4 , 28
V ER . V OLT AG E
S M C_ CP U_ TH E RM 3, 1 6 , 1 7
CE L L _C ON TR OL 3 7
L E D _N UM # 2 8
RX
W250BU
T P _ DAT A 2 9
L E D_ BA T _ F UL L 2 8
T P _ CL K 2 9
L AN_ P CI E _ W A K E # 2 3
LP C _ CL K 0 15 , 1 6
E C_ S MI # 1 6, 2 6
K BC_ RS T # 1 6
S E RI R Q 1 5, 1 9
GA2 0 1 6
S MC _BA T 37
AL L _S Y S _ P W RG D 1 9 , 20
B R I GH TN E S S 2 0
BA T _ V OL T 3 7
BA T _VO L T
W250BAQ
R 51 4 1 0 K _0 4
CK 3 2 K E
CK 3 2 K
6- 22- 32R76- 0B4
1.6 5V
V 2. 0
8 0 CL K
3 I N 1
V 2. 0
R 82 9 * 0 _0 4
12/6 Reverse
K BC _S P I _ S I
K BC _S P I _S O _ R K BC _S P I _ S O
K B C_ HO LD #
K B C _S P I _C E #_R
K BC _S P I _S I _R
K BC _S P I _S C L K _R
K BC _S P I _ C E #
K B C _S P I _ S C LK
U37 U39 Co-l ayout
80 D E T#
K B C_ F LA S H
? ? ?
For 8512E
KBC_SPI_*_R = 0.1"~0.5"
1 J_KB1
R5 03 X/ R 504 1 0K
24
R5 03 10 K/ R5 04 10 K
8 0 DE T #
Pin100 ,104&106 EXT ? ? Pu ll hi
& Pull L ow .
VG A _ AL E RT # 1 0
K BC _ S P I _S O
K BC _ S P I _C E #
K BC_ S P I _ S CL K
K BC _ S P I _S I
C P U_ F A N
VG A _F A N
E GA D
K BC _W RE S E T #
3G _D E T #
CCD _ DE T #
K BC_ BE E P
S MC _ V GA _ T HE RM
S MD _ BAT
C CD_ D E T#
( S CI # )
( S MI # )
R534For IT8518BX&
IT8519BX Only.
Pin873IN1mult i
f unctionpin
( V CH G-S E L )
BA T _ DE T
3 G_ DE T#
S MD _ V GA _ T HE RM
( 3 G_ P W R_ E N )
P ME #
BA T _ V OL T
H _P E C I
FOR W250BUQ FOR W240BU
K B-S I 1
K B-S O1 1
K B-S O6
K B-S I 7
K B-S I 3
K B-S I 0
K B-S O1 0
K B-S O5
K B-S O1 5
K B-S O4
K B-S O7
K B-S O0
K B-S O1 3
K B-S I 2
K B-S O2
K B-S O3
K B-S O8
K B-S O1 4
K B-S O9
K B-S O1 2
K B-S I 4
K B-S O1
K B -S I 2
K B -S O1 1
K B -S I 3
K B -S O5
K B-S I 5
K B-S I 6
K B -S O2
K B -S I 4
K B -S I 7
K B -S O1
K B -S O1 5
K B -S O9
K B -S O1 4
K B -S O1 3
K B -S O1 0
K B -S I 0
K B -S I 1
K B -S O8
K B -S O1 2
K B -S O3
K B -S O4
K B -S O0
( W E B1 #)
K B -S I 6
K B -S O7
K B -S I 5
K B -S O6
M E _W E #
( 80 P O RT _D E T #)
W L A N _E N
L CD_ BR I GH TN E S S
R 7 97 0 _ 04
8 0 CL K
( K BC_ P ME # )
( P M_ P W RO K )
( W E B2 #)
VGA _ F A NS E N
( A P K E Y # )
M ODE L_ I D
L A N_ P C I E _W AK E #
G A20
S MC _ BAT
WEB1#- --WEB_EMAIL#
WEB2#- --WEB_WWW#
0 _04 F OR IT 85 12C X/ EX
0 .1U _0 4 F OR I TE8 51 2- J(I TE 85 02- J W/ 0 CI R)
E C C os t D ow n
E C_ VS S
K BC _ F LAS H
K BC _ HOL D #
U9 U28 Co- l ayout
K BC _S P I _S O _ R
K BC _S P I _S I _ R
K BC _S P I _C E #_R
K BC _S P I _S C L K _R
For 8502E
R5 3 4 *1 0m i l _s h ort
OC P P E # 2 6
I CP P E # 2 6
AP U_ T A L E RT # 3 , 1 7
Sheet 27 of 41
KBC- ITE IT8518
Schematic Diagrams
LED/ MDC/ BT B - 29
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
LED/ MDC/ BT

L E D_ BA T _ F UL L
L E D_ BA T _ CHG
L E D_ P W R
L E D_ ACI N
B T _ E N#
50 mi l 5 0mi l
1
H2 5
MT H 31 5 D1 1 1
3
4
5 6
7
8
9 M 5
M -MA R K 1
1
H7
MT H 31 5 D1 1 1
3
4
5 6
7
8
9
R5 40
22 0 _0 4
M2
M-M ARK 1
H3 6
h t6 _ 0b 7 _0 d 3 _7
M 1
M -MAR K 1 H3 5
HC 6_ 0 d 3_ 7
Q1 7
DT C1 1 4E U A
C
E
B
C7 5 7
* 18 0 p_ 5 0 V _N P O_ 0 4
R 5 42
2 2 0 _0 4
J _ T P 4
* 85 2 01 -0 6 05 1
1
2
3
4
5
6
H2 1
C1 10 D1 1 0 NP
S
G Y
D1 3
K P B-3 02 5 Y S G C
13
24
1
H1 3
MT H3 1 5 D1 1 1
3
4
5 6
7
8
9
C7 5 9
*1 0 u_ 1 0 V _Y 5V _0 8
1
H2 4
MT H3 1 5 D1 1 1
3
4
5 6
7
8
9
R5 3 7 * 0_ 0 4
C 75 8
*
18
0
p_
5
0
V
_N
P
O
_
0
4
H3 4
h t6 _ 0b 7 _0 d 3 _7
R5 48
22 0 _0 4
Q1 4
*MT N 70 0 2ZH S 3 G
D
S
R5 39
*1 5 m i l _ sh o rt_ 06
1
H5
MT H 31 5 D1 1 1
3
4
5 6
7
8
9
H 3 1
H 4 _7 B6 _0 D 3_ 7
H 15
H 4_ 7 B6 _0 D3 _ 7
H 23
C 67 D6 7
S
G Y
D 14
K P B- 30 2 5Y S GC
13
24
H 30
H 4_ 7 B6 _0 D 3_ 7
C 76 0
*0 . 1 u_ 1 6V _Y 5V _ 0 4
H 29
H 4_ 7 B6 _0 D3 _ 7
H3 2
H4 _ 7B 6_ 0 D3 _ 7
D2
R
Y
-S
P
17
0
Y
G
3
4
-5
M
A
C
H 18
H 6_ 0 D3 _ 7
R5 3 6
47 K _ 0 4
H 3 3
H T 6_ 0 BS 1 D3 _7
J _ BT 1
*8 7 21 2 -0 6G 0
1
2
3
4
5
6
R5 49
22 0 _ 04
H1 9
H4 _ 0B7 _ 0 D3 _7
1
H1 1
mt h3 1 5d 1 1 1_ 3
3
4
5 6
1
H1 4
MT H 31 5 D1 1 1
3
4
5 6
7
8
9
1
H3
MT H 31 5 D1 1 1
3
4
5 6
7
8
9
R5 38
*1 0K _0 4
D5
R
Y
-
S
P
17
0
Y
G
3
4
-5M
A
C
1
H4
MT H3 1 5 D1 1 1
3
4
5 6
7
8
9
S 2
S MD8 0 X80
1
1
H2
C 11 0 D1 1 0N P
M7
M-MA RK 1
H 20
C 11 0 D1 1 0N P
M3
M-M A RK 1
M4
M-M ARK 1
R5 4 6
2 20 _ 0 4
M8
M-M A RK 1
R5 4 5
2 20 _ 04
S 1
S MD 80 X8 0
1
1
R5 5 0
* 10 m i l _ s ho rt_ 0 4
D 4
R
Y
-S
P
1
70
Y
G
34
-5
M
A
C
R 54 1
2 2 0 _0 4
R 54 4
2 2 0_ 0 4
M6
M-MA RK 1
D 3
R
Y
-S
P
1
70
Y
G
34
-5
M
A
C
H1
C1 10 D 11 0 NP
H 17
* H4 _7 B6 _ 0D 3 _7
S
G Y
D1
K P B-3 02 5 Y S G C
13
24
R 54 3
2 2 0_ 0 4
H6
C6 7 D6 7
R5 4 7
2 20 _ 0 4
Q1 6
* DT C1 1 4 E UA
C
E
B
1
H9
MT H 31 5 D1 1 1
3
4
5 6
7
8
9
3 . 3VS
3 . 3 V S 3 . 3V S 3 . 3 V S
3 V_ BT 3 . 3V
3 . 3 VS
3 . 3 VS
3 . 3 V
3 . 3 V
3V _B T
GN D
VD D3
GN D
For W250BUQ
L E D_ N UM# 2 7
BT _ E N 24 , 2 7
W L AN _E N 2 4, 2 7
BT _ ON 1 5, 2 4
L E D_ CAP # 2 7 L E D_ S CR OL L # 2 7
US B_ P P 6 1 6
US B_ P N 6 1 6
BT _ DE T # 2 4, 2 7
S AT A _L E D # 1 7
W LAN _L E D # 2 4 , 2 7
BT _ E N 2 4 , 27
L E D_ B AT _F U L L 2 7
L E D_ BA T _ CH G 2 7
L E D_ P W R 27
LE D _A CI N 2 7
1
H2 6
M TH 3 15 D1 1 1
3
4
5 6
7
8
9
6- 52- 52001- 027 6- 52- 52001- 027 6- 52- 52001- 027 6- 52- 52001- 027
BT _ E N#
Bluetooth
BT _ DE T #
1
NUM
LOCK
LED
2
CAPS
LOCK
LED
LED
BAT LED
SCROLL
LOCK
LED
POWER ON
LED
3 1
WLAN
LED
2 4
BT
LED
12/9
HDD/ODD
LED
For W240BU
Sheet 28 of 41
LED/ MDC/ BT
Schematic Diagrams
B - 30 USB/ FAN/ TP/ MULTI CON
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
USB/ FAN/ TP/ MULTI CON

R5 7 4 *0 _ 04
R7 3 3 0 _ 06
USB PORT Char g e
Port 1
80 mil
US B_ P P 0 _R
US B_ P N0 _ R
+ C 7 40
2 2 0u _ 6. 3V _ 6 . 6 *4 . 5
CTL1 CTL2 CTL3: X 1 0----->Standard Downstream Port, USB 2.0 Mode.
CTL1 CTL2 CTL3: 1 1 1----->Charging Downdtream Port, BC Spec 1.1
Reserve 9/8
CTL1 CTL2 CTL3: 0 X 1----->Dedicated Chargi ng Port, Auto-detect
P R 21 5
* 47 K _ 0 4
P C2 3 0
*0 . 1u _ 5 0V_ Y 5V_ 0 6
12/7
US B_ F L G#
100 MIL
VDD 3
60 mil
Port 0
R8 3 2 * 1 0K _ 0 4 W E B _W W W #
W240BU 6- 21- B49C0- 104
VDD 5
R7 3 7 * 17 . 8 K _ 1% _ 0 4
R7 4 5 * 10 K _ 0 4
R7 4 1 * 0_ 0 6
P V 1
*V1 5 A VL C0 4 02
1
2
1.1A 60mils
M I C_ S E NS E
HE AD P HO NE -R
M I C1 -R M
H P _ S E NS E
S P K _H P #
MIC1-L M
HE AD P HO NE -L
S P K OUT R+
S P K O UT R-
U S BP 4 _R
U S BN4 _ R
Audio/B CONN.(Port 2)
FOR AUDIO BOARD
U S B P 4 _R
U S B N4 _ R
AP _ K E Y # R8 3 1 1 0 K _ 04
CLICK CONN
FOR CLICK BOARD
R7 4 0 0 _ 06
M_ BT N# 3 0
US B _P P 0 1 6
US B_ P N0 1 6
US B_ O CP 0 _1 #
C7 64
*1 0u _ 6 . 3V_ X5 R_ 06
W250BUQ 6- 21- B4410- 004
L 1 20
*W CM2 0 1 2F 2 S -1 6 1T 0 3
1
4
2
3
+C7 6 9
*1 0 0u _ 6 . 3V _ B _ A
C 7 77
0. 0 1 u_ 1 6 V_X7 R_ 0 4
+C 7 72
* 10 0 u _6 . 3 V _ B _A
J _ F A N1
8 52 0 5-0 3 7 01
1
2
3
C7 6 6
1 0u _ 1 0V_ Y 5V_ 0 8
R5 5 8 *1 0 m il _ sh o rt_ 04
R 5 52
1 0 K _ 04
L1 2 1
* W CM 20 1 2 F 2S -1 6 1 T0 3
1
4
2
3
R5 6 0
*1 0m i l _s h or t_0 4
R 7 12 0_ 0 4
C7 6 8
0 . 1 u _1 6 V _ Y 5 V _ 04
C7 7 8 0 . 0 1 u_ 1 6 V_X7 R_ 0 4
R5 57
10 K _ 0 4
C7 74
47 p _ 50 V _ NP O _0 4
R5 56
10 K _ 0 4
C 76 1
1 0u _ 10 V _ Y 5 V _ 0 8
J _ US B 2
U S 0 40 3 6 B CA 0 81
V+
1
G
N
D
1
G
N
D
1
DA T A _ L
2
DA T A _ H
3
GN D
4
G
N
D
2
G
N
D
2
G
N
D
4
G
N
D
4
G
N
D
3
G
N
D
3
U 4 1
A X9 9 5S A
VO UT
3
GN D
5
VI N
2 F O N
1
VS E T
4 GN D
6 GN D
7 GN D
8
C 77 0
* 10 u _ 10 V_ Y 5 V_ 08
R5 6 1 *1 0 m il _ sh o rt_ 04
J _ T P 1
8 52 0 1-0 4 0 51
1
2
3
4
R7 1 4 0 _0 4
C 7 62
0 . 1 u _1 6 V _ Y 5 V_ 04
R8 3 3 * 1 0K _ 0 4
C 7 73
0 . 1 u _1 6 V_ Y 5 V_0 4
Q 1 8
* MT N7 0 02 Z HS 3
G
D
S
W E B _E M AI L #
C7 65
0. 1 u _1 6 V _ Y 5 V_ 04
R7 1 3 0 _0 4
R 5 54 *0 _ 04
R 7 11 0_ 0 4
C7 7 6
0 . 01 u _ 16 V _ X 7R _0 4
J _ S W 1
* 5 05 0 0- 01 0 41 -0 0 1L
1
2
3
4
5
6
7
8
9
1 0
L 13 0
*1 5 mi l _ sh o rt_ 06
100 mil
US B VC C0
J _ AUDI O 1
8 5 20 1 -14 0 5 1-0 1
1
2
3
4
5
6
7
8
1 0
1 1
1 2
1 3
1 4
9
C7 63
0. 1 u _1 6 V _ Y 5 V _ 04
C7 7 1
1 u_ 6 . 3V _Y 5V_ 0 4
J _ US B 1
US 0 40 3 6 B CA 0 8 1
V+
1
G
N
D
1
G
N
D
1
DA TA _ L
2
DA TA _ H
3
GN D
4
G
N
D
2
G
N
D
2
G
N
D
4
G
N
D
4
G
N
D
3
G
N
D
3
R5 51 4. 7 K _ 0 4
R 5 55 * 15 m il _ s ho rt_ 0 6
R5 53
*1 0K _ 0 4
J _ S W 2
88 4 8 6-0 8 01
1
2
3
4
5
6
7
8
C7 75
47 p _ 50 V_ NP O _0 4
R5 6 2 *1 0 m il _ sh o rt_ 04
U 40
R T9 7 1 5BG S
VO UT 1
6
VO UT 3
8
VI N2
3
VI N1
2
VO UT 2
7
G ND
1
E N#
4
F L G#
5
5VS
5 V S
5 V
3 . 3 V S
5 V S _ F A N
5V S _ F A N
5 V S _ T P
5V S
3 . 3 V 3 . 3 VS
VI N
3. 3 V 3 . 3V S
US B VCC0
U S B _VC C2
U S B VCC 1
3 . 3V 3 . 3V
5V
U S B _ V CC3
M I C_ S E N S E 2 5
S P K OUT R - 2 5
S P K OUT R + 2 5
US B V CC1
M I C1 -R M 2 5
M I C1 -L M 2 5
H P _ S E NS E 2 5
H E ADP H ON E -R 2 5
US B _ P P 4 1 6
US B _ P N4 1 6
12/8
12/8
N/A
C P U_ F A N S E N 2 7
CP U _F A N 2 7
H E ADP H ON E -L 2 5
T P _C LK 2 7
T P _D A T A 2 7
R1 68 0_ 0 4
A P _K E Y # 2 7
W E B _W W W # 2 7
L I D_ S W # 1 6, 2 0 , 2 7
W E B _E M AI L # 2 7
D D_ ON # 3 0, 3 2 , 3 3
A P _ ON 30
US B_ O CP 0 _ 1# 1 6, 2 6
US B_ P P 1 1 6
U S B_P N1 1 6
W250BUQ 6- 21- B4410- 004
W240BU 6- 21- B49C0- 104
R1 71 0_ 0 4
100 mil
12/10 DeleteR559
USB PORT*2(Port 0,Port1)
U S B_P N 0
FAN CONTROL
G990P11U 6- 02- 99011- B20
P2793A 6- 02- 02793- B20
F ON #
JFAN
3
1
Change connector
AP _ ON
R7 3 4 *0 _ 0 6
A C_ I N
R 7 50 *1 0 K _0 4
US B V CC1
L I D_ S W #
U 1 0
*T P S 2 5 40
C TL 1
6
NC
9
DM _I N
1 1
D M_ O
2
DP _I N
1 0
I N
1
E N /DS C
5
D P _O
3
I L I M_ S E L
4
C TL 2
7
C TL 3
8
O UT
1 2
F A U LT #
1 3
G ND
1 4
I L I M1
1 5
I L I M0
1 6
P
P
A
D
1
7
M _BT N #_ R M_ B TN #
A P _ K E Y #
W E B_ W W W #
W E B_ E M AI L#
POWER SWITCH CONN.
FOR POWER SWITCH BOARD
20 mi l
CLOSE TO J_SW1
M_ BT N#
W E B_ E MAI L #
LI D _ S W #
W E B_ W W W #
AP _ K E Y #
MB T N
U S B_P P 0
U S B_P N0
2 0m il
U S B_P P 0
U S B_F L G # U S B_O CP 0 _ 1 #
I f syst emhas APON f uncti on, uses J _ SW1
I f syst emhas no APON f unct i on, uses J _ SW2
M_ BT N#
U S B_ P N0 _R
U S B_ P P 0_ R
P V 2
*V1 5 AV L C0 40 2
1
2
R 7 51 *1 0 K _0 4
U S B_P N0 _R
R7 47 * 10 K _ 0 4
Q7 6
*M TN 70 0 2 Z HS 3 G
D
S
R 7 48 *1 0 K _0 4
DD_ ON 27 , 3 0 , 31
V DD5
AC _I N # 1 6 , 27 , 3 7
VD D5
US B VCC1
R 7 49 *1 0 K _0 4
V DD 5
U S B_P P 0_ R
R7 4 6 *1 0 K _0 4 V DD3
Sheet 29 of 41
USB/ FAN/ TP/
MULTI CON
Schematic Diagrams
5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS B - 31
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS

S U S B
ON
12/8
ON
ON
P C2 2
1 0 u _1 0 V_ Y 5 V_ 0 8
P Q2
MT N7 0 0 2 ZHS 3
G
D
S
P R2 0 8
10 0 _ 1% _ 0 4
P R6
10 K _ 0 4
P R 17
1 M_ 0 4
P R2 0 7
10 0 _ 1% _ 0 4
P J 1
4 0m i l
1
2
P C 2 29
1 0 u _1 0 V_ Y 5 V_ 0 8
P C 2 27
1 0 u _1 0 V_ Y 5 V_ 0 8
P R 3 10 0 K _ 0 4
P Q6 2
MT N7 0 0 2ZH S 3
G
D
S
P Q 6 0
M TN 7 00 2 ZH S 3
G
D
S
P Q 7
MT N 70 0 2 ZHS 3
G
D
S
P Q8 B
M T NN 20 N 03 Q 8
6
5
4
P Q 5B
*M TN N2 0 N0 3 Q8
6
5
4
P R 15
1 0 0_ 1 % _0 4
P Q6 B
M T NN 20 N 03 Q 8
6
5
4
P R 1 9
1 0 0 _1 % _ 04
P Q1 3
* MT N 70 0 2 ZHS 3
G
D
S
C 7 79
0 . 0 1 u _1 6 V_ X7 R _0 4
P C1 4
*1 0 u_ 1 0 V_ Y 5 V_ 08
P R1 1
1 M_ 0 4
P R 4
1 0 K _ 0 4
P Q8 A
MT NN 20 N 03 Q 8
1
3
7
2 8
P C 1 6
1 0 u_ 1 0 V_ Y 5 V_ 0 8
P C 2 0
0 . 0 1 u_ 1 6 V_ X7 R _0 4
P C1 8
4 70 p _ 50 V_ X7 R_ 0 4
P Q9 A
MT NN 2 0N 0 3Q 8
1
3
7
2 8
P R 7
1 0 0K _0 4
P C2 1
0. 1 u _ 1 6V_ Y 5V _0 4
P C 1 0
* 0. 1 u _ 16 V_ Y 5V_ 0 4
P C1 9
*0 . 1 u_ 1 0 V_ X7 R _0 4
P R1 6
1M _ 04
P Q3 A
MT NN 20 N 03 Q 8
1
3
7
2 8
P R 1 3
1 M_ 0 4
P C 22 6
0 . 1 u_ 1 6 V_Y 5 V_ 04
P Q 5A
*M T NN 20 N 03 Q 8
1
3
7
2 8
P C1 7
47 0 p _ 50 V_ X7 R _ 0 4
P R 2 11 1K _ 0 4
P Q 1 0
M TN 7 00 2 ZH S 3
G
D
S
P C 8
0 . 1 u_ 5 0 V_ Y 5 V_ 0 6
P C 6
0 . 1 u_ 5 0 V_Y 5 V_ 06
P C 9
* 0. 1 u _ 16 V_ Y 5V_ 0 4
P Q6 A
M T NN 20 N 03 Q 8
1
3
7
2 8
C7 8 1
0. 0 1 u _1 6 V_ X7R _ 04
P R5
1 0 K _ 0 4
P C2 5
22 0 0 p _5 0 V_ X7R _ 04
P R1 0
1M _ 04
P Q4 B
M TN N2 0 N0 3 Q8
6
5
4
P C1 5
0 . 1 u _ 16 V_ Y 5 V_ 0 4
P R1 2
*1 M_ 0 4
P C1 1
* 0 . 1u _ 1 6 V_Y 5 V_ 04
C 78 0
0 . 0 1 u_ 1 6 V_X7 R _0 4
C 78 4
0 . 0 1u _ 1 6V _X7 R_ 0 4
C7 8 3
0. 01 u _ 16 V_ X7 R_ 0 4
P R9
10 0 K _ 04
P C1 2
0. 1 u _ 16 V_ Y 5V_ 0 4
P Q6 1
MT N7 0 0 2ZH S 3
G
D
S
P Q9 B
MT NN 2 0N 0 3Q 8
6
5
4
R5 6 3 1 K _ 04
P C2 2 5
1 0u _ 1 0V _Y 5 V _0 8
P R 8
1 0 0 K _0 4
P C 26
2 20 0 p _ 50 V_ X7 R_ 0 4
P J 2
4 0 m il
1
2
S
D
G
P Q1 A
M TD N7 0 0 2Z HS 6 R
2
6
1
S
D
G
P Q1 B
M TD N7 0 0 2Z HS 6 R
5
3
4
P C 7
0 . 1 u _5 0 V_ Y 5 V_ 0 6
P C 22 8
0 . 1 u_ 1 6 V_Y 5 V_ 04
P Q3 B
M T NN 20 N 03 Q 8
6
5
4
P Q 4 A
M TN N2 0 N0 3 Q8
1
3
7
2 8
C7 8 2
0 . 01 u _ 1 6V_ X7 R_ 0 4
P R1 4
* 1 00 _ 1 % _0 4
P U 1
P 2 8 0 8B 0
VA
1
VI N
2
M _BT N #
3
I N S TA NT -ON
4
GND
5
P W R_ S W #
6
DD _ ON _L AT CH
7
VI N1
8
P R 2 06
1 0 0 _1 % _ 04
P R 2 10 1 K _ 0 4
P C 1 3
*0 . 1 u _1 6 V_ Y 5 V_ 0 4
VDD 5
3. 3 VS
VD D3
S Y S 15 V
S Y S 1 5V
5VS S Y S 1 5V
S Y S 15 V VDD 3
VDD 5
VI N 1
V I N
V A
S Y S 15 V 1 . 5 V
VI N VA
1 . 5V S
S Y S 5V
VI N 1
5 V
3 . 3 V
3. 3 VS
VDD 3
S Y S 5 V
1 . 1V S Y S 1 5 V
1 . 1 VS
S Y S 5V
3 . 3 V
5 V
P W R_ S W # 2 7 M_ BT N # 29
AP _ ON 2 9
D D_ O N# 2 9 , 3 2 , 33
S US C # 1 6 , 27 , 3 2
S U S B# 1 6, 1 9 , 2 6 , 27
S US B 3 2 , 3 3 , 34 , 3 6
S US C 3 3, 3 5
D D_ ON 27 , 2 9 , 3 1
D D_ O N 2 7 , 29 , 3 1
S U S B 3 2, 3 3 , 3 4 , 36
S U S B
P R1 8 1 K _ 0 4
DD _O N#
NMOS
1.1VS
N MOS
ON
S US B
1.5VS
3A
3A 3A
3A
Power Plane
Power Plane
3.3VS
5VS
3.3V
5V
ON
DD_ON" L" TO
" H" FROM EC
ON
ON
12/6
NMOS
NMOS
R8 1 0
*1 2 K _ 06
ON
ON
VI N
ON
S U S B
D D_ ON #
10/20
D D_ ON #
S US B
S US C
ON
Sheet 30 of 41
5VS/ 3.3VS/ 1.8VS/
1.5VS/ 1.1VS
Schematic Diagrams
B - 32 POWER VDD3/ VDD5
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
POWER VDD3/ VDD5

12/7
P C 1 74
2 2 00 p _ 5 0V _X 7 R _0 4
P R 1 46
5 . 1 _ 06
5A
E N _ A L L
Rb
5A
Ra
E N_ 3 V
E N_ 5 V
P D 3
* RB 0 5 4 0 S 2
A C
P L2
T MP C 0 60 3 H -4 R7 M-Z 01
1 2
P C 51
2 20 0 p _ 50 V_ X 7 R_ 0 4
P J 3
* 5 mm
1 2
P Q 14
P 1 2 0 3B V
4
6
2
5 7
31
8
P R2 1 * 0 _0 4
P U 2
uP6182
V
R
E
F
3
E
N
1
1
V
F
B
1
2
T
O
N
S
E
L
4
L
D
O
5
1
7
LG AT E 1
1 9
P H AS E 1
2 0
V
F
B
2
5
U GA TE 2
1 0
V
C
L
K
1
8
B OO T2
9
E
N
2
6
V O2
7
L D O3
8
P HAS E 2
1 1
L G AT E 2
1 2
E
N
0
1
3
S
K
IP
S
E
L
14
G
N
D
1
5
V
IN
1
6
UG AT E 1
2 1
B O OT 1
2 2
P O K
2 3
V O1
2 4
G
N
D
P
A
D
2
5
P R3 1
0 _ 0 4
P C2 9
10 0 0 p _5 0 V _ X7 R_ 0 4
+
P
C
4
0
22
0
u
_
6.
3V
_6
.6
*
5.7
P R2 4
10 0 K _ 0 4 P C 3 0
1 0 0 0p _ 5 0 V_ X7 R _ 04
P R3 3
2 . 2_ 0 6
P Q1 8
MT N 70 0 2 ZHS 3
G
D
S
P R3 6 *0 _ 0 4
P R2 1 6
68 0 K _ 1 % _ 06
P C4 4
0 . 1 u _ 1 6V _Y 5 V_ 04
P Q 19
M T N7 0 0 2 Z HS 3
G
D
S
+
P
C
45
22
0
u
_
6.3
V
_
6
.6
*4
.5
P L 1
T M P C0 6 0 3H -4 R7 M -Z0 1
1 2
P R2 8
1 9 . 1 K _ 1 % _0 6
P J 5
*6 m i l
1
2
P J 4
*5 m m
1 2
P R 37
1 0K _0 4
P R2 7
1 3 K _ 1 % _0 6
P R3 4 0 _0 4
P C3 4
1u _ 1 0 V_ Y 5 V _ 0 6
P C 3 8
4 . 7 u _ 25 V_ X5 R_ 0 8
P R2 6
3 0 K _ 1 % _0 6
P Q 1 7
P 1 2 0 3BV 4
6
2
57
3 1
8
P C2 8
1u _ 1 0 V _ Y 5 V_ 0 6
P
R
3
9
10
0
K
_
0
4
P C3 6
1 u_ 1 0 V_ Y 5 V _ 0 6
P
C
5
5
0
.1
u
_1
0
V
_
X
7
R
_0
4
P C3 9
0 . 1 u_ 1 6 V _ Y 5 V_ 0 4
P C 50
0 . 01 u _ 5 0V _X 7 R _0 4
P R3 8 0 _ 04
P C 33
4 . 7 u_ 2 5 V_ X5R _ 0 8
P D7
R B0 54 0 S 2
A C
P C 41
1 0 00 p _ 5 0 V_X7 R _0 4
P R 32
*0 _ 0 4
P C 35
0 . 1 u _1 0 V_ X7 R_ 0 4
P R2 3
1 00 K _ 0 4
C
A
A
P D6
B AT 54 S W GH
1
2
3
C
A
A
P D5
B AT 54 S W GH
1
2
3
P R2 2 0 _ 0 4
P C 3 2
4 . 7 u _2 5 V_ X5 R_ 0 8
P C 46
0 . 01 u _ 5 0V _X 7 R _0 4
P C 4 8
4 . 7 u _ 25 V_ X 5 R_ 0 8
P C3 7
0 . 1u _ 5 0 V_ Y 5 V_ 0 6
Z
2
4
1
8
P Q 1 5
P 1 2 0 3 B V
4
6
2
57
3 1
8
P C 4 2
1
0
0p
_
5
0
V
_
N
P
O
_
04
P R 2 5 *1 0 K _ 04
P Q 16
P 1 2 0 3B V
4
6
2
5 7
31
8
P C3 1
4 . 7 u _2 5 V_ X5 R_ 0 8
P R2 9
20 K _ 1 % _ 04
P R3 5 *0 _ 0 4
P C 4 9
1 u _1 0 V _ Y 5V _0 6
P C 47
2 20 0 p _ 50 V_ X 7 R_ 0 4
P D 4
* RB0 5 4 0 S 2
A C
S Y S 5 V
P R 3 0
* 68 0 K _ 1 % _0 4
S Y S 1 5 V
VR E F
V D D3
V I N
VD D5
V I N
S Y S 3 V
VRE G 3
S Y S 1 0 V
VR E G 5
S Y S 5 V
V R E F
V RE G 5 VI N 1
VI N
VR E G 5
V RE G 5
S Y S 5 V
D D_ ON 2 7 , 2 9 , 30
VR E G 5
E N _3 V E N _5 V
AC I N 3 7
P Q2 2
*M T N7 0 0 2Z HS 3
G
D
S
Z
2
4
1
8
P R1 5 2
5. 1_ 0 6
P C2 3 8
22 0 0 p _ 50 V _ X7 R_ 0 4
Sheet 31 of 41
POWER VDD3/
VDD5
Schematic Diagrams
Power 1.5V/ 0.75 B - 33
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 1.5V/ 0.75

12/6 Dis able
P
C
7
4
2
2
0
0p
_
5
0
V
_
X
7
R
_
0
6
P R5 0
5 . 1 _ 0 6
Z 26 2 1
P R6 0
1 0 0 K _ 0 4
P D 1 2
R B0 5 40 S 2
A C
P U 4
u P 6 1 63
VT T GN D
1
VL DO I N
2 3
VT T
2 4
VT T S NS
2
GN D
3
MO DE
4
VT T RE F
5
VC C5
1 4
P GO OD
1 3
S 5
1 1
S 3
1 0
VD DQ S E T
9
VD DQ S NS
8
CO MP
6
C S
1 6
P G ND
1 8
DR VL
1 9
L L
2 0
D RVH
2 1
VBS T
2 2
P VC C5
1 5
CS _G ND
1 7
N
C
7
N
C
1
2
G
N
D
2
5
P R 68 * 2 2 _0 4
P
C
6
6
*0
.1
u
_5
0
V
_
Y
5
V
_
0
6
P J 7
* OP E N_ 2 A
1 2
P
C
6
8
*
4
.7
u
_2
5
V
_
X
5
R
_0
8
P R6 2
*1 0 K _ 1 % _ 04
P Q 2 3
MD S 2 6 5 9
4
6
2
7
3
8 5
1
P R 5 2 0 _ 0 6
P C8 6
0. 1u _ 1 6 V_ Y 5 V_ 0 4
P R 5 7
0 _ 0 6
P
C
6
7
*4
.7
u
_2
5
V
_
X
5
R
_0
8
P Q2 6
*M T N7 0 0 2 ZHS 3
G
D
S
P
C
77
0
.0
1u
_
1
6
V
_
X
7
R
_
0
4
P C8 0 0 . 1 u _ 10 V_ X7 R_ 0 4
P C 7 1
1 0 u _ 10 V _Y 5 V_ 0 8
P R6 5 4 7K _0 4
P
C
7
5
0
.1
u
_1
6
V
_
Y
5
V
_
0
4
P Q 2 4
MD S 2 6 5 5
4
6
2
7
3
8 5
1
P
C
8
4
*1
0
0
0p
_
5
0
V
_
X
7
R
_
0
4
P R5 8 0 _ 0 6
P C 85
0 . 1 u_ 1 6 V_ Y 5 V_ 0 4
P D 1 3
* S K 3 4 S A
A
C
P C 7 3
* 10 u _ 1 0 V_ Y 5 V_ 0 8
P Q 2 8
* MT N 7 00 2 ZH S 3
G
D
S
P L 4
1 . 0 U H_ 1 0 *1 0 *4 . 5
1 2
P Q 2 9
M TN 7 0 0 2Z HS 3
G
D
S
P J 8
* OP E N _ 8 A
1 2
P Q2 5
MT N 70 0 2 ZH S 3 G
D
S
P J 9
*6 m i l
1
2
+
P
C
7
9
5
6
0
u
_2
.5
V
_
6
.6
*6
.6
*
5.
9
+
P
C
7
6
*5
6
0
u
_
2.5
V
_
6
.6
*
6.6
*
5
.9
P R 6 7 1 0 0K _0 4
P R 6 3 1 0K _1 % _ 0 6
P C 8 2
1u
_
1
0
V
_
Y
5
V
_
0
6
P R 4 8
0 _ 0 6
P R4 9 0 _ 06
P R 56 2 . 2 _0 4
P R 6 4
1 0 K _ 1 %_ 0 6
P R 6 9 *1 0 0 K _ 0 4
P R5 3 *0 _ 0 4
P C 7 2
1 0 u _ 10 V_ Y 5 V_ 08
P C 7 0 0 . 1 u _ 10 V_ X7 R _0 4
P R 47 0 _ 0 6
P Q 27
M TN 7 0 02 ZH S 3
G
D
S
P
C
8
3
*
1
00
0
p
_
5
0V
_X
7R
_
0
4
P C8 1
1
u
_
10
V
_
Y
5
V
_
0
6
P
R
5
9
*1
0
_0
4
P C 6 9
10 u _ 1 0V _ Y 5 V_ 0 8
P R 5 4 1 0 K _ 1 % _ 06
P R5 5 *0 _ 0 4
P R6 6 1 0 0 K _ 04
5 V
VD DQ
VD DQ
5 V
5V
5 V
VI N
5 V
V TT _ M E M
1 . 5 V
VD DQ
5 V
3 . 3 V
VT T _ ME M
5 V
S U S C# 1 6 , 2 7 , 3 0
D D _O N# 2 9 , 3 0, 33
DD R1 . 5 V_ P W RG D 1 9 , 3 5
S U S B 3 0 , 3 3 , 3 4, 3 6
1 . 5 VE N
11/ 5
+1 . 5 S _ C P U_ P W RG D
S US B
V TT E N
S U S B
10A
1.5V
DD R1 . 5 V_ P W RG D
11/ 5
Sheet 32 of 41
Power 1.5V/0.75V
Schematic Diagrams
B - 34 Power 1.1V/ 1VS
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 1.1V/ 1VS
Sheet 33 of 41
Power 1.1V/ 1VS

1. 1VS_ VTT=0. 75 X ( 1+PR101 / PR102)
OCP=10uA X RI LI M/ Rdson
S U S C
5A
1.1V
E N _ 1 . 1 V
3 A
E N_ 1 VS
1V S _ P W R GD
Vout = 0.8V ( 1 + Ra / Rb )
Ra
Rb
3A
OCP=10uA X RI LI M / Rdson
S U S B
1VS
6.5A
E N_ 1 V S
10/22 1.0V=>1.054V
1 VS _P W R GD
P C 78
2 2 00 p _ 5 0 V_ X7 R _ 0 4
P R 51
5 . 1 _0 6
P Q 3 3
M TN 7 0 0 2Z HS 3 G
D
S
P U1 1
A X66 1 0
G N D
1
VC NT L
6
V O UT
3
V I N
5
V O UT
4
V F B
2
P OK
7
E N
8
V I N
9
P C9 5
* 0 . 1 u_ 1 0 V_ X 7 R_ 0 4
P R7 7
10 0 K _ 1 % _ 0 4
P
C
1
07
*
0
.1
u_
1
6
V
_
Y
5
V
_
0
4
P U5
uP 6 12 7
L X
1
B S T
2
V C C
3
DL
4
G
N
D
5
R
T
N
6
N
.C
7
N
.C
8
F B
9
V O UT
10
P G D
11
E N
12
I
LIM
13
N
.C
1
4
N
.C
1
5
D
H
16
P A D
17
P D1 6
* RB 05 4 0 S 2
A
C
P R 7 6
2 1 K _ 1 % _ 04
P L 5
TM P C 0 60 3 H -4 R7 M -Z0 1
1 2
P C 1 0 2
*
4
.7u
_
2
5
V
_
X
5
R
_
0
8
P C1 0 8
*0 . 1 u _ 10 V_ X7 R _0 4
P R8 2
*1 . 2 K _ 1 % _0 4
P C 9 2
0 . 1 u _ 10 V_ X 7 R_ 0 4
P C 2 14
8 2 p _5 0 V _ N P O_ 0 4
P C 8 7
4
.7
u
_
25
V
_X
5R
_
0
8
P U 6
*u P 6 1 2 7
L X
1
BS T
2
V C C
3
D L
4
G
N
D
5
R
T
N
6
N
.C
7
N
.C
8
F B
9
VO UT
1 0
P G D
1 1
E N
1 2
IL
IM
1
3
N
.C
1
4
N
.C
15
D
H
1
6
P A D
1 7
P R 74
* 1 0 m il _ s h ort
P
C
9
4
0
.1u
_
1
6
V
_
Y
5
V
_
0
4
P C2 1 8
0 . 1u _ 1 6 V _ Y 5 V_ 0 4
P R 1 97 6 2 K _ 1 % _ 04
P C 2 13
1 u _1 0 V _ Y 5 V _ 06
P C 1 09
*1 u _ 1 0 V_ Y 5 V_ 0 6
P C1 1 2
*2 0 p _5 0 V _ N P O_ 0 4
P C 97
0 . 0 1u _ 1 6 V _ X 7R _ 0 4
P C 89
0 . 1 u_ 1 0 V_ X7 R_ 0 4
P R 7 5
1 0 K _ 1 % _ 04
P L 6
*2 . 5 U H_ 6 . 8 *7 . 3 * 3
1 2
P C 90
*4
.7
u
_
2
5V
_
X
5
R
_
0
8
P Q3 4
*M DS 26 5 9
4
6
2
7
3
8 5
1
P R 8 1
*1 0 m i l_ s h o rt
P C 1 1 0
* 0. 01 u _ 1 6 V_ X7 R _ 0 4
P C1 0 5
* 0 . 1 u_ 1 0 V _ X 7 R_ 0 4
P C1 1 1
*2 0 p _5 0 V _ N P O_ 0 4
P C 10 0
0 . 1 u_ 1 0 V_ X 7 R_ 0 4
P D 1 7
* CS O D 14 0 S H
A
C
P R 7 0
1 0 0 K _ 1 % _0 4
P C 9 8
* 2 0p _ 5 0 V_ NP O_ 0 4
P C8 8
0
.1
u
_
5
0
V
_
Y
5
V
_
0
6
P R 7 9 *6 . 8 K _ 1 % _ 0 4
+
P
C
1
0
6
*
5
60
u
_
2
.5
V
_
6
.6
*6
.6
*5
.9
P C 9 9
* 2 0p _ 5 0 V_ NP O_ 0 4
P C1 0 4
0 . 1 u _ 1 0V _ X5 R _ 04
P C2 1 6
1 0 u _ 6 . 3 V _ X5 R _ 06
P R8 3
*3 K _ 1 % _0 4
P C1 0 3
*4
.7
u
_2
5
V
_
X
5
R
_
08
P J 1 8
3 m m
1 2
P Q3 2
MD S 2 6 5 8
4
6
2
7
3
8 5
1
P R 7 8 62 K _1 % _ 0 4
P J 1 0
5 m m
1 2
P Q 3 0
M TN 7 0 0 2Z HS 3
G
D
S
P R 1 95
1 0 . 2 K _ 1% _ 0 4
P C 10 1
*0
.1
u
_
5
0V
_Y
5V
_
06
P R8 0
2 20 K _ 1 % _ 0 4
P C 2 1 9
1 0 u _6 . 3 V_ X 5 R _0 6
P R7 3
2 2 0 K _ 1 % _ 04
P J 1 1
5 mm
1 2
P D 1 4
R B0 5 40 S 2
A
C
P C9 6
1 u_ 1 0 V _ Y 5 V _0 6
P Q 35
*M DS 26 5 5 4
6
2
7
3
8 5
1
P J 2 3
O P E N -1 mm
1
2
P R 1 96
3 . 2 4 K _ 1% _ 0 4
P Q 3 1
M D S 2 65 8
4
6
2
7
3
8 5
1
+
P
C
9
3
5
6
0u
_
2
.5
V
_
6
.6
*6
.6
*5
.9
P C 9 1
0 . 1 u _1 0 V _ X5 R_ 0 4
P R7 1 10 K _1 % _ 0 4 P R 7 2 * 6 2K _ 1% _ 0 4
P C 2 15
1 0 u_ 6 . 3 V _ X 5 R_ 0 6
V I N
1 . 1 V 3 . 3 V
5 V
V 1 . 1
VI N
1 V S
5V
V1 . 0 S 3 . 3 V
5 V
V 1 S _ R E G
5 V
5 V
1 VS
1. 5V
S US B 3 0 , 3 2 , 3 4, 36
1.1V_PWRGD 19
1VS_ PWRGD 35
D D_ O N# 29 , 3 0 , 3 2
S U S C 3 0 , 35
Schematic Diagrams
Power 1.8VS B - 35
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 1.8VS

EN_1. 8V
3A
3A
Vout = 0.8V ( 1 + Ra / Rb )
Rb
Ra
1.8V_PWRGD
EN_1.8V
1.8V_PWRGD
SUSB
1.8VS
OCP=10uA X RI LI M / Rdson
4A
PC220
10u_6.3V_X5R_06
PR45
*14K_1%_04
PL3
*TMPC0603H-4R7M-Z01
1 2
PC61
*1u_10V_Y5V_06
PJ 6
5mm
1 2
PU3
*uP6127
LX
1
BST
2
VCC
3
DL
4
G
N
D
5
R
T
N
6
N
.C
7
N
.C
8
FB
9
VOUT
10
PGD
11
EN
12
IL
IM
1
3
N
.C
1
4
N
.C
1
5
D
H
1
6
PAD
17
+
P
C
5
9
*
5
6
0
u
_
2
.5
V
_
6
.
6
*6
.6
*
5
.9
PC63
*20p_50V_NPO_04
PR46
*10K_1%_04
PC64
*0.01u_16V_X7R_04
PU12
AX6610
GND
1
VCNTL
6
VOUT
3
VIN
5
VOUT
4
VFB
2
POK
7
EN
8
VIN
9
PC53
*
4
.7
u
_
2
5
V
_
X
5
R
_
0
8
PR44
*10mil_short
PQ21A
*AP6901GSM
7
8
12
PC58
*0. 1u_10V_X7R_04
PQ20
MTN7002ZHS3
G
D
S
PC62
*0.1u_10V_X7R_04
PC56
*0.1u_10V_X7R_04
PD10
*RB0540S2
A
C
PC224
1u_10V_Y5V_06
PR204
12.7K_1%_1/16W_04
PC223
10u_6.3V_X5R_06
PC221
0.1u_16V_Y5V_04
PR43
220K_1%_04
PC54
*
4
.7
u
_
2
5
V
_
X
5
R
_
0
8
PR205
10K_1%_04
PR41 *15K_1%_04
PC222
82p_50V_NPO_04
PJ 22
3mm
1 2
PQ21B
*AP6901GSM
4
3
56
P
C
6
0
*
0
.1
u
_
1
6
V
_
Y
5
V
_
0
4
PC57
0.01u_16V_X7R_04
PC217
10u_6.3V_X5R_06
PC52
*.
1
u
_
5
0
V
_
Y
5
V
_
0
6
PR42 10K_ 1%_04
PC65
*20p_50V_NPO_04
PR40
100K_1%_04
VI N
1.8VS V1.8S
3.3V
5V
5V
V1.8S_REG
5V
1.8VS
3.3V
SUSB 30, 32,33,36
1.8V_PWRGD 19
Sheet 34 of 41
Power 1.8VS
Schematic Diagrams
B - 36 APU CORE/ NB CORE
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
APU CORE/ NB CORE
Sheet 35 of 41
APU CORE/ NB
CORE

P R21 8
5 . 1_0 6
P C23 4
2 20 0p_ 50 V_ X7 R_0 4
P R21 7
5 . 1_0 6
P C15 8
2 20 0p_ 50 V_ X7 R_0 4
AP U_P W RGD_R
PC
1
38
4
.7u
_2
5V
_X
5R
_
08
PR1 20
1_1 %_ 06
P
C
13
9
4.7
u_
25
V_
X5
R
_0
8
P Q43
MDS 26 55 4
6
2
7
3
8 5
1
P
R
11
7
*1
0m
il_s
hort
P
C
14
7
3
3p_
50
V_
N
P
O
_0
4
P C17 1
*0 . 1u _10 V_X7 R_0 4
P R1 40
4 . 02 K_ 1%_ 04
P R14 1
10 _0 4
P
C
14
1
1
00
0p_
50
V
_X
7R
_
04
P R12 8
*1 0m i l _s ho rt
PR 1 45
10 0K _0 4
P R12 3 *10 K_ 06
P
C
16
2
0.0
1u
_50
V
_X
7R
_
04
P C168 1 00 0p_ 50 V_ X7 R_0 4
P J 1 6
OP EN-1 mm
1
2
C79 0 * 0. 01 u_ 16V_ X7 R_04
P R13 0 * 10m i l _s ho rt
PC
1
59
10u
_6
.3V
_X
5R
_
08
P C17 2
0. 1 u_ 10 V_ X7 R_0 4
P
C
16
0
0
.22u
_1
0V
_Y
5
V_
04
PR 125
1_ 1% _0 6
P Q45
MDS 26 55 4
6
2
7
3
8 5
1
P
C
142
10
00
p_5
0V
_
X7
R
_0
4
P L9
T MPC0 60 3H-R6 8M-Z01
1 2
C79 1 0 . 1u _10 V_X5R_0 4
P D21
*CS OD1 40S H
A
C
P C157
*0. 1 u_ 50V_ Y 5V_0 6
P R11 9 0_0 6
P
C
15
2
*4
.7u_
25
V_
X
5R
_
08
P R11 2
*1 0mi l _s hort
R6 82
1 0K _0 4
P R11 1
10 _0 4
P R13 5 1 K _1% _0 4
P R115
44 . 2K _1 %_0 4
P Q44
MDS 26 59
4
6
2
7
3
8 5
1
PC 1 67
18 0p_ 50 V_ NP O_0 4
P
C
15
0
4.7
u_2
5V
_X
5
R
_0
8
C78 9 0 . 1u _10 V_X5R_0 4
PR1 33
62 K_ 1%_ 04
P Q46
MT N700 2ZHS 3 G
D
S
P R137 6 .8 K _1% _0 4
P R14 4 *0 _0 4
P C163
2. 2 u_6 . 3V_Y 5 V_06
Q29 MTN7 00 2ZHS 3
G
D S
P R14 8 1 0K _1 %_ 04
P R12 2 *0_ 06
P
C
153
*4.7
u_
25V
_
X5
R
_0
8
P R12 9
*1 0m i l _s ho rt
PR1 38 7. 5 K_ 1% _0 4
P R14 9
10 _0 4
PC
1
51
4
.7u
_2
5V
_X
5R
_
08
P R20 9 0 _0 4
+
P C1 40
*3 30 U_2 5V
1
2
P C15 5
0 . 2 2u _1 6V_0 6
P R1 36
5 4. 9 K_ 1%_ 04
P C1 45
1 0u _6 .3 V_X5R_0 8
PQ4 7
MTN7 00 2ZHS3 G
D
S
P U9
ISL6265C
P GND_1
2 8
P
G
N
D
_N
B
40
P
H
A
SE
_
N
B
38
U
G
A
TE
_
N
B
37
P GND_0
3 2
R
T
N
_
1
17
P HASE _0
3 3
P HASE _1
2 7
UGATE _0
3 4
V
SE
N
_
1
18
RBI AS
7
IS
N
_0
1
4
COMP _0
11
VDI FF _0
9
VW_ 0
12
OCS ET
8
ISP
_0
1
3
V
SE
N
_
0
15
E NABL E
6
R
TN
_
0
1
6
S VC
5
P GOOD
2
S VD
4
UGATE _1
2 6
F B_ 0
10
LGATE _1
2 9
OF S/ VF I XE N
1
P VCC
3 0
LGATE _0
3 1
BOOT _NB
3 6
BOOT_0
3 5
G
N
D
49
P WROK
3
VD
IF
F
_1
1
9
F
B
_1
20
C
O
M
P
_1
21
LG
A
T
E_
N
B
3
9
VW
_1
2
2
IS
P
_1
23
ISN
_
1
24
BOOT_1
2 5
O
C
S
E
T
_N
B
41
R
TN
_
N
B
4
2
V
SE
N
_
N
B
43
F
S
E
T_
N
B
44
C
O
M
P
_N
B
4
5
F
B_
N
B
46
V
C
C
4
7
VIN
4
8
PR1 32
54 .9 K _1% _0 4
P
R
118
*10
m
il_
sh
ort
P Q42
MDS 26 59
4
6
2
7
3
8 5
1
P C14 9
0. 1 u_ 50V_ Y 5V_0 6
P R10 9
10 _0 4
P C1 69
0 . 1u _5 0V _Y 5 V_ 06
P
R
1
13
2
2K
_
1%
_
04
P R12 1
1 0K _0 4
+
P
C
14
4
*3
30
u_2
.5V
_V
_
A
P R12 7 * 10m i l _s ho rt
P
C
14
6
0.1
u_
50
V_
Y5
V
_06
P
R
143
*10
m
il_
sh
ort
+
PC
1
61
560
u_
2.5
V_
6.6*
6.6*5
.9
P C16 6
1 00 0p _5 0V_X7R_0 4
P
R
14
2
*1
0m
il_sh
ort
+
P
C
16
4
*3
30
u_2
.5V
_V
_
A
PJ 20
*8mm
1 2
P R1 34
2 55 _1 %_0 4
P HAS E_ NB
P R11 0
10 _0 6
P R1 39 51 0K _0 4
+P C15 4
*1 5u _2 5V_6 . 3*4 .4 _C
P C15 6
*0 .1 u_ 50 V_ Y 5V_0 6
+
P
C
143
56
0u_
2.5
V_
6.6
*6.6*
5.9
O
X
SV I
Z33 01
P R13 1 0 _0 6
P R11 4
10 _0 6
1
0 .9
O
P C 13 7
1 u_1 0V_Y 5V_0 6
P R1 16
8 . 2K _1 %_0 4
0
SV C
1
1 .0
P R14 7 *0 _0 4
P L8 T MP C06 03H-R 6 8M-Z01
1 2
0
1 .1
SV D
0
U4 6
*74 AHC1 G08 GW
1
2
5
4
3
P J 1 9
*8 mm
1 2
O utp ut
PC1 48
0. 22 u_ 16V_ 06
0
P C16 5
4 70 0p_ 50 V_ X7 R _0 4
VDDCR_ CP U
0 .8 1 1
PD2 0
*C
S
O
D
140
S
H
A
C
EN_ VCORE
M eta l VI D C ode s
1 1A
VDDCR_ CPU
5 V
SV C
V FIX EN V ID Cod es
NB_VDDCR
0 .8
0
S GND5
S GND5
S GND5
O utp ut
SGND5
S GND5
SGND5
1 .4
1 .0
3. 3V S
S GND5
1 .2
1
VI N
1
VI N
5 VS
5 VS
1
VI N
1
3 . 3VS
CP U_VDDCR
SV D
0
0
5VS
0
+5V
Pin 49 is GND Pi n
O
VDDCR _NB
CP U_VDDCR
1 . 8VS
1 . 5V
NB_VDDCR
3. 3 VS
3. 3VS
L GATE _NB
CPU_ SVC 3
C P U_VDD0_ RUN_F B_H 3
P WRGD_ VCOR E 1 9
CPU_ SVD 3
I SP _0
X
C P U_VDD0 _RUN_ FB_ L 3
I S P _1
VCORE _ON 2 7
CPU_ VDDNB_ RUN_F B_H 3
CPU_ VDDNB_ RUN_F B_L 3
I SN_ 0
1 VS _ PW RGD 33
AP U_ PW RGD 3, 1 5
S US C 3 0, 3 3
DDR1 . 5V_P W RGD 19 , 32
I S P _0
AP U_ PW RGD_R
O FS/V FIX EN
GND
Of fse t &
Dr oop
P HASE _ 0
X
I S N_1
O
C los e to
C PU
s ock et
X
PR 1 24 *1 0mi l _sh ort
+3 .3V
VF IX
I S N_ 0
UGAT E _0
X
10A
LGATE _0
EMI
UGAT E_ NB
P R12 6 * 10m i l _s ho rt
EN_ VCORE
Schematic Diagrams
VGA POWER B - 37
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
VGA POWER

S US B
300mA
MXM_P W RE N#
S US B
MXM_GP I O1
2 A
NMOS
O N
2 A
120MIL
1 . 5V_P G
Rb
Vout = 0.8V ( 1 + Ra / Rb )
1.5A
Ra
F BVDDQ_P W R_E N
ON
200MIL
NMOS
MXM_P W RE N#
MXM_ PW RE N
? ? ? ? ? ? ? ? ? ? ? VGA? ? ? ? ?
MXM_ P WRE N#
SU SB
? ? VGA default? ? ?
MXM_P W RE N#
S US B
1021delete
ROBS ON_ GPI O1 5
12/10
P R8 6
*1 00 K _0 4
P D19
*CS OD1 40 SH
A
C
PR 19 3
*12 K _1 %_ 04
PR 97 *10 . 2K _1 %_ 04
PR 19 8 *0_ 04
P C1 30
*1 u_ 10 V_Y 5 V_0 6
PR9 8 * 18 . 7K _1 %_ 04
P C1 31
*0 . 1u _1 6V_ Y 5V_0 4
P J 1 5
*OP E N_3 A
1 2
Q23
*MT N70 02 ZHS3
G
D
S
P R8 7
*1 00 K _0 4
R56 7
*1 00 _0 4
Q20 B
*MTNN 20 N03 Q8 6
5
4
P R9 1
* 10 K_ 04
R 68 4 * 0_ 04
P Q3 9B
*M TNN2 0N0 3Q8 6
5
4
P U7
*u P6 12 2
B
O
O
T
1
U
G
2
P
O
K
3
S
S
4
E
A
P
5
S ET 3
6
S ET 2
7
S ET 1
8
S ET 0
9
F B
1 0
C
O
M
P
11
V
ID
0
12
V
ID
1
13
E
N
/P
SM
14
C
S
N
15
CS P
1 6 RT
1 7 VCC
1 8 L G
1 9 P HAS E
2 0 G ND
2 1
PR 10 1 *10 . 2K _1 %_ 04
C1 68
* 10 u_ 6. 3V_ 08 _H1 25
PR 95 *0_ 04
PC1 29
*0. 1 u_ 16 V_ Y 5V_ 04
P J 25 * 6mi l
1 2
R 56 6
* 10 0_ 04
Q3
*M TN7 00 2ZHS 3 G
D
S
C78 5
*0. 1 u_ 16 V_Y 5 V_ 04
PC 11 5
*4. 7 u_ 25 V_X5 R_ 08
PJ 14
*OP EN _5 A
1 2
O N
C7 87
*1 0u _1 0V_ Y 5V_0 8
PR 20 0 *0_ 04
PR9 3
*1K _ 1%_ 04
1
VID0
PR 20 1 *0_ 04
P C1 16
*2 20 0p _5 0V_ X7 R_0 6
0
1.0V
P C1 32
*8 2p _5 0V_ NPO _0 4
P C12 2
*22 00 p_ 50 V_X7R_ 04
0.9V
1
1 VID1
Q19
*P 12 03 BV
4
6 2
5
7 3
1
8
1.05V
0
Table: VDDC_OPT_VID
1.15V
Q2
*MT N70 02 ZHS 3 G
D
S
P R88 *1 0K _0 4
0 0
1
P R1 50 * 0_0 4
PR9 4
*22 _0 4
VGA_CORE
13A
P C11 7
*0 . 1u _5 0V_Y 5V_0 6
PR1 02 * 14 . 7K _1 %_ 04
PR1 00 * 17 . 4K _1 %_ 04
C7 88
*0 . 02 2u _5 0V_X7R_ 04
P R1 51 * 0_ 04
Q 22
*MTN7 00 2ZHS 3
G
D
S
P C11 4
*4. 7 u_ 25 V_X5R_ 08
P C11 3
*0 .1 u_ 50 V_Y 5 V_0 6
P U8
* AX66 10
GND
1
VCNTL
6
VOUT
3
VI N
5
VOUT
4
VF B
2
P OK
7
E N
8
VI N
9
P R21 4
*10 K _0 4
R8 4 *1 00 K _0 4
P C13 3
*1 0u _6 . 3V_X5R_ 08
PC1 27
*0. 0 1u _5 0V_X7R_ 04
C78 6
*10 u_ 10 V_Y 5 V_ 08
PC 12 6 *10 00 p_ 50 V_X7R_ 04
P Q3 9A
* MTNN2 0N0 3Q8
1
3
7
2 8
R5 64
*1 M_0 4
P J 12
* 8mm
1 2
PD1 8
*RB0 54 0S 2
A
C
P R89
*3 3K _ 1%_ 04
P R1 08
*1 0K _ 1% _0 4
P R1 04
* 10 0K _1 %_ 04
PR9 6 * 21 . 5K _1 %_ 04
P Q36
*ME 4 89 4-G
4
6
2
7
3
8 5
1
P R1 07
*2 . 61 K _1 %_0 4
P C1 24 * 47 p_ 50 V_ NP O_0 4
P C1 25
* 0. 01 u_ 50 V_X7R_ 04
PC1 35
*1U_ 6. 3 V_ Y 5 V_ 04
PC1 28
*10 u_ 6. 3 V_ X5 R_ 08
P R21 2 *0 _0 4
+
P
C
11
9
*5
60
u_
2.5
V_
6.6
*6
.6
*5
.9
R9 0
*1 M_0 4
P J 24 * 6mi l
1 2
Q20 A
*MT NN20 N03 Q8
1
3
7
2 8
P C1 18
* 10 0p _50 V_NP O_ 04
PR8 4 * 10 0K _0 4
Q1
*AO3 40 9
G
D S
PR 20 3 *0_ 04
PL 7
*1. 0 UH_6 . 8* 7. 3* 3. 5
C1 69
*2 20 0p _5 0V_ X7 R_0 4
P
C
12
1
*0
.1u
_1
0V
_X
7
R
_0
4
P R92
*5. 1 _0 6
P R19 4 *3K _ 1% _0 4
P C13 4
*1 0u _6 . 3V_X5R_ 08
P C12 3
*1 u_ 16 V_ X5 R_ 06
R 91 * 0_ 04
PC 17 0
*0. 1 u_ 50 V_Y 5 V_ 06
R8 3
*1 K _0 4
R8 8
* 10 K_ 04
P R20 2 *0 _0 4
PR 99 *10 . 2K _1 %_ 04
P C1 73
* 0. 1u _5 0V_ Y 5V_ 06
P R19 9 *0 _0 4
P R10 5 *10 0K _ 04
P R10 6 *10 K _0 4
PQ4 0
*MTN7 00 2ZHS 3
G
D
S
P C1 36
* 0. 02 2u _5 0V_ X7 R_0 4
R5 65
* 1M_ 04
P Q38
*ME 46 26 -G 4
6
2
7
3
8 5
1
P R21 3 *0 _0 4
P J 2 1
*OP E N_3 A
1 2
PR 10 3 *10 K _1 %_0 4
P Q63
*MT N70 02 ZHS 3 G
D
S
5 V
3 . 3V
VGA_ VC ORE VDDC
VI N
1 . 8VS
3. 3 VS_ GP U
1 .5 V
1. 8 V_RE G
S Y S 15 V
1 . 0 V_ RE G
5V
MVD DQ
3. 3 VS
5V
1. 5 V
S Y S 1 5V
3 . 3VS _GP U 3 . 3V
R E G_ 1 . 0V
MVDDQ
3. 3VS
3 . 3VS _GP U
3. 3 V
M XM_ GP IO 1 7 , 15
MXM_P W RE N 7
S US B 3 0, 3 2, 3 3, 3 4
MXM_ PW RGD 15
ROBSON _GP I O15 8
ROBSON _GP I O16 8
12/7
SET 3 SE T2 SE T1 SE T0
ROBS ON_ GPI O1 6
12/8DeletePC120
MXM_P W RGD
Sheet 36 of 41
VGA POWER
Schematic Diagrams
B - 38 CHARGER/ DC IN
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CHARGER/ DC IN

P C2 36 0. 1 u _ 50 V_ Y 5 V_ 06
P C2 3 7
0. 1u _ 50 V_ Y 5 V _ 06
CU R_ S E NS E
TO T AL_ CU R
C E LL S
C T L1
VO LT _ S E L
VOL T _S E L
0. 5V/ 1A
0. 5V/ 1A
# Char g e Volt age 1 2.6V
# Char g e Cur r ent 1.5A
CHARGER
V H= 4.2 V
V L= 4.3 V
PR17 0 : 1 0K fo r 65 W
6-20-B3Z40-004 for 30W
PIN 25th
FOR2SCONNECTTOGND
FOR3SCONNECTN.C.
FOR4SCONNECTTOVREFPIN
6- 21- D34B0- 105
CHARGE
CURRENT
ADJ
PIN17t hCONNECT
TOBATCONN.
AC I N 3 1
F ROMEC: #123/ (PD) CTX/ GPB2
C
H
G
-C
U
R
R
E
N
T
VL =4 S
C E CL M
VH =3 S
C E L LS
P C 23 2
3 0p _ 5 0V_ N P O_ 04
PR17 0 : 3 .65 K f or 3 0W
P C2 3 5
0. 1 u _ 50 V_ Y 5 V_ 06
TOTAL
POWER
ADJ
P L1 3 HC B10 0 5K F -12 1 T2 0
P L1 4 HC B10 0 5K F -12 1 T2 0
P C 23 3
3 0p _ 5 0V _ N P O_ 04
BAT _ DE T
BAT _VO L T V_ BAT
W250BUQ
W240BU
S MC _ B AT
S MD _ B AT
P R 18 4
2 M_ 1 %_ 0 4
P R1 6 9 1M _ 04
P
C
1
8
04.7
u
_
25
V
_
X
5R
_
08
P C 23 1
3 0p _ 5 0V_ N P O_ 04
P C 21 2
0
.0
1u
_
50
V
_
X
7
R
_
04
P
C
2
08
0
.1
u
_5
0
V
_Y
5
V
_
0
6
P L1 2 HC B10 0 5K F -12 1 T2 0
P C1 9 5
1u _ 10 V_ Y 5 V _ 0 6
P C2 04
0 . 0 1 u_ 5 0 V_X7 R _ 0 4
P R 18 1
6 0 . 4K _ 1 % _0 4
P C1 9 4
0 . 1 u _5 0 V_ Y 5 V_0 6
P C 19 7
0 . 1 u_ 5 0V_ Y 5V_ 0 6
P R 1 5 5
0. 02 _ 1% _ 3 2
P R1 5 6
1 0 K _ 04
P R 19 1 *1 5 m i l _ sh o rt_ 06
P C2 0 9
1 0 00 p _ 50 V_ X 7R _0 4
P R 17 3
1 K _ 1 %_ 0 4
P Q5 5
MT N 70 0 2ZH S 3
G
D
S
P C 19 2
0 . 1 u_ 5 0 V_Y 5V_ 0 6
P C1 98
*
0.1
u
_5
0
V
_
Y
5V
_
0
6
P
R
1
7
4
39
.2
K
_
1%
_
04
P
C
1
8
94.7
u
_
25
V
_
X
5R
_
08
P
C
1
8
30.1
u
_
50
V
_
Y
5V
_0
6
P R1 83
1 0 2 K _1 % _ 04
D3 2
*BAV9 9 RE C TI F I E R
A
C
A C
P Q 49 A
AP 6 9 01 G S M
7
8
1
2
P C1 99
*
0.1
u
_5
0
V
_
Y
5V
_
0
6
TRERMAL PAD
P U 10
MB 39 A1 32
V CC
1
-I NC1
2
+I N C1
3
A CI N
4
A COK
5
-I NE 3
6
A DJ 1
7
-IN
E
1
9
O
U
T
C
1
1
0
O
U
T
C
2
1
1
+IN
C
2
1
2
-IN
C
2
1
3
A
D
J
2
14
C
O
M
P
2
1
5
BA T T
17 ADJ 3
18 C S
19 RT
20 VR E F
21 G ND
22 CT L 1
23
C
E
LL
S
25
P
G
N
D
2
6
O
U
T
-2
27
V
B
2
8
LX
2
9
O
U
T
-1
3
0
C
B
3
1
COM P 1
8
C
O
M
P
3
16
V I N
24
C
T
L2
32
S G ND
33
P
C
20
7
0
.1
u_
5
0V
_
Y
5
V
_
06
D3 1
A
C
A C
P Q 48
P 2 0 03 E VG
4
6 2
5
7 3
1
8
P
R
1
6
0
0_
0
4
P
R
1
7
0
3
.6
5K
_
1
%
_
0
4
P R 17 8
3 0 0K _ 1 % _0 4
P
R
15
7
20
0
K
_
1%
_
04
P Q 59
M TN 7 00 2 ZHS 3
G
D
S
P Q 5 0
P 2 0 0 3E VG
4
6 2
5
7 3
1
8
P R1 71
2 0 0 K _0 4
D2 9
A
C
A C
P C 20 1
0 . 1 u_ 5 0 V_Y 5V _ 0 6
P J 17
O P E N-1 m m
1
2
P C2 0 6 *2 2 p_ 5 0V_ N P O_ 04
P Q5 3
MT N7 0 02 ZHS 3
G
D
S
P
C
1
9
00.
1u
_
50
V
_
Y
5
V
_0
6
P C 17 5
0
.1
u_
5
0
V
_Y
5
V
_
0
6
P R1 8 0
2 0 0K _ 1 % _0 4
P C2 1 0
1 0 00 p _ 50 V_ X 7R _0 4
P R1 68
1 0 K _ 1% _ 0 4
P R 17 9
1 0 K _1 % _ 04
P Q 52
AO3 4 09
G
D S
P R 1 72
1 0 K _ 1% _ 0 4
P Q5 6
MT N7 0 0 2ZH S 3
G
D
S
P C2 0 0
0 . 1u _ 5 0V _ Y 5 V_ 0 6
P C 19 6
0 . 1u _ 50 V_ Y 5 V_ 0 6
J B ATT A2
BT D -05 T I 1G
1
2
3
4
5
P R 18 6
* 17 . 4 K _ 1% _ 04
P C 21 1
0 . 1 u_ 5 0 V_Y 5V _ 0 6
P R 1 88
1 0 0K _0 4
P
R
1
7
6
2
0K
_1
%
_0
4
P R1 8 9
1 0K _ 0 4
P R 1 6 6
10 K _ 0 4
R5 6 8 1 0K _ 0 4
P Q5 4
DT A11 4 E UA
C E
B
P C2 0 2 0 . 1u _ 5 0V_ Y 5 V _ 0 6
P R 1 5 3
0 . 02 _ 1 %_ 3 2
P
C
1
810
.1
u
_5
0
V
_Y
5
V
_
0
6
P L 1 0
H CB4 53 2 K F -8 00 T 6 0
P D 22
RB 05 4 0S 2
A C
C T L1
S
D
G
P Q5 8 B
MT DN 70 0 2 ZHS 6 R 5
3
4
P
C
1
7
8
*1
u
_2
5
V
_0
8
P C 20 5
* 0. 1 u _5 0 V_ Y 5 V_ 06
P
C
1
8
44.
7u
_
25
V
_
X
5
R
_
08
P
C
18
84
.7
u_
2
5V
_
X
5
R
_
0
8
P Q5 1
MT N7 0 02 ZH S 3
G
D
S
P C 17 7
0
.1
u_
5
0
V
_Y
5
V
_
0
6
P Q5 7
* MT N7 0 02 ZHS 3
G
D
S
P C2 0 3
1 0 0p _ 5 0V_ N P O_ 04
P R1 8 2
*1 0m i l _s h ort _0 4
P
C
1
824
.7
u
_2
5
V
_X
5
R
_0
8
J B ATT A1
* BTD -0 5T C1 B
1
2
3
4
5
P L 1 1 BC I HP 0 7 30 -6 R8 M
P C 19 3
0 . 1 u_ 5 0V_ Y 5V_ 0 6
P R1 87
7 6 . 8 K _1 % _ 04
P R 1 67
4 9 . 9 K _1 % _ 04
P C 17 6
0
.1
u_
5
0
V
_Y
5
V
_
0
6
P
C
1
86
*
4.7
u
_2
5
V
_
X
5R
_
08
P
C
1
8
54
.7
u
_2
5
V
_
X
5R
_0
8
S
D
G
P Q 5 8A
MT DN 70 0 2ZH S 6 R
2
6
1
P R1 6 5 *0 _ 04
P R 1 85
1 0 0 K _0 4
P
R
1
6
3
*0
_0
4
P R 1 9 0
1. 5 M_ 0 4
P
C
1
874
.7
u
_2
5
V
_X
5
R
_0
8
P Q 4 9B
AP 6 9 0 1G S M
4
3
56
P R 1 92
1 M_ 0 4
P C1 7 9
0. 01 u _1 6 V_ X7 R_ 0 4
P R 17 7
22 K _ 1 %_ 0 4
D3 0
A
C
A C
P
R
1
6
4
10
0
K
_
1%
_
0
4
P R 1 54
1 3 0K _1 % _0 4
P C1 9 1 0 . 1 u _5 0 V _Y 5 V_0 6
J ACK 1
J DD-5 2 0 48 AS 1 F - 1 65
GND 2
GND 1
2
1
P R 1 59
1 0 K _ 1% _ 04
S GND 6
P
R
1
6
1
0_
0
4
S GN D6
S G ND6
S G ND6
S GN D6
VDD 3
VA
V A
S GND 6
S G ND6
VA
V_BAT
VI N
VA
S G ND6
V_ BAT
VI N
VA
V_ BAT
VDD3
S GND 6
S G ND 6
S Y S 3 V
S Y S 3 V S Y S 3 V
A C_ I N# 1 6, 2 7 , 2 9
CH G_ E N 2 7
VCH G_ S E L 2 7
S M C_ BAT 2 7
BAT _ DE T 2 7
S M D_ BAT 2 7
C E LL _ CO NT RO L 2 7
BAT _VO L T 2 7
6-20-B3410-003 for 65W
Sheet 37 of 41
CHARGER/ DC IN
Schematic Diagrams
Click Board B - 39
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Click Board

CLED_BAT_CHG
CLED_PWR
CLED_ACIN
CLED_BAT_FULL
CLED_BAT_FULL
6- 20- 94A50- 104
6- 21- 91A20- 106 6- 21- 91A20- 106
6- 21- 91A00- 106 6- 21- 91A00- 106
6- 53- 3050B- 041 6- 53- 3050B- 041 6- 53- 3050B- 041 6- 53- 3050B- 041
6- 20- 94A70- 104
6- 20- 94AA0- 104
1
B AT LED
POW ER O N
LED
2
For W250BUQ
CLED_ACIN
6- 52- 55002- 04E
6- 52- 55002- 042
CLED_BAT_CHG
CH5
C95D95
CH6
HO-165X94_5NP
CJ _ TP3
*85201-06051
1
2
3
4
5
6
1
CH1
MTH237D91
2
3
4
5 6
7
8
9
CC2
*0. 1u_16V_Y5V_04
CR3
*220_04
CSW2
TJ G-533-S-T/R
3
1
4
2
56
CC1
0.1u_16V_Y5V_04
CR1
*220_04
CSW3
*TJ G-533-S-T/R
3
1
4
2
56
CLICK BOARD
1
CH4
MTH237D91
2
3
4
5 6
7
8
9
CSW4
*TJ G-533-S-T/R
3
1
4
2
56
CC3
*0.1u_16V_Y5V_04
CJ _TP1
85201-04051
1
2
3
4
CJ _TP2
85201-06051
1
2
3
4
5
6
CSW1
TJ G-533-S-T/R
3
1
4
2
56
S
G
Y
CD26
*KPB-3025YSGC
13
24
CR4
*220_04
1
CH2
MTH237D91
2
3
4
5 6
7
8
9
S
G Y
CD27
*KPB-3025YSGC
13
24
CR2
*220_04
1
CH3
MTH237D91
2
3
4
5 6
7
8
9
CGND
CGND
CGND CGND
CGND
CGND CGND
CGND CGND
CGND CGND CGND
C5VS
CGND CGND
CGND
CGND
CGND
CVDD3
CGND
CGND
C5VS
CGND CGND CGND
CTPBUTTON_R CTPBUTTON_L CTPBUTTON_R CTPBUTTON_L
LI FT
KE Y
RI GHT
K EY
LIF T
KEY
1
RIG HT
KE Y
3
4 2
CSW1~4
6- 52- 55002- 04E
6- 52- 55002- 042
CTP_CLK
CTP_DATA
CTP_DATA
CTPBUTTON_L
CTP_CLK
CTPBUTTON_R
CLED_PWR
Sheet 38 of 41
Click Board
Schematic Diagrams
B - 40 Audio Board/ USB
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Audio Board/ USB
Sheet 39 of 41
Audio Board/ USB

AM I C1 -R
AS P K O UT R+_ R
AH P _ S E NS E
AH E ADP H ON E -R
AH E ADP H ON E -L
AU S B_ P N2
AS P K OUT R +
AM I C1 -L
AM I C1 -R
AM I C_ S E N S E
AS P K OUT R -
A US B_ P P 2
AU S B_ P P 2
A US B_ P N2
1
J_SPK1
J_SPK1
2
2
AR7 3 5 0 _0 6
6- 20-43110- 102
AUS B_ P P 2 _ R
6- 20-43150- 102
1
AUS B_ P N2 _ R
A _AU DG
EMI Requir e
6-21- B49C0-104
AUDIO JACK
AC1 0
2 2 u _6 . 3 V_ X5 R _0 8
BLACK
BLACK
P HO NE _ OU T_ R
AM I C1 -L
NC _M I C1
M I C1 _ OUT _ L
P HO NE _ OU T_ L
M I C1 _ OUT _ R
AM I C_ S E N S E
P HO NE -R
P HO NE -L
AHE AD P HO NE -R
AHE AD P HO NE -L
AHP _ S E N S E
AS P K OU TR -
AS P K OU TR +
AS P K O UT R-_ R
3
5
2
4
1
6
10/28Modify value
6- 20- B2800- 106
HP -L
6-20- B2800- 106
G ND
EMI Requir e
VT1802P
33_1%_04
3* R/ L? ?
AL 1 2 2
*W C M2 0 12 F 2 S -1 6 1T 0 3
1
4
2
3
AC6 0 . 1 u_ 1 6V _Y 5V_ 0 4
G ND
AL 12 6 F CM 1 00 5 K F -1 21 T 0 3 1 2
Headphone? ? ? ? > 10mi ls
? ? phone jack ? ?
? ? ? ? ? ? ?
R/L? ? ? ? GND ? ? ? ? 3*? ?
AJ _ US B 1
US 0 4 03 6 BCA0 8 1
V+
1
G
N
D
1
G
N
D
1
D ATA_ L
2
D ATA_ H
3
G ND
4
G
N
D
2
G
N
D
2
G
N
D
4
G
N
D
4
G
N
D
3
G
N
D
3
AC5
1 0u _ 1 0V_ Y 5 V_ 0 8
AC7 9 7
*1 8 0p _ 5 0V_ N P O_ 0 4
AC3
*0 . 1 u_ 1 6V _Y 5V_ 0 4
AC7 9 5
*1 00 p _ 50 V_ NP O _ 04
R esi stor 32or 33_04
m eet WLK Test
AU 1
* RT 9 71 5 BGS
VO UT 1
6
VO UT 3
8
VI N 2
3
VI N 1
2
VO UT 2
7
G ND
1
E N#
4
F L G#
5
AC2
0 . 1u _ 1 6V_ Y 5V_ 0 4
HP -R
A R2 *1 0 mi l _ sh o rt_ 04
AL 12 8
*F CM1 6 0 8K -1 2 1 T0 6 _ sh o rt
Lay out not e:
AC4
0. 1 u _ 16 V_ Y 5 V_ 0 4
R
L
AJ _ HP 1
2S J -T 3 51 -S 2 3
2
6
5
3
1
4
A R1 *1 0 mi l _ sh o rt_ 04
AJ _ S P K R1
85 2 0 4-0 2 0 01
P C B F o otp ri n t =8 5 2 04 -0 2 R
1
2
AC 7 94
*1 0 0 p_ 5 0V _N P O_ 0 4
AC7 0 . 1 u_ 1 6V _Y 5V_ 0 4
AC8 0 . 1 u_ 1 6V _Y 5V_ 0 4
AC9 0 . 1 u_ 1 6V _Y 5V_ 0 4
AL 1
H CB1 60 8 K F -1 2 1T 2 5
AC7 9 3
*1 00 p _ 50 V_ NP O _ 04
AH 1
C 59 D 59
AC7 9 8
*1 8 0 p_ 5 0V _N P O_ 0 4
AC 7 92
* 1 00 p _5 0 V_ NP O _0 4
A L1 2 3 F C M1 0 05 K F -1 2 1T 0 3 1 2
AH3
C5 9 D5 9
1
AH2
M TH 2 76 D1 1 1
2
3
4
5 6
7
8
9
AR5 7 0 1 8 0_ 1 % _0 4
AR5 6 9 1 8 0_ 1 % _0 4
R
L
AJ _ MI C1
2S J -T 3 51 -S 2 3
2
6
5
3
1
4
50m ils
AL 12 5 F CM 1 00 5 K F -1 21 T 0 3 1 2
1
AH4
MT H2 7 6 D1 11
2
3
4
5 6
7
8
9
AJ _ AUD I O1
8 52 0 1 -14 0 5 1-0 1
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
AC7 9 6
*1 u _1 0 V_ 06
AL 12 7
*F CM1 6 0 8K -1 2 1 T0 6 _ sh o rt
A L1 2 4 F C M1 0 05 K F -1 2 1T 0 3 1 2
A_U S BVCC
A_ US BVC C2 A_ US B VCC
AG ND AG ND AGN D
AGND
A_ 5 V
AG ND AG ND AGND AGN D AG ND
A GND
AGND
A_ 5 V
A_ AU DG AG ND
AG ND
A_AU DG
A_ AUD G
A_ AUD G
A_ AUDG
6-02-09715-920
AS P K _ HP #
50mi ls
60 mil
USB PORT
HEADPHONE
AS P K _H P #
Reverse
TO M/B
+AC 1
* 10 0 u_ 6 . 3 V_ B_A
MIC IN
Schematic Diagrams
Power Switch & LID Board B - 41
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power Switch & LID Board

20 mi l
1 0 p in & 8 pi n co- la y
20 mi l
S W E B_ W W W #
S W E B_ E M AI L#
S M _B T N#
S AP _ ON S L I D_ S W #
S AP _ ON
S W E B_ E M AI L #
S M _B T N #
S L I D_ S W #
S W E B_ W W W #
6- 20- 94K10- 108
HOT KEY
20 mi l
SU1, SU2
2
3
1
LID SWITCH IC
S LI D _ S W #
6- 02-00268- LC1
6- 02-00248- LC2
S W E B_E M AI L # S W E B_W W W # S M_ BT N# S AP _O N
POWER SW & LED & HOT KEY
S P W R _ S W 1
T J G-5 33 -S -T / R
3
1
4
2
56
S W W W _S W 1
*T J G-5 3 3 -S -T/ R
3
1
4
2
56
S R4
*0 _ 0 4
S P W R _ S W 2
*T J G-5 3 3 -S -T/ R
3
1
4
2
56
1
S MH 4
MT H2 3 7D 1 18
2
3
4
5 6
7
8
9
S C6
*0 . 1 u_ 1 0 V _X7 R_ 0 4
S R 3
* 10 0 K _ 1% _ 0 4
S R2
22 0 _0 4
S C 4
* 0. 1 u _ 16 V_ Y 5 V_ 04
S D 1
HT -1 5 0N B-DT
A
C
S C5
* 0 . 1u _ 1 6V_ Y 5V_ 0 4
S C3
*0 . 1u _ 1 6V_ Y 5V_ 0 4
S MAI L _ S W 1
* T J G -5 33 -S -T / R
3
1
4
2
56
S R1 1 0 0 K _0 4
S U1
M H2 4 8-A LF A -E S O
VC C
1
OU T
2
G
N
D
3
S J _ S W 1
* 50 5 0 0-0 1 0 41 -0 01 L
1
2
3
4
5
6
7
8
9
1 0
S A P _S W 1
* T J G -53 3 -S -T / R
3
1
4
2
56
S C 2
0 . 1 u_ 1 6 V_Y 5 V_0 4 S D3
* HT -1 50 N B-DT
A
C
S R 5
* 4 7K _ 0 4
S J _ S W 2
8 8 48 6 -0 80 1
1
2
3
4
5
6
7
8
S D2
*BA V 99 RE CT I F I E R
C
AC
A
S C1
*1 00 p _ 50 V_ NP O _ 04
S MH 5
H7 _ 0D 2 _3
S MH2
H7 _0 D 2_ 3
1
S MH3
M T H2 37 D 87
2
3
4
5 6
7
8
9
1
S M H1
M TH 2 37 D8 7
2
3
4
5 6
7
8
9
S M GN D
S M GND
S MG ND S M GN D S MG ND S M GN D S MGN D
S _ VI N
S MGN D
S MG ND
S _ V I N
S _ 3 . 3V
S _ 3 . 3V
S M GN D
S M GN D
S _ 3. 3 VS
S _ 3 . 3 V
S MG ND
S _ 3. 3 VS
S MGN D
S MGN D S M GND
S _3 . 3 V
S M GN D
S MGN D
S M GND S MG ND
S MG ND
S _ 3. 3 VS
S M GN D
S M GN D
S MG ND S MG ND
S M GN D S MG ND
S MH6
T1 5 8B 11 8 X8 7 D1 1 8 X8 7
S M_ BT N#
POWER BUTTON
PSW1~8
4
3 1
2
6- 53- 3050B- 241
6- 53- 3150B- 245
6- 53- 3050B- 240
Z4 3 0 1
6-52- 56001-022
6-52- 56000-020
6-52- 56001-028
6-52- 56001-023
POWER
SWITCH
LED
2 0m il
FOR E5128Q
S MH 7
T1 5 8 B91 D 91
POWER BUTTON
FOR E5128Q FOR E4120Q/ E5120Q
PSW1~8
WEB_WWW#
4 2
WEB_EMAIL#
1
AP_KEY#
3
FOR E5120Q
6- 52-56001- 028
6- 52-56001- 023
6- 52-56001- 022
6- 52-56000- 020
6- 53-3150B- 245
6-53- 3050B-240
6-53- 3050B-241
6-53- 3150B-245
6- 53-3050B- 240
6- 53-3050B- 241
6- 53- 3050B- 240
6- 53- 3050B- 241
6- 53- 3150B- 245
6- 53- 3050B- 241
6- 53- 3150B- 245
6- 53- 3050B- 240
Sheet 40 of 41
Power Switch & LID
Board
Schematic Diagrams
B - 42
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
EXTERNAL ODD Board

QJ _SATA_TXP1
P IN
GND1~3=QG ND
QJ _SATA_ODD_DA#
QJ _SATA_TXN1
PI N
GND1~2=WGND
QJ _SATA_RXP1
QJ _SATA_RXN1
QJ _ODD_DETECT#
QC2
*0. 1u_16V_Y5V_04
QJ _ODD1
242001-1
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
QH1
C237D91
QC1
0.1u_16V_Y5V_04
QJ _ODD2
1-162-100562
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
QH2
C67D67
QH3
C67D67
QH4
C237D91
QGND
QGND
QGND QGND
Q_5VS
Q_5VS
QGND
QGND
Q_5VS
QGND
6- 21- 14030- 013
6- 21- 14020- 013
6- 21- 14010- 013
6- 21- 13A00- 013
Sheet 41 of 41
EXTERNAL ODD
Board
BIOS Update
C - 1
C
:
B
I
O
S

U
p
d
a
t
e
Appendix C:Updating the FLASH ROM BIOS
To update the FLASH ROM BIOS you must:
Download the BIOS update from the web site.
Unzip the files onto a bootable CD/DVD/USB Flash Drive.
Reboot your computer from an external CD/DVD/USB Flash Drive.
Use the flash tools to update the flash BIOS using the commands indicated below.
Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
After rebooting the computer you may restart the computer again and make any required changes to the default BIOS
settings.
Download the BIOS
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel.
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model
(see sidebar for important information on BIOS versions).
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the
downloaded files.
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).
Set the computer to boot from the external drive
1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the + and - keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
BIOS Version
Make sure you down-
load the latest correct
version of the BIOS ap-
propriate for the com-
puter model you are
working on.
You should only
download BIOS ver-
sions that are
V1.01.XX or higher as
appropriate for your
computer model.
Note that BIOS versions
are not backward com-
patible and therefore
you may not down-
grade your BIOS to an
older version after up-
grading to a later ver-
sion (e.g if you upgrade
a BIOS to ver 1.01.05,
you MAY NOT then go
back and flash the BIOS
to ver 1.01.04).
BIOS Update
C - 2
C
:
B
I
O
S

U
p
d
a
t
e
Use the flash tools to update the BIOS
1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message Starting MS-DOS. You will then be prompted to give Y or N responses to the programs
being loaded by DOS. Choose N for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\>(C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:
C:\> Flash.bat

4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.
Restart the computer (booting from the HDD)
1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select Yes to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS
You may now enter the BIOS and make any changes you require to the default settings.

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