G.

PULLA REDDY ENGINEERING COLLEGE (AUTONOMOUS)

KURNOOL.
Affiliated to J.N.T.U ANANTHAPUR

DEPARTMENT OF
ELECTRONICS AND COMMUNICATION ENGINEERING

FINAL YEAR MINI PROJECT ABSTRACT BASED ON

COMPLEXITY REDUCTION IN UNROLLED

CORDIC ARCHITECTURES
BY
K. HEMALATHA (119X1A0449)
K. SANDEEP REDDY (119X1A0453)

G. SWETHA (129X5A04D2)

UNDER THE ESTEEMED GUIDENCE OF

SRI . M. MADHU BABU , M.TECH ( Ph.D )

Assistant Professor

Abstract :
Digital signal processing (DSP) algorithms exhibit an increasing
need for the efficient implementation of complex arithmetic operations. The
computation of trigonometric functions, coordinate transformations or
rotations of complex valued phasors is almost naturally involved with
modern DSP algorithms. Popular application examples are algorithms used
in digital communication technology and in adaptive signal processing.
While in digital communications, the straightforward evaluation of the cited
functions is important, numerous matrix based adaptive signal processing
algorithms require the solution of systems of linear equations, QR
factorization or the computation of eigen values, eigenvectors or singular
values. All these tasks can be efficiently implemented using processing
elements performing vector rotations. The COordinate Rotation DIgital
Computer algorithm (CORDIC) offers the opportunity to calculate all the
desired functions in a rather simple and elegant way.
The CORDIC algorithm was first introduced by Volder for the computation
of trigonometric functions, multiplication, division and datatype conversion,
and later on generalized to hyperbolic functions by Walther. Two basic
CORDIC modes are known leading to the computation of different
functions, the rotation mode and the vectoring mode.
For both modes the algorithm can be realized as an iterative sequence of
additions /subtractions and shift operations, which are rotations by a fixed
rotation angle (sometimes called microrotations) but with variable rotation
direction.

INTRODUCTION:
The CORDIC algorithm is based on vector rotations to find an
approximation of a non-linear function. The main advantage with the
algorithm is that it is multiplier less. It uses additions and subtractions only.
The CORDIC is built with a number of stages. By increasing the number of
stages the accuracy is improved. The dotted vector is the vector with an
angle of which in this case the approximate cosine and sine values are
searched for.

THE ORIGINAL UNROLLED CORDIC :

A six stage CORDIC is chosen to demonstrate the methodology. However,
the methodology is valid for any number of stages. In the six adders at the
top, the remaining angle is computed for each stage. The input variable is
the angle for the cosine and sine that is searched for. At the top, the fixed
coefficient angle values for each rotation are provided. These are added or
subtracted from a in each stage. The coefficients are in this demonstration,
chosen to be 8-bit wide. The coefficients can be chosen with other bit
widths, but it is not important in this particular case when the complexity
reduction methodology is to be demonstrated. They are fixed coefficients
but they can be stored in a ROM as well.
In the middle and the lower adder rows the
approximation of the cosine and sine value is computed and provided to the
right. The initial vector value with x-axis and y-axis coordinates is provided
to the left, here (x = l/R, y = 0). In each stage new vectors are determined,
in order to converge towards the vector that approximates the vector that
represents the angle . In each vector rotation stage there is a crosswise
addition or subtraction of the vector coordinates. The vector rotations
depend on the sign bits (sgn), in each stage of the top row of adders. That
is, the sign bits determine if it should be an addition or subtraction. There
are also divisions of the vector coordinates by a factor corresponding to 2
where k is the integers {1, 2, 3, 4, 5, 6}. That is, division by 1, 2, 4, 8, 16,
and 32. That is, the right shifts as discussed in section II, which are done by
shifting the busses between the stages. There is thus no extra cost in
hardware for the divisions.
THE REDUCED COMPLEXITY CORDIC:
To reduce the complexity, stages in the architecture in Fig. 2can be
eliminated. Starting from the left, the first stage can be removed directly
since the x and y values are fixed. The reduced complexity CORDIC with
three stages eliminated is found below.