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Binary is not complicated. Once you learn how number systems work its pretty easy
to go from decimal to binary, back, to add binary numbers, multiply them and so on.
Theres one part of binary numbers that is not as striaght-forward, though, and that is
the representation of negative binary numbers.
Signed Magnitude
The simplest method to represent negative binary numbers is called Signed
Magnitude: you use the leftmost digit as a sign indication, and treat the remaining
bits as if they represented an unsigned integer. The convention is that if the leftmost
digit (also called the most significant digit or most significant bit) is 0 the number is
positive, if its 1 the number is negative. So:
00001010 = decimal 10
10001010 = decimal -10
That is why the range of positive numbers you can store in unsigned integers is
larger than signed ones. For example, most computers use a 32-bit architecture
these days, so integers will have 32 bits as well in C.
This means that an unsigned INT can go up to 4,294,967,296 (which is 2^32 1).
You need to subtract one because the result of 2^32 starts from 1, while the first
binary representation is 0.
Now if the INT is signed you wont be able to use the leftmost bit. This means that
your positive range will go up to 2,147,483,647 (which is 2^31 1). However you
also have the negative values, and they go up to -2,147,483,647.
The main problem with this system is that it doesnt support binary arithmetic (which
is what the computer would naturally do). That is, if you add 10 and -10 binary you
wont get 0 as a result.
00000011 (decimal 3)
+11111101 (decimal -2)
------------100000000 (decimal 256)
But since we have only 8 bits to represent the numbers, the leftmost 1 will be
discarded, and the result would be 00000000 (decimal +0).
This is not the answer we expected.
To fix the problem we just need to place the leftmost 1 (i.e., the carry) into the first
bit.
00000011 (decimal 3)
+11111101 (decimal -2)
------------00000000 (decimal +0)
+00000001 (the carry)
------------00000001 (decimal 1)
Works again!
This system was used by many computers at one point in time. For example, the
PDP-1 (DECs first computer) used it.
Twos Complement
The Twos Complement of a binary number is basically another number which, when
added to the original, will make all bits become zeroes. You find a twos complement
by first finding the ones complement, and then by adding 1 to it. If you think about it
it makes perfect sense. The ones complement, when added to the original number,
will produce a binary number with 1s on all the bits. Add 1 to that and youll cause an
overflow, setting every bit back to 0.
For example, lets find the twos complement of 12. The binary representation of 12
is 00001100. Its ones complement is 11110011. Add one to that and we have its
twos complement.
As you can see the result is correct, without the need to keep track/add the carry in
case of overflow. Additionally, the number zero has a single representation now:
0000000.
This means that the twos complement system pretty much solves all the binary
arithmetic problems, and that is why its used by most computers these days.
If you have a negative binary number under the twos complement system and want
to convert it to you digital you simply remove 1 from it and then find its ones
complement.
Say we have this number in binary: 10010101
Removing one it becomes 10010100. Its ones complement then is 01101011, which
is 107 in decimal. So the original number represented -107.
As I mentioned before this method has only one representation for the zero, which is
00000000. 11111111 (which was also zero under the ones complement system) will
now be -1. And 10000000 will now be -128, meaning we gained one more number in
the range.
That is, using the twos complement system the range of numbers will go from -2^(n1) up to +2^(n-1)-1. If we are using 8 bits this means that numbers will go from -128
up to 127.
Adder
In electronics, an adder or summer is a digital logic circuit that performs addition of
numbers. In many computers and other kinds of processors, adders are used not only in
thearithmetic logic units, but also in other parts of the processor, where they are used to
calculate addresses, table indices, increment and decrement operators, and similar
operations.
Although adders can be constructed for many numerical representations, such as binarycoded decimal or excess-3, the most common adders operate on binary numbers. In cases
where two's complement or ones' complement is being used to represent negative
numbers, it is trivial to modify an adder into an addersubtractor. Other signed number
representations require a more complex adder.
Half adder
Inputs Outputs
A
Full adder[edit]
Schematic symbol for a 1-bit full adder with Cin and Cout drawn on sides of block to
emphasize their use in a multi-bit adder
A full adder adds binary numbers and accounts for values carried in as well as out. A one-bit
full adder adds three one-bit numbers, often written as A, B, and Cin; A and B are the
operands, and Cin is a bit carried in from the previous less significant stage.[2] The full adder
is usually a component in a cascade of adders, which add 8, 16, 32, etc. bit binary numbers.
The circuit produces a two-bit output, output carry and sum typically represented by the
signals Cout and S, where
Inputs
Outputs
A B Cin Cout
0 0 0
1 0 0
0 1 0
1 1 0
0 0 1
1 0 1
0 1 1
1 1 1
A full adder can be implemented in many different ways such as with a custom transistorlevel circuit or composed of other gates. One example implementation is
with
and
In this implementation, the final OR gate before the carry-out output may be replaced by
an XOR gate without altering the resulting logic. Using only two types of gates is convenient
if the circuit is being implemented using simple IC chips which contain only one gate type
per chip.
A full adder can be constructed from two half adders by connecting A and B to the input of
one half adder, connecting the sum from that to an input to the second adder,
connecting Ci to the other input and OR the two carry outputs. The critical path of a full
adder runs through both XOR-gates and ends at the sum bit . Assumed that an XOR-gate
takes 3 delays to complete, the delay imposed by the critical path of a full adder is equal to
The carry-in must travel through n carry-generator blocks to have an effect on the carry-out
A design with alternating carry polarities and optimized AND-OR-Invert gates can be about
twice as fast.[3]
position, based on whether a carry is propagated through from a less significant bit position
(at least one input is a '1'), generated in that bit position (both inputs are '1'), or killed in
that bit position (both inputs are '0'). In most cases, P is simply the sum output of a half
adder and G is the carry output of the same adder. After P and G are generated the carries
for every bit position are created. Some advanced carry-lookahead architectures are
the Manchester carry chain, BrentKung adder, and theKoggeStone adder.
Some other multi-bit adder architectures break the adder into blocks. It is possible to vary
the length of these blocks based on thepropagation delay of the circuits to optimize
computation time. These block based adders include the carry-skip (or carry-bypass)
adderwhich will determine P and G values for each block rather than each bit, and the carry
select adder which pre-generates the sum and carry values for either possible carry input (0
or 1) to the block, using multiplexers to select the appropriate result when the carry bit is
known.
Other adder designs include the carry-select adder, conditional sum adder, carry-skip adder,
and carry-complete adder.
Lookahead carry unit[edit]
A 64-bit adder
By combining multiple carry lookahead adders even larger adders can be created. This can
be used at multiple levels to make even larger adders. For example, the following adder is a
64-bit adder that uses four 16-bit CLAs with two levels of LCUs
Carry-save adders[edit]
Main article: Carry-save adder
If an adding circuit is to compute the sum of three or more numbers it can be advantageous
to not propagate the carry result. Instead, three input adders are used, generating two
results: a sum and a carry. The sum and the carry may be fed into two inputs of the
subsequent 3-number adder without having to wait for propagation of a carry signal. After
all stages of addition, however, a conventional adder (such as the ripple carry or the
lookahead) must be used to combine the final sum and carry results.
3:2 compressors[edit]
We can view a full adder as a 3:2 lossy compressor: it sums three one-bit inputs, and returns
the result as a single two-bit number; that is, it maps 8 input values to 4 output values. Thus,
for example, a binary input of 101 results in an output of 1+0+1=10 (decimal number '2').
The carry-out represents bit one of the result, while the sum represents bit zero. Likewise, a
half adder can be used as a 2:2 lossy compressor, compressing four possible inputs into
three possible outputs.[citation needed]
Such compressors can be used to speed up the summation of three or more addends. If the
addends are exactly three, the layout is known as the carry-save adder. If the addends are
four or more, more than one layer of compressors is necessary and there are various
possible design for the circuit: the most common are Dadda and Wallace trees. This kind of
circuit is most notably used in multipliers, which is why these circuits are also known as
Dadda and Wallace multipliers.
Half subtractor
and not
since
.
This is an important distinction to make since subtraction itself is not commutative, but the
difference bit
is calculated using an XOR gate which is commutative.
The truth table for the half subtractor is:
Inputs Outputs
D Bout
Using the table above and a Karnaugh map, we find the following logic equations for
and
.
Full subtractor
The full subtractor is a combinational circuit which is used to perform subtraction of three
input bits: the minuend
, subtrahend
, and borrow in
. Thus,
subtrahend . Or in symbols:
. Like the half subtractor, the full subtractor
generates a borrow out when it needs to borrow from the next digit. Since we are
subtracting
by
and
, a borrow out needs to be generated when
. When a borrow out is generated, 2 is added in the current digit. (This is similar to the
subtraction algorithm in decimal. Instead of adding 2, we add 10 when we borrow.)
Therefore,
Outputs
X Y Bin D Bout
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1