Professional Documents
Culture Documents
Lab 2
Create the schematic and simulate the properties of an operational amplifier.
Some of the simulation setups are explained in the additional material:
"Simulation and Measurement of Op Amps" , which is available in the
workstation room or can be obtained from the assistant.
1. Differential amplifier
Figure 1 shows a twostage opamp with a differential amplifier used as the
first gain stage. First create just the differential amplifier with Cadence
Schematic Editor and create the Hspice netlist with Affirma. Use positive and
negative power supply voltages of VDD = 1.5 V and VSS = 1.5 V.
Find out the output resistance and the gain of the differential amplifier by
connecting one input to ground and the other to a voltage source. Run a
UTU/IT/JP/03
small signal transfer function analysis (see Lab1) and find out the output
resistance and the gain of the differential stage.
Output resistance = _________
Gain = __________
2. Operational Amplifier
Create the entire opamp schematic of Figure 1. Create a component symbol
for the opamp:
Design > Create Cellview > From Cellview...
Edit the symbol into the triangular form commonly used to represent an
opamp. Save the component and create a new schematic cellview to use as
a testbench for the opamp. Add the opamp to the cellview as symbol. Also
add input sources and power supply voltage source into the testbench
schematic.
You now have two different levels of hierarchy in your design, the
testbench schematic with a symbol level view of the opamp and the
schematic of the opamp itself. You can descend in the hierarchy to view or
edit your opamp schematic (or symbol) by selecting the opamp symbol and
then
Design > Hierarchy > Descend Edit...
To return to an upper level in the hierarchy select:
Design > Hierarchy >Return
UTU/IT/JP/03
UTU/IT/JP/03
UTU/IT/JP/03
UTU/IT/JP/03
8. Slew Rate
Connect the opamp again in the voltage follower configuration (Figure 8.54.)
and use the same 5 pF load capacitance as before. To measure the slew rate
and settling time of the opamp, you need a pulse input voltage. Create it with
a PWL (PieceWise Linear) voltage source:
Vname node1 node2 PWL time1 value1 time2 value2 time3 value3 ... R repeat TD delay
Create an input pulse with rise and fall times of 1 ns, a width of e.g. 1 s and
minimum and maximum values of 500 mV and +500 mV. The delay and
repeat times are not compulsory. Run a transient simulation and plot the
output voltage. To find the slew rate, use:
Measure > Point
in Avanwaves and determine the slope of the output as V/ s during the rise
and fall of the output voltage. The settling time is the time measured from the
point when the output starts to rise (or fall) to the point when the output has
settled within approximately 1 % of the final value.
Slew Rate (rise) = ___________V/ s
Slew Rate (fall) = ___________ V/ s
Settling Time = ___________ ns
UTU/IT/JP/03
UTU/IT/JP/03