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1.Bt u to mt project :
to mt project mi,khi to OrCad Capture v click File ->New->Project.Bn s
thy xut hin hp thoi sau

Browse ti th mc bn va to v t tn cho project.By gi bn c mt khng gian

trng cho project va to.Bn s thy mt ca s c dng nh sau :

2.To mt th vin linh kin

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OrCad cho php bn to mt th vin linh kin s
dng cho cc s .Th vin ny c lu nhng file
ring bit trong cc project. iu ny cho php bn s
dng li th vin trong cc project khc.
Ch :khi bn thay th mt linh kin trong thit k khng
nn thay i trc tip trn schematic m nn sa c tnh
ca linh kin trong th vin ri mi thay th vo s .
Trc tin chng ta phi to mt th vin mi.Click File>New->Library.Ca s project s xut hin ging nh
hnh bn.Click phi chut vo file library v chn Save
as... t tn cho file v a n vo th mc Lib (y
l folder do bn to ra cha file library).Bc tip theo
l chun b them linh kin vo th vin

3.To linh kin

thm mt linh kin mi vo th vin ,click phi chut vo file library v chn New
part.Mt hp thoi s hin ra nh sau :

Trong phn Name t tn cho linh kin.Trong Part Reference Prefix l loi linh
kin.Click OK mt ca s nh sau s xut hin :

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Cc cng c to linh kin nm pha phi mn hnh .Nu mun to linh kin c nhiu
chn th phi ko dn cc vin ngoi khong trng cho cc chn ny
S dng cng c Place Pin a cc chn vo linh kin

Lu : cc linh kin ny c to ra da vo datasheet

ca cc linh kin trn thc t (download trn internet
:datasheetarchive.com)
Cc mc nh v hnh dng (Shape) v loi (Type) ph
hp vi hu ht cc linh kin.Ngoi cc chn thng
thng c th a vo chn power v Groud (phi check
vo phn Pin Visible.)Thng thng chn power nn
pha trn v chn Groud nn pha di.Sau khi hon
thnh cc bc ta s c linh kin c dng nh sau :
Save li v ng ca s.C rt nhiu loi linh kin c
sn trong OrCad,bn c th s dng trc tip hoc sa li s chn mt cht cho ph
hp vi thit k ca mnh.
4.V s nguyn l
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Sau bc to th vin linh kin by gi bn sn sang cho vic v mt s nguyn
l.Bn c th nhn thy t ca s project l bn c mt trang schematic gi l Page1
trong folder Schematic1.Nu bn khng nhn thy th click vo du + cnh file
dsn.Nu s ca chng ta khng v trong mt trang th c th thm vo trang tip
theo (s dng nhiu trang ). thm mt trang schematic mi click phi chut vo folder
gc v chn New page.Sau mt hp hi thoi hin ra nhc bn t tn cho trang mi
ny. cho tin bn t tn theo chc nng ca s nguyn l,page 1 cng c th i
tn theo cch ny (right click and rename).
By gi tr li page 1 bng cch double-click trn ca s project.Trc khi ly linh kin
bn c th m rng trang so vi mc nh bng cch chn Options


Schematic Page
Properties...click vo custom v in gi tr mi vo (chng hn width=11,heigh=15)
4.1Ly linh kin v to lin kt
Click vo place part trn toolbar (thng pha mp phi ca mn hnh )S c
mt hp thoi hin ra cho php bn chn cc linh kin.

chn linh kin cn dng -> OK.

Trong lc v s nguyn l bn cng c th dng cc phm tt I,O phng to hoc
thu nh ca s.Khi mun thay i gi tr ca linh kin bn ch vic double-click ln n v

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sa.Sau khi ly xong linh kin ca s ca bn s c dng nh sau :

By gi chng ta cn to cc ng dy lin kt cc linh kin

vi nhau.Click place wire v ni cc linh kin li vi nhau.S
dng cc cng c Place bus v Place bus entry to cc ng bus.Sau khi thc hin
cc bc sau bn s c s c dng :

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Tip theo l vic thm ngun(power) v t(ground) cho mt s thnh phn trong s .
4.2 To lin kt cho cc trang v t tn cho cc net
Chng ta c th lm iu ny bng cch s dng cng c off-page connector.Click Place
Off-Page Connector. Off-page connector c lin kt bi mt tn chung. t
tn cho mt connector ch vic double-click vo n. t tn cho net ta click
vo cng c Place Net Alias. iu ny l v cng hu ch khi s nguyn l ca
bn phc tp v c s dng cc ng Bus.
5.Chun b cho vic thit k mch in :
5.1. i tn linh kin
Sau khi v xong s nguyn l,bn sn sng cho vic layout.T by gi bn s lm
vic c 2 ca s Capture v Layout.Bc u tin trong vic chun b layout l ghi
tn cho cc linh kin theo mt trt t nht nh. iu ny s rt c ch khi ta mun sp
xp linh kin mt cch hp l v gip cho vic tm kim linh kin c d dng
hn,khng nhng th n cn gip cho qu trnh t tn cc linh kin khng b trng
lp.Hai hnh sau s minh ho iu :

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Hierarchy View Before Annotation

Hierarchy View After Annotation

lm vic ny ta s dng mt s cng c Annotation.Trong ca s project, nh du

vo file ang thit k(vi ui m rng l dsn) sau chn Tool ->Annotate.Bn s
nhn thy hp thoi Annotate nh sau:

Trong mt thit k mi,nn i tn tt c cc linh kin . lm vic ny click vo

Reset part refernc to ? ->OK.Bn s c hi nu bn mun save vo thit k ca
bn trc khi tip tc bc tip theo.Tt c cc linh kin ca bn s c nh du hi
thay v nh s nh ban u.By gi,m li hp thoi Annotate v nh du vo
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Incremental reference update v click OK.Sau bc ny vi mi loi linh kin s c
nh s theo th t bt u t 1,cc linh kin ca bn c t tn theo mt quy lut
nht nh.
5.2. t tn cho cc net
Bc tip theo l t tn cho cc net trong s nguyn l.( iu ny th hin cc net
cc trang (pages) khc nhau c kt ni.)N rt gi tr trong sut qu trnh thit k v
debug bi v n gip ta theo di c cc net trong cc thit k ln (c nhiu trang khc
nhau).M hp thoi Annotate v chn Add intersheet references.S c mt hp thoi
tip theo m ra ->OK.
5.3.To th vin chn cho linh kin
By gi chng ta thc s sn sng cho vic thit k layout.Vic u tin cn lm l to
th vin chn cho linh kin s dng trong PCB layout.Vic to th vin chn cng
tng t nh vic to linh kin trong s nguyn l. bt u ta chn Tool->Library
Manager.Mt ca s s hin ra :

Cng cn lu rng trong th vin c sn ca OrCad c rt nhiu s chn ca cc

linh kin trn th trng.Bn ch nn to mt th vin mi khi thc s cn thit vi thit
k ca bn. to mt th vin mi bn cn tham kho datasheet ca chng c c
cc thng tin v cu trc cng nh c tnh ca cc linh kin.
Trong Library Manager click Create new footprint.Mt hp thoi s xut hin

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Bn cn t tn cho linh kin v chn h n v chun thit k.(C th chn theo h

mt hoc inch).Click OK.
Ch :khi chn h mt th ta cng phi i trong option ca thit k.Chn Option->
System setting thay i :

Sau khi thay i xong,click OK.

chnh sa c tnh ca chn linh kin,double-click vo n.Mt hp thoi Edit
padstack hin ra

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.
Ta c th i tn trong Padstack.Tip theo chn Undefined ->OK.Trong bng
Spreadsheet bn s thy

thit k cho tng lp ring l right-click ->Properties...

Sau khi to xong th vin chn,click Save as
Khi mi bt u to Library ta ch c 1 chn (Padstack). thm cc chn khc c mt
s cch nhng cch d nht l s dng footprint spreadsheet.Mt ch quan trng l
lun chn 1 to (0,0). to ra chn mi,click vo chn 1 trong spreadsheet v
Ctrl-C,hp thoi sau s m ra :

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N cho php bn in tn,to v ln ca chn cn to.Sau khi chnh sa xong click

OK.
Mc d to c cc chn tuy nhin bn vn cha hon thnh c footprint.Bn cn
to thm outline cho chng (outline ni nm na l xc nh v tr ca linh kin ny vi
cc linh kin khc trn bn mch in chng khng ln nhau). lm vic ny chng
ta s dng Obstacle tool.Right-click vo vng ca s lm vic,chn New.Rightclick again v chn Properties,hp thoi sau s xut hin:

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Trong Obstacle name :Chn tn.Cc thng s cn li chn nh hnh v.Ring vi

Height c th thay i.Click OK.Cui cng click chut tri vo cc gc ca linh kin
to outline.

5.4.Gn chn cho cc linh kin:

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Mi mt loi linh kin trong s nguyn l c mt loi footprint khc nhau.C mt vi
cch thc hin.Xin gii thiu mt cch :M Property Editor bng cch double-click ln
linh kin trong s nguyn l.N s hin ra tt c cc thuc tnh ca linh kin

Chn OrCad-Layout,bn c th nhn thy ct PCB footprint gn tn cho s chn

m bn va v.
By gi hy tng tng rng bn c hng trm linh kin trong s nguyn l.S rt
mt cng thc hin vi tng linh kin.He he,th cho nn phi lm kiu khc
thi.Trc tin ng ca s Property editor,nhn Ctrl-A trong trang s nguyn l
nh du tt c cc linh kin.Nhn Ctrl-E m tr li ca s Property editor.By gi
ch cn 1 ln l bn c th gn cc footprint cho cc linh kin.

5.5.Importing v Exporting cc thuc tnh (properties) ti v t s nguyn l

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export cc thuc tnh, ca s project explorer(ui m rng l dsn) chn Tool>Export Properties... Xut hin hp thoi:

Click OK.N s to ra trong th mc m bn va Browse mt file vi ui m rng l

exp.Chng ta c th chnh sa file ny v nhp (import) tr li Capture.Bn c th chnh
sa file bng mt chng trnh khc.Chng hn Microsoft Excel.
Khi ng Excel,chn File->Open... browse ti v tr ca file m bn va export trc
.

Click Next.Trong Text quanlifier chn None (rt quan trng,nu khng chn bn
khng th import tr li OrCad).->Click Finish.

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Bn c th sp xp li linh kin theo gi tr(Value) hay

tn(Part reference)...bng cch chn Data->Sort...
Vic sp xp ny s lm cho vic chn footprint c
thun tin hn. ct cui cng in tn cho footprint
tng ng vi tng loi linh kin.Ch in ng tn
vi footprint trong library
"Part Reference"
"C10"
"C11"
"C4"
"C5"
"C6"
"C7"
"C8"
"C9"
"C1"
"C2"
"C3"
"R2"
"R1"
"C12"
"D1"
"J2"
"J3"
"U1"
"Y1"
"J1"
"SW1"
"U2"
"U3"

"Value"
"0.1uF"
"0.1uF"
"0.1uF"
"0.1uF"
"0.1uF"
"0.1uF"
"0.1uF"
"0.1uF"
"100uF"
"10uF"
"10uF"
"150"
"1K"
"2.2uF"
"BLUE"
"CONN-2x10"
"CONN-2x3"
"MAX603/4"
"OSC 1MHz"
"PJ-002A"
"PUSHBUTTON"
"TIL311"
"XC9536-PLCC44"

"PCB Footprint"
"CAP-NP"
"CAP-NP"
"CAP-NP"
"CAP-NP"
"CAP-NP"
"CAP-NP"
"CAP-NP"
"CAP-NP"
"CE_RAD"
"CAP-POL100"
"CAP-POL100"
"RES-AXIAL"
"RES-AXIAL"
"CAP-POL100"
"LED"
"CONN-2x10"
"CONN-2x3"
"DIP-8"
"OSC"
"PJ-002A"
"PB"
"DIP-14"
"PLCC-44"

Save li. Excel s c mt vi cnh bo,k n -->OK!C mt bc nh m chng ta cn

lm trc khi import tr li OrCad.Trong qu trnh chnh sa trn Excel thay th cc
du nhy kp bng du nhy ba .V vy ta cn m file va to bng mt trnh son
tho bt k v thay th cc du bng .Save li.

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By gi bn c th Import file Properties tr li OrCad.Trong ca s Capture nh du
file thit k (trong phn Project explorer).Chn Tool->Import Properties...Browse
properties file v click OK.Nu c li xy ra th c th l do bn chn sai tn footprint
hoc thiu du nhy .Bn cn sa li chng trc khi tip tc.
5.6 Chn BOM (Bill of Material) vo s nguyn l
OrCad l mt ni tuyt vi lu tr thng tin v ni mua linh kin,ai to ra chng,gi
c... OrCad c th s dng cc thng tin ny t ng tnh ton gi ca sn phm
(BOM ;Bill of Material).BOM s gip bn trong vic t hng cc linh kin,n l iu c
bn cho nhng ngi lm mch.Sau y l mt vi thng tin khc m bn c th thy :
.Description m t cc linh kin.Thng c cung cp cc trang web ca nh
SX.
Manufacture:tn nh SX
Notes :cc thng tin ch v sn phm
PerUnitCost :Ga ca mt linh kin
Supplier :Nh cung cp
...
Export li cc thuc tnh ca thit k v in cc thng tin cho cc linh kin.Khi bn hon
thnh vic chnh sa cc thuc tnh,save li v Import chng vo Capture ging nh
lm vi footprint phn trn.By gi bn sn sng nhn BOM t OrCad.
lm iu ny,bn nh du vo phn file view trong ca s project.Chn Tool ->Bill
of Materials... hin ra hp thoi.

Bn c th chnh sa cc thng tin trong Header v Combined property string.Sau

nhn OK to ra file c ui m rng l BOM.
5.7 To file mu ca Board

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Bn hu nh sn sng chuyn t s nguyn l thnh Layout.Trc khi lm iu
bn cn to ra mt file board mu.File ny s nh ngha mt s c tnh mc nh cho
board m bn s dng layout. to n,bn khi ng Layout v chn File ->
New.Khi bn thy mt hp thoi hin ra th chn Cancel.Sau bn s thy hin ra mt
mn hnh trng trn (v en ngm)

Bn c th s dng cc phm tt zoom mn hnh (I,O,C).Trc ht ta cn to ra cc

ng bao (outline) xc nh chu vi ca board. to Board outline chn Obstacle
tool,right-click v chn New,right-click mt ln na v chn Properties.Trong Name :
t tn.Type :chn board outline,Width :nn chn 50 (mils) v n nn t Global
Layer.Gc u tin ca hnh ch nht nn chn to (0,0),sau v cc gc tip
theo.Ta c th theo di to thanh status pha di mn hnh.Sau khi hon thnh
Board outline ca bn s c dng nh sau .

Bc tip theo l sp xp li cc lp (layer).Layout cng c mt bng thuc tnh ging

nh trong Libraty Manager.Click View spreadsheet v chn layers.Bng ny s nh

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ngha tt c cc lp c trn board v chc nng tng ng ca chng trong thit k.

Chng hn ta thit k mch 4 lp th tc cc lp cn li v khng s dng n

chng.Double-click ln lp INNER1,mt hp thoi s hin ra:

Chn Unused Routing ->OK.Tip tc lm tng t vi cc lp tip theo.Cn lu vi

tng mch c th m ta xc nh dng lp no.Sau khi hon thnh ta ng bng ny
li.
Vic tip theo chng ta cn lm l thay i output setting cho file Gerber.Chn Option>Post process settings...Chn cc lp *.ASB v *.FAB.Right-click v chn Properties

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hin ra hp thoi Post process settings. B nh du Enable for Post processing

By gi chn tt c cc lp bng cch click vo gc trn bn tri ca bng thuc tnh

(spreadsheet) (Plot output filename) Right-click v chn Properties hin ra hp thoi
Post Process settings.Chn Extended Gerber . ng bng ny li khi hon thnh.
Tip theo bn s nh ngha kch thc ca l via.Click View Spreadsheet v chn
Padstacks.Trc tin bn s chnh kch thc ca VIA1 (n s tr thnh mc nh trong
thit k ca bn).Click vo VIA1 nh du.Right-click v chn Properties hin ra
hp thoi Edit padstack. nh du vo cc phn Undefined v Foot Planes/Pour >OK. Tip theo bn s thit lp thng s kch thc ca mi khoan. nh du Drill v
DRLDWG v m hp thoi Edit padstack. Chn hnh dng v kch thc ca n.Chn
cc lp Bottom,Top,INNER (ng knh thng thng khong 35 mils),Ground,Power
(50mils),SMTOP,SMBOT (40 mils).Chng ta ch s dng 1 loi via trong thit k
nhng OrCAD cho php ta c th nh ngha ti 16 loi l via khc nhau.
Khi mt netlist t Capture c nhp vo,chng ta c th thit lp rng mc nh v
tt c cc c tnh khc cho cc net c nhp.Click View Spreadsheet v chn
Nets,bn s nhn thy mt bng vi ch mt net l DEFAULT.Sau khi bn nhp netlist t
Capture s nhn thy tt c cc net thit k trong bng (spreadsheet).Double-click

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vo net hin ra hp thoi Edit Net.

Chn cc thng s nh hnh v.

iu cui cng chng ta cn lm l thit lp cc
khong cch.Nhng gi tr khong cch ny s
c s dng khi chng ta Layout mt cch t
ng kim tra li trong thit k.Chn Option ->
Global Spacing...s hin ra bng Route
Spacing.Click vo Layer Name nh du tt
c cc .Right-click v chn Properties hin
ra hp thoi Edit Spacing.Chn cc thng s
thch hp v click OK.By gi bn c mt
mu board chun cho thit k v sn sng cho
vic Layout.

5.8 To Netlist
Layout vic trc tin l bn phi to ra mt netlist.Netlist l mt file m tt c cc
thnh phn linh kin,cc chn v cc kt ni trong thit k mt nh dng m c th
c c bi Layout. to Netlist,chn file c ui m rng Dsn,Tool -> Create
Netlist...

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Click vo tab Layout ->OK. N s to ra cho bn mt file c ui m rng l .mnl.

6.Bt u Layout
6.1 To mt board mi
Chn File -> New. Bn s c nhc phi chn file board mu m bn to ra trc
v bn ch cn Browse n th mc m bn to ra..._> OK.Tip n l yu cu file
netlist (file c ui m rng l .mnl).Cui cng l t tn cho thit k v th mc save
thit k ca bn.
Nu tt c cc s chn trong th vin ph hp vi thit k th s khng c li xy ra v
bn s thy mt mn hnh nh sau :

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Thng thng nu c li xy ra th n s c lu trong mt file c ui m rng l .Lis.

Bn c th dng mt chng trnh son tho bt k c cc li xy ra trong file ny.
6.2 Sp xp linh kin
Tt c cc linh kin nn thnh mt hng pha tri ca Board.Trc khi sp xp nn
lm mt s bc nh sau vic sp xp tr nn d dng hn.
Trc tin l tt chc nng DRC (design Rule Checking).Tip theo l tt mt s
lp khng cn thit vic quan st c d dng hn.

Khi mt lp ang c m th bn c th bt tt n bng nt -

Mu sc trong s thay i th hin rng lp bn va chon c tt (invisible).

By gi chn cc lp sau v tt chng i SMTOP,SMBOT,ASTASB,DRD,DRL.

Click View Spreadsheet v chn Nets. Tt c cc net trong thit k s hin ra. nh du
tt c cc net,right-click v chn Properties. B nh du Routing Enabled -> OK.

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Sau khi hon tt cc bc chun b ta s bt u sp xp.Chn Component Tool.

Bn cng c th thm cc thnh phn khc (chng hn cc l bt vt (hole)) trong khi

ang thit k bng cch chn New -> Add Component ->Footprint v chn BUMPER
t th vin ->OK.Cc gc cn li lm tng t.

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Trong qu trnh thit k nu bn mun cc thnh phn ny b x dch th c th lm nh

sau :chn tt c cc thnh phn,right-click v chn Properties s hin ra hp thoi Edit
Component.

B du cc Non-electric,Route Enabled v nh du vo Fixed,clocked -> OK.

Cui cng bn s c :

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By gi n vic sp xp linh kin.Bn c l mun in s nguyn l xem cc linh

kin lin kt vi nhau nh th no.Khi bn click vo mt linh kin no th cc lin kt
vi cc linh kin khc s hin ra.Trong khi sp xp linh kin c th bn mun c cc
mng li d xc nh v tr.Chn Option -> System setting ->Place Grid (thng
thng chn gi tr l 50).Sau khi sp xp board ca bn s c dng :

Save li ->OK
6.3 i dy cho phn Power,ground v ng (Copper pour)
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Trong bt k thit k no,tt nht l nn i dy phn power v ground trc.M
nets spreadsheet tm net GND,double-click m hp thoi Edit net,click Net
layers..., di phn Plane Layer, nh du vo GND. Lm tng t i vi
Power (Thng l Vcc).Sau khi chnh xong click Refresh All. quan st cc
phn ny ta c th chon Backspace -> 3 (hin th lp Ground).

Lm tng t vi Power. hin li ton b thit k ->F5

ng ta chn Obstacle Tool,right-click vo mn hnh v chn New >properties ->hin ra hp thoi Edit Obstacle.Trong phn Obstacle type chn
Copper pour. Trong Net attackment l phn m bn mun lin kt (VD
Ground or Power)->OK.V mt khung hnh ch nht xung quanh cc linh kin >right-click ->end command.
OrCad cng c mt cng c gip bn kim tra li qu trnh thit k.Click View
spreadsheets ->Statistics.

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6.4 i dy cc phn khc

M net spreadsheet v chn tt c cc net.Right-click v chn Enable <-> Disable
lm hin hay n cc net.Trc khi i dy nn chnh li mt s thit lp.M System
setting-> Visible Grid =10,Routing Grid = 5,Via Grid =0.Chn Option ->User
Prefrences v chn Allow DRC errors di phn Global references
Click vo biu tng v to cc kt ni.Bt Edit Segment Mode hoc
Edit/Add Route Mode.Left vo cc connection v bt u i dy.

Sau khi i dy xong,board ca bn s c nh sau :

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Ph ! n y l xong ri y !Tt nhin y ch l nhng iu c bn. lm

c mt bn mch in p th cn cn nhiu yu t khc.Chc cc bn thnh cng
! Nu c g cn tho lun th c th reply li chng ta s cng trao i ! He he.

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