EM Lab H Bch Khoa H Ni/ 2012

HNG DN C BN ORCAD CAPTURE 16.5

I.

To th vin linh kin mi trong Capture

Khi ng Orcad Capture 16.5, vo Start All programs Cadence Release 16.5 Orcad Capture Chn File New Library, ca s qun l m ra vi tn th vin mc nh l library1 (2,3,4) Chn File Save as lu th vin vi tn ty chn v th mc cha th vin, gi s t tn th vin l my_library v lu vo th mc C:\orcad_library Ta c ca s lm vic nh hnh v:

Trong ca s qun l th vin capture, click chut phi chn New Part to mt linh kin mi
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EM Lab H Bch Khoa H Ni/ 2012

Trong hp thoi m ra t tn cho linh kin ti mc Name, gi s y to linh kin capture cho TPS2141 Trong mc Part Reference Prefix chn kiu linh kin, TPS2141 l mt loi IC nn nh kiu l U, ngoi ta c th l CON, Y vi cc mi ni,

Khi tao ra linh kin, ta s thy n c mt ng bao ngoi vi nt t. Kiu linh kin c ghi pha trn l U? v gi tr ca linh kin l <Value> c ghi pha di

EM Lab H Bch Khoa H Ni/ 2012

y, xt v d to linh kin capture cho IC TPS2141, trc tin chng ta cn c Datasheet ca TPS2141 (vo google tm v down v my) TPS2141 c dng ch nht v gm c 14 chn

Lu i vi vic to linh kin trong Capture, cc chn linh kin c th sp xp ty sao cho thun li khi v schematic (khc vi to footprint) Tr li ca s thit k pha trn, trc ht ta to cc chn cho linh kin t chn 1 n chn 7. C th chn Place Pin to tng chn mt, nhng nn to nhiu chn cng lc cho nhanh bng cch chn Place Pin Array, ca s mi hin ra:

EM Lab H Bch Khoa H Ni/ 2012

Trong mc Starting Name v Starting Number chn tn v s ca chn bt u (1) Trong mc Number of Pins chn s chn mun to (7) Trong mc Increment chn hiu gi tr gia mt chn bt k v chn lin trc n (1) Trong mc Pin Spacing chn khong cch gia cc chn (1) Trong mc Shape, chn hnh dng ca chn, y chn Line (dng ng thng) Trong mc Type chn kiu chn: u vo, u ra, nng lng, (chn mc nh, s xt c th sau)

Click chut ln lt vo bn tri v bn phi ca ng bao linh kin (hnh nt t) nh hnh v t cc chn

Tip theo ta sa tn, s, kiu, dng cho tng chn linh kin theo Datasheet, click p chut vo tng chn v sa li cc thng s ny. V d: sa tn chn s 1 l SW_PG. Lu ta c cc kiu chn cho linh kin, v d: Passive (kiu chn bt k), Power (chn ngun), Input (chn u vo), .i vi chn Power ta tch vo Pins Visible chn hin th chn ln s nguyn l (chn kiu Power cho php t nhiu chn c tn ging nhau)

EM Lab H Bch Khoa H Ni/ 2012

V ng bao linh kin, vo Place Rectangle, click v ko chut khoanh ln ng nt t, sau c th thay i kch thc ng bao bng cch click chn mi gc ng bao v ko r chut Linh kin to xong nh hnh v bn, chn File Save lu l i

Nhn vo cy th mc qun l ca th vin my_library, chng ta c th thy tn linh kin tps2141 va to, c th d dng xa, sa, sao chp

II.
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V s nguyn l
Chn File New Project, hp thoi New Project m ra, t tn cho project, y l project1, nhn Browse Create Directory to th mc my_schematic trong C v lu project vo OK
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EM Lab H Bch Khoa H Ni/ 2012

Tip theo hp thoi PCB Project Wizard m ra, hin ti chng ta cha thc hin m phng nn b khng check vo Enable project simulation Next, ti y ta chn mt s th vin thm vo project ca s bn tri, nhn Add Finish, y ta thm th vin Discrete.olb vo project

Ca s thit k Schematic hin ra, bao gm cy th mc qun l project v page 1 l trang thit k u tin t ng m ra, nu cc ng li b tt chn View Grid bt ch li
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EM Lab H Bch Khoa H Ni/ 2012

Phng to ca s thit k Page 1, chn Place Part m ca s cc th vin v linh kin capture bn phi giao din chng trnh nh hnh v.

Trc ht ta chn kh giy v thit lp cc thng s ban u cho bn v, chn Options Schematic Page Properties, hp thoi sau m ra:
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EM Lab H Bch Khoa H Ni/ 2012

Ta chn kh giy, n v thit k (Inches hoc Milimeters) trong tab Page Size Thit lp cc thng s cho ng li tab Grid Reference Sau khi thit lp xong nhn OK

thm cc th vin vo project, trong tab Libraries pha bn phi giao din, nhn biu tng (hoc nhn t hp Alt+A), ta chn cc th vin cn thm t b th vin c sn ca Orcad Capture hoc tm ng dn n th vin ta t to, sau nhn Open thm th vin. Nh hnh v ta thm th vin ATOD.olb c sn vo project

EM Lab H Bch Khoa H Ni/ 2012

Mun ly linh kin t th vin no, ta click chut chn th vin trong danh sch ca tab Libraries, trn tab Part List hin ra danh sch cc linh kin c trong th vin (c th bi en ton b th vin hin tt c cc linh kin c th thm vo project) Click p chut vo linh kin cn dung, r chut ra bn v, click chut tri vo v tr cn t linh kin sau click chut phi End Module (hoc nhn phm Esc ). Ta cng c th click chut vo nhiu v tr trong bn v thm nhiu linh kin ging nhau Nh hnh v ta thm 3 in tr (Resistor) t th vin Descrete vo bn thit k

Sau khi t y cc linh kin cn dng vo bn v, chng ta ni mch li vi nhau ni cc ng mch, chn Place Wire, bm chut tri vo chn linh kin ny, v ni vo chn linh kin khc. Ngoi ra cng c th ni dy ni t chn linh kin vo mt ng dy ni c sn, hoc ni gia cc chn linh kin vi nhau bn v c p v thun li khi thit k ta c th click chut vo linh kin v di chuyn n v tr thch hp, c th khoanh chn linh kin, click chut phi v c cc ty chn xoay, lt linh kin,

EM Lab H Bch Khoa H Ni/ 2012

Cc chn linh kin no khng ni dy mch, ta phi nh du X vo chn linh kin , i vi cc chn linh kin no ni vi ngun hoc t, ta cng phi gn ngun v t vo cho chng

thm chn ngun, vo Place Power, trong ca s Symbol bn tri chn dng chn ngun thch h p Tng t vo Place Ground thm chn t Vo Place No connect nh du X vo cc chn khng ni dy mch

Ta c hnh nh minh ha ca mt s mch nguyn l nh hnh v (dng n gin v ch mang tnh minh ha cho cc kt ni)

III.

Mt s cng c nng cao

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EM Lab H Bch Khoa H Ni/ 2012 1. t tn cho cc ng dy ( Naming nets)

Trong s nguyn l, ta c th t tn cho cc ng dy, c bit l cc ng dy quan trng. Cc ng dy c t cng tn s t ng kt ni vi nhau. iu ny tht s hu ch i vi cc s nguyn l phc tp c nhiu kt ni v cng rt thun tin khi layout Chn Place Net Alias, hp thoi Place Net Alias m ra:

Trong mc Alias t tn cho kt ni (v d tn l net1), ngoi ra c th ty chnh cc thng s v mu sc, font ch, sau nhn OK Click chut ln mt ng dy mun t tn, sau lm tng t vi cc ng dy mun kt ni vi ng dy (t tn ging nhau), nh vy ta to xong kt ni gia cc ng dy

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EM Lab H Bch Khoa H Ni/ 2012

Ta c th thy cc ng dy c t tn chung l net1, cc ng dy ny s t ng kt ni vi nhau khi layout

2. Lin kt gia cc trang

Dng cng c off-pages connector ta c th lin kt 2 hoc nhiu trang trong mt project (i vi cc d n ln phi thit k trn nhiu trang schematic) Chn Place Off-Page Connector

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EM Lab H Bch Khoa H Ni/ 2012

Trong hp thoi m ra, ti ca s Symbol bn tri, ta chn kiu kt ni thch hp OFFPAGELEFT-L hoc OFPAGERIGHT-R (bn tri hoc bn phi), nhp OK ri t ln bn v ging nh t cc linh kin. Chn Place Line lin kt cc kt ni ny vi cc chn linh kin hoc cc ng dy. Cc chn linh kin, cc ng dy trong cng mt trang hoc trn nhiu trang nu c lin kt vi cc off-page connector cng tn th chng s c lin kt vi nhau

Click p chut vo offpage connector, ti mc Value, ta i tn cho kt ni, gi s ta t tn l multi net

Ta thy trn hnh v, 2 ng dy ca PAGE1 c kt ni vi nhau v kt ni vi chn 1 ca IC trong PAGE2 thng qua kt ni multi net. Nh vy ta c 2 trang PAGE1 v PAGE2 trong cng 1 project (project 1) c lin kt vi nhau

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