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# EE 4722 Power Systems Analysis Lab

Experiment 2

Austin Esau

2a.
Problem: Model a single-phace circuit with a voltage source of 60 Hz
supplying a series R-L load, with impedance 1030 . Voltage phasor is
132.70 kV(rms).
Plot vs(t), is(t), the instantaneous power p(t) = vs(t)*is(t) and the average power P.
Procedure: Assemble the circuit in PSCAD as shown, making sure to keep the source
resistance at zero and adding the voltage and current nets to the circuit. To acquire
instantaneous power, use a multiplication block. To get average power, perform a low
pass filter using the G/(1+sT) block.

## Figure 1: Schematic including multiplier and low pass filter blocks.

Results:

Figure 2:

Voltage,
current, instantaneous and average power

The results show that there is a phase difference between the voltage and the current
within this circuit. By looking at the average power, we can see that the power will rise
to a final value over time. The out of phase current and voltage means that power
output will not be optimal! This brings up the next problem.
2b.
Problem: Calculate a capacitive reactance in parallel with the load to bring the overall
power factor to unity. Plot vs(t), is(t), p(t) and the average power P delivered to the load.
Procedure:
This is a relatively simple calculation. Since the imaginary part of the existing load will
be jL, the parallel resistance equation must be used to determine the required
capacitance to cancel out the inductance in the inductive leg of the parallel combination.
This turns out to be 132.6uF.
Results:

## Figure 3: In sync Voltage and Phase with corrected PF

After introducing this capacitor, the instantaneous power reaches a slightly lower peak
value, but the average powers are the same between the two trials. Current and
voltage are in phase, as is noticeable in the lower graph.
3a.
Problem: Replicating the measurements in part one, construct a 3 phase circuit with
the load on each line being the same as it was in the single phase diagram. In addition,
measure the power delivered in each phase and the sum of the power in each leg.

Figure 4: Schematic showing the PF correction in part 3B and the power adder blocks
Procedure: Replace the single phase voltage generator with a 3 phase generator and
add voltage and current measurements for each other phase. Replicate the loads and
connect them to a common ground that returns to the neutral terminal of the 3 phase
generator.
Multiply current and voltage to get individual phase power, and add them all together at
once to get the instantaneous power. Apply the low pass filter block to get the average
power.

Figure 5: Top to bottom: voltage and current through phase A, phase power for each
and the summed power Ps(t)
Results: As expected and explained in class, the phases of power in each load are
perfectly 120 degrees out of phase with each other producing a very stable total power

delivery to the load. Additionally, the charging time for this circuit is significantly smaller
than the single phase circuit.

3b.
Problem: Finally, using the capacitance calculated for part 2b, observe the changes to
va(t), ia(t), p(t) and P delivered to the load.
Procedure: Add capacitors in parallel with the load. Calculate the same parameters as
were found in part 2b in phase A. Very little changes from the first part of this problem.

Figure 6: In phase voltage and current in phase A. Lower Graph shows average power
and the summed power of the entire load.
Results: An error was made when taking measurements and the average power was
taken, not the power in the single load. It would be expected to be exactly the same as

the instantaneous power from part 2b, however, since a single phase in a 3 phase
system is no different from the single phase like the one depicted in part 2.
However, as was expected, the voltage and current in each leg will now be in sync.
Now nearly all power delivered to the load will be real power, and apparent power will
be eliminated.