1

DIPARTIMENTO DI ELETTRONICA
E INFORMAZIONE

Wide Bandwidth 90 Degrees

Phase Shifter for Lock-in
Amplifiers
Marco Vergani Davide Bianchi
Advising Professor: Giorgio Ferrari
Analog Design Contest - Texas Instruments - 13/11/2012

90 Phase shifter for lock-in Amplifiers

IMPEDANCE MEASUREMENTS
BIO-APPLICATIONS

REFERENCE
cos(t )

INPUT
SIGNAL

MATERIAL SCIENCE

A
cos(t )
2

A
cos( )
2

DC OUTPUT
x

A
sin( )
2

OPTICS

From Hz to MHz
frequency span

90 shifter

r
90 shifte

Typical architecture: local oscillator required

Analog Design Contest - Texas Instruments - 13/11/2012

90 Phase Shifter Concept

Precise 90 delay
Single-pole filter

Amplitude Recovering
Variable Gain Amplifier

AIN

VIN

VOUT
VGA

Vg
Signal
processing

Negative feedback loop

Analog Design Contest - Texas Instruments - 13/11/2012

AIN

90 Phase Shifter Concept

Phase shift
Vout

VGA
Vg
Cint

Rint

Positive
peak
extraction

Negative
peak
extraction

Vin

90
Single pole
circuit

Specifications
90 shift
Output amplitude
independent to
frequency

Rint

Proposed Solution
Precise 90 delay through single pole network
Input and output amplitude matching through a Variable
Gain Amplifier and a DC negative feedback
Analog Design Contest - Texas Instruments - 13/11/2012

Quasi-peak detector configuration

Vout

Rint

Cint
+

Vin

Rint

Asynchronous peak sampling and discharge

VGA

Vg

ripple on Vg

Harmonic distortion increasing at low frequency

Analog Design Contest - Texas Instruments - 13/11/2012

Synchronous peak comparison

Vout

Rint

Cint
-

Vin

Rint

Asynchronous peak sampling

Synchronous discharge
NO RIPPLE TO BE FILTERED
Analog Design Contest - Texas Instruments - 13/11/2012

NO RIPPLE
at any
Vg frequency

90 Phase Shifter architecture

OPA4354
TLC3704
LMH6503
C
V

1
+

Phase
shift

C
V

C
V

Vout
1

x1

+5V

Close

2
SW1

Close

SW2

Rint

Rint

SW3

Open

Close
Open

Close
Open

x1

Cint

Open
Close

Close

C
V

C
V

Vg

Open

Vout

90
Vin

Time

Open

C
V

2
-

Vin

Vin

VGA

Vout

Wide bandwith CMOS OTA amplifiers

Logic 5V push-pull linear comparators
Linear VGA amplifier

3 ICs

CS1

Open

Analog Design Contest - Texas Instruments - 13/11/2012

SW4

VA

VB

CS2

Experimental Results & Outlook

4 decades frequency span: 30Hz -300kHz

Leakage from the switches

Switches speed

Phase Error < 3

Amplitude precision limited by mismatched
charge injection of the discrete MOSFETs
switches.

Designing of a
complete IC
embedded lock-in

Reference

Input

Analog Design Contest - Texas Instruments - 13/11/2012

90 shifter

DC Real
OUT
DC Imaginary
OUT

Thank you for the attention

Analog Design Contest - Texas Instruments - 13/11/2012

Amplitude error

10

VB
Rint

Cint

Vout
-

VA

Vin

Analog Design Contest - Texas Instruments - 13/11/2012

Rint

Vg

Digital signal generation

11

Vin

Time
Required to control the switches (discrete MOSFETs)
No external clock required: synchronous with the input signal

Vout

Vout
Vin

Time

Open
Time

Vout
21

R
+5V

Squared input sinusoids

Logic elaboration
Analog Design Contest - Texas Instruments - 13/11/2012

312

23

Vin

Open

Close
Close
Open
Open
Open
Close
Close
Close
Close
Open
Open
Close
Close Open
Open
Open
Close
Close
Open
Open
Close
Close
Open
Open
Close CloseClose
Close
Open Open
Close

Vout
1
Vin

Open

OpenOpen
Close