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General Description Features: Full-Featured High-Or Low-Side MOSFET Driver Not Recommended For New Designs
General Description Features: Full-Featured High-Or Low-Side MOSFET Driver Not Recommended For New Designs
Micrel
MIC5010
Full-Featured High- or Low-Side MOSFET Driver
Not Recommended for New Designs
General Description
Features
7V to 32V operation
Less than 1A standby current in the OFF state
Internal charge pump to drive the gate of an N-channel
power FET above supply
Available in small outline SOIC packages
Internal zener clamp for gate protection
25s typical turn-on time to 50% gate overdrive
Programmable over-current sensing
Dynamic current threshold for high in-rush loads
Fault output pin indicates current faults
Implements high- or low-side switches
Applications
Typical Application
RTH
20k
Ordering Information
MIC5010
Control Input
Lamp drivers
Relay and solenoid drivers
Heater switching
Power bus switching
Motion control
Half or full H-bridge drivers
1 Inhibit
2 NC
Fault 14
V+ 13
3 Input
4 Thresh
NC
5 Sense
6 Source
7 Gnd
12
C1 11
Com 10
Temperature Range
MIC5010BN
40C to +85C
Package
MIC5010BM
40C to +85C
14-pin SOIC
V+ =24V
+
10F
R =
S
C2 9
Gate 8
SR( V
TRIP
R IL ( V
+100mV)
TRIP
IRCZ44
(S=2590,
R=11m)
SENSE
RS
+100mV)
V+SRRS
R1=
100mV (SR+R S)
SOURCE
43
Note: The MIC5010 is ESD sensitive.
Part Number
R TH =
2200
1000
TRIP
LOAD
KELVIN
R1
4.3k
TRIP
=100mV
April 1998
5-87
This datasheet has been downloaded from http://www.digchip.com at this page
MIC5010
Micrel
Power Dissipation
JA (Plastic DIP)
JA (SOIC)
Ambient Temperature: B version
Storage Temperature
Lead Temperature
(Soldering, 10 seconds)
Supply Voltage (V+), Pin 13
1V to V+
10V to V+
0.5 to +5V
10V to V+
10V to V+
50 mA
1V to 50V
0.5V to 36V
1mA to +1mA
150C
1.56W
80 C/W
115C/W
40C to +85C
65C to +150C
260C
7V to 32V high side
7V to 15V low side
Pin Name
Pin Function
Inhibit
Input
Resets current sense latch and turns on power MOSFET when taken above
threshold (3.5V typical). Pin 3 requires <1A to switch.
Threshold
VTRIP =
2200
R TH +1000
where RTH to ground is 3.3k to 20k. Adding capacitor CTH increases the
trip voltage at turn-on to 2V. Use CTH =10F for a 10mS turn-on time
constant.
5
Sense
The sense pin causes the current sense to trip when VSENSE is VTRIP above
VSOURCE. Pin 5 is used in conjunction with a current shunt in the source of
a 3 lead FET or a resistor RS in the sense lead of a current sensing FET.
Source
Reference for the current sense voltage on pin 5 and return for the gate
clamp zener. Connect to the load side of current shunt or kelvin lead of
current sensing FET. Pins 5 and 6 can safely swing to 10V when turning
off inductive loads.
Ground
Gate
Drives and clamps the gate of the power FET. Pin 8 will be clamped to
approximately 0.7V by an internal diode when turning off inductive loads.
9, 10, 11
C2, Com, C1
Optional 1nF capacitors reduce gate turn-on time; C2 has dominant effect.
13
V+
14
Fault
Outputs status of protection circuit when pin 3 is high. Fault low indicates
normal operation; fault high indicates current sense tripped.
Pin Configuration
MIC5010
1
2
3
4
5
6
7
Inhibit Fault
NC
V+
Input
NC
Thresh
C1
Sense Com
Source
Gnd
C2
Gate
5-88
14
13
12
11
10
9
8
April 1998
MIC5010
Micrel
Electrical Characteristics (Note 3) Test circuit. TA = 55C to +125C, V+ = 15V, V1 = 0 V, I4 = I5 = I14 = 0, all
switches open, unless otherwise specified.
Parameter
Conditions
V+
V+
= 32V
Min
VIN = 0V, S4 closed
VIN = VS = 32V, I4 = 200A
V+
Logic Input Current, I3
= 4.75V
= 15V
V+ = 32V
Typical
Max
Units
0.1
10
20
mA
4.5
5.0
VIN = 0V
VIN = 32V
Input Capacitance
Gate Drive, VGATE
Zener Clamp,
Pin 3
pF
13
15
24
27
V+ = 15V, VS = 15V
11
12.5
15
V+
11
13
16
S1, S2 closed,
V+
= 7V, I8 = 0
VS = V+, VIN = 5V
V+
= 15V, I8 = 100 A
S2 closed, VIN = 5V
VGATE VSOURCE
= 32V, VS = 32V
25
50
10
I4 = 200 A
1.7
2.2
V+
= 7V,
S4 closed
75
105
135
mV
VSENSE VSOURCE
Increase I5
I4 = 100 A
VS = 4.9V
70
100
130
mV
V+ = 15V
S4 closed
150
210
270
mV
I4 = 200 A
VS = 11.8V
140
200
260
mV
V+
VS = 0V
360
520
680
mV
VS = 25.5V
350
500
650
mV
1.6
2.1
= 32V
I4 = 500 A
Peak Current Trip Voltage,
VSENSE VSOURCE
S3, S4 closed,
V+ = 15V, VIN = 5V
0.4
14
V
1
14.6
7.5
V
V
13
V
V
Note 1
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its specified Operating Ratings.
Note 2
Note 3
Minimum and maximum Electrical Characteristics are 100% tested at TA = 25C and TA = 85C, and 100% guaranteed over the entire
range. Typicals are characterized at 25C and represent the most likely parametric norm.
Note 4
Test conditions reflect worst case high-side driver performance. Low-side and bootstrapped topologies are significantly fastersee
Applications Information.
April 1998
5-89
MIC5010
Micrel
Test Circuit
V+
+ 1F
I5
MIC5010
V1
1
2
3
4
V3
50
5
6
500
1W
S3 I4
3.5k
Inhibit Fault
NC
V+
Input
NC
Thresh
C1
Sense Com
Source
Gnd
C2
Gate
14
13
I14
12
11
1nF
10
1nF
9
8
1nF
S4
S2
S1
I8
VS
Typical Characteristics
DC Gate Voltage
above Supply
12
14
10
12
VGATE V+ (V)
Supply Current
8
6
4
2
0
10
8
6
4
2
0
10
15
20
25
30
35
12
15
5-90
April 1998
MIC5010
Micrel
350
140
300
120
CGATE =1 nF
250
200
150
100
50
C2=1 nF
80
60
40
20
12
15
12
15
3.5
1.4
3.0
1.2
CGATE =10 nF
2.5
2.0
1.5
1.0
0.5
3
12
0.6
0.4
0.2
0
250
VGATE =V+
200
150
VGATE =V++5V
100
50
VS=V +5V
0
5
10
15
20
25
12
15
Charge Pump
Output Current
1.0
VGATE =V+
0.8
0.6
0.4
VGATE =V ++5V
0.2
C2=1 nF
VS=V +5V
0
0
30
Charge Pump
Output Current
C2=1 nF
0.8
15
CGATE =10 nF
1.0
0
0
April 1998
CGATE =1 nF
100
10
15
20
25
5-91
30
MIC5010
Micrel
Turn-off Time
TURN-OFF TIME (S)
50
CGATE =10 nF
40
30
20
CGATE =1 nF
10
0
0
12
2.0
1.75
1.5
1.25
1.0
0.75
0.5
15
25
50
1000
300
CGATE =10 nF
100
30
10
75
100 125
1000
25
CGATE =1 nF
3
1
C2=1 nF
300
CGATE =10 nF
100
30
10
CGATE =1 nF
3
1
12
15
3000
CGATE =10 nF
1000
300
100
CGATE =1 nF
10
3
0
12
12
15
3000
30
1000
CGATE =10 nF
300
100
30
CGATE =1 nF
10
3
0
15
C2=1 nF
12
15
5-92
April 1998
MIC5010
Micrel
A resistor RTH from pin 4 to ground sets I4, and hence VTRIP.
An additional capacitor CTH from pin 4 to ground creates a
higher trip voltage at turn-on, which is necessary to prevent
high in-rush current loads such as lamps or capacitors from
false-tripping the current sense.
When the current sense has tripped, the fault pin 14 will be
high as long as the input pin 3 remains high. However, when
the input is low the fault pin will also be low.
Applications Information
Functional Description (Refer to Block Diagram)
The various MIC5010 functions are controlled via a logic
block connected to the input pin 3. When the input is low all
functions are turned off for low standby current, and the gate
of the power MOSFET is also held low through 500 to an
N-channel switch. When the input is taken above the turnon threshold (3.5V typical), the N-channel switch turns off
and the charge pump is turned on to charge the gate of the
power FET. A bandgap type voltage regulator is also turned
on which biases the current sense circuitry.
The charge pump incorporates a 100kHz oscillator and onchip pump capacitors capable of charging 1 nF to 5V above
supply in 60S typical. With the addition of 1nF capacitors
at C1 and C2, the turn-on time is reduced to 25S typical.
The charge pump is capable of pumping thegate up to over
twice the supply voltage. For this reason a zener clamp
(12.5V typical) is provided between the gate pin 8 and the
source pin 6 to prevent exceeding the VGS rating of the
MOSFET at high supplies.
The current sense operates by comparing the sense voltage at pin 5 to an offset version of the source voltage at pin
6. Current I4 flowing in threshold pin 4 is mirrored and
returned to the source via a 1k resistor to set the offset or
trip voltage. When (VSENSE VSOURCE) exceeds VTRIP , the
current sense trips and sets the current sense latch to turn
off the power FET. An integrating comparator is used to
reduce sensitivity to spikes on pin 5. The latch is reset to turn
the FET back on by recycling the input pin 3 low and then
high again.
Construction Hints
High current pulse circuits demand equipment and assembly techniques that are more stringent than normal, low
current lab practices. The following are the sources of
common pitfalls encountered while prototyping:Supplies:
many bench power supplies have poor transient response.
Circuits that are being pulse tested, or those that operate by
pulse-width modulation will produce strange results when
used with a supply that has poor ripple rejection, or a
peaked transient response. Monitor the power supply voltage that appears at the drain of a high-side driver (or the
supply side of the load in a low-side driver) with an oscilloscope. It is not uncommon to find bench power supplies in
the 1kW class that overshoot or undershoot by as much as
50% when pulse loaded. Not only will the load current and
voltage measurements be affected, but it is possible to
over-stress various componentsespecially electrolytic
capacitorswith possibly catastrophic results. A 10F supply bypass capacitor at the chip is recommended.
Block Diagram
V+
13
C1 Com C2
11 10 9
CHARGE
PUMP
8 Gate
500
Input 3
LOGIC
V+
CURRENT
SENSE
LATCH
Fault 14
MIC5010
5 Sense
I4
-
TEMP
SENSE
+
VTRIP
V. REG
1k
7
Ground
April 1998
12.5V
1
Inhibit
5-93
4
Threshold
1k
6 Source
MIC5010
Micrel
V+=7 to 15V
VLOAD
MIC5010
1 Inhibit
2 NC
Control Input
RTH
10k
Fault 14
V+ 13
3 Input
NC 12
4 Thresh
C1 11
5 Sense
Com 10
6 Source
C2 9
7 Gnd
RS=
+
10F
RTH =
LOAD
TRIP
2200
1000
TRIP
Gate 8
IRF540
RS
10m
IRC 4LPW-5
(International Resistive Company)
5-94
April 1998
MIC5010
Micrel
MIC5010
Control Input
TH
20k
1 Inhibit
2 NC
Fault 14
V+ 13
3 Input
4 Thresh
NC
5 Sense
6 Source
7 Gnd
R1=
V+
1mA
12
R2=100
10F
C1 11
Com 10
RS =
C2 9
Gate 8
IRF541
RTH =
TRIP
IL
2200
1000
TRIP
100
RS
18m
IRC 4LPW-5*
R2
100mV+V
R1
24k
LOAD
April 1998
5-95
MIC5010
Micrel
Control Input
R TH
20k
2 NC
3 Input
+
V =15V
LOAD
Fault 14
V+ 13
NC 12
4 Thresh
C1 11
5 Sense
Com 10
RS =
+
10F
SR V
TRIP
R I V
L
R TH=
LOAD
TRIP
2200
1000
TRIP
6 Source
C2 9
7 Gnd
Gate 8
IRCZ44
(S=2590,
R=11m)
SENSE
TRIP
RS
22
=100mV
SOURCE
KELVIN
by the lamp. RTH2 acts to increase the current limit at turnon to approximately 10 times the steady-state lamp current.
The high initial trip point decays away according to a 20ms
time constant contributed by CTH. RTH2 could be eliminated
with CTH working against the internal 1k resistor, but this
results in a very high over-current threshold. As a rule of
thumb design the over-current circuitry in the conventional
manner, then add the RTH2/CTH network to allow for lamp
start-up. Let RTH2 = (RTH1 10) 1k, and choose a
capacitor that provides the desired time constant working
against RTH2 and the internal 1k resistor.
When the MIC5010 is turned off, the threshold pin (4)
appears as an open circuit, and CTH is discharged through
RTH1 and RTH2. This is much slower than the turn-on time
5-96
MIC5010
RTH2
1k
Control Input
RTH1
22k
1 Inhibit
2 NC
Fault 14
V+ 13
3 Input
4 Thresh
NC 12
C1 11
12V
+
10F
5 Sense Com 10
6 Source
C2 9
7 Gnd
Gate 8
IRCZ44
CTH
22F
43
3.9k
#6014
Figure 5. Time-Variable
Trip Threshold
April 1998
MIC5010
Micrel
V DD =7 to 15V
MIC5010
1 Inhibit
2 NC
Control Input
1N4001 (2)
100nF
NC 12
C1 11
3 Input
4 Thresh
100
18m
+
R1= V
1mA
MIC5010
1 Inhibit
2 NC
3 Input
4 Thresh
MPSA05
20k
Fault 14
V+ 13
NC 12
C1 11
+
10F
5 Sense Com 10
6 Source
C2 9
7 Gnd
Gate 8
IRFZ40
100
22m
CPSL-3 (Dale)
1N4148
10k
Figure 7. 10-Ampere
Electronic Circuit Breaker
April 1998
LOAD
Figure 6. Bootstrapped
High-Side Driver
100k
10k
10F
IRF540
12V
100nF
20k 5
Sense Com 10
6 Source
C2 9
7 Gnd
Gate 8
12V
100k 100k
1N5817
Fault 14
V+ 13
5-97
LOAD
MIC5010
Micrel
extends out from the control box, is more easily pressed.
This circuit is compatible with control boxes such as the
CR2943 series (GE). The circuit is configured so that if both
switches close simultaneously, the off button has precedence. If there is a fault condition the circuit will latch off, and
it can be reset by pushing the on button.
This application also illustrates how two (or more) MOSFETs
can be paralleled. This reduces the switch drop, and distributes the switch dissipation into multiple packages.
High-Voltage Bootstrap (Figure 10). Although the MIC5010
is limited to operation on 7 to 32V supplies, a floating
bootstrap arrangement can be used to build a high-side
switch that operates on much higher voltages. The MIC5010
and MOSFET are configured as a low-side driver, but the
load is connected in series with ground. The high speed
normally associated with low-side drivers is retained in this
circuit.
Power for the MIC5010 is supplied by a charge pump. A
20kHz square wave (15Vp-p) drives the pump capacitor
and delivers current to a 100F storage capacitor. A zener
diode limits the supply to 18V. When the MIC5010 is off,
power is supplied by a diode connected to a 15V supply.
The circuit of Figure 8 is put to good use as a barrier
between low voltage control circuitry and the 90V motor
supply.
Half-Bridge Motor Driver (Figure 11). Closed loop control
of motor speed requires a half-bridge driver. This topology
presents an extra challenge since the two output devices
should not cross conduct (shoot-through) when switching.
Cross conduction increases output device power dissipation and, in the case of the MIC5010, could trip the overcurrent comparator. Speed is also important, since PWM
control requires the outputs to switch in the 2 to 20kHz
range.
The circuit of Figure 11 utilizes fast configurations for both
the top- and bottom-side drivers. Delay networks at each
input provide a 2 to 3s dead time effectively eliminating
To MIC5010 Input
100k
MPSA05
10mA
Control Input
4N35
100k
1k
Figure 8. Improved
Opto-Isolator Performance
occurs, the circuit breaker shuts off. The breaker tests the
load every 18ms until the short is removed, at which time the
circuit latches ON. No reset button is necessary.
Opto-Isolated Interface (Figure 8). Although the MIC5010
has no special input slew rate requirement, the lethargic
transitions provided by an opto-isolator may cause oscillations on the rise and fall of the output. The circuit shown
accelerates the input transitions from a 4N35 opto-isolator
by adding hysteresis. Opto-isolators are used where the
control circuitry cannot share a common ground with the
MIC5010 and high-current power supply, or where the
control circuitry is located remotely. This implementation is
intrinsically safe; if the control line is severed the MIC5010
will turn OFF.
Fault-Protected Industrial Switch (Figure 9). The most
common manual control for industrial loads is a push button
on/off switch. The on button is physically arranged in a
recess so that in a panic situation the off button, which
24V
24V
MIC5010
100k
ON
1 Inhibit
2 NC
OFF
3 Input
4 Thresh
CR2943-NA102A
(GE)
20k
5 Sense
6 Source
7 Gnd
Fault 14
V+ 13
NC 12
C1 11
Com 10
+
10F
C2 9
Gate 8
IRFP044 (2)
100
5m
330k
LVF-15 (RCD)
15k
LOAD
Figure 9. 50-Ampere
Industrial Switch
5-98
April 1998
MIC5010
Micrel
1N4003 (2)
MIC5010
1
Fault 14
V+ 13
2 NC
3
NC 12
Input
MPSA05
4
C1 11
Thresh
6.2k 5
Sense Com 10
33k
33pF
100k
10mA
Control Input
Inhibit
4N35
C2 9
Source
7 Gnd
Gate 8
100k
1N4746
+
100F
90V
1nF
IRFP250
1k
100nF
200V
10m
KC1000-4T
(Kelvin)
1/4 HP, 90V
5BPB56HAA100
(GE)
1N4003
15Vp-p, 20kHz
Squarewave
April 1998
5-99
MIC5010
Micrel
15V
MIC5010
1N4148
1 Inhibit
2 NC
22k
3 Input
4 Thresh
220pF
20k
5 Sense
6 Source
7 Gnd
Fault 14
V+ 13
1N5817
1N4001 (2)
100nF
NC 12
C1 11
Com 10
1F
C2 9
Gate 8
IRF541
100
22m
CPSL-3
(Dale)
15k
PWM
INPUT
15V
12V,
M 10A Stalled
MIC5010
1 Inhibit
2 NC
10k
22k
3 Input
4 Thresh
1nF
10k
2N3904
5 Sense
6 Source
7 Gnd
Fault 14
V+ 13
NC 12
+
10F
C1 11
Com 10
C2 9
Gate 8
IRF541
22m
CPSL-3
(Dale)
5-100
April 1998
MIC5010
Micrel
MIC5010
1 Inhibit
2 NC
100k
1N4148
20k
12V
Fault 14
V+ 13
3 Input
4 Thresh
NC 12
5 Sense
Com 10
+
10F
C1 11
6 Source
C2 9
7 Gnd
Gate 8
100F
IRCZ44
OUTPUT
(Delay=5S)
10k
43
100
4.3k
1N4148
330k
MIC5010
RESET
1 Inhibit
2 NC
3 Input
4 Thresh
330k
R
330k
20k
Fault 14
V+ 13
NC 12
C1 11
12V
+
10F
5 Sense Com 10
6 Source
C2 9
7 Gnd
Gate 8
IRCZ44
43
1N4148
4.3k
100nF
T
12V
START
RUN
STOP
April 1998
5-101
MIC5010
Micrel
Q5. For the second phase Q4 turns off and Q3 turns on,
pushing pin C2 above supply (charge is dumped into the
gate). Q3 also charges C1. On the third phase Q2 turns off
and Q1 turns on, pushing the common point of the two
capacitors above supply. Some of the charge in C1 makes
its way to the gate. The sequence is repeated by turning Q2
and Q4 back on, and Q1 and Q3 off.
In a low-side application operating on a 12 to 15V supply,
the MOSFET is fully enhanced by the action of Q5 alone. On
supplies of more than approximately 14V, current flows
directly from Q5 through the zener diode to ground. To
prevent excessive current flow, the MIC5010 supply should
be limited to 15V in low-side applications.
The action of Q5 makes the MIC5010 operate quickly in
low-side applications. In high-side applications Q5
precharges the MOSFET gate to supply, leaving the charge
pump to carry the gate up to full enhancement 10V above
supply. Bootstrapped high-side drivers are as fast as lowside drivers since the chip supply is boosted well above the
drain at turn-on.
Q3
Q5
Q1
125pF
C1
125pF
C1
100 kHz
OSCILLATOR
C2
COM
C2
Q2
Q4
500
OFF
GATE CLAMP
ZENER
12.5V
Q6
S
ON
5-102
April 1998