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Kirchhoffs Laws, Node and Mesh Analysis - GATE Study Material in PDF
Kirchhoffs Laws, Node and Mesh Analysis - GATE Study Material in PDF
In this free GATE Study Material, we discuss about Network Analysis by Kirchhoffs Laws,
Node & Mesh Analysis. Kirchhoffs Law are the two laws enabling easier analysis of an
interconnection of any number of circuit elements.
The first law deals with flow of current and is popularly known as Kirchhoffs Current Law
(KCL) while the second one deals with voltage drop in a closed network and is known as
Kirchhoffs Voltage Laws (KVL). We also learn more about Nodal Analysis and Mesh
Analysis along with concepts like Super Node and Super Mesh. These concepts are
extremely important from the point of view of Network Elements and Electrical Network
in GATE EE. Useful for GATE 2017 as well as other exams such as IES, BSNL, DRDO, BARC
etc. Before you start off with these GATE Notes, however, do make sure you are familiar
with some other concepts beforehand.
You can download these GATE Study Notes as PDF for reference and revision.
Recommended Reading -
1|Page
The direction of incoming currents to a node being ve, the outgoing currents should be
taken +ve. The reverse sense of directions can also be taken.
From the above figure, by KCL
i
i +i +i =0
i +i +i =i +i
i.e. the algebraic sum of currents entering a node must be equal to the algebraic sum
of the currents leaving the node.
Solution:
Apply KCL at node a
i1 = i2 + i3
i3 = i1 i2 = 15 8 = 7A
Apply KCL at node b
i2 = i4 + i5
2|Page
i4 = i2 i5 = 8 6 = 2A
Apply KCL at node d
i3 + i4 = i6
i6 = 7 + 2 = 9A
Apply KCL at node c
i7 = i5 + i6 = 6 + 9 = 15A
Here, the assumed current I causes a +ve drop of voltage when flowing from
+ve to ve potential while ve drop of voltage when current flowing from ve to +ve
for the above circuit, if we apply KVL,
V1 + IR1 + IR2 = 0
I=
3|Page
Solution:
By KVL,
12 + I(2) + I(1) = 0
I = 4A
Power delivered by source = (12)(4) = 48W
Nodal Analysis
In this method we analysis the network by finding node voltages by keeping one node as
a reference node (take its voltage as ground) with the help KCL equations. If there are
n number nodes are there, then possible nodal equations = (n1)
So using there (n1) equation we can find (n1) node voltages.
4|Page
Solution:
There are two nodes in the network, so possible node equations = n 1 = 2 1 = 1
Node 0 is reference node, let V1 be the node voltage at node 1 with respect to node 0.
Now apply KCL at node 1.
+
=0
V1 = 31.18V
Let I the current flowing through 100resistor.
I=
= 0.31A
Super Node
If a voltage source is connected between two non reference nodes, then we combine
the two nodes as to yield super node. We will discuss with an example.
Note: Always apply mesh analysis of the node.
Example 4: Determine the values of the node voltages, Va and Vb for this circuit.
Solution:
There are 3 nodes, so no. of required equation to get node voltages =3-1=2. But here
we can write only one equation, Apply mesh analysis at super node
Vb Va = 12
(1)
+ 3.5 +
Va + 2Vb = 12
=0
(2)
Mesh Analysis
In this method we analyse the network by finding loop currents using KVL equations.
Number of loop equations = n b + 1
where
n = no. of nodes
b = no. of branches.
Solution:
In the above circuit
no. of nodes (n) = 4
no. of branches (b) = 5
no. of loops = b n + 1 = 5 4 + 1 = 2
7|Page
V2
V1
In the loop abcd, let the loop current be I1 and in loop befc it is I2
Apply KVL in loop abcd,
V1+5I1+10(I1 I2 ) = 0
15I1 10I2 = V1
(1)
(2)
10I = V
Super Mesh
8|Page
If a current source is present at the common boundary of two meshes, then we create a
super mesh by avoiding the current source and any element connected to it in series.
We will discuss with an example.
Note: Always apply nodal analysis at super mesh.
(1)
Apply KVL in a b c f c d
10 + 5I1 + 2I2 + I2 = 0
5I1 + 3I_2 = 10
(2)
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