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  • Compal Confidential: Mobile Penryn uFCPGA With Intel Cantiga - PM+ICH9-M Core Logic Schematics Document

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    Marcos Alessandro Santana Santos
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    dv4_ICH9_VGA.pdf

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    32 views54 pages

    Compal Confidential: Mobile Penryn uFCPGA With Intel Cantiga - PM+ICH9-M Core Logic Schematics Document

    Uploaded by

    Marcos Alessandro Santana Santos

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 54

    A B C D E

    1 1

    Compal confidential
    Schematics Document
    2
    Mobile Penryn uFCPGA with Intel 2

    Cantiga_PM+ICH9-M core logic

    2008-02-25

    3 3

    www.kythuatvitinh.com
    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cover Sheet
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 1 of 53
    A B C D E
    A B C D E

    Compal confidential Montevina Consumer Discrete

    CK505 72QFN

    Thermal Sensor Clock Generator


    Mobile Penryn
    1
    VRAM DDR2 EMC1402 SLG8SP553V 1

    P17
    128/512MB uFCPGA-478 CPU
    P6
    page 23,24
    P6,7, 8

    64bits Fan conn P6 H_A#(3..35)


    TV out Discrete FSB
    H_D#(0..63) 667/800/1066 MHz 1.05V
    Nvidia DDR2 SO-DIMM X2
    NB9M-GE DDR2 667MHz 1.8V
    Dock connecter

    BANK 0, 1, 2, 3 P15, 16
    P20,21,22
    Intel Cantiga MCH
    Dual Channel
    LVDS Panel FCBGA 1329
    Interface P19
    USB conn x3
    P9, 10, 11, 12, 13, 14 P36
    CRT CRT
    2 2
    P18
    P40 USB2.0 X12
    DMI X4 C-Link BT Conn
    Support V1.3 P36

    HDMI P42
    USB Camera
    P19
    PCI-E BUS*5 Azalia

    Intel ICH9-M SATA Master-1

    Flash Memory Card SATA Slave


    Realtek Mini-Card*2 New Card mBGA-676 Audio CKT AMP & Audio Jack
    SATA Slave Codec_IDT9271B7 TPA6017A2
    WLAN & Robson Controller
    811C(Gbe) P25,26,27,28 P33 P35
    P30 P31 P31
    JMB385
    MDC P34
    P32
    RJ45/11 CONN LPC BUS
    P30
    3 SATA HDD Connector 3
    P29

    LED
    P39 7 in1 Slot
    ENE

    www.kythuatvitinh.com
    P32

    KB926 SATA ODD Connector


    P29
    RTC CKT. P38
    P26
    e-SATA Connector Dock
    Touch Pad CONN. Int.KBD With 3'th USB P29 P40

    FPR Conn P39 P38


    SPI
    CIR Conn
    SPI ROM P35

    Power On/Off CKT. 25LF080A P37


    4 Capsense switch Conn 4

    Digitally signed by dd
    P39

    DC/DC Interface CKT.


    P41
    Touch Screen Conn
    Security Classification
    DN: cn=dd, o=dd, ou=dd,
    Compal Secret Data Compal Electronics, Inc.
    Issued Date email=dddd@yahoo.com,
    2008/02/25 Deciphered Date c=US
    2008/02/25 Title

    Block Diagram
    Date: 2009.11.12 09:18:54 +07'00'
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 2 of 53
    A B C D E
    A

    X MEANS Symbol Note :


    Voltage Rails O MEANS ON OFF

    : means Digital Ground


    +5VS
    +3VS
    power +1.5VS
    : means Analog Ground
    plane
    +0.9V
    +5VALW +1.8V +VCCP
    @ : means just reserve , no build
    +B
    DEBUG@ : means just reserve for
    +CPU_CORE
    debug.
    +3VALW +2.5VS
    +1.8VS
    State +NVVDD
    +PCIE
    USB assignment:
    USB-0 Right side
    USB-1 Right side
    USB-2 Left side(with ESATA)
    S0 O O O O USB-3 Dock
    USB-4 Camera
    S1 O O O O USB-5 WLAN
    USB-6 Bluetooth
    S3 O O O X USB-7 Finger Printer
    USB-8 MiniCard(WWAN/TV)
    S5 S4/AC O O X X USB-9 Express card
    USB-10 X
    S5 S4/ Battery only O X X X USB-11 X
    S5 S4/AC & Battery
    don't exist X X X X PCIe assignment:
    1 1

    PCIe-1 TV tuner/WWAN/Robeson
    PCIe-2 X
    PCIe-3 WLAN
    SMBUS Control Table
    PCIe-4 GLAN (Marvell)
    NB9M
    SERIAL Thermal PCIe-5 Card reader
    SOURCE INVERTER BATT EEPROM Sensor SODIMM CLK CHIP MINI CARD Sensor board Thermal NB9M G-sensor
    Sensor PCIe-6 New Card
    SMB_EC_CK1
    SMB_EC_DA1
    KB926 X V V X X X X V X X X
    SMB_EC_CK2
    SMB_EC_DA2
    KB926 X X X V X X X X V V X
    ICH_SMBCLK
    ICH_SMBDATA
    ICH9 X X X X V V V X X X V

    www.kythuatvitinh.com
    NB9M SMBUS Control Table

    SOURCE LVDS CRT HDMI

    DDC2_DATA
    DDC2_CLK NB9M
    V X X
    3VDDCDA
    3VDDCCL
    NB9M X V X
    HDMIDAT_VGA
    HDMICLK_VGA
    NB9M X X V

    I2C / SMBUS ADDRESSING

    DEVICE HEX ADDRESS


    DDR SO-DIMM 0 A0 10100000 Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title
    DDR SO-DIMM 1 A4 10100100
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Notes List
    CLOCK GENERATOR (EXT.) D2 11010010 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 3 of 53
    A
    5 4 3 2 1

    50mA
    Finger printer

    50mA
    PC Camera
    177mA
    ICH9 25mA +3VS_DVDD
    1A ALC268
    D
    +V_BATTERY Dock con D

    300mA 35mA
    LAN MDC 1.5

    60mA 1A
    +3VAUX_BT New card
    1A
    0.3A 20mA Mini card (WLAN)
    INVPWR_B+ LVDS CON +3VALW_EC

    10mA 278mA
    AC VIN SPI ROM ICH9
    1.7A 5.89A 5.39A
    +3VALW +3VS 1.5A
    2A 550mA +LCDVDD LVDS CON
    B++ JMB385
    250mA
    +3VS_CK505
    C
    657mA ICH_VCC1_5 C

    ICH9 390mA
    0.3A 2.2A NB9M (VGA)
    +1.5VS 1.56A
    ICH9
    1A
    Mini card (TV tu/WWAN/Robeson)

    35mA +VDDA
    0.58A 1.3A
    +5VALW +5VS IDT 9271B7
    B+
    7A

    10mA
    +5VAMP
    360mA
    NB9M (VGA) 1.8A
    ODD
    B B

    3.7 X 3=11.1V 3.7A 700mA


    MCH SATA
    DC BATT
    1.9A 12.11A 8 A 1.8A
    B+++ +1.8V DDR2 800Mhz 4G x2 Muti Bay

    www.kythuatvitinh.com
    50mA
    +0.9V
    1.17A
    ICH9
    4.7A
    1.26A
    +VCCP MCH
    2.3A
    CPU

    2A 10mA 34A/1.025V
    CPU_B+ +VCC_CORE CPU
    A A

    2.725A
    0.27A
    +NVVDDP +NVVDD NB9M (VGA)

    2A/1.1V Security Classification Compal Secret Data Compal Electronics, Inc.


    0.19A 2008/02/25 2008/02/25 Title
    +1.1V_PCIE +PCIE NB9M (VGA) Issued Date Deciphered Date
    Power delivery
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 4 of 53
    5 4 3 2 1
    A

    1 1

    www.kythuatvitinh.com
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Power sequence
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 5 of 53
    A
    5 4 3 2 1

    +3VS
    #PV follow check list ver:1.5 change to 51 ohm
    @ R1
    ITP-XDP Connector XDP_DBRESET#_R 1 2 1K_0402_5%

    Change value in 5/02 +VCCP

    JP1 XDP_TDI R2 1 2 51_0402_1%


    1 GND0 GND1 2
    XDP_BPM#5 3 4 XDP_TMS R3 1 2 51_0402_1%
    D XDP_BPM#4 OBSFN_A0 OBSFN_C0 D
    5 OBSFN_A1 OBSFN_C1 6
    7 8 XDP_TDO R4 1 2 51_0402_1%
    XDP_BPM#3 GND2 GND3
    9 OBSDATA_A0 OBSDATA_C0 10
    XDP_BPM#2 11 12 XDP_BPM#5 R5 1 2 51_0402_1%
    OBSDATA_A1 OBSDATA_C1
    13 GND4 GND5 14
    XDP_BPM#1 15 16 XDP_HOOK1 R6 1 2 @ 54.9_0402_1%
    XDP_BPM#0 OBSDATA_A2 OBSDATA_C2
    17 OBSDATA_A3 OBSDATA_C3 18
    19 20 XDP_TRST# R7 1 2 51_0402_1%
    9 H_A#[3..16] GND6 GND7
    JCPU1A 21 22
    H_A#3 H_ADS# OBSFN_B0 OBSFN_D0 XDP_TCK R8 51_0402_1%
    J4 A[3]# ADS# H1 H_ADS# 9 23 OBSFN_B1 OBSFN_D1 24 1 2

    ADDR GROUP_0
    H_A#4 L5 E2 H_BNR# 25 26
    A[4]# BNR# H_BNR# 9 GND8 GND9
    H_A#5 L4 G5 H_BPRI# 27 28
    A[5]# BPRI# H_BPRI# 9 OBSDATA_B0 OBSDATA_D0
    H_A#6 K5 29 30 This shall place near CPU
    H_A#7 A[6]# H_DEFER# OBSDATA_B1 OBSDATA_D1
    M3 A[7]# DEFER# H5 H_DEFER# 9 31 GND10 GND11 32
    H_A#8 N2 F21 H_DRDY# 33 34
    A[8]# DRDY# H_DRDY# 9 OBSDATA_B2 OBSDATA_D2
    H_A#9 J1 E1 H_DBSY# R9 35 36
    A[9]# DBSY# H_DBSY# 9 OBSDATA_B3 OBSDATA_D3
    H_A#10 N3 1K_0402_5% 37 38
    H_A#11 A[10]# H_BR0# GND12 GND13
    P5 A[11]# BR0# F1 H_BR0# 9 7,26 H_PWRGOOD 2 1H_PWRGOOD_R 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 CLK_CPU_XDP CLK_CPU_XDP 17
    H_A#12 P2 XDP_HOOK1 41 42 CLK_CPU_XDP# CLK_CPU_XDP# 17
    A[12]# HOOK1 ITPCLK#/HOOK5

    CONTROL
    H_A#13 L2 D20 H_IERR# T1 +VCCP 43 44 +VCCP
    H_A#14 A[13]# IERR# H_INIT# @ VCC_OBS_AB VCC_OBS_CD H_RESET#_R R10
    P4 A[14]# INIT# B3 H_INIT# 26 2 1 45 HOOK2 RESET#/HOOK6 46 1 2 1K_0402_1% H_RESET#
    H_A#15 P1 Place TP with a C1 0.1U_0402_16V4Z 47 48 XDP_DBRESET#_R R11 2 1 0_0402_1% XDP_DBRESET#
    H_A#16 A[15]# H_LOCK# HOOK3 DBR#/HOOK7
    R1 A[16]# LOCK# H4 H_LOCK# 9 GND 0.1" away 49 GND14 GND15 50
    H_ADSTB#0 M1 51 52 XDP_TDO
    9 H_ADSTB#0 ADSTB[0]# SDA TD0
    C1 H_RESET# Removed at 5/30.(Follow 53 54 XDP_TRST#
    RESET# H_RESET# 9 SCL TRST#
    H_REQ#0 K3 F3 H_RS#0 55 56 XDP_TDI R12
    9 H_REQ#0
    H_REQ#1 H2
    REQ[0]# RS[0]#
    F4 H_RS#1
    H_RS#0 9 Chimay) XDP_TCK 57
    TCK1 TDI
    58 XDP_TMS 0_0402_5%
    9 H_REQ#1 REQ[1]# RS[1]# H_RS#1 9 TCK0 TMS
    H_REQ#2 K2 G3 H_RS#2 59 60 XDP_PRE 1 2
    9 H_REQ#2 REQ[2]# RS[2]# H_RS#2 9 GND16 GND17
    H_REQ#3 J3 G2 H_TRDY#
    9 H_REQ#3 REQ[3]# TRDY# H_TRDY# 9
    H_REQ#4 L1 CONN@
    SAMTE_BSH-030-01-L-D-A Place R191 within 200ps (~1") to CPU
    9 H_REQ#4 REQ[4]#
    G6 H_HIT#
    9 H_A#[17..35] HIT# H_HIT# 9
    H_A#17 Y2 E4 H_HITM#
    C A[17]# HITM# H_HITM# 9 C
    H_A#18 U5
    H_A#19 A[18]# XDP_BPM#0
    R3 A[19]# BPM[0]# AD4
    ADDR GROUP_1

    H_A#20 W6 AD3 XDP_BPM#1


    H_A#21 A[20]# BPM[1]# XDP_BPM#2
    U4 A[21]# BPM[2]# AD1
    H_A#22 Y5 AC4 XDP_BPM#3
    A[22]# BPM[3]#
    XDP/ITP SIGNALS

    H_A#23 U1 AC2 XDP_BPM#4 #PV follow check list ver:1.5 change to 0 ohm
    H_A#24 A[23]# PRDY# XDP_BPM#5
    R4 A[24]# PREQ# AC1
    H_A#25 T5 AC5 XDP_TCK +3VS
    H_A#26 A[25]# TCK XDP_TDI
    T3 A[26]# TDI AA6
    H_A#27 W2 AB3 XDP_TDO #PV follow check list ver:1.5 change to 56 ohm
    H_A#28 A[27]# TDO XDP_TMS
    W5 A[28]# TMS AB5
    H_A#29 XDP_TRST#

    0.1U_0402_16V4Z
    Y4 A[29]# TRST# AB6 1
    H_A#30 U2 C20 XDP_DBRESET#
    A[30]# DBR# XDP_DBRESET# 27 C2
    H_A#31 V4
    H_A#32 A[31]# U1
    W3 A[32]#
    H_A#33 2
    AA4 A[33]# THERMAL
    H_A#34 AB2 H_PROCHOT# R13 1 2 56_0402_1%
    H_A#35 A[34]# +VCCP SMB_EC_CK2
    AA3 A[35]# PROCHOT# D21 1 VDD SMCLK 8 SMB_EC_CK2 21,38
    H_ADSTB#1 V1 A24 H_THERMDA_R R14 1 2 100_0402_5% H_THERMDA
    9 H_ADSTB#1 ADSTB[1]# THERMDA
    B25 H_THERMDC_R R15 1 2 100_0402_5% H_THERMDC H_THERMDA 2 7 SMB_EC_DA2
    THERMDC DP SMDATA SMB_EC_DA2 21,38
    H_A20M# A6 C3
    26 H_A20M# A20M#
    ICH

    H_FERR# A5 C7 H_THERMTRIP# 1 2 H_THERMDC 3 6


    26 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 9,26 DN ALERT#
    H_IGNNE# C4 2200P_0402_50V7K
    26 H_IGNNE# IGNNE# THERM# 4 5
    H_STPCLK# THERM# GND
    26 H_STPCLK# D5 STPCLK#
    H_INTR C6 H CLK R16
    26 H_INTR LINT0
    H_NMI B4 A22 CLK_CPU_BCLK +3VS 1 2
    26 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 17
    H_SMI# A3 A21 CLK_CPU_BCLK# 10K_0402_5% EMC1402-1-ACZL-TR_MSOP8
    26 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 17
    M4 RSVD[01] Address:100_1100
    N5 RSVD[02] H_THERMDA, H_THERMDC routing together,
    T2
    B V3
    RSVD[03] Trace width / Spacing = 10 / 10 mil B
    RSVD[04]
    RESERVED

    B2 RSVD[05]
    D2 RSVD[06]
    D22 RSVD[07]
    D3 RSVD[08] For Merom, R14 and R15 are 0ohm
    F6 RSVD[09] For Penryn, R14 and R15 are 100ohm.
    PWM Fan Control circuit
    +5VS

    www.kythuatvitinh.com
    Penryn
    JP2
    1 1
    2 2

    1
    +VCCP 3
    1 1 G1
    D1 C4 C5 4
    4.7U_0805_10V4Z 0.1U_0402_16V4Z G2
    RB751V_SOD323 ACES_88231-02001
    1

    @ 2 2

    2
    R17
    56_0402_5%
    +FAN
    $SI change lib
    2 2

    1
    2
    5
    6

    1
    B

    D Q2 @ D2
    E

    H_PROCHOT# 3 1 OCP# G
    OCP# 27
    C

    @ Q1 3 RLZ5.1B_LL34
    38 FAN_PWM S
    MMBT3904_NL_SOT23-3 SI3456BDV-T1-E3_TSOP6

    2
    4
    +VCCP
    A ZZZ1 A
    2

    R18
    56_0402_5%

    PCB
    1

    H_IERR# Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Penryn(1/3)-AGTL+/ITP-XDP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 6 of 53
    5 4 3 2 1
    5 4 3 2 1

    +VCC_CORE +VCC_CORE
    9 H_D#[0..15] H_D#[32..47] 9
    JCPU1B JCPU1C
    H_D#0 E22 Y22 H_D#32 A7 AB20
    H_D#1 D[0]# D[32]# H_D#33 VCC[001] VCC[068]
    F24 D[1]# D[33]# AB24 A9 VCC[002] VCC[069] AB7
    H_D#2 E26 V24 H_D#34 A10 AC7
    D[2]# D[34]# VCC[003] VCC[070]

    DATA GRP 0
    H_D#3 G22 V26 H_D#35 A12 AC9

    DATA GRP 2
    D H_D#4 D[3]# D[35]# H_D#36 VCC[004] VCC[071] D
    F23 D[4]# D[36]# V23 A13 VCC[005] VCC[072] AC12
    H_D#5 G25 T22 H_D#37 A15 AC13
    H_D#6 D[5]# D[37]# H_D#38 VCC[006] VCC[073]
    E25 D[6]# D[38]# U25 A17 VCC[007] VCC[074] AC15
    H_D#7 E23 U23 H_D#39 A18 AC17
    H_D#8 D[7]# D[39]# H_D#40 VCC[008] VCC[075]
    K24 D[8]# D[40]# Y25 A20 VCC[009] VCC[076] AC18
    H_D#9 G24 W22 H_D#41 B7 AD7
    H_D#10 D[9]# D[41]# H_D#42 VCC[010] VCC[077]
    J24 D[10]# D[42]# Y23 B9 VCC[011] VCC[078] AD9
    H_D#11 J23 W24 H_D#43 B10 AD10
    H_D#12 D[11]# D[43]# H_D#44 VCC[012] VCC[079]
    H22 D[12]# D[44]# W25 B12 VCC[013] VCC[080] AD12
    H_D#13 F26 AA23 H_D#45 B14 AD14
    H_D#14 D[13]# D[45]# H_D#46 VCC[014] VCC[081]
    K22 D[14]# D[46]# AA24 B15 VCC[015] VCC[082] AD15
    H_D#15 H23 AB25 H_D#47 B17 AD17
    H_DSTBN#0 D[15]# D[47]# H_DSTBN#2 VCC[016] VCC[083]
    9 H_DSTBN#0 J26 DSTBN[0]# DSTBN[2]# Y26 H_DSTBN#2 9 B18 VCC[017] VCC[084] AD18
    H_DSTBP#0 H26 AA26 H_DSTBP#2 B20 AE9
    9 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 9 VCC[018] VCC[085]
    H_DINV#0 H25 U22 H_DINV#2 C9 AE10
    9 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 9 VCC[019] VCC[086]
    9 H_D#[16..31] H_D#[48..63] 9 C10 VCC[020] VCC[087] AE12
    C12 VCC[021] VCC[088] AE13
    H_D#16 N22 AE24 H_D#48 C13 AE15
    H_D#17 D[16]# D[48]# H_D#49 VCC[022] VCC[089]
    K25 D[17]# D[49]# AD24 C15 VCC[023] VCC[090] AE17
    H_D#18 P26 AA21 H_D#50 C17 AE18
    H_D#19 D[18]# D[50]# H_D#51 VCC[024] VCC[091]
    R23 D[19]# D[51]# AB22 C18 VCC[025] VCC[092] AE20
    H_D#20 L23 AB21 H_D#52 D9 AF9
    D[20]# D[52]# VCC[026] VCC[093]

    DATA GRP 1
    H_D#21 M24 AC26 H_D#53 D10 AF10

    DATA GRP 3
    H_D#22 D[21]# D[53]# H_D#54 VCC[027] VCC[094]
    L22 D[22]# D[54]# AD20 D12 VCC[028] VCC[095] AF12
    H_D#23 M23 AE22 H_D#55 D14 AF14
    H_D#24 D[23]# D[55]# H_D#56 VCC[029] VCC[096]
    P25 D[24]# D[56]# AF23 D15 VCC[030] VCC[097] AF15
    H_D#25 P23 AC25 H_D#57 D17 AF17
    H_D#26 D[25]# D[57]# H_D#58 VCC[031] VCC[098]
    P22 D[26]# D[58]# AE21 D18 VCC[032] VCC[099] AF18
    H_D#27 T24 AD21 H_D#59 E7 AF20 +VCCP
    H_D#28 D[27]# D[59]# H_D#60 VCC[033] VCC[100] R19
    R24 D[28]# D[60]# AC22 E9 VCC[034]
    H_D#29 L25 AD23 H_D#61 E10 G21 +VCCPA 1 2 0_0402_5%
    H_D#30 D[29]# D[61]# H_D#62 VCC[035] VCCP[01] +VCCPB 0_0402_5%
    T25 D[30]# D[62]# AF22 E12 VCC[036] VCCP[02] V6 1 2
    C H_D#31 H_D#63 R20 C
    N25 D[31]# D[63]# AC23 E13 VCC[037] VCCP[03] J6
    H_DSTBN#1 L26 AE25 H_DSTBN#3 E15 K6 1
    9 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 9 VCC[038] VCCP[04]
    H_DSTBP#1 M26 AF24 H_DSTBP#3 E17 M6
    9 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 9 VCC[039] VCCP[05] + C6
    H_DINV#1 N24 AC20 H_DINV#3 E18 J21
    9 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 9 VCC[040] VCCP[06]
    E20 K21 330U_D2E_2.5VM_R7
    +V_CPU_GTLREF COMP0 VCC[041] VCCP[07]
    AD26 GTLREF COMP[0] R26 F7 VCC[042] VCCP[08] M21
    @ R21 TEST1 COMP1 2
    1 2 1K_0402_5% C23 TEST1 MISC COMP[1] U26 F9 VCC[043] VCCP[09] N21
    @ R22 1 2 1K_0402_5% TEST2 D25 AA1 COMP2 F10 N6
    TEST3 TEST2 COMP[2] COMP3 VCC[044] VCCP[10]
    T2 C24 TEST3 COMP[3] Y1 F12 VCC[045] VCCP[11] R21
    @TEST4 AF26 F14 R6
    T3 TEST4 VCC[046] VCCP[12]
    @TEST5 AF1 E5 H_DPRSTP# R23 R24 R25 R26 F15 T21
    T4 TEST5 DPRSTP# H_DPRSTP# 9,26,49 VCC[047] VCCP[13]

    54.9_0402_1%

    27.4_0402_1%

    54.9_0402_1%

    27.4_0402_1%
    TEST6 A26 B5 H_DPSLP# F17 T6
    T5 TEST6 DPSLP# H_DPSLP# 26 VCC[048] VCCP[14]

    1
    TEST7 C3 D24 H_DPWR# F18 V21
    T6 TEST7 DPWR# H_DPWR# 9 VCC[049] VCCP[15]
    CPU_BSEL0 B22 D6 H_PWRGOOD F20 W21
    17 CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGOOD 6,26 VCC[050] VCCP[16]
    CPU_BSEL1 B23 D7 H_CPUSLP# AA7
    17 CPU_BSEL1 BSEL[1] SLP# H_CPUSLP# 9 VCC[051]
    CPU_BSEL2 C21 AE6 H_PSI# AA9 B26
    17 CPU_BSEL2 BSEL[2] PSI# H_PSI# 49 VCC[052] VCCA[01] +1.5VS
    AA10 C26

    2
    VCC[053] VCCA[02]

    10U_0805_6.3V6M

    0.01U_0402_16V7K
    Penryn AA12 VCC[054]
    AA13 VCC[055] VID[0] AD6 CPU_VID0 49
    AA15 VCC[056] VID[1] AF5 CPU_VID1 49 1 1
    * Route the TEST3 and TEST5 signals through AA17 VCC[057] VID[2] AE5 CPU_VID2 49
    C7 C8
    AA18 VCC[058] VID[3] AF4 CPU_VID3 49
    a ground referenced Zo = 55-ohm trace that AA20 AE3 CPU_VID4 49
    VCC[059] VID[4] 2 2
    ends in a via that is near a GND via and is Resistor placed within 0.5" AB9 VCC[060] VID[5] AF3 CPU_VID5 49
    AC10 VCC[061] VID[6] AE2 CPU_VID6 49
    accessible through an oscilloscope of CPU pin.Trace should be AB10 VCC[062]
    at least 25 mils away from AB12
    connection. AB14
    VCC[063]
    AF7 VCCSENSE
    VCC[064] VCCSENSE VCCSENSE 49
    any other toggling signal. AB15 VCC[065] Near pin B26
    AB17
    COMP[0,2] trace width is 18 AB18
    VCC[066]
    AE7 VSSSENSE
    VCC[067] VSSSENSE VSSSENSE 49
    B
    mils. COMP[1,3] trace width B
    CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 Penryn
    is 4 mils. .

    166 0 1 1

    Length match within 25 mils.


    200 0 1 0

    www.kythuatvitinh.com
    The trace width/space/other is 20/7/25.
    +VCCP
    266 0 0 0
    1

    R27
    1K_0402_1%
    +VCC_CORE
    2

    +V_CPU_GTLREF

    R28 1 2 100_0402_1% VCCSENSE


    1

    R29
    2K_0402_1% R30 1 2 100_0402_1% VSSSENSE
    2

    Close to CPU pin within


    Close to CPU pin AD26 500mils.
    A
    within 500mils. A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Penryn(2/3)-AGTL+/ITP-XDP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 7 of 53
    5 4 3 2 1
    5 4 3 2 1

    +VCC_CORE

    5
    1 1 1 1 1 1 1 1
    Place these capacitors on C9 C10 C11 C12 C13 C14 C15 C16
    L8 (North side,Secondary 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
    Layer) 2 2 2 2 2 2 2 2

    D D
    +VCC_CORE
    JCPU1D
    A4 VSS[001] VSS[082] P6 5
    A8 VSS[002] VSS[083] P21 1 1 1 1 1 1 1 1
    A11 P24 Place these capacitors on C17 C18 C19 C20 C21 C22 C23 C24
    VSS[003] VSS[084]
    A14 VSS[004] VSS[085] R2 L8 (North side,Secondary
    A16 R5 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
    VSS[005] VSS[086] Layer) 2 2 2 2 2 2 2 2
    A19 VSS[006] VSS[087] R22
    A23 VSS[007] VSS[088] R25
    AF2 VSS[008] VSS[089] T1
    B6 VSS[009] VSS[090] T4
    +VCC_CORE
    B8 VSS[010] VSS[091] T23
    B11 VSS[011] VSS[092] T26
    B13 VSS[012] VSS[093] U3 5
    B16 VSS[013] VSS[094] U6 1 1 1 1 1 1 1 1
    B19 U21 Place these capacitors on C25 C26 C27 C28 C29 C30 C31 C32
    VSS[014] VSS[095]
    B21 VSS[015] VSS[096] U24 L8 (North side,Secondary
    B24 V2 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
    VSS[016] VSS[097] Layer) 2 2 2 2 2 2 2 2
    C5 VSS[017] VSS[098] V5
    C8 VSS[018] VSS[099] V22
    C11 VSS[019] VSS[100] V25
    C14 VSS[020] VSS[101] W1
    +VCC_CORE
    C16 VSS[021] VSS[102] W4
    C19 VSS[022] VSS[103] W23
    C2 VSS[023] VSS[104] W26 5
    C22 VSS[024] VSS[105] Y3 1 1 1 1 1 1 1 1
    C25 Y6 Place these capacitors on C33 C34 C35 C36 C37 C38 C39 C40
    VSS[025] VSS[106]
    D1 VSS[026] VSS[107] Y21 L8 (North side,Secondary
    D4 Y24 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
    VSS[027] VSS[108] Layer) 2 2 2 2 2 2 2 2
    D8 VSS[028] VSS[109] AA2
    D11 VSS[029] VSS[110] AA5
    C C
    D13 VSS[030] VSS[111] AA8
    D16 VSS[031] VSS[112] AA11
    D19 AA14
    D23
    VSS[032] VSS[113]
    AA16
    Mid Frequence Decoupling
    VSS[033] VSS[114]
    D26 VSS[034] VSS[115] AA19
    E3 VSS[035] VSS[116] AA22
    E6 VSS[036] VSS[117] AA25
    E8 VSS[037] VSS[118] AB1
    E11 VSS[038] VSS[119] AB4
    E14 VSS[039] VSS[120] AB8
    E16 VSS[040] VSS[121] AB11
    E19 AB13
    E21
    VSS[041]
    VSS[042]
    VSS[122]
    VSS[123] AB16 ESR <= 1.5m ohm
    E24 VSS[043] VSS[124] AB19
    Near CPU CORE regulator
    F5
    F8
    VSS[044]
    VSS[045]
    VSS[125]
    VSS[126]
    AB23
    AB26
    Capacitor > 1980uF
    F11 VSS[046] VSS[127] AC3
    F13 VSS[047] VSS[128] AC6
    +VCC_CORE
    F16 VSS[048] VSS[129] AC8
    F19 VSS[049] VSS[130] AC11
    F2 VSS[050] VSS[131] AC14
    F22 VSS[051] VSS[132] AC16
    F25 VSS[052] VSS[133] AC19
    G4 VSS[053] VSS[134] AC21
    G1 VSS[054] VSS[135] AC24 1 1 1 1
    G23 VSS[055] VSS[136] AD2
    G26 AD5 C41 + C42 + C43 + C44 +
    VSS[056] VSS[137] 330U_D2E_2.5VM_R7 <BOM Structure> 330U_D2E_2.5VM_R7
    H3 VSS[057] VSS[138] AD8
    H6 VSS[058] VSS[139] AD11
    2 2 2 2
    H21 VSS[059] VSS[140] AD13
    H24 VSS[060] VSS[141] AD16
    J2 AD19 @
    B VSS[061] VSS[142] B
    J5 VSS[062] VSS[143] AD22
    J22 AD25 330U_D2E_2.5VM_R7 330U_D2E_2.5VM_R7
    VSS[063] VSS[144]
    J25 VSS[064] VSS[145] AE1
    K1 VSS[065] VSS[146] AE4
    K4 VSS[066] VSS[147] AE8 #SI change to 7m ohm
    K23 VSS[067] VSS[148] AE11
    K26 VSS[068] VSS[149] AE14
    L3 VSS[069] VSS[150] AE16
    L6 VSS[070] VSS[151] AE19

    www.kythuatvitinh.com
    L21 VSS[071] VSS[152] AE23
    L24 VSS[072] VSS[153] AE26
    M2 VSS[073] VSS[154] A2
    M5 AF6
    M22
    VSS[074] VSS[155]
    AF8 +VCCP Inside CPU center cavity in 2 rows
    VSS[075] VSS[156]
    M25 VSS[076] VSS[157] AF11 5
    N1 VSS[077] VSS[158] AF13
    N4 VSS[078] VSS[159] AF16 1 1 1 1 1 1
    N23 AF19 C45 C46 C47 C48 C49 C50
    VSS[079] VSS[160]
    N26 VSS[080] VSS[161] AF21
    P3 A25 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
    VSS[081] VSS[162] 2 2 2 2 2 2
    VSS[163] AF25

    Penryn
    .

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Penryn(3/3)-AGTL+/ITP-XDP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 8 of 53
    5 4 3 2 1
    5 4 3 2 1

    H_A#[3..35] 6 U2B
    7 H_D#[0..63] U2A

    DDR CLK/ CONTROL/COMPENSATION


    A14 H_A#3 M36
    H_A#_3 T7 RESERVED
    H_D#0 F2 C15 H_A#4 N36 AP24 M_CLK_DDR0 M_CLK_DDR0 15
    H_D#_0 H_A#_4 T8 RESERVED SA_CK_0
    H_D#1 H_A#5 M_CLK_DDR1

    0.01U_0402_25V7K
    2.2U_0603_6.3V4Z
    G8 H_D#_1 H_A#_5 F16 T9 R33 RESERVED SA_CK_1 AT21 M_CLK_DDR1 15
    H_D#2 F8 H13 H_A#6 T33 AV24 M_CLK_DDR2 M_CLK_DDR2 16
    H_D#_2 H_A#_6 +1.8V T10 RESERVED SB_CK_0
    H_D#3 E6 C18 H_A#7 AH9 AU20 M_CLK_DDR3 M_CLK_DDR3 16
    H_D#_3 H_A#_7 T11 RESERVED SB_CK_1
    H_D#4 G2 M16 H_A#8 AH10
    H_D#_4 H_A#_8 T12 RESERVED
    H_D#5 H6 J13 H_A#9 1 1 AH12 AR24 M_CLK_DDR#0
    H_D#_5 H_A#_9 T13 RESERVED SA_CK#_0 M_CLK_DDR#0 15

    1
    C51

    C52
    H_D#6 H2 P16 H_A#10 AH13 AR21 M_CLK_DDR#1
    H_D#_6 H_A#_10 T14 RESERVED SA_CK#_1 M_CLK_DDR#1 15
    H_D#7 F6 R16 H_A#11 R31 K12 AU24 M_CLK_DDR#2
    H_D#_7 H_A#_11 T15 RESERVED SB_CK#_0 M_CLK_DDR#2 16
    H_D#8 D4 N17 H_A#12 1K_0402_1% AL34 AV20 M_CLK_DDR#3
    H_D#_8 H_A#_12 2 2 T16 RESERVED SB_CK#_1 M_CLK_DDR#3 16
    H_D#9 H3 M13 H_A#13 AK34
    H_D#_9 H_A#_13 T17 RESERVED
    H_D#10 M9 E17 H_A#14 AN35 BC28 DDR_CKE0_DIMMA
    T18 DDR_CKE0_DIMMA 15

    2
    H_D#11 H_D#_10 H_A#_14 H_A#15 SMRCOMP_VOH RESERVED SA_CKE_0 DDR_CKE1_DIMMA
    M11 H_D#_11 H_A#_15 P17 T19 AM35 RESERVED SA_CKE_1 AY28 DDR_CKE1_DIMMA 15
    D H_D#12 H_A#16 DDR_CKE2_DIMMB D
    J1 H_D#_12 H_A#_16 F17 80% of 1.8V VCC_SM T20 T24 RESERVED SB_CKE_0 AY36 DDR_CKE2_DIMMB 16

    1
    H_D#13 J2 G20 H_A#17 BB36 DDR_CKE3_DIMMB
    H_D#_13 H_A#_17 SB_CKE_1 DDR_CKE3_DIMMB 16

    RSVD
    H_D#14 N12 B19 H_A#18 R32 B31
    H_D#_14 H_A#_18 T21 RESERVED
    H_D#15 J6 J16 H_A#19 3.01K_0402_1% B2 BA17 DDR_CS0_DIMMA#
    H_D#_15 H_A#_19 T22 RESERVED SA_CS#_0 DDR_CS0_DIMMA# 15
    H_D#16 P2 E20 H_A#20 20% of 1.8V VCC_SM M1 AY16 DDR_CS1_DIMMA#
    H_D#_16 H_A#_20 T23 RESERVED SA_CS#_1 DDR_CS1_DIMMA# 15
    H_D#17 L2 H16 H_A#21 AV16 DDR_CS2_DIMMB#

    2
    H_D#_17 H_A#_21 SB_CS#_0 DDR_CS2_DIMMB# 16
    H_D#18 R2 J20 H_A#22 SMRCOMP_VOL AR13 DDR_CS3_DIMMB#
    H_D#_18 H_A#_22 SB_CS#_1 DDR_CS3_DIMMB# 16
    H_D#19 N9 L17 H_A#23 AY21
    H_D#_19 H_A#_23 T24 RESERVED

    1
    H_D#20 H_A#24 M_ODT0

    0.01U_0402_25V7K
    2.2U_0603_6.3V4Z
    L6 H_D#_20 H_A#_24 A17 SA_ODT_0 BD17 M_ODT0 15
    H_D#21 M5 B17 H_A#25 1 1 R33 AY17 M_ODT1 M_ODT1 15
    H_D#_21 H_A#_25 SA_ODT_1 +1.8V

    C53

    C54
    H_D#22 J3 L16 H_A#26 1K_0402_1% BF15 M_ODT2 M_ODT2 16
    H_D#23 H_D#_22 H_A#_26 H_A#27 SB_ODT_0 M_ODT3
    N2 H_D#_23 H_A#_27 C21 T25 BG23 RESERVED SB_ODT_1 AY13 M_ODT3 16
    H_D#24 R1 J17 H_A#28 BF23
    T26

    2
    H_D#25 H_D#_24 H_A#_28 H_A#29 2 2 RESERVED SMRCOMP R34
    N5 H_D#_25 H_A#_29 H20 T27 BH18 RESERVED SM_RCOMP BG22 1 2 80.6_0402_1%
    H_D#26 N6 B18 H_A#30 BF18 BH21 SMRCOMP# R35 1 2 80.6_0402_1%
    H_D#_26 H_A#_30 T28 RESERVED SM_RCOMP#
    H_D#27 P13 K17 H_A#31 Follow Design Guide
    H_D#28 H_D#_27 H_A#_31 H_A#32 SMRCOMP_VOH
    N8 B20 BF28
    H_D#29 L7
    H_D#_28 H_A#_32
    F21 H_A#33 SM_RCOMP_VOH
    BH28 SMRCOMP_VOL For Cantiga: 80.6ohm
    H_D#30 H_D#_29 H_A#_33 H_A#34 SM_RCOMP_VOL
    N10 H_D#_30 H_A#_34 K21
    H_D#31 M3 L20 H_A#35 AV42 V_DDR_MCH_REF
    H_D#32 H_D#_31 H_A#_35 SM_VREF SM_PWROK R36
    Y3 H_D#_32 SM_PWROK AR36 1 2 0_0402_5%
    H_D#33 AD14 H12 H_ADS# BF17 SM_REXT R37 1 2 499_0402_1%
    H_D#_33 H_ADS# H_ADS# 6 SM_REXT
    H_D#34 Y6 B16 H_ADSTB#0 BC36 TP_SM_DRAMRST# T29 PAD
    H_D#_34 H_ADSTB#_0 H_ADSTB#0 6 SM_DRAMRST#
    H_D#35 Y10 G17 H_ADSTB#1 +3VS @
    H_D#_35 H_ADSTB#_1 H_ADSTB#1 6
    H_D#36 Y12 A9 H_BNR# B38
    H_D#_36 H_BNR# H_BNR# 6 DPLL_REF_CLK
    H_D#37 Y14 F11 H_BPRI# PM_EXTTS#0 R38 1 2 10K_0402_5% A38
    H_D#_37 H_BPRI# H_BPRI# 6 DPLL_REF_CLK#
    H_D#38 Y7 G12 H_BR0# E41
    H_D#_38 H_BREQ# H_BR0# 6 DPLL_REF_SSCLK
    H_D#39 H_DEFER#
    HOST
    W2 H_D#_39 H_DEFER# E9 H_DEFER# 6 DPLL_REF_SSCLK# F41
    H_D#40 AA8 B10 H_DBSY# PM_EXTTS#1 R39 1 2 10K_0402_5%
    H_D#_40 H_DBSY# H_DBSY# 6

    CLK
    H_D#41 Y9 AH7 CLK_MCH_BCLK F43 CLK_MCH_3GPLL
    H_D#_41 HPLL_CLK CLK_MCH_BCLK 17 PEG_CLK CLK_MCH_3GPLL 17
    H_D#42 AA13 AH6 CLK_MCH_BCLK# E43 CLK_MCH_3GPLL#
    H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 17 PEG_CLK# CLK_MCH_3GPLL# 17
    H_D#43 AA9 J11 H_DPWR# CLKREQ#_7 R40 1 2 10K_0402_5%
    C H_D#_43 H_DPWR# H_DPWR# 7 C
    H_D#44 AA11 F9 H_DRDY#
    H_D#_44 H_DRDY# H_DRDY# 6
    H_D#45 AD11 H9 H_HIT#
    H_D#_45 H_HIT# H_HIT# 6
    H_D#46 AD10 E12 H_HITM# AE41 DMI_TXN0
    H_D#_46 H_HITM# H_HITM# 6 DMI_RXN_0 DMI_TXN0 27
    H_D#47 AD13 H11 H_LOCK# AE37 DMI_TXN1
    H_D#_47 H_LOCK# H_LOCK# 6 DMI_RXN_1 DMI_TXN1 27
    H_D#48 AE12 C9 H_TRDY# AE47 DMI_TXN2
    H_D#_48 H_TRDY# H_TRDY# 6 DMI_RXN_2 DMI_TXN2 27
    H_D#49 AE9 AH39 DMI_TXN3
    H_D#_49 DMI_RXN_3 DMI_TXN3 27
    H_D#50 AA2
    H_D#51 H_D#_50 DMI_TXP0
    AD8 H_D#_51 DMI_RXP_0 AE40 DMI_TXP0 27
    H_D#52 AA3 MCH_CLKSEL0 T25 AE38 DMI_TXP1
    H_D#_52 17 MCH_CLKSEL0 CFG_0 DMI_RXP_1 DMI_TXP1 27
    H_D#53 AD3 J8 H_DINV#0 MCH_CLKSEL1 R25 AE48 DMI_TXP2
    H_D#_53 H_DINV#_0 H_DINV#0 7 17 MCH_CLKSEL1 CFG_1 DMI_RXP_2 DMI_TXP2 27
    H_D#54 AD7 L3 H_DINV#1 MCH_CLKSEL2 P25 AH40 DMI_TXP3
    H_D#_54 H_DINV#_1 H_DINV#1 7 17 MCH_CLKSEL2 CFG_2 DMI_RXP_3 DMI_TXP3 27
    H_D#55 AE14 Y13 H_DINV#2 P20
    H_D#_55 H_DINV#_2 H_DINV#2 7 CFG_3
    H_D#56 AF3 Y1 H_DINV#3 P24 AE35 DMI_RXN0
    H_D#_56 H_DINV#_3 H_DINV#3 7 CFG_4 DMI_TXN_0 DMI_RXN0 27
    H_D#57 AC1 CFG5 C25 AE43 DMI_RXN1
    H_D#_57 11 CFG5 CFG_5 DMI_TXN_1 DMI_RXN1 27
    H_D#58 AE3 L10 H_DSTBN#0 CFG6 N24 AE46 DMI_RXN2
    H_D#_58 H_DSTBN#_0 H_DSTBN#0 7 11 CFG6 CFG_6 DMI_TXN_2 DMI_RXN2 27
    H_D#59 AC3 M7 H_DSTBN#1 CFG7 M24 AH42 DMI_RXN3
    H_D#_59 H_DSTBN#_1 H_DSTBN#1 7 11 CFG7 CFG_7 DMI_TXN_3 DMI_RXN3 27
    H_D#60 AE11 AA5 H_DSTBN#2 CFG8 E21
    H_D#_60 H_DSTBN#_2 H_DSTBN#2 7 11 CFG8 CFG_8

    CFG
    H_D#61 AE8 AE6 H_DSTBN#3 CFG9 C23 AD35 DMI_RXP0
    H_DSTBN#3 7 11 CFG9 DMI_RXP0 27

    DMI
    H_D#62 H_D#_61 H_DSTBN#_3 CFG10 CFG_9 DMI_TXP_0 DMI_RXP1
    AG2 H_D#_62 11 CFG10 C24 CFG_10 DMI_TXP_1 AE44 DMI_RXP1 27
    H_D#63 AD6 L9 H_DSTBP#0 CFG11 N21 AF46 DMI_RXP2
    H_D#_63 H_DSTBP#_0 H_DSTBP#0 7 11 CFG11 CFG_11 DMI_TXP_2 DMI_RXP2 27
    M8 H_DSTBP#1 CFG12 P21 AH43 DMI_RXP3
    H_DSTBP#_1 H_DSTBP#1 7 11 CFG12 CFG_12 DMI_TXP_3 DMI_RXP3 27
    AA6 H_DSTBP#2 CFG13 T21
    H_DSTBP#_2 H_DSTBP#2 7 11 CFG13 CFG_13
    +H_SWNG C5 AE5 H_DSTBP#3 CFG14 R20
    H_SWING H_DSTBP#_3 H_DSTBP#3 7 11 CFG14 CFG_14
    H_RCOMP E3 CFG15 M20
    H_RCOMP 11 CFG15 CFG_15
    B15 H_REQ#0 CFG16 L21
    H_REQ#_0 H_REQ#0 6 11 CFG16 CFG_16

    GRAPHICS VID
    K13 H_REQ#1 CFG17 H21
    H_REQ#_1 H_REQ#1 6 11 CFG17 CFG_17
    F13 H_REQ#2 CFG18 P29
    H_REQ#_2 H_REQ#2 6 11 CFG18 CFG_18
    B13 H_REQ#3 CFG19 R28
    H_REQ#_3 H_REQ#3 6 11 CFG19 CFG_19
    6 H_RESET# H_RESET# C12 B14 H_REQ#4 CFG20 T28 B33
    H_CPURST# H_REQ#_4 H_REQ#4 6 11 CFG20 CFG_20 GFX_VID_0 T30
    7 H_CPUSLP# H_CPUSLP# E11 B32
    H_CPUSLP# GFX_VID_1 T31
    B6 H_RS#0 H_RS#0 6 G33
    H_RS#_0 GFX_VID_2 T32
    F12 H_RS#1 H_RS#1 6 F33
    B H_RS#_1 GFX_VID_3 T33 B
    C8 H_RS#2 H_RS#2 6 27 PM_BMBUSY# PM_BMBUSY# R29 E33
    H_RS#_2 PM_SYNC# GFX_VID_4 T34
    +H_VREF A11 H_DPRSTP# B7
    H_AVREF 7,26,49 H_DPRSTP# PM_DPRSTP#
    B11 PM_EXTTS#0 N33
    H_DVREF 15 PM_EXTTS#0 PM_EXT_TS#_0
    PM_EXTTS#1 P32
    16 PM_EXTTS#1 PM_EXT_TS#_1

    PM
    CANTIGA ES_FCBGA1329 PM_PWROK AT40 C34
    27,38 PM_PWROK PWROK GFX_VR_EN T35 +VCCP
    PLT_RST# R41
    Layout note: 20,25,30,31,32 PLT_RST#
    6,26 H_THERMTRIP# R42
    1
    1
    2
    2 100_0402_5% THERMTRIP#
    AT11
    T20
    RSTIN#
    0_0402_5% DPRSLPVR THERMTRIP#
    Route H_SCOMP and H_SCOMP# with trace 27,49 DPRSLPVR R32 DPRSLPVR

    1
    width, spacing and impedance (55 ohm) same as

    www.kythuatvitinh.com
    AH37 CL_CLK0 R43
    CL_CLK CL_CLK0 27
    CL_DATA0 1K_0402_1%

    0.1U_0402_16V4Z
    FSB data traces CL_DATA AH36 CL_DATA0 27
    1 @ BG48 NC CL_PWROK AN36 M_PWROK
    M_PWROK 27,38
    C55 BF48 AJ35 CL_RST#
    CL_RST# 27

    2
    NC CL_RST# +CL_VREF
    Layout Note: Layout Note: V_DDR_MCH_REF BD48 AH34

    ME
    NC CL_VREF
    BC48 NC

    1
    H_RCOMP / H_VREF / H_SWNG trace width and spacing is 20/20. 2 BH47 0621 add CLK and DAT for DVI 1
    NC C56 R44
    trace width and spacing is 10/20 BG47 NC
    BE47 N28 0.1U_0402_16V4Z 499_0402_1%
    +1.8V NC DDPC_CTRLCLK T36
    BH46 NC DDPC_CTRLDATA M28 T37 2
    BF46 G36

    2
    +VCCP NC SDVO_CTRLCLK

    NC
    BG45 NC SDVO_CTRLDATA E36
    1

    +VCCP BH44 K36 CLKREQ#_7


    NC CLKREQ#_7 17

    MISC
    R45 CLKREQ# MCH_ICH_SYNC#
    BH43 NC ICH_SYNC# H36 MCH_ICH_SYNC# 27
    221_0603_1%
    1K_0402_1%

    10K_0402_1% BH6 NC
    1

    BH5 NC
    R46 R47 BG4 B12 TSATN#
    TSATN# 38
    2

    V_DDR_MCH_REF NC TSATN#
    15,16 V_DDR_MCH_REF BH3 NC
    BF3 56_0402_5%
    NC
    1
    0.1U_0402_16V4Z

    BH2 1 2 +VCCP
    2

    +H_VREF H_RCOMP +H_SWNG R48 NC R49


    1 BG2 NC HDA_BCLK B28
    C57 10K_0402_1% BE2 B30
    NC HDA_RST#
    24.9_0402_1%

    0.1U_0402_16V4Z

    BG1 NC HDA_SDI B29


    1

    1
    100_0402_1%

    A A
    0.1U_0402_16V4Z

    1 1 BF1 C29
    2

    2 NC HDA_SDO
    2K_0402_1%

    R52 C58 R54 R55 C59 BD1 A28


    NC HDA_SYNC

    HDA
    BC1 NC
    F1 NC
    2 2
    A47
    2

    NC
    CANTIGA ES_FCBGA1329
    Security Classification Compal Secret Data Compal Electronics, Inc.
    within 100 mils from NB Near B3 pin #PV follow check list ver:1.5 change to 10K ohm Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cantiga(1/6)-AGTL/DMI/DDR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 9 of 53
    5 4 3 2 1
    5 4 3 2 1

    D D

    15 DDR_A_D[0..63] 16 DDR_B_D[0..63]
    U2D U2E
    DDR_A_D0 AJ38 BD21 DDR_A_BS0 DDR_B_D0 AK47 BC16 DDR_B_BS0
    SA_DQ_0 SA_BS_0 DDR_A_BS0 15 SB_DQ_0 SB_BS_0 DDR_B_BS0 16
    DDR_A_D1 AJ41 BG18 DDR_A_BS1 DDR_B_D1 AH46 BB17 DDR_B_BS1
    SA_DQ_1 SA_BS_1 DDR_A_BS1 15 SB_DQ_1 SB_BS_1 DDR_B_BS1 16
    DDR_A_D2 AN38 AT25 DDR_A_BS2 DDR_B_D2 AP47 BB33 DDR_B_BS2
    SA_DQ_2 SA_BS_2 DDR_A_BS2 15 SB_DQ_2 SB_BS_2 DDR_B_BS2 16
    DDR_A_D3 AM38 DDR_B_D3 AP46
    DDR_A_D4 SA_DQ_3 DDR_A_RAS# DDR_B_D4 SB_DQ_3
    AJ36 SA_DQ_4 SA_RAS# BB20 DDR_A_RAS# 15 AJ46 SB_DQ_4
    DDR_A_D5 AJ40 BD20 DDR_A_CAS# DDR_B_D5 AJ48 AU17 DDR_B_RAS#
    SA_DQ_5 SA_CAS# DDR_A_CAS# 15 SB_DQ_5 SB_RAS# DDR_B_RAS# 16
    DDR_A_D6 AM44 AY20 DDR_A_WE# DDR_A_WE# 15 DDR_B_D6 AM48 BG16 DDR_B_CAS#
    SA_DQ_6 SA_WE# SB_DQ_6 SB_CAS# DDR_B_CAS# 16
    DDR_A_D7 AM42 DDR_B_D7 AP48 BF14 DDR_B_WE# DDR_B_WE# 16
    DDR_A_D8 SA_DQ_7 DDR_B_D8 SB_DQ_7 SB_WE#
    AN43 SA_DQ_8 AU47 SB_DQ_8
    DDR_A_D9 AN44 DDR_B_D9 AU46
    SA_DQ_9 DDR_A_DM[0..7] 15 SB_DQ_9
    DDR_A_D10 AU40 DDR_B_D10 BA48
    DDR_A_D11 SA_DQ_10 DDR_A_DM0 DDR_B_D11 SB_DQ_10
    AT38 SA_DQ_11 SA_DM_0 AM37 AY48 SB_DQ_11 DDR_B_DM[0..7] 16
    DDR_A_D12 AN41 AT41 DDR_A_DM1 DDR_B_D12 AT47 AM47 DDR_B_DM0
    DDR_A_D13 SA_DQ_12 SA_DM_1 DDR_A_DM2 DDR_B_D13 SB_DQ_12 SB_DM_0 DDR_B_DM1
    AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
    DDR_A_D14 AU44 AU39 DDR_A_DM3 DDR_B_D14 BA47 BD40 DDR_B_DM2
    DDR_A_D15 SA_DQ_14 SA_DM_3 DDR_A_DM4 DDR_B_D15 SB_DQ_14 SB_DM_2 DDR_B_DM3
    AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
    DDR_A_D16 AV39 AY6 DDR_A_DM5 DDR_B_D16 BC46 BG11 DDR_B_DM4
    DDR_A_D17 SA_DQ_16 SA_DM_5 DDR_A_DM6 DDR_B_D17 SB_DQ_16 SB_DM_4 DDR_B_DM5
    AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3
    DDR_A_D18 BA40 AJ5 DDR_A_DM7 DDR_B_D18 BG43 AP1 DDR_B_DM6

    A
    DDR_A_D19 SA_DQ_18 SA_DM_7 DDR_B_D19 SB_DQ_18 SB_DM_6 DDR_B_DM7

    B
    BD43 SA_DQ_19 DDR_A_DQS[0..7] 15 BF43 SB_DQ_19 SB_DM_7 AK2
    DDR_A_D20 AV41 AJ44 DDR_A_DQS0 DDR_B_D20 BE45
    SA_DQ_20 SA_DQS_0 SB_DQ_20 DDR_B_DQS[0..7] 16
    DDR_A_D21 AY43 AT44 DDR_A_DQS1 DDR_B_D21 BC41 AL47 DDR_B_DQS0
    DDR_A_D22 SA_DQ_21 SA_DQS_1 DDR_A_DQS2 DDR_B_D22 SB_DQ_21 SB_DQS_0 DDR_B_DQS1
    BB41 SA_DQ_22 SA_DQS_2 BA43 BF40 SB_DQ_22 SB_DQS_1 AV48
    DDR_A_D23 BC40 BC37 DDR_A_DQS3 DDR_B_D23 BF41 BG41 DDR_B_DQS2
    SA_DQ_23 MEMORY SA_DQS_3 SB_DQ_23 SB_DQS_2

    MEMORY
    DDR_A_D24 AY37 AW12 DDR_A_DQS4 DDR_B_D24 BG38 BG37 DDR_B_DQS3
    DDR_A_D25 SA_DQ_24 SA_DQS_4 DDR_A_DQS5 DDR_B_D25 SB_DQ_24 SB_DQS_3 DDR_B_DQS4
    BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
    DDR_A_D26 AV37 AU8 DDR_A_DQS6 DDR_B_D26 BH35 BB2 DDR_B_DQS5
    DDR_A_D27 SA_DQ_26 SA_DQS_6 DDR_A_DQS7 DDR_B_D27 SB_DQ_26 SB_DQS_5 DDR_B_DQS6
    AT36 SA_DQ_27 SA_DQS_7 AM7 DDR_A_DQS#[0..7] 15 BG35 SB_DQ_27 SB_DQS_6 AU1
    DDR_A_D28 AY38 AJ43 DDR_A_DQS#0 DDR_B_D28 BH40 AN6 DDR_B_DQS7
    C SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 DDR_B_DQS#[0..7] 16 C
    DDR_A_D29 BB38 AT43 DDR_A_DQS#1 DDR_B_D29 BG39 AL46 DDR_B_DQS#0
    DDR_A_D30 SA_DQ_29 SA_DQS#_1 DDR_A_DQS#2 DDR_B_D30 SB_DQ_29 SB_DQS#_0 DDR_B_DQS#1
    AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
    DDR_A_D31 AW36 BD37 DDR_A_DQS#3 DDR_B_D31 BH34 BH41 DDR_B_DQS#2
    DDR_A_D32 SA_DQ_31 SA_DQS#_3 DDR_A_DQS#4 DDR_B_D32 SB_DQ_31 SB_DQS#_2 DDR_B_DQS#3
    BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
    DDR_A_D33 AU11 BD8 DDR_A_DQS#5 DDR_B_D33 BG12 BG9 DDR_B_DQS#4
    DDR_A_D34 SA_DQ_33 SA_DQS#_5 DDR_A_DQS#6 DDR_B_D34 SB_DQ_33 SB_DQS#_4 DDR_B_DQS#5
    BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
    DDR_A_D35 BA12 AM8 DDR_A_DQS#7 DDR_B_D35 BG8 AT2 DDR_B_DQS#6
    SA_DQ_35 SA_DQS#_7 DDR_A_MA[0..14] 15 SB_DQ_35 SB_DQS#_6
    DDR_A_D36 DDR_B_D36 DDR_B_DQS#7
    SYSTEM

    AU13 SA_DQ_36 BH12 SB_DQ_36 SB_DQS#_7 AN5

    SYSTEM
    DDR_A_D37 AV13 BA21 DDR_A_MA0 DDR_B_D37 BF11 DDR_B_MA[0..14] 16
    DDR_A_D38 SA_DQ_37 SA_MA_0 DDR_A_MA1 DDR_B_D38 SB_DQ_37 DDR_B_MA0
    BD12 SA_DQ_38 SA_MA_1 BC24 BF8 SB_DQ_38 SB_MA_0 AV17
    DDR_A_D39 BC12 BG24 DDR_A_MA2 DDR_B_D39 BG7 BA25 DDR_B_MA1
    DDR_A_D40 SA_DQ_39 SA_MA_2 DDR_A_MA3 DDR_B_D40 SB_DQ_39 SB_MA_1 DDR_B_MA2
    BB9 SA_DQ_40 SA_MA_3 BH24 BC5 SB_DQ_40 SB_MA_2 BC25
    DDR_A_D41 BA9 BG25 DDR_A_MA4 DDR_B_D41 BC6 AU25 DDR_B_MA3
    DDR_A_D42 SA_DQ_41 SA_MA_4 DDR_A_MA5 DDR_B_D42 SB_DQ_41 SB_MA_3 DDR_B_MA4
    AU10 SA_DQ_42 SA_MA_5 BA24 AY3 SB_DQ_42 SB_MA_4 AW25
    DDR_A_D43 AV9 BD24 DDR_A_MA6 DDR_B_D43 AY1 BB28 DDR_B_MA5
    DDR_A_D44 SA_DQ_43 SA_MA_6 DDR_A_MA7 DDR_B_D44 SB_DQ_43 SB_MA_5 DDR_B_MA6
    BA11 SA_DQ_44 SA_MA_7 BG27 BF6 SB_DQ_44 SB_MA_6 AU28
    DDR_A_D45 BD9 BF25 DDR_A_MA8 DDR_B_D45 BF5 AW28 DDR_B_MA7
    DDR_A_D46 SA_DQ_45 SA_MA_8 DDR_A_MA9 DDR_B_D46 SB_DQ_45 SB_MA_7 DDR_B_MA8
    AY8 SA_DQ_46 SA_MA_9 AW24 BA1 SB_DQ_46 SB_MA_8 AT33
    DDR_A_D47 BA6 BC21 DDR_A_MA10 DDR_B_D47 BD3 BD33 DDR_B_MA9
    DDR_A_D48 SA_DQ_47 SA_MA_10 DDR_A_MA11 DDR_B_D48 SB_DQ_47 SB_MA_9 DDR_B_MA10
    AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16
    DDR

    DDR_A_D49 AV7 BH26 DDR_A_MA12 DDR_B_D49 AU3 AW33 DDR_B_MA11


    SA_DQ_49 SA_MA_12 SB_DQ_49 SB_MA_11

    DDR
    DDR_A_D50 AT9 BH17 DDR_A_MA13 DDR_B_D50 AR3 AY33 DDR_B_MA12
    DDR_A_D51 SA_DQ_50 SA_MA_13 DDR_A_MA14 DDR_B_D51 SB_DQ_50 SB_MA_12 DDR_B_MA13
    AN8 SA_DQ_51 SA_MA_14 AY25 AN2 SB_DQ_51 SB_MA_13 BH15
    DDR_A_D52 AU5 DDR_B_D52 AY2 AU33 DDR_B_MA14
    DDR_A_D53 SA_DQ_52 DDR_B_D53 SB_DQ_52 SB_MA_14
    AU6 SA_DQ_53 AV1 SB_DQ_53
    DDR_A_D54 AT5 DDR_B_D54 AP3
    DDR_A_D55 SA_DQ_54 DDR_B_D55 SB_DQ_54
    AN10 SA_DQ_55 AR1 SB_DQ_55
    DDR_A_D56 AM11 DDR_B_D56 AL1
    DDR_A_D57 SA_DQ_56 DDR_B_D57 SB_DQ_56
    AM5 SA_DQ_57 AL2 SB_DQ_57
    DDR_A_D58 AJ9 DDR_B_D58 AJ1
    DDR_A_D59 SA_DQ_58 DDR_B_D59 SB_DQ_58
    AJ8 SA_DQ_59 AH1 SB_DQ_59
    DDR_A_D60 AN12 DDR_B_D60 AM2
    B DDR_A_D61 SA_DQ_60 DDR_B_D61 SB_DQ_60 B
    AM13 SA_DQ_61 AM3 SB_DQ_61
    DDR_A_D62 AJ11 DDR_B_D62 AH3
    DDR_A_D63 SA_DQ_62 DDR_B_D63 SB_DQ_62
    AJ12 SA_DQ_63 AJ3 SB_DQ_63
    CANTIGA ES_FCBGA1329 CANTIGA ES_FCBGA1329

    www.kythuatvitinh.com
    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cantiga(2/6)-DDR2 A/B CH
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 10 of 53
    5 4 3 2 1
    5 4 3 2 1

    U2C
    Strap Pin Table
    R57 +VCC_PEG PEGCOMP trace width
    L32 L_BKLT_CTRL 000 = FSB 1066MHz
    G32 T37 1 2 and spacing is 20/25 mils. CFG[2:0] FSB Freq
    L_BKLT_EN PEG_COMPI 49.9_0402_1% 010 = FSB 800MHz
    M32 L_CTRL_CLK PEG_COMPO T36
    select
    M33
    011 = FSB 667MHz
    L_CTRL_DATA PEG_RXN0
    K33 L_DDC_CLK PEG_RX#_0 H44 PEG_RXN0 20 Others = Reserved
    J33 J46 PEG_RXN1
    L_DDC_DATA PEG_RX#_1 PEG_RXN1 20
    L44 PEG_RXN2
    PEG_RX#_2 PEG_RXN2 20
    L40 PEG_RXN3 CFG[4:3] Reserved
    PEG_RX#_3 PEG_RXN3 20
    M29 N41 PEG_RXN4
    L_VDD_EN PEG_RX#_4 PEG_RXN4 20
    C44 P48 PEG_RXN5 0 = DMI x 2
    D LVDS_IBG PEG_RX#_5 PEG_RXN5 20 D
    B43 N44 PEG_RXN6 CFG5 (DMI select) 1 = DMI x 4
    E37
    E38
    LVDS_VBG
    LVDS_VREFH
    PEG_RX#_6
    PEG_RX#_7 T43
    U43
    PEG_RXN7
    PEG_RXN8
    PEG_RXN6 20
    PEG_RXN7 20 *
    0 = The iTPM Host Interface is enable
    LVDS_VREFL PEG_RX#_8 PEG_RXN8 20

    LVDS
    C41 Y43 PEG_RXN9 CFG6
    LVDSA_CLK# PEG_RX#_9 PEG_RXN9 20
    C40 Y48 PEG_RXN10 1 = The iTPM Host Interface is disable
    B37
    A37
    LVDSA_CLK
    LVDSB_CLK#
    PEG_RX#_10
    PEG_RX#_11 Y36
    AA43
    PEG_RXN11
    PEG_RXN12
    PEG_RXN10 20
    PEG_RXN11 20
    0 =(TLS)chiper suite with no confidentiality
    *
    LVDSB_CLK PEG_RX#_12 PEG_RXN12 20
    AD37 PEG_RXN13 CFG7 (Intel Management
    PEG_RX#_13 PEG_RXN13 20
    H47 AC47 PEG_RXN14 1 =(TLS)chiper suite with confidentiality
    E46
    G40
    LVDSA_DATA#_0
    LVDSA_DATA#_1
    PEG_RX#_14
    PEG_RX#_15 AD39 PEG_RXN15
    PEG_RXN14 20
    PEG_RXN15 20
    Engine Crypto strap) *
    LVDSA_DATA#_2 PEG_RXP0
    A40 LVDSA_DATA#_3 PEG_RX_0 H43 PEG_RXP0 20
    J44 PEG_RXP1 CFG8 Reserved
    PEG_RX_1 PEG_RXP1 20

    GRAPHICS
    H48 L43 PEG_RXP2
    LVDSA_DATA_0 PEG_RX_2 PEG_RXP2 20
    D45 L41 PEG_RXP3
    LVDSA_DATA_1 PEG_RX_3 PEG_RXP3 20
    F40 N40 PEG_RXP4 CFG9 (PCIE Graphics 0 = Reverse Lane,15->0, 14->1
    LVDSA_DATA_2 PEG_RX_4 PEG_RXP4 20
    B40 P47 PEG_RXP5
    LVDSA_DATA_3 PEG_RX_5 PEG_RXP5 20
    N43 PEG_RXP6 Lane Reversal) 1 = Normal Operation,Lane Number in
    A41
    H38
    LVDSB_DATA#_0
    PEG_RX_6
    PEG_RX_7 T42
    U42
    PEG_RXP7
    PEG_RXP8
    PEG_RXP6 20
    PEG_RXP7 20 order *
    LVDSB_DATA#_1 PEG_RX_8 PEG_RXP8 20
    G37 Y42 PEG_RXP9
    LVDSB_DATA#_2 PEG_RX_9 PEG_RXP9 20
    J37 W47 PEG_RXP10 CFG10 (PCIE 0 = Enable
    LVDSB_DATA#_3 PEG_RX_10 PEG_RXP10 20
    Y37 PEG_RXP11
    PEG_RX_11 PEG_RXP11 20
    B42 AA42 PEG_RXP12 Lookback 1 = Disable
    G38
    F37
    LVDSB_DATA_0
    LVDSB_DATA_1
    PEG_RX_12
    PEG_RX_13 AD36
    AC48
    PEG_RXP13
    PEG_RXP14
    PEG_RXP12 20
    PEG_RXP13 20
    CFG11
    enable)
    Reserved
    *
    LVDSB_DATA_2 PEG_RX_14 PEG_RXP14 20
    K37 AD40 PEG_RXP15
    LVDSB_DATA_3 PEG_RX_15 PEG_RXP15 20
    00 = Reserved

    PCI-EXPRESS
    J41 PEG_TXN0 C1289 1 2 0.1U_0402_16V4Z PEG_M_TXN0 20 CFG[13:12] (XOR/ALLZ) 01 = XOR Mode Enabled
    PEG_TX#_0 PEG_TXN1 C1290 0.1U_0402_16V4Z
    PEG_TX#_1 M46 1 2 PEG_M_TXN1 20 10 = All Z Mode Enabled
    F25 M47 PEG_TXN2 C1291 1 2 0.1U_0402_16V4Z 11 = Normal Operation (Default)
    C
    H25
    K25
    TVA_DAC
    TVB_DAC
    PEG_TX#_2
    PEG_TX#_3 M40
    M42
    PEG_TXN3
    PEG_TXN4
    C1292
    C1293
    1
    1
    2
    2
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    PEG_M_TXN2 20
    PEG_M_TXN3 20
    PEG_M_TXN4 20
    * C
    TVC_DAC PEG_TX#_4

    TV
    R48 PEG_TXN5 C1294 1 2 0.1U_0402_16V4Z PEG_M_TXN5 20 CFG[15:14] Reserved
    PEG_TX#_5 PEG_TXN6 C1295 0.1U_0402_16V4Z
    H24 TV_RTN PEG_TX#_6 N38 1 2 PEG_M_TXN6 20
    T40 PEG_TXN7 C1296 1 2 0.1U_0402_16V4Z PEG_M_TXN7 20
    PEG_TX#_7 PEG_TXN8 C1297 0.1U_0402_16V4Z
    PEG_TX#_8 U37
    PEG_TXN9 C1298
    1 2
    0.1U_0402_16V4Z
    PEG_M_TXN8 20 CFG16 (FSB Dynamic ODT) 0 = Disabled
    U40 1 2 1 = Enabled
    C31
    E32
    TV_DCONSEL_0
    PEG_TX#_9
    PEG_TX#_10 Y40
    AA46
    PEG_TXN10
    PEG_TXN11
    C1299
    C1300
    1
    1
    2
    2
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    PEG_M_TXN9 20
    PEG_M_TXN10 20
    PEG_M_TXN11 20
    *
    TV_DCONSEL_1 PEG_TX#_11 PEG_TXN12 C1301 0.1U_0402_16V4Z
    PEG_TX#_12 AA37 1 2 PEG_M_TXN12 20 CFG[18:17] Reserved
    AA40 PEG_TXN13 C1302 1 2 0.1U_0402_16V4Z PEG_M_TXN13 20
    PEG_TX#_13 PEG_TXN14 C1303 0.1U_0402_16V4Z
    PEG_TX#_14 AD43 1 2 PEG_M_TXN14 20
    AC46 PEG_TXN15 C1304 1 2 0.1U_0402_16V4Z CFG19 (DMI Lane Reversal) 0 = Normal Operation
    E28
    PEG_TX#_15
    J42 PEG_TXP0 C1305 1 2 0.1U_0402_16V4Z
    PEG_M_TXN15 20

    PEG_M_TXP0 20
    (Lane number in Order) *
    CRT_BLUE PEG_TX_0 PEG_TXP1 C1306 0.1U_0402_16V4Z
    PEG_TX_1 L46 1 2 PEG_M_TXP1 20 1 = Reverse Lane
    G28 M48 PEG_TXP2 C1307 1 2 0.1U_0402_16V4Z PEG_M_TXP2 20
    CRT_GREEN PEG_TX_2 PEG_TXP3 C1308 0.1U_0402_16V4Z
    PEG_TX_3 M39 1 2 PEG_M_TXP3 20
    J28 M43 PEG_TXP4 C1309 1 2 0.1U_0402_16V4Z PEG_M_TXP4 20
    CRT_RED PEG_TX_4
    VGA PEG_TXP5 C1310 0.1U_0402_16V4Z
    R47 1 2 CFG20 (PCIE/SDVO 0 = Only PCIE or SDVO is operational.
    G29 CRT_IRTN
    PEG_TX_5
    PEG_TX_6 N37
    T39
    PEG_TXP6
    PEG_TXP7
    C1311
    C1312
    1
    1
    2
    2
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    PEG_M_TXP5 20
    PEG_M_TXP6 20
    PEG_M_TXP7 20
    concurrent) 1 = PCIE/SDVO are operating simu.
    *
    PEG_TX_7 PEG_TXP8 C1313 0.1U_0402_16V4Z
    H32 CRT_DDC_CLK PEG_TX_8 U36 1 2 PEG_M_TXP8 20
    J32 U39 PEG_TXP9 C1314 1 2 0.1U_0402_16V4Z PEG_M_TXP9 20
    CRT_DDC_DATA PEG_TX_9 PEG_TXP10 C1315 0.1U_0402_16V4Z
    J29 CRT_HSYNC PEG_TX_10 Y39 1 2 PEG_M_TXP10 20
    E29 Y46 PEG_TXP11 C1316 1 2 0.1U_0402_16V4Z PEG_M_TXP11 20
    CRT_TVO_IREF PEG_TX_11 PEG_TXP12 C1317 0.1U_0402_16V4Z +3VS
    L29 CRT_VSYNC PEG_TX_12 AA36 1 2 PEG_M_TXP12 20
    AA39 PEG_TXP13 C1318 1 2 0.1U_0402_16V4Z PEG_M_TXP13 20
    PEG_TX_13 PEG_TXP14 C1319 0.1U_0402_16V4Z
    #PV follow check list ver:1.5 PEG_TX_14 AD42
    PEG_TXP15 C1320
    1 2
    0.1U_0402_16V4Z
    PEG_M_TXP14 20
    PEG_TX_15 AD46 1 2 PEG_M_TXP15 20
    2

    1
    R71 +3VS
    R148 4.02K_0402_1%
    @ CANTIGA ES_FCBGA1329
    B B
    0_0402_5%
    R72 1 2
    1

    2
    9 CFG16
    CFG5 4.02K_0402_1%
    9 CFG5

    1
    @ @ R73 1 2
    9 CFG19
    R74 4.02K_0402_1%
    2.21K_0402_1%
    @R75 1 2
    9 CFG20
    4.02K_0402_1%

    2
    www.kythuatvitinh.com
    @R76 1 2
    9 CFG11
    2.21K_0402_1%

    R77 1 2
    9 CFG12
    2.21K_0402_1%

    R78 1 2
    9 CFG13
    2.21K_0402_1%
    @R79 1 2
    9 CFG6
    2.21K_0402_1% @R80 1 2
    9 CFG14
    2.21K_0402_1%
    R81 1 2
    9 CFG7
    2.21K_0402_1% @R82 1 2
    9 CFG15
    2.21K_0402_1%
    @R83 1 2
    9 CFG8
    2.21K_0402_1%

    @R84 1 2 @R85 1 2
    9 CFG9 9 CFG17
    2.21K_0402_1% 2.21K_0402_1%

    A @R86 1 2 @R87 1 2 A
    9 CFG10 9 CFG18
    2.21K_0402_1% 2.21K_0402_1%

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cantiga(3/6)-VGA/LVDS/TV
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 11 of 53
    5 4 3 2 1
    5 4 3 2 1

    +VCCP
    +V1.05VS_AXF +VCCP
    U2H R93
    1 2

    10U_0805_10V4Z

    1U_0603_10V4Z
    <BOM Structure>
    852mA U13 0_0603_5%
    VTT

    220U_D2_4VM

    4.7U_0805_10V4Z
    73mA VTT T13 1
    B27 VCCA_CRT_DAC VTT U12 1 1 1

    C71

    C72

    C78

    C79
    A26 T12 +
    VCCA_CRT_DAC VTT
    VTT U11
    2.68mA VTT T11
    A25 U10 2 2 2 2

    CRT
    VCCA_DAC_BG VTT
    B25 VSSA_DAC_BG VTT T10
    D
    VTT U9 D

    VTT T9
    VTT U8
    F47 VCCA_DPLLA
    64.8mA VTT T8

    0.47U_0603_10V7K

    4.7U_0805_10V4Z

    2.2U_0805_16V4Z
    U7

    VTT
    VTT +1.8V_SM_CK +1.8V
    L48 64.8mA T7 1 1 1

    PLL
    VCCA_DPLLB VTT R95
    VTT U6

    0.1U_0402_16V4Z
    C80

    C81

    C82
    +1.05VS_HPLL AD1 VCCA_HPLL
    24mA VTT T6 1 2

    10U_0805_10V4Z

    10U_0805_10V4Z
    U5 0_0805_5%
    VTT 2 2 2 @
    +1.05VS_MPLL AE1 VCCA_MPLL
    139.2mA VTT T5 1 1 1

    C84

    C85
    VTT V3
    13.2mA U3

    A LVDS
    VTT

    C83
    J48 VCCA_LVDS VTT V2
    U2 2 2 2
    VTT
    J47 VSSA_LVDS VTT T2
    VTT V1
    @ R96 414uA U1
    VTT
    +3VS 1 2
    0_0603_5% AD48
    +1.5VS_PEG_BG VCCA_PEG_BG
    R97

    A PEG
    +1.5VS 1 2 +1.5VS_TVDAC
    0_0603_5% 50mA +1.05VS_HPLL +VCCP +1.5VS
    1 +1.05VS_PEGPLL AA48 R98 R99
    C89 VCCA_PEG_PLL
    1 2 1 2

    0.022U_0402_16V7K

    0.1U_0402_16V4Z
    MBK2012121YZF_0805 0_0805_5%
    0.1U_0402_16V4Z AR20
    2 VCCA_SM

    0.1U_0402_16V4Z

    10U_0805_10V4Z
    AP20 VCCA_SM 1 1 1 1

    C90

    C91
    AN20 720mA
    VCCA_SM
    POWER

    C92

    C93
    AR17 VCCA_SM
    AP17 VCCA_SM
    +VCCP 2 2 2 2
    +1.05VS_A_SM AN17 VCCA_SM
    AT16 VCCA_SM
    R100 AR16 VCCA_SM

    A SM
    C
    1 2 AP16 VCCA_SM C
    10U_0805_10V4Z

    1 0_0805_5%
    1 1 1
    C94

    C95

    + C96 C97
    +VCC_PEG +VCCP
    220U_D2_4VM 4.7U_0805_10V4Z
    <BOM Structure>

    2 2 2 2 321.35mA +1.05VS_MPLL +VCCP R102


    1U_0603_10V4Z AP28 R101 1 2
    VCCA_SM_CK 0_0805_5%
    AN28 VCCA_SM_CK VCC_AXF B22 +V1.05VS_AXF 1 2

    10U_0805_10V4Z
    AP25 26mA B21 MBK2012121YZF_0805 1

    AXF
    +1.05VS_A_SM_CK VCCA_SM_CK VCC_AXF

    220U_D2_4VM
    R103 AN25 A21 1
    VCCA_SM_CK VCC_AXF

    C101
    1 2 AN24 26mA +
    VCCA_SM_CK 1 1
    1U_0603_10V4Z

    0.1U_0402_16V4Z

    C98
    0_0603_5% AM28 124mA C99 C100
    VCCA_SM_CK_NCTF
    10U_0805_10V4Z

    AM26 VCCA_SM_CK_NCTF 2 2
    1 1 1 1 AM25 VCCA_SM_CK_NCTF A CK 0.1U_0402_16V4Z
    2 2
    10U_0805_10V4Z
    C103

    C104

    C105

    C102 AL25 BF21

    SM CK
    VCCA_SM_CK_NCTF VCC_SM_CK +1.8V_SM_CK
    AM24 VCCA_SM_CK_NCTF VCC_SM_CK BH20
    1U_0603_10V4Z AL24 BG20
    2 2 2 2 VCCA_SM_CK_NCTF VCC_SM_CK
    AM23 VCCA_SM_CK_NCTF VCC_SM_CK BF20
    AL23 VCCA_SM_CK_NCTF
    118.8mA
    TVA 24.15mA +1.05VS_DMI
    K47 +1.05VS_PEGPLL +VCCP +VCCP
    TVB 39.48mA VCC_TX_LVDS
    B24 TVX 24.15mA L1 R104
    VCCA_TV_DAC +3VS_HV
    A24 C35 1 2 1 2
    TV

    VCCA_TV_DAC VCC_HV BLM18PG121SN1D_0603 0_0603_5%


    105.3mA B35
    VCC_HV

    0.1U_0402_16V4Z

    10U_0805_10V4Z

    0.1U_0402_16V4Z
    A35
    HV

    VCC_HV
    1 1

    0.1U_0402_16V4Z

    C106

    C108
    A32 50mA 1
    HDA

    VCC_HDA

    C109
    VCC_PEG V48 +VCC_PEG 1

    C107
    1732mA U48
    VCC_PEG
    2

    2 2
    V47
    PEG

    R107 VCC_PEG 2
    U47
    D TV/CRT

    VCC_PEG 2
    0_0402_5% +1.5VS_TVDAC M25 VCCD_TVDAC
    58.67mA VCC_PEG U46

    B +1.5VS_QDAC L28 48.363mA B


    1

    VCCD_QDAC
    VCC_DMI AH48 +1.05VS_DMI
    +1.05VS_HPLL AF1 157.2mA AF48
    VCCD_HPLL VCC_DMI

    www.kythuatvitinh.com
    AH47
    DMI

    VCC_DMI
    +1.05VS_PEGPLL AA47 VCCD_PEG_PLL
    50mA VCC_DMI AG47
    +VCCP_D
    456mA
    M38
    LVDS

    VCCD_LVDS D3 R105 R106


    L37 A8
    VTTLF

    VCCD_LVDS VTTLF
    VTTLF L1 +VCCP 2 1 1 2 1 2 +3VS_HV
    60.31mA AB2 10_0402_5% 0_0402_5%
    VTTLF CH751H-40PT_SOD323-2
    0.47U_0603_10V7K

    0.47U_0603_10V7K

    0.47U_0603_10V7K

    +3VS
    1 1 1
    C110

    C111

    C112

    CANTIGA ES_FCBGA1329

    2 2 2
    #SI discrete don't use HDA #SI VCCD_QDAC connect to 1.5VS

    +1.5VS_QDAC +1.5VS

    R112
    1 2
    100_0603_1%
    0.01U_0402_16V7K

    0.1U_0402_16V4Z
    C120

    1 1
    C119

    2 2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cantiga(4/6)-PWR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 12 of 53
    5 4 3 2 1
    5 4 3 2 1

    U2G
    3000mA
    Extnal Graphic: 1210.34mA AP33 VCC_SM VCC_AXG_NCTF W28
    AN33 VCC_SM VCC_AXG_NCTF V28
    integrated Graphic: 1930.4mA +1.8V BH32 W26
    U2F VCC_SM VCC_AXG_NCTF
    BG32 VCC_SM VCC_AXG_NCTF V26
    +VCCP

    330U_D2E_2.5VM_R7

    0.01U_0402_16V7K
    BF32 VCC_SM VCC_AXG_NCTF W25

    10U_0805_10V4Z

    10U_0805_10V4Z
    1 BD32 VCC_SM VCC_AXG_NCTF V25
    1 1 2 BC32 VCC_SM VCC_AXG_NCTF W24

    C126

    C122

    C130

    C123
    D AG34 + BB32 V24 D
    VCC VCC_SM VCC_AXG_NCTF
    AC34 VCC BA32 VCC_SM VCC_AXG_NCTF W23
    AB34 VCC AY32 VCC_SM VCC_AXG_NCTF V23
    2 2 2 1
    AA34 VCC AW32 VCC_SM VCC_AXG_NCTF AM21
    Y34 VCC AV32 VCC_SM VCC_AXG_NCTF AL21
    V34 VCC AU32 VCC_SM VCC_AXG_NCTF AK21
    U34 VCC AT32 VCC_SM VCC_AXG_NCTF W21
    AM33 0317 change value AR32 V21
    VCC VCC_SM VCC_AXG_NCTF
    AK33 VCC AP32 VCC_SM VCC_AXG_NCTF U21

    POWER
    AJ33 VCC AN32 VCC_SM VCC_AXG_NCTF AM20
    0.22U_0402_10V4Z

    0.22U_0402_10V4Z

    0.1U_0402_16V4Z
    AG33 VCC BH31 VCC_SM VCC_AXG_NCTF AK20
    220U_D2_4VM

    10U_0805_10V4Z

    1 AF33 BG31 W20

    VCC CORE
    VCC VCC_SM VCC_AXG_NCTF
    1 1 1 1 BF31 VCC_SM VCC_AXG_NCTF U20
    C131

    C124

    C132

    C133

    + C125
    AE33 VCC BG30 VCC_SM VCC_AXG_NCTF AM19
    AC33 VCC BH29 VCC_SM VCC_AXG_NCTF AL19
    AA33 VCC BG29 VCC_SM VCC_AXG_NCTF AK19
    2 2 2 2 2
    Y33 VCC BF29 VCC_SM VCC_AXG_NCTF AJ19
    W33 VCC BD29 VCC_SM VCC_AXG_NCTF AH19
    V33 BC29 AG19

    VCC SM
    VCC VCC_SM VCC_AXG_NCTF
    U33 VCC BB29 VCC_SM VCC_AXG_NCTF AF19
    AH28 VCC BA29 VCC_SM VCC_AXG_NCTF AE19
    AF28 VCC AY29 VCC_SM VCC_AXG_NCTF AB19
    AC28 VCC AW29 VCC_SM VCC_AXG_NCTF AA19
    AA28 VCC AV29 VCC_SM VCC_AXG_NCTF Y19
    AJ26 VCC AU29 VCC_SM VCC_AXG_NCTF W19
    AG26 VCC AT29 VCC_SM VCC_AXG_NCTF V19
    AE26 VCC AR29 VCC_SM VCC_AXG_NCTF U19
    AC26 VCC AP29 VCC_SM VCC_AXG_NCTF AM17
    AH25 VCC VCC_AXG_NCTF AK17
    AG25 VCC BA36 VCC_SM/NC VCC_AXG_NCTF AH17
    AF25 VCC BB24 VCC_SM/NC VCC_AXG_NCTF AG17
    AG24 VCC BD16 VCC_SM/NC VCC_AXG_NCTF AF17
    C
    AJ23 +VCCP BB21 AE17 C
    VCC VCC_SM/NC VCC_AXG_NCTF
    AH23 VCC AW16 VCC_SM/NC VCC_AXG_NCTF AC17
    AF23 VCC AW13 VCC_SM/NC VCC_AXG_NCTF AB17
    POWER
    VCC_NCTF AM32 AT13 VCC_SM/NC VCC_AXG_NCTF Y17
    T32 VCC VCC_NCTF AL32 VCC_AXG_NCTF W17
    VCC_NCTF AK32 6326.84mA VCC_AXG_NCTF V17

    VCC GFX NCTF


    VCC_NCTF AJ32 VCC_AXG_NCTF AM16
    VCC_NCTF AH32 Y26 VCC_AXG VCC_AXG_NCTF AL16
    VCC_NCTF AG32 AE25 VCC_AXG VCC_AXG_NCTF AK16
    VCC_NCTF AE32 AB25 VCC_AXG VCC_AXG_NCTF AJ16
    VCC_NCTF AC32 AA25 VCC_AXG VCC_AXG_NCTF AH16
    VCC_NCTF AA32 AE24 VCC_AXG VCC_AXG_NCTF AG16
    VCC_NCTF Y32 AC24 VCC_AXG VCC_AXG_NCTF AF16
    VCC_NCTF W32 AA24 VCC_AXG VCC_AXG_NCTF AE16
    VCC_NCTF U32 Y24 VCC_AXG VCC_AXG_NCTF AC16
    VCC_NCTF AM30 AE23 VCC_AXG VCC_AXG_NCTF AB16
    VCC_NCTF AL30 AC23 VCC_AXG VCC_AXG_NCTF AA16
    VCC_NCTF AK30 AB23 VCC_AXG VCC_AXG_NCTF Y16
    VCC_NCTF AH30 AA23 VCC_AXG VCC_AXG_NCTF W16
    VCC_NCTF AG30 AJ21 VCC_AXG VCC_AXG_NCTF V16
    VCC_NCTF AF30 AG21 VCC_AXG VCC_AXG_NCTF U16
    VCC_NCTF AE30 AE21 VCC_AXG
    VCC_NCTF AC30 AC21 VCC_AXG
    VCC_NCTF AB30 AA21 VCC_AXG
    VCC_NCTF AA30 Y21 VCC_AXG
    Y30 AH20
    VCC NCTF

    VCC_NCTF VCC_AXG
    VCC_NCTF W30 AF20 VCC_AXG
    VCC_NCTF V30 AE20 VCC_AXG
    VCC_NCTF U30 AC20 VCC_AXG
    VCC_NCTF AL29 AB20 VCC_AXG
    VCC_NCTF AK29 AA20 VCC_AXG
    VCC_NCTF AJ29 T17 VCC_AXG
    B AH29 T16 B
    VCC_NCTF VCC_AXG
    VCC_NCTF AG29 AM15 VCC_AXG
    VCC_NCTF AE29 AL15 VCC_AXG
    VCC_NCTF AC29 AE15 VCC_AXG
    VCC_NCTF AA29 AJ15 VCC_AXG
    VCC_NCTF Y29 AH15 VCC_AXG
    VCC_NCTF W29 AG15 VCC_AXG
    VCC_NCTF V29 AF15 VCC_AXG
    VCC_NCTF AL28 AB15 VCC_AXG

    www.kythuatvitinh.com
    VCC_NCTF AK28 AA15 VCC_AXG
    AL26 Y15

    VCC GFX
    VCC_NCTF VCC_AXG
    VCC_NCTF AK26 V15 VCC_AXG
    VCC_NCTF AK25 U15 VCC_AXG
    VCC_NCTF AK24 AN14 VCC_AXG
    VCC_NCTF AK23 AM14 VCC_AXG
    U14 VCC_AXG VCC_SM_LF AV44 VCCSM_LF1
    T14 BA37 VCCSM_LF2

    VCC SM LF
    VCC_AXG VCC_SM_LF
    VCC_SM_LF AM40 VCCSM_LF3
    VCC_SM_LF AV21 VCCSM_LF4
    VCC_SM_LF AY5 VCCSM_LF5
    VCC_SM_LF AM10 VCCSM_LF6
    CANTIGA ES_FCBGA1329 BB13 VCCSM_LF7
    VCC_SM_LF

    C139 0.1U_0402_16V4Z

    C140 0.1U_0402_16V4Z

    C141

    C142

    C143

    C144

    C145
    1 1 1 1 1 1 1

    PAD T42 AJ14 VCC_AXG_SENSE


    PAD T43 @ AH14 VSS_AXG_SENSE 2 2 2 2 2 2 2

    0.22U_0603_10V7K

    0.22U_0603_10V7K

    0.47U_0402_6.3V6K

    1U_0603_10V4Z

    1U_0603_10V4Z
    @

    A A

    CANTIGA ES_FCBGA1329

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cantiga(5/6)-PWR/GND
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 13 of 53
    5 4 3 2 1
    5 4 3 2 1

    U2J
    U2I BG21 AH8
    VSS VSS
    L12 VSS VSS Y8
    AU48 VSS VSS AM36 AW21 VSS VSS L8
    AR48 VSS VSS AE36 AU21 VSS VSS E8
    AL48 VSS VSS P36 AP21 VSS VSS B8
    BB47 VSS VSS L36 AN21 VSS VSS AY7
    AW47 VSS VSS J36 AH21 VSS VSS AU7
    AN47 VSS VSS F36 AF21 VSS VSS AN7
    AJ47 VSS VSS B36 AB21 VSS VSS AJ7
    AF47 VSS VSS AH35 R21 VSS VSS AE7
    D AD47 AA35 M21 AA7 D
    VSS VSS VSS VSS
    AB47 VSS VSS Y35 J21 VSS VSS N7
    Y47 VSS VSS U35 G21 VSS VSS J7
    T47 VSS VSS T35 BC20 VSS VSS BG6
    N47 VSS VSS BF34 BA20 VSS VSS BD6
    L47 VSS VSS AM34 AW20 VSS VSS AV6
    G47 VSS VSS AJ34 AT20 VSS VSS AT6
    BD46 VSS VSS AF34 AJ20 VSS VSS AM6
    BA46 VSS VSS AE34 AG20 VSS VSS M6
    AY46 VSS VSS W34 Y20 VSS VSS C6
    AV46 VSS VSS B34 N20 VSS VSS BA5
    AR46 VSS VSS A34 K20 VSS VSS AH5
    AM46 VSS VSS BG33 F20 VSS VSS AD5
    V46 VSS VSS BC33 C20 VSS VSS Y5
    R46 VSS VSS BA33 A20 VSS VSS L5
    P46 VSS VSS AV33 BG19 VSS VSS J5
    H46 VSS VSS AR33 A18 VSS VSS H5
    F46 VSS VSS AL33 BG17 VSS VSS F5
    BF44 VSS VSS AH33 BC17 VSS VSS BE4
    AH44 VSS VSS AB33 AW17 VSS
    AD44 P33 AT17 BC3
    AA44
    Y44
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS
    L33
    H33
    R17
    M17
    VSS
    VSS
    VSS
    VSS VSS
    VSS
    VSS
    AV3
    AL3
    U44 VSS VSS N32 H17 VSS VSS R3
    T44 K32 C17 P3
    M44
    F44
    VSS
    VSS
    VSS
    VSS VSS
    VSS
    VSS
    F32
    C32 BA16
    VSS

    VSS
    VSS
    VSS
    VSS
    F3
    BA2
    BC43 VSS VSS A31 VSS AW2
    AV43 VSS VSS AN29 AU16 VSS VSS AU2
    AU43 VSS VSS T29 AN16 VSS VSS AR2
    AM43 VSS VSS N29 N16 VSS VSS AP2
    J43 VSS VSS K29 K16 VSS VSS AJ2
    C C
    C43 VSS VSS H29 G16 VSS VSS AH2
    BG42 VSS VSS F29 E16 VSS VSS AF2
    AY42 VSS VSS A29 BG15 VSS VSS AE2
    AT42 VSS VSS BG28 AC15 VSS VSS AD2
    AN42 VSS VSS BD28 W15 VSS VSS AC2
    AJ42 VSS VSS BA28 A15 VSS VSS Y2
    AE42 VSS VSS AV28 BG14 VSS VSS M2
    N42 VSS VSS AT28 AA14 VSS VSS K2
    L42 VSS VSS AR28 C14 VSS VSS AM1
    BD41 VSS VSS AJ28 BG13 VSS VSS AA1
    AU41 VSS VSS AG28 BC13 VSS VSS P1
    AM41 VSS VSS AE28 BA13 VSS VSS H1
    AH41 VSS VSS AB28
    AD41 VSS VSS Y28 VSS U24
    AA41 VSS VSS P28 AN13 VSS VSS U28
    Y41 VSS VSS K28 AJ13 VSS VSS U25
    U41 VSS VSS H28 AE13 VSS VSS U29
    T41 VSS VSS F28 N13 VSS
    M41 VSS VSS C28 L13 VSS
    G41 VSS VSS BF26 G13 VSS VSS_NCTF AF32
    B41 VSS VSS AH26 E13 VSS VSS_NCTF AB32
    BG40 VSS VSS AF26 BF12 VSS VSS_NCTF V32
    BB40 VSS VSS AB26 AV12 VSS VSS_NCTF AJ30
    AV40 VSS VSS AA26 AT12 VSS VSS_NCTF AM29
    AN40 VSS VSS C26 AM12 VSS VSS_NCTF AF29
    H40 B26 AA12 AB29

    VSS NCTF
    VSS VSS VSS VSS_NCTF
    E40 VSS VSS BH25 J12 VSS VSS_NCTF U26
    AT39 VSS VSS BD25 A12 VSS VSS_NCTF U23
    AM39 VSS VSS BB25 BD11 VSS VSS_NCTF AL20
    AJ39 VSS VSS AV25 BB11 VSS VSS_NCTF V20
    AE39 VSS VSS AR25 AY11 VSS VSS_NCTF AC19
    N39 VSS VSS AJ25 AN11 VSS VSS_NCTF AL17
    B L39 AC25 AH11 AJ17 B
    VSS VSS VSS VSS_NCTF
    B39 VSS VSS Y25 VSS_NCTF AA17
    BH38 VSS VSS N25 Y11 VSS VSS_NCTF U17
    BC38 VSS VSS L25 N11 VSS
    BA38 VSS VSS J25 G11 VSS
    AU38 G25 C11 BH48

    VSS SCB
    VSS VSS VSS VSS_SCB
    AH38 VSS VSS E25 BG10 VSS VSS_SCB BH1
    AD38 VSS VSS BF24 AV10 VSS VSS_SCB A48
    AA38 VSS VSS AD12 AT10 VSS VSS_SCB C1

    www.kythuatvitinh.com
    Y38 VSS VSS AY24 AJ10 VSS VSS_SCB A3
    U38 VSS VSS AT24 AE10 VSS
    T38 VSS VSS AJ24 AA10 VSS NC E1
    J38 VSS VSS AH24 M10 VSS NC D2
    F38 VSS VSS AF24 BF9 VSS NC C3
    C38 VSS VSS AB24 BC9 VSS NC B4
    BF37 VSS VSS R24 AN9 VSS NC A5
    BB37 VSS VSS L24 AM9 VSS NC A6
    AW37 VSS VSS K24 AD9 VSS NC A43
    AT37 VSS VSS J24 G9 VSS NC A44
    AN37 G24 B9 B45

    NC
    VSS VSS VSS NC
    AJ37 VSS VSS F24 BH8 VSS NC C46
    H37 VSS VSS E24 BB8 VSS NC D47
    C37 VSS VSS BH23 AV8 VSS NC B47
    BG36 VSS VSS AG23 AT8 VSS NC A46
    BD36 VSS VSS Y23 NC F48
    AK15 VSS VSS B23 NC E48
    AU36 VSS VSS A23 NC C48
    VSS AJ6 NC B48

    CANTIGA ES_FCBGA1329 CANTIGA ES_FCBGA1329

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Cantiga(6/6)-PWR/GND
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 14 of 53
    5 4 3 2 1
    5 4 3 2 1

    +1.8V +1.8V

    10 DDR_A_DQS#[0..7] V_DDR_MCH_REF
    V_DDR_MCH_REF 9,16

    10 DDR_A_D[0..63] JDIMM1

    2.2U_0805_16V4Z

    0.1U_0402_16V4Z
    1 VREF VSS 2

    C146

    C151
    10 DDR_A_DM[0..7] 3 4 DDR_A_D5 1 1
    DDR_A_D4 VSS DQ4 DDR_A_D0
    5 DQ0 DQ5 6
    10 DDR_A_DQS[0..7] DDR_A_D1 7 8
    DQ1 VSS DDR_A_DM0
    9 VSS DM0 10
    DDR_A_DQS#0 2 2
    10 DDR_A_MA[0..14] 11 DQS0# VSS 12
    DDR_A_DQS0 13 14 DDR_A_D6
    DQS0 DQ6 DDR_A_D7
    15 VSS DQ7 16
    DDR_A_D2 17 18
    D DDR_A_D3 DQ2 VSS DDR_A_D13 D
    19 DQ3 DQ12 20
    Layout Note: 21 22 DDR_A_D12
    DDR_A_D8 VSS DQ13
    23 DQ8 VSS 24
    Place near DDR_A_D9 25 26 DDR_A_DM1
    DQ9 DM1
    JP3 27 VSS VSS 28
    DDR_A_DQS#1 29 30 M_CLK_DDR0
    DQS1# CK0 M_CLK_DDR0 9
    DDR_A_DQS1 31 32 M_CLK_DDR#0
    DQS1 CK0# M_CLK_DDR#0 9
    33 VSS VSS 34
    DDR_A_D11 35 36 DDR_A_D15
    DDR_A_D10 DQ10 DQ14 DDR_A_D14
    37 DQ11 DQ15 38
    +1.8V 39 40
    VSS VSS

    330U_D2E_2.5VM_R7
    41 VSS VSS 42
    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    1 DDR_A_D16 43 44 DDR_A_D20
    DDR_A_D17 DQ16 DQ20 DDR_A_D21
    1 1 1 1 1 1 1 1 1 45 DQ17 DQ21 46
    C152

    C147

    C153

    C154

    C155

    C156

    C148

    C149

    C157

    C150
    + 47 48
    DDR_A_DQS#2 VSS VSS
    49 DQS2# NC 50 PM_EXTTS#0 9
    DDR_A_DQS2 51 52 DDR_A_DM2
    2 2 2 2 2 2 2 2 2 2 DQS2 DM2
    53 VSS VSS 54
    DDR_A_D18 55 56 DDR_A_D23
    DDR_A_D19 DQ18 DQ22 DDR_A_D22
    57 DQ19 DQ23 58
    59 VSS VSS 60
    DDR_A_D29 61 62 DDR_A_D28
    DDR_A_D24 DQ24 DQ28 DDR_A_D25
    63 DQ25 DQ29 64
    65 VSS VSS 66
    DDR_A_DM3 67 68 DDR_A_DQS#3
    DM3 DQS3# DDR_A_DQS3
    69 NC DQS3 70
    71 VSS VSS 72
    DDR_A_D26 73 74 DDR_A_D31
    DDR_A_D27 DQ26 DQ30 DDR_A_D30
    75 DQ27 DQ31 76
    77 VSS VSS 78
    C DDR_CKE0_DIMMA DDR_CKE1_DIMMA C
    Layout Note: 9 DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA 9
    81 VDD VDD 82
    Place one cap close to every 2 83 84
    DDR_A_BS2 NC NC/A15 DDR_A_MA14
    pullup 10 DDR_A_BS2 85 BA2 NC/A14 86
    87 VDD VDD 88
    resistors terminated to +0.9VS DDR_A_MA12 89 A12 A11 90 DDR_A_MA11
    DDR_A_MA9 91 92 DDR_A_MA7
    DDR_A_MA8 A9 A7 DDR_A_MA6
    93 A8 A6 94
    95 VDD VDD 96
    DDR_A_MA5 97 98 DDR_A_MA4
    DDR_A_MA3 A5 A4 DDR_A_MA2
    99 A3 A2 100
    DDR_A_MA1 101 102 DDR_A_MA0
    +0.9V A1 A0
    103 VDD VDD 104
    DDR_A_MA10 105 106 DDR_A_BS1
    A10/AP BA1 DDR_A_BS1 10
    5 10 DDR_A_BS0 107 108 DDR_A_RAS#
    10 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 10
    DDR_A_WE# 109 110 DDR_CS0_DIMMA#
    10 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 9
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    111 VDD VDD 112


    DDR_A_CAS# 113 114 M_ODT0
    10 DDR_A_CAS# CAS# ODT0 M_ODT0 9
    1 1 1 1 1 1 1 1 1 1 1 1 1 DDR_CS1_DIMMA# 115 116 DDR_A_MA13
    9 DDR_CS1_DIMMA# NC/S1# NC/A13
    117 VDD VDD 118
    9 M_ODT1 M_ODT1 119 120
    NC/ODT1 NC
    121 VSS VSS 122
    2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_D37 123 124 DDR_A_D32
    DQ32 DQ36
    C158

    C159

    C160

    C161

    C162

    C163

    C164

    C165

    C166

    C167

    C168

    C169

    C170

    DDR_A_D36 125 126 DDR_A_D33


    DQ33 DQ37
    127 VSS VSS 128
    DDR_A_DQS#4 129 130 DDR_A_DM4
    DDR_A_DQS4 DQS4# DM4
    131 DQS4 VSS 132
    133 134 DDR_A_D34
    DDR_A_D39 VSS DQ38 DDR_A_D35
    135 DQ34 DQ39 136
    DDR_A_D38 137 138
    DQ35 VSS DDR_A_D40
    139 VSS DQ44 140
    DDR_A_D45 141 142 DDR_A_D41
    B DDR_A_D44 DQ40 DQ45 B
    143 DQ41 VSS 144
    145 146 DDR_A_DQS#5
    DDR_A_DM5 VSS DQS5# DDR_A_DQS5
    147 DM5 DQS5 148
    +0.9V
    Layout Note: DDR_A_D47
    149 VSS VSS 150
    DDR_A_D43
    151 DQ42 DQ46 152
    56_0404_4P2R_5% RP1 RP2 56_0404_4P2R_5% Place these resistor DDR_A_D46 153 154 DDR_A_D42
    DDR_A_MA5 DQ43 DQ47
    1 4 4 1 DDR_A_BS2 closely JP3,all 155 VSS VSS 156
    DDR_A_MA8 2 3 3 2 DDR_CKE0_DIMMA DDR_A_D49 157 158 DDR_A_D52
    DQ48 DQ52
    trace length Max=1.5" DDR_A_D48 159 DQ49 DQ53 160 DDR_A_D53

    www.kythuatvitinh.com
    161 VSS VSS 162
    56_0404_4P2R_5% RP3 RP4 56_0404_4P2R_5% 163 164 M_CLK_DDR1
    NC,TEST CK1 M_CLK_DDR1 9
    DDR_A_MA3 1 4 4 1 DDR_A_MA11 165 166 M_CLK_DDR#1
    VSS CK1# M_CLK_DDR#1 9
    DDR_A_MA1 2 3 3 2 DDR_A_MA6 DDR_A_DQS#6 167 168
    DDR_A_DQS6 DQS6# VSS DDR_A_DM6
    169 DQS6 DM6 170
    171 VSS VSS 172
    56_0404_4P2R_5% RP5 RP6 56_0404_4P2R_5% DDR_A_D54 173 174 DDR_A_D51
    DDR_A_BS1 DQ50 DQ54
    1 4 4 1 DDR_A_MA12 DDR_A_D50 175 DQ51 DQ55 176 DDR_A_D55
    DDR_CS0_DIMMA# 2 3 3 2 DDR_A_MA9 177 178
    DDR_A_D61 VSS VSS DDR_A_D57
    179 DQ56 DQ60 180
    DDR_A_D60 181 182 DDR_A_D56
    56_0404_4P2R_5% RP7 RP8 56_0404_4P2R_5% DQ57 DQ61
    183 VSS VSS 184
    DDR_A_BS0 1 4 4 1 DDR_A_MA4 DDR_A_DM7 185 186 DDR_A_DQS#7
    DDR_A_MA10 DM7 DQS7#
    2 3 3 2 DDR_A_MA2 187 VSS DQS7 188 DDR_A_DQS7
    DDR_A_D59 189 190
    DDR_A_D58 DQ58 VSS DDR_A_D62
    191 DQ59 DQ62 192
    56_0404_4P2R_5% RP9 RP10 56_0404_4P2R_5% 193 194 DDR_A_D63
    DDR_A_CAS# VSS DQ63
    1 4 4 1 DDR_A_RAS# 16,17 CLK_SMBDATA
    CLK_SMBDATA 195 SDA VSS 196
    DDR_A_WE# 2 3 3 2 DDR_A_MA0 CLK_SMBCLK 197 198
    16,17 CLK_SMBCLK SCL SAO
    +3VS 199 VDDSPD SA1 200

    1
    10K_0402_5%

    10K_0402_5%
    56_0404_4P2R_5% RP11 RP12 56_0404_4P2R_5%
    2.2U_0603_6.3V4Z

    1 1
    DDR_CS1_DIMMA# 2 1 M_ODT0 FOX_ASOA426-M4R-TR
    0.1U_0402_16V4Z

    3 4

    R115

    R116
    A M_ODT1 1 4 3 2 DDR_A_MA13 C171 C172 A

    2 2
    SO-DIMM A

    2
    RP13 56_0404_4P2R_5%
    4 1 DDR_CKE1_DIMMA
    DDR_A_MA7 1 2 3 2 DDR_A_MA14

    R117 56_0402_5%
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DDRII-SODIMM SLOT1
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 15 of 53
    5 4 3 2 1
    5 4 3 2 1

    +1.8V +1.8V
    10 DDR_B_DQS#[0..7]

    10 DDR_B_D[0..63] V_DDR_MCH_REF
    V_DDR_MCH_REF 9,15

    10 DDR_B_DM[0..7] JDIMM2

    2.2U_0805_16V4Z

    0.1U_0402_16V4Z
    1 VREF VSS 2
    10 DDR_B_DQS[0..7] 3 4 DDR_B_D5 1 1
    DDR_B_D0 VSS DQ4 DDR_B_D4
    5 DQ0 DQ5 6

    C173

    C182
    10 DDR_B_MA[0..14] DDR_B_D1 7 8
    DQ1 VSS DDR_B_DM0
    9 VSS DM0 10
    DDR_B_DQS#0 2 2
    11 DQS0# VSS 12
    DDR_B_DQS0 13 14 DDR_B_D6
    DQS0 DQ6 DDR_B_D7
    15 VSS DQ7 16
    D DDR_B_D2 17 18 D
    DDR_B_D3 DQ2 VSS DDR_B_D12
    Layout Note: 19 DQ3 DQ12 20
    DDR_B_D13
    21 VSS DQ13 22
    Place near DDR_B_D8 23 24
    DDR_B_D9 DQ8 VSS DDR_B_DM1
    JP10 25 DQ9 DM1 26
    27 VSS VSS 28
    DDR_B_DQS#1 29 30 M_CLK_DDR2
    DQS1# CK0 M_CLK_DDR2 9
    DDR_B_DQS1 31 32 M_CLK_DDR#2
    DQS1 CK0# M_CLK_DDR#2 9
    33 VSS VSS 34
    DDR_B_D10 35 36 DDR_B_D14
    DDR_B_D11 DQ10 DQ14 DDR_B_D15
    37 DQ11 DQ15 38
    +1.8V 39 40
    VSS VSS
    5
    41 VSS VSS 42
    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    DDR_B_D21 43 44 DDR_B_D16
    DDR_B_D20 DQ16 DQ20 DDR_B_D17
    1 1 1 1 1 1 1 1 1 45 DQ17 DQ21 46
    C174

    C175

    C176

    C183

    C177

    C178

    C179

    C180

    C181
    47 VSS VSS 48
    DDR_B_DQS#2 49 50
    DQS2# NC PM_EXTTS#1 9
    DDR_B_DQS2 51 52 DDR_B_DM2
    2 2 2 2 2 2 2 2 2 DQS2 DM2
    53 VSS VSS 54
    DDR_B_D19 55 56 DDR_B_D22
    DDR_B_D18 DQ18 DQ22 DDR_B_D23
    57 DQ19 DQ23 58
    59 VSS VSS 60
    DDR_B_D28 61 62 DDR_B_D29
    DDR_B_D25 DQ24 DQ28 DDR_B_D24
    63 DQ25 DQ29 64
    65 VSS VSS 66
    DDR_B_DM3 67 68 DDR_B_DQS#3
    DM3 DQS3# DDR_B_DQS3
    69 NC DQS3 70
    71 VSS VSS 72
    DDR_B_D30 73 74 DDR_B_D26
    DDR_B_D31 DQ26 DQ30 DDR_B_D27
    C
    Layout Note: 75 DQ27 DQ31 76
    C
    77 VSS VSS 78
    Place one cap close to every 2 9 DDR_CKE2_DIMMB
    DDR_CKE2_DIMMB 79 80 DDR_CKE3_DIMMB
    DDR_CKE3_DIMMB 9
    CKE0 NC/CKE1
    pullup 81 VDD VDD 82
    83 NC NC/A15 84
    resistors terminated to +0.9VS 10 DDR_B_BS2
    DDR_B_BS2 85 BA2 NC/A14 86 DDR_B_MA14
    87 VDD VDD 88 0612 add
    DDR_B_MA12 89 90 DDR_B_MA11
    DDR_B_MA9 A12 A11 DDR_B_MA7
    91 A9 A7 92
    DDR_B_MA8 93 94 DDR_B_MA6
    A8 A6
    95 VDD VDD 96
    DDR_B_MA5 97 98 DDR_B_MA4
    +0.9V DDR_B_MA3 A5 A4 DDR_B_MA2
    99 A3 A2 100
    DDR_B_MA1 101 102 DDR_B_MA0
    A1 A0
    5 10 103 VDD VDD 104
    DDR_B_MA10 105 106 DDR_B_BS1
    A10/AP BA1 DDR_B_BS1 10
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    DDR_B_BS0 107 108 DDR_B_RAS#


    10 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 10
    DDR_B_WE# 109 110 DDR_CS2_DIMMB#
    10 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 9
    1 1 1 1 1 1 1 1 1 1 1 1 1 111 VDD VDD 112
    DDR_B_CAS# 113 114 M_ODT2
    10 DDR_B_CAS# CAS# ODT0 M_ODT2 9
    DDR_CS3_DIMMB# 115 116 DDR_B_MA13
    9 DDR_CS3_DIMMB# NC/S1# NC/A13
    117 VDD VDD 118
    2 2 2 2 2 2 2 2 2 2 2 2 2 M_ODT3
    9 M_ODT3 119 NC/ODT1 NC 120
    C184

    C185

    C186

    C187

    C188

    C189

    C190

    C191

    C192

    C193

    C194

    C195

    C196

    121 VSS VSS 122


    DDR_B_D32 123 124 DDR_B_D36
    DDR_B_D37 DQ32 DQ36 DDR_B_D33
    125 DQ33 DQ37 126
    127 VSS VSS 128
    DDR_B_DQS#4 129 130 DDR_B_DM4
    DDR_B_DQS4 DQS4# DM4
    131 DQS4 VSS 132
    133 134 DDR_B_D39
    DDR_B_D34 VSS DQ38 DDR_B_D38
    135 DQ34 DQ39 136
    DDR_B_D35 137 138
    DQ35 VSS DDR_B_D44
    139 VSS DQ44 140
    B DDR_B_D40 DDR_B_D45 B
    Layout Note: DDR_B_D41
    141 DQ40 DQ45 142
    143 DQ41 VSS 144
    Place these resistor 145 146 DDR_B_DQS#5
    +0.9V DDR_B_DM5 VSS DQS5# DDR_B_DQS5
    closely JP3,all 147 DM5 DQS5 148
    149 VSS VSS 150
    trace length Max=1.5" DDR_B_D42 151 DQ42 DQ46 152 DDR_B_D46
    56_0404_4P2R_5% RP14 RP15 56_0404_4P2R_5% DDR_B_D43 153 154 DDR_B_D47
    DDR_B_MA5 DDR_B_MA9 DQ43 DQ47
    1 4 4 1 155 VSS VSS 156
    DDR_B_MA3 2 3 3 2 DDR_CKE2_DIMMB DDR_B_D55 157 158 DDR_B_D51
    DQ48 DQ52

    www.kythuatvitinh.com
    DDR_B_D50 159 160 DDR_B_D54
    DQ49 DQ53
    161 VSS VSS 162
    56_0404_4P2R_5% RP16 RP17 56_0404_4P2R_5% 163 164 M_CLK_DDR3
    NC,TEST CK1 M_CLK_DDR3 9
    DDR_B_BS0 1 4 4 1 DDR_B_MA11 165 166 M_CLK_DDR#3
    VSS CK1# M_CLK_DDR#3 9
    DDR_B_WE# 2 3 3 2 DDR_B_MA14 DDR_B_DQS#6 167 168
    DDR_B_DQS6 DQS6# VSS DDR_B_DM6
    169 DQS6 DM6 170
    171 VSS VSS 172
    56_0404_4P2R_5% RP18 RP19 56_0404_4P2R_5% DDR_B_D52 173 174 DDR_B_D49
    DDR_B_MA0 DDR_B_MA1 DDR_B_D53 DQ50 DQ54 DDR_B_D48
    1 4 4 1 175 DQ51 DQ55 176
    DDR_B_BS1 2 3 3 2 DDR_B_MA8 177 178
    DDR_B_D60 VSS VSS DDR_B_D56
    179 DQ56 DQ60 180
    DDR_B_D61 181 182 DDR_B_D57
    56_0404_4P2R_5% RP20 RP21 56_0404_4P2R_5% DQ57 DQ61
    183 VSS VSS 184
    DDR_B_RAS# 1 4 4 1 DDR_B_MA7 DDR_B_DM7 185 186 DDR_B_DQS#7
    DDR_CS2_DIMMB# 2 DDR_B_MA6 DM7 DQS7# DDR_B_DQS7
    3 3 2 187 VSS DQS7 188
    DDR_B_D63 189 190
    DDR_B_D58 DQ58 VSS DDR_B_D59
    191 DQ59 DQ62 192
    56_0404_4P2R_5% RP22 RP23 56_0404_4P2R_5% 193 194 DDR_B_D62
    DDR_B_MA10 DDR_B_MA4 CLK_SMBDATA VSS DQ63
    1 4 4 1 15,17 CLK_SMBDATA 195 SDA VSS 196
    DDR_B_CAS# 2 3 3 2 DDR_B_MA2 CLK_SMBCLK 197 198 R118
    15,17 CLK_SMBCLK SCL SA0
    +3VS 199 VDDSPD SA1 200 1 2 +3VS

    1
    10K_0402_5%
    56_0404_4P2R_5% RP24 RP25 56_0404_4P2R_5% 10K_0402_5%
    0.1U_0402_16V4Z
    2.2U_0603_6.3V4Z

    1 1

    R119
    A M_ODT3 2 3 4 1 M_ODT2 FOX_AS0A426-N8RN-7F A
    DDR_CS3_DIMMB# 1 4 3 2 DDR_B_MA13 C197 C198
    2 2 SO-DIMM B

    2
    RP26 56_0404_4P2R_5%
    4 1 DDR_B_BS2
    DDR_CKE3_DIMMB 1 2 3 2 DDR_B_MA12
    R120 56_0402_5%
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DDRII-SODIMM SLOT2
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 16 of 53
    5 4 3 2 1
    5 4 3 2 1

    +3VS +3VS_CK505
    FSC FSB CPUFSA SRC PCI REF DOT_96 USB R121
    CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz 1 2
    1 1 1 1 1 1 1
    0_0805_5% C199 C200 C201 C202 C203 C204 C205
    0 0 0 266 100 33.3 14.318 96.0 48.0
    10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    2 2 2 2 2 2 2
    0 0 1 133 100 33.3 14.318 96.0 48.0
    Routing the trace at least 10mil +VCCP +1.05VS_CK505
    0 1 0 200 100 33.3 14.318 96.0 48.0
    CLK_XTAL_OUT

    D CLK_XTAL_IN R122
    Place close to U51 D
    0 1 1 166 100 33.3 14.318 96.0 48.0
    1 2 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z
    Y1
    0_0805_5% 1 1 1 1 1 1 1
    1 0 0 333 100 33.3 14.318 96.0 48.0 2 1 14.31818MHZ_16P C206 C207 C208 C209 C210 C211 C212

    2 2 2 2 2 2 2
    1 0 1 100 100 33.3 14.318 96.0 48.0
    10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    2 2
    1 1 0 400 100 33.3 14.318 96.0 48.0 C213 C214
    18P_0402_50V8J 18P_0402_50V8J
    1 1
    1 1 1 Reserved
    Vendor suggests 22pF
    R123 +3VS_CK505 +1.05VS_CK505
    1 2 +VCCP
    1

    56_0402_5% R_CPU_XDP R124 1 2 0_0402_5% XDP/ITP


    CLK_CPU_XDP 6
    CLRP1 R_CPU_XDP# R125 1 2 0_0402_5%
    CLK_CPU_XDP# 6
    NO SHORT PADS R126 1 2 475_0402_1% R_CLKREQ#_7 R_MCH_3GPLL R127 1 2 0_0402_5%
    9 CLKREQ#_7 CLK_MCH_3GPLL 9
    2

    R128 R130 1 2 0_0402_5% R_MCH_BCLK# R_MCH_3GPLL# R131 1 2 0_0402_5% 3G_PLL


    9 CLK_MCH_BCLK# CLK_MCH_3GPLL# 9
    FSA 1 2 1 2 NB R132 1 2 0_0402_5% R_MCH_BCLK R_CLKREQ#_6 R133 1 2 475_0402_1%
    MCH_CLKSEL0 9 9 CLK_MCH_BCLK CLKREQ#_6 31
    2.2K_0402_5% R129 R134 1 2 0_0402_5% R_CPU_BCLK# R_CLK_PCIE_MCARD2 R135 1 2 0_0402_5%
    6 CLK_CPU_BCLK# CLK_PCIE_MCARD2 31
    R138 1K_0402_5% CPU R136 1 2 0_0402_5% R_CPU_BCLK R_CLK_PCIE_MCARD2# R137 1 2 0_0402_5% MiniCard_WLAN
    6 CLK_CPU_BCLK CLK_PCIE_MCARD2# 31
    7 CPU_BSEL0 1 2 +3VS_CK505
    0_0402_5%
    1

    72
    71
    70
    69
    68
    67
    66
    65
    64
    63
    62
    61
    60
    59
    58
    57
    56
    55
    R139 U3
    1K_0402_5% +3VS_CK505 +1.05VS_CK505

    CPU_0
    CPU_0#

    CPU_1
    CPU_1#

    SRC_8#/CPU_ITP#

    SRC_7
    SRC_7#

    SRC_6
    VDD_CPU

    VSS_CPU

    VDD_CPU_IO
    CLKREQ_7#
    SRC_8/CPU_ITP

    VDD_SRC_IO

    VSS_SRC
    CLKREQ_6#

    SRC_6#
    VDD_SRC
    C C
    2

    @ R141 1 2 0_0402_5%
    27,49 VGATE @ R142 1 2 0_0402_5%
    +VCCP 49 CLK_ENABLE# R140 1 2 0_0402_5% R_CKPWRGD 1 54 H_STP_PCI#
    27 CK_PWRGD CKPWRGD/PD# PCI_STOP# H_STP_PCI# 27
    FSB 2 53 H_STP_CPU#
    FS_B/TEST_MODE CPU_STOP# H_STP_CPU# 27
    3 VSS_REF VDD_SRC_IO 52 MiniCard_WWAN
    2

    @ No Debug port anymore CLK_XTAL_OUT 4 51 R_CLK_PCIE_MCARD0# R144 1 2 0_0402_5%


    XTAL_OUT SRC_10# CLK_PCIE_MCARD0# 31
    R143 CLK_XTAL_IN 5 50 R_CLK_PCIE_MCARD0 R145 1 2 0_0402_5%
    XTAL_IN SRC_10 CLK_PCIE_MCARD0 31
    1K_0402_5% 6 49 R_CLKREQ#_10 R146 1 2 475_0402_1%
    VDD_REF CLKREQ_10# CLKREQ#_10 31
    R147 1 2 33_0402_1% FSC 7 48 R_CLK_SRC11 R725 1 2 0_0402_5%
    27 CLK_14M_ICH REF_0/FS_C/TEST_ SRC_11 CLK_SRC11 32
    REF1 8 47 R_CLK_SRC11# R726 1 2 0_0402_5% Card reader
    CLK_SRC11# 32
    1

    FSB T44 @ CLK_SMBDATA REF_1 SRC_11#


    1 2 MCH_CLKSEL1 9 15,16 CLK_SMBDATA 9 SDA CLKREQ_11# 46
    R150 CLK_SMBCLK 10 45 R_CLK_PCIE_LAN# R152 1 2 0_0402_5%
    15,16 CLK_SMBCLK SCL SRC_9# CLK_PCIE_LAN# 30
    R154 1K_0402_5% 11 44 R_CLK_PCIE_LAN R153 1 2 0_0402_5% GLAN
    NC SRC_9 CLK_PCIE_LAN 30
    1 2 Mini card debug port 12 43 R_CLKREQ#_9 R738 1 2 475_0402_1%
    7 CPU_BSEL1 VDD_PCI CLKREQ_9# CLKREQ#_9 30
    0_0402_5% R169 1 2 39_0402_1% PCI2_1 13 42
    PCI_1 VSS_SRC
    1

    31 CLK_DEBUG_PORT_1 R155 PCI2_2 R_CLKREQ#_4


    1 2 39_0402_1% 14 41 R156 1 2 475_0402_1% CLKREQ#_4 31
    @ 24pin debug port 37 CLK_DEBUG_PORT_0 R158 1 2 33_0402_1% 27_SEL 15
    PCI_2 CLKREQ_4#
    40 R_CLK_PCIE_NCARD# R159 1 2 0_0402_5%
    38 CLK_PCI_EC PCI_3 SRC_4# CLK_PCIE_NCARD# 31
    R157 PCI_CLK3 16 39 R_CLK_PCIE_NCARD R160 1 2 0_0402_5% New Card
    PCI_4/SEL_LCDCL SRC_4 CLK_PCIE_NCARD 31

    USB_1/CLKREQ_A#
    0_0402_5% R161 1 2 33_0402_1% ITP_EN 17 38

    LCDCLK#/27M_SS
    SRC_0#/DOT_96#
    25 CLK_PCI_ICH PCIF_5/ITP_EN VDD_SRC_IO R_CLKREQ#_C R162
    18 37 1 2 475_0402_1% CLKREQ#_C 27
    2

    SRC_0/DOT_96
    VSS_PCI CLKREQ_3#

    VDD_PLL3_IO
    LCDCLK/27M
    USB_0/FS_A

    VDD_PLL3

    VSS_PLL3

    VSS_SRC
    +VCCP

    VDD_48

    SRC_2#

    SRC_3#
    VDD_IO
    VSS_48

    VSS_IO

    SRC_2

    SRC_3
    1

    @ #SI change to 39 ohm


    R163 SLG8SP553VTR_QFN72_10x10

    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    33
    34
    35
    36
    1K_0402_5% +3VS_CK505

    B R164 R_PCIE_SATA# R166 1 2 0_0402_5% B


    CLK_PCIE_SATA# 26
    2

    FSC 1 2 1 2 R167 1 2 39_0402_1% FSA R_PCIE_SATA R168 1 2 0_0402_5% SATA


    MCH_CLKSEL2 9 27 CLK_48M_ICH CLK_PCIE_SATA 26
    10K_0402_5% R165
    R171 1K_0402_5% R_PCIE_ICH# R170 1 2 0_0402_5%
    CLK_PCIE_ICH# 27
    1 2 +1.05VS_CK505 R_PCIE_ICH R172 1 2 0_0402_5% ICH
    7 CPU_BSEL2 CLK_PCIE_ICH 27
    0_0402_5% +1.05VS_CK505
    1

    R173 1 2 0_0402_5% R_CLK_PCIE_VGA


    20 CLK_PCIE_VGA
    @ VGA R175 1 2 0_0402_5% R_CLK_PCIE_VGA# SSCDREFCLK# R176 1 2 33_0402_5%
    20 CLK_PCIE_VGA# 27M_SSC 21
    R174 SSCDREFCLK R177 1 2 33_0402_5% VGA
    27M_CLK 21

    www.kythuatvitinh.com
    0_0402_5%
    2

    +3VS
    +3VS
    #SI change to 33 ohm
    0 = SRC8/SRC8#
    ITP_EN +3VS #PV for WWAN noise add 12P
    1 = ITP/ITP# V R178 R179
    0 = Enable DOT96 & SRC1(UMA) 2.2K_0402_5% 2.2K_0402_5%
    PCI_CLK3 @ C215 CLK_48M_ICH
    1 = Enable SRC0 & 27MHz(DIS) V 2 1
    2

    5P_0402_50V8C
    C216 2 1 CLK_14M_ICH
    21,27,31,37 ICH_SMBDATA 6 1 CLK_SMBDATA 12P_0402_50V8J
    +3VS +3VS @ C217 2 1 CLK_PCI_ICH
    5

    SB, MINI PCI Q3A 2N7002DW-7-F_SOT363-6 4.7P_0402_50V8C


    @ C218 2 1 CLK_PCI_EC
    1

    21,27,31,37 ICH_SMBCLK 3 4 CLK_SMBCLK 4.7P_0402_50V8C


    R180 R181
    10K_0402_5% 10K_0402_5% Q3B 2N7002DW-7-F_SOT363-6
    A A
    2

    ITP_EN PCI_CLK3
    1

    @ @
    R182 R183
    10K_0402_5% 10K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    Clock Generator CK505


    2

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 17 of 53
    5 4 3 2 1
    A B C D E

    +5VS +RCRT_VCC +CRTVDD

    CRT D4 F1 BLUE_L
    GREEN_L
    2 1 1 2 W=40mils
    Connector RB491D_SC59-3 1.1A_6VDC_FUSE
    1 RED_L
    Place close to
    0.1U_0402_16V4Z JCRT

    1
    C220 2 @ D5 @ D6 @ D7
    JCRT1

    DAN217T146_SC59-3

    DAN217T146_SC59-3

    DAN217T146_SC59-3
    6
    11
    1 RED_L 1 1
    +5VS
    7

    3
    12
    GREEN_L 2
    8
    40 D_HSYNC 13
    BLUE_L 3 CONN@
    9 SUYIN_070546FR015S263ZR
    40 D_VSYNC 14 16
    4 17
    +5VS +5VS 10
    15
    C221 C222 5
    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    1 2 1 2
    +3VS
    +CRTVDD +CRTVDD +3VS

    5
    1
    U4
    SN74AHCT1G125GW_SOT353-5 R184

    OE#
    P

    1
    1
    CRT_HSYNC 2 HSYNC_G_A 2 0_0603_5% D_HSYNC
    20 CRT_HSYNC A Y 4 1
    R185 R186 R187 R188

    5
    1
    2.2K_0402_5% 2.2K_0402_5%

    2
    R189 2.2K_0402_5% 2.2K_0402_5% Q5A

    OE#
    P
    3
    CRT_VSYNC 2 4 VSYNC_G_A 1 2 0_0603_5% D_VSYNC
    20 CRT_VSYNC

    2
    2
    A Y D_DDCDATA 3VDDCDA
    6 1 3VDDCDA 21

    G
    U5 1 @ 1 @
    SN74AHCT1G125GW_SOT353-5 C223 C224 2N7002DW-7-F_SOT363-6

    5
    Q5B
    5P_0402_50V8C 5P_0402_50V8C
    2 2 D_DDCCLK <BOM Structure> 3VDDCCL
    3 4 3VDDCCL 21
    2 2

    #SI Remove pull low resistor 2N7002DW-7-F_SOT363-6

    D_DDCDATA 40
    D_DDCCLK 40

    40 RED_L

    40 GREEN_L

    40 BLUE_L
    3 3
    L2 1 2 RED_L
    20 M_RED
    HLC0603CSCCR11JT_0603

    L3 1 2 GREEN_L
    20 M_GREEN
    HLC0603CSCCR11JT_0603

    L4 1 2 BLUE_L
    20 M_BLUE
    HLC0603CSCCR11JT_0603

    www.kythuatvitinh.com
    1

    1
    150_0402_1%

    150_0402_1%

    150_0402_1%

    1 1 1
    C228 C229 C230

    10P_0402_50V8J 10P_0402_50V8J
    2

    2 2 2

    R239 R238 R237


    10P_0402_50V8J

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    CRT Connector
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 18 of 53
    A B C D E
    5 4 3 2 1

    1108 EMI request


    +LCDVDD +3VS
    +LCDVDD +LCDVDD +5VALW Q7
    DMIC_CLK SI2301BDS-T1-E3_SOT23-3

    2
    DMIC_DAT

    S
    1 3

    D
    R198 R199

    4.7U_0805_10V4Z
    1
    1 1 1 1 470_0402_5% 1M_0402_5%
    @ C2110 @ C2111 C231 C232 C233 1

    G
    2
    4.7U_0805_10V4Z

    6 2

    1
    +3VS +LCDVDD INVPWR_B+ 220P_0402_25V8J 220P_0402_25V8J 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 C234
    2 2 2 2
    Q8A 2
    D R200 D
    2 2 1
    C235 C236 C237
    100K_0402_5%

    1
    680P_0402_50V7K

    680P_0402_50V7K

    680P_0402_50V7K
    2N7002DW-7-F_SOT363-6 C238
    1
    LVDS CONN WITH Camera and Digi MIC
    1

    1
    0.047U_0402_16V7K

    3
    Limited Current < 1A
    2

    2
    2 2N7002DW-7-F_SOT363-6 Q8B
    JLVDS1 5
    21 ENAVDD
    1 2 LVDS_A2-
    1 2 LVDS_A2- 20

    0.22U_0603_10V7K
    3 4 LVDS_A2+ C239 1
    LVDS_A2+ 20

    4
    3 4 LVDS_A1- R201
    5 5 6 6 LVDS_A1- 20
    7 8 LVDS_A1+ 2.2K_0402_5%
    7 8 LVDS_A1+ 20
    9 10 LVDS_A0- @
    9 10 LVDS_A0- 20 2
    11 12 LVDS_A0+
    LVDS_A0+ 20

    2
    USB20_P4 11 12 LVDS_ACLK-
    27 USB20_P4 13 13 14 14 LVDS_ACLK- 20
    USB20_N4 15 16 LVDS_ACLK+
    27 USB20_N4 15 16 LVDS_ACLK+ 20
    17 17 18 18
    +3VS 19 20
    19 20
    21 21 22 22
    DMIC_DAT
    Avoid Panel display garbage after power
    23 23 24 24 DMIC_DAT 33
    25 26 DMIC_CLK
    DMIC_CLK 33
    on.
    25 26 +5V_LOGO R727
    27 27 28 28 1 2 +5VS
    29 30 INV_PWM 100_0805_5% +3VS
    29 30 INV_PWM 38
    31 32 BKOFF# BKOFF# 38
    31 32 DAC_BRIG
    33 33 34 34 DAC_BRIG 38
    35 35 36 36 USB_CAM
    37 38 DDC2_CLK
    37 38 DDC2_CLK 21

    2
    39 40 DDC2_DATA
    39 40 DDC2_DATA 21 R202 R203
    41 GND GND 42
    C 2.2K_0402_5% 2.2K_0402_5% C
    ACES_88242-4001

    1
    DDC2_CLK B+ INVPWR_B+
    1 1 DDC2_DATA @
    L5 1 2 0_0805_5%
    C435 C434 DMIC_DAT
    680P_0402_50V7K 680P_0402_50V7K DMIC_CLK
    2 2 L6 1 2
    1 1 FBMA-L11-201209-221LMA30T_0805
    @ @
    C496 C498 0308_Reserve L10 and install
    680P_0402_50V7K 680P_0402_50V7K
    2 2 L11.

    BKOFF#
    1

    R717
    10K_0402_5% #SI2 for EMI
    @
    2

    #PV reserve pull low 10K


    B
    USB Camera Power B
    1106 Add SB control pin
    +5VALW +5VS USB_CAM
    215K_0603_1%
    1

    U42
    1

    PJP604 PJP4
    PAD-OPEN 2x2m PAD-OPEN 2x2m 1 5 R1091
    IN OUT

    www.kythuatvitinh.com
    2 GND
    1
    2

    3 4 C1391
    SHDN BYP
    1
    1

    C1392 G916-390T1UF_SOT23-5 10U_0805_6.3V6M


    2

    R1093 2
    R2072
    10U_0805_6.3V6M 2 0_0402_5%
    2
    1

    @ 100K_0402_1%
    R2073 1 2 0_0402_5%
    27 GPIO20

    #SI change lib


    A
    USB_VCCA is +3.9V A

    USB_VCCA =1.25X(1+R1091/R1093)

    #SI Add GPIO20 control and reserve +5VS

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LCD CONN.
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 19 of 53
    5 4 3 2 1
    A B C D E

    LVDS & DAC Interface


    U17F
    PEG Interface
    NB9M-GS_BGA_533P
    COMMON

    #SI Change to +VDDMEM18 6/13 IFPAB


    IFPA_TXD0 V4 LVDS_A0- 19
    IFPA_TXD0 V5 +PCIE
    LVDS_A0+ 19 U17A
    600 mA
    NB9M-GS_BGA_533P 0.1U_0402_16V4Z 10U_0805_6.3V6M
    +VDD_MEM18 100mA IFPA_TXD1 AA4
    COMMON
    LVDS_A1- 19
    IFPA_TXD1 AA5 LVDS_A1+ 19 1/13 PCI_EXPRESS 1 1 2 1 1
    2 1 4.7U_0603_6.3V6K 4700P_0402_25V7K IFPAB_PLLVDD AD5 IFPAB_PLLVDD PEX_IOVDD AC9
    1 1
    L7 IFPAB_RSET AB6 IFPAB_RSET A PEX_IOVDD AD7
    BLM18PG181SN1D_0603 IFPA_TXD2 Y4 LVDS_A2- 19 PEX_IOVDD AD8 C244 C252 C253 C254 C255
    W4 AE7 2 2 1 2 2
    1 IFPA_TXD2 LVDS_A2+ 19 PEX_IOVDD

    1
    1 1 2 PEX_IOVDD AF7
    PEX_IOVDD AG7 0.1U_0402_16V4Z 1U_0603_10V4Z 4.7U_0603_6.3V6K
    4.7U_0603_6.3V6K R205 IFPA_TXD3 AB5
    2 C257 C246 C247 C248 1K_0402_1% AB4
    IFPA_TXD3
    2 2 1 @ AB13 470P_0402_50V7K
    PEX_IOVDDQ +PCIE

    2
    DATA PEX_IOVDDQ AB16
    IFPB_TXD4 V1 PEX_IOVDDQ AB17 1 1 2 1.920 Amps
    470P_0402_50V7K IFPB_TXD4 W1 PEX_IOVDDQ AB7
    AE9 RFU PEX_IOVDDQ AB8 C258 C249 C259
    PEX_IOVDDQ AB9
    2 2 1
    #SI Change to +VDDMEM18 IFPB_TXD5 W2 PEX_IOVDDQ AC13
    IFPB_TXD5 W3 R204 PEX_IOVDDQ AC7
    +VDD_MEM18 0_0402_5% PEX_IOVDDQ AD6 0.1U_0402_16V4Z 1U_0603_10V4Z
    100 mA B 9,25,30,31,32 PLT_RST# 1 2 PEX_RST# AD9 PEX_RST PEX_IOVDDQ AE6
    2 1 4700P_0402_25V7K 470P_0402_50V7K IFPA_IOVDD V3 IFPA_IOVDD IFPB_TXD6 AA3 PEX_IOVDDQ AF6 4.7U_0603_6.3V6K
    L8 IFPB_TXD6 AA2 PEX_IOVDDQ AG6
    BLM18PG181SN1D_0603 1 1 2 IFPB_IOVDD V2 IFPB_IOVDD 2 1 1
    PEX_REFCLKP AB10 PEX_REFCLK
    17 CLK_PCIE_VGA
    C251 IFPB_TXD7 AA1 PEX_REFCLKN AC10 PEX_REFCLK C262 C263 C264
    17 CLK_PCIE_VGA#
    IFPB_TXD7 AB1
    2 2 C266 1 C267 C265 1 2 0.1U_0402_16V4Z PEX_TXP0 AD10 1 2 2 10U_0805_6.3V6M
    11 PEG_RXP0 PEX_TX0
    4.7U_0603_6.3V6K
    11 PEG_RXN0
    C268 1 2 0.1U_0402_16V4Z PEX_TXN0 AD11 PEX_TX0
    IFPA_TXC AD4 LVDS_ACLK- 19 1U_0603_10V4Z
    A IFPA_TXC AC4 LVDS_ACLK+ 19 11 PEG_M_TXP0 AE12 PEX_RX0
    11 PEG_M_TXN0 AF12 PEX_RX0
    CLOCK
    4700P_0402_25V7K 470P_0402_50V7K IFPB_TXC AB2 11 PEG_RXP1
    C270 1 2 0.1U_0402_16V4Z PEX_TXP1 AD12 PEX_TX1 VDD J10 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z +NVVDD
    B IFPB_TXC AB3 11 PEG_RXN1
    C271 1 2 0.1U_0402_16V4Z PEX_TXN1 AC12 PEX_TX1 VDD J12
    1 2 VDD J13 1 1 1 1 1 1
    11 PEG_M_TXP1 AG12 PEX_RX1 VDD J9
    11 PEG_M_TXN1 AG13 PEX_RX1 VDD L9 C273 C274 C275 C276 C277 C278
    VDD M11
    2 C279 1 C280 C281 1 2 0.1U_0402_16V4Z PEX_TXP2 AB11 M17 2 2 2 2 2 2
    11 PEG_RXP2 PEX_TX2 VDD
    11 PEG_RXN2
    C282 1 2 0.1U_0402_16V4Z PEX_TXN2 AB12 PEX_TX2 VDD M9
    VDD N11 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    11 PEG_M_TXP2 AF13 PEX_RX2 VDD N12
    2
    11 PEG_M_TXN2 AE13 PEX_RX2 VDD N13 2
    VDD N14
    11 PEG_RXP3
    C283 1 2 0.1U_0402_16V4Z PEX_TXP3 AD13 PEX_TX3 VDD N15 0.1U_0402_16V4Z 22U_0805_6.3VAM 22U_0805_6.3VAM 22u X 3
    11 PEG_RXN3
    C284 1 2 0.1U_0402_16V4Z PEX_TXN3 AD14 PEX_TX3 VDD N16
    VDD N17 1 1 1 1 1 0.47u X 7
    11 PEG_M_TXP3 AE15 PEX_RX3 VDD N19
    11 PEG_M_TXN3 AF15 PEX_RX3 VDD N9 C285 C286 C287 C288 C289 0.1u X 7
    VDD P11
    C291 1 2 0.1U_0402_16V4Z PEX_TXP4 AD15 P12 2 2 2 2 2
    11 PEG_RXP4 PEX_TX4 VDD
    11 PEG_RXN4
    C292 1 2 0.1U_0402_16V4Z PEX_TXN4 AC15 PEX_TX4 VDD P13
    VDD P14 470P_0402_50V7K 22U_0805_6.3VAM
    11 PEG_M_TXP4 AG15 PEX_RX4 VDD P15
    11 PEG_M_TXN4 AG16 PEX_RX4 VDD P16
    VDD P17
    11 PEG_RXP5
    C293 1 2 0.1U_0402_16V4Z PEX_TXP5 AB14 PEX_TX5 VDD R11 470P_0402_50V7K 470P_0402_50V7K 470P_0402_50V7K
    11 PEG_RXN5
    C294 1 2 0.1U_0402_16V4Z PEX_TXN5 AB15 PEX_TX5 VDD R12
    VDD R13 1 1 1 1 1 1
    U17D 11 PEG_M_TXP5 AF16 PEX_RX5 VDD R14
    11 PEG_M_TXN5 AE16 PEX_RX5 VDD R15 C295 C296 C297 C298 C299 C300
    NB9M-GS_BGA_533P VDD R16
    COMMON
    C301 1 2 0.1U_0402_16V4Z PEX_TXP6 AC16 R17 2 2 2 2 2 2
    R206 11 PEG_RXP6 PEX_TX6 VDD
    5/13 DACC
    11 PEG_RXN6
    C302 1 2 0.1U_0402_16V4Z PEX_TXN6 AD16 PEX_TX6 VDD R9
    1 2 W5 DACC_VDD VDD T11 470P_0402_50V7K 470P_0402_50V7K 470P_0402_50V7K
    11 PEG_M_TXP6 AE18 PEX_RX6 VDD T17
    10K_0402_5% R6 DACC_VREF 11 PEG_M_TXN6 AF18 PEX_RX6 VDD T9
    VDD U19
    V6 DACC_HSYNC U6 C303 1 2 0.1U_0402_16V4Z PEX_TXP7 AD17 U9
    DACC_RSET
    DAC C DACC_VSYNC U4
    11
    11
    PEG_RXP7
    PEG_RXN7
    C304 1 2 0.1U_0402_16V4Z PEX_TXN7 AD18
    PEX_TX7
    PEX_TX7
    VDD
    VDD
    VDD
    W10
    W12
    11 PEG_M_TXP7 AG18 PEX_RX7 VDD W13
    DACC_RED T5 11 PEG_M_TXN7 AG19 PEX_RX7 VDD W18
    VDD W19
    DACC_GREEN T4 C305 1 2 0.1U_0402_16V4Z PEX_TXP8 AC18 PEX_TX8 VDD W9 +NVVDD_SENSE
    11 PEG_RXP8
    11 PEG_RXN8
    C306 1 2 0.1U_0402_16V4Z PEX_TXN8 AB18 PEX_TX8
    DACC_BLUE R4 R392 0_0402_5%
    11 PEG_M_TXP8 AF19 PEX_RX8 VDD_SENSE W15 1 2
    11 PEG_M_TXN8 AE19 PEX_RX8 GND_SENSE W16

    C307 1 2 0.1U_0402_16V4Z PEX_TX9 AB19 PEX_TX9


    11 PEG_RXP9
    C308 1 2 0.1U_0402_16V4Z PEX_TX9* AB20 PEX_TX9
    3 11 PEG_RXN9 +3VS 3

    11 PEG_M_TXP9 AE21 PEX_RX9 110 mA VDD33


    11 PEG_M_TXN9 AF21 PEX_RX9 VDD33 A12

    1U_0603_10V4Z
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    VDD33 B12
    U17C C309 1 2 0.1U_0402_16V4Z PEX_TX10 AD19 PEX_TX10 VDD33 C12 1 1 1

    CRT
    11 PEG_RXP10
    C310 1 2 0.1U_0402_16V4Z PEX_TX10* AD20 PEX_TX10 VDD33 D12
    11 PEG_RXN10 C311
    BLM18PG181SN1D_0603 NB9M-GS_BGA_533P VDD33 E12 C1476 C314
    COMMON
    150 mA 11 PEG_M_TXP10 AG21 PEX_RX10 VDD33 F12
    2 2 2
    3/13 DACA 11 PEG_M_TXN10 AG22 PEX_RX10
    +3VS 2 1 470P_0402_50V7K DACA_VDD AG2 DACA_VDD
    L9 C315 1 2 0.1U_0402_16V4Z PEX_TX11 AD21 PEX_TX11
    11 PEG_RXP11
    DACA_VREF AF1 DACA_VREF C316 1 2 0.1U_0402_16V4Z PEX_TX11* AC21 PEX_TX11
    11 PEG_RXN11
    AE1 DACA_RSET DACA_HSYNC AD2 CRT_HSYNC 18 11 PEG_M_TXP11 AF22 PEX_RX11
    1

    1 1 1 1 AD1 AE22

    C317 R207
    DAC A DACA_VSYNC CRT_VSYNC 18 11 PEG_M_TXN11

    11 PEG_RXP12
    C322 1 2 0.1U_0402_16V4Z PEX_TX12 AB21
    PEX_RX11

    PEX_TX12 120mA
    1U_0402_6.3V4Z C319 C320 C321 DACA_RED AE2 C323 1 2 0.1U_0402_16V4Z PEX_TX12* AB22 PEX_TX12 4.7U_0603_6.3V6M
    2 2 2 2 M_RED 18 11 PEG_RXN12
    PEX_PLLVDD AF9 PEX_PLLDVDD 2 1 +PCIE
    2

    DACA_GREEN AE3 11 PEG_M_TXP12 AE24 PEX_RX12 L10


    M_GREEN 18
    11 PEG_M_TXN12 AF24 PEX_RX12 1 1 1 1 BLM18PG181SN1D_0603
    4700P_0402_25V7K 0.1U_0402_16V4Z 124_0402_1% DACA_BLUE AD3 M_BLUE 18
    C324 1 2 0.1U_0402_16V4Z PEX_TX13 AC22 PEX_TX13 C327 C325 C446 C447
    11 PEG_RXP13
    C326 1 2 0.1U_0402_16V4Z PEX_TX13* AD22 PEX_TX13
    11 PEG_RXN13 2 2 2 2
    11 PEG_M_TXP13 AG24 PEX_RX13
    1

    11 PEG_M_TXN13 AF25 PEX_RX13


    150_0402_1%

    150_0402_1%

    150_0402_1%

    0.1U_0402_16V4Z 0.01U_0402_25V7K 1U_0402_6.3V4Z


    C328 1 2 0.1U_0402_16V4Z PEX_TX14 AD23 PEX_TX14
    11 PEG_RXP14
    C329 1 2 0.1U_0402_16V4Z PEX_TX14* AD24 PEX_TX14
    11 PEG_RXN14
    R208 200_0402_1%

    TV-OUT
    2

    U17E 11 PEG_M_TXP14 AG25 PEX_RX14 PEX_TSTCLK_OUT AF10 1 2

    www.kythuatvitinh.com
    11 PEG_M_TXN14 AG26 PEX_RX14 PEX_TSTCLK_OUT AE10
    NB9M-GS_BGA_533P R195 R196 R197
    COMMON
    R210 11 PEG_RXP15
    C330 1 2 0.1U_0402_16V4Z PEX_TXP15AE25 PEX_TX15
    4/13 DACB
    11 PEG_RXN15
    C331 1 2 0.1U_0402_16V4Z PEX_TXN15AE26 PEX_TX15 RFU AG9
    1 2 DACB_VDD D7 DACB_VDD
    11 PEG_M_TXP15 AF27 PEX_RX15 PEX_TERMP AG10 1 2
    G6 DACB_VREF 11 PEG_M_TXN15 AE27 PEX_RX15
    4
    10K_0402_5% R209 4
    F8 DACB_RSET 2.49K_0402_1%
    #SI Remove TV out
    DACB_CSYNC D6

    DAC B DACB_RED F7

    DACB_GREEN E7

    DACB_BLUE E6

    #SI Remove TV out Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PEG & LVDS & DAC
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 20 of 53
    A B C D E
    5 4 3 2 1

    U17H
    +3VS
    #SI Change to +VDDMEM18 NB9M-GS_BGA_533P
    COMMON

    7/13 IFPC

    1
    +VDD_MEM18 BLM18PG181SN1D_0603
    U17L
    160 mA MXM DVI DP
    R211 2 1 470P_0402_50V7K IFPC_PLLVDD P6 IFPC_PLLVDD
    NB9M-GS_BGA_533P 10K_0402_5% L12 IFPC_RSET R5 IFPC_RSET
    COMMON

    1
    11/13 MISC 1 1 1 1
    4.7U_0603_6.3V6K C338 IFPC_AUX G5
    ROM_CS B10 ROM_CS# C337 R212 IFPC_AUX G4
    STRAP0 C7 STRAP0 1K_0402_1%
    STRAP1 B9 A10 ROM_SI 2 2 2 C340 2 C341
    STRAP1 ROM_SI

    2
    STRAP2 A9 STRAP2 ROM_SO C10 ROM_SO TXD0 TXD0 IFPC_L3 J4 HDMI_C_CLK- C1474 1 2 0.1U_0402_16V4Z
    ROM_SCLK HDMI_C_CLK+ C1475 HDMI_CLK- 42
    ROM_SCLK C9 C TXD0 TXD0 IFPC_L3 H4 1 2 0.1U_0402_16V4Z HDMI_CLK+ 42
    10K_0402_5% R213 4.7U_0603_6.3V6K 4700P_0402_25V7K
    R214 1 2 +3VS TXD1 TXD2 IFPC_L2 K4 HDMI_C_TX0- C1468 1 2 0.1U_0402_16V4Z HDMI_TX0- 42
    D D
    40.2K_0402_1% A3 HDCP_SCL L4 HDMI_C_TX0+ C1469 1 2 0.1U_0402_16V4Z
    1 2 F11 STRAP_REF_3V3
    I2CH_SCL
    I2CH_SDA A4 HDCP_SDA +PCIE BLM18PG181SN1D_0603 385 mA TXD1 TXD2 IFPC_L2 HDMI_TX0+ 42
    2 1 +3VS TXD2 TXD1 IFPC_L1 M4 HDMI_C_TX1- C1470 1 2 0.1U_0402_16V4Z HDMI_TX1- 42
    1 2 F10 STRAP_REF_MIOB 10K_0402_5% R215 2 1 4700P_0402_25V7K IFPC_IOVDD J6 IFPC_IOVDD TXD2 TXD1 IFPC_L1 M5 HDMI_C_TX1+ C1471 1 2 0.1U_0402_16V4Z HDMI_TX1+ 42
    L13
    40.2K_0402_1% 1 1 1 1 TXC TXC IFPC_L0 N4 HDMI_C_TX2- C1472 1 2 0.1U_0402_16V4Z HDMI_TX2- 42
    R216 BUFRST N5 IFPC_L0 P4 HDMI_C_TX2+ C1473 1 2 0.1U_0402_16V4Z
    TXC TXC HDMI_TX2+ 42
    C342 C343
    F9 SPDIF RFU J5 4.7U_0603_6.3V6K
    +3VS 2 2 2 C346 2 C347
    RFU F6
    4.7U_0603_6.3V6K 470P_0402_50V7K
    1

    SPDIF 10K_0402_5% TESTMODE AD25


    R217 @ C15 RFU U17G
    C349 D15 RFU

    1
    RFU_GND AC6 NB9M-GS_BGA_533P
    2

    COMMON
    1 2 SPDIF_IN 10K_0402_5%
    33 SPDIF_OUT0
    R218 8/13 IFPE
    1

    MXM DVI DP
    10K_0402_5%
    VGA Thermal Sensor

    2
    0.01U_0402_25V7K R220 N6 IFPE_PLLVDD
    @ M6 IFPE_RSET

    1
    ADM1032ARMZ
    2

    R234 IFPE_AUX D4
    +3VS 10K_0402_5%
    Closed to VGA IFPE_AUX D3

    2
    2 TXD0 TXD0 IFPE_L3 B4
    @ C348 IFPE_L3 B3
    E TXD0 TXD0

    2
    +3VS +3VS @
    #SI2 change to pull hi 0.1U_0402_16V4Z R219 TXD1 TXD2 IFPE_L2 C4
    1
    HDCP 2 1
    U6
    10K_0402_5% TXD1 TXD2 IFPE_L2 C3

    ROM 0.1U_0402_16V4Z 1 8 VGA_SM_CLK


    TXD2 TXD1 IFPE_L1 D5

    1
    C351 10K_0402_5% VDD SCLK
    H6 IFPE_IOVDD TXD2 TXD1 IFPE_L1 E4
    1 R221 VGA_THERMDA 2 7 VGA_SM_DA
    D+ SDATA

    1
    @ @ C350 TXC TXC IFPE_L0 F4
    C U7 1 2 VGA_THERMDC 3 6 THERM_SCI# TXC TXC IFPE_L0 F5 C
    THERM_SCI# 27,38
    2

    HDCP_WP HDCP_SCL D- ALERT# R236


    1 A0 VCC 8
    2 7 HDCP_WP 2200P_0402_50V7K THERM#_VGA 4 5 10K_0402_5%
    A1 WP THERM# GND
    1

    1
    3 6 HDCP_SCL

    2
    A2 SCL HDCP_SDA 10K_0402_5% 10K_0402_5% R222
    4 GND SDA 5
    R223 R224 +3VS 1 2 @ ADM1032ARMZ REEL_MSOP8 R1129 0_0402_5%
    AT88SC0808 VGA_SM_CLK 2 1 SMB_EC_CK2 6,38
    @ @ 10K_0402_5% VGA_SM_DA 2 1
    2

    SMB_EC_DA2 6,38
    R1130 0_0402_5%

    +3VS
    9/21 follow 17"
    U17K
    I2CE_SCL 2K_0402_5% 1 2 R227
    NB9M-GS_BGA_533P I2CE_SDA 2K_0402_5% 1 2 R230
    COMMON
    36 mA I2CB_SCL
    12/13 XTAL_PLL 2K_0402_5% 1 2 R231
    BLM18PG181SN1D_0603 I2CB_SDA 2K_0402_5% 1 2 R232
    +PCIE 2 1 0.1U_0402_16V4Z GPU_PLLVDD K5 PLLVDD GPIO I/O ACTIVE USAGE
    L14
    1U_0402_6.3V4Z
    1U_0402_6.3V4Z

    1 1 1 1 1 K6 VID_PLLVDD
    GPIO0 IN N/A Primary DVI Hot-plug
    C497 C352 C353 C354 C355 L6 SP_PLLVDD
    U17M
    2 2 2 2 2
    GPIO1 IN N/A 2nd DVI Hot-plug NB9M-GS_BGA_533P
    COMMON
    1U_0402_6.3V4Z 0.1U_0402_16V4Z
    17 27M_SSC D11 XTAL_SSIN XTAL_OUTBUFF E9 GPIO2 OUT H Panel Back-Light PWM 9/13 I2C_GPIO_THERM_JTAG
    1

    R1
    R228 XTALIN D10 XTAL_IN XTAL_OUT E10XTALOUT R229 GPIO3 OUT H Panel Power Enable
    I2CA_SCL
    I2CA_SDA T3
    3VDDCCL 18
    3VDDCDA 18
    CRT
    10K_0402_5% 1 1 10K_0402_5%
    VGA_THERMDC D8 THERMDN I2CB_SCL R2 I2CB_SCL
    @ @ C357 @ GPIO4 OUT H Panel Back-Light Enable I2CB_SDA R3 I2CB_SDA
    2

    @ C356 18P_0402_50V8J VGA_THERMDA D9 THERMDP


    2 18P_0402_50V8J 2 A2 DDC2_CLK
    GPIO5 OUT N/A NVVDD VID0
    I2CC_SCL
    I2CC_SDA B1 DDC2_DATA
    DDC2_CLK 19
    DDC2_DATA 19
    LVDS
    JTAG_TCK AF3 JTAG_TCK
    T47
    JTAG_TMS
    @ AF4 N2
    B
    R233 0_0402_5% GPIO6 OUT N/A NVVDD VID1
    T48
    JTAG_TDI
    @ AG4
    JTAG_TMS
    JTAG_TDI
    I2CD_SCL
    I2CD_SDA N3
    HDMICLK_VGA 42
    HDMIDAT_VGA 42
    HDMI B
    XTALIN T49 JTAG_TDO
    1 2 @ AE4 JTAG_TDO
    17 27M_CLK T50
    JTAG_TRST
    @ AG3 JTAG_TRST I2CE_SCL Y6 I2CE_SCL
    T51
    1

    GPIO7 OUT N/A FBVDD VID0 @ I2CE_SDA W6 I2CE_SDA


    @ R235
    10K_0402_5%
    GPIO8 IN L Thermal Alert GPIO0 N1
    GPIO1 G1
    2

    HDMI_DETECT 42
    0_0402_5% @ R225 GPIO2 C1
    GPIO9 OUT L FAN PWM 2 1 VGA_SM_CLK T1 I2CS_SCL GPIO3 M2 ENVDD ENAVDD 19
    17,27,31,37 ICH_SMBCLK
    17,27,31,37 ICH_SMBDATA 2 1 VGA_SM_DA T2 I2CS_SDA GPIO4 M3 ENBKL 38
    0_0402_5% R226 GPIO5 K3 GPU_VID0 47
    GPIO10 OUT N/A FBVref Select @ GPIO6 K2 GPU_VID1 47
    GPIO7 J2
    GPIO8 C2 THERMAL ALERT 1 2 THERM#_VGA
    GPIO11 OUT N/A SLI SYNCO GPIO9 M1 SINN_GPIO9 1 2 THERM_SCI#
    GPIO10 D2 0_0402_5% R396
    0_0402_5% R395
    GPU_VID1 GPU_VID0 +NVVDD GPIO11 D1

    Straps GPIO12 IN N/A AC Detect


    0 0 0.9V
    GPIO12
    GPIO13
    GPIO14
    J3
    J1
    K1
    GPIO13 OUT L PS Control or HDMI_CEC GPIO15 F3
    GPIO16 G3
    MULTI LEVEL STRAPS GPIO14 OUT H PS Control
    0 1 1.09V GPIO17
    GPIO18
    G2
    F1 #SI Add GPU_VID1
    GPIO19 F2

    DDR2 Resistor Value HDMI_CLK-


    1 0 unused
    STRAP0 HDMI_CLK+
    STRAP1 Locating R248 HDMI_TX0-
    STRAP2 16MX16 Hynix 20 Kohms HDMI_TX0+
    ROM_SI 16MX16 Samsung 10 Kohms HDMI_TX1-
    ROM_SO HDMI_TX1+

    www.kythuatvitinh.com
    32MX16 Hynix 45 Kohms U17I
    ROM_SCLK 32MX16 Samsung 30 Kohms HDMI_TX2-
    +3VS HDMI_TX2+ NB9M-GS_BGA_533P
    HD AUDIO
    COMMON

    @ 10/13 HDAUDIO
    1 R242 2 1 R243 2
    1

    1
    5.1K_0402_5% 45.3K_0402_1% HDA_BCLK A7 HDA_BITCLK_VGA 26
    A A
    1 R244 2 1 R245 2 @ R960 R961 R962 R963 R964 R965 R966 R967 HDA_SYNC B7 HDA_SYNC_VGA 26
    10K_0402_1% 5.1K_0402_5% 499_0402_1% HDA_SDI A6 HDA_SDIN2_R R399 33_0402_5% 1 2 HDA_SDIN2 26
    <BOM Structure> HDA_SDO B6
    2

    HDA_SDOUT_VGA 26
    @ 1 R246 2 1 R247 2 HDA_RST C6 HDA_RST#_VGA 26
    5.1K_0402_5% 5.1K_0402_5% 499_0402_1% 499_0402_1% 499_0402_1% 499_0402_1%
    499_0402_1% 499_0402_1% 499_0402_1% 9/21 R329 near GPU
    1 R248 @ 1 R249 2 #SI2 add 2N7002 to GND
    45.3K_0402_1% 5.1K_0402_5% 9/21 R237, R238, R240, R241 near ICH
    1

    @ D
    1 R250 2 1 R251 2
    5.1K_0402_5% 5.1K_0402_5% 2 Q74
    +3VS
    G 2N7002_SOT23-3
    Security Classification Compal Secret Data Compal Electronics, Inc.
    1 R252 2 @ 1 R253 2 S Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title
    3

    15K_0402_5% 5.1K_0402_5%
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Straps & HDMI
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 21 of 53
    5 4 3 2 1
    A

    VRAM Interface +VDD_MEM18 1


    PJP605
    2 +1.8VS

    PAD-OPEN 3x3m

    #SI2 change to short pad


    MDA[15..0]
    23 MDA[15..0]
    U17B U17J
    MDA[31..16]
    23 MDA[31..16] NB9M-GS_BGA_533P NB9M-GS_BGA_533P
    MDA[47..32] COMMON COMMON
    24 MDA[47..32]
    2/13 FRAME_BUFFER +VDD_MEM18 13/13 GND_NC
    MDA[63..48] MDA0 D21 FBA_D0
    24 MDA[63..48]
    MDA1 C22 FBA_D1 0.022U_0402_16V7K 0.1U_0402_16V4Z 4.7U_0603_6.3V6K AC11 GND NC AA6
    MDA2 B22 FBA_D2 AC14 GND NC AC19
    MDA3 A22 FBA_D3 1 1 1 1 1 1 AC17 GND NC E15
    MDA4 C24 FBA_D4 FBVDDQ A13 AC2 GND NC T6
    MDA5 B25 FBA_D5 FBVDDQ B13 C358 C366 C359 C360 C367 C368 AC20 GND
    MDA6 A25 FBA_D6 FBVDDQ C13 AC23 GND
    MDA7 A26 D13 2 2 2 2 2 2 AC26
    FBA_D7 FBVDDQ GND
    MDA8 D22 FBA_D8 FBVDDQ D14 AC5 GND
    MDA9 E22 FBA_D9 FBVDDQ E13 0.022U_0402_16V7K 0.022U_0402_16V7K 4.7U_0603_6.3V6K AC8 GND
    MDA10 E24 FBA_D10 FBVDDQ F13 AF11 GND
    MDA11 D24 FBA_D11 FBVDDQ F14 AF14 GND
    MDA12 D26 FBA_D12 FBVDDQ F15 AF17 GND
    MDA13 D27 FBA_D13 FBVDDQ F16 4700P_0402_25V7K 0.022U_0402_16V7K 0.1U_0402_16V4Z AF2 GND
    MDA14 C27 FBA_D14 FBVDDQ F17 AF20 GND
    MDA15 B27 FBA_D15 FBVDDQ F19 1 1 1 1 1 1 AF23 GND
    MDA16 D16 FBA_D16 FBVDDQ F22 AF26 GND
    MDA17 E16 FBA_D17 FBVDDQ H23 C361 C369 C362 C363 C364 C365 AF5 GND
    MDA18 D17 FBA_D18 FBVDDQ H26 AF8 GND
    MDA19 F18 J15 2 2 2 2 2 2 B11
    FBA_D19 FBVDDQ GND
    MDA20 D20 FBA_D20 FBVDDQ J16 B14 GND
    MDA21 F20 FBA_D21 FBVDDQ J18 4700P_0402_25V7K 4700P_0402_25V7K 0.1U_0402_16V4Z
    MDA22 E21 FBA_D22 FBVDDQ J19 B17 GND
    MDA23 F21 FBA_D23 FBVDDQ L19 B2 GND
    MDA24 C16 FBA_D24 FBVDDQ L23 4700P_0402_25V7K 1U_0402_6.3V4Z 0.022U_0402_16V7K B20 GND
    MDA25 B18 FBA_D25 FBVDDQ L26 C373 1 B23 GND
    MDA26 C18 FBA_D26 FBVDDQ M19 1 1 1 1 1 B26 GND
    MDA27 D18 FBA_D27 FBVDDQ N22 C375 B5 GND
    MDA28 C19 FBA_D28 FBVDDQ U22 C370 C371 B8 GND
    MDA29 C21 Y22 2 E11
    FBA_D29 FBVDDQ GND
    MDA30 B21 2 2 2 C372 2
    <BOM Structure> 2 C374 E14
    FBA_D30 GND
    MDA31 A21 FBA_D31 E17 GND
    MDA32 P22 FBA_D32 4700P_0402_25V7K 0.1U_0402_16V4Z 1U_0402_6.3V4Z E2 GND
    MDA33 P24 FBA_D33 E20 GND
    MDA34 R23 FBA_D34 E23 GND
    MDA35 R24 FBA_D35 E26 GND
    MDA36 T23 FBA_D36 E5 GND
    MDA37 U24 FBA_D37 E8 GND
    CMDA[30..0] 23,24
    MDA38 V23 FBA_D38 H2 GND
    MDA39 V24 FBA_D39 FBA_CMD0 F26 CMDA0 H5 GND
    MDA40 N25 FBA_D40 FBA_CMD1 J24 CMDA1 J11 GND
    MDA41 N26 FBA_D41 FBA_CMD2 F25 CMDA2 J14 GND
    MDA42 R25 FBA_D42 FBA_CMD3 M23 CMDA3
    MDA43 R26 FBA_D43 FBA_CMD4 N27 CMDA4 J17 GND
    MDA44 T25 FBA_D44 FBA_CMD5 M27 CMDA5 K19 GND
    MDA45 V26 FBA_D45 FBA_CMD6 K26 CMDA6 K9 GND
    MDA46 V25 FBA_D46 FBA_CMD7 J25 CMDA7 L11 GND
    MDA47 V27 FBA_D47 FBA_CMD8 J27 CMDA8 L12 GND
    MDA48 V22 FBA_D48 FBA_CMD9 G23 CMDA9 L13 GND
    MDA49 W22 FBA_D49 FBA_CMD10 G26 CMDA10 L14 GND
    MDA50 W23 FBA_D50 FBA_CMD11 J23 CMDA11 L15 GND
    MDA51 W24 FBA_D51 FBA_CMD12 M25 CMDA12 L16 GND
    MDA52 AA22 FBA_D52 FBA_CMD13 K27 CMDA13 L17 GND
    MDA53 AB23 FBA_D53 FBA_CMD14 G25 CMDA14 L2 GND
    MDA54 AB24 FBA_D54 FBA_CMD15 L24 CMDA15 L5 GND
    MDA55 AC24 FBA_D55 FBA_CMD16 K23 CMDA16 9/18 add R for nvidia M12 GND
    MDA56 W25 FBA_D56 FBA_CMD17 K24 CMDA17 M13 GND
    MDA57 W26 FBA_D57 FBA_CMD18 G22 CMDA18 M14 GND
    MDA58 W27 FBA_D58 FBA_CMD19 K25 CMDA19 R1131 10K_0402_5% M15 GND
    1 MDA59 AA25 FBA_D59 FBA_CMD20 H22 CMDA20 CMDA12 1 2 M16 GND 1

    MDA60 AB25 FBA_D60 FBA_CMD21 M26 CMDA21 P19 GND


    MDA61 AB26 FBA_D61 FBA_CMD22 H24 CMDA22 P2 GND
    MDA62 AD26 FBA_D62 FBA_CMD23 F27 CMDA23 R394 10K_0402_5% P23 GND
    MDA63 AD27 FBA_D63 FBA_CMD24 J26 CMDA24 CMDA11 1 2
    FBA_CMD25 G24 CMDA25 P26 GND
    FBA_CMD26 G27 CMDA26 P5 GND
    23 DQMA[3..0]
    DQMA0 D23 FBA_DQM0 FBA_CMD27 M24 CMDA27 P9 GND
    DQMA1 C26 FBA_DQM1 FBA_CMD28 K22 CMDA28 T12 GND
    DQMA2 D19 FBA_DQM2 RFU J22 CMDA29 T13 GND
    DQMA3 B19 FBA_DQM3 RFU L22 CMDA30 T14 GND
    24 DQMA[7..4] DQMA4 T24 FBA_DQM4 T15 GND
    DQMA5 T26 FBA_DQM5 T16 GND
    DQMA6 AA23 FBA_DQM6 U11 GND
    DQMA7 AB27 FBA_DQM7 FBA_CLK0 F24 U12 GND
    CLKA0 23
    FBA_CLK0 F23 CLKA0# 23 U13 GND
    23 QSA[3..0] FBA_CLK1 N24 CLKA1 24 U14 GND
    QSA0 A24 FBA_DQS_WP0 FBA_CLK1 N23 U15 GND
    CLKA1# 24
    QSA1 C25 FBA_DQS_WP1 U16 GND
    QSA2 E19 FBA_DQS_WP2 U17 GND
    QSA3 A19 FBA_DQS_WP3 U2 GND
    24 QSA[7..4] QSA4 T22 FBA_DQS_WP4 U23 GND
    QSA5 T27 FBA_DQS_WP5 U26 GND
    QSA6 AA24 FBA_DQS_WP6 U5 GND
    QSA7 AA26 FBA_DQS_WP7 V19 GND

    23 QSA#[3..0] V9 GND
    QSA#0 B24 FBA_DQS_RN0 R254 30_0402_1% W11 GND
    QSA#1 D25 FBA_DQS_RN1 FB_CAL_PD_VDDQ B15 1 2 +VDD_MEM18 W14 GND
    QSA#2 E18 FBA_DQS_RN2 W17 GND
    QSA#3 A18 FBA_DQS_RN3 FB_CAL_PU_GND A15 1 2 R255 30_0402_1% Y2 GND
    24 QSA#[7..4] QSA#4 R22 FBA_DQS_RN4 Y23 GND
    QSA#5 R27 FBA_DQS_RN5 FB_CAL_TERM_GND B16 @1 2 R256 40.2_0402_1% Y26 GND
    QSA#6 Y24 FBA_DQS_RN6 Y5 GND
    QSA#7 AA27 FBA_DQS_RN7

    R257
    FBA_DEBUG M22 1 2 +VDD_MEM18
    10K_0402_5% @

    +VDD_MEM18
    FB_PLLAVDD R19 FB_PLLAVDD 0.01U_0402_25V7K 2 1 +PCIE
    L15
    1

    FB_DLLAVDD T19 1 1 1 1 BLM18PG181SN1D_0603

    @ R258 Rt C376 C377 C379 C380

    www.kythuatvitinh.com
    1K_0402_1% 1U_0402_6.3V4Z
    2 2 2 2
    2

    A16 FB_VREF
    1

    1
    0.1U_0402_16V4Z 1U_0402_6.3V4Z
    @ R259 Rb C378
    1K_0402_1%
    2 @
    2

    0.1U_0402_16V4Z

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    VRAM / GND
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 22 of 53
    A
    5 4 3 2 1

    DATA Bus

    VRAM DDR2 chips (256MB & 512MB) Address


    CMD0
    0..31
    A3
    32..63

    CMD1 A0 A0
    32Mx16 DDR2 400MHz *4==>256MB
    CMD2 A2
    64Mx16 DDR2 400MHz*4==>512MB CMD3 A1 A1
    CMD4 A3
    QSA[7..0] CMD5 A4
    D 22,24 QSA[7..0] D
    QSA#[7..0] CMD6 A5
    22,24 QSA#[7..0]
    DQMA[7..0] CMD7
    22,24 DQMA[7..0]
    MDA[63..0] CMD8 CS# CS#
    22,24 MDA[63..0]
    CMDA[30..0] CMD9 WE# WE#
    22,24 CMDA[30..0]
    CMD10 BA0 BA0
    CMD11 CKE CKE
    CMD12 ODT ODT
    CMD13
    CMD14 A12 A12
    CMD15 RAS# RAS#
    U8 U9 CMD16 A11 A11
    CMDA10 L2 B9 MDA7 CMDA10 L2 B9 MDA27
    CMDA18 BA0 DQ15 MDA0 CMDA18 BA0 DQ15 MDA28
    L3 BA1 DQ14 B1 L3 BA1 DQ14 B1 CMD17 A10 A10
    D9 MDA5 D9 MDA24
    CMDA14 DQ13 MDA2 CMDA14 DQ13 MDA31
    R2 A12 DQ12 D1 R2 A12 DQ12 D1 CMD18 BA1 BA1
    CMDA16 P7 D3 MDA3 CMDA16 P7 D3 MDA30
    CMDA17 A11 DQ11 MDA4 CMDA17 A11 DQ11 MDA25
    M2 A10/AP DQ10 D7 M2 A10/AP DQ10 D7 CMD19 A8 A8
    CMDA20 P3 C2 MDA1 CMDA20 P3 C2 MDA29
    CMDA19 A9 DQ9 MDA6 CMDA19 A9 DQ9 MDA26
    P8 A8 DQ8 C8 P8 A8 DQ8 C8 CMD20 A9 A9
    CMDA23 P2 F9 MDA23 CMDA23 P2 F9 MDA15
    CMDA21 A7 DQ7 MDA18 CMDA21 A7 DQ7 MDA9
    C
    N7 A6 DQ6 F1 N7 A6 DQ6 F1 CMD21 A6 A6 C
    CMDA22 N3 H9 MDA20 CMDA22 N3 H9 MDA12
    CMDA24 A5 DQ5 MDA16 CMDA24 A5 DQ5 MDA8
    N8 A4 DQ4 H1 N8 A4 DQ4 H1 CMD22 A5
    CMDA0 N2 H3 MDA17 CMDA0 N2 H3 MDA11
    CMDA2 A3 DQ3 MDA21 CMDA2 A3 DQ3 MDA13
    M7 A2 DQ2 H7 M7 A2 DQ2 H7 CMD23 A7 A7
    CMDA3 M3 G2 MDA19 CMDA3 M3 G2 MDA10
    CMDA1 A1 DQ1 MDA22 CMDA1 A1 DQ1 MDA14
    M8 A0 DQ0 G8 M8 A0 DQ0 G8 CMD24 A4
    CMD25 CAS# CAS#
    CLKA0# K8 A9 CLKA0# K8 A9
    CK VDDQ1 +VDD_MEM18 CK VDDQ1 +VDD_MEM18
    CLKA0 J8 C1 CLKA0 J8 C1 CMD26 A13 A13
    CK VDDQ2 CK VDDQ2
    VDDQ3 C3 VDDQ3 C3
    CMDA11 K2 C7 CMDA11 K2 C7 CMD27 BA2 BA2
    CKE VDDQ4 CKE VDDQ4
    VDDQ5 C9 VDDQ5 C9
    VDDQ6 E9 VDDQ6 E9 CMD28
    VDDQ7 G1 VDDQ7 G1
    CMDA8 L8 G3 CMDA8 L8 G3 CMD29
    CS VDDQ8 CS VDDQ8
    VDDQ9 G7 VDDQ9 G7
    CMDA9 K3 G9 CMDA9 K3 G9 CMD30
    WE VDDQ10 WE VDDQ10
    CMDA15 K7 A1 CMDA15 K7 A1
    RAS VDD1 RAS VDD1
    VDD2 E1 VDD2 E1
    CMDA25 L7 J9 CMDA25 L7 J9
    CAS VDD3 CAS VDD3
    VDD4 M9 VDD4 M9
    DQMA2 F3 R1 DQMA1 F3 R1
    DQMA0 LDM VDD5 DQMA3 LDM VDD5
    B3 UDM B3 UDM
    J1 0.1U_0402_16V4Z J1 0.1U_0402_16V4Z
    VDDL VDDL
    VSSDL J7 1 1 VSSDL J7 1 1
    CMDA12 K9 CMDA12 K9
    ODT C383 C384 ODT C381 C382
    4.7U_0805_6.3V6K 4.7U_0805_6.3V6K
    +VDD_MEM18 QSA2 F7 2 2 QSA1 F7 2 2
    QSA#2 LDQS QSA#1 LDQS
    E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7
    B B2 B2 B
    VSSQ2 VSSQ2
    VSSQ3 B8 VSSQ3 B8
    1

    VSSQ4 D2 VSSQ4 D2
    R260 QSA0 B7 D8 QSA3 B7 D8
    1K_0402_1% QSA#0 UDQS VSSQ5 QSA#3 UDQS VSSQ5 CLKA0
    A8 UDQS VSSQ6 E7 A8 UDQS VSSQ6 E7 22 CLKA0
    VSSQ7 F2 VSSQ7 F2

    1
    F8 #PV reserve CMD27 to suport 64M x 16 F8
    2

    MEM_VREF0 VSSQ8 MEM_VREF0 VSSQ8 R261


    J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2
    H8 H8 475_0402_1%
    VSSQ10 VSSQ10
    1

    1 A2 NC#A2 A2 NC#A2
    R262 E2 A3 E2 A3

    2
    1K_0402_1% C385 CMDA27 NC#E2 VSS1 CMDA27 NC#E2 VSS1 CLKA0#
    L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3 22 CLKA0#
    R3 NC#R3 VSS3 J3 R3 NC#R3 VSS3 J3
    2

    www.kythuatvitinh.com
    R7 N1 R7 N1
    2

    0.1U_0402_16V4Z NC#R7 VSS4 NC#R7 VSS4


    R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9
    (SSTL-1.8) VREF = .5*VDDQ
    HY5PS561621F-25 HY5PS561621F-25

    DDR BGA MEMORY


    DDR2 BGA MEMORY
    +VDD_MEM18 +VDD_MEM18

    0.01U_0402_16V7K 4.7U_0805_6.3V6K 0.1U_0402_16V4Z 0.01U_0402_16V7K 4.7U_0805_6.3V6K 0.01U_0402_16V7K

    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
    C395 C396 C397 C398 C399 C400 C401 C402 C386 C387 C388 C389 C390 C391 C392 C393
    A 1000P_0402_50V7K 1000P_0402_50V7K A
    2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

    0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K 0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LS-2821 ATI_M56-P VGA Board
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    0.1
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    CHANNEL A EXT. 256M_1
    Date: Monday, February 25, 2008 Sheet 7 of 16
    5 4 3 2 1
    5 4 3 2 1

    DATA Bus

    VRAM DDR2 chips (256MB & 512MB) Address


    CMD0
    0..31
    A3
    32..63

    32Mx16 DDR2 400MHz *4==>256MB CMD1 A0 A0


    CMD2 A2
    64Mx16 DDR2 400MHz*4==>512MB
    CMD3 A1 A1
    CMD4 A3
    D DQMA[7..0] CMD5 A4 D
    22,23 DQMA[7..0]
    CMDA[30..0] CMD6 A5
    22,23 CMDA[30..0]
    QSA#[7..0] CMD7
    22,23 QSA#[7..0]
    QSA[7..0] CMD8 CS# CS#
    22,23 QSA[7..0]
    MDA[63..0] CMD9 WE# WE#
    22,23 MDA[63..0]
    CMD10 BA0 BA0
    CMD11 CKE CKE
    CMD12 ODT ODT
    CMD13
    CMD14 A12 A12
    CMD15 RAS# RAS#
    CMD16 A11 A11
    CMD17 A10 A10
    U10 U11 CMD18 BA1 BA1
    CMDA10 L2 B9 MDA39 CMDA10 L2 B9 MDA59
    CMDA18 BA0 DQ15 MDA32 CMDA18 BA0 DQ15 MDA60
    L3 BA1 DQ14 B1 L3 BA1 DQ14 B1 CMD19 A8 A8
    D9 MDA38 D9 MDA58
    CMDA14 DQ13 MDA34 CMDA14 DQ13 MDA62
    R2 A12 DQ12 D1 R2 A12 DQ12 D1 CMD20 A9 A9
    CMDA16 P7 D3 MDA33 CMDA16 P7 D3 MDA63
    C CMDA17 A11 DQ11 MDA37 CMDA17 A11 DQ11 MDA56 C
    M2 A10/AP DQ10 D7 M2 A10/AP DQ10 D7 CMD21 A6 A6
    CMDA20 P3 C2 MDA35 CMDA20 P3 C2 MDA61
    CMDA19 A9 DQ9 MDA36 CMDA19 A9 DQ9 MDA57
    P8 A8 DQ8 C8 P8 A8 DQ8 C8 CMD22 A5
    CMDA23 P2 F9 MDA44 CMDA23 P2 F9 MDA51
    CMDA21 A7 DQ7 MDA43 CMDA21 A7 DQ7 MDA53
    N7 A6 DQ6 F1 N7 A6 DQ6 F1 CMD23 A7 A7
    CMDA6 N3 H9 MDA47 CMDA6 N3 H9 MDA48
    CMDA5 A5 DQ5 MDA40 CMDA5 A5 DQ5 MDA55
    N8 A4 DQ4 H1 N8 A4 DQ4 H1 CMD24 A4
    CMDA4 N2 H3 MDA41 CMDA4 N2 H3 MDA52
    CMDA13 A3 DQ3 MDA46 CMDA13 A3 DQ3 MDA49
    M7 A2 DQ2 H7 M7 A2 DQ2 H7 CMD25 CAS# CAS#
    CMDA3 M3 G2 MDA42 CMDA3 M3 G2 MDA54
    CMDA1 A1 DQ1 MDA45 CMDA1 A1 DQ1 MDA50
    M8 A0 DQ0 G8 M8 A0 DQ0 G8 CMD26 A13 A13
    CMD27 BA2 BA2
    CLKA1# K8 A9 +VDD_MEM18 CLKA1# K8 A9 +VDD_MEM18
    CLKA1 CK VDDQ1 CLKA1 CK VDDQ1
    J8 CK VDDQ2 C1 J8 CK VDDQ2 C1 CMD28
    VDDQ3 C3 VDDQ3 C3
    CMDA11 K2 C7 CMDA11 K2 C7 CMD29
    CKE VDDQ4 CKE VDDQ4
    VDDQ5 C9 VDDQ5 C9
    VDDQ6 E9 VDDQ6 E9 CMD30
    VDDQ7 G1 VDDQ7 G1
    CMDA8 L8 G3 CMDA8 L8 G3
    CS VDDQ8 CS VDDQ8
    VDDQ9 G7 VDDQ9 G7
    CMDA9 K3 G9 CMDA9 K3 G9
    WE VDDQ10 WE VDDQ10
    CMDA15 K7 A1 CMDA15 K7 A1
    RAS VDD1 RAS VDD1
    VDD2 E1 VDD2 E1
    CMDA25 L7 J9 CMDA25 L7 J9
    CAS VDD3 CAS VDD3
    VDD4 M9 VDD4 M9
    DQMA5 F3 R1 DQMA6 F3 R1
    DQMA4 LDM VDD5 DQMA7 LDM VDD5
    B3 UDM B3 UDM
    J1 0.1U_0402_16V4Z J1 0.1U_0402_16V4Z
    VDDL VDDL
    VSSDL J7 1 1 VSSDL J7 1 1
    B CMDA12 K9 CMDA12 K9 B
    ODT C405 C406 ODT C403 C404
    +VDD_MEM18 4.7U_0805_6.3V6K
    QSA5 F7 2 2 QSA6 F7 2 2
    QSA#5 LDQS 4.7U_0805_6.3V6K QSA#6 LDQS
    E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7
    VSSQ2 B2 VSSQ2 B2
    1

    VSSQ3 B8 VSSQ3 B8
    R266 D2 D2
    1K_0402_1% QSA4 VSSQ4 QSA7 VSSQ4 CLKA1
    B7 UDQS VSSQ5 D8 B7 UDQS VSSQ5 D8 22 CLKA1
    QSA#4 A8 E7 QSA#7 A8 E7
    UDQS VSSQ6 UDQS VSSQ6
    F2 F2
    2

    VSSQ7 VSSQ7

    1
    MEM_VREF1 VSSQ8 F8 #PV reserve CMD27 to suport 64M x 16 MEM_VREF1 VSSQ8 F8
    R267
    J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2

    www.kythuatvitinh.com
    H8 H8 475_0402_1%
    VSSQ10 VSSQ10
    1

    1 A2 NC#A2 A2 NC#A2
    R268 E2 A3 E2 A3

    2
    1K_0402_1% C407 CMDA27 NC#E2 VSS1 CMDA27 NC#E2 VSS1 CLKA1#
    L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3 22 CLKA1#
    R3 NC#R3 VSS3 J3 R3 NC#R3 VSS3 J3
    2 R7 N1 R7 N1
    2

    NC#R7 VSS4 NC#R7 VSS4


    R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9
    0.1U_0402_16V4Z

    HY5PS561621F-25 HY5PS561621F-25

    +VDD_MEM18 DDR2 BGA MEMORY +VDD_MEM18 DDR BGA MEMORY

    0.01U_0402_16V7K 4.7U_0805_6.3V6K 0.1U_0402_16V4Z 0.01U_0402_16V7K 4.7U_0805_6.3V6K 0.01U_0402_16V7K

    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
    A C417 C418 C419 C420 C421 C422 C423 C424 C408 C409 C410 C411 C412 C413 C414 C415 A
    1000P_0402_50V7K 1000P_0402_50V7K
    2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
    0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K
    0.01U_0402_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LS-2821 ATI_M56-P VGA Board
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    0.1
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    CHANNEL A EXT. 256M_2
    Date: Monday, February 25, 2008 Sheet 8 of 16
    5 4 3 2 1
    5 4 3 2 1

    +3VS

    R272 1 2 8.2K_0402_5% PCI_DEVSEL#

    R273 1 2 8.2K_0402_5% PCI_STOP#

    R274 1 2 8.2K_0402_5% PCI_TRDY#

    R275 1 2 8.2K_0402_5% PCI_FRAME# U12B


    D11 F1 PCI_REQ0#
    R276 1 PCI_PLOCK# AD0 REQ0# PCI_GNT0#
    2 8.2K_0402_5% C8 AD1 GNT0# G4
    D PCI_REQ1# D
    R277 1 2 8.2K_0402_5% PCI_IRDY#
    D9
    E12
    AD2 PCI REQ1#/GPIO50 B6
    A7
    AD3 GNT1#/GPIO51 PCI_REQ2#
    E9 AD4 REQ2#/GPIO52 F13
    R278 1 2 8.2K_0402_5% PCI_SERR# C9 F12
    AD5 GNT2#/GPIO53 PCI_REQ3#
    E10 AD6 REQ3#/GPIO54 E6
    R279 1 2 8.2K_0402_5% PCI_PERR# B7 F6 PCI_GNT3#
    AD7 GNT3#/GPIO55
    C7 AD8
    C5 AD9 C/BE0# D8
    G11 AD10 C/BE1# B4 Place closely pin
    F8 AD11 C/BE2# D6
    F11 A5 D4
    AD12 C/BE3# CLK_PCI_ICH
    E7 AD13
    A3 D3 PCI_IRDY#
    AD14 IRDY#

    1
    +3VS D2 E3 @
    AD15 PAR PCI_RST# R280
    F10 AD16 PCIRST# R1 PCI_RST# 37,38
    D5 C6 PCI_DEVSEL# 10_0402_5%
    R281 1 PCI_PIRQA# AD17 DEVSEL# PCI_PERR#
    2 8.2K_0402_5% D10 AD18 PERR# E4
    B3 C2 PCI_PLOCK#

    2
    R282 1 PCI_PIRQB# AD19 PLOCK# PCI_SERR#
    2 8.2K_0402_5% F7 AD20 SERR# J4 PCI_SERR# 38
    C3 A4 PCI_STOP# 1
    R283 1 AD21 STOP#
    2 8.2K_0402_5% PCI_PIRQC# F3 AD22 TRDY# F5 PCI_TRDY# @
    F4 D7 PCI_FRAME# C425
    R284 1 AD23 FRAME#
    2 8.2K_0402_5% PCI_PIRQD# C1 AD24
    8.2P_0402_50V
    PLT_RST# 2
    G7 AD25 PLTRST# C14 PLT_RST# 9,20,30,31,32
    R285 1 2 8.2K_0402_5% PCI_PIRQE# H7 D4 CLK_PCI_ICH
    AD26 PCICLK CLK_PCI_ICH 17
    D1 R2 PCI_PME#
    AD27 PME# PCI_PME# 38
    R286 1 2 8.2K_0402_5% PCI_PIRQF# G5 AD28
    H6 AD29 3/28 PCI_PME# Remvoe 8.2k pull high +3VALW resistance.
    R287 1 2 8.2K_0402_5% PCI_PIRQG# G1 AD30
    H3 AD31
    R288 2 1 8.2K_0402_5% PCI_PIRQH#

    C C
    PCI_PIRQA# J5
    Interrupt I/F H4 PCI_PIRQE#
    R289 1 PCI_REQ0# PCI_PIRQB# PIRQA# PIRQE#/GPIO2 PCI_PIRQF#
    2 8.2K_0402_5% E1 PIRQB# PIRQF#/GPIO3 K6
    PCI_PIRQC# J6 F2 PCI_PIRQG#
    R290 1 PCI_REQ1# PCI_PIRQD# PIRQC# PIRQG#/GPIO4 PCI_PIRQH#
    2 8.2K_0402_5% C4 PIRQD# PIRQH#/GPIO5 G2 1 2 ACCEL_INT 37
    R291 0_0402_5%
    R292 1 2 8.2K_0402_5% PCI_REQ2# ICH9-M ES_FCBGA676
    08/25 Follow Abita
    R293 1 2 8.2K_0402_5% PCI_REQ3#

    A16 swap override Strap


    B
    Boot BIOS Strap B
    Low= A16 swap override Enble
    PCI_GNT3# Boot BIOS
    High= Default * PCI_GNT0# SPI_CS#1
    Location

    @R294 0 1 SPI
    PCI_GNT3# 1 2

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    1K_0402_5%
    1 0 PCI

    1 1 LPC *
    +3VALW

    @ R295
    SPI_CS1#_R 1 2
    27 SPI_CS1#_R
    1K_0402_5%
    @ R296
    PCI_GNT0# 1 2
    1K_0402_5%

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    ICH9(1/4)-PCI/INT
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 25 of 53
    5 4 3 2 1

    DELL CONF

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5 4 3 2 1

    +RTCVCC
    +3VS

    1 2 SM_INTRUDER# R298
    R297 1M_0402_5% GATEA20 1 2
    1 2 LAN100_SLP 8.2K_0402_5%
    R299 330K_0402_5%
    1 2 ICH_INTVRMEN R301
    R300 330K_0402_5% KB_RST# 1 2
    1 2 ICH_SRTCRST# 10K_0402_5%
    R302 180K_0402_5%

    1
    0_0402_5%

    0_0402_5%
    D D
    1
    C426 @ @ +VCCP
    R303 R304
    0.1U_0402_16V4Z @ R305
    2 H_DPRSTP# 1 2

    2
    56_0402_5%
    LPC_AD[0..3] 31,37,38
    U12A @ R306
    ICH_RTCX1 C23 K5 LPC_AD0 H_DPSLP# 1 2
    ICH_RTCX2 RTCX1 FWH0/LAD0 LPC_AD1 56_0402_5%
    C24 RTCX2 FWH1/LAD1 K4
    R307 L6 LPC_AD2
    ICH_RTCRST# FWH2/LAD2 LPC_AD3
    +RTCVCC 1 2 A25 RTCRST# FWH3/LAD3 K2
    20K_0402_5% ICH_SRTCRST# F20
    SM_INTRUDER# SRTCRST# LPC_FRAME#
    C22 INTRUDER# FWH4/LFRAME# K3 LPC_FRAME# 31,37,38
    +VCCP

    RTC
    1

    LPC
    1
    C427 CLRP2 ICH_INTVRMEN B22 J3
    SHORT PADS LAN100_SLP INTVRMEN LDRQ0#
    A22 LAN100_SLP LDRQ1#/GPIO23 J1
    1U_0603_10V4Z T54 PAD

    2
    2 GATEA20
    E25 GLAN_CLK A20GATE N7 GATEA20 38
    AJ27 H_A20M# R308
    A20M# H_A20M# 6
    C13 56_0402_5%
    LAN_RSTSYNC H_DPRSTP_R# R309 H_DPRSTP#
    DPRSTP# AJ25 1 2 H_DPRSTP# 7,9,49
    F14 AE23 H_DPSLP# 0_0402_5%
    H_DPSLP# 7

    1
    R312 33_0402_5% HDA_BITCLK LAN_RXD0 DPSLP#
    33 HDA_BITCLK_CODEC 1 2 G13 LAN_RXD1
    R313 33_0402_5% 1 2 D14 AJ26 R_H_FERR# R310 1 2 H_FERR#
    34 HDA_BITCLK_MDC LAN_RXD2 FERR# H_FERR# 6

    LAN / GLAN
    R324 33_0402_5% 1 2 56_0402_5%
    21 HDA_BITCLK_VGA
    D13 AD22 H_PWRGOOD 3/28 add 56ohm
    LAN_TXD_0 CPUPWRGD H_PWRGOOD 6,7
    R314 33_0402_5% 1 2 HDA_SYNC D12
    34 HDA_SYNC_MDC LAN_TXD_1
    R316 33_0402_5% 1 2 E13 AF25 H_IGNNE#
    33 HDA_SYNC_CODEC +1.5VS LAN_TXD_2 IGNNE# H_IGNNE# 6
    R397 33_0402_5% 1 2 within 2" from R379
    21 HDA_SYNC_VGA
    B10 AE22 H_INIT#
    GPIO56 INIT# H_INIT# 6 +VCCP
    R317 33_0402_5% 1 2 HDARST# AG25 H_INTR

    CPU
    C 33,38 HDA_RST#_CODEC INTR H_INTR 6 C
    R318 33_0402_5% 1 2 R311 B28 L3 KB_RST#
    34 HDA_RST#_MDC GLAN_COMPI RCIN# KB_RST# 38
    21 HDA_RST#_VGA
    R398 33_0402_5% 1 2 1 2 GLAN_COMP B27 GLAN_COMPO

    1
    24.9_0402_1% AF23 H_NMI
    NMI H_NMI 6
    HDA_BITCLK AF6 AF24 H_SMI# R315
    HDA_BIT_CLK SMI# H_SMI# 6
    HDA_SYNC AH4 56_0402_5%
    HDA_SYNC H_STPCLK#
    VGA ICH9-M STPCLK# AH27 H_STPCLK# 6
    HDARST# AE7

    2
    HDA_RST# THRMTRIP_ICH# R319
    THRMTRIP# AG26 1 2 54.9_0402_1% H_THERMTRIP# 6,9
    HDA_SDIN0 AF4
    33 HDA_SDIN0 HDA_SDIN0
    MDC HDA_SDIN1 AG4 AG27 placed within 2"
    34 HDA_SDIN1 HDA_SDIN1 TP12
    HDA_SDIN2 AH3
    21 HDA_SDIN2 HDA_SDIN2 from ICH9M
    AE5

    IHDA
    R320 33_0402_5% HDA_SDIN3
    34 HDA_SDOUT_MDC 1 2 SATA4RXN AH11 SATA_RXN4_C 29
    CODEC R321 33_0402_5% 1 2 HDA_SDOUT AG5 AJ11 0.01U_0402_50V7K
    33 HDA_SDOUT_CODEC HDA_SDOUT SATA4RXP SATA_RXP4_C 29
    R323 33_0402_5% 1 2 AG12 SATA_TXN4_C 2 1 C428 SATA_TXN4
    21 HDA_SDOUT_VGA
    PAD T55 AG7
    SATA4TXN
    AF12 SATA_TXP4_C 2 1 C429 SATA_TXP4
    SATA_TXN4 29 ODD
    HDA_DOCK_EN#/GPIO33 SATA4TXP SATA_TXP4 29
    PAD T56 @ AE8
    @ HDA_DOCK_RST#/GPIO34 0.01U_0402_50V7K
    SATA_LED# AG8
    39 SATA_LED# SATALED#
    SATA5RXN AH9 SATA_RXN5_C 36
    0.01U_0402_50V7K
    HDD 29 SATA_RXN0_C
    0.01U_0402_50V7K
    AJ16
    AH16
    SATA0RXN SATA5RXP AJ9
    AE10 SATA_TXN5_C 2 1 C430 SATA_TXN5
    SATA_RXP5_C 36 e-SATA
    29 SATA_RXP0_C SATA0RXP SATA5TXN SATA_TXN5 36
    SATA_TXN0 C431 1 2 SATA_TXN0_C AF17 AF10 SATA_TXP5_C 2 1 C432 SATA_TXP5 De-feature disable
    29 SATA_TXN0 SATA0TXN SATA5TXP SATA_TXP5 36
    SATA_TXP0 C433 1 2 SATA_TXP0_C AG17 0.01U_0402_50V7K
    29 SATA_TXP0 SATA0TXP
    AH18 CLK_PCIE_SATA#
    SATA_CLKN CLK_PCIE_SATA# 17

    SATA
    0.01U_0402_50V7K AH13 AJ18 CLK_PCIE_SATA
    29 SATA_RXN1_C SATA1RXN SATA_CLKP CLK_PCIE_SATA 17
    0.01U_0402_50V7K AJ13 AJ7
    29 SATA_RXP1_C SATA1RXP SATARBIAS#
    SATA_TXN1 C820 1 2 SATA_TXN1_C AG14 AH7 R322 1 2
    Multi bay 29 SATA_TXN1
    SATA_TXP1 C821 1 2 SATA_TXP1_C AF14
    SATA1TXN SATARBIAS 24.9_0402_1%
    29 SATA_TXP1 SATA1TXP
    0.01U_0402_50V7K Within 500 mils
    ICH9-M ES_FCBGA676
    B B

    #PV reserve for WWAN noise

    HDA_SDOUT_MDC @ C502 1 2 12P_0402_50V8J HDA_BITCLK_CODEC C2128 1 2 56P_0402_50V9J


    XOR CHAIN ENTRANCE STRAP:RSVD HDA_SDOUT_CODEC @ C499 1 12P_0402_50V8J HDA_BITCLK_MDC C2129 1 56P_0402_50V9J
    2 2
    +3VS

    www.kythuatvitinh.com
    HDA_SDOUT_VGA @ C2130 1 2 12P_0402_50V8J HDA_BITCLK_VGA C2131 1 2 56P_0402_50V9J
    BATT1
    @ R325
    1 2 HDA_SDOUT_CODEC
    1K_0402_5%

    @ R326 @ CR2032 RTC BATTERY


    ICH_RSVD +RTCVCC +3VL
    1 2
    1K_0402_5%
    ICH_RSVD 27 0821 Change C528 and C516 to 15PF HDA_BITCLK
    BATT1.1
    1

    ICH_RTCX1 @ D8
    R327 R329 W=20mils 2
    R328 10_0402_5% 1 2 1 R330 JBATT1
    1 2 ICH_RTCX2 W=20mils 3 1 2 1
    0_0402_5% W=20mils 1
    W=20mils 2
    2

    10M_0402_5% DAN202U_SC70 1K_0402_5% 2


    1 3 GND
    ICH_RSVD HDA_SDOUT_CODEC 1 1 C438 4
    C436 C437 GND
    1
    @ 2.2U_0603_6.3V4Z ACES_85205-02001
    15P_0402_50V8J 15P_0402_50V8J C439 2 CONN@
    2 2 10P_0402_25V8K Place near ICH9
    A 0 0 2 A

    0 1 Y2
    1 4
    1 0 2 3

    1 1 32.768KHZ_12.5P_MC-146 Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    ICH9(2/4)_LAN,HD,IDE,LPC
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 26 of 53
    5 4 3 2 1
    5 4 3 2 1

    +3VALW R331 1 2 2.2K_0402_5% #SI connect to EC Place closely pin Place closely pin
    +3VS R332 1 2 2.2K_0402_5%
    U12C AF3 H1
    ICH_SMBCLK G16 AH23 GPIO21 CLK_48M_ICH CLK_14M_ICH
    17,21,31,37 ICH_SMBCLK SMBCLK SATA0GP/GPIO21
    SIRQ ICH_SMBDATA HDDHALT_LED#
    R333
    1 2
    10K_0402_5%
    17,21,31,37 ICH_SMBDATA
    LINKALERT#
    A13 SMBDATA SMB SATA1GP/GPIO19 AF19
    GPIO36
    HDDHALT_LED# 39

    SATA
    GPIO
    E17 LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36 AE21

    1
    1 2 PM_CLKRUN# ME_EC_CLK1 C17 AD20 GPIO37 @ @
    R334 8.2K_0402_5% ME_EC_DATA1 SMLINK0 SATA5GP/GPIO37 R342 R343
    B18 SMLINK1
    1 2 OCP# H1 CLK_14M_ICH
    +3VS CLK14 CLK_14M_ICH 17
    R335 10K_0402_5% ICH_RI# CLK_48M_ICH 10_0402_5% 10_0402_5%
    1 2 THERM_SCI#
    F19 RI# clocks CLK48 AF3 CLK_48M_ICH 17

    2
    @ R336 8.2K_0402_5% PAD T57 SUS_STAT# R4 P1 ICH_SUSCLK T58 PAD
    CLKREQ#_C XDP_DBRESET#
    @ SUS_STAT#/LPCPD# SUSCLK @
    1 2 6 XDP_DBRESET# G19 SYS_RESET# 1 @ 1 @

    1
    @ R337 10K_0402_5% @ @ C16 SLP_S3# C440 C441
    D SLP_S3# SLP_S3# 38 D
    1 2 PM_BMBUSY# R339 R340 PM_BMBUSY# M6 E16 SLP_S4#
    9 PM_BMBUSY# PMSYNC#/GPIO0 SLP_S4# SLP_S4# 38
    @ R338 8.2K_0402_5% 10K_0402_5% 10K_0402_5% G17 SLP_S5# 4.7P_0402_50V8C 4.7P_0402_50V8C

    SYS / GPIO
    SLP_S5# SLP_S5# 38 2 2
    1 2 EC_SCI# 38 EC_LID_OUT# EC_LID_OUT# A17
    R341 8.2K_0402_5% SMBALERT#/GPIO11 S4_STATE#
    C10

    2
    H_STP_PCI# S4_STATE#/GPIO26
    17 H_STP_PCI# A14 STP_PCI#
    1 2 CR_CPPE# R345 1 2 0_0402_5% R_STP_CPU# E19 G20 PM_PWROK R346 10K_0402_5%
    17 H_STP_CPU# STP_CPU# PWROK PM_PWROK 9,38
    R344 8.2K_0402_5% 1 2
    PM_CLKRUN# L4 M2 R348 1 2 0_0402_5%

    Power MGT
    CLKRUN# DPRSLPVR/GPIO16 DPRSLPVR 9,49
    ICH_PCIE_WAKE# E20 B13 ICH_LOW_BAT# #SI connect to 3VALW POWER_OK
    30,31 ICH_PCIE_WAKE# WAKE# BATLOW#
    SIRQ M5
    38 SIRQ SERIRQ
    1 2 HDDHALT_LED# THERM_SCI# AJ23 R3 PWRBTN_OUT#
    21,38 THERM_SCI# THRM# PWRBTN# PWRBTN_OUT# 38
    R350 8.2K_0402_5%
    1 2 GPIO20 VGATE D21 D20
    17,49 VGATE VRMPWRGD LAN_RST# R_EC_RSMRST# 45
    R351 8.2K_0402_5%
    1 2 GPIO21 R353 1 2 PAD T59 A20 D22 R_EC_RSMRST# R354 1 2 100_0402_5%
    TP11 RSMRST# EC_RSMRST# 38
    R352 8.2K_0402_5% 100K_0402_5% @ R355 1 2 10K_0402_5%
    1 2 CR_WAKE# 6 OCP# OCP# AG19 R5 CK_PWRGD
    GPIO1 CK_PWRGD CK_PWRGD 17
    R356 8.2K_0402_5% CR_CPPE# AH21
    GPIO36 32 CR_CPPE# EC_SCI# GPIO6
    1 2 38 EC_SCI# R347 1 2 0_0402_5% GPIO7 AG21 GPIO7 CLPWROK R6 M_PWROK
    M_PWROK 9,38
    R357 8.2K_0402_5% 38 EC_SMI# EC_SMI# A21
    GPIO37 GPIO8 +3VS
    1 2 R349 1 2 0_0402_5% GPIO12 C12 GPIO12 SLP_M# B16
    R358 8.2K_0402_5% 30 LAN_DSM#_SB @ LAN_DSM#_SB C21
    GPIO39 17/14 GPIO13 CL_CLK0 R360
    1 2 AE18 GPIO17 CL_CLK0 F24 CL_CLK0 9
    R359 10K_0402_5% K1 B19 0.1U_0402_16V4Z 1 2

    GPIO
    30 ISOLATEB

    Controller Link
    GPIO48 GPIO20 GPIO18 CL_CLK1 3.24K_0402_1%
    1 2 19 GPIO20 AF8 GPIO20

    1
    R361 8.2K_0402_5% 32 CR_WAKE# CR_WAKE# AJ22 F22 CL_DATA0 1
    SCLOCK/GPIO22 CL_DATA0 CL_DATA0 9
    1 2 GPIO57 DIS/UMA A9 C19 C442 R363
    R362 8.2K_0402_5% 8.2K_0402_5% GPIO27 CL_DATA1 453_0402_1%
    D19 GPIO28
    CLKREQ#_C L1 C25 CL_VREF0_ICH
    17 CLKREQ#_C SATACLKREQ#/GPIO35 CL_VREF0 2 NA lead free
    +3VS R364 1 2 GPIO38 AE19 A19 CL_VREF1_ICH

    2
    GPIO49 GPIO39 SLOAD/GPIO38 CL_VREF1
    1 2 AG22 SDATAOUT0/GPIO39
    C R365 10K_0402_5% R393 1 2 0_0402_5% GPIO48 AF21 F21 CL_RST# +3VALW C
    31 EXP_CPPE# SDATAOUT1/GPIO48 CL_RST0# CL_RST# 9
    @ GPIO49 AH24 D18
    @ GPIO57 GPIO49 CL_RST1# R367
    A8 GPIO57/CLGPIO5
    +3VS R366 1 2 1K_0402_5% A16 XMIT_OFF 0.1U_0402_16V4Z 1 2
    MEM_LED/GPIO24 XMIT_OFF 31
    SB_SPKR M7 C18 GPIO10 3.24K_0402_1%
    33 SB_SPKR SPKR GPIO10/SUS_PWR_ACK

    1
    #SI LAN DSM MCH_ICH_SYNC# AJ24 C11 GPIO14 R370 1

    MISC
    +3VALW 9 MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT
    ICH_RSVD B21 C20 LAN_WOL_EN 2 1 +3VALW C443 R368
    26 ICH_RSVD TP3 WOL_EN/GPIO9
    AH20 453_0402_1%
    TP8 100K_0402_5%
    AJ20 TP9
    LINKALERT# 2
    1 2 R424 AJ21

    2
    R369 10K_0402_5% TP10
    Low -->default
    1 2 ICH_LOW_BAT# High -->No boot ICH9-M ES_FCBGA676
    R371 8.2K_0402_5%
    1 2 ICH_PCIE_WAKE# U12D
    R372 1K_0402_5% PCIE_RXN1 N29 V27 DMI_RXN0 DMI_RXN0 9
    31 PCIE_RXN1 PERN1 DMI0RXN
    1 2 ICH_RI# PCIE_RXP1 N28 V26 DMI_RXP0 DMI_RXP0 9 D18
    31 PCIE_RXP1 PERP1 DMI0RXP
    R374 10K_0402_5% TV Tuner/WWAN/Robeson 31 PCIE_TXN1 C445 1 2 0.1U_0402_16V4Z PCIE_C_TXN1 P27 PETN1 DMI0TXN U29 DMI_TXN0 DMI_TXN0 9 PM_PWROK 2 1 R_EC_RSMRST# 45
    1 2 XDP_DBRESET# C444 1 2 0.1U_0402_16V4Z PCIE_C_TXP1 P26 U28 DMI_TXP0

    Direct Media Interface


    31 PCIE_TXP1 PETP1 DMI0TXP DMI_TXP0 9
    R375 10K_0402_5% CH751H-40PT_SOD323-2
    1 2 S4_STATE# L29 Y27 DMI_RXN1 DMI_RXN1 9
    R376 10K_0402_5% PERN2 DMI1RXN DMI_RXP1
    ME_EC_CLK1
    L28 PERP2 DMI1RXP Y26
    DMI_TXN1
    DMI_RXP1 9 #PV PWROK sequence issue
    1 2 M27 PETN2 DMI1TXN W29 DMI_TXN1 9
    R377 10K_0402_5% M26 W28 DMI_TXP1 DMI_TXP1 9
    ME_EC_DATA1 PETP2 DMI1TXP
    1 2

    PCI - Express
    R378 10K_0402_5% PCIE_RXN3 J29 AB27 DMI_RXN2 DMI_RXN2 9
    31 PCIE_RXN3 PERN3 DMI2RXN
    1 2 GPIO10 PCIE_RXP3 J28 AB26 DMI_RXP2 DMI_RXP2 9
    31 PCIE_RXP3 PERP3 DMI2RXP
    R379 10K_0402_5% WLAN 31 PCIE_TXN3 C448 1 2 0.1U_0402_16V4Z PCIE_C_TXN3 K27 PETN3 DMI2TXN AA29 DMI_TXN2 DMI_TXN2 9
    1 2 EC_LID_OUT# 31 PCIE_TXP3 C449 1 2 0.1U_0402_16V4Z PCIE_C_TXP3 K26 AA28 DMI_TXP2 DMI_TXP2 9
    R373 10K_0402_5% PETP3 DMI2TXP
    1 2 EC_SMI# GLAN_RXN G29 AD27 DMI_RXN3 DMI_RXN3 9
    30 GLAN_RXN PERN4 DMI3RXN
    R380 8.2K_0402_5% GLAN_RXP G28 AD26 DMI_RXP3 DMI_RXP3 9
    30 GLAN_RXP PERP4 DMI3RXP
    1 2 GPIO14 GLAN 30 GLAN_TXN C452 1 2 0.1U_0402_16V4Z GLAN_TXN_C H27 AC29 DMI_TXN3 DMI_TXN3 9
    B R381 8.2K_0402_5% C453 1 0.1U_0402_16V4Z GLAN_TXP_C H26 PETN4 DMI3TXN DMI_TXP3 B
    30 GLAN_TXP 2 PETP4 DMI3TXP AC28 DMI_TXP3 9
    PCIE_RXN5 E29 T26 CLK_PCIE_ICH#
    +3VS +3VS 32 PCIE_RXN5 PERN5 DMI_CLKN CLK_PCIE_ICH# 17
    PCIE_RXP5 E28 T25 CLK_PCIE_ICH
    32 PCIE_RXP5 PERP5 DMI_CLKP CLK_PCIE_ICH 17
    Card reader 32 PCIE_TXN5 C501 1 2 0.1U_0402_16V4Z PCIE_C_TXN5 F27 PETN5
    Board ID 32 PCIE_TXP5 C500 1 2 0.1U_0402_16V4Z PCIE_C_TXP5 F26 PETP5 DMI_ZCOMP AF29 R382 24.9_0402_1% Within 500 mils
    2

    AF28 DMI_IRCOMP 1 2 +1.5VS


    PCIE_RXN4 DMI_IRCOMP
    31 PCIE_RXN4 C29 PERN6/GLAN_RXN
    R745 R747 @ PCIE_RXP4 C28 AC5 USB20_N0
    31 PCIE_RXP4 PERP6/GLAN_RXP USBP0N USB20_N0 36

    www.kythuatvitinh.com
    10K_0402_5% 10K_0402_5% New Card 31 PCIE_TXN4 C450 1 2 0.1U_0402_16V4Z PCIE_C_TXN4 D27 PETN6/GLAN_TXN USBP0P AC4 USB20_P0
    USB20_P0 36 USB-0 Right side
    31 PCIE_TXP4 C451 1 2 0.1U_0402_16V4Z PCIE_C_TXP4 D26 AD3 USB20_N1
    USB20_N1 36
    1

    DIS/UMA 17/14 PETP6/GLAN_TXP USBP1N USB20_P1


    USBP1P AD2
    USB20_N2
    USB20_P1 36 USB-1 Right side
    PAD T61 D23 SPI_CLK USBP2N AC1 USB20_N2 36
    2

    PAD T62 @ D24 AC2 USB20_P2 USB-2 Left side(with ESATA)


    SPI_CS0# USBP2P USB20_P2 36
    17" High 25 SPI_CS1#_R @ SPI_CS1#_R F23 AA5 USB20_N3
    SPI_CS1#GPIO58/CLGPIO6 USBP3N USB20_N3 40
    R746 @ R748 AA4 USB20_P3 USB-3 Dock
    USBP3P USB20_P3 40
    10K_0402_5% 10K_0402_5% 14" Low USB20_N4
    PAD T63
    @
    D25 SPI_MOSI SPI USBP4N AB2
    USB20_P4
    USB20_N4 19
    PAD T64 E23 AB3 USB20_P4 19 USB-4 Camera
    1

    @ SPI_MISO USBP4P USB20_N5


    Dis" High USB_OC#0 USBP5N AA1
    USB20_P5
    USB20_N5 31
    R383 1 USB_OC#1
    N4 OC0#/GPIO59 USBP5P AA2
    USB20_N6
    USB20_P5 31 USB-5 WLAN
    UMA" Low 36 BT_OFF 2 0_0402_5% N5 OC1#/GPIO40 USBP6N W5 USB20_N6 36
    USB_OC#2 USB20_P6 USB-6 Bluetooth
    RP27 WXMIT_OFF#
    N6
    P6
    OC2#/GPIO41 USB USBP6P W4
    Y3 USB20_N7
    USB20_P6 36
    31 WXMIT_OFF# OC3#/GPIO42 USBP7N USB20_N7 36
    USB_OC#6 4 5 USB_OC#4 M1 Y2 USB20_P7 USB-7 Finger Printer
    +3VALW OC4#/GPIO43 USBP7P USB20_P7 36
    USB_OC#1 3 6 USB_OC#5 N2 W1 USB20_N8
    OC5#/GPIO29 USBP8N USB20_N8 31
    USB_OC#2 2 7 USB_OC#6 M4 W2 USB20_P8 USB-8 MiniCard(WWAN/TV)
    OC6#/GPIO30 USBP8P USB20_P8 31
    USB_OC#4 1 8 USB_OC#7 M3 V2 USB20_N9
    OC7#/GPIO31 USBP9N USB20_N9 31
    USB_OC#8 N3 V3 USB20_P9 USB-9 Express card
    OC8#/GPIO44 USBP9P USB20_P9 31
    10K_1206_8P4R_5% USB_OC#9 N1 U5
    USB_OC#10 OC9#/GPIO45 USBP10N
    P5 OC10#/GPIO46 USBP10P U4
    RP28 USB_OC#11 P3 U1
    USB_OC#7 OC11#/GPIO47 USBP11N
    4 5 USBP11P U2
    A USB_OC#8 3 6 USBRBIAS AG2 A
    USB_OC#9 USBRBIAS
    2 7 AG1 USBRBIAS#
    1

    USB_OC#0 1 8 Within 500 mils


    #SI new card & LAN swap ICH9-M ES_FCBGA676
    10K_1206_8P4R_5% R384
    22.6_0402_1%
    RP29
    2

    WXMIT_OFF# 4 5
    USB_OC#5
    USB_OC#10
    3 6
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2 7 Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title
    USB_OC#11 1 8
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    ICH9(3/4)_DMI,USB,GPIO,PCIE
    10K_1206_8P4R_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 27 of 53
    5 4 3 2 1
    5 4 3 2 1

    +RTCVCC +VCCP U12E


    U12F AA26 H5
    VSS[001] VSS[107]
    20 mils A23 G3: 6uA A15 AA27 J23
    VCCRTC VCC1_05[01] VSS[002] VSS[108]
    1634mA

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    VCC1_05[02] B15 AA3 VSS[003] VSS[109] J26
    1 1 ICH_V5REF_RUN A6 2mA C15 0.1U_0402_16V4Z 0.1U_0402_16V4Z AA6 J27
    V5REF VCC1_05[03] VSS[004] VSS[110]

    C462

    C454
    VCC1_05[04] D15 1 1 AB1 VSS[005] VSS[111] AC22
    E15 C457 C455 AA23 K28
    ICH_V5REF_SUS VCC1_05[05] VSS[006] VSS[112]
    AE1 2mA F15 AB28 K29
    2 2 V5REF_SUS VCC1_05[06] VSS[007] VSS[113]
    VCC1_05[07] L11 AB29 VSS[008] VSS[114] L13
    AA24 646mA L12 2 2 AB4 L15
    VCC1_5_B[01] VCC1_05[08] VSS[009] VSS[115]
    AA25 VCC1_5_B[02] VCC1_05[09] L14 AB5 VSS[010] VSS[116] L2
    AB24 VCC1_5_B[03] VCC1_05[10] L16 AC17 VSS[011] VSS[117] L26
    AB25 VCC1_5_B[04] VCC1_05[11] L17 AC26 VSS[012] VSS[118] L27
    R387 AC24 L18 AC27 L5
    10U_0805_10V4Z VCC1_5_B[05] VCC1_05[12] R385 VSS[013] VSS[119]
    +1.5VS 1 2 40 mils AC25 VCC1_5_B[06] VCC1_05[13] M11 AC3 VSS[014] VSS[120] L7
    D CHB1608U301_0603 AD24 M18 0.01U_0402_16V7K 1 2 AD1 M12 D
    1 VCC1_5_B[07] VCC1_05[14] +1.5VS VSS[015] VSS[121]
    CHB1608U301_0603

    CORE
    1 1 1 AD25 VCC1_5_B[08] VCC1_05[15] P11 AD10 VSS[016] VSS[122] M13
    +

    220U_D2_4VM
    C459 C460 C456 AE25 P18 1 1 AD12 M14
    VCC1_5_B[09] VCC1_05[16] VSS[017] VSS[123]

    C458
    AE26 T11 C461 C463 AD13 M15
    VCC1_5_B[10] VCC1_05[17] VSS[018] VSS[124]
    AE27 VCC1_5_B[11] VCC1_05[18] T18 AD14 VSS[019] VSS[125] M16
    2 2 2 2 10U_0805_10V4Z
    AE28 VCC1_5_B[12] VCC1_05[19] U11 AD17 VSS[020] VSS[126] M17
    2 2
    AE29 VCC1_5_B[13] VCC1_05[20] U18 AD18 VSS[021] VSS[127] M23
    +5VS +3VS 10U_0805_10V4Z 2.2U_0603_6.3V4Z F25 V11 AD21 M28
    VCC1_5_B[14] VCC1_05[21] VSS[022] VSS[128]
    G25 VCC1_5_B[15] VCC1_05[22] V12 AD28 VSS[023] VSS[129] M29
    H24 VCC1_5_B[16] VCC1_05[23] V14 AD29 VSS[024] VSS[130] N11
    1

    H25 VCC1_5_B[17] VCC1_05[24] V16 AD4 VSS[025] VSS[131] N12


    R386 D9 J24 V17 +VCCP AD5 N13
    VCC1_5_B[18] VCC1_05[25] VSS[026] VSS[132]

    VCCA3GP

    22U_0805_6.3VAM
    J25 VCC1_5_B[19] VCC1_05[26] V18 AD6 VSS[027] VSS[133] N14
    100_0402_5% CH751H-40_SC76 K24 1 AD7 N15
    VCC1_5_B[20] C464 VSS[028] VSS[134]
    K25 AD9 N16
    2

    VCC1_5_B[21] VSS[029] VSS[135]


    L23 VCC1_5_B[22] AE12 VSS[030] VSS[136] N17
    ICH_V5REF_RUN L24 R29 AE13 N18
    VCC1_5_B[23] VCCDMIPLL 2 VSS[031] VSS[137]
    1 20 mils L25 VCC1_5_B[24] AE14 VSS[032] VSS[138] N26
    C465 M24 W23 AE16 N27
    VCC1_5_B[25]
    M25 VCC1_5_B[26]
    23mA VCC_DMI[1]
    VCC_DMI[2] Y23
    +VCCP AE17
    VSS[033]
    VSS[034]
    VSS[139]
    VSS[140] P12
    0.1U_0402_10V6K N23 AE2 P13
    2 VCC1_5_B[27] VSS[035] VSS[141]
    N24 VCC1_5_B[28] AB23 AE20 P14
    N25 48mA V_CPU_IO[1] AC23 AE24
    VSS[036] VSS[142]
    P15
    VCC1_5_B[29] V_CPU_IO[2] VSS[037] VSS[143]

    4.7U_0603_6.3V6M

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    P24 VCC1_5_B[30] AE3 VSS[038] VSS[144] P16
    P25 AG29 +3VS AE4 P17
    VCC1_5_B[31] VCC3_3[01] 1 1 1 VSS[039] VSS[145]
    +5VALW +3VALW

    C466

    C467

    C468
    R24 2mA AJ6 AE6 P2
    VCC1_5_B[32] VCC3_3[02] VSS[040] VSS[146]
    R25 VCC1_5_B[33] VCC3_3[07] AC10 AE9 VSS[041] VSS[147] P23

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    R26 VCC1_5_B[34] AF13 VSS[042] VSS[148] P28
    1

    2 2 2
    R27 VCC1_5_B[35] VCC3_3[03] AD19 1 1 1 AF16 VSS[043] VSS[149] P29

    VCCP_CORE
    R388 D10 T24 AF20 AF18 P4
    VCC1_5_B[36] VCC3_3[04] VSS[044] VSS[150]

    C469

    C470

    C471
    T27 VCC1_5_B[37] VCC3_3[05] AG24 AF22 VSS[045] VSS[151] P7
    10_0402_5% CH751H-40_SC76 T28 AC20 AH26 R11
    C VCC1_5_B[38] VCC3_3[06] +3VS 2 2 2 VSS[046] VSS[152] C
    T29 (DMI) AF26 R12
    2

    ICH_V5REF_SUS VCC1_5_B[39] VSS[047] VSS[153]


    U24 VCC1_5_B[40]
    308mA AF27 VSS[048] VSS[154] R13
    20 mils U25 B9 0.1U_0402_16V4Z AF5 R14
    VCC1_5_B[41] VCC3_3[08] VSS[049] VSS[155]
    1 V24 VCC1_5_B[42] VCC3_3[09] F9 1 AF7 VSS[050] VSS[156] R15
    C472 V25 G3 C473 AF9 R16
    VCC1_5_B[43] VCC3_3[10] VSS[051] VSS[157]
    U23 VCC1_5_B[44] VCC3_3[11] G6 AG13 VSS[052] VSS[158] R17

    PCI
    0.1U_0402_10V6K W24 J2 AG16 R18
    2 VCC1_5_B[45] VCC3_3[12] 2 VSS[053] VSS[159]
    W25 VCC1_5_B[46] VCC3_3[13] J7 AG18 VSS[054] VSS[160] R28
    K23 VCC1_5_B[47] VCC3_3[14] K7 AG20 VSS[055] VSS[161] T12
    Y24 VCC1_5_B[48] AG23 VSS[056] VSS[162] T13
    Y25 R741 AG3 T14
    VCC1_5_B[49] VSS[057] VSS[163]
    47mA 11mA VCCHDA AJ4 1 2 0_0402_5% 0.1U_0402_16V4Z +3VS AG6 VSS[058] VSS[164] T15
    R740 1 AG9 T16
    R389 0.1U_0402_16V4Z VSS[059] VSS[165]
    11mA VCCSUSHDA AJ3 1 2 0_0402_5% +3VALW C474 AH12 VSS[060] VSS[166] T17
    +1.5VS 1 2 AJ19 VCCSATAPLL 1 AH14 VSS[061] VSS[167] T23
    1U_0603_10V4Z

    CHB1608U301_0603 C475 AH17 B26


    2 VSS[062] VSS[168]
    10U_0805_10V4Z

    VCCSUS1_05[1] AC8 AH19 VSS[063] VSS[169] U12


    @ T65
    1 1 +1.5VS AC16 VCC1_5_A[01] VCCSUS1_05[2] F17 AH2 VSS[064] VSS[170] U13
    T66 2
    C476

    C477

    AD15 @ AH22 U14


    0316 change design VCC1_5_A[02] VSS[065] VSS[171]
    1 AD16 VCC1_5_A[03] AH25 VSS[066] VSS[172] U15
    C478 AE15 AD8 VCCSUS1_5_ICH_1 AH28 U16
    2 2 VCC1_5_A[04] VCCSUS1_5[1] T67 VSS[067] VSS[173]
    ARX

    AF15 @ AH5 U17


    VCC1_5_A[05] VSS[068] VSS[174]
    1U_0603_10V4Z AG15 VCC1_5_A[06] VCCSUS1_5[2] F18 VCCSUS1_5_ICH_2 AH8 VSS[069] VSS[175] AD23
    2 @ T68 +3VALW
    AH15 VCC1_5_A[07] AJ12 VSS[070] VSS[176] U26
    AJ15 VCC1_5_A[08] AJ14 VSS[071] VSS[177] U27
    A18 0.1U_0402_16V4Z AJ17 U3
    VCCSUS3_3[01] VSS[072] VSS[178]

    0.1U_0402_16V4Z
    AC11 212mA D16 1 1 AJ8 V1
    VCCPSUS

    VCC1_5_A[09] VCCSUS3_3[02] VSS[073] VSS[179]


    AD11 VCC1_5_A[10] VCCSUS3_3[03] D17 B11 VSS[074] VSS[180] V13

    C479

    C480
    +1.5VS AE11 VCC1_5_A[11] VCCSUS3_3[04] E22 B14 VSS[075] VSS[181] V15
    AF11 VCC1_5_A[12] B17 VSS[076] VSS[182] V23
    2 2
    ATX

    1 AG10 VCC1_5_A[13] B2 VSS[077] VSS[183] V28


    C481 AG11 B20 V29
    B VCC1_5_A[14] VSS[078] VSS[184] B
    AH10 VCC1_5_A[15] B23 VSS[079] VSS[185] V4
    1U_0603_10V4Z AJ10 AF1 B5 V5
    2 VCC1_5_A[16] VCCSUS3_3[05] VSS[080] VSS[186]
    B8 VSS[081] VSS[187] W26
    AC9 1342mA
    VCC1_5_A[17] C26 VSS[082] VSS[188] W27
    C27 VSS[083] VSS[189] W3
    AC18 VCC1_5_A[18] E11 VSS[084] VSS[190] Y1
    AC19 VCC1_5_A[19] E14 VSS[085] VSS[191] Y28
    VCCSUS3_3[06] T1 E18 VSS[086] VSS[192] Y29
    AC21 VCC1_5_A[20] VCCSUS3_3[07] T2 E2 VSS[087] VSS[193] Y4

    www.kythuatvitinh.com
    VCCSUS3_3[08] T3 E21 VSS[088] VSS[194] Y5
    G10 T4 +3VALW E24 AG28
    +1.5VS VCC1_5_A[21] VCCSUS3_3[09] VSS[089] VSS[195]
    G9 VCC1_5_A[22] VCCSUS3_3[10] T5 E5 VSS[090] VSS[196] AH6
    1 11mA 11mA VCCSUS3_3[11] T6 E8 VSS[091] VSS[197] AF2
    C483 AC12
    VCCPUSB

    +1.5VS VCC1_5_A[23] VCCSUS3_3[12] U6 1 F16 VSS[092] VSS[198] B25


    1 AC13 U7 C482 F28
    0.1U_0402_16V4Z C484 VCC1_5_A[24] VCCSUS3_3[13] VSS[093]
    AC14 VCC1_5_A[25] VCCSUS3_3[14] V6 F29 VSS[094]
    2 4.7U_0603_6.3V6M
    VCCSUS3_3[15] V7 G12 VSS[095]
    0.1U_0402_16V4Z 2
    AJ5 VCCUSBPLL VCCSUS3_3[16] W6 G14 VSS[096] VSS_NCTF[01] A1
    2
    VCCSUS3_3[17] W7 G18 VSS[097] VSS_NCTF[02] A2
    USB CORE

    AA7 VCC1_5_A[26] VCCSUS3_3[18] Y6 G21 VSS[098] VSS_NCTF[03] A28


    AB6 VCC1_5_A[27] VCCSUS3_3[19] Y7 G24 VSS[099] VSS_NCTF[04] A29
    AB7 VCC1_5_A[28] VCCSUS3_3[20] T7 G26 VSS[100] VSS_NCTF[05] AH1
    AC6 VCC1_5_A[29] G27 VSS[101] VSS_NCTF[06] AH29
    AC7 VCC1_5_A[30] G8 VSS[102] VSS_NCTF[07] AJ1
    H2 VSS[103] VSS_NCTF[08] AJ2
    T69 VCC_LAN1_05_INT_ICH_1 A10 H23 AJ28
    T70 VCC_LAN1_05_INT_ICH_2 VCCLAN1_05[1] VCCCL1_05_ICH VSS[104] VSS_NCTF[09]
    A11 VCCLAN1_05[2] VCCCL1_05 G22 H28 VSS[105] VSS_NCTF[10] AJ29
    +3VS @ T71
    @ VCCCL1_5 G23 H29 VSS[106] VSS_NCTF[11] B1
    @ A12 VCCLAN3_3[1] VSS_NCTF[12] B29
    B12 VCCLAN3_3[2]
    19/78/78mA 19/73/73mA
    23mA 1 @
    0.1U_0402_16V4Z

    1 VCCCL3_3[1] A24 +3VS


    C485 R390 CHB1608U301_0603 B24 C486 ICH9-M ES_FCBGA676
    VCCCL3_3[2]
    GLAN POWER

    A 1 2 A27 1U_0603_10V4Z A
    R391 4.7U_0805_10V4Z VCCGLANPLL
    +1.5VS 80mA
    2 2
    10U_0805_10V4Z

    2.2U_0603_6.3V4Z

    +1.5VS 1 2 D28 VCCGLAN1_5[1]


    D29 VCCGLAN1_5[2]
    1 1 CHB1608U301_0603 E26
    C487 C488 VCCGLAN1_5[3]
    1 E27 VCCGLAN1_5[4]
    1mA
    A26
    2 2
    0316 change design
    C489
    2
    +3VS VCCGLAN3_3
    ICH9-M ES_FCBGA676
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    ICH9(4/4)_POWER&GND
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 28 of 53
    5 4 3 2 1
    5 4 3 2 1

    HDD Connector JP3


    +5VS Pleace near HD CONN
    GND 1
    2 SATA_TXP0
    A+ SATA_TXP0 26
    SATA_TXN0

    10U_0805_10V4Z

    0.1U_0402_16V4Z
    A- 3 SATA_TXN0 26
    1 1 1 1 4 0.01U_0402_16V7K
    GND

    C490

    C493
    5 SATA_RXN0 2 1 C494 SATA_RXN0_C
    B- SATA_RXN0_C 26
    C491 C492 6 SATA_RXP0 2 1 C495 SATA_RXP0_C
    B+ SATA_RXP0_C 26
    7 0.01U_0402_16V7K
    D 2 2 2 2 GND D
    0.1U_0402_16V4Z 0.1U_0402_16V4Z Near CONN side.
    V33 8
    9 +3VS
    V33
    V33 10
    GND 11
    GND 12
    GND 13
    V5 14
    15 +5VS
    V5
    V5 16
    GND 17
    Reserved 18
    GND 19
    V12 20
    V12 21
    V12 22

    SUYIN_127072FR022G523_RV
    CONN@

    CD-ROM Connector
    +5VS JP5
    Placea caps. near ODD
    CONN. 13
    C GND SATA_TXP4 C
    A+ 12 SATA_TXP4 26
    11 SATA_TXN4
    A- SATA_TXN4 26
    10 0.01U_0402_16V7K
    GND SATA_RXN4
    0.1U_0402_16V4Z B- 9 2 1 C510 SATA_RXN4_C SATA_RXN4_C 26

    1U_0603_10V4Z

    10U_0805_10V4Z
    8 SATA_RXP4 2 1 C511 SATA_RXP4_C
    B+ SATA_RXP4_C 26
    1 1 1 1 7 0.01U_0402_16V7K
    GND
    C512

    Near CONN side.


    C513

    C514
    C515
    10U_0805_10V4Z 6
    2 2 2 2 DP
    V5 5
    V5 4 +5VS
    MD 3
    GND 2
    PR@ PR@ PR@ PR@ 1
    GND

    SUYIN_127382FR013GX09ZR
    CONN@

    Multi Bay Connector

    +5VS
    B JP12 B
    1 2 +5VS
    SATA_TXP1 GND VCC5
    26 SATA_TXP1
    SATA_TXN1
    3 TX+ VCC5 4 Placea caps. near Multi bay CONN.
    26 SATA_TXN1 5 TX- VCC5 6
    7 GND VCC3 8
    SATA_RXN1_C 0.01U_0402_16V7K 1 2 C822 SATA_RXN1 9 10
    26 SATA_RXN1_C RX- VCC3
    SATA_RXP1_C 0.01U_0402_16V7K 1 2 C823 SATA_RXP1 11 12
    26 SATA_RXP1_C RX+ VCC3
    13 GND GND 14

    0.1U_0402_16V4Z

    1U_0603_10V4Z

    10U_0805_10V4Z
    15 GND GND 16

    www.kythuatvitinh.com
    1 1 1 1

    C517
    17 GND GND 18

    C518

    C519
    C516
    Near CONN side. TYCO_2023087-3 10U_0805_10V4Z
    2 2 2 2

    #SI Change lib PA@ PA@ PA@ PA@

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HDD & CDROM
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 29 of 53
    5 4 3 2 1
    5 4 3 2 1

    +3V_LAN
    1025 add to meet HP request Close to Pin16,37,46,53 +3V_LAN
    +AVDD33 R2017
    2 2 0_0805_5% 0.1U_0402_16V4Z
    +3V_LAN +3VALW C650 C651 2 2 2 2
    C631 C649 C642 C643
    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    @ 1 1 0.1U_0402_16V4Z
    R1106 1 2 1 1 1 1
    0_1206_5%
    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    Close to Pin2 & pin59

    S
    1 3

    D
    D D

    4
    .
    7
    uo
    He
    Q106 +LAN_VDD12

    c
    h
    k
    AP2305GN

    G
    2
    +LAN_VDD12 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    38 LAN_POWER_OFF
    L83 2 2 2 2 2 2
    +CTRL_18 1 2 C636 C637 C638 C639 C640 C641
    4.7UH_1008HC-472EJFS-A_5%_1008
    Close to Pin1 2 2 1 1 1 1 1 1
    C630 C629

    22U_0805_6.3VAM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


    1 1
    Place Close to Chip
    U18
    0.1U_0402_16V4Z
    27 GLAN_RXP C653 1 2 PCIE_RXP2_LAN 29 45 LAN_DO
    HSOP EEDO LAN_DI 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    EEDI/AUX 47
    27 GLAN_RXN C654 1 2 PCIE_RXN2_LAN 30 48 LAN_SK
    HSON EESK LAN_CS
    EECS 44 2 2 2 2 2
    0.1U_0402_16V4Z 23 R453 1 2 +3V_LAN C644 C645 C646 C647 C648
    27 GLAN_TXP HSIP 3.6K_0402_5%
    27 GLAN_TXN 24 HSIN
    54 1 1 1 1 1
    LED3 U15
    LED2 55
    1 2 GLAN_REQ# 33 56 LAN_LINK# LAN_DO 4 5 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    17 CLKREQ#_9 CLKREQB LED1 DO GND
    R456 0_0402_5% 57 LAN_ACTIVITY# LAN_DI 3 6 C652
    LED0 LAN_SK DI NC
    17 CLK_PCIE_LAN 26 REFCLK_P 2 SK NC 7
    LAN_CS 1 8 +3VALW
    LAN_MDI0+ CS VCC 1
    0.1U_0402_16V4Z
    27 3

    B3
    e
    a0
    d
    fA
    o
    r
    8
    1
    1
    1
    C
    17 CLK_PCIE_LAN# REFCLK_N MDIP0
    4 LAN_MDI0- AT93C46-10SI-2.7_SO8
    MDIN0

    0
    m
    C LAN_MDI1+ C
    9,20,25,31,32 PLT_RST# 20 PERSTB MDIP1 6
    7 LAN_MDI1- +LAN_EVDD12
    MDIN1 LAN_MDI2+
    MDIP2 9
    +CTRL_18 1 10 LAN_MDI2-
    SROUT12 MDIN2 LAN_MDI3+ L84
    MDIP3 12 +LAN_VDD12
    +LAN_VDD12 5 13 LAN_MDI3- 0_0603_5%
    FB12 MDIN3 Y3 2 2
    +3V_LAN R2016 62 LAN_X1 2 1LAN_X2 C632 C633
    0_0603_5% ENSR 0.1U_0402_16V4Z
    DVDD12 21 +LAN_VDD12
    R446 1 2 64 32 25MHZ_20P
    2.49K_0402_1% RSET DVDD12 1 1
    DVDD12 38 1 1
    43 C260 C256
    R454 DVDD12 0.1U_0402_16V4Z
    DVDD12 49
    27,31 ICH_PCIE_WAKE# 1 2 GLAN_WAKE# 19 52 27P_0402_50V8J 27P_0402_50V8J
    0_0402_5% LANWAKEB DVDD12 2 2
    27 ISOLATEB ISOLATEB 36 ISOLATEB
    EVDD12 22 +LAN_EVDD12
    28 LAN_ACTIVITY_R#
    LAN_X1 EVDD12
    60 CKTAL1 LAN_LINK_R#
    LAN_X2 61 16
    CKTAL2 VDD33
    VDD33 37

    2
    +3VS VDD33 46 +3V_LAN #PV for ESD
    VDD33 53
    65 D89
    EXPOSE_PAD @ PACDN042_SOT23~D
    1

    63 L85
    R445 25
    VDDSR 0_0805_5%
    +3V_LAN
    LAN Conn.

    1
    EGND +AVDD33 CONN@
    AVDD33 2
    @ 1K_0402_1% 31 59 1 1 JRJ45
    EGND AVDD33 C634 C635 300_0402_5% 13
    2

    ISOLATEB +3V_LAN Yellow LED+


    AVDD12 8
    B 15 11 22U_0805_6.3VAM 0.1U_0402_16V4Z LAN_ACTIVITY# R452 2 1LAN_ACTIVITY_R# 14 B
    NC AVDD12 2 2 Yellow LED-
    17 NC AVDD12 14 1 SHLD1 16
    R443 18 58 +LAN_VDD12 40 RJ45_MIDI3- 8
    NC AVDD12 PR4-
    34 NC DETECT PIN1 9
    15K_0402_5% 35 1 2 +3VALW C656 40 RJ45_MIDI3+ 7
    NC @ R2074 10K_0402_5% 0.1U_0402_25V4K 2 PR4+
    39 NC IGPIO 50
    40 51 LAN_DSM# 40 RJ45_MIDI1- 6
    NC OGPIO PR2-
    41 NC
    42 NC 1 2 LAN_DSM#_SB 27 40 RJ45_MIDI2- 5 PR3-

    www.kythuatvitinh.com
    R2086 0_0402_5%
    RTL8111C-GR_QFN64_9X9 40 RJ45_MIDI2+ 4 PR3+
    1108 Add LAN DSM function
    40 RJ45_MIDI1+ 3 PR2+
    U19 R450
    1 24 C1121 1 2 1 2 40 RJ45_MIDI0- 2
    LAN_MDI3- TCT1 MCT1 RJ45_MIDI3- 0.01U_0402_16V7K 75_0402_1% PR1-
    2 TD1+ MX1+ 23 DETCET PIN2 10
    LAN_MDI3+ 3 22 RJ45_MIDI3+ R447 2 40 RJ45_MIDI0+ 1
    TD1- MX1- C2103 C657 PR1+
    4 TCT2 MCT2 21 1 2 1 2 SHLD1 15
    LAN_MDI2- 5 20 RJ45_MIDI2- 0.01U_0402_16V7K 75_0402_1% 0.1U_0402_25V4K 11
    LAN_MDI2+ TD2+ MX2+ RJ45_MIDI2+ R448 +3V_LAN Green LED+
    6 TD2- MX2- 19
    7 18 C2104 1 2 1 2 LAN_LINK# 1 R451 2 1 LAN_LINK_R# 12
    LAN_MDI1- TCT3 MCT3 RJ45_MIDI1- 0.01U_0402_16V7K 75_0402_1% Green LED-
    8 TD3+ MX3+ 17
    LAN_MDI1+ 9 16 RJ45_MIDI1+ R449 300_0402_5% FOX_JM36113-P1122-7F
    TD3- MX3- C2105
    10 TCT4 MCT4 15 1 2 1 2
    LAN_MDI0- 11 14 RJ45_MIDI0- 0.01U_0402_16V7K 75_0402_1%
    LAN_MDI0+ TD4+ MX4+ RJ45_MIDI0+ LANGND
    12 TD4- MX4- 13 #PV for EMI
    NS692405 1 1
    C661 C662
    HP PoE solution C658 0.1U_0402_16V4Z 4.7U_0805_10V4Z
    RJ45_GND 2 2
    1 1 1 1 1 2
    A C659 C660 C663 C664 A
    1000P_1808_3KV7K
    0.01U_0402_16V7K 0.01U_0402_16V7K
    0.01U_0402_16V7K 2 2 2 2 0.01U_0402_16V7K
    #SI2 change vendor

    Place these components Security Classification Compal Secret Data Compal Electronics, Inc.
    colsed to LAN chip Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    LAN-8111C
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 30 of 53
    5 4 3 2 1
    A B C D E

    Mini Card 0--TV tuner/WWAN/Robson Mini Card 2---WLAN +1.5VS_WLAN


    +3VS_WLAN +3VALW
    0.01U_0402_16V7K 4.7U_0805_10V4Z

    +3VALW SIM card Connector +3VS_WWAN 0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    1 1 1 1
    0.01U_0402_16V7K 4.7U_0805_10V4Z 1 1 C568 C569 C570 C571
    +3VS_WWAN C566 C567

    JP4 2 2 2 2
    1 1 1 2 2
    C573 C574 C575
    0.1U_0402_16V4Z

    1 1 1
    C572 UIM_PWR 2 4.7U_0805_10V4Z 0.1U_0402_16V4Z
    1 UIM_DATA 2 1
    3 3
    2 2 2 UIM_CLK 4 4
    2 UIM_RST 5 5
    0.1U_0402_16V4Z UIM_VPP 6 8
    +3VS_WWAN 6 G1
    CONN@
    7 7 G2 9 #PV Pin 24 change to +3VS_WLAN
    JP6 +1.5VS_WLAN ACES_88266-07001 CONN@
    ICH_PCIE_WAKE# 1 2 JP7
    CH_DATA 1 2 ICH_PCIE_WAKE#
    3 3 4 4 1 1 2 2 +3VS_WLAN
    CH_CLK 5 6 CH_DATA 3 4
    5 6 36 CH_DATA 3 4
    17 CLKREQ#_10 CLKREQ#_10 7 8 UIM_PWR CH_CLK 5 6 +1.5VS_WLAN
    7 8 36 CH_CLK 5 6
    9 10 UIM_DATA 17 CLKREQ#_6 CLKREQ#_6 7 8 R699 1 2 0_0402_5% DEBUG@
    9 10 7 8 LPC_FRAME# 26,37,38
    11 12 UIM_CLK 9 10 R700 1 2 0_0402_5% DEBUG@
    17 CLK_PCIE_MCARD0# 11 12 9 10 LPC_AD3 26,37,38
    13 14 UIM_RST CLK_PCIE_MCARD2# 11 12 R701 1 2 0_0402_5% DEBUG@
    17 CLK_PCIE_MCARD0 13 14 17 CLK_PCIE_MCARD2# 11 12 LPC_AD2 26,37,38
    15 16 UIM_VPP CLK_PCIE_MCARD2 13 14 R702 1 2 0_0402_5% DEBUG@
    15 16 17 CLK_PCIE_MCARD2 13 14 LPC_AD1 26,37,38
    17 18 15 16 R703 1 2 0_0402_5% DEBUG@
    17 18 15 16 LPC_AD0 26,37,38
    19 20 M_WXMIT_OFF# PLT_RST# 17 18
    0_0402_5% 19 20 PLT_RST# R704 17 18
    21 21 22 22 17 CLK_DEBUG_PORT_1 1 2 0_0402_5% DEBUG@ 19 19 20 20 XMIT_OFF#
    27 PCIE_RXN1 1 R419 2 PCIE_C_RXN1 23 23 24 24 R420 1 2 0_0805_5% +3VALW 0_0402_5% 21 21 22 22 PLT_RST# @
    27 PCIE_RXP1 1 R421 2 PCIE_C_RXP1 25 25 26 26 R422 1 2 0_0805_5% +3VS_WWAN 27 PCIE_RXN3 R423 1 2 PCIE_C_RXN3 23 23 24 24 R424 1 2 0_0805_5% +3VALW
    0_0402_5% 27 28 +1.5VS_WLAN 27 PCIE_RXP3 R425 1 2 PCIE_C_RXP3 25 26 R426 1 2 0_0805_5% +3VS_WLAN
    27 28 ICH_SMBCLK 0_0402_5% 25 26
    29 29 30 30 27 27 28 28 +1.5VS_WLAN
    PCIE_TXN1 31 32 ICH_SMBDATA 29 30 ICH_SMBCLK
    27 PCIE_TXN1 31 32 29 30
    PCIE_TXP1 33 34 PCIE_TXN3 31 32 ICH_SMBDATA
    27 PCIE_TXP1 33 34 27 PCIE_TXN3 31 32
    35 36 PCIE_TXP3 33 34
    35 36 USB20_N8 27 27 PCIE_TXP3 33 34
    R427 0_0603_5% 37 38 35 36
    37 38 USB20_P8 27 35 36 USB20_N5 27
    +3VS_WWAN 1 2 39 39 40 40 37 37 38 38 USB20_P5 27
    1 2 41 41 42 42 WW_LED# 39 39 39 40 40
    R428 0_0603_5% 43 44 +3VS_WLAN 41 42
    43 44 41 42
    45 45 46 46 43 43 44 44 WL_LED# 39
    47 47 48 48 +1.5VS_WLAN 45 45 46 46
    49 49 50 50 47 47 48 48 +1.5VS_WLAN
    2 @ 2
    51 51 52 52 +3VS_WWAN 49 49 50 50
    47K_0402_5% 51 52 +3VS_WLAN
    UIM_PWR R441 UIM_DATA 51 52
    53 GND1 GND2 54 1 2
    53 GND1 GND2 54
    +3VALW
    0821 Change +3VS to +3VS_WWAN FOX_AS0B226-S40N-7F #SI UIM DATA pull up UIM_PWR +1.5VS R431 1 2 0_1206_5% +1.5VS_WLAN
    FOX_AS0B226-S40N-7F
    +3VS_WWAN +3VALW
    0811 Pins 37 and 43 connect to GND and remove +1.5VS

    1
    D11 @ +3VS R432 1 2 0_1206_5% +3VS_WLAN @
    1 2 M_WXMIT_OFF# R418 @ R433 R434
    27 WXMIT_OFF#
    1 2 18P_0402_50V8J 10K_0402_5% 100K_0402_5%
    CH751H-40_SC76 0_1206_5%

    2
    UIM_CLK XMIT_OFF#
    1

    1
    AP2305GN Q115 C585 D88 D @
    1 2 2 Q10
    27 XMIT_OFF
    G 2N7002_SOT23-3
    S

    1 3
    D

    2 CH751H-40PT_SOD323-2 S

    3
    G
    2

    38 WWAN_POWER_OFF R435
    #SI2 leakage issue
    1 2
    0_0402_5%
    @

    Near to Express Card slot.


    3
    New Card +3VS_PEC 3
    CONN@
    Express Card Power Switch JEXP1 4.7U_0805_10V4Z
    +1.5VS Close to
    C576
    1 2 0.1U_0402_16V4Z U16 R436
    JEXP 2 0_0402_5%
    1 USB10-
    1
    2
    GND 1 1
    27 USB20_N9 USB_D-
    12 11 +1.5VS_PEC R437 1 2 0_0402_5% USB10+ 3 C577 C578
    +3VS 1.5Vin 1.5Vout 27 USB20_P9 USB_D+
    14 13 EXP_CPPE# 4
    1.5Vin 1.5Vout CPUSB# 2 2
    5 RSV

    www.kythuatvitinh.com
    6 0.1U_0402_16V4Z
    C579 1 ICH_SMBCLK RSV
    2 0.1U_0402_16V4Z 2 3.3Vin 3.3Vout 3 +3VS_PEC 17,21,27,37 ICH_SMBCLK 7 SMB_CLK
    4 5 ICH_SMBDATA 8
    3.3Vin 3.3Vout 17,21,27,37 ICH_SMBDATA SMB_DATA +1.5VS_PEC
    C580 1 2 0.1U_0402_16V4Z 9
    +1.5VS_PEC +1.5V
    +3VALW 17 15 +3V_PEC R438 10
    AUX_IN AUX_OUT +1.5VS_PEC +1.5V
    27,30 ICH_PCIE_WAKE# 1 2 PCIE_PME#_R 11 4.7U_0805_10V4Z
    PLT_RST# 0_0402_5% WAKE#
    9,20,25,30,32 PLT_RST# 6 SYSRST# OC# 19 +3V_PEC
    12 +3.3VAUX 1 1
    PERST# 13
    SYSON PERST# PERST# C581 C582
    38,39,41,50 SYSON 20 SHDN# PERST# 8 +3VS_PEC 14 +3.3V
    15 +3.3V
    SUSP# CLKREQ#_4 2 2
    33,38,41,44,46,47,48 SUSP# 1 STBY# NC 16 17 CLKREQ#_4 16 CLKREQ#
    EXP_CPPE# 17
    R439 1 CPPE#
    +3VALW 2 100K_0402_5% 10 CPPE# GND 7 17 CLK_PCIE_NCARD# 18 REFCLK-
    0.1U_0402_16V4Z
    17 CLK_PCIE_NCARD 19 REFCLK+
    27 EXP_CPPE# EXP_CPPE# 9 20
    CPUSB# GND
    27 PCIE_RXN4 21 PERn0
    18 RCLKEN 27 PCIE_RXP4 22 PERp0
    23 +3V_PEC
    GND
    R5538D001-TR-F_QFN20_4X4~D 27 PCIE_TXN4 24 PETn0
    27 PCIE_TXP4 25 4.7U_0805_10V4Z
    PETp0
    26
    internal pull high to 3.3Vaux-in GND C583 1 1
    27 29
    4 EC need setting at Hi-Z & output Low 28
    GND GND
    30 C584 4
    GND GND
    SANTA_131851-A_LT 2 2
    0.1U_0402_16V4Z

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    WLAN, WWAN, New Card
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 31 of 53
    A B C D E
    5 4 3 2 1

    +1.8VS_CR
    +3VS
    1 1 1 1 #SI stuff
    R1042 1 2 4.7K_0402_5% XDCD0#_SDCD# C1326 C1329 +VCC_OUT +VCC_4IN1
    R1041 1 2 4.7K_0402_5% XDCD1#_MSCD# 10U_0805_10V4Z 0.1U_0402_16V4Z R1128
    2 2 C1327 2 C1328 2 0_0603_5%
    0.1U_0402_16V4Z 1000P_0402_50V7K 1 2
    D +VCC_4IN1 +3VS D

    1
    +3VS C1325
    R1044 2 1 10K_0402_5% XDWP#_SDWP# C1324 0.1U_0805_50V7M
    R1043 2 1 10K_0402_5% XD_RB# U36 1 10U_0805_10V4Z

    2
    2
    1 1
    3 5 C1336
    17 CLK_SRC11# APCLKN APVDD
    4 10 0.1U_0402_16V4Z C1334 C1335
    17 CLK_SRC11 APCLKP APV18 2
    30 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    TAV33 2 2
    27 PCIE_TXN5 9 APRXN
    +3VS 27 PCIE_TXP5 8 APRXP DV33 19
    20
    Use 0603 type and over 20
    R709 DV33 +1.8VS_CR
    XD_CLE
    27 PCIE_RXN5
    C1321 2 1 0.1U_0402_16V4Z PCIE_C_RXN5
    PCIE_C_RXP5
    11 APTXN DV33 44 mils trace width on both side
    1 2 10K_0603_5% 27 PCIE_RXP5
    C1322 2 1 0.1U_0402_16V4Z 12 APTXP DV18 18
    R1048 37
    XD_ALE DV18
    @ 2 1 10K_0402_5% #SI2 Change PH +3VS R1047 2 1 8.2K_0402_5% PREXT 7 APREXT 1 1
    R1049 48 XD_SD_MS_D0
    MDIO0 XD_SD_MS_D1
    2 1 10K_0402_5% MDIO1 47 C1332 C1333
    +3VS R972 1 2 10K_0402_5% XIN 38 46 XD_SD_MS_D2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
    PCIES_EN MDIO2 XD_SD_MS_D3 2 2
    39 45
    XD_RE# R1046 1 2 200K_0402_5%
    PCIES JMB385 MDIO3
    MDIO4 43 SDCMD_MSBS_XDWE#
    42 SDCLK_MSCLK_XDCE#
    MDIO5 XDWP#_SDWP#
    MDIO6 41
    40 XD_CLE
    MDIO7 XD_D4
    MDIO8 29
    XDCE# 2 1 2 1 1 28 XD_D5
    @ R706 @ C788 9,20,25,30,31 PLT_RST# XRSTN MDIO9 XD_D6 +VCC_4IN1
    2 XTEST MDIO10 27
    100_0402_5% 100P_0402_25V8K 26 XD_D7
    @ MDIO11 XD_RE# +VCC_OUT
    SDCLK 1 2 1 2 27 CR_CPPE# R50 1 2 0_0402_5% 13
    MDIO12 25
    23 XD_RB# #SI no stuff
    40mil
    @ R707 @ C789 T39 SEEDAT MDIO13 XD_ALE
    14 SEECLK MDIO14 22
    100_0402_5% 100P_0402_25V8K @
    C 34 +3VS U37 C
    MSCLK D86 XDCD1#_MSCD# NC
    1 2 1 2 15 CR1_CD1N NC 35
    @ R708 @ C790 1 2 XDCD0#_SDCD# 16 36 3 1
    100_0402_5% 100P_0402_25V8K 27 CR_WAKE# CR1_CD0N NC VIN VOUT
    4 VIN/CE VOUT 5
    CH751H-40PT_SOD323-2 use for PWR_EN# 6 1
    APGND

    1
    +VCC_OUT 17 CR1_PCTLN 2 GND 1
    24 C1330
    GND 0.1U_0402_16V4Z RT9701-PB_SOT23-5
    GND 31
    SDCLK_MSCLK_XDCE# R710 SDCLK CR_LED# 2
    1 2 22_0402_5% #SI Add D86 for card reader wake up 21 CR1_LEDN GND 32 @ R1050
    R711 1 2 22_0402_5% MSCLK 8mA sink current 33 @ C1331 2 150K_0402_5%

    2
    R712 XDCE# GND
    1 2 22_0402_5% #PV stuff D86 1U_0603_10V4Z

    JMB385-LGEZ0A_LQFP48_7X7
    reserved power circuit
    D42
    Layout must add a thermal pad pin49
    XDCD1#_MSCD# 2
    1 1 XD_CD#
    XDCD0#_SDCD# 3
    C1047
    DAN202U_SC70 270P_0402_50V7K
    2

    +1.8VS_CR +1.8VS

    Card Reader Connector


    JREAD1
    +5VS 3 21 R705 1 2
    +VCC_4IN1 XD-VCC SD-VCC +VCC_4IN1
    28 0_0805_5%
    B XD_SD_MS_D0 MS-VCC B
    32 XD-D0 @
    1

    XD_SD_MS_D1 10 7 IN 1 CONN 20 SDCLK


    XD_SD_MS_D2 XD-D1 SD_CLK XD_SD_MS_D0
    XD_SD_MS_D3
    9 XD-D2 SD-DAT0 14
    XD_SD_MS_D1
    #SI no stuff
    R719 8 12
    56_0402_5% XD_D4 XD-D3 SD-DAT1 XD_SD_MS_D2
    7 XD-D4 SD-DAT2 30
    XD_D5 6 29 XD_SD_MS_D3
    2

    XD_D6 XD-D5 SD-DAT3 XD_D4


    5 XD-D6 SD-DAT4 27
    XD_D7 4 23 XD_D5
    XD-D7 SD-DAT5
    2

    18 XD_D6
    D15 SDCMD_MSBS_XDWE# SD-DAT6 XD_D7
    34 XD-WE SD-DAT7 16
    HT-F196BP5_WHITE XDWP#_SDWP# 33 25 SDCMD_MSBS_XDWE#
    XD_ALE XD-WP SD-CMD XDCD0#_SDCD#
    35 XD-ALE SD-CD-SW 1
    XD_CD# 40
    XD_RB# XD-CD XDWP#_SDWP#
    #SI2 Change to Mos control 39 2
    1

    R51 XD_RE# XD-R/B SD-WP-SW


    1 2 0_0402_5% 38 XD-RE
    XDCE# 37
    XD_CLE XD-CE MSCLK
    #PV remove Mos 36 XD-CLE MS-SCLK 26
    1

    Q54 D XD_SD_MS_D0
    MS-DATA0 17
    2N7002_SOT23-3 2 CR_LED# 11 15 XD_SD_MS_D1
    G 7IN1 GND MS-DATA1 XD_SD_MS_D2
    31 7IN1 GND MS-DATA2 19
    @ S 24 XD_SD_MS_D3
    3

    MS-DATA3
    2

    22 XDCD1#_MSCD#
    MS-INS

    www.kythuatvitinh.com
    R2098 13 SDCMD_MSBS_XDWE#
    MS-BS
    4.7K_0402_5% 41 7IN1 GND
    @ 42 7IN1 GND
    1

    TAITW_R015-B10-LM
    CONN@

    #SI Change Lib


    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    USB CardReader&CONN
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 32 of 53
    5 4 3 2 1
    A B C D E

    CODEC POWER
    +3VS_HDA +3VS +VDDA_CODEC
    +3VDD_CODEC +VDDA_CODEC_R
    W=40Mil +5VALW (4.75V)
    R1051 R1052 R1053 U39
    300mA

    2.2U_0805_16V4Z
    1 2 +3VS 1 2 1 2 +VDDA_CODEC C1341 1 2 1 5
    VIN OUT

    1U_0603_10V4Z
    BLM18BD601SN1D_0603 BLM18BD601SN1D_0603 0_0603_5% 0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    1

    0.1U_0402_16V4Z

    1U_0603_10V4Z
    1 1 1 1 2 GND

    C1342

    C1343
    1
    1 3 4 1
    31,38,41,44,46,47,48 SUSP# SHDN# BP 2
    2 2 2 2

    C1337

    C1338

    C1339

    C1340
    G9191-475T1U_SOT23-5 1
    2 C1344

    0.1U_0402_16V4Z
    2

    U38

    9 EAPD_CODEC
    +3VDD_CODEC DVDD_CORE* EAPD/ SPDIF OUT 0 or 1 / GPIO 0 47 EAPD_CODEC 38
    1 DVDD_CORE VOL_UP/DMIC_0/GPIO 1 2 DMIC_DAT 19

    VOL_DN/DMIC_1/GPIO 2 4
    HDA_BITCLK_CODEC +VDDA_CODEC_R 25 AVDD1*
    GPIO 3 30
    1

    @ 38
    R1054 AVDD2**
    VREFOUT-E / GPIO 4 31
    47_0402_5%
    +3VS_HDA 3 DVDD_IO GPIO 5 43
    2

    1 32 MONO_OUT GPIO 6 44
    @
    C1345 45 SPDIF_OUT1 SPDIF1-->Docking
    2 SPDIF OUT1 / GPIO 7 SPDIF_OUT1 40 2
    33P_0402_50V8K HDA_BITCLK_CODEC 6
    2 26 HDA_BITCLK_CODEC BITCLK
    48 SPDIF_OUT0 #SI SPDIF0-->VGA
    SPDIF OUT0 SPDIF_OUT0 21
    HDA_SDOUT_CODEC 5
    26 HDA_SDOUT_CODEC SDO
    R1055 1 2 33_0402_5% 8
    26 HDA_SDIN0 SDI_CODEC
    28 VREFOUT_B
    VREFOUT-B VREFOUT_B 35
    HDA_SYNC_CODEC 10
    26 HDA_SYNC_CODEC SYNC +VDDA_CODEC_R
    VREFOUT-C 29
    #SI connect to EC HDA_RST#_CODEC 11
    26,38 HDA_RST#_CODEC RESET# R1056 1 2 5.1K_0402_1%
    R1057 1 2 20K_0402_1% EXTMIC_DET# 35
    R1058 22_0402_5% 13 SENSE R1059 1 2 39.2K_0402_1% JACK_DET# 35,40
    R1070 1 47K_0402_5% SENSE_A R683
    38 EC_BEEP 2 19 DMIC_CLK 1 2 46 DMIC_CLK 1 2 10K_0402_1% INTMIC_DET# 35
    C1346 1 2 0.1U_0402_16V4Z
    R1060 1 2 47K_0402_5% C1347 2 1 33 41 HP_OUTR
    27 SB_SPKR HP_OUTR 35
    1U_0603_10V4Z CAP2 PORTA_R
    HP Jack & Dock
    R1061 1 2 10K_0402_5% 1 2 MONO_INR 12 PCBEEP 39 HP_OUTL
    PORTA_L HP_OUTL 35
    C1348 0.1U_0402_16V4Z
    C1349 1 2 0.1U_0402_16V4Z
    22 MIC_EXTR 1 2 Jack MIC
    PORTB_R MIC_EXT_R 35
    @ C1358 40 C1350 1U_0603_10V6K
    R1062 1 NC / OTP MIC_EXTL
    1 2 +VDDA_CODEC_R 2 5.1K_0402_1% PORTB_L 21 1 2 MIC_EXT_L 35
    0.1U_0402_16V4Z 40 SENSE_B# R1063 1 2 39.2K_0402_1% SENSEB# 34 C1351 1U_0603_10V6K 1 2
    SENSE_B / NC MIC_IN_R 35
    1

    1
    @ C1359 37 24 MIC_INR C1352 0.022U_0603_25V7K
    C1353 NC PORTC_R @ R1064
    1 2
    0.1U_0402_16V4Z 0.1U_0402_16V4Z 18 23 MIC_INL 0_0603_5% Internal MIC
    2 NC PORTC_L
    @ C1360 19 C1354 0.022U_0603_25V7K

    2
    NC LINE_OUT_R
    1 2 PORTD_R 36 LINE_OUT_R 35 1 2 MIC_IN_L 35
    0.1U_0402_16V4Z 20 NC LINE_OUT_L
    3 @ C1361 C1355 PORTD_L 35 LINE_OUT_L 35 Internal SPKR. 3
    1 2 10U_0805_10V4Z C746 1U_0603_10V6K
    0.1U_0402_16V4Z 1 2 VC_REFA 27 15 DOCK_MICR 1 2 DOCK_MICR_C 1 2
    VREFFILT PORTE_R DOCK_MIC_R 40
    R943 10K_0402_5% DOCK MIC
    R1067 26 14 DOCK_MICL 1 2 DOCK_MICL_C 1 2
    AVSS1* PORTE_L DOCK_MIC_L 40
    1 2 R944 10K_0402_5%

    1
    0_1206_5% 42 C753 1U_0603_10V6K
    AVSS2** R910 R911
    PORTF_R 17
    R1065 7 DVSS**

    www.kythuatvitinh.com
    1 2 16 1.21K_0402_1% 1.21K_0402_1%
    0_1206_5% PORTF_L

    2
    R1066
    1 2 92HD71B7X5NLGXA1X8_QFN48_7X7 1/10*Vin
    GNDA 35,40
    0_1206_5%
    need close to Codec

    GND GNDA

    #SI -3db test fail

    SENSE A SENSE B

    Port Resistor Port Resistor

    4
    A 39.2K E 39.2K 4

    B 20K F 20K

    C 10K G 10K Security Classification Compal Secret Data


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title
    Codec_IDT9271B7
    D 5.11K H 5.11K THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 33 of 53
    A B C D E
    5 4 3 2 1

    D
    MDC 1.5 Conn. D

    JP8 1 2 +1.5VS
    R475 0_0603_5%
    1 2 @1 2 +3VS
    HDA_SDOUT_MDC GND1 RES0 R476 0_0603_5%
    26 HDA_SDOUT_MDC 3 IAC_SDATA_OUT RES1 4
    5 GND2 3.3V 6 +3VS
    HDA_SYNC_MDC 7 8 +3VS
    26 HDA_SYNC_MDC IAC_SYNC GND3
    26 HDA_SDIN1 1 2 HDA_SDIN1_MDC 9 IAC_SDATA_IN GND4 10
    26 HDA_RST#_MDC R477 33_0402_5% 11 12 HDA_BITCLK_MDC 26
    IAC_RESET# IAC_BITCLK

    C619

    C620

    @C621
    1000P_0402_50V7K

    0.1U_0402_16V4Z

    4.7U_0805_10V4Z
    2 1 1 2
    @ R478 @ C618

    GND
    GND
    GND
    GND
    GND
    GND
    1 1 1
    10_0402_5% 10P_0402_25V8K

    ACES_88018-124G

    13
    14
    15
    16
    17
    18
    2 2 2

    Connector for MDC Rev1.5

    C C

    B B

    www.kythuatvitinh.com
    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    MDC 1.5 & Robson
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 34 of 53
    5 4 3 2 1
    A B C D E

    +5VAMP +5VS SPEAKER


    R1133
    0.1U_0402_16V4Z 1 2 E&T_3806-F04N-02R
    0_1206_5% 6 GND2
    1 1 1 5 GND1
    C1477 C1478 C1479
    SPKL+ R1102 1 2 0_0603_5% 4
    10U_0805_10V4Z SPKL- R1103 1 0_0603_5% 4
    2 3 3
    2 2 2 SPKR+ R1104 1 0_0603_5%
    2 2 2
    +5VS SPKR- R1105 1 2 0_0603_5% 1 1

    100P_0402_50V8J

    100P_0402_50V8J

    100P_0402_50V8J

    100P_0402_50V8J
    0.1U_0402_16V4Z
    1 JP60 1
    15.6 dB 1 1 1 1
    #SI change to 0.022U C1375 C1376 C1377 C1378

    16
    15
    #SI remove serial resistor

    2
    U40 @ 2 2 2 2

    PVDD1
    PVDD2
    VDD
    R1134 R1135
    100K_0402_5% 100K_0402_5% @ D55 D56 @
    PSOT24C_SOT23-3 PSOT24C_SOT23-3

    2
    C1480 1 2 0.022U_0603_25V7K 7 2

    1
    RIN+ GAIN0
    1 2
    C1481 0.022U_0402_16V7K 3
    GAIN1

    1
    C1482 1 2 0.022U_0603_25V7K 17 @
    33 LINE_OUT_R RIN- SPKR+
    1 2 ROUT+ 18
    C1483 0.022U_0402_16V7K R1137 R1138
    100K_0402_5%
    14 SPKR-

    2
    C1484 ROUT-
    1 2 0.022U_0603_25V7K 9 LIN+
    1 2 100K_0402_5%
    C1485 0.022U_0402_16V7K 4 SPKL+
    LOUT+
    C1486 1 2 0.022U_0603_25V7K 5
    33 LINE_OUT_L LIN- SPKL-
    C1487
    1 2
    0.022U_0402_16V7K LOUT- 8 #SI change to 15.6 dB

    NC 12

    THERMAL PAD
    EC_MUTE# BYPASS 10 Keep 10 mil width
    19
    2 38 EC_MUTE# SHUTDOWN
    1
    Audio/B & CIR 2

    GND1
    GND2
    GND3
    GND4
    C1488 1U_0805_16V7K JP49
    2 MIC_EXT_R 1 1
    MIC_EXT_L 2

    20
    13
    11
    1

    21
    2
    3 3
    TPA6017A2_TSSOP20 HP_OUT_R 4
    HP_OUT_L 4
    #SI2 change to 1U for depop issue 5 5
    6 6
    33 EXTMIC_DET# EXTMIC_DET# 7
    HP_DET# 7
    8 8
    9 9
    #SI pull high +3VALW CIR_IN
    10 10
    38,40 CIR_IN 11 11
    +5VL 12 12
    13 13
    14 14
    33,40 JACK_DET# R684 ACES_87213-1400G
    33 VREFOUT_B 2 1 C787 1 2 CONN@
    2N7002DW-7-F_SOT363-6 0_0402_5%
    1U_0603_10V4Z

    1
    +3VALW B+
    3

    R685 R686
    1

    4.7K_0402_5% 4.7K_0402_5%
    2

    5 Q49B R678

    2
    R750 R676 330K_0402_5%
    10K_0402_5% 10K_0402_5%
    4

    33 MIC_EXT_R MIC_EXT_R
    2

    EXTMIC IN
    1

    3 MIC_EXT_L 3
    33 MIC_EXT_L +VDDA_CODEC
    HP OUT R1077 C1379
    INTMIC IN
    6

    2N7002DW-7-F_SOT363-6 +VDDA_CODEC 0_0402_5% 1U_0603_10V4Z


    1 2 1 1 2
    1

    2
    D 0.01U_0402_25V7K #SI change to 40.2 ohm

    1
    HP_DET# 2 Q37 2 Q49A R951
    G C854 R1078 R1079 10K_0402_5%
    S 2N7002_SOT23-3 2 4.7K_0402_5% 4.7K_0402_5%
    3

    www.kythuatvitinh.com

    1
    Q47B JP51

    2
    5

    2N7002DW-7-F_SOT363-6 1
    R968 1
    33 MIC_IN_L 2 2
    DOCK_R C795
    +

    33 HP_OUTR 3 4 1 2 1 2 DOCK_LOUT_R 40 33 MIC_IN_R 3 3


    47_0402_5% 4
    HP OUT For Docking 4
    2

    150U_B_6.3VM_R40M +3VS 2 1
    R969
    R681 10K_0402_5% 5
    DOCK_L C796 GND1
    +

    33 HP_OUTL 6 1 1 2 1 2 DOCK_LOUT_L 40 38 ANA_MIC_DET 6 GND2


    47_0402_5%
    150U_B_6.3VM_R40M ACES_88231-04001
    Q47A
    33 INTMIC_DET# CONN@

    6
    2N7002DW-7-F_SOT363-6

    3
    C785 HP_OUT_R
    +

    1 2 2N7002DW-7-F_SOT363-6 2
    5 Q109A
    150U_B_6.3VM_R40M Q109B

    1
    2N7002DW-7-F_SOT363-6
    HP OUT For M/B

    4
    C786 HP_OUT_L
    +

    1 2

    150U_B_6.3VM_R40M

    4 4

    Security Classification Compal Secret Data


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title
    AMP & Audio Jack
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 35 of 53
    A B C D E
    5 4 3 2 1

    Left side ESATA/USB combination Connector


    +5VALW

    USB_VCCC
    U41
    USB_VCCC D46
    1 GND OUT 8 W=60mils
    2 7 JP53 +5VALW 4 2 SATA_TXP5
    IN OUT VIN IO1

    1000P_0402_50V7K
    D USB D

    150U_D_6.3VM

    0.1U_0402_16V4Z
    3 IN OUT 6 1 1 VBUS
    1 4 5 1 1 2 SATA_TXN5 3 1
    EN# OC# + 27 USB20_N2 D- IO2 GND

    C1380

    C1382

    C1383
    C1381 3
    TPS2061IDGNR_MSOP8 27 USB20_P2 D+ @ PRTR5V0U2X_SOT143-4
    4 GND
    2 2 2 2
    5 GND
    USB_EN# SATA_TXP5 6
    26 SATA_TXP5 A+ ESATA
    SATA_TXN5 7
    26 SATA_TXN5 A-
    4.7U_0805_10V4Z 8 GND
    26 SATA_RXN5_C
    C1385 2 1 0.01U_0402_16V7K SATA_RXN5 9 B-
    C1384 2 1 0.01U_0402_16V7K SATA_RXP5 10
    26 SATA_RXP5_C B+
    R1083 1 2 10K_0402_5% +5VALW 11 GND
    12 GND
    13 GND
    14 GND
    15 GND
    TYCO_1759576-1
    CONN@

    C
    USB cable connector for Right side C

    JP55
    +5VALW 1 1
    2 2
    3 3
    USB_EN# 4 4
    27 USB20_N0
    5 5
    27 USB20_P0 6 6
    7 7
    27 USB20_N1 8 8
    27 USB20_P1 9 9
    10 10

    11 GND1
    12 GND2
    ACES_87213-1000G
    BT Connector Need change to New version
    ACES_87213-0800G
    10 GND 8 8 +3VAUX_BT
    7 7
    B 6 USB20_P6_R R1084 2 1 0_0402_5% B
    6 USB20_P6 27
    5 USB20_N6_R R1085 2 1 0_0402_5%
    5 USB20_N6 27
    4 4 BT_LED 39
    3 @ R1086 1 2 1K_0402_5%
    3 @ R1087 1 1K_0402_5% CH_DATA 31
    2 2
    Finger printer 9
    2
    GND 1 1
    0612 no install
    CH_CLK 31

    CONN@ JP57 D47

    www.kythuatvitinh.com
    +5VALW 4 2 USB20_P6_R
    VIN IO1
    #SI2 change to +3VS USB20_N6_R 3 IO2 GND 1
    @ +3VS
    R2112 0_0603_5% @ PRTR5V0U2X_SOT143-4
    R627 1 2 0_0603_5% 1 2

    @ Q31 SI2301BDS_SOT23
    20070209 Add for FPR +3VS +3VALW R2113 0_0603_5%
    R628 1 2 +3VAUX_BT
    +3VS_BT
    S

    Q105 SI2301BDS_SOT23
    D

    +3VALW 3 1 1 2
    1 0_0603_5% @
    0.1U_0402_16V4Z

    S
    C756

    D
    3 1
    0.1U_0402_16V4Z
    G
    2

    38 USB_EN#

    1
    2 JP24

    G
    1 1 1 1

    2
    1 C1386 R1090 C1387 C1388 C1389
    R634 1 USB20_N7_R 1
    27 USB20_N7 2 0_0402_5% 2 2
    R635 1 2 0_0402_5% USB20_P7_R 3 1U_0603_10V4Z 100K_0402_5%
    27 USB20_P7 3 2 2 2 2
    4

    2
    4
    2

    5 5
    6 0.01U_0402_16V7K 4.7U_0805_10V4Z
    6
    2

    7 GND
    D30 @ R652 8 R1092 C1390
    A PACDN042_SOT23-3~D GND A
    27 BT_OFF 1 2 1 2
    0_0402_5% ACES_85201-06051 10K_0402_5% 0.1U_0402_16V4Z
    1

    CONN@
    1

    @ #SI change lib #PV R1092 change to 10K

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    USB, BT, eSATA
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 36 of 53
    5 4 3 2 1
    5 4 3 2 1

    #SI change to +3VALW


    LPC Debug
    +3VL +3VL SPI ROM
    +3VL
    Port Change from +3VL to +3VS. 6/9

    1
    1 U27
    C711 20mils
    @ R552
    8 VCC VSS 4 Removed +3VS. 6/13
    1
    0.1U_0402_16V4Z 100K_0402_5% C712 3
    2 U28 0.1U_0402_16V4Z W

    2
    8 1 7 B+
    VCC A0 2 HOLD
    7 WP A1 2
    38,43 SMB_EC_CK1 6 3 1 2 SPI_FSEL# 1 CONN@
    D SCL A2 38 FSEL# S D
    38,43 SMB_EC_DA1 5 4 R553 10_0402_5% JP18
    SDA GND SPI_CLK_R
    38 SPI_CLK 1 2 6 C 1 Ground
    AT24C16AN-10SI-2.7_SO8 R554 10_0402_5% 2
    17 CLK_DEBUG_PORT_0 LPC_PCI_CLK
    38 FWR# 1 2 SPI_FWR# 5 2 SPI_SO 1 2 FRD# FRD# 38 3
    R556 10_0402_5% D Q R555 0_0402_5% Ground
    26,31,38 LPC_FRAME# 4 LPC_FRAME#
    WIESON G6179 8P SPI 5 +V3S

    1
    25,38 PCI_RST# 6 LPC_RESET#
    R557 7
    100K_0402_5% +V3S
    R2118 C2125
    #PV for EMI change 10 ohm 26,31,38 LPC_AD0 8 LPC_AD0
    26,31,38 LPC_AD1 9 LPC_AD1
    SPI_FSEL# 2 1 2 1 10

    2
    26,31,38 LPC_AD2 LPC_AD2
    &U1 11
    26,31,38 LPC_AD3 LPC_AD3
    33_0402_5% 22P_0402_50V8J 12
    ON/OFFBTNLED# VCC_3VA
    13 PWR_LED#
    R2119 C2126 14
    SPI_CLK_R 2 @ CAPS_LED#
    1 2 1 15 NUM_LED#
    VCC1PWRGD 16
    33_0402_5% 22P_0402_50V8J SPI_CLK_JP52 VCC1_PWRGD
    SST25LF080B_SO8-200mil Connect pin3 & 23 17 SPI_CLK
    SPI_CS#_JP52 18
    R2120 C2127 together and pin 24 SPI_SI_JP52 SPI_CS#
    19 SPI_SI
    SPI_FWR# 2 1 2 1 SPI_SO_JP52 20
    to GND in 6/29. SPI_HOLD#_0 SPI_SO
    21 SPI_HOLD#
    33_0402_5% 22P_0402_50V8J 22 Reserved
    23 Reserved
    24 Reserved

    ACES_87216-2404_24P

    #PV stuff #SI2 for EMI


    C C

    SPI_CLK 1 2 SPI_CLK_JP52
    DEBUG@ R558 0_0402_5%

    Acceleromter-1 FSEL#
    DEBUG@
    1
    R559
    2
    0_0402_5%
    SPI_CS#_JP52

    +3VALW FWR# 1 2 SPI_SI_JP52


    DEBUG@ R560 0_0402_5%
    +3VS +3VS_ACL +3VS_ACL_IO
    R561 1 2 HOLD# 1 2 SPI_HOLD#_0
    3.3K_0402_5%DEBUG@ R562 0_0402_5%
    D23 R564
    2 1 1 2 FRD# 1 2 SPI_SO_JP52
    0_0603_5% DEBUG@ R563 0_0402_5%
    CH751H-40PT_SOD323-2
    ON/OFFBTN_LED# 1 2 ON/OFFBTNLED#
    +3VS_ACL 38,39 ON/OFFBTN_LED# DEBUG@ R565 0_0402_5%

    U29 VCC1_PWRGD 1 2 VCC1PWRGD


    38 VCC1_PWRGD DEBUG@ R566 0_0402_5%
    LIS302DL
    1 1
    +3VS_ACL_IO 1 C713 C714
    VDD_IO
    +3VS_ACL 6 VDD GND 2
    4 0.1U_0402_16V4Z 10U_0805_6.3V6M
    GND 2 2
    25 ACCEL_INT 8 INT 1 GND 5
    9 INT 2 GND 10

    12 SDO
    17,21,27,31 CLK_SMBDATA 13 SDA / SDI / SDO
    17,21,27,31 CLK_SMBCLK 14 R1539
    B SCL / SPC B
    RSVD 3 1 2 +3VS_ACL_IO
    +3VS_ACL R1538 2 1 G_CS# 7 11 0_0603_5%
    10K_0402_5% CS RSVD
    LIS302DLTR_LGA14_3X5~D
    <BOM Structure>

    Must be placed in the center of the system.

    www.kythuatvitinh.com
    U29 & U14 must be close
    Acceleromter-2
    U14
    BMA150
    VDDIO 9 +3VS_ACL_IO
    ACCEL_INT 4 2 +3VS_ACL #SI co-lay MMA150
    INT VDD

    G_CS# 5 3
    CSB GND
    CLK_SMBCLK 6 1
    SCK RSVD
    RSVD 10
    7 SDO
    A A
    CLK_SMBDATA 8 11
    SDI RSVD
    RSVD 12

    BMA150_LGA12
    @

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    BIOS ROM
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 37 of 53
    5 4 3 2 1
    +3VL_EC

    0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K EC request 10/23


    1 1 1 1 1
    C715 C716 C717 C718 C719 +3VL +3VL_EC +EC_AVCC

    2 2 2 2 2 R572
    0.1U_0402_16V4Z 1000P_0402_50V7K 1 2 BATT_OVP 1 2
    0_0805_5% C794 100P_0402_50V8J
    For EMI

    111
    125
    +5VL +3VS 100P_0402_50V8J @ C1442

    22
    33
    96

    67
    9
    U30 KSI7 1 2
    SMB_EC_DA1 R573 1 2 4.7K_0402_5% 100P_0402_50V8J @ C1443

    VCC
    VCC
    VCC
    VCC
    VCC
    VCC

    AVCC
    SMB_EC_CK1 R577 1 2 4.7K_0402_5% KSI0 1 2
    SMB_EC_DA2 R574 1 2 4.7K_0402_5%
    SMB_EC_CK2 R575 1 2 4.7K_0402_5% 100P_0402_50V8J @ C1444
    GATEA20 1 21 INV_PWM KSO13 1 2
    26 GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F INV_PWM 19
    KB_RST# 2 23 FAN_PWM 100P_0402_50V8J @ C1445
    26 KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 FAN_PWM 6
    @ @ SIRQ 3 26 EC_BEEP KSO14 1 2
    27 SIRQ SERIRQ# FANPWM1/GPIO12 EC_BEEP 33
    C722 R576 LPC_FRAME# 4 27 ACOFF 100P_0402_50V8J @ C1446
    26,31,37 LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF 44,45
    1 2 1 2 26,31,37 LPC_AD3 LPC_AD3 5 0.01U_0402_16V7K KSO15 1 2
    33_0402_5% LPC_AD2 LAD3 C720 ECAGND
    26,31,37 LPC_AD2 7 LAD2 PWM Output 1 2
    15P_0402_50V8J 26,31,37 LPC_AD1 LPC_AD1 8 63 BATT_TEMP
    LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP 43
    LPC_AD0 BATT_OVP
    26,31,37 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
    ADP_I
    BATT_OVP 43
    100P_0402_50V8J @ C1448
    ADP_I/AD2/GPIO3A 65 ADP_I 44
    CLK_PCI_EC 12 AD Input 66 ADP_ID KSO9 1 2
    17 CLK_PCI_EC PCICLK AD3/GPIO3B ADP_ID 43
    PCI_RST# 13 75 TP_BTN# 100P_0402_50V8J @ C1449
    25,37 PCI_RST# PCIRST#/GPIO05 AD4/GPIO42 TP_BTN# 39
    +3VL R578 1 2 ECRST# 37 76 ANA_MIC_DET KSO10 1 2
    ECRST# SELIO2#/AD5/GPIO43 ANA_MIC_DET 35
    47K_0402_5% 20 100P_0402_50V8J @ C1450
    27 EC_SCI# R2067 1 SCI#/GPIO0E KSO11
    26,33 HDA_RST#_CODEC 2 0_0402_5% 38 CLKRUN#/GPIO1D 1 2
    68 DAC_BRIG 100P_0402_50V8J @ C1451
    DAC_BRIG/DA0/GPIO3C DAC_BRIG 19
    C721 2 1 70 VCTRL KSO12 1 2
    EN_DFAN1/DA1/GPIO3D VCTRL 44
    1

    0.1U_0402_16V4Z J1 DA Output 71 IREF


    KSI0 IREF/DA2/GPIO3E AC_SET IREF 44 100P_0402_50V8J @ C1452
    55 KSI0/GPIO30 DA3/GPIO3F 72 AC_SET 44
    JOPEN KSI1 56 KSO6 1 2
    2

    KSI2 KSI1/GPIO31 +5V 100P_0402_50V8J @ C1453


    57 KSI2/GPIO32
    #SI pull low 8.2K KSI3 58 83 EC_MUTE# KSO3 1 2
    KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# 35
    KSI4 59 84 USB_EN# R579 1 2 10K_0402_5% 100P_0402_50V8J @ C1454
    KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# 36
    KSI5 60 85 I2C_INT R580 1 2 10K_0402_5% KSO7 1 2
    KSI6 KSI5/GPIO35 PSCLK2/GPIO4C MUTE_LED I2C_INT 39 100P_0402_50V8J @ C1455
    +3VALW
    61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 MUTE_LED 40
    SUSP# PCI_RST# +3VS KSI7 62 87 TP_CLK KSO8 1 2
    KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK 39
    39 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F 88 TP_DATA 39
    KSO1 40 100P_0402_50V8J @ C1456
    KSO1/GPIO21
    1

    KSO2 41 Select SPI ROM or LPC ROM KSO4 1 2


    KSO2/GPIO22
    2

    R581 R713 KSO3 42 97 100P_0402_50V8J @ C1459


    KSO3/GPIO23 SDICS#/GPXOA00 AC_LED# 37
    1

    8.2K_0402_5% 100K_0402_5% R721 KSO4 43 98 DOCK_VOL_UP# #PV use for AC LED KSO0 1 2
    R583 KSO5 KSO4/GPIO24 SDICLK/GPXOA01 DOCK_VOL_DWN# DOCK_VOL_UP# 40
    10K_0402_5%
    10K_0402_5%
    KSO6
    44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 DOCK_VOL_DWN# 40
    45 KSO6/GPIO26 Matrix 109 #SI2 For EMI
    2

    KSO7 SDIDI/GPXID0 100P_0402_50V8J @ C1458


    46 SPI Device Interface
    1

    KSO8 KSO7/GPIO27 KSO5


    47 1 2
    2

    KSO9 KSO8/GPIO28 FRD#


    48 KSO9/GPIO29 SPIDI/RD# 119 FRD# 37
    KSO10 49 120 R190 1 2 33_0402_5% FWR# 100P_0402_50V8J @ C1460
    KSO10/GPIO2A SPIDO/WR# FWR# 37
    LID_SW# TP_BTN# KSO11 50 SPI Flash ROM 126 R191 1 2 33_0402_5% SPI_CLK KSI3 1 2
    KSO11/GPIO2B SPICLK/GPIO58 SPI_CLK 37
    KSO12 51 128 R192 1 2 33_0402_5% FSEL# 100P_0402_50V8J @ C1461
    KSO12/GPIO2C SPICS# +5VL FSEL# 37
    SYSON KSO13 52 KSI2 1 2
    KSO14 KSO13/GPIO2D R720
    53 KSO14/GPIO2E 1 2 10K_0402_5% 100P_0402_50V8J @ C1462
    KSO15 54 73 CIR_IN KSO1 1 2
    KSO15/GPIO2F CIR_RX/GPIO40 CIR_IN 35,40
    1

    81 74 VCC1_PWRGD 100P_0402_50V8J @ C1463


    KSO16/GPIO48 CIR_RLC_TX/GPIO41 VCC1_PWRGD 37
    R584 82 89 FSTCHG KSO2 1 2
    KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG 44
    8.2K_0402_5% #SI2 changhe to +3VALW 90 STD_ADP
    BATT_CHGI_LED#/GPIO52 STD_ADP 44
    91 CAPS_LED# 100P_0402_50V8J @ C1464
    CAPS_LED#/GPIO53 CAPS_LED# 39
    +3VALW SMB_EC_CK1 77 GPIO 92 BAT_LED# KSI5 1 2
    2

    37,43 SMB_EC_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BAT_LED# 39


    SMB_EC_DA1 78 93 ON/OFFBTN_LED# 100P_0402_50V8J @ C1465
    37,43 SMB_EC_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 ON/OFFBTN_LED# 37,39
    SMB_EC_CK2 79 SM Bus 95 SYSON 9/21 add R for nvidia KSI1 1 2
    6,21 SMB_EC_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON 31,39,41,50
    SMB_EC_DA2 80 121 VR_ON 100P_0402_50V8J @ C1466
    6,21 SMB_EC_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON 49
    2

    127 AC_IN KSI4 1 2


    R585 AC_IN/GPIO59 ENBKL 100P_0402_50V8J @ C1467
    2 1 2 1
    #SI no stuff 10K_0402_5% R586 10K_0402_5% R1132 10K_0402_5% KSI6 1 2
    SLP_S3# 6 100 EC_RSMRST#
    27 SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# 27
    SLP_S5# 14 101 R588 1 2
    27 SLP_S5# EC_LID_OUT# 27
    1

    R589 @ EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON 0_0402_5%


    27 EC_SMI# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 EC_ON 45
    1 2 EC_PME# LID_SW# 16 103 WL_BLUE_LED#
    25 PCI_PME# 39 LID_SW# LID_SW#/GPIO0A EC_SWI#/GPXO06 WL_BLUE_LED# 39
    0_0402_5% ESB_CLK_R 17 104 R408 1 2 PM_PWROK
    ESB_DAT_R SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF# 100_0402_5% PM_PWROK 9,27
    18 GPO 105
    EC_PME# 19
    PBTN_OUT#/GPIO0C
    EC_PME#/GPIO0D GPIO
    BKOFF#/GPXO08
    WL_OFF#/GPXO09 106 M_PWROK BKOFF# 19
    M_PWROK 9,27
    14" INT_KBD
    1@ R591 2 0_0603_5% 25 107 TP_LED#
    9 TSATN#
    40 CONA#
    CONA# 28
    29
    EC_THERM#/GPIO11
    FAN_SPEED1/FANFB1/GPIO14
    GPXO10
    GPXO11 108
    TP_LED# 39
    #PV PWROK sequence issue CONN.( TYPE "D"
    31 WWAN_POWER_OFF FANFB2/GPIO15
    +3VL 1
    R593 4.7K_0402_5%
    2
    UTX 30
    LAN_POWER_OFF_R 31 EC_TX/GPIO16
    110 SLP_S4#
    KB)
    EC_RX/GPIO17 PM_SLP_S4#/GPXID1 SLP_S4# 27 +3VL
    ON/OFFBTN 32 112 ENBKL
    39 ON/OFFBTN ON_OFF/GPIO18 ENBKL/GPXID2 ENBKL 21
    R592 DIM_LED 34 114 EAPD_CODEC JP19
    41 DIM_LED PWR_LED#/GPIO19 GPXID3 EAPD_CODEC 33
    1 2 ON/OFFBTN NUM_LED# 36 GPI 115 THERM_SCI# KSO15
    40 DOCK_SLP_BTN# 39 NUM_LED# NUMLED#/GPIO1A GPXID4 THERM_SCI# 21,27 1
    0_0402_5% 116 SUSP# KSO10
    C723 GPXID5 PWRBTN_OUT# SUSP# 31,33,41,44,46,47,48 D16 KSO11 2
    GPXID6 117 PWRBTN_OUT# 27 3

    www.kythuatvitinh.com
    R735 15P_0402_50V8J 118 NMI_DBG# 1 2 ADP_ID KSO14
    UTX CRY2 GPXID7 KSO13 4
    1 2 1 2 122 XCLK1 5
    123 124 +3VL CH751H-40PT_SOD323-2 KSO12
    <BOM Structure> XCLK0 V18R 6
    0_1206_5% 1 KSO3
    7
    1

    AGND

    Y5 KSO6
    GND
    GND
    GND
    GND
    GND

    @ 8

    1
    #SI2 reserve for EC debug 2 1 @ C724 R714 KSO8
    NC IN R595 4.7U_0603_6.3V6K 10K_0402_5% KSO7 9
    20M_0402_5% KB926QFB0_LQFP128_14X14 2 KSO4 10
    3 4
    11
    24
    35
    94
    113

    69

    NC OUT KSO2 11
    2

    32.768KHZ_12.5P_1TJS125DJ2A073 D14 KSI0 12


    For C

    2
    NMI_DBG# 13
    1 2 PCI_SERR# PCI_SERR# 25
    KSO1
    14
    1 2 CRY1 Revision KSO5
    +3VL_EC +3VL CH751H-40PT_SOD323-2 KSI3 15
    C725 KSI2 16
    ECAGND

    15P_0402_50V8J KSO0 17
    18
    1

    1
    R715 KSI5
    +EC_AVCC L30 10K_0402_5% KSI4 19
    0_0603_5% KSO9 20
    KSI6 21
    L31 D13 KSI7 22
    2

    2
    R733 LAN_POWER_OFF_R AC_IN ACIN KSI1 23
    30 LAN_POWER_OFF 1 2 0_0402_5% 1 2 1 2 2 1 ACIN 44 24
    C726 0.1U_0402_16V4Z 0_0603_5%
    CH751H-40PT_SOD323-2 ACES_85201-2405
    +3VL 1 2 CONN@
    R729 1 2 0_0402_5% SMB_EC_CK1 Cypress C791 100P_0402_50V8J
    39 SMB_EC_CK1_R
    R730 1 2 0_0402_5% SMB_EC_DA1 R1100 4.7K_0402_5%
    39 SMB_EC_DA1_R
    ESB_CLK_R 1 2

    R731 1 2 0_0402_5% ESB_CLK_R ENE R1099 4.7K_0402_5%


    39 ESB_CLK
    R732 1 2 0_0402_5% ESB_DAT_R ESB_DAT_R 1 2
    39 ESB_DAT
    2
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title
    C727
    1
    15P_0402_50V8J THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    EC KB926/KB Conn.
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    #PV reserve C727 for EMI DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    @ MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 38 of 53
    A B C D E

    System LED White Keyboard backlight Conn +3VS


    #SI2 add PH +3VS
    Mini card LED

    1
    D50 R1095 R716
    1 2 1 2 10K_0402_5%
    38 CAPS_LED#
    HT-F196BP5_WHITE 200_0402_5%
    +5VS_LED
    Cap lock +5VS_KBL +5VS_LED Q112
    2N7002_SOT23-3

    1
    D
    White

    2
    1
    R614 2
    36 BT_LED WL_BLUE_LED# 38
    JP9 G

    1
    D52 R1097 1 0_0805_5% S
    Battery

    3
    1 R1126
    38 BAT_LED# 1 2 1 2 +5VALW_LED 2 2
    1 5 3 100K_0402_5% 1

    2
    HT-F196BP5_WHITE 200_0402_5% G1 3
    Charge LED 6 G2 4 4
    R193

    2
    QSMF-C16E_AMBER-WHITE ACES_85201-04051
    White R1098 1 2 0_0402_5%
    31 WL_LED#
    White 200_0402_5%
    1 2 1 2 +5VS_LED R194 D19
    26 SATA_LED# 0_0402_5% WL_LED
    31 WW_LED# 1 2 1 2

    27 HDDHALT_LED#
    AMBER
    3 4 1
    R728
    2 +3VS HDD LED CH751H-40PT_SOD323-2

    200_0402_5%
    Amber
    D53 #PV change to doide
    White

    D17 R980
    ON/OFFBTN_LED# 1 2 1 2 +5VALW_LED System
    HT-F196BP5_WHITE 200_0402_5%
    Power LED +5VS_LED TouchPAD ON/OFF LED

    Capacitor Sensor Conn

    1
    R609 R610 #PV TP LED separate between PA and PR
    +3VL_CAP 200_0402_5% 200_0402_5%
    @ R2116 @ C2123
    ESB_CLK 2 1 2 1 #SI2 for EMI

    2
    33_0402_5% 15P_0402_50V8J 1 AMBER White AMBER White

    2
    2 4.7U_0603_6.3V6K 2
    @ R2117 @ C2124 +5VS D54 D58

    Amber

    White

    Amber

    White
    ESB_DAT 2 1 2 1 C261 QSMF-C16E_AMBER-WHITE QSMF-C16E_AMBER-WHITE
    2

    1
    33_0402_5% 15P_0402_50V8J PR@
    +5VS_LED R613 PA@
    PA PR

    1
    JP59 10K_0402_5%
    1 @
    1
    2

    2
    2
    38 SMB_EC_CK1_R 3 3 #SI2 add by pass cap
    38 ESB_CLK 4 4
    38 ESB_DAT 5 5

    1
    D TP_LED#
    38 I2C_INT 6 6 TP_LED# 38
    7 +3VL 2
    7 G
    38 NUM_LED# 8 8
    9 Q153 S +5V
    38 SMB_EC_DA1_R

    3
    9 2N7002_SOT23-3
    10 10 1
    11 GND

    1
    12 + C60
    1 GND 22U_A_4VM R611
    C2134 ACES_85201-1005N
    CONN@ 2
    TP ON/OFF @ 10K_0402_5%
    15P_0402_50V8J
    2 SW1
    @

    2
    TJG-533-V-T/R_6P
    T/P Board 3 1 TP_BTN# TP_BTN# 38

    4 2

    +5V T/P Power

    5
    6
    #PV reserve LDO for capacitor sensor board
    3
    ON/OFF Button Connector +3VL 1

    @ PJP703
    2 +3VL_CAP
    +5VALW +5V
    3

    1
    PAD-OPEN 2x2m C729
    R615 0_0805_5%
    +5VL 0.1U_0402_16V4Z 1 2
    R2121 +3VL_CAP 2
    U43 JP23
    Q23
    1 2 3 SHDN# BP 4 1 1
    +5VALW_LED 2 SI2301BDS-T1-E3_SOT23-3
    2 TP_CLK 38

    www.kythuatvitinh.com
    10K_0603_1% 2 5 3 TP_DATA 38
    GND G1 3

    S
    JP10

    D
    6 G2 4 4 3 1
    1 1 1 1 VIN VOUT 5
    ON/OFFBTN 2 C2132 ACES_85201-04051
    38 ON/OFFBTN 2

    1
    ON/OFFBTN_LED# 1U_0603_10V4Z APL5151-33BC-TRL SOT23 5P 3.3V @

    G
    37,38 ON/OFFBTN_LED# 3 5 CONN@ 1 1

    2
    3 G1
    2

    4 6 @ @ R612
    4 G2 2 C2133 C730 C731 10K_0402_5%
    ACES_85201-04051 100P_0402_50V8J 100P_0402_50V8J @
    1

    CONN@ 2 2

    2
    0.33U_0603_10V7K
    TP_DATA
    TP_CLK

    1
    D

    2
    SYSON 2 Q24
    31,38,41,50 SYSON
    D28 G 2N7002_SOT23-3
    +3VALW PSOT24C_SOT23-3 S

    3
    @
    1
    C219

    1
    0.1U_0402_16V4Z #PV for EMI stuff
    2
    4 JP11 4
    1 1
    38 LID_SW# 2 2
    1 3 3 G1 5
    C240 4 6
    4 G2
    ACES_85201-04051
    2 CONN@
    10P_0402_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    LED, TP,KBL,Cab sensor boar


    Lid Switch Connector THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    Document Number
    LA-4102P Blade discrete
    Rev
    0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 39 of 53
    A B C D E
    Atlas/ Saturn Dock
    +DOCKVIN JDOCK1
    DOCK_PWR_ON Spec
    #SI2 change ping 31,39,22 connect to GND
    0V = Notebook S4/S5, Dock off 43 43 C748
    @
    44 44
    2.5V = Notebook S3, Dock on 2 1 1000P_0402_50V7K

    4V = Notebook S0, Dock on 18 GREEN_L


    GREEN 40 40 39 39 C747
    D57 RED 38 37 #PV reserve resistor 2 1 @
    18 RED_L 38 37
    +5VS R751 1 2 1K_0402_5% 2 D_DDCDATA 36 35
    18 D_DDCDATA 36 35
    1 DOCK_PWRON BLUE 34 33 1000P_0402_50V7K
    18 BLUE_L 34 33
    +3VALW R752 1 2 1K_0402_5% 3 D_HSYNC 32 31 #SI connect to EC
    18 D_HSYNC 32 31
    D_DDCCLK 30 29 CIR_IN
    18 D_DDCCLK 30 29 CIR_IN 35,38
    DAN202U_SC70 USB20_N3 28 27 DOCK_PWRON R619
    27 USB20_N3 28 27
    D_VSYNC 26 25 MUTE_LED_R 1 2 33_0402_5% MUTE_LED MUTE_LED 38
    18 D_VSYNC 26 25

    1
    24 23 DOCK_SLP_BTN_R# 1 2 33_0402_5% DOCK_SLP_BTN#
    24 23 DOCK_SLP_BTN# 38
    1
    D USB20_P3 JACK_DET# R622
    27 USB20_P3 22 22 21 21 JACK_DET# 33,35
    2 R753 RJ45_MIDI3+ 20 19 R_VOL_UP# R617 1 2 200_0402_5% DOCK_VOL_UP# 38
    41,48 SYSON# 30 RJ45_MIDI3+ 20 19
    G 10K_0402_5% RJ45_MIDI3- 18 17 R_VOL_DWN# R618 1 2 200_0402_5% DOCK_VOL_DWN# 38
    30 RJ45_MIDI3- 18 17
    Q13 S RJ45_MIDI2+ 16 15 SPDIFO_L
    30 RJ45_MIDI2+
    3

    2
    2N7002_SOT23-3 RJ45_MIDI2- 16 15 AUDIO_OGND
    30 RJ45_MIDI2- 14 14 13 13 GNDA
    RJ45_MIDI1+ 12 11 DOCK_LOUT_R DOCK_LOUT_R 35
    30 RJ45_MIDI1+ 12 11
    RJ45_MIDI1- 10 9 DOCK_LOUT_L DOCK_LOUT_L 35
    30 RJ45_MIDI1- 10 9
    RJ45_MIDI0+ 8 7 DOCK_MIC_R_C
    30 RJ45_MIDI0+ 8 7
    RJ45_MIDI0- 6 5 DOCK_MIC_L_C
    30 RJ45_MIDI0- 6 5
    4 3 AUDIO_IGND GNDA #SI connect to GNDA
    +V_BATTERY 4 3 DOCK_PRESENT
    2 2 1 1
    PJP3

    1
    B+ 1 2 41 45 R620
    41 45 2K_0402_5% +3VS_HDA
    42 42 46 46
    +3VL
    PAD-OPEN 2x2m

    2
    CONN@
    2

    FOX_QL1122L-H212AR-7F R1140
    R621 @ 33_0402_5%
    10K_0402_5%
    need change to reverse type connector #SI2 add a cap

    1
    1

    38 CONA#
    1

    1
    R754 D @ C C894 R1141
    DOCK_PRESENT 1 2 2 Q114 2 1 2 1 2 SPDIF_OUT1 33
    G Q27 MMBT3904_NL_SOT23-3 B 220_0402_5%
    22_0402_5% S 2N7002_SOT23-3 11/17 update E
    3

    3
    1

    0.1U_0402_16V7K

    1
    R623 1
    2K_0402_5% DOCK_LOUT_R SPDIFO_L 1 2 C1489
    DOCK_LOUT_L R1142 R1143
    0_0603_5% 220P_0402_25V8J 110_0402_5%

    0.01U_0402_16V7K

    0.01U_0402_16V7K
    1 1
    2

    2
    C740

    C741
    2 2

    #SI2 change to 22 ohm


    GNDA GNDA

    #SI2 Add pull up R_VOL_UP# R_VOL_DWN#


    MIC_Dock
    1 1
    +3VS C744 C745
    1000P_0402_50V7K 1000P_0402_50V7K Need 600 Ohm 500 mA
    2 2

    DOCK_VOL_UP# R594 2 1 10K_0402_5% L36


    FBM-11-160808-601-T_0603
    DOCK_VOL_DWN# R596 2 1 10K_0402_5% 33 DOCK_MIC_R 1 2 DOCK_MIC_R_C

    33 DOCK_MIC_L 1 2 DOCK_MIC_L_C
    L37
    +DOCKVIN FBM-11-160808-601-T_0603 1 1
    C755
    C754
    220P_0402_50V7K 2 2 220P_0402_50V7K
    +3VS

    www.kythuatvitinh.com
    1
    GNDAGNDA
    C734
    1000P_0402_50V7K
    2 10K_0402_5%
    SENSE_B# 33

    2
    R625

    1
    R626 D

    1
    10K_0402_5% 2 Q29
    G 2N7002_SOT23-3

    1
    C S

    3
    2
    MMBT3904_NL_SOT23-3 B

    1
    R632 C E Q30

    3
    DOCK_MIC_L_C 1 2 2 Q32
    10K_0402_5% B MMBT3904_NL_SOT23-3

    2
    2 E

    3
    C757
    R633
    47K_0402_5% 1

    1
    1U_0603_10V6K

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DOCK CONN.
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 40 of 53
    5 4 3 2 1

    +5VALW to +5VS Transfer +3VALW to +3VS Transfer DIM LED


    +5VALW +5VALW_LED
    +5VALW +5VS B+ +3VALW +3VS Q33
    SI2301BDS-T1-E3_SOT23-3
    B+ U32 U33

    S
    10U_0805_10V4Z 10U_0805_10V4Z

    D
    8 D S 1 8 D S 1 3 1

    1
    1 7 D S 2 1 7 D S 2
    C760 6 D R649 C759
    S 3 6 D S 3 1
    1

    1
    C758

    G
    5 D 4 1 1 5 D 4 1 1

    2
    D R636 10U_0805_10V4Z G C761 C762 330K_0402_5% 10U_0805_10V4Z G C763 C764 R637 0.1U_0402_16V4Z D
    2 AO4466_SO8 2 AO4466_SO8 10K_0402_5%

    2
    330K_0402_5% 2
    2 2 2 2
    2

    2
    RUNON_3VS
    DIM_LED#

    1
    RUNON 0.1U_0402_16V4Z

    3
    R648
    1 0.1U_0402_16V4Z 470_0402_5%
    R638
    6

    1
    @ SUSP D
    470_0402_5% 5

    2
    DIM_LED 2 Q35
    38 DIM_LED
    1 G 2N7002_SOT23-3
    2

    4
    SUSP 2 Q34B C769 S

    3
    1
    C765 0.01U_0402_25V7K
    1

    Q34A 2N7002DW-7-F_SOT363-6 2
    @ 0.01U_0402_25V7K
    2N7002DW-7-F_SOT363-6 2

    +1.8V to +1.8VS Transfer +5VS +5VS_LED


    Q11
    +1.8V +1.8VS SI2301BDS-T1-E3_SOT23-3
    +3VL +3VL
    B+

    S
    U34

    D
    3 1
    8 1 10U_0805_10V4Z
    D S

    1
    1 7 D S 2 1
    C C766 R639 R640 C792 C

    G
    6 3

    2
    D S
    1

    5 4 1 1 0.1U_0402_16V4Z
    R651 10U_0805_10V4Z D G C767 C768 100K_0402_5% 100K_0402_5%
    2 AO4466_SO8 2

    2
    330K_0402_5% SYSON# SUSP
    2 2 40,48 SYSON# SUSP 48
    2

    DIM_LED#

    3
    RUNON_1.8VS
    1

    0.1U_0402_16V4Z SYSON 2 5 SUSP#


    31,38,39,50 SYSON SUSP# 31,33,38,44,46,47,48
    R650
    3

    1K_0402_5% Q36A Q36B

    4
    2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
    2

    SUSP 5
    1
    C770
    4

    Q44B
    0.1U_0402_25V4K
    2
    2N7002DW-7-F_SOT363-6

    Discharge circuit H1
    HOLEA
    H2
    HOLEA
    H3
    HOLEA
    H4
    HOLEA
    H5
    HOLEA
    H6
    HOLEA
    H7
    HOLEA
    H8
    HOLEA
    H9
    HOLEA
    H10
    HOLEA

    +5VS +3VS +1.8V +1.5VS +VCCP +0.9V +1.8VS

    1
    B B
    1

    1
    R641 R642 R643 R644 R645 R646 R647 H12 H11 H14 H15 H16 H17 H18 H19 H20
    HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEC HOLEC
    470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%
    2

    1
    6

    6
    www.kythuatvitinh.com
    2N7002DW-7-F_SOT363-6
    1

    D Q41 D Q42
    SUSP 2 SUSP 5 SYSON# 2 SUSP 2 SUSP 2 SUSP 5 Q40B SUSP 2 Q44A
    Q40A G G
    Q38A Q38B S S
    1

    1
    2N7002_SOT23-3 2N7002_SOT23-3
    FM1 FM2 FM3 FM4
    2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 1 1 1 1

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DC/DC Interface
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 41 of 53
    5 4 3 2 1
    5 4 3 2 1

    +3VS +5VS_HDMI

    @
    @ @ @

    2
    R1039 R1033 +3VS R1034
    D 2.2K_0402_5% R1040 D
    2.2K_0402_5%
    6.8K_0402_5% 6.8K_0402_5%

    2
    2

    1
    1 6 HDMIDAT
    21 HDMIDAT_VGA Q101A
    2N7002DW-7-F_SOT363-6
    1 2
    0_0402_5% R1023
    @
    +3VS

    5
    4 3 HDMICLK
    21 HDMICLK_VGA Q101B
    2N7002DW-7-F_SOT363-6
    1 2
    0_0402_5% R1024
    @

    C C

    #PV reserve C1250,C1249 for EMI


    WCM-2012-900T_0805 +5VS +5VS_HDMI
    HDMI_CLK- 4 3 HDMI_R_CLK- D41
    21 HDMI_CLK- 4 3
    RB411D T146 _SOT23-3

    2
    HDMI_CLK+ 1 2 HDMI_R_CLK+
    21 HDMI_CLK+ 1 2
    L70

    22N_0402_16V7K
    @ 1

    1
    C1250
    HDMI Connector 9/21 change R1036 and
    R1035 from 10K to 2.2K
    2

    @
    for nvidia
    WCM-2012-900T_0805 +5VS_HDMI
    HDMI_TX0- 4 HDMI_R_TX0-

    0.1U_0402_16V4Z
    21 HDMI_TX0- 4 3 3

    22N_0402_16V7K
    1 1
    B R1036 R1035 B

    2.2K_0402_5%

    2.2K_0402_5%
    HDMI_TX0+ 1 2 HDMI_R_TX0+
    21 HDMI_TX0+ 1 2

    2
    C1249 C1247
    L71 @ 2 2

    @ @

    1
    JHDMI1

    www.kythuatvitinh.com
    18 +5V
    HDMIDAT 16 13
    R1037 L74 HDMICLK SDA CEC
    15 SCL Reserved 14
    WCM-2012-900T_0805 HDMI_DETECT 1 2 1 2 19
    HDMI_TX1- HDMI_R_TX1- 21 HDMI_DETECT 1K_0402_1% HP_DET
    21 HDMI_TX1- 4 4 3 3 GND 2
    1

    FBML10160808121LMT_0603 1 HDMI_R_CLK- 12 5
    HDMI_R_CLK+ CK- GND
    10 CK+ GND 8
    HDMI_TX1+ 1 2 HDMI_R_TX1+ D40 R1038 HDMI_R_TX0- 9 11
    21 HDMI_TX1+ 1 2 D0- GND
    SKS10-04AT_TSMA 10K_0402_1% C1248 HDMI_R_TX0+ 7 20
    L72 @ 330P_0402_50V7K 2 HDMI_R_TX1- D0+ GND
    6 21
    2

    HDMI_R_TX1+ D1- GND


    4 D1+ GND 22
    HDMI_R_TX2- 3 23
    HDMI_R_TX2+ D2- GND
    1 D2+ DDC/CEC_GND 17

    SUYIN_100042MR019S153ZL
    CONN@

    WCM-2012-900T_0805
    HDMI_TX2- HDMI_R_TX2-
    #SI Change lib
    21 HDMI_TX2- 4 4 3 3

    HDMI_TX2+ 1 2 HDMI_R_TX2+
    A 21 HDMI_TX2+ 1 2 A
    L73 @

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HDMI LS & Conn.
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 42 of 53
    5 4 3 2 1
    A B C D

    +3VALW
    PQ3

    3
    TP0610K-T1-E3_SOT23-3

    connect to KBC pin97


    BATT
    1
    2 AC_LED# 47 1

    499K_0402_1% 340K_0402_1%
    PR1 1
    +5VALW
    ADP_ID 41

    0.01U_0402_25V7K
    2 1

    PC12

    2
    1

    1
    PC1
    PR8 PD4 @1000P_0402_50V7K

    PR4 1
    100_0402_5% PR2
    10K_0402_5%
    VIN +DOCKVIN

    2
    1

    2
    ACES_88334-057N RLZ3.6B_LL34
    ADP_SIGNAL 1 2

    8
    5 PR3 PR5
    5 10K_0402_5% 10K_0402_5%
    4 3

    P
    4 PL1 PL2 +
    3 3 0 1 2 1 BATT_OVP <40>
    2 SMB3025500YA_2P SMB3025500YA_2P 2
    2 -

    G
    105K_0402_1%
    1 ADPIN 1 2 2 1
    1

    PR6 1
    0.01U_0402_25V7K

    4
    1
    PJP1 PU1A

    PC6
    LM358ADT_SO8
    100P_0402_50V8J

    1000P_0402_50V7K

    2
    2

    PD1

    100P_0402_50V8J

    2
    1

    1
    PC5
    PC4
    PC3
    2

    2
    PC2

    1000P_0402_50V7K
    @PJSOT24C_SOT23-3
    1

    2 2

    VMB
    PL3 BATT
    PJP2 HCB2012KF-121T50_0805
    8 8 1 2
    PL4
    7 7
    6 EC_SMD PD2 HCB2012KF-121T50_0805
    PH1 under CPU botten side :
    6 EC_SMC @SM05_SOT23
    5 5
    4 3
    1 2 CPU thermal protection at 90 +-3 degree C
    4
    1

    3 3
    2 2
    1 Recovery at 47 +-3 degree C
    2 PC9
    1 PC8
    2

    1 1000P_0402_50V7K 0.01U_0402_50V4Z PR7


    GND 9
    10 +5VS 47K_0402_1%
    GND
    3

    1 2
    3 SUYIN_200275MR008GXOLZR CPU 3
    1
    1

    1
    PD3
    1

    PR14 @SM24.TC_SOT23-3 PH1


    PR13 100_0402_5% 10K_TH11-3H103FT_0603_1%
    100_0402_5%
    2

    EN0_TRIP <47>
    2

    2
    SMB_EC_DA1 SMB_EC_DA1 <39,40> PR10

    8
    15K_0402_1%

    www.kythuatvitinh.com

    1
    D
    1 2 5

    P
    SMB_EC_CK1 + PQ1
    SMB_EC_CK1 <39,40> 0 7 2
    +5VALW 1 2 6 G SSM3K7002FU_SC70-3
    -

    G
    BAT_ID <46> PR11 PU1B S

    3
    1 150K_0402_1%

    4
    1

    1
    LM358ADT_SO8

    1
    PC10 PR12
    PR16 2.55K_0402_1%
    6.49K_0402_1% +3VL 0.22U_0603_10V7K PR15
    2

    1 2 150K_0402_1% PC11
    2

    2
    1000P_0402_50V7K ENTRIP2 <47>

    2
    1

    1
    PR17 D
    1K_0402_5% 2 PQ2
    G @SSM3K7002FU_SC70-3
    BATT_TEMP
    2

    3
    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DC Connector/CPU_OTP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 43 of 52
    A B C D
    A B C D

    P4 B+

    BATT
    VIN P2
    PQ102
    FDS6675BZ_SO8

    PQ101 PQ103 1 8

    @1000P_0402_50V7K
    1
    PR102 PL101 2 7 1
    AM4835EP-T1-PF_SO8 AM4835EP-T1-PF_SO8 0.012_2512_1% HCB2012KF-121T50_0805 3 6

    1
    8 1 1 8 1 2 1 2 CHG_B+ 5

    PC132
    7 2 2 7 PR103

    1
    6 3 3 6 47K_0402_5%

    2
    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K
    5 5 PC133 1 2 1 2
    PR101 470P_0402_50V7K VIN

    1
    47P_0402_50V8J

    47K_0402_5% PR104 ACDET PC102

    1
    0.1U_0603_25V7K

    PC103

    PC104

    PC105
    1 2 0_0402_5% 1U_0603_6.3V6M
    <40> AC_SET 1 2 ACSET

    2
    1

    3
    PR105
    PC101

    1
    0.22U_0603_16V7K
    10K_0402_5%

    PC108
    1

    270P_0402_50V7K
    2

    2
    1
    PC109

    200K_0402_5%
    2 PC107 PR140 ACOFF#

    2
    1

    100K_0402_5% @0.1U_0603_25V7K

    PC106

    PR106
    @0.01U_0402_16V7K

    1
    1000P_0402_50V7K

    470P_0402_50V7K
    2

    2
    PR107 CHGEN# CHG_B+

    PC129

    PC130
    47K_0402_1% PQ104 PR108
    1 2 2 DTA144EUA_SC70-3 10_1206_5%
    1

    1
    1 2 2 ACOFF <40>

    LPREF

    ACSET

    ACDET

    LPMD

    ACN

    CHGEN
    ACP

    1
    PC134
    PQ105 <32,34,40,43,48,49,50> SUSP# 29
    TP

    5
    6
    7
    8
    DTC115EUA_SC70-3 PR110 PC110
    3

    PQ107 PC128 0_0402_5% 1U_0805_25V6K

    3
    1

    SSM3K7002FU_SC70-3 D PR109 PQ106


    1 2 1 2 8 IADSLP PVCC 28 1 2
    2 150K_0402_5% PC111 DTC115EUA_SC70-3
    G @180P_0402_50V8J 0.1U_0402_10V7K PQ108

    2
    S 9 27 BST_CHG 1 2 4 AO4466_SO8
    3

    AGND BTST
    PC112 BQ24740VREF PU101
    PACIN_1 1 2 10 BQ24740RHDR_QFN28_5X5 26 DH_CHG BATT
    VREF HIDRV PL102 PR112

    3
    2
    1
    PR111 PQ109 1U_0603_6.3V6M +3VL 10U_LF919AS-100M-P3_4.5A_20% 0.015_1206_1%
    1

    3K_0402_1% D LX_CHG
    11 VDAC PH 25 1 2 1 2
    PACIN 1 2 2 SSM3K7002FU_SC70-3

    1
    G PD102

    5
    6
    7
    8
    S PR113 VADJ 12 24 REGN 2 1 PR141
    3

    PD101 143K_0402_1% VADJ REGN 4.7_1206_5%

    @1000P_0402_50V7K
    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K
    2 ACOFF# 1 2 PR114 RLS4148_LL34-2 2

    @0_0402_5% 13 23 DL_CHG
    2

    2 2
    EXTPWR LODRV

    1
    1SS355_SOD323-2 VCTRL 1 2

    PC113

    PC114

    PC115

    PC116

    PC131
    4
    1

    14 22 PC135

    2
    ISYNSET PGND
    1

    PQ110 470P_0603_50V8J

    DPMDET

    1
    1
    PC117 PR115

    IADAPT
    1 2

    SRSET

    CELLS

    1
    1U_0603_10V6K 100K_0402_1% PC119 FDS6900AS_SO8

    SRN

    SRP
    2

    3
    2
    1
    BAT
    PR116
    2

    39K_0402_5% 1U_0603_10V6K PC118

    2
    0.1U_0402_10V7K

    15

    16

    17

    18

    19

    20

    21
    PR117
    100K_0402_5% BQ24740VREF

    IADAPT
    PR118
    Charge Detector 1 2

    1
    10K_0402_5%
    1 2 47K_0402_5%
    <40> ADP_I

    1
    D PR119

    100P_0402_50V8J
    0.22U_0603_10V7K
    1

    1
    PQ111 2 BAT_ID <45>

    2
    PC120

    PC121
    SSM3K7002FU_SC70-3 G
    S

    BATT
    2

    0.1U_0603_25V7K

    @0.1U_0603_25V7K
    VIN
    PR120
    2 1 IREF <40>

    PC122
    PC124
    133K_0402_1%
    2

    1
    PC123
    1

    PD104 0.1U_0402_10V7K PR122

    2
    1SS355_SOD323-2 PR121 681K_0402_1%
    200K_0402_1% 1 2
    2

    PR123
    1

    1M_0402_5%
    3
    1 2 3
    VIN_1

    PR124
    +3VL VIN 1K_0402_5%
    VIN
    1 2
    1

    +3VL ACIN <40,47>

    1
    PR125
    47_1206_5% PR126
    1
    10K_0402_5%

    100K_0402_1% PR127
    VIN PR130

    www.kythuatvitinh.com
    10K_0402_1%
    2

    8
    +3VL
    10K_0402_1%

    PR128

    2.15K_0402_1% PU102B

    2
    1 2 5

    P
    +
    1

    PR129

    7 PACIN
    2

    O
    1

    1
    100K_0402_5%

    PR131 6 -

    G
    133K_0402_1% PC125 CHGEN#
    2

    1
    PR132

    0.1U_0603_25V7K PC126 LM393DG_SO8


    PR133
    2

    1
    0.047U_0402_16V7K 10K_0603_0.1%
    2

    PR134
    2

    2
    1

    D PD103
    3 10K_0402_5%
    P

    2
    + PQ112 RLZ4.3B_LL34
    O 1 2
    1

    2 G SSM3K7002FU_SC70-3

    2
    -
    G

    PU102A S
    PR135
    3

    LM393DG_SO8 FSTCHG#
    4

    10K_0603_0.1% PR136
    60.4K_0402_1%
    2

    D
    1 2 VIN_1
    1.24VREF <40> FSTCHG 2 PQ113
    G SSM3K7002FU_SC70-3
    S
    3

    STD_ADP <40>
    PU104

    4 REF CATHODE 3 1.24VREF


    1 2 ACDET

    1
    PC127 2
    PR137 NC
    22P_0402_50V8J
    1

    100K_0402_1%

    4
    20K_0402_1% 5 1
    4

    2
    ANODE NC
    PR138

    LMV431ACM5X_SOT23-5
    2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Charger
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 44 of 52
    A B C D
    A B C D E

    2VREF_51125

    0.22U_0603_10V7K

    1
    1 1

    PC302

    2
    PR301 PR302
    13.7K_0402_1% 30.9K_0402_1%
    1 2 1 2

    PR303 PR304
    B+ B++
    20K_0402_1% 20K_0402_1%
    B++
    PL301 1 2 1 2
    HCB2012KF-121T50_0805

    1 2 +3VLP

    ENTRIP2

    ENTRIP1
    2200P_0402_50V7K

    PR305 PR306
    @0.1U_0402_25V4K

    4.7U_0805_25V6-K

    @0.1U_0402_25V4K
    140K_0402_1% 133K_0402_1%
    1

    1
    PC316

    PC301

    PC303

    PC317
    10U_1206_25V6M
    2200P_0402_50V7K
    10U_0805_6.3V6M
    1 2 1 2

    1
    PC304

    PC305
    2

    2
    2

    2
    6

    5
    6
    7
    8
    PC306
    PU301

    ENTRIP2

    VFB2

    TONSEL

    VREF

    VFB1

    ENTRIP1
    25 PQ302
    PQ301 P PAD
    2 AO4466_SO8 2

    2
    1 D1 1G 8
    2 D1 1S/2D 7 7 VO2 VO1 24 4
    3 G2 1S/2D 6
    4 5 8 23 PR308 PC308
    S2 1S/2D PR307 VREG3 PGOOD 2.2_0402_5% 0.1U_0402_10V7K
    1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2

    3
    2
    1
    SP8K10S-FD5_SO8 0_0402_5% VBST2 VBST1
    PL302 PC307 UG_3V 10 21 UG_5V PL303
    3.3UH_SIQB74B-4R7PF_5.9A_20% 0.1U_0402_10V7K DRVH2 DRVH1 4.7UH_PCMC063T-4R7MN_5.5A_20%
    2 1 LX_3V 11 20 LX_5V 1 2
    +3VALWP LL2 LL1

    5
    6
    7
    8
    LG_3V 12 19 LG_5V +5VALWP
    DRVL2 DRVL1

    SKIPSEL
    @4.7_1206_5%

    4.7_1206_5%

    150U_D_6.3VM
    1

    VREG5
    1

    1
    VCLK
    1

    GND
    EN0

    VIN
    +
    PC309

    TPS51125RGER_QFN24_4X4
    220U_6.3VM_R15

    1
    +
    PR315

    PR316

    PC310
    4
    PC313

    13

    14

    15

    16

    17

    18
    2 @22U_0805_6.3V6M
    2

    2
    2

    1
    <40> EN0_TRIP
    @680P_0603_50V7K

    680P_0603_50V7K

    3
    2
    1
    @620K_0402_5%
    VL PQ304
    1

    1
    PC314

    PC315
    FDS6690AS_NL_SO8

    PR311
    2

    2
    1

    PC311
    PR318

    10U_0805_10V6K
    1 2
    0_0805_5%

    2
    3 3
    R_EC_RSMRST#
    <45> ENTRIP2

    1
    ENTRIP1

    B++

    0.1U_0603_25V7K
    2
    PC312
    2VREF_51125
    1

    D D

    www.kythuatvitinh.com
    PQ305 2 2 PQ306
    SSM3K7002FU_SC70-3 G G SSM3K7002FU_SC70-3
    S S
    +5VL
    3

    VL
    PJP304
    2 1
    PJP302 PAD-OPEN 2x2m
    1 2 VL +5VALWP 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
    PR313 +3VLP +3VL
    PAD-OPEN 4x4m
    PQ308 100K_0402_5% PJP301
    1

    SSM3K7002FU_SC70-3 D D PQ307 PJP303 2 1


    38 PACIN_1 1 2 2 2
    +3VALWP
    1 2 +3VALW (3A,120mils ,Via NO.= 6)
    G G PAD-OPEN 2x2m
    PR317 SSM3K7002FU_SC70-3
    0.022U_0402_16V7K

    S S PAD-OPEN 4x4m
    3

    604K_0402_1%
    EC_ON <40>
    1

    1
    PC318

    4 4
    100K_0402_5%
    2

    PR314
    2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    3.3VALWP/5VALWP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 45 of 52
    A B C D E
    A B C D

    1 1

    PR401
    0_0402_5%
    1 2 PL401
    SUSP#
    HCB1608KF-121T30_0603
    1

    PR410 1.05V_B+ 1 2 B+
    1

    2200P_0402_50V7K
    @10K_0402_5% PC401

    @0.1U_0402_25V4K

    4.7U_0805_25V6-K

    @4.7U_0805_25V6-K
    @1000P_0402_50V7K
    2

    5
    6
    7
    8

    1
    +5VALW
    2

    PC414

    PC403

    PC404

    PC405
    PC406
    BST_1.05V
    1 2 BST1_1.05V1 2 @680P_0402_50V7K

    2
    PR402 PC402
    1

    0_0402_5% 0.1U_0402_10V7K 4
    PR403

    15

    14
    1
    316_0402_1% PU401
    PR404

    EN_PSV

    TP

    VBST
    2 255K_0402_1% PQ401 2
    PR411
    2

    3
    2
    1
    1 2 2 13 DH_1.05V 1 2 AO4466_SO8 PL402
    TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
    PR405 0_0402_5%
    +1.05V_VCCP 2 1 3 12 LX_1.05V 1 2 +1.05V_VCCP
    VOUT LL

    220U_6.3VM_R15
    0_0402_5%

    1
    4 V5FILT TRIP 11 1 2

    5
    6
    7
    8
    PR406 PR407
    1
    5 10 +5VALW 11K_0402_1% 4.7_1206_5%
    VFB V5DRV +

    PC408
    1

    PC409 6 9 PC415

    2 2
    PGOOD DRVL

    1
    PGND
    1U_0603_10V6K 4.7U_0805_10V6K

    GND
    4 2
    2

    PC412

    2
    +1.05V_VCCP TPS51117RGYR_QFN14_3.5x3.5 220P_0603_50V8J
    PR408
    7

    1
    1 2
    10.5K_0402_1% DL_1.05V PQ402

    3
    2
    1
    AO4468_SO8
    1 2
    PC413
    @10P_0402_50V8J
    1

    PR409
    25.5K_0402_1%
    2

    3 3

    www.kythuatvitinh.com
    PJP401
    +1.05V_VCCP 1 2 +VCCP (6A,240mils ,Via NO.=12)
    PAD-OPEN 4x4m

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    1.05V_VCCP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 46 of 52
    A B C D
    5 4 3 2 1

    PR523
    @200K_0402_1%
    1 2
    GPU_VID1<32,40,41,43,52>
    D D

    1
    2

    1
    PR524

    G
    PQ505 PR522 PC523
    @SSM3K7002FU_SC70-3 @105K_0402_1% @0.01U_0402_16V7K 10K_0402_5%
    3 1 1 2

    2
    S

    2
    PR521
    10K_0402_1%
    1 2
    GPU_VID0<32,40,41,43,52>

    1
    2

    1
    PR525

    G
    PQ504 PR520 PC522
    SSM3K7002FU_SC70-3 61.9K_0402_1% 0.022U_0402_16V7K 10K_0402_5%
    GPU_VID1 GPU_VID0 +NVVDD
    3 1 1 2

    2
    S

    D
    0 0 0.9V

    2
    B+++ PR501 PR502
    73.2K_0402_1% 75K_0402_1% PR503 PR504
    75K_0402_1% 15.4K_0402_1%
    +1.5VSP 1 2 1 2 1 2 1 2 +NVVDDP1
    0 1 1.09V
    2200P_0402_50V7K

    @0.1U_0402_25V4K

    PC516 1 0 unused

    1
    4.7U_0805_25V6-K

    @0.1U_0402_10V7K PR519
    PR518

    2
    PR505 1 2 10_0402_5%
    1

    @0_0402_5% 0_0402_5%
    B+++ B+
    PC501

    PC502

    PC520

    2
    PL502
    2

    HCB2012KF-121T50_0805

    +NVVDDP
    1

    +NVVDD_SENSE
    +NVVDDP 2 1

    C C

    @0.1U_0402_25V4K
    2200P_0402_50V7K
    4.7U_0805_25V6-K

    4.7U_0805_25V6-K
    +NVVDD_SENSE

    5
    6
    7
    8

    PC521
    PQ502 PU501

    PC504

    PC505
    PC511
    1 8

    VO2

    VFB2

    TONSEL

    GND

    VFB1

    VO1
    D1 1G PQ501
    2 7 25

    2
    D1 1S/2D P PAD AO4466_SO8
    3 G2 1S/2D 6
    4 S2 1S/2D 5
    7 PGOOD2 PGOOD1 24 4
    SP8K10S-FD5_SO8 PC507
    PC506 PR506 8 23 PR507
    EN2 EN1 0.1U_0402_10V7K
    0.1U_0402_10V7K 0_0402_5% 0_0402_5%
    +1.5VSP 2 1 2 1 BST_1.5V 9 22 BST_VGA 2 1 1 2

    3
    2
    1
    VBST2 VBST1
    +NVVDDP
    PL503 UG1_1.5V 2 1 UG_1.5V 10 21 UG_VGA 2 1 UG1_VGA PL501
    3.3UH_PCMC063T-3R3MN_6A_20% 0_0402_5% PR508 DR VH2 DR VH1 PR509 1UH_PCMC063T-1R0MN_11A_20%
    2 1 LX_1.5V 11 20 LX_VGA 0_0402_5% 1 2
    LL2 LL1
    LG_1.5V 12 19 LG_VGA
    DR VL2 DR VL1

    22U_0805_6.3V6M
    1

    5
    6
    7
    8
    1

    PGND2

    PGND1
    V5FILT

    1
    PR515

    TRIP2

    TRIP1

    PC510

    22U_0805_6.3V6M

    22U_0805_6.3V6M

    22U_0805_6.3V6M
    1

    V5IN
    1

    PR516

    330U_X_2VM_R6M
    +
    PC517

    @4.7_1206_5%
    220U_B2_2.5VM

    2
    +

    PC508

    PC524

    PC525

    PC526
    PC509 @4.7_1206_5%
    4.7U_0805_6.3V6K TPS51124RGER_QFN24_4x4
    2

    1 2

    13

    14

    15

    16

    17

    18
    2 4

    1 2

    1
    2

    2
    B PC518 PQ503 B
    2

    @680P_0603_50V7K PR510 PR511 PC519 FDS6670AS_NL_SO8

    3
    2
    1
    16.5K_0402_1% 9.76K_0402_1% @680P_0603_50V7K
    1 2

    www.kythuatvitinh.com
    1

    PR513
    0_0402_5% PR512
    2 1 47K_0402_5%
    <32,34,40,43,46,48,50> SUSP# 1 2
    1 2
    SUSP# <32,40,41,43,52>
    +5VALW
    PR514
    3.3_0402_5%

    1
    PR517
    1

    1
    PC514 PC515 PC512 @100K_0402_5%
    1U_0603_10V6K 4.7U_0805_10V6K 0.1U_0402_16V7K
    PC513
    2

    2
    @0.1U_0402_16V7K

    2
    PJP501

    +1.5VSP 1 2 +1.5VS (4A,160mils ,Via NO.=8)


    PAD-OPEN 4x4m

    PJP502
    +NVVDDP 1 2 +NVVDD (12A,480mils ,Via NO.= 24)
    A PAD-OPEN 4x4m A

    PJP503
    1 2

    PAD-OPEN 4x4m

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    1.5VSP/VGA_CORE
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 47 of 52
    5 4 3 2 1
    5 4 3 2 1

    D D

    +1.8V

    PU601
    1 6
    VIN VCNTL +5VALW

    @10U_0805_10V4Z
    2 GND NC 5

    PC602

    1
    PC601 3 7
    VREF NC

    1
    10U_0805_10V4Z

    2
    PR601 PC603
    4 VOUT NC 8
    1K_0402_1% 1U_0603_16V6K

    2
    9

    2
    TP
    G2992F1U_SO8

    <42,43> SYSON# 1 2

    0.1U_0402_16V7K
    PR602 +0.9VP

    1
    @0_0402_5%
    PQ601
    SSM3K7002FU_SC70-3 PR603

    1
    D
    1K_0402_1%
    1 2 2 PC605
    <43> SUSP

    PC604
    PR604 G 10U_0805_6.3V6M

    2
    0_0402_5% S

    3
    1
    C PC606 C

    2
    @0.1U_0402_16V7K

    +5VALWP

    1
    PC609 +1.5VS
    1U_0603_6.3V6M

    2
    PJP601

    +0.9VP 1 2 +0.9V (2A,80mils ,Via NO.= 4)

    6
    PU603

    1
    5

    VCNTL
    PAD-OPEN 3x3m VIN
    7 PC610
    POK 10U_0805_10V6K
    9

    2
    VIN

    VOUT 3

    <32,34,40,43,46,48,49> SUSP# 1 2 8 EN VOUT 4 +1.1V_PCIE


    PR606

    GND
    1

    1
    0_0402_5% 2
    FB PC612
    B PJP603 PC611 22U_0805_6.3V6M B

    2
    1
    1 2 +PCIE (2A,80mils ,Via NO.= 4) @0.01U_0402_16V7K
    +1.1V_PCIE

    1
    PR607
    PAD-OPEN 3x3m
    40.2K_0402_1% PC613

    2
    APL5913-KAC-TRL_SO8 47P_0402_50V8J

    2
    1
    PR608
    105K_0402_1%

    2
    A

    www.kythuatvitinh.com Security Classification


    Issued Date 2008/02/25
    Compal Secret Data
    Deciphered Date 2008/02/25

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Size
    Title

    Date:
    Compal Electronics, Inc.
    0.9VP/1.1V_PCIE
    Document Number
    LA-4102P Blade discrete
    Monday, February 25, 2008 Sheet 48 of 52
    Rev
    0.4
    A

    5 4 3 2 1
    5 4 3 2 1

    +5VS

    B+

    32

    5
    CPU_B+

    2
    CPU_VID6

    CPU_VID5

    CPU_VID4

    CPU_VID3

    CPU_VID2

    CPU_VID1

    CPU_VID0
    PR202 PL201
    SMB3025500YA_2P

    VR_ON
    1_0603_5%
    2 1

    2200P_0402_50V7K

    470P_0402_50V7K

    2200P_0402_50V7K

    1000P_0402_50V7K
    47P_0402_50V8J
    68U_25V_M_R0.44

    68U_25V_M_R0.44

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    470P_0402_50V7K
    1 1

    1
    PC233

    PC234

    PC205

    PC206
    D
    PR201 499_0402_1% D

    1
    PC204

    PC239

    PC207

    PC242

    PC241

    PC240

    PC208
    7,20 DPRSLPVR 1 2 PC203 + +
    PC202 2.2U_0603_6.3V6K

    2
    PC237
    PR203 0_0402_5% 0.022U_0402_16V7K

    2
    5
    2 2

    PR208

    PR209

    PR210

    PR211

    PR212

    PR205

    PR213
    PR207
    5,7,19 H_DPRSTP# 1 2
    PQ201
    PR204 0_0402_5%
    CLK_ENABLE# 1 2 RQW130N03_PSO8

    1
    0_0402_5%

    0_0402_5%

    0_0402_5%

    0_0402_5%
    1
    0_0402_5%

    0_0402_5%

    0_0402_5%

    0_0402_5%
    PR206 0_0402_5% 4
    +3VS 1 2
    +3VS

    1U_0603_6.3V6M

    2
    2
    1.91K_0402_1%
    2.2_0603_5% 0.22U_0603_10V7K UGATE_CPU1-2 PL202

    3
    2
    1
    1
    PC201
    PR214 PC209 0.36UH_PCMC104T-R36MN1R17_30A_20%

    1
    BOOT_CPU1 1 2 1 2 2 1 +VCC_CORE
    2

    5
    6
    7
    8

    5
    6
    7
    8
    PR216
    PR215

    1
    10K_0402_1%
    3.65K_0805_1%

    47P_0402_50V8J
    4.7_1206_5%

    4.7_1206_5%

    1
    PR218

    PR245

    PR219

    PR220
    @499_0402_1%

    49

    48

    47

    46

    45

    44

    43

    42

    41

    40

    39

    38

    37
    1 2

    1
    0_0603_5% PR223
    2

    PC243
    PR217 1_0402_5%

    3V3

    CLK_EN#

    DPRSTP#

    VID6

    VID5

    VID4

    VID3

    VID2

    VID1

    VID0
    GND

    DPRSLPVR

    VR_ON
    1

    4 4 PR224

    1 2

    1500P_0603_50V7K 2

    2
    1 36 @0_0603_5%

    2
    15,20 VGATE PGOOD BOOT1 PQ202 1 2

    PC210
    5 H_PSI# 2 35 UGATE_CPU1-1 FDS6676AS_SO8 VSUM PC211
    PSI# UGATE1
    1 2

    3
    2
    1

    3
    2
    1

    2
    1 PR221 2 3 34 PHASE_CPU1 PQ203 VCC_PRM
    @0_0402_5% PR222 147K_0402_1% PMON PHASE1 FDS6676AS_SO8 ISEN1
    1 2 4 33 0.22U_0603_10V7K
    RBIAS PGND1
    VR_TT# 5 32 LGATE_CPU1 CPU_B+
    VR_TT# LGATE1

    2200P_0402_50V7K
    5
    C C

    47P_0402_50V8J
    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K
    6 NTC PVCC 31

    1
    PC212

    PC213

    PC235

    PC236
    7 30 LGATE_CPU2 PQ204
    SOFT LGATE2

    1
    PC214
    ISL6262ACRZ-T_QFN48_7X7

    PC238
    8 29 RQW130N03_PSO8

    2
    0.022U_0603_25V7K PC215 OCSET PGND2
    4

    2
    1 2 9 28 PHASE_CPU2
    VW PHASE2 PR225
    PR226 13K_0402_1% 10 27 UGATE_CPU2-1 1 2 UGATE_CPU2-2
    COMP UGATE2 0_0603_5% 0.36UH_PCMC104T-R36MN1R17_30A_20%
    1 2

    3
    2
    1
    11 26 BOOT_CPU2
    1 2 1 2 2 1
    FB BOOT2 PR227 PL203
    1 2

    5
    6
    7
    8

    5
    6
    7
    8

    47P_0402_50V8J
    4.7_1206_5%

    4.7_1206_5%
    DROOP

    1000P_0402_50V7K PC216 12 25 2.2_0603_5% PC217


    FB2 NC

    1
    VDIFF

    ISEN2

    ISEN1
    VSUM

    10K_0402_1%
    3.65K_0805_1%
    PR229

    PR246
    VSEN

    PR228 6.81K_0402_1% 0.22U_0603_10V7K


    GND

    VDD
    RTN

    DFB

    1
    VIN

    PR231
    VO

    1 2 PR232

    PR230

    PC244
    1 2 PU201
    13

    14

    15

    16

    17

    18

    19

    20

    21

    22

    23

    24

    1 2

    2
    4 4 1_0402_5%

    2
    PC218 1000P_0402_50V7K

    2
    1500P_0603_50V7K
    PC219
    ISEN1 PQ205 PR233 @0_0603_5%
    ISEN2 FDS6676AS_SO8 1 2

    2
    1 PR236 2
    @0_0402_5%

    PR235 97.6K_0402_1% PC220 1 2 +5VS PQ206

    3
    2
    1

    3
    2
    1
    2 PR237 1
    1K_0402_1%

    1 2 2 1 FDS6676AS_SO8 VSUM PC223


    1

    PR234 1_0603_5% 1 2
    470P_0402_50V7K PC221
    1 2 1U_0402_6.3V6K
    2

    0.22U_0603_10V7K
    PC222 220P_0402_50V7K VCC_PRM
    PR239 ISEN2
    255_0402_1% PC224 1000P_0402_50V7K 10_0603_5%
    1 2 1 2 1 2 CPU_B+
    B B
    1

    PR238 1 2 PC225
    0.1U_0603_25V7K
    PR240 1K_0402_1%
    2

    PC226 820P_0603_50V7K
    5 VCCSENSE 1 2
    VSUM
    1

    2.61K_0402_1%

    PC227 PC228
    PR241

    @0.022U_0603_50V7K

    www.kythuatvitinh.com
    0.01U_0603_50V7K
    2

    5 VSSSENSE
    2
    1

    11K_0402_1%

    PC229 180P_0402_50V8J
    PR242

    1 2
    2

    10KB_0603_5%_ERTJ1VR103J
    1 2 1 2 PH201
    2

    PR243 1K_0402_1% PR244 3.57K_0402_1%


    PC230 0.1U_0402_16V7K
    1

    VCC_PRM 1 2

    PC232 0.22U_0402_6.3V6K
    PC231 2 1 2 1
    0.22U_0603_10V7K

    A A

    Compal Electronics, Inc.


    Title
    +CPU_CORE
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Custom 0.4
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, Date:
    INC. Monday, February 25, 2008 Sheet 49 of 52
    5 4 3 2 1
    A B C D

    1 1

    PR701
    0_0402_5%
    1 2 PL701
    SYSON
    1

    HCB1608KF-121T30_0603
    PC702 1.8V_B+ 1 2 B+

    2200P_0402_50V7K
    @1000P_0402_50V7K

    @0.1U_0402_25V4K

    4.7U_0805_25V6-K

    4.7U_0805_25V6-K
    2

    5
    6
    7
    8

    1
    +5VALW

    PC701

    PC704

    PC705

    PC706
    PC707
    BST_1.8V
    1 2 BST1_1.8V 1 2 @680P_0402_50V7K

    2
    PR702 PC703
    1

    0_0402_5% 0.1U_0402_10V7K 4
    PR703

    15

    14
    1
    316_0402_1% PU701
    PR704

    EN_PSV

    TP

    VBST
    2 2

    255K_0402_1% PQ701
    PR711
    2

    3
    2
    1
    1 2 2 13 DH_1.8V 1 2 AO4466_SO8 PL702
    TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
    PR705 0_0402_5%
    +1.8VP 2 1 3 12 LX_1.8V 1 2 +1.8VP
    VOUT LL
    0_0402_5%

    1
    4 V5FILT TRIP 11 1 2

    5
    6
    7
    8
    PR706 PR707

    @0.1U_0402_10V7K

    @0.1U_0402_10V7K
    330U_D2_2VY_R15M
    1
    5 10 +5VALW 17.8K_0402_1% @4.7_1206_5%
    VFB V5DRV

    1
    +

    PC709

    PC711

    PC712
    1

    1
    PC710 6 9 PC716 PC717

    2 2
    PGOOD DRVL

    PGND
    1U_0603_10V6K 4.7U_0805_10V6K 4.7U_0805_6.3V6K

    GND

    2
    4 2
    2

    2
    PC713
    +1.8VP TPS51117RGYR_QFN14_3.5x3.5 @680P_0603_50V7K
    PR708
    7

    1
    1 2
    28K_0603_0.1% DL_1.8V PQ702

    3
    2
    1
    FDS6690AS_NL_SO8
    1

    PR709
    19.6K_0603_0.1%
    2

    3 3

    PJP701

    www.kythuatvitinh.com
    +1.8VP 1 2 +1.8V (7A,280mils ,Via NO.= 14)
    PAD-OPEN 4x4m
    PJP702
    1 2

    PAD-OPEN 4x4m

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    1.8VP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 50 of 52
    A B C D
    A B C D E

    Version Change List ( P. I. R. List ) for Power Circuit


    Item Page# Title Date Request Issue Description Solution Description Rev.
    Owner
    1 1
    DC Connector Add PD4 & PC12
    1 43 /CPU_OTP 11/06 Compal Add PD4 & PC12

    2 45 3.3VALWP/5VALWP 11/06 Compal for Layout Change PQ301, cancel PQ303.

    3 44 Charger 11/06 Compal EMI solution Add PC128

    4 49 CPU_CORE 11/06 Compal EMI solution Add PC240

    for VGA voltage steps


    5 47 1.5VSP/VGA_CORE 11/06 Compal Add PQ505, PR523, PR524, PR525

    6 45 3.3VALWP/5VALWP 12/31 Compal PWR request Add PU302, control signal changed to ACOFF
    2 2

    7 44 Charger Compal EMI solution Add PC129, PC130, PC131, PC132, PC133
    12/31

    Add PC242
    8 49 +CPU_CORE 12/31 Compal EMI solution

    9 47 +1.5VSP/VGA COREP 01/02 Compal HW request Change PR513 to 0_ohm

    10 44 Charger 01/02 Compal EMI solution Add PC135 and PR141

    11 49 +CPU_CORE 02/15 Compal Change high-side MOS for WWAN Change PQ201 and PQ204 to powerpak

    12 43 DC Connector ACLED# connect to EC pin 97


    /CPU_OTP 02/15 Compal AC LED change to KBC control
    3 3

    13 43 DC Connector add PC241 47pF


    /CPU_OTP 02/19 Compal WWAM issue

    14 49 +CPU_CORE 02/19 Compal WWAM issue

    www.kythuatvitinh.com
    add PC243 PC244 47pF

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Power Changed-List History-1
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 51 of 52
    A B C D E
    5 4 3 2 1

    Item Fixed Issue (Reason for change) PAGE Modify List Date Phase

    1 Transation Fail 08 C41C42C43C44 Change ESR=7m ohm 11/21 DB

    2 Disable TV out function from Docking 20 TV signal unconnected,DACB_VDD pull low 10K (R948). 11/07 DB
    CRT(JCRT1)HDMI(JHDMI1)ESATA(JP53)Finger print(JJP24)FAN(JP2)Speaker(JP60)Multi
    3 Update Connetor Library 11/17 DB
    D
    bay(JP12)Dual LED(D53D54 D

    4 Delete LVDS B channel 19,20 Schematic Delete 11/17 DB

    5 USB camera Footprint error 19 Change U42 to G916-390T1UF SOT23, it adjustable mode, R1091=215KR1093=100K,Add GPIO 20 to turn off power 11/07 DB

    6 Reserve Card reader D3E function 27,32 GPIO6= CR_CPPE#GPIO22=CR_WAKE# 11/17 DB

    7 Swap PCIE LAN and New card 27 Swap PCIE4 and PICE6 11/17 DB

    8 Change GPU 1.8VS power 2021 Change 1.8VS to +VDD_MEM18 11/17 DB

    9 Change G sensor control from SBLED drive by +5VS 2739 Change G sensor control from SB 11/17 DB

    10 Avoid Battery mode can't boot issue 3845 Add +3VALW GD to EC_RSMRST# to fix Battery mode can't boot issue 11/17 DB

    11 Add G sensor ST and Bosch 37 Add G sensor ST and Bosch 11/17 DB


    C C

    12 Change LAN solution (Marvell to Realtek) 30 Change LAN solution (Marvell to Realtek) 11/17 DB

    13 LAN transformer interfere 30 U19 Change to correct transformer type 11/17 DB

    14 Cardreader schematic review,add D3E function 32 R709-->10KR1047-->8.2KR1128-->StuffR705-->@U37-->@Cardreader LED-->+5VSadd D3E function 11/17 DB

    15 Jack can't detect normal 33 R1059 change from 39.2 to 39.2K 11/17 DB

    16 Docking can not power on 40 Add power on circuit D57,Q13R751,R752,R753 11/17 DB

    17 HP audio team recommend 3335 C1480~C1487C1352C1354 change to 0.022UAmp output setup to 15.6 dBReserve C747C748 for GNDA and GND 11/17 DB

    18 Audio jack can't detect normal 35 Add Pull up resistor R750 to +3VALW 11/17 DB

    19 Docking HP audio test fail 35 Add C795C796 to avoid DC level, and add R968R969 to reduce HP out level 11/17 DB
    B B

    20 Leakage problem 38 Correct direction pretect leakage 11/07 DB


    Delete EC_PME#SYSON PUSUSP# PULID_SW# change to +3VALWDelete CLKRUN#R582->@ for C0 chipCIR
    21 EC pin define update 38 11/07 DB
    PU+5VLadd 100P to BATT_OVP(EC recommend)

    www.kythuatvitinh.com
    22 Can't Hibernation(SLP_S4#) 38 Connect SLP_S4# to SB 11/17 DB

    23 EC can't receive docking present 40 CONA# change +3VL 11/12 DB

    24 Reserve capacitor on digital MIC for EMI request 19 Add C496,C498 11/07 DB

    25 Add 2N7002 to GND on HDMI to avoid leakage. 21 Add Q74 01/04 SI

    26 +VDD_MEM18 to +1.8VS, change to jummper 22 Delete R1124,R1125 add PJP605 01/04 SI

    27 HDCP ROM fail. HDCP_SCL need pull high. 22 R224 no stuff. R213 stuff. 01/04 SI
    A A

    28 Reserve capacitor on digital MIC for SED. WWAN noise 26 Add C499,C502 01/04 SI

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HW PIR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 52 of 53
    5 4 3 2 1
    5 4 3 2 1

    Item Fixed Issue (Reason for change) PAGE Modify List Date Phase

    1 Change transformer vendor 30 change U19 library 01/04 SI

    2 XMIT_OFF add a diode to avoid leakage. 31 Add D88 01/04 SI

    3 Card reader recommend 32 XD_ALE need pull +3VS not pull low. 01/04 SI
    D D

    4 change Q54 from transistor to MOS for cardreader LED. 32 Change Q54 01/04 SI

    5 speaker pop issue 35 Change C1488 to 1U 01/04 SI

    6 Reserve capacitor on SPI_FSEL#,CLK#,FER for EMI request 36 Add C2125,C2126,C2127 01/04 SI

    7 Change EC_PME pull high from +3VL to +3VALW 38 R585 stuff 01/04 SI

    8 Reserve damping resistor on SPI_CLK for EMI request 38 Add R191 01/04 SI

    9 WLAN LED issue,WL_BLUE_LED# pull +3VS 39 Add R716 01/04 SI

    10 Add bypass capacitance on sensor bottom 39 Add C261(4.7U) 01/04 SI

    11 EC can't detect DOCK_PRESENT. 40 change R754 to 22 Ohm,R623 to 2K 01/04 SI


    C C

    12 Add DOCK_VOL_UP#,DOCK_VOL_Down# pull +3VS 40 Add R594,R596 01/04 SI

    13 SPDIF issue 40 follow Vader 01/04 SI

    14 Docking CRT blurred 40 Change ping 31,39,22 connect to GND 01/04 SI

    15 Change R650 and C770 to modify the power sequence 41 change R650 to 1K, C770 to 0.1u 01/04 SI

    16 Add 12P on CLK_14M_ICH for WWAN noise 17 Add 12P on CLK_14M_ICH 02/15 PV

    17 BKOFF# reserve pull low 10K 19 reserve R717 02/15 PV

    18 Reserve CMD27 to support 64M X16 7,8 Reserve CMD27 to support 64M X16 02/15 PV

    19 Reserve cap on HDA_BITCLK for WWAN noise issue 26 Reserve cap on HDA_BITCLK 02/15 PV
    B B

    20 Reserve to prevent ESD issue 30 Reserve ESD diode on LAN LED pin 02/15 PV

    21 Change WLAN and WWAN 0402 resistor to 0805 31 Change WLAN and WWAN 0402 resistor to 0805, and WLAN change to +3VS power plane 02/15 PV

    www.kythuatvitinh.com
    22 Direct drive LED, and add D3E function diode 32 Direct drive LED and XD_ALE Pull L, and add D86 for D3E function 02/15 PV

    23 Change R1092 value on BT power switch Gate 36 Change R1092 to 10K 02/15 PV

    24 Correct AC_LED control by EC 38 AC_LED Change controll by EC 02/15 PV

    25 Change all LED limit current resistor to 200 ohm 39 Change all LED limit current resistor to 200 ohm and add Touch pad LED for PR 02/15 PV

    26 Add 33 ohm for MUTE_LED and DOCK_SLP_BTN# 40 Add 33 ohm for MUTE_LED and DOCK_SLP_BTN# 02/15 PV

    27 follow check list ver:1.5 6 change R13 to 56 ohm;change R2~R8 to 51 ohm;change R11 to 0ohm 02/20 PV
    A A

    28 Reserve Cap for EMI 42 add C1250,C1249 02/20 PV

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HW PIR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 53 of 53
    5 4 3 2 1
    5 4 3 2 1

    Item Fixed Issue (Reason for change) PAGE Modify List Date Phase

    1 follow check list Ver:1.5 17 reserve R148 02/15 PV

    2 follow check list Ver:1.5 9 change R45,R48 to 10K 02/15 PV

    3 boot code "88" power sequence faill 27 add Diode from PWROK to RSMRST 02/15 PV
    D D

    4 Change BT,LAN,DOCK,Multibay connect for DFX 02/15 PV

    5 Change WWAN and WLAN LED 39 02/15 PV

    6 For EMI 37 SPI_CLK add R2118 , R2119 , R2120 => 33ohm add C2125 , C2126 , C2127 => 22pF;R553, 554, 556 =>10ohm 02/15 PV

    7 For EMI 30 LAN add C656 and C657 => o.1uF 02/15 PV

    8 For EMI 39 T/P add D28 and C729 02/15 PV

    10

    11
    C C

    12

    13

    14

    15

    16

    17

    18

    19
    B B

    20

    21

    www.kythuatvitinh.com
    22

    23

    24

    25

    26

    27
    A A

    28

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2008/02/25 Deciphered Date 2008/02/25 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HW PIR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4102P Blade discrete 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date: Monday, February 25, 2008 Sheet 54 of 53
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