16

QFN
2mm x 1.5mm x 0.4mm
2.0V 5.5V

150A

8SPS 860SPS

(PGA)
I2C
4 2 (ADS1115)

ADS1114 ADS1115

ADS1113 ADS1114 ADS1115 16
(ADC)
QFN-10 MSOP-10 ADS1113 / 4 / 5

ADS1113 / 4 / 5
I2C 4
I2C ADS1113 / 4 / 5 2.0V 5.5V

ADS1113 / 4 / 5 860
(SPS) ADS1114 ADS1115
(PGA) PGA
256mV

ADS1115 (MUX)
2 4
ADS1113 / 4 / 5

ADS1113 / 4 / 5
40 125
 ESD

ESD

TI
www.ti.com

ADS1113,ADS1114,ADS
1115
VDD GND -0.3 ~ +5.5 V
100 mA
10 mA
GND -0.3 VDD +0.3 V
SDASCLADDRALE -0.5 +5.5 V
RT/ RDY GND
+150
-60 +150

MSOP/QF /
N
ADS111 BROI/N6J 16 860 1/1
3
ADS111 BRNI/N5J 16 860 1/1
4
ADS111 BOGI/N4J 16 860 2/4
5
ADS101 BRMI/N9J 12 3300 1/1
3
ADS101 BRQI/N8J 12 3300 1/1
4
ADS101 BRPI/N7J 12 3300 2/4
5

-40C +125CVDD=3.3VFS=2.048V
+ 25C
 ADS1113,ADS1114,ADS1115

VIN = 4.096/P V
(AINP) GA
(AINN)
AINP or GND VDD V
AINN to
GND
See Table
2
FS = 10 M
6.144V
FS=4.096 6 M
V2.048V
FS = 3 M
1.024V
FS = 100 M
0.512V,
0.256V

16 Bits
8, 16, 32, SPS
DR 64,
128,250,
475, 860
-10 10 %


DR = 8SPS, 1 LSB
FS
=2.048V,
best fit
FS = 1 3 LSB
2.048V,
differential
inputs
FS = 3 LSB
2.048V,
single-
ended
inputs
FS = 0.005 LSB/C
2.048V
FS = 1 LSB/V
2.048V
FS = 0.01 0.15 %
 2.048V at
25C
FS = 7 ppm/C
0.256V
FS = 5 40 ppm/C
2.048V
FS = 5 ppm/C
6.144V
80 ppm/V

PGA Match 0.02 0.1 %

match between
any two
PGA gains
Match 0.05 0.1 %
between
any two
inputs
Match 3 LSB
between
any two
inputs
At dc and 105 dB
FS =
0.256V
At dc and 100 dB
FS =
2.048V
At dc and 90 dB
FS =
6.144V
fCM = 105 dB
60Hz, DR =
8SPS
fCM = 105 dB
50Hz, DR =
8SPS
/

VIH 0.7VDD 5.5 V
VIL GND 0.5 0.3VDD V
VOL IOL = 3mA GND 0.15 0.4 V

IH VIH = 5.5V 10 A
IL VIL = GND A

1) ADC VDD + 0.3 v

(2) 99%
(3) PGA

-40 C + 125 C VDD = 3.3 v (FS) = 2.048V

 + 25 c

ADS1113 ADS1114 ADS1115

2 5.5 V

0.5 2 A
25 C
5 A

125C
150 200 A
25 C
300 A
125 C
VDD = 0.9 mW
5.0V
VDD = 0.5 mW
3.3V
VDD = 0.3 mW
2.0V

60 +150 C

40 +125 C

PIN

PIN CONFIGURATIONS
RUG DGS
PACKAGE PACKAGE
QFN-10 MSOP-10
(TOP VIEW) (TOP VIEW)
SCL
1
0
1 9 SDA
ADD SCL
ADD
2 ADS 8 VDD
1113 R ALERT/RDY (ADS1114/5 SDA
R ALERT/RDY (ADS1114/5 1 1
3 ADS 7 AIN3 (ADS1115 Only)
1114 Only) 0 VD
Only) 2 9
4 ADS 6 AIN2 (ADS1115 Only)
GN D
GN 1115
5 3 8
D AIN3 (ADS1115
D 4 7
AIN Only) AIN2
AIN 5 6
0 (ADS1115 Only)
0
AIN

1
PIN
/

/
PI ADS1 ADS11 ADS11
N 113 14 15 2
1 I C

2 NC (1) /RDY /RDY t (NC ADS1113)

3 GND GND GND

4 AIN0 AIN0 AIN0 1 1

5 AIN1 AIN1 AIN1 1 2
6 N N AIN2 2 3 (NC ADS1113/4
C C
2 4 NC
7 N N AIN3
ADS1113/4
C C
8 VDD VDD VDD 2.0V 5.5 v

9 SDA SDA SDA I/O

10 SCL SCL SCL : Clocks data on SDA

1)

tR tF tHDSTA
tLOW

SCL
tHDST tHIGH tSUSTA tSUSTO
A
tHDDA tSUDAT
T

SDA tBUF
 P S S P

TYPICAL CHARACTERISTICS
At TA = +25C and VDD = 3.3V, unless otherwise noted.
OPERATING CURRENT vs TEMPERATURE SHUTDOWN CURRENT vs
300
Operating Current (A)

TEMPERATURE

Shutdown Current (A)

5.0
250
4.5
200 4.0
VDD = 5V
3.5
150
3.0
2.5
VDD = VDD = 5V
VDD = 2V 2.0
100 3.3V VDD =
1.5
3.3V
50 1.0
VDD = 2V
0.5
0 0

40 20 0 20 40 60 80 100 120 40 20 0 20 40 60 80 100 120 140

140 Temperature (C)
Temperature (oC)

Figure 2. Figure 3.

(1)
SINGLE-ENDED OFFSET ERROR vs TEMPERATURE DIFFERENTIAL OFFSET vs TEMPERATURE
150
Offset Voltage (V)

60
(1)

100 FS = :4.096V FS = :1.024V

Offset Error (!-V)

FS = : FS = : 50
40 VDD =
50 2.048V 0.512V
5V
30
0 VDD =
2V 20
VDD =
4V
50 10 VDD =
3V
100 0
VDD =
2V
150
10
VDD = 5V

20
200

250

300
40 20 0 20 40 60 80 100 120 40 20 0 20 40 60 80 100 120 140
140 Temperature (C)
Temperature (C)

Figure 4. Figure 5.

GAIN ERROR vs TEMPERATURE GAIN ERROR vs SUPPLY

0.05 0.15
FS = :t0.256V
0.04
FS = 0.10
Gain Error (%)

Gain Error (%)

0.03 :t0.512V
0.02 0.05
FS =
FS = :t1.024V, :t2.048V,
0.01 0 0.01 0.02 0.03 0.04
FS =
:t2.048V
 : 60 80 100 120 140
and Temperature (oC)
0
t

0.05

40 20
2.0 2.5 3.0 3.5 4.0 4.5 5.0
5.5
0 0.10 Supply Voltage (V)

20

40 0.15

Figure 6. Figure 7.

(1) This parameter expresses the full-scale range of the ADC scaling. In no event should more than VDD + 0.3V be applied
to this device.
 TYPICAL CHARACTERISTICS (continued)

At TA = +25C and VDD = 3.3V, unless otherwise noted.

(2)
INL vs SUPPLY VOLTAGE INL vs INPUT SIGNAL
Integral Nonlinearity (!!V)

Integral Nonlinearity (!!V)

60 FS =
60
:t2.048V
VDD = 3.3V
50 +1250C
40 DR = 8SPS
Best Fit
40 400C
20
(1)
FS = :t6.144V
30 0
FS = :t0.512,
FS = :t0.256V +250C
:t2.048V 20

20
10

40

0 2. 3.0 3.5 4.0 4.5 5.0 60 1.0 0.5 0 0.5 1. 2.0

2.0 5 5.5 1.5 1.0 5
2.0
Supply Voltage (V) Input Signal (V)

Figure 8. Figure 9.
Integral Nonlinearity (V)

INL vs INPUT SIGNAL INL vs INPUT SIGNAL

Integral Nonlinearity (V)

60 60
FS = 40 FS =
:t0.512V :t2.048V
40 +1250
VDD = VDD = 5V
C 20
3.3V DR = DR = 8SPS
20 8SPS TA = -40OC
Best Fit
Best Fit 400C 0
0
+250 -20 TA = +25OC
C
20
TA =
+125OC

40 -40

60 0.375 0.250 0.125 0 0.125 0.37 0.

-60
- -1.0 -0.5 0 0.5 1. 2.0
0.5 0.250 5 5 1.5 1.0 5
-2.0
Input Signal (V) Input Voltage (V)

Figure 10. Figure 11.

Integral Nonlinearity (V)

INL vs INPUT SIGNAL INL vs TEMPERATURE

Integral Nonlinearity (V)

60 140
FS = :t0.512V 120 DR = 8SPS
VDD = 5V
40 40 60 TA
DR = 100
8SPS =
20 Best Fit +2
80
5O
TA = C
0 60

40OC TA = 40
VDD = 5V

+125OC 20
20
0 VDD = 3.3V
 VDD = 2V
0.5 0.3 0.2 0.1 00.1 0.2 0. 0. -60 -40 -20 0 20 40 60 80 100 120 140
0.4 Input Voltage 0.3 4 5 Temperature (C)
(V)

Figure 12. Figure 13.

(2) This parameter expresses the full-scale range of the ADC scaling. In no event should more than VDD + 0.3V be applied
to this device.
 TYPICAL CHARACTERISTICS (continued)

At TA = +25C and VDD = 3.3V, unless otherwise noted.

NOISE vs INPUT SIGNAL NOISE vs SUPPLY VOLTAGE
12 35
FS = :t0.512V
FS =

RMS Noise (!-V)

30 :t2.048V
RMS Noise (!-V)

10
25 860SPS
8 DR = 860SPS
20

6 15
DR = 128SPS
4 10 128SPS
DR = 8SPS
5
2

8S
0 2. PS 3.0 3.5 4.0 4.5 5.0 5.5
0
-0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 5 Supply Voltage (V)
2.0
0.5
Input Voltage (V)

Figure 14. Figure 15.

NOISE vs TEMPERATURE Number of Occurrences GAIN ERROR HISTOGRAM

10
30
185 Units From a Production
9 Lot FS = :t2.048V
RMS Noise (V)

25
8
7
20
6
5 15
4
10
3
2
FS = :t2.048V 5
1 Data Rate =
0 8SPS 0
40 20 0 20 40 60 80 100 120
0.010 0.005

140
Temperature (C)
Gain Error (%)

Figure 16. Figure 17.

OFFSET HISTOGRAM TOTAL ERROR vs INPUT SIGNAL

Number of Occurrences

160 4
185 Units From a Includes noise, offset, and gain error.
140 Production Lot 3
Total Error (mV)

FS = :t2.048V
120 2

100 1
0
80

60
1
40
FS =
20 :t2.048V
2 Data Rate =
0 -1 0 1 2 860SPS
-3 - 3
2 Offset (LSBs)
3

 2.048 1.024 2.048
4 1.024 0 Input Signal (V)

Figure 18. Figure 19.

 TYPICAL CHARACTERISTICS (continued)

At TA = +25C and VDD = 3.3V, unless otherwise noted.

DATA RATE vs TEMPERATURE FREQUENCY RESPONSE
4 0
Data Rate Error (%)

Data Rate =
3 -10 8SPS
VDD =
5V
2 -20

Gain (dB)
1 -30
VDD =
3.3V 0 -40

-50
1
-60

-70
2
VDD = 2V -80
3
4

40 20 0 20 40 60 80 100 120 1 10 100 1k 10k

140 Input Frequency (Hz)
Temperature (C)
 Figure 20. Figure 21.

ADS1113/4/5 16 - - ADC ADS1113/
4/5
ADS1113/4/5
ADS1113/4/5 A/ D ADS1113
I2C ADS1114/5
22 ADS1115
ADS1113/ 4/5 A / D VIN AINP AINN MUX
ADS1115

ADS1113/4/5 ADC

ADC

22ADS1115

ADS1113/4/5
1 ADS1113/4/5 1001000 I2C ; I2C
TI MSP430F2002;; 2V 5V
23
ADS1113/ 4/5 I2C SCL
SDA ADS1113/4/5 SCL

ADS1113/4/5 instructsthe
ADS1113/4/5 9
30 31
ADS1113 /4/5

ADS1113i4/5 modeand
OBL0010000 7 12C
/0b00000001I n.rc ovteUDIUUUUIUU
TNE realster Ob10000011LSB
reqister OBL0010000 7 12C /
Ob00000000 reaisterOBL0010001 7
12C / end - bvt ADSI113/4/5 resoonse reaister
MSS ADS1113/4/5 LSB

23.

ADSI115
24 4

AINO AINI
AIN3

ADC
GND

ADSI113 ADS1114 1

AINI GNDAINP AINO
AINN AINI ADS1113 ADSI114
AINP -
AINNO. VDD GND
ADS1113ADS1114ADS1115 ESD
GND - o.3V AINx VDD+ o.3V


ADS1115

ADSI 113/4/5

AINP AINN

26

25
26 /
Sl
CAI AINPCA2 AINN CB
AINP - ANNS1
S2 CAI CA2
0.7V CB
OV

ADS1113 / 4/5

REFT R VIN / IAVERAGE

25. S1 S2 26

26.


AINP AINN
PGA 6MQ PGA
26 4M AINP AINN
0.7V 0.7V PGA
26 ZDIFF 2

2.

FS
6.1 22M
4.0 15M
2.0 4.9M
1.0 2.4M
0.5 710k
0.2 710k
1. ADC VDD + 0.3V

ADS1113 / 4/5


2


PGA ADS1114 / 5 PGA
2/31248 16 3 FS PGA

ADS1113 + 2.048V PGA 2/3
VDD 4V PGA
VDD 4V ADC

3. PGA

PGA SETTING FS (V)

2/3 6.144V(1)
1 4.096V(1)
2 2.048V
 4 1.024V
8 0.512V
16 0.256V

1. ADC VDD + 0.3V

ADs1113/ 4/5 16 7FFFh

8000H 4
27

4.
VINAINP - AINN CODE1
FS (215 1)/215 7FFFh
+FS/215 0001h
0 0
FS/2 15 FFFFh
FS 8000h

27. ADS1113/4/5

ADSI 113/4/5 sinc

; RC

ADSI 113/4/5

ADSI 113/4/5 ADSII

13/4/5 ADSI 113/4/5

ADS1113 / 4/5 OS 0
OS '1
OS RESET POWER-UP ADS1113 / 4/5

ADS1113 / 4/5
ADS1113 / 4/5 12C ADS1113 / 4/5

ADSI 113/4/5
ADS1113 /
4/5
860SPS 125ms 8SPS 860SPS

1.2ms ADS1113 / 4/5 123.8msADSI 1

3/4/5 ADSI 113/4/5 1 / 100
ADSI 113/4/5

ADS1114 / 15
ADSII 14/5 ALERT / RDY

COMP MODE ALERT / RDY

ALERT / RDY

COMP
LAT

SMBus COMP POL ALERT / RDY

28 29
ALERT / RDY
ALERT / RDY
COMP_QUE COMP QUE
PINADS1114 / 5
/ RDY MSB

1 MSB 0 COMP POL COMP

; MODE COMP LAT ALERT /
RDY ADSII 13/4/5 ALERT / RDY -
8psALERT / RDY
COMP POL 0
 28. ALERT
 29. ALERT

SMBus
latchlng COMP LAT ='1 reglster ALERT / RDY PLN
SMBus PLN converslon
readlng converslon ISSI-NNG SMBus
readlng devlce 12C converslon 450
assertlon
converslons / RDY SDA draln
archltecture devlces dlsabled PLN
llne devlces ALERT / RDY PLN
SMBus 00011001 12C ADs1114 / 5
12C / RDY ADs1114'5

ALERT / RDY PLN arbltratlon durlng PO SMBus decldes Wh
devlce assertlon
12C arbltratlon PLNassertlon
SMBus untll devlces respectlveassertlons wlndow
SMBus Indlcates '1'1 0 slgnals OW
12C
ADSI113/4/5 12C 12C

12C ;
wlres 2
; dnve 12C

12C ADS1113/4/5
I 2 C
7
12C
8 SDA
SDA
SDA
SDA

STOP agaim
START
ADSI113/4/512C PC ADSII13/4/5
ADDR FC VDDSDA SCL
5 ADDR
PC GENERAL CALL
ADS1113 / 4/5 12C
0000000 0

0000011006HADS1113 / 4/5

12C

100kHz ;
400kHz ; HS
3.4MHz_
ADSI 113/4/5

ADSI 113/4/5
00001 xxx HS-
HS ;/
ADSI 113/4/5
; FC ADSI 113/4/5 HS
3.4MHz ADS1113 / 4/5 HS STOP

12C
SLAVE
ADSI 113/4/5 ADSI 113/4/5
SCL

byte_ ADSI 113/4/5

ADSI 113/4/5

7 RAN
ADSI 113/4/5

START STOP
/
ADSI113/4/5
Ultten
RAN'

ADSI 113/4/5 VA UE
R.IW

START RAV 10
desiredl ADS1113 / 4/5

operatiom

ADSII 13/4/5 12C conversiom

ADSII 13/4/5 Hi

; 30 6 7

6.

BIT 1 BIT 0
0 0
0 1
1 0 Lo_thresh
1 1 Hi_thresh

16
00 8_
CONFIG
16 ADS1113/4/5 PGA
9
 7.
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0 0 0 0 0 0 Register address

8.
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
NAME D1 D1 D1 D1 D1 D1 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

9./
BIT 15 14 13 12 11 10 9 8
NAME OS MUX2 MUX1 MUX0 PGA2 PGA1 PGA0 MODE

BIT 7 6 5 4 3 2 1 0
NAME DR2 DR1 DR0 COMP_M COMP COMP COMP_Q COMP_Q

BIT 15
OS/

0
1

31
21
11:01
COMP_MODEADM 114 ADS1115

COMP_MODE'O'COMP_MODE 1
ADSI 113

1
COMP_POLADM 114 ADS1115
ALERT / RDY COMP_POL'O'
COMP_POLZ'IRDY ADSI 113

1
COMP_LATADS1114 ADS1115
ALERT / RDY
COMP LAT'O'ALERT / RDY
COMP LAT1 ALERT / RDY
SMBus
ALERT / RDY
ADSI 113

1
COMP_QUEADS1114 ADS1115
'11'
ALERT / RDY
ALERT / RDY
ADSI 113
00 -
01
-
10
11
-
Lo_thresh AND Hi_thresh
16 ;
PGA

THRESH MSB 1
Lo_thresh
MSB 'O' Hi_thresh Lo_thresh
10. RDY ALERT/ RDY OS

10. Lo_thresh and Hi_thresh

Lo_thresh /)
B 1 1 1 1 1 1 9 8
I 5 4 3 2 1 0
NAME Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh
15 14 13 12 11 10 9 8

B 7 6 5 4 3 2 1 0
I
NAME Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh Lo_thresh
7 6 5 4 3 2 1 0

Hi_thresh (/)
B 1 1 1 1 1 1 9 8
I 5 4 3 2 1 0
NAME Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh
15 14 13 12 11 10 9 8

B 7 6 5 4 3 2 1 0
I
NAME Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh Hi_thresh
7 6 5 4 3 2 1 0
Lo_thresh default = 8000h.
Hi_thresh default = 7FFFh.
 1 A0 A1 ADDR
2 SDA
3 SDA
30. Word

1A0 A1 ADDR
31. Word
1A0 A1 ADDR
32. SMBus

ADS1113/ 4/5

ADSII13/4/5 ADSII15 33 ADSI13/4/5

ADS1113/4/5

ADS1113/4/5 noninvefting

ADS1113/ 4/5 O. IPF

ADS1113/4/5 12C 12C

12C ADS1113/4/5 ADS1113/4/5

12C
SDA SCL 12C

 33. ADS1115

ADSII 13/4/5 ADSI 113/4/5 CAN 12C

ADS 1113/4/5 35. ADSI / 5

TMP421 DAC8574
12C examp TMP421 0101010 DAC8574 1001100.
DAC8574 TMP421 www.ti.com
GPIO
/I / O PC
ADSI 113/4/5 GPIO 12C
ADS1113 / 4/5 34 PC GPIO GPIO 0

0;
;'O'
SCL ;
1O ADS 1113/4/5

; SCL Z '0'
GPIO
12C

ADSI115 4 37
ADS1115 MIJX
OV ADS1115
ADSI115
ADS1115 37 ADS1115
;

38
OPA335 ADSII14/5 ADS1114/
5 8. OPA335 16

0.256V 50mV ADSI

0.2V
ADSII 13/4/5
ADS1113 / 4/5
300mV ADSI 113/4/5
100mA
ADS1113 / 4/5 12V +
;
ADSI 113/4/5
ADSI 113/4/5