ABSTRACT

In this paper, a number of simulated floating inductors (FIs) employing second-

generation current conveyor (CCII), current-feedback operational amplifier
(CFOA), differential voltage current conveyor (DVCC) and differential
difference current conveyor (DDCC) are proposed. They employ only a grounded
capacitor; accordingly, they are suitable for integrated circuit (IC)
implementation. Some of the developed FI simulators demonstrate the feature of
improved low-frequency performance while the other ones suffer from the Z/Y
terminal parasitic resistors bringing extra series resistors to the inductances of the
simulated FIs. Two novel methods for reducing/eliminating the unwanted series
resistance in equivalent inductances of the FIs are developed, one of which is
called the direct design technique accomplished by adjusting the resistive
component/components of the FIs. The series resistors of the FIs affecting their
low-frequency performance can be cancelled by adding floating negative resistors
in series, which is another method. Three of the presented FIs as examples are
chosen in order to verify the developed method, perform their simulations and
show their performance.

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 1. INTRODUCTION

Operational amplifiers (OAs) as basic building block have been popular in the
market since the advent of the first analog integrated circuit (IC). Nevertheless,
there is a new impulse towards the current-mode (CM) circuits instead of voltage-
mode (VM) ones, because CM configurations can overcome the restriction of the
constant gain-bandwidth product and the trade-off between speed and bandwidth.
Although physical inductors are used for analog filter and oscillator designs, they
are usually unwanted passive components in most of the electronic configurations
because their characteristics are far from the ideal element behaviors. In addition,
they occupy larger chip area when compared to other passive components such
as resistors and capacitors. Fortunately, CCs are widely used in the design of
simulated floating inductors (FIs). FI simulators can be divided into two
categories according to the use of generation of active components. The first
generation of FIs called active RC FI simulators is composed of OAs, while the
second-generation FIs use CCs. It is well known that second-generation FIs are
superior to first-generation ones owing to the fact that they operate at high
frequencies, and do not need passive component matching conditions.
In this paper, eight ideally lossless FIs employing two to four resistors and a
grounded capacitor are proposed. All the proposed FI simulators use CCII,
CFOA, DVCC and DDCC as active element.
Contrary to the FI proposed in employing six active devices, the presented FIs
with reduced Z and Y terminal parasitic resistors effective at low frequencies
employ only two or three active components.
The rest of the report is organized as follows: the proposed FIs and their active
components are treated in Section 2. Non-ideality effects such as non-ideal gain
and parasitic impedance effects are discussed in Sections 3 and 4, respectively.
In Section 4, two new methods for improving the low-frequency performance of
the FIs are developed. Universal and multifunction filter design methods using
FIs are given in Section 5. Simulation and experimental results to confirm the
theory are given in Section 7. Finally, the paper is concluded in Section 8.

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 2. CURRENT CONVEYORS

Basic principle underlying current conveyors is that whatever current enters

terminal-X, the same current is conveyed to port -Z. Hence the name current
conveyors.
CCs used in this report are:

1. Second-generation current conveyor

2. Current-feedback operational amplifier

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3. Differential voltage current conveyor

4. Differential difference current conveyor

DVCC can be easily obtained from the DDCC by grounding one of the Y
1 or Y 3 terminals.
CCII can be easily implemented from the DDCC by grounding its Y 2 and
Y 3 terminals.

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 3. Description of the floating inductors

Electrical symbol of a FI simulator is shown in following figure., and it is

represented by the following short-circuit admittance matrix:

A collection of FI simulators is shown in Figs. 411. The proposed FIs in Figs.

511 are novel. FI in Fig. 4 can be constructed with three AD844s(CFOAs) while
the original one needs four AD844s for its realization. Moreover, the FIs in Figs.
7 and 8 are different versions of the ones in Figs. 5 and 6, respectively. FIs in
Figs. 4 and 5 have no passive component matching constraints. Nevertheless, the
ones in Figs. 711 require passive component matching conditions in order to
succeed the cancellation of unwanted parasitic impedances effective at low
frequencies. The application of straightforward analysis to the proposed FI
simulators in Figs. 411 ideally gives the following matrix equation:

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Note that in order to obtain the matrix Eq. of FI for some of the FIs in Figs. 411,
the following matching constraint/constraints should be provided:
(i) R2 = R3 must be chosen for the FIs in Figs. 6 and 9.
(ii) R1 = R3 must be chosen for the FIs in Figs. 7 and 10.
(iii) R1 = R4 and R2 = R3 must be chosen for the FI in Fig. 8.
(iv) R1 = R2 must be chosen for the FI in Fig. 11.

Finally note that all of the introduced FIs use a grounded capacitor; accordingly,
they are advantageous from the IC realization point of view. Further, the proposed
FIs depicted in Figs. 6, 8 and 10 employ both grounded resistors and capacitors,
which are ideal for the IC design. Alternatively, the realized simulated FIs shown
in Figs. 4, 5 and 11 use a minimum number of passive components, i.e. two
resistors and a grounded capacitor. All of the introduced FIs in Figs. 411 with
no capacitor connected in series to the X terminals of the CCIIs/DVCC/DDCC
and W terminals of the CFOA can be operated at higher frequencies.

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 4. Non-ideal gain effects

Dual output DDCC as a versatile active device can be expressed by the following
matrix equation:

Ideally the non-ideal gains (s)=(s)=i(s)=1(i=1,2,3) and parasitic

admittances/impedances YY1(s) = YY2(s) = YY3(s) = Zx(s) = 0.
Likewise, defining matrix equation of the CFOA can be given as:

It is seen from the matrix equation that (s) and (s) correspond to frequency-
dependent non-ideal current gains. Similarly, i(s) corresponds to frequency-
dependent non-ideal voltage gain. The frequency-dependent non-ideal gains of
the DDCC, using a single-pole-model in the j domain, can be defined as:

In (8b) i = 1, 2, 3 and the pole frequencies , i and in (8a)(8c) depend

on the technology parameters, and ideally equal to infinity. The operation
frequency of the presented FIs in Figs. 511 can be defined as f << min {, i,

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}. Also, the DC gains o, oi and o are ideally equal to unity, and can be
described as follows:

where (||<<1) and (||<<1) are current-tracking errors and i (|i|<<1) is

called as voltage-tracking error.

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 5. Parasitic impedance effects

The series X terminal parasitic impedance Zx(s), parallel Y terminal parasitic

impedances Yl(s) (l = 1, 2, 3), Z terminal parasitic impedances YZ+(s), YZ-(s) and
series W terminal parasitic impedance Zw(s) can be expressed as:

where Zx= Rx at low and medium frequencies. We assume that Zx=Rx for
operating frequency f<<Rx/Lx. The equivalent circuit for the FIs in Figs. 411
considering their parasitic impedances is given in following figure:

The equivalent circuit in Fig.12 can be defined by the following matrix equation:

(13)
where

(14)
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It is assumed that Zx=Rx or jLx of the X terminal of the DDCC in magnitude is
much less than Rx +Ra, where Ra is the external resistor connected to the X
terminal of the DDCC. Otherwise Rx must be used instead of the external resistor
Ra.
The overall frequency range is found as

In the next section of this paper, we deal with two novel methods for increasing
operating frequency by performing fL=0.
Note that Zp1(s) and Zp2(s) affect the high-frequency performances of the FI in
Fig (4). Further, they can be ignored at low frequencies. In this study, we
preliminary deal with low frequency performances of the FIs or their
improvement; thus there is no need to consider the effects of Zp1 and Zp2 at
sufficiently low frequencies.

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 6. Low-frequency performance improvement methods

The matrix equation of the FI with its parasitic impedances shown in Fig. 12 at
low frequencies and ignoring Rp1 and Rp2 can be written as follows:

From above Eq., the limit at low frequencies within 0.5% error is computed as

It can be observed from Eq. (23) that if Req is sufficiently reduced or Leq is chosen
large enough, the useful operating-frequency range of the FI increases
considerably. In this paper, we want to achieve Req = 0 by using two novel
methods. The quality factor (Q) of the FI in Figs. 411 is to be

It is seen from above Eq. that for Req = 0, lossless FIs are obtained.
The following two methods can be used to improve the low-frequency
performance of the FIs.
i) Connecting a negative floating resistor
Connecting the negative floating resistors shown in Figs. 1316 in
series to the FIs in Figs. 46, the R eq of FIs can be canceled. The short-
circuit admittance matrix of the networks in Figs. 1316 can be obtained
as

where the Rk (k = 13,14,15,16) of the configurations in figures.

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R13 = -(Ra + Rx1 (Rb + Rx2 )) =>> Ra + Rx1 >= Rb + Rx2

R14 = R15 = -(R + Rx)

R16 = -(R - Rx)

The overall series parasitic resistance after connecting a negative
resistor and a FI in series becomes Req-Rk. Finally, it should be
mentioned that Req of the FIs in Figs. 46 should be greater than or
equal to Rk because of stability problem.

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ii) Direct Design
Using the FIs in Fig. 711, Req can be set to zero, which can be achieved
by changing the resistor values without disturbing the value of Leq.
Furthermore, the proposed circuits are compared with a previously
published one in Fig. 17 whose short-circuit matrix equation is given
by

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 7. Voltage-mode filter realizations

Using one of the FIs in Figs. 411, a single-input three-output multifunction filter
in Fig. 18 can be designed. Similarly, a three-input single-output-type filter
depicted in Fig. 19 can easily be realized.
Routine analysis of the filter in Fig. 18 ideally realizes the following filter transfer
functions with non-inverting unity gains:

In (29a), (29b) and (29c), Leq = CR1R2 and D(s) is found as

From above Eq., the parameters, the angular resonance frequency ( o ), quality
factor (Q) and bandwidth ( o /Q) of the proposed filter in Fig. 18 are computed
as

It is seen from (31a), (31b) and (31c) that the parameters Q and o /Q can easily
be tuned via Req while keeping o unchanged.
Straightforward analysis of the filter in Fig. 18 ideally gives the following output
voltage:

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With the selection of input voltages Vi (i = 1, 2, 3), second-order VM filter
responses with a non-inverting unity gain can be easily obtained as
(i) A low-pass response is realized by V1 = Vin and V2 = V3 = 0.
(ii) A band-pass response is realized by V2 = Vin and V1 = V3 = 0.
(iii) A high-pass response is realized by V3 = Vin and V1 = V2 = 0.
(iv) A notch response is realized by V1 = V3 = Vin and V2 = 0.
(v) An all-pass response is realized by V1 = -V2 = V3 = Vin.

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 8. Experimental test and simulation results

As an example, in order to demonstrate frequency-domain performance of the FI

in Fig. 4, it is simulated with SPICE program and its practical validity is verified
by performing experimental tests where the filter in Fig. 18 is used. For this
purpose, the AD844s with 75V are used instead of CCII+s and CFOA. Further,
R1 = R2 = Req = 1k and C = Ceq = 1nF are chosen in both simulation and
experimental tests. The ideal, simulated and experimental band-pass (or V3 of
FI), low-pass and notch responses are, respectively, exhibited in Figs. 2022 in
which the resonance frequency of fo = 159.15kHz and Q=1 are computed.

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 9. Conclusions and discussion

In this paper, new FI simulators, using different active elements, resistors and
grounded capacitors, are proposed. Further, some of the developed FIs have the
property of cancelling the parasitic impedance effects. In other words, they have
improved low-frequency performances. Also, some of the presented FIs need
matching condition/conditions for cancelling unwanted series resistors in
equivalent inductances. Another design technique uses one of the four negative
floating resistors treated in this work to cancel the series unwanted resistors in
equivalent inductances. Using a simulated FI, a resistor and a capacitor, universal
filter and multifunction filter design techniques are developed. In brief, the
developed techniques to improve the low-frequency performances of the FIs can
be applied to other inductor simulators as well as active circuits.

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 REFERENCES

Senani, Raj; Bhaskar, D. R.; Singh, A. K. (2015). Current Conveyors:

Variants, Applications and Hardware Implementations. Springer. ISBN 978-
3-319-08684-2.
Neeta Pandey, Praveen Kumar (2011). Differential Voltage Current Conveyor
Transconductance Amplifier based Wave Active Filter [ISSN: 1682 -3427 ]
P.V.S. Murali Krishna, Naveen Kumar, Avireni Srinivasulu, R.K.Lal.
Differential Difference Current Conveyor Based Cascadable Voltage Mode
First Order All Pass Filters
https://www.scribd.com/presentation/72542151/Differential-Voltage-
Current-Conveyor-Dvcc

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