8.

- Implementar un circuito para generar una seal PWM con la siguiente

caracterstica:

Resolucin: Resolucin: 10 bits.

Escalador: x1, x2, x4, x8, x16
El ciclo de trabajo (DC) se define con 110 bits de entrada.
Tiene habilitador.

library ieee;

use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity pwm_prog is
port ( clk : in std_logic;
DC : in std_logic_vector(10 downto 0);
hab : in std_logic;
esc : in std_logic_vector(2 downto 0);
z : out std_logic);
end pwm_prog;

architecture Behavioral of pwm_prog is

signal cuenta1 : std_logic_vector(2 downto 0);
signal cuenta2 : std_logic_vector(9 downto 0);
signal x : std_logic_vector(2 downto 0);
signal clk1 : std_logic;
signal clk2 : std_logic;
begin

process (clk)
begin
if clk = '1' and clk'event then cuenta1 <= cuenta1 + 1;
if cuenta1 <= x then cuenta1 <= (others => '0');
clk1 <= not clk1;
end if;
end if;
end process;

with esc select x <= "000" when "001",

"001" when "010",
"011" when "011",
"111" when others;

with esc select clk2 <= clk when "000",

clk1 when others;
process (clk2,hab)
begin
if hab = '0' then cuenta2 <= (others => '0');
z <= '0';
elsif clk2 = '1' and clk2'event then cuenta2 <= cuenta2 + 1;
if cuenta2 = DC then z <= '0';
elsif cuenta2 = 1023 then cuenta2 <= (others => '0');
z <= '1';
end if;
end if;
end process;

end Behavioral;