`

MOOKAMBIGAI COLLEGE OF ENGINEERING

EE1155 - CIRCUITS AND DEVICES LABORATORY

YEAR : I SEMESTER : II

LIST OF EXPERIMENTS

CYCLE I

1. Verification of KVL and KCL.

2. Verification of Thevenins and Nortons Theorem.

3. Verification of Superposition Theorem.

4. Verification of Maximum power transfer and reciprocity Theorems.

5. Frequency response of Series and Parallel resonance circuit

6. Characteristics of PN and Zener diode.

CYCLE II

7. Characteristics of CE configuration.

8. Characteristics of CB configuration.

9. Characteristics of UJT and SCR.

10. Characteristics of JFET and MOSFET.

11. Characteristics of Diac, Triac.

12. Characteristics of Photodiode and Phototransistor.

1
2
 CONTENTS

Si No. Name of the Experiment Page No.

1. Verification of KVL and KCL.

2. A Verification of Thevenins Theorem.

2. B Verification of Nortons Theorem.

3. Verification of Superposition Theorem.

4. A Verification of Maximum power transfer Theorem.

4.B Verification of Reciprocity theorem.

5. A Frequency response of Series resonance circuit

5.B Frequency response of Parallel resonance circuit.

6. A Characteristics of PN diode.

6.B Characteristics of Zener diode.

7. Characteristics of CE configuration.

8. Characteristics of CB configuration.

9. A Characteristics of UJT

9.B Characteristics of SCR.

10. Characteristics of JFET and MOSFET

11. Characteristics of Diac, Triac

12. Characteristics of Photodiode and Phototransistor

3
4
 LAB COMPLETION DETAILS

Page Marks Staff

Expt No. Date Name of the Experiment
No. Awarded Signature

1.

2.

3.

4. A

4.B

5. A

5.B

6. A

6.B

7.

8.

9. A

9.B

10.

11.

12.

5
CIRCUIT DIAGRAM

1.KVL

2.KCL

6
Expt.No.:1 VERIFICATION OF KVL and KCL

AIM

To verify the Kirchoffs Voltage law and Current law by conducting suitable experiment.

APPARATUS REQUIRED

S.NO NAME RANGE QUANTITY

1 Voltmeter (0-30)V 2

2. Ammeter (0-30)mA 2

3 RPS (0-15) V 1

4 Resistors 3.3K 2
(0-500) Pot 1
1 K 1

5 Connecting
wires

THEORY

Kirchoffs Voltage law

Kirchoffs voltage law states that In a closed loop Electric circuit the sum of
potential drop is equal to the sum of potential rises.
The algebraic sum of the voltages around a closed loop at any instant is zero. Viz.
vk 0
k

Along the current direction, the polarity of voltage from ve to +ve is considered as
potential rise and +ve to ve is known as potential drop. In the resistor, the current entering
terminal is marked as positive and current leaving terminal is marked as negative.
V = V1 + V2
= IR1 + IR2

7
 TABULATION

KVL

PRACTICAL THEORITICAL
INPUT V1 V2 V = V1+V2 V = V = V1+V2
SI.NO
VOLTAGE (VOLTS) (VOLTS) (VOLTS) (VOLTS)

KCL

SI.NO CURRENT CURRENT CURRENT THEORITICAL

THROUGH THROUGH THROUGH VALUES
RESISTANCER1 RESISTANCE RESISTANCE I1 = I2 + I3
(I1) (mA) R2 R3
(I2) (mA) I3 (mA)
1

8
Kirchoffs Current law
The algebraic sum of the currents flowing into a node at any
instant in time is zero:

ik 0
k

Thus,
i1 - i2 - i3 + i4 = 0

Kirchoffs current law states that the sum of current entering into a junction is equal
to the sum of current leaving away from it.

It follows from KCL that if the direction of an arrow is reversed, then the sign of the
current is reversed.

i1
i2

i3
i4
NODE

The junction may be interconnection of two or more branches.

PROCEDURE

1. Check the individual apparatus and components for their proper working.
2. Connect the circuit as shown in fig.
3. Switch on the power supply.
4. Vary the Supply voltage for three set of readings.
5. Tabulate the corresponding voltages from voltmeter to verify the Kirchoffs Voltage Law.
6. Tabulate the corresponding voltages from ammeter to verify the Kirchoffs Current Law.
7. Repeat the same procedure for the various values of Resistance.

9
FORMULA

I1 = I2 + I3
V = V1+V2 (or) V1 + V3
Here, V2 = V3

Where,
I1 - Current through Resistance R1 in Amps.
I2 - Current through Resistance R2 in Amps.
I3 - Current through Resistance R3 in Amps.
V - Supply Voltage in Volts.
V1 - Voltage across Resistance R1 in Volts.
V2 - Voltage across Resistance R2 in Volts.

10
RESULT
a) V1 = ----------- Voltage across R1 (potential drop)
V2 = ----------- Voltage across R2 (potential drop)

Since the resultant sum of two voltages (V1 +V2 ) is equal to the supply voltage V
and thus KVL is verified.

b) I1 = -------------
I2 = ------------
I3 = -------------

Since, the algebraic sum of current flowing towards a junction I1 is equal to the
algebraic sum of current I2 + I3 flowing away from the junction, the Kirchhoffs current law
is verified.

11
CIRCUIT DIAGRAM:
Figure 1

Figure 2

Figure 3

Figure 4

12
Expt.No.:2 VERIFICATION OF THEVENINS & NORTONS THEOREM

AIM:
To verify Thevenins& Nortons theorem using experimental set up.

EQUIPMENTS & COMPONENTS REQUIRED:

THEORY:

THEVENINS THEOREM:
Thevenins theorem states that any two terminal linear network having a number of
voltage, current sources and resistances can be replaced by a simple equivalent circuit
consisting of a single voltage source in series with a resistance, where the value of the
voltage source is equal to the open circuit voltage across the two terminals of the network,
and resistance is equal to the equivalent resistance measured between the terminals with all
the energy sources replaced by their internal resistances.

NORTONS THEOREM:
Nortons theorem states that any two terminal linear network having a number of
voltage, current sources and resistances can be replaced by an equivalent circuit consisting of
a single current source in parallel with a resistance. The value of the current source is the
short circuit current between the two terminals of the network, and resistance is the
equivalent resistance measured between the terminals of the network with all the energy
sources replaced by their internal resistances.

PROCEDURE:
THEVENINS THEOREM:

General Circuit:
1. Connect the components as shown in the circuit diagram 1.
2. Measure the voltage across the load using a voltmeter or multimeter after switching
on the power supply. Let it be VL.

To find Thevenins Voltage: (VTH)

1. Connect the components as shown in the circuit diagram 2.
2. Remove the load resistance and measure the open circuited voltage VTH across the
output terminal.

13
TABULAR COLUMN:

VS (Volts) VL (Volts) VTH (Volts) RTH (Ohms) VL (Volts)

NORTONS THEOREM

Figure 5

Figure 6

14
To find Thevenins Resistance: (RTH)
1. Connect the components as shown in the circuit diagram 3.
2. Remove the voltage source and replace it with an internal resistance asshown.
3. Using multimeter in resistance mode, measure the resistance across the output
terminal.

Thevenins Circuit:
1. Connect the power supply of VTH and resistance of RTH in series as shown in the
circuit diagram 4.
2. Connect the load resistance RL and measure VL across the load resistance using a
voltmeter after switching on the power supply.
3. Voltage measured with figure 1 should be equal to the voltage measured with this
circuit. (i.e., VL = VL)

NORTONS THEOREM:

General Circuit:
1. Connect the components as shown in the circuit diagram 5.
2. Measure the current through the load using an ammeter or multimeter after switching
on the power supply. Let it be IL.

To find Nortons Current: (IN)

1. Connect the components as shown in the circuit diagram 6.
2. Remove the load resistance and short circuit the output terminal. Then measure the
current through the short circuited terminals.

To find Nortons Resistance: (RN)

1. Connect the components as shown in the circuit diagram 7.
2. Remove the voltage source and replace it with an internal resistance as shown.
3. Using multimeter in resistance mode, measure the resistance across the output
terminal.

Nortons Circuit:
1. Draw the short circuit current source IN in parallel with RN as shown in the circuit
diagram 8.
2. Draw the equivalent circuit by replacing the current source IN in parallel with RN by
a voltage source such that Veq = IN . RN volts.
3. Then connect the circuit as shown in figure 9 and measure the load current IL
through the load resistor RL. This must be equal to IL.

Figure 7

15
 Figure 8

Figure 8

TABULAR COLUMN:

VS (Volts) IL (mA) IN (mA) RN (Ohms) VS=IN.RN IL (mA)

(Volts)

16
CALCULATION:

RESULT:
Thus Thevenins theorem & Nortons theorem are verified.

17
 CIRCUIT DIAGRAM

Figure (i)
DRB (0-10) K
2.2 K

I
Power Power
1 K supply
supply
V1=5V V2=5V

(0-10)mA-

Figure (ii) CIRCUIT DIAGRAM SECOND WITH VOLTAGE SOURCE

Figure (iii) CIRCUIT DIAGRAM FIRST WITH VOLTAGE

SOURCE

2.2K
DRB (0-10)K I2
Power
1K
supply
V1=5V

(0-10)mA

18
Expt.No.:3 VERIFICATION OF SUPERPOSITION THEOREM

AIM
To verify Superposition Theorem.
APPARATUS REQUIRED
S.NO APPARATUS NAME RANGE QUANTITY
1. Variable Power supply (0-5)V 2
2. Ammeter (0-10)mA 1
3. DRB (0-10) K 1
COMPONENTS REQUIRED
S.NO COMPONENTS NAME COMPONE QUANTITY
NT VALUE
1. Resistor 1 K 1
2.2K 1

THEOREM
In any linear, bilateral network consisting of more than two sources, the response in
any element is equal to the algebraic sum of the responses caused by individual sources
acting alone, while the other sources are nonoperative; that is while considering the effect of
individual sources, other ideal voltage sources and ideal current sources in the network are
replaced by short circuit and open circuit across their terminals.

PROCEDURE
1. Check the individual apparatus and components for their proper working.
2. Connect the circuit as shown in the fig (i).
3. Switch on the power supply.
4. By varying the DRB, the corresponding current change in the circuit is measured
from the deflections made by ammeter and is tabulated as I.
5. Calculate the theoretical value of current I.
6. The connections are made as shown in fig( ii).
7. By varying the DRB, the corresponding current change in the circuit is measured
from the deflections made by ammeter and is tabulated as I 2.
8. The connections are made as shown in fig( iii).
9. By varying the DRB, the corresponding current change in the circuit is measured
from the deflections made by ammeter and is tabulated as I 2.
10. Check, Is practical values of I = I 1+I 2

19
TABULAITON

S.NO DRB VALUE PRACTICAL VALUE THEORETICAL

(OHMS) VALUE OF
I (mA)
I (mA) I 1(mA) I 2 (mA) I=I1+ I 2 I=I1+ I 2
(mA) (mA)

20
 11. It could be seen that the experimental value of current I is equal to theoretical value
of current I.
12. Repeat the above procedure for four readings.
13. After completion of experiments switch off the power supply and disconnect the
components.

RESULT
I = ---------------- (Current value before applying Superposition Theorem)

I 1= ----------------- (Current value after replacing source 1)

I 2= ----------------- (Current value after replacing source 2)
Thus the superposition theorem is verified.

21
 Verification of Maximum Power Transformation

100 (0-100)m A
+ -
A

+
(0-30)V DRB

TABULATION

S.NO DRB VALUE PRACTICAL VALUE

(OHMS)

V (VOLTS)
I (mA) POWER (WATTS)
P=V*I

22
Expt.No.:4A VERIFICATION OF MAXIMUM POWER TRANSFER THEOREM

AIM
To verify the maximum power transfer theorem for a given circuit.

APPARATUS REQUIRED
APPARATUS NAME RANGE QUANTIT
S.NO Y
1. Variable Regulated power (0-10)V 1
Supply
2. Ammeter (0-20)mA 1
3. DRB (0-10) K 1
4. Voltmeter (0-10)mV 1
COMPONENTS REQUIRED
S.NO COMPONENTS NAME VALUES QUANTI
TY
2.2 K 1
1. Resistor 1K 1
860 1
470 1

THEOREM
In a circuit, maximum power is transferred from a source to a load, when the load
resistance is made equal to the equivalent resistance of the circuit.

FORMULA

Experimental value of power, P = V I ......Watts

Theoretical value of power, P = Vth2 / (RL + Rth)watts

PROCEDURE
1. Check the individual apparatus and components for their proper working.
2. Connect the circuit as shown in fig.
3. Switch on the power supply.
4. Vary the resistance of DRB and note the ammeter & voltmeter readings.
5. Calculate the Practical value of Power by the product of voltage and current.
6. Calculate the theoretical value of power using the given formula.
7. Compare the theoretical and experimental values power.

23
24
 8. If they are equal, then maximum power transfer theorem is verified.
9. After completion of experiments switch off the power supply and disconnect the
circuit.

RESULT

Theoretical value of power = -------------------

Practical value of Power = -------------------
Since the theoretical and experimental values power is equal, the maximum power transfer
theorem is verified.

25
 CIRCUIT DIAGRAM BEFORE
Figure (i) INTERCHANGING

R2=2.2 K

Variable
power R3=470
supply
R1=1 K ((0-10)mA
(V1) I1
(0-30)V

CIRCUIT DIAGRAM AFTER

Figure(ii) INTERCHANGING
RR
R2=2.2 K

I2
R3=470
Variable
(0-10)mA Power
R1=1 K
supply (V2)
(0-30)V

26
Expt.No.:4B VERIFICATION OF RECIPROCITY THEOREM

AIM
To verify reciprocity theorem.

APPARATUS REQUIRED

S.NO APPARATOUS NAME RANGE QUANTITY

1 Variable Regulated Power (0-30)V 1
supply
2 Ammeter (0-10)mA 1

COMPONENTS REQUIRED
S.NO COMPONENTS NAME COMPONE QUANTITY
NT VALUE
1. Resistor 2.2 K 1
1 K 1
470K 1

THEOREM
In any linear bilateral network consisting of resistors, inductors, capacitors, and
transformers including coupled circuits, the ratio of response in any element to the input is
constant even when the position of input and output are interchanged.

PROCEDURE
1. Check the individual apparatus and components for their proper working.
2. Connect the circuit as shown in the fig (i).
3. Switch on the power supply.
4. For different values of V1, note the corresponding values of I1 in the ammeter.
5. Calculate the ratio V1/ I1 and tabulate as R1.
6. Now change the circuit as shown in fig (ii).
7. For different values of V2, note the corresponding values of I2 in the ammeter.
8. Calculate the ratio V2/ I2 and tabulate as R2.
9. For validity of reciprocity Theorem, check (V1/ I1) = (V2/ I2).
10. After completion of experiments switch off the power supply and disconnect the
components.

27
 TABULATION
Before interchanging

S.NO V1 I1 R1=V1/I1
(Volts) (Volts (ohms)

1
2
3

After interchanging

S.NO V2 I2 R2=V2/I2
(Volts) (Volts (ohms)

1
2
3

28
RESULT

V1 = --------------
I1 = ------------- -
V2 = --------------
I2 = --------------

Since V1/ I1 = V2/ I2, the Reciprocity Theorem is verified.

29
 CIRCUIT DIAGRAM

SERIES RESONANCE CIRCUIT DIAGRAM

1H 6.3nF

1 6.3nF
H

Signal 3.3 K
3.3 CRO
Generator 1
H

MODEL GRAPH

Current in mA

Imax

0.707 Imax

Frequency
fF1
1 fr f2

30
Expt.No.:5A FREQUENCY RESPONSE OF SERIES RESONANCE CIRCUIT

AIM
To study the frequency response of series resonance circuit and to calculate the Q
factor and Bandwidth.

APPARATUS REQUIRED

S.NO APPARATUS QUANTITY

REQUIRED
1. CRO 1
2. Signal generator 1

COMPONENT REQUIRED:

COMPONE
S.NO NT RANGE QUANTITY
NAME
1. Resistor 3.3 K 1
2 Inductor 1H 1
3. Capacitor 6.3 nF 1

FORMULA
Bandwidth = (f2 - f1 )Hz
1
Resonance frequency, fr Hz
2 LC
THEORY Q factor = fr / (f2 - f1 )

RESONANCE

An AC circuit is said to be resonance, if it behaves like a purely resistive circuit. The

total current drawn is in phase with the applied voltage and power factor will be unity. In a
RLC series circuit, the complex impedance is equal to sum of resistance and the difference
between inductive reactance XL and capacitive reactance XC. Both reactance have equal
drop across it and cancels each other. Series resonance can be attained by tuning the

31
 TABULATION

SERIAL FREQUENCY IN VOLTAGE CURRENT

NO HERTZ ACROSS R THROUGH
(VOLTS) THE CIRCUIT
I = V/R mA

32
frequency of the supply and by changing the value of inductance and capacitance. Resonance
will occur when, XL = XC .

DESIGN At resonance, XL = XC
2frL =1/2frC , C = [1/ 2( L ) fr ]2
1
fr
2 LC
PROCEDURE

1. Check the individual apparatus and components for their proper working.
2. The circuit is connected as shown in fig.
3. Switch on the signal generator.
4. By varying the input frequencies, note the change in voltage using CRO.
5. Draw the plot between the current and the respective frequencies.
6. The peak point of the graph indicates the resonant condition of the circuit and the
respective frequency is known as the resonant frequency.
7. Find the Lower and Upper cutoff frequencies from the graph and find the bandwidth and
Q factor using the given formula.
8. After the completion of experiment, switch off the signal generator and disconnect the
circuit. .

33
34
RESULT

Thus the frequency response of series resonance circuit is studied and the various
parameters are obtained as follows:

1) Resonant Frequency =
2) Lower cut off frequency =
3) Upper cut off frequency =
4) Band width =
5) Q factor =

35
 PARALLEL RESONANCE CIRCUIT DIAGRAM

25.3mH

0.01F CRO
Signal 10
Generator

MODEL GRAPH

Current in mA

0.707 Imin

Imin

f1 fr f2 Frequency

36
Expt.No.:5B FREQUENCY RESPONSE OF PARALLEL RESONANCE CIRCUIT

AIM
To study the frequency response of parallel resonance circuit and to calculate the Q
factor and Bandwidth.
APPARATUS REQUIRED

S.NO APPARATUS QUANTITY

REQUIRED
1. CRO 1
2. Signal generator 1

COMPONENTS REQUIRED

COMPONE
S.NO NT RANGE QUANTITY
NAME
1. Resistor 10 1
2 Inductor 25.3mH 1
3. Capacitor 0.01F 1

FORMULA Bandwidth = (f2 - f1)Hz

Resonance frequency fr = 1/ 2 (LC)Hz
Q factor = fr /(f2 - f1)
THEORY
RESONANCE
An AC circuit is said to be resonance, if it behaves like a purely resistive
circuit. The total current drawn is in phase with the applied voltage and power factor will be
unity. In a RLC series circuit, the complex impedance is equal to sum of resistance and the
difference between inductive reactance XL and capacitive reactance XC. Both reactance have
equal drop across it and cancels each other. Series resonance can be attained by tuning the
frequency of the supply and by changing the value of inductance and capacitance. Resonance
will occur when, XL = XC.

37
DESIGN:
At resonance, XL = XC
2 frL = 1/2 frC , C = [ 1/ 2 Lfr ]2

1
fr
2 LC

TABULATION

SERIAL NO FREQUENCY IN VOLTAGE CURRENT

HERTZ ACROSS R THROUGH
(VOLTS) THE CIRCUIT
I = V/ R mA

38
PROCEDURE

1. Check the individual apparatus and components for their proper working.
2. The circuit is connected as shown in fig.
3. Switch on the signal generator.
4. By varying the input frequencies, note the change in voltage using CRO.
5. Draw the plot between the current and the respective frequencies.
6. The minimum point of the graph indicates the resonant condition of the circuit and the
respective frequency is known as the resonant frequency.
7. Find the Lower and Upper cutoff frequencies from the graph and find the bandwidth and
Q factor using the given formula.
8. After the completion of experiment, switch off the signal generator and disconnect the
circuit. .

RESULT
Thus the frequency response of parallel resonance circuit is studied and the various
parameters obtained are:
1) Resonant Frequency =
2) Lower cut off frequency =
3) Upper cut off frequency =
4) Band width =
5) Q factor =

39
CIRCUIT DIAGRAM

FORWARD BIAS

PN Junction Diode Forward Bias

470 (0-30)mA
+ -
A

+ + A
(0-30)V (0-1)V V 1N4001

- - K

REVERSE BIAS

PN Junction Diode Reverse Bias

470 (0-500) A
+ -
A

+ + K
(0-30)V (0-15)V V 1N4001

- - A

40
Expt.No.:6A CHARACTERISTICS OF PN JUNCTION DIODE

AIM

To plot the VI Characteristics of the given PN Junction Diode under

forward bias ,Reverse bias & to find the forward resistance and reverse resistance of the
Diode.

MATERIALS REQUIRED

a) DISCRETE COMPONENTS

S.NO COMPONENTS RANGE QUANTITY

NAME
1 Resistor 100 1
2 PN Junction Diode BY126 1

b) APPARATUS

S.NO APPARATUS NAME RANGE QUANTITY

1 Regulated Variable DC (015)V 1
power supply
2 Ammeter (0 100) mA 1
(0 - 1

3 Voltmeter (03)V 1
4 Bread board --- 1
5 Connecting wires ---- --

41
MODEL GRAPH

TABULATION (Forward bias)

S.NO VF(Volts) IF(mA)

42
FORMULAE USED
Forward Resistance RF = VF/ IF
Reverse Resistance RR = VR/ IR

THEORY
If donor impurities are introduced into one side and acceptors into the other
side of a single crystal of a semiconductor, say germanium, a p-n junction is formed. The
donor ion is indicated by a plus sign because, after this impurity atom donates an electron, it
becomes a positive ion. The acceptor ion is indicated by a minus sign because, after this
atom accepts an electron, it becomes a negative ion. Initially, there are nominally only p-
type carriers to the left of the junction and only n-type carriers to the right. Because there is a
density gradient across the junction, holes will diffuse to the right across the junction, and
electrons to the left.

Forward Bias

Forward-bias occurs when the P-type block is connected to the positive terminal of a battery
and the N-type block is connected to the negative terminal, as shown below.

A silicon p-n junction in Forward-bias.

With this set-up, the 'holes' in the P-type region and the electrons in the N-type region are
pushed towardsjunction. This reduces the width of the depletion zone.The positive charge
applied to the P-type block repels the holes, while the negative charge applied to the N-type
block repels the electrons. As electrons and holes are pushed towards the junction, the
distance between them decreases. This lowers the barrier in potential. With increasing bias
voltage, eventually the nonconducting depletion zone becomes so thin that the charge carriers
can tunnel across the barrier, and the electrical resistance falls to a low value. The electrons
which pass the junction barrier enter the P-type region (moving leftwards from one hole to
the next, with reference to the above diagram).This makes an electric current possible. An
electron starts flowing around from the negative terminal to the positive terminal of the
battery.

Reverse-bias

Connecting the P-type region to the negative terminal of the battery and the N-type region to
the positive terminal, produces the reverse-bias effect. The connections are illustrated in the
following diagram:

43
TABULATION (Reverse bias)

S.NO VR(Volts) IR(A)

44
A silicon p-n junction in Reverse-bias. Because the P-type material is now connected to the
negative terminal of the power supply, the 'holes' in the P-type material are pulled away from
the junction, causing the width of the depletion zone to increase. Similarly, because the N-
type region is connected to the positive terminal, the electrons will also be pulled away from
the junction. Therefore the depletion region widens, and does so increasingly with increasing
reverse-bias voltage. This increases the voltage barrier causing a high resistance to the flow
of charge carriers thus allowing minimal electric current to cross the p-n junction.The
strength of the depletion zone electric field increases as the reverse-bias voltage increases.
Once the electric field intensity increases beyond a critical level, the p-n junction depletion
zone breaks-down and current begins to flow, usually by either the Zener or avalanche
breakdown processes. Both of these breakdown processes are non-destructive and are
reversible, so long as the amount of current flowing does not reach levels that cause the
semiconductor material to overheat and cause thermal damage.

PROCEDURE
1. Check the equipments and components to ensure their proper working condition.
2. Connect the circuit as shown in the circuit diagram using breadboard with very short
wires.
3. Vary the input voltage in suitable steps and observe the voltmeter and ammeter readings.
4. Plot the graph by taking the voltage in x-axis and current in y-axis.
5. Calculate the forward resistance and reverse Saturation current using the given formulae.
6. After completion of experiments switch off the power supply and disconnect the
components.

RESULT
1. The VI characteristics of PN diode is drawn.
2. Forward Resistance of PN diode R F = ------------
3. Reverse Resistance of PN diode RR =--------------

45
 CIRCUIT DIAGRAM
Forward bias

Zener Diode Forward Bias

470 (0-25)mA
+ -
A

+ + A
(0-30)V Fz5.1
(0-1)V V
- - K

Reverse Bias

Zener Diode Reverse Bias

470 (0-25)m A
+ -
A

+ + K
(0-30)V (0-10)V V Fz5.1

- - A

46
Expt.No.:6B CHARACTERISTICS OF ZENER DIODE

AIM
To plot the VI Characteristics of the given Zener Diode under forward bias and Reverse bias.

MATERIALS REQUIRED

A) DISCRETE COMPONENTS

S.NO COMPONENTS RANGE QUANTITY

NAME
1 Resistor 100,1K 1
2 Zener Diode FZ6.1 1
b) Apparatus
S.NO APPARATUS NAME RANGE QUANTITY
1 Regulated Variable DC (015)V 1
power supply
2 Ammeter (0 100) mA 1

3 Voltmeter (025)V 1
4 Bread board --- 1
5 Connecting wires ---- --

THEORY
The zener diode uses a p-n junction in reverse bias to make use of the zener
effect, which is a breakdown phenomenon which holds the voltage close to a constant value
called the zener voltage. It is useful in zener regulators to provide a more constant voltage,
for improvement of regulated power supplies, and for limiter applications. The constant
reverse voltage of the zener diode makes it a valuable component for the regulation of the
output voltage against both variations in the input voltage from an unregulated power supply
or variations in the load resistance. The current through the zener will change to keep the
voltage at within the limits of the threshold of zener action and the maximum power it can
dissipate. Its Applications are Zener Limiters Zener Regulators Role in Power Supplies
Zener Controlled Comparators.

47
 MODEL GRAPH

TABULATION
Forward bias Reverse bias

S.NO VF(Volts) IF(mA) S.NO VR(Volts) IR(mA)

48
PROCEDURE
1. Check the equipments and components to ensure their proper working condition.
2. Connect the circuit as shown in the circuit diagram using breadboard with short wires.
3. Vary the input voltage in suitable steps and observe the voltmeter and ammeter
readings.
4. Plot the graph by taking the voltage in x-axis and current in y-axis.
5. After completion of experiments switch off the power supply and disconnect the
components

RESULT
Thus the VI characteristics of Zener diode is drawn .

49
 CIRCUIT DIAGRAM

SYMBOL PIN
CONFIGURATION

50
Expt.No.:7 CHARACTERISTICS OF CE CONFIGURATION

AIM
To determine the input and output characteristics of a given BJT in CE
Configuration and to determine its hybrid parameters.

MATERIALS REQUIRED

a) DISCRETE COMPONENTS

S.No COMPONENTS RANGE QUANTITY

NAME

1 Resistor 10k 1
2 Transistor BC107 1
b) APPARATUS
S.No APPARATUS NAME RANGE QUANTITY
1 Variable DC power (010)V 1
supply
2 Ammeter (0 - 10mA) 1
(0-500)A 1

3 Voltmeter (05)V 1
(0 10)V 1
4 Bread board ------ 1
5 Connecting Wires ------ --

FORMULAE USED VBE

(i). Input Impedance (hie) = VCE = constant
IB
IC
(ii). Forward Current Gain (hfe) = VCE = constant
IB

VBE
(iii). Reverse Voltage Gain (hre) = IB = constant
VCE
IC
(iv). Output Conductance (hoe) = IB = constant
VCE
Where,
VBE = Change in base to emitter voltage.

51
 INPUT CHARACTERISTICS OUTPUT
CHARACTERISTICS

TABULATION

Input characteristics

sss
S.No VCE = V VCE = V VCE = V

VBE (V) IB (A) VBE (V) IB (A) VBE (V) IB(A)

IB = Change in base current.

IC = Change in collector current.
VCE = Change in collector to emitter voltage.

52
THEORY

This is also called as grounded emitter configuration. Here, base is the input terminal,
collector is the output terminal and emitter is the common terminal. In this configuration,
IB, VCE are taken as independent variables whereas VBE, IC are taken as dependent
variables. The input characteristics are drawn between VBE and IB for constant values of
VCE. The output characteristics are drawn between IC, VCE for constant values of IB. The
output characteristics have three regions, namely, saturation region, cutoff region and
active region.

Active region: The emitter-base junction is forward biased and the base-collector
junction is reverse biased. Most bipolar transistors are designed to afford the greatest
common-emitter current gain, f in forward-active mode.

Saturation region: With both junctions forward-biased, a BJT is in saturation mode and
facilitates high current conduction from the emitter to the collector. This mode
corresponds to a logical "on", or a closed switch.

Cutoff: In cutoff, biasing conditions opposite of saturation (both junctions reverse biased)
are present. There is very little current flow, which corresponds to a logical "off", or an
open switch.

PROCEDURE
1. The circuit connections are made as shown in circuit diagram.
2. To obtain the input characteristics, keep the value of voltage(VCE)
as constant.
3. Vary the value of VBE. Observe the corresponding
Ammeter reading for IB. tabulates the values of VBE &IB.
4. Draw the graph by taking the voltage in X-axis and the current in Y-axis for
Constant values of VCE.
5. Repeat step 3 & 4 for various constant values of VCE.
6. To obtain the output characteristics, keep the value of current(IB) as constant.
7. Vary VCE &Observe the corresponding Ammeter(IC) and voltmeter(VCE) readings.
Tabulate the values.
8. Draw the graph by taking current in X-axis and voltage in Y-axis for constant
values of IB.
9. Repeat step 6 & 7 for various constant values IB.
10. After completion of experiments switch off the power supply and disconnect the
components

53
 Output characteristics

S.No IB = A IB = A IB = A

VCE (V) IC (mA) VCE (V) IC ( m A ) VCE (V) IC (mA)

54
RESULT

The input and output characteristics of BJT under CE configuration are obtained.
h-parameters :
(i). Input Impedance (hie) =
(ii). Forward Current Gain (hfe) =
(iii). Reverse Current Gain (hre) =
(iv). Output Conductance (hoe) =

55
 CIRCUIT DIAGRAM

PIN DIAGRAM MODEL GRAPH

Input characteristics

Output characteristics

56
Expt.No.:8 CHARACTERISTICS OF CB CONFIGURATION

AIM
To illustrate the input and output characteristics of a given BJT in CB
Configuration and to determine its hybrid parameters.
MATERIALS REQUIRED
A) DISCRETE COMPONENTS
S.No COMPONENTS RANGE QUANTITY
NAME
1 Resistor 100 1
2 Transistor BC107 1
B) APPARATUS
S.No APPARATUS NAME RANGE QUANTITY
1 Variable DC power (010)V 1
supply
2 Ammeter (0 - 30mA) 2

3 Voltmeter (05)V 1
(0 25)V 1
4 Bread board ------ 1

5 Connecting Wires ------ --

FORMULAE USED
VEB
(i). Input Impedance (hib) = VCB = constant
IE
IC
(ii). Forward Current Gain (hfb) = VCB= constant
IE

VEB
(iii). Reverse Voltage Gain (hrb) = IE = constant
VCB
IC
(iv). Output Conductance (hob) = IE = constant
VCB
Where,
VEB = Change in emitter to base voltage.
IE = Change in emitter current. IC = Change in collector current.
VCB = Change in collector to base voltage.

57
 TABULATION

Input characteristics

sss
S.No VCB = V VCB = V VCB = V

VEB (V) IE (mA) VEB (V) IE (mA) VEB (V) IE(mA)

Output characteristics

S.N0 IE = mA IE = mA IE = mA

VCB (V) IC (mA) VCB (V) IC ( m A ) VCB (V) IC (mA)

58
THEORY
This is also called as grounded base configuration. In this configuration, emitter is
the input terminal, collector is the output terminal and base is the common terminal. In this
configuration early effect or base width modulation takes place.
As the collector voltage VCC is made to increase the reverse bias, the space charge
width between collector and base tends to increase, with the result that the effective width of
the base decrease. This dependency of base width on collector to emitter voltage is known as
early effect.
For extremely large voltages, the effective base width may be reduced to zero,
causing voltage breakdown in the transistor. This phenomenon is called punch through. In
this configuration, the input current IE, and output voltage VCB are taken as independent
variables, whereas the input voltage VEB and output current IC are dependent variables.
The input characteristics are drawn between VEB and IE for constant values of
VCB.The output characteristics are drawn between IC, VCB for constant values of IE . The
output charateristics have three regions, namely saturation region, cutoff region and active
region.
Active region The emitter-base junction is forward biased and the base-collector
junction is reverse biased. Most bipolar transistors are designed to afford the greatest
common-emitter current gain, f in forward active mode.
Saturation region With both junctions forward-biased, a BJT is in saturation mode
and facilitates high current conduction from the emitter to the collector. This mode
corresponds to a logical on or a closed switch.
Cutoff In cutoff, biasing conditions opposite of saturation (both junctions reverse
biased) are present. There is very little current slow, which corresponds to a logical off , or
an open switch.

PROCEDURE
1. The circuit connections are made as shown in circuit diagram.
2. To obtain the input characteristics, keep the value of voltage(VCB) as kept constant.
3. Vary the value of VEB. Observe the corresponding ammeter reading for IE. tabulates
the values of VEB & IE.
4. Draw the graph by taking the voltage in X-axis and the current in Y-axis for Constant
values of VCB.
5. Repeat step 3 & 4 for various constant values of VCE.
6. To obtain the output characteristics, keep the value of current (IE) as constant.
7. Vary VCB & Observe the corresponding ammeter (IC) and voltmeter (VCB) readings.
Tabulate the values.
8. Draw the graph by taking current in X-axis and voltage in Y-axis for constant values
of IE.
9. Repeat step 6 & 7 for various constant values IE.

59
60
Result
The input and output characteristics of BJT under CB configuration are obtained.
h-parameters are
(i). Input Impedance (hib) =
(ii). Forward Current Gain (hfb) =
(iii). Reverse Current Gain (hrb) =
(iv). Output Conductance (hob) =

61
 CIRCUIT DIAGRAM

Symbol Pin Diagram

B2

B1

MODEL GRAPH

Vp- Peak voltage

Ip - Peak current
Vv - Valley voltage
Iv - Valley curreny

62
Expt.No.:9A CHARACTERISTICS OF UJT

AIM
To determine the emitter characteristics curve of given UJT .
MATERIALS REQUIRED

a) DISCRETE COMPONENTS
S.No COMPONENTS RANGE QUANTITY
NAME

1 Resistor 1k 1
2 UJT 2N2646 1

b) APPARATUS

S.No APPARATUS NAME RANGE QUANTITY

1 Variable DC power (05)V 1
supply
2 Ammeter (0 - 20mA) 1
3 Voltmeter (05)V 1

4 Bread board ------ 1

5 Connecting wires ------ --

THEORY

UJT is a three terminal semiconductor-switching device. As it has only one PN

junction and three leads( emitter, base1, base2), it is commonly called as Uni Junction
Transistor. It consists of two-doped region with three leads. The heavily doped P region have
many holes is called the emitter and lightly doped n region is called the base1 and base2.The
emitter leg is drawn at an angle to the vertical and the arrow indicated the direction of
conventional current.

Due to the existing pn junction, there will be a voltage drop. If we apply a voltage to
the emitter, the device will not turn on until the input voltage is less than the drop across the
diode plus the drop at the variable resistance R1.When the device is turned on holes moves
from emitter to base resulting in a current flow. Due to this sudden increase in charge
concentration in base1 region conductivity increases. This causes a drop at base1.This
region in the graph is known as negative resistance region. If we further increase the emitter
voltage the device undergoes saturation. So a UJT has 3 operating regions: cut off region,
negative resistance region & saturation region

63
 TABULATION

EMITTER CHARACTERISTICs

VB1B2 = --------------( volts) VB1B2 = --------------( volts)

S.NO

VB1E in volts IE in mA VB1E in volts IE in mA

64
 When a voltage VBB is applied between the bases, the voltage drop V1 across lower base
(Base1) resistance is given by RB1, RB1/(R1+R2)=& V1 = VBB Where is called the
intrinsic stand off ratio . It is defined as the ratio of the variable resistance to the total
resistance. The range of varies from 0.5 to 0.8. This voltage V1 is called intrinsic stand
off voltage and it reverses biases the emitter. For emitter current to flow,

the emitter voltage should be more than V1 atleast 0.7V. The emitter voltage at which it
starts conducting called the peak point voltage Vp.

BASIC STRUCTURE OF UJT Base2 (B2)

Emitter (E) P
N

Base1 (B1)

When the emitter current flows, holes from emitter are injected into the lower base
resistance at very low value. This increases the emitter current IE and hence voltage VE
decreases. Thus the latch between emitter and base1 gets closed. This region is called
negative resistance region. A further increase in emitter current increases VE. The current at
VE minimum is called holding current IH. To open the latch IE should be decreased to a value
less than the holding current. A unique characteristics of UJT is when it is triggered, the
emitter current increases regeneratively until it is limited by emitter power supply. Due to
negative resistance property UJT can be employed in a variety of applications are relaxation
oscillator, saw tooth generator, pulse generator, switching timing and phase control circuits.

PROCEDURE
1. Check the equipment and components to ensure their proper working condition.
2. Connect the circuit as shown in the circuit diagram-using breadboard with wires.
3. To obtain the Emitter characteristic,
(i) Keep the voltage VB1B2 as constant.
(ii) Increase the input voltage VB1E in a number of steps and note the
corresponding input current IE.
(iii) Reduce the input voltage VB1E to zero position and increase the output voltage
VB1B2 a little higher than the previous value.
(iv) Repeat the step ii & iii for various values of VB1B2.
(v) Draw the input characteristic curve by taking VB1E in Y-axis and IE in X-axis
for various
values of VB1B2.
4. After completion of the experiment switch off the power supply and disconnect the
circuit.

65
66
RESULT:
Thus the Emitter characteristics of UJT were drawn.

67
 CIRCUIT DIAGRAM

SYMBOL PIN CONFIGURATION

MODEL GRAPH

SCR CHARACTERISTICS

68
Expt.No.:9B CHARACTERISTICS OF SCR

AIM
To determine the firing characteristics of Silicon Controlled Rectifier.

MATERIALS REQUIRED
a)DISCRETE COMPONENTS
S.NO COMPONENTS NAME RANGE QUANTITY
1. SCR 2P4M 1
2. Resistors 470 1
330 1
b) APPARATUS
S.NO APPARATUS NAME RANGE QUANTITY
1. power supply (0-30)V 2
2. Voltmeter (0 30) V 1

3. Ammeter (0-100mA) 2
4. Connecting Wires ---------- ----------

THEORY

It is a four layer PNPN Device. Basically it is a rectifier with a control

element. It consists of three diodes, connected back to back. It is widely used as
switching device in power control application. It has four layers, the layers being
alternatively of P- Type and N- Type Silicon. The three junctions are marked as J 1 , J2
& J3 where as the three terminals are Anode (A) , cathode (C) and gate (G) which is
connected to the inner P- type layer. The function of gate is to control the firing of
SCR.

OPERATION

With the polarity of power supply shown as in fig , the junction J1 & J3 become
forward biased whereas J2 is reverse biased. Hence no current can flow through SCR.
Current flow is blocked due to reverse biased junction J2 .However when anode voltage
is increased beyond certain critical value called forward break over voltage VBO , J2
breaks down and SCR switches to a highly conducting state. Under this condition SCR
offers very little forward resistance ( 0.01 - 1.0 ), so that the voltage across it drops to
a low value ( about 1V ) and current is limited by the power supply and load resistance.
Now the polarity of supply voltage has been reversed. Due to this the junctions J 1 & J3
become reverse biased whereas J2 is forward biased. Again there is no current flows
through the SCR.

69
 TABULATION

IG =_____ mA

VAK (V) IA (mA)

70
PROCEDURE
1.Connections are made as per the circuit diagram.
2.Keep IG=0mA.
3.vary the power supply and note down anode to cathode voltage and anode current.
4.Increase the gate current until SCR get triggered & keep IG constant.
5. Now vary the power supply and note down anode to cathode voltage and anode
current.

RESULT:

Thus the firing characteristics of a Silicon Controlled Rectifier has been

determined.

(i) Holding Current (IH) =

(ii) Break over voltage(VBO)

(or)
Forward break down voltage =

71
CIRCUIT DIAGRAM

72
Expt.No.:10 CHARACTERISTICS OF JFET

AIM
To determine and plot the Drain &Transfer characteristics of the given JFET
(Junction Field Effect Transistor), and to determine its pinch off voltage VP and IDSS

MATERIALS REQUIRED
a)DISCRETE COMPONENTS

S.NO COMPONENTS RANGE QUANTITY

NAME
1 JFET BFW10 1
2 Resistor 1K 1

b) APPARATUS

S.NO APPARATUS NAME RANGE QUANTITY

1 Regulated Variable DC (0-10)V 1
power supply
2 Ammeter (0 - 15mA) 1
3 Voltmeter (03)V 1

(0 25)V 1
4 Bread board ------ 1
5 Connecting Wires ------ --
FORMULAE USED
1. Drain resistance, rd = VDS / ID , VGS hold constant
2. Transfer conductance, gm = ID / VGS, VDS hold constant
3. Amplification factor = rd * gm

THEORY

FET (Field Effect Transistor)

FET is a semiconductor-switching device in which the flow of electron in
the conducting region is controlled by an external electric field. As current
conduction is only by majority carriers, FET is said to be unipolar device.
It has three terminals namely source (S), Drain (D) and Gate (G).
Source is connected to negative pole of the battery. Drain is connected to positive
pole of the battery. PN junction layer is formed and their combined layer is called
gate G.

73
 TABULATION
DRAIN CHARACTERISTICS

VGS =--------(volts) VGS =--------(volts)

VDS(V) ID(mA) VDS(V) ID(mA)

TRANSFER CHARACTERISTICS

VDS = ------(Volts) VDS = ------(Volts)

VGS(V) ID(mA) VGS(V) ID(mA)

74
OPERATION
When VGS =0V and VDS =0V i.e. the voltage is applied between drain and source &
gate and source. The thickness of depletion region around PN junction is uniform. When V DS
=0V and VGS is decreased from zero, the thickness of the depletion region in the channel
increases until the two depletion regions make contact with each other and channel is said to
cut off. The value of VGS, which is required to cut off the
channel, is called cut off voltage (Vc).When VGS = 0 and VDS is increased from zero, the cross
sectional area of the channel will be reduced and it becomes minimum. At this voltage, the
channel is said to be pinched off and the drain voltage is called pinch off voltage. When V GS
is negative and VDS is increased the reverse voltage across the junction is further increased
and hence the current is similar to that of current When
VGS = 0. Hence JFET is suitable to use as a voltage amplifier, similar to transistor amplifier.
Thus a drain current ID is controlled by EF extends into the channel due to reverse biasing
voltage applied to the gate.

PROCEDURE
Check the equipment and components to ensure their proper working condition.
Connect the circuit as shown in the circuit diagram-using breadboard with very short
wires.
1. To obtain the Drain characteristic,
(i) Keep voltage VGS as constant.
(ii) Increase the voltage VDS in a number of steps and note the corresponding current
ID.
(iii) Repeat step ii for various values of VGS.
(iv) Draw the drain characteristic curve by taking VDS in X-axis and ID in Y-axis for
various values of VGS.
2. To obtain the Transfer characteristics,
(i) Keep the voltage VDS as constant.
(ii) Increase the voltage VGS in a number of steps and note the corresponding
output current ID.
(iii) Repeat step ii for various values of VDS.
(iv) Draw the output characteristic curve by taking VGS in X-axis and ID in Y-axis
for variousvalues of VDS.
3. After completion of the experiment switch off the power supply and disconnect the
circuit.

RESULT
Thus the Drain and transfer characteristics of JFET were drawn and the important
parameters of the JFET were given below.
1. Drain resistance rd = --------------------
2. Trans conductance gm = ---------------------
3. Amplification factor = --------------------
4. Pinch off voltage VP = -----------------------------

5. Drain to Source Saturation Current IDSS = -------------------------

75
DIAC

S.NO Forward Voltage Forward Current

S.NO Reverse Voltage Reverse Current

76
Expt.No.:11 CHARACTERISTICS OF DIAC AND TRIAC

AIM
To study construction and working principle & applications of DIAC, TRIAC .

The DIAC

The DIAC diodes are unidirectional devices; that is, they conduct current in both the
direction. If bidirectional (AC) operation is desired, two Shockley diodes may be joined in
parallel facing different directions to form a new kind of thyristor, the DIAC

EQUIVALENT CIRCUIT SYMBOL

DIAC WITH AC CIRCUIT: A DIAC operated with a DC voltage across it behaves

exactly the same as a Shockley diode. With AC, the behavior is different from the ordinary

diode. Because alternating current repeatedly reverses direction, DIACs will not stay latched
longer than one-half cycle. If a DIAC becomes latched, it will continue to conduct current
only as long as there is voltage available to push enough current in that direction. When the
AC polarity reverses, as it must twice per cycle, the DIAC will drop out due to insufficient
current, necessitating another breakover before it conducts again. The result is a current
waveform that looks like this.
DIACs are almost never used alone, but in conjunction with other thyristor devices.
The TRIAC

A TRIAC acts much like two SCRs connected back-to-back for bidirectional (AC)
operation. TRIAC controls low-power circuits than complex, high-power circuits. In
large power control circuits, multiple SCRs tend to be favored. When used to control AC

77
TRIAC

S.NO VAK (V) IA(mA)

78
power to a load, TRIACs are often accompanied by DIACs connected in series with their
gate terminals. The DIAC helps the TRIAC fire more symmetrically .Main terminals 1
and 2 on a TRIAC are not interchangeable. To successfully trigger a TRIAC, gate current
must come from the main terminal 2 (MT2) side of the circuit.

Equivalent circuit and Symbol of TRIAC are shown in below.

EQUIVALENT CIRCUIT SYMBOL

APPLICATION

Individual SCRs are more flexible to use in advanced control systems, they are more
commonly seen in circuits like motor drives, while TRIACs are usually seen in simple, low-
power applications like household dimmer switches. A simple lamp dimmer circuit is shown
here, complete with the phase-shifting resistor-capacitor network necessary for after-peak
firing.

RESULT

Thus the construction, working principle and applications of DIAC & TRIAC are
studied.

79
 CIRCUIT DIAGRAM

TABULATION

DARK BRIGHT

S.NO VD(Volts) ID(A) VD(Volts) ID(A)

80
Expt.No.:12 CHARACTERISTICS OF PHOTODIODE AND PHOTO
TRANSISTOR

AIM
To determine the characteristics of photo Diode and photo transistor under Reverse
bias.

MATERIALS REQUIRED
A) DISCRETE COMPONENTS
S.NO COMPONENTS NAME RANGE QUANTIT
Y
1. Resistors 1K 1

2. Diode QT971 1
3. Lamp or Bulb 1
B) APPARATUS
S.NO APPARATUS NAME RANGE QUANTITY
1. power supply (0-30)V 1
2. Voltmeter (030 )V 1

3. Ammeter (0500) A 1
4. Connecting Wires ---------- ----------

THEORY
PHOTO DIODE
A photodiode is a type of photo detector capable of converting light into either
current or voltage, depending upon the mode of operation. Photodiodes are similar to regular
semiconductor diodes except that they may be either exposed (to detect vacuum UV or X-
rays) or packaged with a window or optical fiber connection to allow light to reach the
sensitive part of the device. Many diodes designed for use specifically as a photodiode will
also use a PIN junction rather than the typical junction. A photodiode is a PN junction or PIN
structure. When a photon of sufficient energy strikes the diode, it excites an electron thereby
creating a mobile electron and a positively charged electron hole. If the absorption occurs in
the junction's depletion region, or one diffusion length away from it, these carriers are swept
from the junction by the built-in field of the depletion region. Thus holes move toward the
anode, and electrons toward the cathode, and a photocurrent is produced.
PHOTO TRANSISTOR
Phototransistors are solid state light detectors that possess internal gain. This
makes them much more sensitive than photodiodes of comparably sized area. These
devices can be used to provide either an analog or digital output signal.

81
82
 CROSS SECTIONAL VIEW PHOTO TRANSISTOR
SYMBOL

OF PHOTO TRANSISTOR

FEATURES
This family of detectors offers the following general characteristics and features
Low cost visible and near-IR photodetection
Available with gains from 100 to over 1500
Moderately fast response times
Available in a wide range of packages including epoxy coated, transfer
molded, cast, hermetic packages, and in chip form
Usable with almost any visible or near infrared light source such as
IREDs; neon, fluorescent, incandescent bulbs; lasers; flame sources;
sunlight; etc.
Same general electrical characteristics as familiar signal transistors
(except that incident light replaces base drive current)

APPLICATIONS

Phototransistor is used in the following applications.

Computer/Business Equipment
Write protect control - floppy drive
Margin controls - printers
Monitor paper position - copiers
Monitor paper stack height - copiers
Industrial
LED light source - light pens
Security systems
Safety shields
Encoders - measure speed and direction
Photoelectric controls
Remote residential electric meter reading
Consumer
Coin counters
Lottery card readers

83
84
 Position sensors - joysticks
Remote controllers - toys, appliances, audio/visual
equipment
Games - laser tag
Camera shutter control

PROCEDURE
1.Check the equipments and components to ensure their proper working condition.
2.Connect the circuit as shown in the circuit diagram using breadboard with short wires.
3.Switch off the lamp and take the dark state reading.
4.Switch on the lamp and take bright state reading.
5.Tabulate the reading & draw the graph by taking voltage in x-axis and current in y-
axis.
6. After completion of experiments switch off the power supply and disconnect the
components

RESULT

Thus the characteristics of photo diode is plotted & verified.

85