(2) oy os) my an @ 6s) (60) os) (2) United States Patent Dong et al TWO-STAGE SINGLE PIAS! BIDIRECTIONAL PWM POW! CONVERTER WITH DC LINK C REDUCTION ‘APACITOR Inventors: Dong Dong, Blacksburg, VA (US); Dashan Boroyevieh, Blacksburg, VA (US), Rust Wang, Blacksburg, VA (US) Fred Wang, Knoxville, TN (US) Assignee: Virginia Tech Intellectual Properties, Tne, Blacksburg, VA (US) Notice: Subject to any disclaimer, the team ofthis pateat is extended of adjusted under 35 USC. 154(b) by 281 days. Appl. Now 13/441,246 Filed: Apr. 6,2012 Prior Publication Data US 201200257429.A1 Get. 11, 2012 Related US. Application Data Provisional application No, 61/473,399, fled on Ape 8.2011 Int. Cl. HORM 7797 (2006.01) HOM 3158 (2006.01) HO2M TAS (2007.01) HO2S 1/10 (2005.01), 1023 3232 (2006.01) HO2M 1/00 (200701) 11023 3138 (2006.01) 02M 3/1582 (2013.01); H02M 7/797 (2013.01; 102) 1/10 (2013.01); H02J 3/32 (2013.01), 40291 7288 (2013.01); 102 2001/007 (2013.01), YO2B 70/1425 (2013.01) 1021 3/383 (2013.01); H024 3/386 (2013.01): E § % rn 3 8 ‘US009071141B2 (10) Patent No. 4s) Date of Patent: US 9,071,141 B2 Jun, 30, 2015 YORE 10/563 (2013.01); YO2E 10/566 (2013.01), 1026 107763 2013.01) (58) Fleld of Classification Search (CBC HO2M.1/15; HO2M 2001/07; H02M 7/797 uspe 36865 ‘See application ile for compete search history 60) References Cited US. PATENT DOCUMENTS 6320778 BL LU2001 ota ae 74s0401 B2* LU2008 tia Sow.res B2* "12012 Rodiguee 20080226017 AI* 102008 Ketsopoulos a 20070080659 AL* "4007 Urakabe ct a aonwone2re4 AL* ¥2008 Feng etal aononrte2cs AL* S000 Lateeal, 2n100138399 AL* 62010 Kingstal goruoo2s28t AL* 22011 Chapman ei So1d0DH0772 AL* 32012 Mouosnoul otal. * cited by examiner Primary Examiner —Hoery Bet (74) Attornes, Agent, or Firm — Whitham Curtis Christofferon & Cook, PC 6 ABSTRACT DD link capacitance in bi-nscional ACIDC power eon- verter using a full-bridge or H-bridge switching circuit can be really reduced and the power density ofthe power converter correspondingly increased by inclusion of « bidirectional synchronous rectifier (SR) DC/DC converter as a second stage o the power converter and controlling the second stage ‘witha contol leophavinga transfer function common tbat bck and boost modes of opemstion ofthe bi-directional SR DCIDC converter and a resonant transfer Function e inerease asin atthe ripple voliage frequency (twiee the AC line fe- ‘quency) to contol the duty eyele ofthe switches ofthe bi- Giretional SR DC/DC stage and controlling the duty cycle of the switehes of the full-bridge or H-bridge switching cireuit using a control loop inchading a notch filer at the ripple voltage frequency. 12 Claims, 13 Drawing SheetsUS 9,071,141 B2 Sheet 1 of 13 Jun. 30, 2015, U.S, Patent 4 aunbi-s “sakig ‘yeusen :seoueyddyUS 9,071,141 B2 Sheet 2 of 13 Jun. 30, 2015, U.S, Patent az anbiy De asnbi4 waisks-OgUS 9,071,141 B2 Sheet 3 of 13 Jun. 30, 2015, U.S, Patent py anbl4y waisks-oa warsks-OGU.S. Patent Jun, 30, 2015 Sheet 4 of 13, US 9,071,141 B2 bi ‘0 D002 TOU KOO TOG TOF Ooi OVI OoI TUB O02 Time (8) Figure 5 = 2000F ‘ime| C002 0004 0.006 THE O.0T OOIZ HOTT 0.016 D018 To2 Time (3) Figure 6 20U.S. Patent Jun, 30, 2015 Sheet 5 of 13, US 9,071,141 B2 De-link capacitor value (uF) 828 & 8 De-link Voltage (V) 00 °°? ao 700 200 po ae De-link Capacitor Cge (UF) 0°" 400 De-link average voltage (V) Figure 7 | Capacitor Selection Rangion Minimuny Point 480 500, 520 540 560 580 600 620 De-link Average voltage (V) Figure 8US 9,071,141 B2 Sheet 6 of 13 Jun. 30, 2015, U.S, PatentJun, 30,2015 Sheet 7 of 13 US 9,071,141 B2 U.S, Patent Var pea. o, Re Pi Buck CO Ro a Ro 1 kG) Lt, ke, Pp P Re Ro Vap ® FRC pe a Figure 10 A vo Ry aan Re Ro D 1 [ae Figure 11U.S. Patent Jun, 30, 2015 Sheet 8 of 13, US 9,071,141 B2 3274, ¥1=365.73 -X2=1.3314, ¥2=365.73 DeltaX=0,003999 DeltaY=30.096 -length=30.096 525.9. 1.316 1.32 1.324 1.328 1.332 1.336 1.34 1.344 (s) Figure 12 375 i X2=1.334, ¥2=377.17 _ DeltaX=0.0050991 365 fas é ~ 1315 1.32 1.335 1.341.345 ) Figure 13U.S. Patent Jun, 30, 2015 Sheet 9 of 13, US 9,071,141 B2 05 0.51 0.52 0.53 0.54 0.85 (s) Figure 14 i eee 05 0.51 0.52 5) 0.53 0.54 0.55 Figure 15U.S, Patent delay Jun. 30,2015 Sheet 10 of 13 U S 9,071,141 B2 Wskac iter Current Controller Figure 16 fac WsLae Hatter Current Controller Figure 17U.S. Patent Jun. 30, 2015 Sheet 11 of 13 US 9,071,141 B2 & 20kHz i Two-stage cr Vay = 550 V De bus voltage Ve ripple 40V pp ~ Gag Wolamme) co 250 iF (OSS Lier) Tacx(Volume) | 161.2 aA @2Liter) 238.5 uA (0.23 Lier) (Vo “24.8 WH (0.04 Liter) [- Soudvoturie) 70 uF (0.03 Liter) 10 pF (0.03 Liter) C4(Volume) uF (O Liter) 7100 uF (0.1 Liter) } aH 200 pH (0-76 Liter) 0.75 Lier | 93.0% Total Volume 1122 titer 783 Liter Figure 18 Two-stage converier ee ‘Ac Source “feo De Current De Load ‘Ac Load bank Source bank Figure 19U.S. Patent Jun. 30, 2015 Sheet 12 of 13 US 9,071,141 B2 a WUE UY NAAN ANN i 3 Ch1 200V Ch2 500mV 2 Ch3 200 Ch4 200V_ Figure 20 3 Ch1 200VCh2 SOOMV 2 Ch3 200V Ch4 200V Figure 21U.S. Patent Jun, 30, 2015 Sheet 13 of 13 US 9,071,141 B2 3 Chi 5.0V Ch2 500mvV 2 Ch3 200V Ch4 200V. Figure 22 Ch1 20. ov cha Tom 2 Ch3 20.0V Ch4 200V Figure 23US 9,071,141 B2 1 ‘TWO-STAGE SINGLE PHASE, BI-DIRECTIONAL PWM POWER CONVERTER WITH DC LINK CAPACITOR REDUCTION, Ros -REFERENCE TO RELATED. "APPLICATIONS, ‘This opplication claims benetit of priority of US. Prov sional Application 61/473,399, filed Apr 8, 2011, which is hereby incorporated by reference in its entirety FIELD OF THE INVENTION “The present inveation generally relates to Powsee supplies snd power converters and, more particularly to bi-directional ACIDE power converters which are particularly useil for interfacing DC based distribution system andlor renewable ‘energy sourees to an AC power distribution grid BACKGROUND OF THE INVENTION Atthe present time, most electrical powers generated by relatively large power plants operating on fossil or nuclear fuels or hydroelectric power plants for whieh relatively few suitable locations exist naturally or can be developed. The listribution of such facilities andthe variations in demand for power in different geographic epions requires distribution of _Benerated sltemating current (AC) power aver a network of power transmission lines referred to asa grid. The vote at ‘hich AC power is distributed is generally chosen in accor ‘dance with the length of various links since more power ean be transmitted at higher voltages and lower currents with reduced losses fora given cross-sectional sizeof conductor Lower voltages for shore links ca be readily develop Irom high voltage AC power though use of tansformers “In recent years, however, there has been great interest in so-called renewable energy and povker soces such 28 sole power and wind power. In the cate of solar power, i partic- Jar, the power is generated asa substantially constant direct ‘eurent (DC) vollage from an array of photovoltaic eels, ‘when in operation. In the case of Wind power, while wind turbines can bedesignedto general AC power, theirspeed and hence the frequency of the alternating voltage preuced is subject wo Wide variation and dhns very dificult to synelro- nize witha power distribution grid Therefore, wind turbines ‘are generally designed to deliver DC power as well Tis also characteristic of renewable energy sources that power cannot be continuously generated. Therefore, some Iacility for energy’ storage is generally provided, usvally as buatlries ia which energy is stored through = reversible ‘chemical reaction. For tat reason, such energy is input into ‘and recovered fom such batteries as DC power, ‘Many’ solar and wind power generation installations are built without having any local Toads and are designed 10 liver power only to the power distribution grid. In these ‘ypes of installations only a suitable inverter deviee (eg. a lnklrectional De to AC power converter) is necessary to ‘develop and synchronize AC power for delivery tothe power slistibuton grid. Other installations may be built fora local Toad suchas for a residence and may or may not be connected to deliver excess power to the power distribution grid or #0 ‘obtain power from the grid when local renewable resource power generation and (locally stored power, if available) is Insuflicient for the leads that may be present ata given ime. Between these types of installation, some renewable resource power generation systems are developed as so-called sno- 0 o 2 arids where there may be numerous types of loads and where power can be input to the nanogrid from the power distribu- ‘ion grid and excess locally generated power can be output to the grid. In these later types of renewable resource poster _genemition system, a bi-diectional power converter capable Df delivering power ether to or from the grid is require So-called fll bridge or U-bridge power converters ave dawn jnterest as oth inverters and possible hi-sditetional ‘operation. However, whea such a circuit is used in a retifi- cation mode for delivery of power from the gras DC power, very lage capacitor is required forthe DC output, tered to as the DC lnk, in order to adequately suppress vole ripple, Unless the ripple is adeyuately suppressed large elec- ‘eal stresses are placed on devtoes connected to the DC link hich may eause premature aging of components and pho- towltai cells in particular. However such large capacitances must be of electrolytic design and thus are of large volume, ‘which reduoes the converter power density, and subject t0 failure, ‘SUMMARY OF THE INVENTION It's therefore an object of the present invention o provide ‘two-stage ACIDC bisdiectionl converter topology having improved power deasity through reduction in DC Tink capaci- ‘ange and low DC ripple voltage with close voltage regulation while capable of rapid transient load response Tis another object ofthe present invention to provide an ACIDC bidirectional power converter topology #0 greatly reduce the required DC Tink capacitance ofthe power con verter while meeting output DC vollage and AC current ra Jation requirements isa fnther objet ofthe invention to provide an ACIDC biediectional power converter that attains particulaey high performance through digital contol tis further object ofthe invention to provide bi-directional ACIDC paver conversion with a consistent switching meth- fodology’ for either power transfer direction and. which fnchides bi-directional curent interuption capability Tor ‘overcurrent protection. TInonder to accomplish these and other objects ofthe inven sion, a single-phase bi-directional AC/DC power converter is provided having a DC side and an AC side, comprising & {l-bridge switching cieuitconnectedbetween anAC source orloadand a DC link, aC ink capacitor anda bi-directional synchronous rectifies DC/DC power coaverter receiving or delivering power fom orto the DC Tink as well as providing [DC voltage reyulation in one direction of power transfer and an inereased DC voltage in another direction of pose trans- {er whereby capacitance of sad DC link capacitor ean be reduced while limiting voltage variation at an opt of said DCIDC power comerter The ouiput of a second stage DCVDC conwerter maintains small DC vollageripplesllowing dramatic reduetion in the DC link capacitance and overall volume reduetion ofthe power converte, In accordance with snother aspect of the invention, 2 method of reducing DC link capacitance ofa bidiretionsl AC/DC power coaverter having an AC side and a DC side ‘comprising steps of regulating voltage of power supplied {om the DC link with a predetermined tolerance, determin- ‘ng maximum and minimtm tolerable voltages on the DC link fata predetermined average vollageoa the DC link, and deter ‘mining a minimum espaeitance value roquited to Timit max ‘mum and minimum DC fink voltages within the maximnm And minimum tolerable voltages BRIBE DESCRIPTION OF THE DRAWINGS. ‘The foregoing and other objects, aspocts and advantages ‘ill be bette understood from the following detailed deserip-US 9,071,141 B2 tion of a preferred embod ‘ence tothe drawings, in whieh FIG. Lisa schematic depiction ofaDC nanogrid connected toan AC power dstribaton grid and illustrating anexemplary application ofthe invention, FIG. 2A jsa schematic diggram of «single phase H-bridge teansformerless converter opoleay, FIGS. 2B, 2C and 2D are schematic diagrams of H-bridge trunsformerless converter wpologies showing knowa attempts at reducing DC link capacitance, IG. 3 sa schematie diagram ofa two stage bi-lretional single phase PWM converter topology, TIG. 4is a schematic diagram of an exemplary embodi- ‘ment ofthe invention, FIG. § is a graphical depiction of eurent owing 0 the second stage ofthe converter of FIG. 4, FIG. 6 isa graphical depiction ofthe ureent flowing othe DC link eapacitar inthe eireit of FIG. 4, FIG. 7 isan isometric graphical depiction illustrating the relationship ofthe DC lin eapocitance to the maimim and ‘minimam DC Tink voltages and average DC Tink voltage, IG. 8 =a graphical depiction illustrating choice of mini ‘mum DC link capacitance value, TIG, 9s. schematic diggram of a preferred embodiment ‘ofthe invention ineluding the contol ciety in aecondance With a preferred embodiment of the invention, FIG, 10 schematically ilusirates small signal models of buck and boost operational modes of the converter in accor- ‘dance with the invention, TIG, 11 isa schematic diagram illustrating # generic con- ‘wol-to-output small signal mexdel of a converte in ecordance with the invention, FIG. 12 graphical illustration ofthe DC output voltage without dhe resonant controller. R, of FIG. 9, FIG, 13s graphical illustration ofthe DC output voltage with the resonant controler, R, of FIG. 9, FIG. 14s. graphical depiction of AC curent without the notch iter of FIG. 9, FIG. 18 is graphical depiction of AC current with the notch iter of FIG. 9, FIG. 16s. simplified depietion of the current Joop ofthe schematic diagram of FIG. 9, TIG. 17 is simplified depietion of the current loop ofthe schematic diagram of FIG. 9 including disturhance rejection, TIG, 18 illstrates a volume comparison ofthe invention with fll bridge converter of conventional design, FIG, 19 isa schematic illustration ofa generalized exem= play application of the invention, and test eiruit vertVing bidirectional operation, and FIGS. 20, 21 22 and 23 are graphical Jepitions of test results verifying operability ofthe invention, ‘of the invention with refer. DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT OF THE INVENTION, Referring now tothe drawings, and more particularly to FIG. 1, there i shown, in highly schematic form, a geneal- ied depiction of a DC nanogrid 10 which is an exemplary ‘environment for application of the invention, penerlly ‘depict 020. I should be understood that FIG. 1 isanranged ‘o facilitate an understanding ofthe application of the inven- tion and no portion of FIG. 1 is admited to be prior art in regard tothe present invention TFssentially, a DC nanogrid is a power distribution grid which is generally very limited in geographic extent (eg. limited ta building or onc ora limited numberof residences fora vehicle suel as ship or airraft) in which power is 0 o 4 istrbuted over DC bus 30 ata nominal DC voltage of 380 vols although other nominal voltages can be employed and. ‘nany ease, the nominal design voltage is unimportant w the succesful practice of the invention. It should be understood ‘hat DC bus 30-can also be embodtod as a plurality of DC busses opeming at different voltages, A dial bus arrange- ‘ment with one bus operating at 380 volts and another bus ‘operating at 48 volts soften employed o provide increased efficiency of power conversion for low vollage DC loads DC bus 30 receives locally generated power, preferably {roma renewable resource power generator 40 such as solar cell aray oF one or more Wind turbines. Power input to DC bus 30s indicated by arrows, and depicting current Now. ‘The DC voltage may be changed by BC/DC powerconverers 45, 28 may be desired forthe particular DC nanogrid design. Tomaximize utilization of locally generated power, anenergy storage arrangement 50 such asa battery bank canbe included with s DC/DC converter 85 for DC voltage conversion, The ‘energy storage arrangement ean be augmented, i desired, by the batteries inanelectic powered or hybrid vehicle 60, again ting a DC/DC converter, if needed 0 obtain a suitable DC voltage relative to DC bus 30, Thus the energy storage frmangenien 0 and vehicle 60 can function as either a poser source ora load as depicted by bi-directional arrows and, A wide variety ofoads 0 may be connected to an eceive power fren DC bus 30 using DCIAC converters 78, generally roferred to as inverters, as needed, depending on whether or ‘ot the load is designed to utilize AC power. In this regard, it shouldbe noted that some loads may require both DC and. AC power and appropriate power converters may be provided as ‘may be convenient. For example, appliances may use DC/DC converters 71 to power miero-controlles 72 while heating ‘elements 73 may he powered directly from the DC bus and stitable drive arrangements 74 (which need not necessarily bbe power converters) may be provided for electric motors and the like In general its desirable to also provide for connection of the DC bus to an AC power distribution grid 80 so that excess locally generated powerean be povided thereto or powercan ‘be obiained therefrom when locally generated power incivd- ing power stored at 50, 60 is insufficient for DC nanogrid loads or when itis desired to retain stored eneruy for provid- ing power when the AC grid may be inoperative or when itis desired fo retain stored energy in vehicle 60 for independent ‘operation thereof. The eonnection between the DC bus and the AC power grid thus requires bidirectional AC/DC eon- verter suchas that provided by the invention. Suitable electro- ‘magnetic interference (FMD filtering, power factor coree- ‘ion (PFC) and the like are often required to attenuate high frequency’ switching noise from the power converter 20 and are assumed to be included thebi-directional AC/DC power jeonvertr 20 which is sometimes relered 10 as an electronic control center (ECC), As will be discussed below, the bi tiretional power converter ot FOC in accordance with the invention reduces the magnitude of FMI noise and thus sim- plifies EMI filter design and reduces the cost and volume of the EMI fter and PFC circuitry required to hold such noise 10 suitably fw Teel Referring now to FIG. 2A, a full bridge or H-bridge con- verter is shown. PIGS. 2A-2D are generalized to facilitate an understanding of and appreciation for te invention and no partofany ofthese Figures isadmited to be prior arin regan fo the present invention and theeefore have been designated “Related An”, Soch topology has been of substantial inter est for interfacing DC and AC systems of up to about 10 KW Since it may be operated bi-directionally as either a syncheo- ous retir (relented to as a rectifier mode of operation) forUS 9,071,141 B2 5 AC fo DC conversion of as an inverter (referred to a8 & regeneration mode of operation) for DC to AC eoaversion. Examples of application of such converter topology are seen nmany solar poseer and energy storage systems aswell asin ‘many electric and hybrid vehicle power systems, As illustrated, the H-bridge topology principally com- prises four switches 22, preferably embodied as insulted lzae bipolar transistors (IGHTs) but other types of power Switches ean be employed. The switehes are connected in & full bridge or H-bridg (the tems ate used synonymously) ‘configuration as two seres-eonnecied pairs of switches; respective switehes of each par of switches being referred to ‘asupperand lower switches, respectively. The upper switches ‘and lower switches are operated in a complementary fashion and the pairs of switches are operated oppositely to each ater such thatthe upper switch of one pair and the lower switch of the other pair ae ether conductive or non-conductive. I is preferred to pulse width modulate the control signals forthe Switches substantially sinusoidally atthe AC line freqoeney While the Irequeney of the switching signals is of « muck higher feequeney, gonerally in the range of several kiloher As illustrated, the eireutry 10 the right of the full bridge ‘circuit is referred to as the AC side ofthe converter and the iruitry othe leftoT the full bridge circutisreferredto asthe DDC side and the DC bus 24 is referred to as the DC link Additonal filter elements such as Ry Ca. and L. may be added 1 either of both of the AC and DC sides of the con- ener ‘While such a switching schemes preferred sinceit may be used to transfer power through the converter in ether diree- tion and thos ca provide a smooth transition indirection of power transfer. a ripple voltage will appear on the IC ink as natural consequence of AC to DC conversion and the mag- nitude ofthe ripple will increase with the load on the DC side ‘ofthe coaverter. When power isbeing transferred fromthe AC side tothe DC side, in particular such conneetions cause & substantial voltage ripple voltage on the DC side ofthe con- verter which includes components at the AC Tine frequency tnd double the AC line frequency’ as well as high frequency ‘components due to switching of the synchronous rectifier (SR) bridge switehes. To stabilize the ripple voltage and hl the ripple voltage toa suitably low level 3s well as to supply power during load transients with only an acceptably stall ‘change inDC voltage level, the vale of the DC Tink capacitor, C,,.miust generally bevery lange: requiring use of eleciolytie ‘capacitors which are somewhat subjectto flue, particularly ‘when large curretsare applied to them from the second order ripple energy from the AC power grid, Fletolytic eapaeitors ‘flange valuearealso of large volume and thus greatly reduce the power density of the power converter. It should also be noted from FIG, 2A that no active internal current limit pro- tection is provided because the grid current will be conducted by the aicparallel diodes ofthe switehes if Use DC link is shorted. Therefore, addtional eurrent limiting protection devices must be additionally provided: further reducing potential power density of the converter. ‘Numerous modified topologies have been proposed (0 reduce the required DC Tink capacitance and the physical volume thereof: examples of which are illustrated in FIGS, 2B-2D. All ofthese approaches use an additional switching Sage and an inductor or expacitor as an auxiliary circuit 10 reduce voltage ripple. For example. the circuit of FIG. 2B usesa series [C circuit parallel with the lower switch ofthe ditional stage to transfer the ripple power tothe aditional ‘capacitor through the induetor. The principal drawback of this, ‘iret is thehigh loss nthe inductor, Inthe circuitof FIG. 2C, ‘aninductor connected between thecommon nodes ofoneot 0 o 6 the pairs of switches of the frst stage and the switches ofthe second tage o stow the ripple energy in the inductor whieh is necessarily bulky. Inthe cireuit of FIG. 2D, the common rode ofthe second stage is connected tothe mid-point of @ capacitive voltage divider on the AC side of the converter to store the ripple energy hack to the AC side eapacitor. A common drassback of all these approaches isthe adlitionsl power loss due to the losses in the additional stage and the ificulyy of linear feedback controt design. While these ‘approaches have been somewhst success is achieving a degree of reduction in required DC Tink capacitance to limit ripple voltage magnitude, the reduction has been relatively small. Albo, the performance of all of these examples are sensitive operating conditions such as passive element vals, AC side poster fctorangle, and the ike die tothe lack ‘of robust controler. They also donot provide a cureent iit unetion and bi-directional operation and smooth transition between directions of power transfer has not, to the knowl- ledge of the inventors, been documented Referring now to FIG. 3, wo stage bi-directional PWM. converter topology in accordance with the invention i sche- ‘matically shown In FIG. 3, the second stage ofthe converter is operateds a DC/DC buck converter powered from the DC link. Other converter topologies can also be used bt a buck converter is prferred dict ts simplicity, simplicity of con- ‘rol and small numberof elements which ae highly reliable should also be noted thatthe topology ofthe buck converter, a illustrated, als0 provides a boost funetion for DC to AC power conversion, The second stage is thus sometimes referred to as a bi-directional synchronous rectifier (SR) DCVDC converter which operatesas eithera buck eomverterar a boost converter, depending upon the direction of power transfer, "The upper switch periodically connects the buck converter {0 the DC link fora duty eyele controled in accondance with Vo. while the lower switeh, operated in a complementary ‘ashion tothe upper switch operates to supply so-called free- ‘wheel curent to inductor L when the upper switeh of the sovond stage is disconnected. Since the second stage oon- verter operates in a synchronous rectifier mode, it always ‘opertes in a continuous current mode even at light load conditions. Therefore, it can easily achieve a seamless trae sition in power flow direction. Thus thesecond sage provides both close rezulation of voltage (allowing substantial DC link ripple to be tolerable and substantial and dramatic reduction ‘of C,,)and very’ fast transient response limiting the noed for Tange ‘iter capacitance, C,, Moreover, in terms of system- Jevel design and observation of interactions of DC bus eon- verters, the tecond DC/DC stage ie deemed advantageous ‘over diretly drawing power from the DC link the H-bride interface to dhe DC system since, if power is taken directly from the DC fink, the complicated quasi-static analysis must be used for terminal characterization ofthe T-bridge topol- ‘gy: Further, some eurrent limitation is inherent inthe buck converter second stage and further current Imitation ean be easly provided in the control arrangement for the second stage switches ‘The potenti dramatic reduction in DC link capacitance will now be demonstrated with reference 10 FIG. 4, FIG. 4 fers from the basic cir in accordance with the invention shown in FIG. 3 only in the provision ofa differential mode PMI noise fiker on the AC side of the converter which is ‘ormed simply by splitting inductor L,of FIG. 3 into wo series connected inductors I. and fy.» and coupling. 2 capacitor, Cain across the AC line connections from the nodeUS 9,071,141 B2 7 ‘conacting the two jadutors to provide @ bypass path fr ‘llleretial mode (DM) aoe t0 prevent DM aise fom reaching dhe grid “Asshown in FIG. 1 thegridcurentandvoltogearedefined below in equations (i), (2), of which the pose factor (PF) angle isp. Thesymbols"U, "and, eertothe AC voltage amplitude and the AC voltage espoctively: ihn) oy Usa) ‘The power (P,,) that flows through the fll-bridge topology will be the input power (P,) reduced by the instantaneous power, dissipated on the acboost inductor L,..P,,P,.and P,, are sown in 3), (4), and (5), respectively, ,, consists of two parts the sscondorder ripple power P, niven by equation 6) and the de average power P,, given bY ‘equation 7). 6 ‘Normally, fo suppress the voltage ripple a lanze DC Tink ‘capacitor C, is rouired and is subject to the ripple power. Specifically the required DC lnk eapacitane for converter ‘designed for an average DC voltage of 380 voli at 10 KW. power and an inductor (C,.) value of 300 HT a switching Trequency of 2260 rad/s. anda 10 vol peak-to-peak ripple js 69 mF which generally requires a bank of electwistic ‘capacitors and may present signifiant hazard since, as alluded to above, the ciecuit of FIG. I does not inciode any ‘current limiting arrangement For the two-stage topology shown in FIG. 4, instead of delivering power directly from the DC link as filtered by the JmermediateDC lnk eapacitor,C.,. the DC system isirectly interfaced to the second-stage synchronous revilier (SR) DC/DC converter which regulates the DC bus voltage within the design specifications of the system. This incision of a regulator offers an opportunity to reduce the valve of C. t0 0 o 8 ove the overall power density since the regulator permits substantially greater variation in input voltage tothe second sage tobe tolerated while limiting the variation in DC vol aagecomecteto the DC system. Of course increased voltage fipple ercates additional electrical stress for the DC link ‘apcitor but that potential problem is also solved in accor ddance with the invention as will be discussed more fully below. [As shown.in FIG. 4, the reduction of the DC link capacitor (Cg ill naturally yield large DC Tink voltage variation. la corer to make the SR DCIDC converter operate under the specifications, two requitements must be flied. First ithe DC bus voltage V, is egulated witha very small ripple, the input power P, should be fully controlled so that all the de average power P,, and ripe power P, goes tothe DC-DC converter and the small DC link capacitor C,., respectively. Second, the input current for this mode of operation can still be well-controlled a a sinssoidal waveform at PF angle. If the instantaneous power P, dissipated on the boost indvetor, .,.. 18 neglected, the fist requirement can be expressed in equation (10), that the instantaneous poser Pag in the DC link capacitor isthe same as the input ripple power , on the right-hand side ofthe equation) By solving the differential equation (10) the DC Tink voltage vyq ea be resolved as shown in equation (11) and the maxi- um ae minimums DC lnk voltages allowable while main taining spevilied regulation is show in equation (12). ‘The constant Value K, oq Physically represents the enemy stored inthe DC link eapacitr. The definition of average DX” Tink voltage Vy is shown in (13). As seh, the Kony a0 verge DC link voltage, is established below in egustion (14). The DC Tink voltage Vi given in equation (15), (azo) Since the quantity under the radical in equation (15) mus, sathematically, be greater than zero, ti seen thatthe fle Jowing inequality should be maintained.US 9,071,141 B2 el As seen in expression (16), this inequality is always valid for ‘any DC Tink capacitor Value; therefore, the DC Hink capacitor value, C,, does not affect the fst reuiemen ‘The averaged DC link capacitor current i, and the current flowing to the DC-DC converter ean in tur be derived as lta ayycas) “eam! sea e us) lias esate yasming he DC lnk average volgen he verge powers 1084 thc averge creat ht Hs 0 th seo soge ad ti aerge Be nk capctor etre eaiown nT Sando: respecte fer ew DC Tink eaycor salu s seen change of ink epee fords ot insate he DC ikea cue ths rap caren rag). Forthe sos meprement it should be noted tt the DC lak coment irs alte meting caren wish ei Sisal oli. The erage a yah om food wit hepraficofac samen sch tu theses tetuveneat ca be site as eqn (19, Subang ‘Savon (1) and.) ito squion C19) tvs cuton (20), ea Ue) 0 Equation (20) indicates that the input grid poak voltage U, ns always be smallerthan the DC link voltage wich s als the operation requirement for the first-stage [bridge Thus, the DC-DC converter regulating the DC bis voltage V, with 4 small ripple plus the H-bridge regulating AC current With small DC link capacitor, Cy. are applicable, For this ‘ase, the dosign of this small C,, jes in tho trade-off borween, the power level, P,theaverage DC link voltage V,.and the allowable DC fink volige variation range. For'a 10 kW erage poser level eae, the relationship between DC Tink ‘maximum and minimum values (Vj gay: Vdc_mu) the DC Tink voltage average value V.,. and the DC’ lik capacitor value Cy. is shown in FIG. 7. In order to find the minimum DC link capacitor valve, the sminimam DC link vollage valu is set a 450 V asthe ouput voltage, (DC system bus voltage is controlled at 380V, and the maximum values set as 650'V to limit high voltage From ‘equations (12)-(14), the boundary of de-nk capacitor value is obtained as follows ev o 10 The DClinkespacitor selection rion basedon (21), (22) ean be readily found as shown in FIG. 8, The minimum éspacitor value can be directly found graphically in FIG. as the ‘minimum ofthe capacitor selection region, Altematively, the ‘minimum DC link capacitor value may be analytically erived as shown in equation (23), Asa result, the minimum DC link capacitor value is found to ‘be 241 uF, more than an order of magnitude Tess than the DC Tink eapaeitor value that would be eoquieed without the so ‘ond stage regulator in accordance with the invention That ‘compared to 6.9 m, there is 2 huge reduetion margin in Tink capacitor and, importantly, volumeand cost, Further, the reduction of roquied DC link capacitor value allows the DC Tink eapacitor to be embodied in other capacitor technologies sth as il capacitors whieh are me ess subject to pre ictable failure than electrolytic capacitors but are also much ‘more tolerant of electrical ses, ‘owever, the reduction of DC link capacitor value, Cin tum poses challenges to the controller design for separating the ripple power and DC average power, as will now be cussed “The preferred digital contol structure for bislirectional ‘converter operation comprises wo independent contolers shown in FIG. 9. Inthe following analysis and discussion, DC renewable eneruy resources are simply modeled as curent sources and collectively depicted at 91. Basically. one con- twolers used to contol the DC bus volage by operating the second stage DC-DC converter san SR buek mode or SR boost mode, depending on the power Now direction. The sroportional gai, K, in hede curent loop is applied to damp the resonance from L,, , filler, and the carefully designed ‘digital compensator transfer function TT ples resonant con- troller R are used to accomplish high bandwidth and high Joop-gain especially at double-lin frsquency (e.g. 120 Hz) 10 Fhande-@Tange input (V,.) variation as Well as regulate the ‘output voltae V,. The dither double-loop controller conteols the H-bridge topology: The outer-loop controls the DC ink average voltage, Vi in conjunction with an additonal oad current feedhack term, G); while the inser-lonp regulates the power from the grid, The outerloop controler has a noteh- Iter, N in series with PID, 11) 10 correct the eoateol signal, achieving a lw total harmonie distrton (THID) of the AC jcuent regulation “The coateol delay due to the sensor filter and digital com- putation must be modeled. Each sensor filter is assumed o be second-order low-pass filter, Hythe transi funtion for ‘which is given ia equation (24), A one switching-eyele (T_) delay, Hyg. provided in equa- tion 25), is modeled in the modulator o approximate the ital computation and A/D conversion delay 108g +US 9,071,141 B2 u The modulator gan is assumed tobe unity It should be noted thatthe nonlinear sample-and-hold elect inthe current loop ‘can be neglected due to the average curent mode contol ‘which is profered for practice ofthe invention isa necessary step fo establish the small-signal modelsin ‘order to design the eontller for H, R,K, HN, H, and G. There is no control-o-AC-current small-signal model ofthe full-ridge that fully describes the dynamics from DC up to [Nyquist frequency. In order to design the current loop com- pensator, a quasi-static modeling approach can be applied t0 ‘model the current loop beluvior at the high-frequency range. ‘Therefore, the low frequency dynamics, due t the 120 Hz voltage ripple, can be ignored, The small-signal eontrol-to- ‘cureat transfer function ofthe H-bridge is obtained in equa tion (26), in which d,s the average duty-cyele signal ofthe HL-bridge. The input impedance ofthe second-stage converter ‘wil be the loading effect to the first-stage, D is the steady state duty-cyele ofthe second-stage converter. Within the DC bus voltage loop bandwidth te Z, is like a constant poster Joad. Normally, the bandwidih of loop is lower tan that of 2 the a current loop: ths the Z,, atthe high-frequency range or equation (27) would be the waregated ip impedance ‘of the second-stage comerter.As such, the a] ‘can be designed to compensate G, t0 achieve the high band= width and desired phase-margin ‘around the cross-over fre- ‘quency. It is also seen that the current dynamics above the resonance frequeney (L,.. Cy) will be mostly dominated by the AC boost inductor... and equation (26) ean be simplified as shown in equation (28), 28) ‘By assuming an idea current loop is implemented ia the H-bridge the design of H, is simply based on the curent-to- DC-link-voltae stallsignal transfer funeton as shown in ‘equation 29) by considering the second converter stage asa ‘constant posser Toad, in which his the sealing factor of the PLL. The design bandwidth of should not be beyond the double line-frequency. ‘The variable G shown in (30) isthe feed-forward term to balance the power between the frst and second sages ofthe ‘converter in accordance with the invention and thus sapped o 12 {o balance the power between the DC load and the AC prid, and also to improve the DC link voltage reglation transient response time especially during the load transient petiod. Gg ceurrent, G,, isthe transfer function from DC link voltage to futpat AC curent. G,, and G,, are wsed as the control plant ‘model for design of the controller. The Vga denetes the arid vollage RMS value, and V8 he DC link voltage reference. a To design the second-staze voltage loop controller, the smallsignal models of the second-stage converter at buck node (reefer mode) and boost mode (regenerative mode) wre found in FIG, 10, Notice that under the same inpat/outpat ‘onions, the duty eyele ofthe buek/boost mode in FIG. 10 ‘must meet the follossing equation in (31) Fit ay ‘Under the conditions of equation (31) it ean be shown that the buck mode and the hoost mode ofthe second-stage both have the same eontrol-to-output small-signal model as shown in FIG.11, The control-to-cutput transfer function is then found {in equation (32) to design one reek) for both modes of operation, Rand Ry. are the equivalent series resistances (PSRs) of C, andl. respectively. aoe Narn e. OTEFRRG Several more control techniques must he implemented to suliciently separate the DC average power and ripple power nto two paths with te small DC link capacitors. The DC lnk vollage will include lange 120 Hz ripple variation during fall Joad conditions. This inpot variation will affect the output vollage V, will transfer through the second siage DCIDC converter and will eventually sppear on the output v, dus to the finite loop-gain at 120 Hz. That is, the second stage DCVDC converter voltage control loop gin at 120 Fiz isnot ih enough fo core the output voltage ripple. Is seen. FIG. 12 that V, is 830 V voltage ripple at 120 Hz under 10 KW power transfer condition Inorderto suppress this voltage ripple, additional high gain is added onto the control loop by implementing a resonant controller as follows. foe a) ‘The resonant controller, when «,~22160 rad/s, approaches achievement of infinite pain at 130 Hz. As such, the voltageUS 9,071,141 B2 13 ripple can be greatly reduced, as shown about 7 Volts under full-oad conditions. In adition, the loop-zain at 120 He provided by the DC link voltage controller H, i not negligibly small although insuflicient to flly compensate the lage voltage variation on the DC link which is the input to the second stage Sk DC/DC ‘converter. As sch, relatively large 120 Hz components are still includ inthe output of the DC link wotage controler ‘or Wwhich is ako the AC current magnitude reference as sen in FIG. 9 thus affecting the AC curent regulation perfor- ‘mance. Ths to reduce the 120 Fipple further, the contol Joop gain shouldbe father inreased at 120 12 by use of @ parallel resonant controller, R, to increase the loop gain. As seen in equation (34), the PLL fne-frequeney signal will modulate With this double-fine-froquency componea in Yiekling the third-order curent harmonies. Ky ant Kyase ‘are the DC lnk voltage loop gain at DC and 120 Hz, respec tively Thesum ofthese gins ean then be conveniently sealed by KK FIG. 13, 10 oaly sini 9K ac yi Ye i As shown in FIG. 14, the AC current has a considerable thin-onder harmonic component du in large part © this celle ‘The notch filter, N(), given in equation (35) has the oppo- siteeffecton the resonant controller, which blocks the 120 Hz ‘component in the voliage loop. Then, the current loop ca ‘benefit from implementing this iter by reducing the 120 Hz ‘component from V, INFIG. 15, the ACeurren presents almost theidel ease when the notch Filler is included, Low THD of the AC current regulation can be readily attained, “The DC link vollage decoupling tems, 1/V are applied, ‘8 depiciod in FIG. 9 in both current oops af th controller to reduce the loop-gain variation due to the DC Tink voltage in ‘equations (26) and (32) “The perturbation ofthe AC grid should be also considered, ‘especially in weak grid (eg. when the grid impedance is not small) applications when the dynamics ofthe grid cannot be janored. Based on equation (28), as shown in FIG. 16, an ‘sdditional small-signal perturbation from the AC grid v.38 fdded into the current loop. Voltage v,, isthe ful-bridge terminal voltage, which can be also found in FIG. 9. The perturaion can thus hecanceled bythe disturbance rejection term (v,.%,)inthecontrolleras shown in FIG. 17. Thedrocp resistor ter, Rog i added in the second stage converter voltage loop in ord a achieve the DC system droop control with other DC side renewable energy sources. Al the alone- ‘mentioned small-signal transfer functions are used to design the multi-pole'zemo linear eontollers with the desired control ‘bandwidth and phase/gsin margins. AI the designed eontrol- Jers then will be transterad to the diserste form via contin ‘ousto diserete transformation, suchas the Tustin transforma tion, The transfer functions are preferably embodicd as special purpose digital processors specific to the respective 0 o 14 transfer finetion calculations which can be constructed as application specific integrated circuits (ASICS) for whieh ‘numerous suitable design and fabrication techniques are -knowi inthe art to accommodate any desired calculation, "The total volume comparison is evaluated by considering all the parameters. Specifically, the design of de inductor, and eapacitor C, are based on the current ripple Ai, and capacitor vollage ripple Av,, as shown below in equations (G6) and 37) ‘he fist stage AC side inductor Lis designed in accor- dance with equation (38) based on the ripple eutrent require ment (<20%%). The 2" stage AC side inductor Lysis designed inaceordance with equation 39) to meet the current harmon- jes requirement as specified in standard IEFE 1547. Vy is the spectrum of the temninal vollage of full-bridge, The design ofthe AC DM eapacitor, Cag should preferably bein aecordance with equation (40) to Timit the reactive power level to less than 2.5%. TE og 29 Wet FlalnaCon +l las) iw 238 fae ‘The final designs and volume of the AC, DC passive and active components are shown in FIG. 18 under conditions of 20Kite switching frequency. The DC link eapacitor volume js based on the commercial availability of filatype DC link capacitor (450 V rating for C,, 800 V rating for Cy.) The indvetor volume is obtained by choosing an amorphous alloy core due tothe igh saturation flux density, The results shove that the two-stage topology with DC link eapacitor reduction in accordance with the invention is deemed advantageous ‘over the traditional full-bridge topology in tems of power {density In this regard, it should also be noted that a preferred ‘commercially available component suitable and preferred for practiceof the invention ie tre phase IGT power module ‘including three series connected pais of IGBTs eorrespond- ing to tree phase legs of a power contol circuit. Such a ‘commercially available package allows two ofthe phase legs tobeconnected to form the F-bridge and the remaining phase Jeg to be connected to provide the switching of the second stage of the converter in accordance with the invention, The redvetion in converter volume achieved in accordance with the invention is by approximately a factor of six "A prototype meeting the size specifications of FIG. 18 has ‘been built and satisfactorily tested using the test arangement illustrated in FIG. 19, inckading a 25 KVA split-phase trans- ‘ormer. Power was transferred in either direction hased on the relative magnitudes ofthe loads (load I and load 2) ofthe AC ‘and DC sides ofthe converter. ‘Bisirecional power tests under retifier mode (ac to de) and regenerative mode (DC to AC) are shown in FIGS. 20ndUS 9,071,141 B2 15, 21, respectively. FIG, 22 shows the ripple comparison ofthe DE Tink and the output of the second stage under 7 KW ‘conditions, (Due to the small link eapacitanee, about 120 vols of ripple can he observed onthe DC link while the final DC output voltage ripple can be held to about 2 volts.) For regenerative mode test, 1.5 kW loads are on desde, while the 44 KW power is dispatched to the grid. FIG. 21 shows the results under kW thatthe advanced contro regulates the DC rnanogrid bus V, at 380 V with small voltage ripple even though the ripple of DC link volageV,. is relatively largedue to the reduction of the DC link capacitor C,,. The seamless transition from the rectifier mode to the regenerative mode is shown in FIG. 23. This shows thatthe energy flows freely ia ‘either direction between the AC and DC sides of he converter ‘without affecting the DC bus voltage V,.. In view ofthe foregoing, its seen thatthe provision of a voltage regulator as a second stage of a single phase bi directional ACIDC power converter ean be achieved consis tent with bi-directional power transfer and allows a substan- tial reduction in converter size with potentially significant improvements in reliability and safety. The inclusion of @ bidirectional second converter stage also provides for eur- rent limiting protection aginst shorting a the DC sce ofthe ‘converter. A consistent PWM control technique aecommo= dates power transfer in either direction through the converter ina Toad-dependent fashion; providing a seamless change in power transfer direction. Rapid regulation response daring Jad transients is also provided thats not limited by the small size or value of the DX link capacitor. A commercially avail- able three-phase IGBT power module ean be used to provide both the H-bridge and second stage regulatriconverter switching o reduce cost ofthe power converte inaevordance ‘with the invention. the converter in accordance with the Jention can be used singly ora plurality of converters in sccordance with the invention may be sed in respective phase-egs of a multi-phase power distribution system. The power transfercapability i highly appropeateto applications Jor generation of power from so-called renewable resources andlor DC nanogrds. ‘While the invention has been described in tems of single preferred embodiment, those skilled inthe ar wll recognize thatthe invention can be practiced with modification within the sprit and scope ofthe appended claims, We claim: 1A single-phase bi-directional ACIDC power converter having a DC side and an AC side for interfacing between a DC power distribution network to which DC loads andor DC power sources are connected and an AC power distribution rid operating ata line frequency. comprising fullbridge switching circuit connected between an AC source or load and a DC link, DC link espacitor, and 4 bi-directional synchronous rectifier (SR) DCDE poser ‘converter in series with sad full bridge switching circuit and receiving power from or delivering power to said DDC ink and eapable of providing DC voltage regulation in one direction of power transfer and an increased DC voltage in another direction of power transfer and 4 DC side control loop in said DC side of said power converter for controlling duty eyele of switches of said bisliectional SR DCIDC converter whereby capacitance of said DC link capacitor can be seduced while limiting voltage variation at an output of Said DCIDC power converte, stid DC side control loop having a transfer Function that has relatively increased 0 o 16 ‘in at twice the AC line frequency to limit DC side ‘ollage variation ata frequency which is twice sad Hine frequency, 2. The power converter as recited in claim 1, wherein said bicdireetional synchronous rectifier DC/DC power converter ‘opertes asa buck converter when transferring power from suid full-bridge switching cireuitto said DC side and operates fs # boost converter whe transferring power from said DC Side to said fll-bridge switching eceut. 3. The power cowverte as recited in claim 2, wherein said bicdictional synchronous rectifier DC/DC converter com- prises an inductor in series with @ DC inpuvowtpit terminal And filter capacitor 4. The poner converter as recited in claim 1, wherein said power converter further includes a filer on said AC side ‘including split inductor anda differential mode noise bypass capacitor 5. The power comerte as recited in claim 1, wherein said ‘control loop includes resonant transfer function ands transfer ‘connected in parallel with suid resonant transfer function and fan adder for combining outputs of ssid resonant transfer Tnetion snd said transfer fanction common to both buck and boost modes of operation 6. The power converter as recited in claim § wherein said resonant transfer funetion inereases contol loop gain at a Troqueacy’ which is tive the AC line Frequency, 7. The power convertor as recited in claim 6 wherein said requeney’ which is tice the AC Tine Fequeney is 120 Tz 8. The power converteras recited in claim I further include ing an AC side contol loop in said AC side of said poster converter for controling duty eyele of switches of sai full bridge. 9. The power converter as recited in claim 8 wherein said AC side control loop includes a notch fer. 10, The poser converter a6 recited in claim 1, wherein ‘switches of sid ull bridge switching circuit and switches of suid bi-lreetional synchronous rectifier DC/DC power eon- verter are provided ina three-phase IGHT power module 11. A single-phase bidirectional AC/DC power comerter having a DC side and an AC side, comprising, 4 full-bridge switching cireuit connected between an AC souree oF lod and @ DC link, DC link capacitor, and 4 bi-tirctional synchronous rectifier (SR) DC/DC Power ‘converter in series with sad fll bridge switeing circuit and receiving power from or delivering power to said DC link and capable of providing DC voltage regulation in one direction of power transler and an ipereased DC voltage in anther direction of power transfer, 4 DC side control Toop in sal DC side of said power ‘converter for controlling duty cycle af switches of sid Disdioctional SR DCIDC converter, and ‘8 contol circuit to balance power between said fll bridge ssvtching circuit and said biliectional synchronous rectifier DCDC power converter whereby capacitance of said DC link capacitor ean be rediaced while limiting voltage variation stan output oF said DCIDC power converter and wherein said contol circuit for balancing power is modeled as a transfer fanction from control duty eyele to output AC current and a transfer function from DC link voltage to out 'AC currentUS 9,071,141 B2 17 12. The power converteras recited in claim 11 wherein said ‘contol signal to balance power provides a signal equa to 3 DDC link voltage reference divided by the grid voltage RMS value as a gain/multiplier for signal representing output ‘current 18