Lecture Notes

Diodes for Power Electronic Applications

OUTLINE

PN junction power diode construction

Breakdown voltage considerations
On-state losses
Switching characteristics
Schottky diodes
Modeling diode behavior with PSPICE

Copyright by John Wiley & Sons 2003 Diodes - 1

 Basic Structure of Power Semiconductor Diodes
Anode
i
10
P+ 19 -3 microns
N = 10 cm
A
breakdown
v 14 -3 voltage
N- epi N = 10 cm
D dependent

19 -3
N+ substrate N = 10 cm 250
D
microns

Cathode
anode i
1
i
R on
B VBD
v v
1 V v

cathode

Copyright by John Wiley & Sons 2003 Diodes - 2

 Breakdown Voltage Estimate - Step Junction
F
Non- punch- thr ough di ode. Dr i ft
W(V)
r egi on l ength Wd > W(BV BD) =
l ength of space char ge r egi on at
br eak down. x

Fc
W(V) = Wo 1+V/Fc
Fc + V

2eFc(Na+Nd )
Wo =
qNaNd 4!Fc
(Emax )2 = (EBD)2 = BV BD
Wo 2
2Fc
Emax = 1!+!V/Fc
Wo
Sol ve for W(BV BD) and BV BD
Power di ode at r ev er se br eak down:
Na >> Nd ; E = EBD ; V = BV BD >> Fc to obtai n (put i n Si val ues)
e!EBD2 1.3x 1017
Wo 2!BV BD 2eFc
BV BD = = ; [V]
W2(BV BD) = ; Wo
2= 2!q!Nd Nd
Fc q!Nd
2!BV BD
W(BV BD) = = 10- 5 BV BD ; [ m]
EBD
Concl usi ons
1. Lar ge BV BD (103 V) r equi r es Nd < 1015 cm - 3

2. Lar ge BV BD (103 V) r equi r es N- dr i ft r egi on > 100 m

Copyright by John Wiley & Sons 2003 Diodes - 3

 Breakdown Voltage - Punch-Through Step Junction
Punch-through step junction - W(BVBD) > Wd
At breakdown:

- V + V1 + V2 = BVBD
P+ N- N
+ E1 + E2 = EBD

W qNdWd2
d
Electric
BVBD = EBD Wd -
2e
E1 + E 2 field
V
1 e(EBD)2
E2 If Nd << (required
V2 2q(BVBD)
x value of Nd for non-punch-thru
diode), then
qNdWd qNdWd2
E1 = ; V1 = BVBD EBD Wd and
e 2e
Wd(Punch-thru)
V2 = E2 Wd 0.5 Wd(non-punch-thru)

Copyright by John Wiley & Sons 2003 Diodes - 4

 Effect of Space Charge Layer Curvature
diffusing incident acceptor impurities
acceptor
impurities S i O2
If radius of curvature is comparable
to depletion layer thickness, electric
field becomes spatially nonuniform.
+
P
R
depletion Spatially nonuniform electric field
layer N- reduces breakdown voltage.
+
N
R > 6 W(BVBD) in order to limit
breakdown voltage reduction to 10%
Impurities diffuse as fast laterally as vertically or less.

Not feasible to keep R large if

Curvature develops in junction boundary and in BVBD is to be large ( > 1000 V).
depletion layer.

Copyright by John Wiley & Sons 2003 Diodes - 5

Control of Space Charge Layer Boundary Contour
field plates
Electrically isolated conductors
(field plates) act as equipotential
P+ surfaces.

depletion layer Correct placement can force

boundary depletion layer boundary to have
N- larger radius of curvature and t;hus
minimize field crowding.

SiO2 Electrically isolated p-regions

(guard rings)has depletion regions
P P
P+ which interact with depletion region
guard ring of main pn junction.
depletion
layer
- Correct placement of guard rings
boundary N
can result in composite depletion
N+
region boundary having large radius
aluminum of curvature and thus minimize field
contact crowding.
Copyright by John Wiley & Sons 2003 Diodes - 6
 Surface Contouring to Minimize Field Crowding
depletion layer
boundary

N+ N+
SiO
2
N-

N-

P+ P+
bonding pad bonding pad
high field
region

Large area diodes have depletion Proper contouring of surface can

layers that contact Si surface.
Difference in dielectric constant of Si
and air causes field crowding at surface.
Electric fields fringing out into air
attract impurities to surface that can
lower breakdown voltage.
Copyright by John Wiley & Sons 2003
mimimize depletion layer curvature and
thus field crowding.
Use of a passivation layer like SiO2 can
also help minimize field crowding and
also contain fringing fields and thus
prevent attraction of impurities to
surface.
Diodes - 7
 Conductivity Modulation of Drift Region
Forward bias injects holes into drift
region from P+ layer. Electrons
x attracted into drift region from N+
+ + -
layer. So-called double injection.
P N - N+

W If Wd high level diffusion length La ,

d
carrier distributions quite flat with p(x)
p(x) = n(x) log scale n(x) na.
16
= n a = 10
For na >> drift region doping Nd, the
p (x) resistance of the drift region will be
n p (x) 14 n
n no = 10 quite small. So-called conductivity
p modulation.
no
n p =10 6
po
no
x
On-state losses greatly reduced below
those estimated on basis of drift region
low-level (Nd) ohmic conductivity.
Copyright by John Wiley & Sons 2003 Diodes - 8
 Drift Region On-State Voltage Estimate

QF q!A!Wd!na
IF = = ; Current needed
t t
to maintain stored charge QF.
W
d
q![n!+!p]!na!A!Vd x
IF = ;
Wd
Ohms Law (J = sE)
+ + -
P N - N+
IF
Wd2
Vd = ; Equate above + V - + V -
![n!+!p]!t j d
Cross-sectional
two equations and solve for Vd
area = A

Conclusion: long lifetime t minimizes Vd.

Copyright by John Wiley & Sons 2003 Diodes - 9

 Diode On-State Voltage at Large Forward Currents

o
n + p = ; nb 1017 cm-3 . i
na
1!+!
nb
Mobility reduction due to increased 1
carrier-carrier scattering at large na. R on

v
q!na!A!Vd o 1 V
IF = ; Ohms Law
Wd na
1!+! If!Wd
nb
Vd =
with density-dependent mobility. q!o!nb!A

Vd = IF Ron
Invert Ohms Law equation to find Vd as
function IF assuming na >> nb.
V = Vj + Vd
Copyright by John Wiley & Sons 2003 Diodes - 10
 Diode Switching Waveforms in Power Circuits
Q rr = I t /2
rr rr

di /d t d i /d t
F I F R 0. 25 I rr

I
rr

t t t
3 4 5 diF diR
dt and dt determined
V on t
V
FP
rr by external circuit.

t Inductances or power
t V
V
R semiconductor devices.
2 rr
t
t 5
1 S =
t
4

Copyright by John Wiley & Sons 2003 Diodes - 11

 Diode Internal Behavior During Turn-on
t interval
1
- +
- + di F
P + - + N- N+
Csc(V) =
e!A
V FP IF R d + L
i (t) - + !W(V) dt
F
Wd
Rd = L = stray or
q!m n!Nd !A wiring inductance
Cs c Rd L

t interval
2
- +
P+ - + N- N+
i (t) - +
F
Vj 1.0 V

time
Injection of excess
time carriers into drift
time
region greatly
reduces Rd.
x

Copyright by John Wiley & Sons 2003 Diodes - 12

 Diode Internal Behavior During Turn-off
t - t interval
3 4
i (t)
- + N+
R
P+ - N-
- +
+
Vj 1.0 V R d i ncr eases as ex cess

Rd
car r i er s ar e r emoved vi a
C sc L r ecombi nati on and car r i er
sweep- out (negati ve cur r ent).
time
time time di R
Vr = I r r R d + L
dt

t s i nt e r v a l
I nsuffi ci ent ex cess car r i er s r emai n to suppor t I r r , so

P +N- j uncti on becomes r ev er se- bi ased and cur r ent

decr eases to zer o.

Vol tage dr ops fr om V r r to V R as cur r ent decr eases

to zer o. Negati v e cur r ent i ntegr ated ov er i ts ti me
dur ati on r emov es a total char ge Qr r .

Copyright by John Wiley & Sons 2003 Diodes - 13

 Factors Effecting Reverse Recovery Time

diR diR trr If stored charge removed mostly

Irr = t = ; Defined on by sweep-out Qrr QF IF t
dt 4 dt (S!+!1)
switching waveform diagram

Using this in eqs. for Irr and trr

and assuming S + 1 1 gives
Irr!trr diR trr2
Qrr = = ; Defined
2 dt 2(S!+!1)
2"IF"t
on waveform diagram trr = and
diR
dt
Inverting Qrr equation to solve for trr yields
diR diR
2Qrr(S+1) 2Qrr Irr = 2"IF"t"
dt dt
trr = and Irr =
diR (S!+!1)
dt

Copyright by John Wiley & Sons 2003 Diodes - 14

 Carrier Lifetime-Breakdown Voltage Tradeoffs

Low on-state losses require Conclusions

kT
L= D!t = !t 1. Higher breakdown voltages
q![n!+!p]
require larger lifetimes if low
L = Wd W(V) = 10-5BVBD on-state losses are to be
maintained.

Solving for the lifetime yields 2. High breakdown voltage

Wd2 devices slower than low
t= = 4x10-12 (BVBD)2 breakdown voltage
(kT/q)![n+p]
devices.

3. Turn-off times shortened

Substituting for t in Irr and trr equations gives
diR
IF by large but Irr is
dt
trr = 2.8x10-6 BVBD
(diR/dt) increased.
diR
Irr = 2.8x10-6 BVBD IF!
dt

Copyright by John Wiley & Sons 2003 Diodes - 15

 Schottky Diodes
anode
aluminum
SiO2 contact -
Characteristics rectifying

V(on) = 0.3 - 0.5 volts.

P P

Breakdown voltages guard

100-200 volts. ring
depletion layer depletion layer
boundary with N boundary
Majority carrier device - no guard rings without guard
stored charge. rings

Fast switching because of lack

of stored charge. N+

aluminum
cathode
contact -
ohmic
Copyright by John Wiley & Sons 2003 Diodes - 16
 Physics of Schottky Diode Operation

Electrons diffuse from Si to Al

because electrons have larger + V -
i(t)
average energy in silicon
Aluminum n-type Si
compared to aluminum.
Electron Energy
Depletion layer and thus potential
barrier set up. Gives rise to
E
rectifying contact. Si
E
Al
No hole injection into silicon. No
source of holes in aluminum. Thus
- +
diode is a majority carrier device. Al - + N-Si
+
Reverse saturation current much Depletion layer
Diffusing
larger than in pn junction diode.
electrons
This leads to smaller V(on) (0.3 -
0.5 volts)

Copyright by John Wiley & Sons 2003 Diodes - 17

 Schottky Diode Breakdown Voltage

Breakdown voltage limited to

100-200 volts. anode

Narrow depletion region

widths because of heavier
drift region doping needed for
P P
low on-state losses.

Small radius of curvature of

depletion region where
metallization ends on surface 16
N 10
of silicon. Guard rings help to
mitigate this problem. +
N

Depletion layer forms right at

silicon surface where cathode
maximum field needed for
breakdown is less because of
imperfections, contaminants.

Copyright by John Wiley & Sons 2003 Diodes - 18

 Schottky Diode Switching Waveforms
Schottky diodes switch much
faster than pn junction diodes. No Current
minority carrier storage.
I
F
Foreward voltage overshoot VFP
much smaller in Schottky diodes. t
Drift region ohmic resistance RW. V
FP

Reverse recovery time trr much

V(on)
smaller in Schottky diodes. No
minority carrier storage. t
voltage
Reverse recovery current Irr
comparable to pn junction diodes. C(Schottky) 5 C(PN)
space charge capacitance in
Schottky diode larger than in pn
R (Sch.) << RW (pn)
junction diode becasue of W
narrower depletion layer widths
resulting from heavier dopings.

Copyright by John Wiley & Sons 2003 Diodes - 19

 Ohmic Contacts

Electrons diffuse from Al into p-

type Si becasue electrons in Al
have higher average energy.

Electrons in p-type Si form an Electron Energy

accumulation layer of greatly
E
enhanced conductivity. Al

E
Contact potential and rectifying Si
junction completely masked by Accumulation layer
i(t)
enhanced conductivity. So-called P-Si or
-
Al
ohmic contact. - N+-Si

In N+ Si depletion layer is very Diffusing

narrow and electric fields approach electrons
impact ionization values. Small
voltages move electrons across
barrier easily becasue quantum
mechanical tunneling occurs.

Copyright by John Wiley & Sons 2003 Diodes - 20

 PN Vs Schottkys at Large BVBD
Minority carrier drift region Desired breakdown voltage
relationships 1.3x1017
q"[n"+"p]"na"A"Vd requires Nd = and
IF BVBD
Wd
Wd 10-5 BVBD

Maximum practical value of na =1017

Large BVBD (1000 V) requires Nd
cm-3 and corresponding to
n + p = 900 cm2/(V-sec)
= 1014 cm-3 where n + p =
1500 cm2/(V-sec)
Desired breakdown voltage requires
Wd 10-5 BVBD IF Vd
3.1x106
IF Vd A [BVBD]2
= 1.4x106
A BVBD
Conclusion: Minority carrier
Majority carrier drift region devices have lower on-state
relationships
losses at large BVBD.
q"[n"+"p]"Nd"A"Vd
IF
Wd

Copyright by John Wiley & Sons 2003 Diodes - 21

 PSPICE Built-in Diode Model

Circuit diagram Components

Cj - nonlinear space-charge capacitance

+ i
diode
Cd - diffusion capacitance. Caused by excess
+
carriers. Based on quasi-static description of
v i (v ) stored charge in drift region of diode.
Cj j C
v d dc j
diode -
Current source idc(vj) models the exponential
Rs I-V characteristic.
-
Rs accounts for parasitic ohmic losses at high
v = vj + R i
diode s diode currents.

Copyright by John Wiley & Sons 2003 Diodes - 22

 Stored Charge in Diode Drift Region - Actual
Versus Quasi-static Approximation
x

+ -
One dimensional diagram of a
P N N+
power diode.

n(x,t) n(x,t)
time
Quasistatic view of decay of
time
excess carrier distribution
time
during diode turn-off.
n(x,t) = n(x=0,t) f(x)

x
0 Wd Redistribution of excess
carriers via diffusion ignored.
time Equ;ivalent to carriers moving
with inifinte velocity.
time time

Actual behavior of stored

charge distribution during
x turn-off.

Copyright by John Wiley & Sons 2003 Diodes - 23

Example of Faulty Simulation Using Built-in Pspice Diode Model
L
stray
50 nH

I o
+
D
f Test circuit example - step-down converter.
V 50 A
d

100 V - PSPICE diode model parameters - (TT=100ns

Sw
Cjo=100pF Rs=.004 Is=20fA)

Diode
Voltage

0V

-100V

-200V

-300V Diode voltage transient

-400V

-500V
0s 100ns 200ns 300ns 400ns 500ns
time

Diode
Current

100A

50A

0A

-50A

-100A
Diode current transient.
0s 100ns 200ns 300ns 400ns 500ns
time

Copyright by John Wiley & Sons 2003 Diodes - 24

 Improved (lumped-charge) Diode Model

N - region
More accurately model distributed nature p(x) = n(x)
of excess carrier distribution by dividing
it into several regions, each described by + N+
P Q3 Q
a quasi-static function. Termed the Q1 Q 4 region
region 2
lumped-charge approach.
x
d d

1
i
diode Circuit diagram of improved diode model. Circuit written in
+
D
terms of physical equations of the lumped-charge model.
v Gd
CJ j
- Vsense1
5 6 7 8
+ -
2
Rs + + +
Ee Re Em Rm Edm Cdm
3 - - - Rdm
+
Emo
- 0
4
+
Vsense2 - Detailed equations of model given in subcircuit listing.
9
Many other even better (but more complicated models available in
technical literature..
Copyright by John Wiley & Sons 2003 Diodes - 25
 Details of Lumped-Charge Model
Subcircuit Listing
.Subckt DMODIFY 1 9 Params: Is1=1e-6, Ise=1e-40, Tau=100ns, Symbolize subcircuit listing into
+Tm=100ns,Rmo=Rs=.001, Vta=.0259, CAP=100p, Gde=.5,
+ Fbcoeff=.5, Phi=1, Irbk=1e20,Vrbk=1e20
SCHEMATICS using SYMBOL
*Node 1= anodeand Node 9 = cathode WIZARD
Dcj 1 2 Dcap ; Included for space charge capacitance and reverse
*breakdown. Pass numerical values of
.model Dcap D (Is=1e-25 Rs=0 TT=0 Cjo={CAP} M={Gde} parameters Tau, Tm, Rmo,Rs, etc.
+FC={Fbcoeff} Vj={Phi} +IBV={Irbk} BV=Vrbk}) by entering values in PART
Gd 1 2 Value={(v(5)-v(6))/Tm +Ise*(exp(v(1,2)/Vta)-1)}
*Following components model forward and reverse recovery. ATTRIBUTE window (called up
Ee 5 0 VALUE = {Is1*Tau*(exp(V(1,2)/(2*Vta))-1)}; Ee=Qe within SCHEMATICS).
Re 5 0 1e6
Em 6 0 VALUE = {(V(5)/Tm-i(Vsense1))*Tm*Tau/(Tm+Tau)} See reference shown below for
*Em=Qm more details and parameter
Rm 6 0 1e6
extraction procedures.
Edm 7 0 VALUE = {v(6)};Edm=Qm
Vsense1 7 8 dc 0 ; i(vsense1)=dQm/dt Peter O. Lauritzen and Cliff L. Ma,
Cdm 8 0 1
Rdm 8 0 1e9 "A Simple Diode Model with
Rs 2 3 4e-3 Forward and Reverse Recovery",
Emo 3 4 VALUE={2*Vta*Rmo*Tm*i(Vsense2) IEEE Trans. on Power Electronics,
+/(v(6)*Rmo+Vta*Tm)}; Vm
Vsense2 4 9 dc 0
Vol. 8, No. 4, pp. 342-346, (Oct.,
.ends 1993)
Copyright by John Wiley & Sons 2003 Diodes - 26
 Simulation Results Using Lumped-Charge Diode Model

Diode voltage and current waveforms Simulation Circuit

L
Diode
10V stray
Voltage
50 nH
0V 0V
.
Io
D
+ V f
-10V d 50 A
410ns 415ns 420ns

-100V
- 100 V
Sw

-200V

0s 100ns 200ns 300ns 400ns 500ns

time
Diode
Current
Note soft reverse
50A
recovery and forward
voltage overshoot.
Qualitatively matches
0A
experimental
measurements.
-50A
0s 100ns 200ns 300ns 400ns 500ns
time

Copyright by John Wiley & Sons 2003 Diodes - 27