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0001001010011111
could be anything!
float
Instruction Register
holds current instruction
(IR)
operations
operands
15 instructions supported
10-bit address
10-bit integer
registers
type register name description
accum accumulator
user- areg address register
accessible
ctr counter
pc program counter
instruction-
cycle
ir instruction register
data paths
simulator
no assembler!
0x900a
opcode 9 does a subtract, specifically:
increment the PC
PC <- PC+1
transfer instruction to IR
IR <- MBR
example execute cycle in RTL
for SUB (opcode 9)
transfer address in SUB instruction to MAR
MAR <- IR(9:0)
do the subtraction
ACCUM <- MBR - ACCUM
//Fetch cycle
MAR <- PC // set the next memory address to that in the PC
PC <- PC+1 // increment the PC
get() // perform the memory cycle, placing mem[MAR] into MBR
IR <- MBR // transfer the instruction to the IR
//Execute cycle // do the instruction, in this case opcode 0x9, which is SUB
MAR <- IR(9:0) // transfer the address in the SUB instruction to the MAR
get()
ACCUM <- MBR - ACCUM // subtract the accumulator from the memory value
fetch example
memory
addr. value
0x0 0xb030
0x1 0x200a
0x2 0xb026
0x3 0x900a
0x4 0x2009
0x5 0x0
0x6 0x0
0x7 0x0
0x8 0x0
0x9 0x0
example: PC=0x3, ACCUM=0x26 0xa 0x30
0xb 0x40
//Fetch cycle
MAR <- PC // set the next memory address to that in the PC
PC <- PC+1 // increment the PC
get() // perform the memory cycle, placing mem[MAR] into MBR
IR <- MBR // transfer the instruction to the IR
execute example (SUB)
memory
addr. value
0x0 0xb030
0x1 0x200a
0x2 0xb026
0x3 0x900a
0x4 0x2009
0x5 0x0
0x6 0x0
0x7 0x0
0x8 0x0
0x9 0x0
now PC=0x4, ACCUM=0x26, IR = 0x900a 0xa 0x30
0xb 0x40
//Execute cycle // do the instruction, in this case opcode 0x9, which is SUB
MAR <- IR(9:0) // transfer the address in the SUB instruction to the MAR
get()
ACCUM <- MBR - ACCUM // subtract the accumulator from the memory value
Exercise 2A
http://fog.ccsf.edu/~mluttrel/cs270/exercises/ex2a.html
Exercise 2B
In today's class, we looked at the the RTL for
opcode 0x9, which is SUB.