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Note - A Tutorial On OrCAD Layout and Printed Circuit Board Fabrication PDF
Note - A Tutorial On OrCAD Layout and Printed Circuit Board Fabrication PDF
Authored by
Timothy Gramicconi (RC ’07)
(Now with Northrop Grumman Corp.)
May 2007
Table of Contents
1. Introduction.......................................................................................................1
2. Setup...................................................................................................................1
4. Footprints...........................................................................................................5
12. Layers...............................................................................................................22
References.................................................................................................................26
A Tutorial on OrCAD Layout and Printed Circuit Board Fabrication
1. Introduction
This tutorial is written to teach the reader Printed Circuit Board (PCB) design of a two
layer PCB using the OrCAD Layout and the Capture family of programs. OrCAD
version 10.1 was used for this tutorial. In addition, this tutorial contains procedural
details for in-house fabrication of PCBs. A detailed description of the PCB fabrication
process using photo development, and etching of the copper clad board is included.
Although this tutorial may generally be useful for all undergraduate students of electrical
engineering, it is specifically designed and written for the students in the
Communications Systems Design courses at Rutgers, The State University of New Jersey
to teach them how to make a semi-complicated PCB if is this is what there project calls
for.
The first step in the design of these boards is to familiarize yourself with the OrCAD
family of products, particularly OrCAD Capture which is used to draw the schematic
diagram, and also OrCAD Layout which is used for the actual layout design of the PCB.
The simulation process using PSPICE will not be mentioned since it does not directly
relate to PCB design, however It may be important to familiarize yourself with it’s
functions incase a design is to be simulated before it is built on a hardware level.
I would like to point out that being able to fabricate your own PCBs in-house at the
Microelectronics Research Laboratory (MERL) is a very valuable task which is rather
inexpensive and has a very fast turnaround time.
2. Setup
The first step in this process is to open your OrCAD capture program. Go to the File →
New → Project. When the popup box is given choose your location to save your files,
specify a unique name, and create the project using the Schematic option.
A black schematic screen is now opened so that you are ready to start creating your
schematic. (note: it is assumed that the student is familiar with using the PSPICE
program). Before we begin with the actual design, it is a good idea to set up your
libraries. This is important for the following two reasons. First it is convenient to have a
single list of components so that you do not have to search through multiple libraries
every time a new part is needed, and the second reason is that certain components are not
found in the given libraries and the schematic symbol will have to be made. First, I will
teach you how to make a simple schematic symbol.
3. Making a Symbol
To make the library click on File → New → Library. Now, if you minimize your
schematic template there will be a box that looks like Figure 1.
Here you can see that my schematic’s name is “test” and the corresponding library I have
created is shown underneath the library folder (shown with the AND gate symbol). Right
click on this box and click “new part”. Specify a name for the component, and leave the
rest blank for now and click “ok”. The following screen shown in figure 2 will pop up.
Under “value”, type in the name of your component. If your component is an IC it is safe
to leave the “U?” if it is another entity name it accordingly ( for instance a capacitor is
“C?”, resistor is “R?”). Click on the pin tool shown as being selected in the toolbar in
figure 3.
Specify the name and pin number according to the component’s data sheet. Follow these
steps for each appropriate pin. When you are finished click on rectangle tool; shown as
the forth icon from the bottom on the toolbar above. Now drag a rectangle in accordance
with the dotted line shown as the components perimeter.
Follow these steps for each component needed to be made in your schematic. If you need
components that already exist such as a resistor you simply click on the component →
press CTRL + c (to copy) → click on your library and press CTRL + v to paste the
component in your library. Often the component will give you extra parameters (shown
as a Schmitt trigger symbol in the AND gate); these can be deleted to make your library
nice and neat.
Now that you are done with your library it is time to start making your schematic. Route
the schematic according to your design exactly as if you are using Capture for a PSPICE
simulation. Instead of using the zero ground, it is safe to use any ground that you choose.
Note in the figure below that I have route power in a similar fashion as ground using the
VCC_Bar power connector, and labeling it accordingly. This is an important step to
follow which will make PCB design much easier as you will see later.
This is a schematic for a simple 8-20 MHz clock oscillator which we will be using
throughout this tutorial as a demo.
Note: The component labeled “Power” is a power jack, and component U2 is actually a
variable capacitor for 2-22 pF and the pot value is 1 kΩ).
You are now done with the Capture part of the PCB design, and it is time to get ready for
use of Layout.
Note: It is useful to label the capacitance values, resistor values, and inductor values in
this stage.
4. Footprints
A footprint is a set of copper pads that corresponds directly to the component leads. This
step is one of the most crucial steps to the design of the PCB. Any mix-up in a footprint
WILL ruin your entire design. Therefore extra-special care must be taken when
matching a footprint to the corresponding component.
To get to the footprint library manger, first open OrCAD Layout, and click on Tools →
Library manager. The Library manger screen should appear looking something like the
following in Fig. 5.
When selecting a footprint for a specific component, you must check the components
data sheet, and take note of all of its dimensions. For instance, if your component uses an
SOIC package, there are certain dimensions that the PCB designer must pay attention to.
If there are numerous packages for each chip, and you have a choice, I would recommend
using the SOIC package. It is not hard to solder, and it is not so large that the chip takes
up unnecessary room. The SOIC package is a Surface Mount (SMT) IC which many
chips are manufactured in. This is different from the breadboard mountable DIP
packages which we are often used. The pins physically mount through the board, and the
chips are often larger then necessary and take up extra space. There are also different IC
packages such as TSSOP and certain QFP packages which are very small, infact, they
will cause trouble later on when you are trying to solder the board. The SOIC package is
a great package for these applications when we are making our own boards, and soldering
them as well.
Fig. 6 shows the inverters chip dimensions for the SOIC package. Now in order to find
the footprint for this package we will open the library manger, and open the footprint
library called SOG. The SOG library will have many of the footprints for the most
common SMT IC’s we use in our designs (SOIC, TSSOP, etc.). In the SOG library there
is a list of different footprints and the differences may be very slight. The distance
between two adjacent pins is called the pitch, and this is a very important value. You
may see a footprint with the name SOG.050/18/WG.350/L.550. What this means is that
the pitch is .050 inches, the number of pins is 18, the gull width or the width from one pin
end to another is .350 inches, and the length is about .550 inches. Let’s now pick a
footprint for the inverter IC which we have chosen. You can see that the pitch is .050,
the number of pins is 14, the gull width is about .244, and the length is about .344.
Therefore the footprint we can use is, SOG.050/14/WG.244/L.350. The length is the
only value that does not have to be exact. Just pick a footprint length that is the next
larger then the IC itself. This is an image of the corresponding footprint chosen for the
inverter IC.
There are instances when a footprint for your IC package may not exist. If this happens a
footprint must be made according to the specifications on the data sheet.
5. Making Footprints
To start this process, click on the “Create New Footprint” button in the library manager.
A popup box will ask you for the name of the component, and the units required. Click
on the units specified for the footprint (Note: This is normally going to be English. The
unit mils stand for one millionth of an inch, NOT millimeters). Next, if you are making
the footprint for an IC, you can Use the “Pad Array Generator”, otherwise just press
“OK”. If you are using the “Pad Array Generator”, then put in the parameters needed to
make the pad. You will now see a circle in the center of your black screen. This circle
represents a “Pad” which is the way in which one pin will be mounted to your PCB.
Depending on which component we are designing, this pad may have to be changed.
Next, I will show the design of the footprint for a power jack. For through-hole
components, make sure that your pads are large enough to manually drill through while
allowing enough room for the pins. I recommend using a pad that has a copper section
no less then 80 mils. To ensure this, click on the circle with a 1 in it in the toolbar, as
shown in the toolbar figure below.
Next, select padstacks, and the pad that you are using should be highlighted. Change the
parameters to the following as shown in Fig. 9.
This will now ensure that your pads are large enough to place the pin through, while
having enough room to solder the pin to the board. The next step is to follow the
specifications on your data sheet and design the footprint for the power jack shown in the
Fig. 10.
The dimensions can be determined from the X,Y coordinates in the top left corner of the
screen. Make sure that you follow the pin out according to the way in which you
connected your design in Capture. To add a new pin, right click your mouse and select
new. To place the part, left click. When you are complete making your pads, you must
make a place outline around your component. To do this, click on the following icon:
This is the Obstacle tool. Right click and select new, right click again and click on
properties. The Edit Obstacle screen will appear as shown in Fig. 11.
Change the obstacle type to place outline. The obstacle layer should be changed to
Global, and then click ok. Next, click and drag your box until it resembles the
component made. This will show the outline of where the component is on the board.
This also makes sure that you do not place components over one another. The finished
power connector is in Fig. 12.
Save the footprint into a directory by selecting “Save As”. I like to save all of my
footprints into a directory labeled “MYFOOTPRINTS”.
It is a good idea to print the component package, make sure that the pins align correctly
with your actual component before making the board. To do this we print the board, and
line up the pads to the pins. Printing will be demonstrated later after the design is
complete.
So far in this tutorial, you have learned how to make your design in Capture, and make
the footprints for each component. It is now time to transfer your design into Layout, and
begin designing the board.
I have chosen a footprint for C1 which is a 0603 SMT package that can be seen in Fig.
13. When this is completed, it is time to create the “netlist”. A “netlist” is a file that has
every connection of your schematic in a text file. This can be read by the Layout
program directly to set up the connections made, and the components you will need. For
larger designs, this is absolutely necessary. To begin creating the “netlist”, click on the
schematic name in the design template window behind your design as shown in the
shown in Fig. 14.
After this is does, click on the following toolbar icon: . If this icon is not lit up,
make sure that you have clicked on the corresponding schematic in the design template.
Make sure that the Layout Tab is selected, and press OK. This will create an .MNL file
which can be opened and recognized by Layout.
In the “Input layout TCH or MAX file” box, press the Browse icon, and select the
default.tch file. In the “Input MNL” file box, browse for the “netlist file” that was
created. This file should be in the folder to which you have saved your Capture project.
Once this is done click “Apply ECO”.
A new file will open in your Layout program, and you will have a blank page with your
footprints and some connections that look similar to Fig. 18.
This image shown in Fig. 18 is called the Ratsnest. Each yellow line connecting one pad
to another pad represents a connection that must be routed.
Once the obstacle is set up, click in the center of the datum, and then click each corner of
the board. Specify the dimensions by viewing the coordinates in the top left corner of the
Layout window. Once the board outline is made, the components are to be placed within
the board outline. Make sure the DRC icon is unselected. Click on the following icon:
Before we start placing components, some user design settings must be changed. Go to
Options → System Settings and change the settings as shown in Fig. 20.
Note: When placing the board it may be useful to turn the nets (connections) off by
clicking on the following icon .
To rotate a component you can click on the component and press “R”. To place a
component on the bottom layer, from the top layer, right click on the component and
click “opposite”.
After the board is placed, it should look something like Fig. 21.
We can start out by clicking on the “View Spreadsheet” icon and selecting nets. A
list of your nets will be given. You can begin by right clicking on your ground net and
selecting change color. You can change this net to any color you want (avoid red since it
will blend in with a copper pour). Do this for all of the important nets. You can see that
I have already done this in the image above (ground nets are green, power is blue). In the
same spreadsheet, it is necessary to change the trace width. I recommend that you do not
use a trace width any smaller then 15 mils, since there will be problems when etching.
To change the nets width, click on a net (or numerous nets by holding “CTRL”) and then
right click and select “properties”. A box will appear as seen in Fig. 22.
I have chosen to pick the minimum width of 15 mils, the connection width that will be
used is set to 20 mils, and the max width that I have selected is 20 mils. You can specify
a specific value for any net, or make them all the same width. It is sometimes a good
idea to make your power nets larger then the rest, since there is often higher current
flowing through these nets then any other.
Make sure that the “Enable Copper Pour”, and the “Use Pours for Connectivity” boxes
are checked, as in Fig. 23.
Now it is time to make the pour. Click on the Obstacle tool from the toolbar, and right
-click to select a new obstacle. Then right-click and select Properties. Change the values
to what is shown in Fig. 24.
Make sure that the “Net Attachment” is chosen to link the ground net. Click “OK” and
draw your pour with the same dimensions overtop of the board outline.
You will see the board go red. If it goes green, you have chosen the top layer instead of
the bottom layer. The board should now look something like Fig. 25.
You will see that the ground nets on all of the through-hole components disappear. These
grounds will be connected directly to your ground plane through a thermal relief. Click
on Options → Thermal Relief Settings, and change your small thermal relief spoke width
to 20 mils. Click Auto → Refresh All, and the width of the spokes of your thermal relief
should have changed to 20 mils from default 10 mils. We do this so that you do not have
problems in the etching phase of the design.
Note: Auto → Refresh all will be used often in the remainder of this tutorial, and I will
refer to it as “refreshing the board”.
12. Layers
The last thing that must be done before routing is to select the layers that we will use, and
deselect the rest of the layers. Click the spreadsheet icon and choose layers. For this
board we will only be using the bottom and the top layers. There are other layers that
will be selected as routing layers from default. Hold “CTRL” and click on all the other
layers as I have shown in the following picture and set them to unused routing. (leave the
doc and drill layers as they are since they will not affect anything.
There is also a way to “fanout” the board, and place vias to ground everywhere a ground
is needed. To do this go to the nets spreadsheet and disable all nets, except for ground,
and choose Auto → Fanout Bard.
There are two different manual routing tools to use, and they both behave quite
differently. These tools are “Add/Edit Route mode” and “Edit Segment Mode”. I
personally use the Edit segment mode more regularly, however both have their benefits.
They will also take some getting used to, so play around with them and figure out what
mode you prefer to use. If you right click while you are in either mode, there is a list of
choices to unroute certain traces. Again personal preference will play a large factor when
routing a board. Manually routing takes some getting used to, however once you make a
few boards the process becomes much easier.
A via is a connection from one layer of the board to another. If you press “V” while you
are routing, a via will be placed. After a via is placed you can route from the bottom or
top layer, which ever suites you. In some instances the program will not allow you to
place a via. In this case the place free via may be used. An example of a via is shown in
Fig. 27.
When you have a trace, and you do NOT want it to be unrouted during an autounroute, it
is possible to lock the trace. To do this, simply click on the trace and press “L”, or right
click and choose lock. This will prevent a trace from being changed at any time during
the “Auto” functions.
When you are routing through a copper pour, the pour will not repour until the screen is
refreshed. After routing, the board will look similar to Fig. 28.
Make sure that every trace is checked by hand to make sure that all of the connections are
made. It is possible to use the tool Auto → Design Rule Check to make sure that all of
the connections are made. There will almost always be errors, however, you can check
the errors and make sure that they are not important by clicking on the Error tool and
then the Query tool , and click on an error. The error number and the error type can be
seen in the Query window.
The board design is now done, and it is now time to fabricate the board.
To print first go to Options → Post Process Settings, now click on the layer that you want
to print (bottom or top) then right click and choose “Plot to Print Manager”. You can
also print a copy of the AST layer on white paper which will show how your components
are laid out for soldering. Print your Top and Bottom layers each on a separate
transparency.
Expose each side of the board to an Ultraviolet light source for 8 min on each side. It is
crucial to make sure that the transparencies do not move. If there is a slight movement,
the vias will not line up, and there will be problems when drilling your board.
After the board is exposed, submerge the board in a bath of sodium hydroxide (NaOH)
solution mixed to the ratio of 1 part NaOH to to 10 parts water. Lightly brush the board
to agitate the photoresist. The photo-resist that was exposed to the UV light will
dissolve, but the photo-resist that was not exposed to the UV will still be present. Make
sure that the solution is not made to strong, as it will remove all of the photo-resist and
your board will be ruined. After the board is developed, rinse the board with water to
remove the sodium hydroxide. Look at the board for any errors, since they can be fixed
by filling in the errors with a black Sharpie marker.
After this stage the image as seen on the transparency should be seen on the copper clad
board.
The board is now to be set into a bath of ferric chloride which will etch the copper away
in the places where copper is exposed. Everywhere that the photo-resist is still present,
the copper will remain. This will take approximately 45 min - 1 hour to remove all of the
unwanted copper. Be sure not to over etch the board because you will have problems.
Keep checking the board regularly. Again, rinse the board in water to remove the excess
ferric chloride.
The board is now rinsed with acetone to take off the remaining photoresist, and then the
board is once again rinsed off with water.
You now have a complete PCB with copper traces as designed in layout. The vias are
now to be drilled with a Dremel tool, and a 30 gauge copper wire is placed through the
board, and soldered on each end. When drilling the board make sure that the drill is set to
a very high speed so that the pads are not lifted on the bottom side of the board. Next,
align the components as they are shown on the AST layer printout. It is crucial that all of
the chips are oriented in the correct direction, and all of the pin 1’s are in their proper
places.
All of the tools for designing and fabricating a double sided PCB are now in place. Good
luck with your designs.
References
1. Data Sheet, Hex inverter, Fairchild Semiconductor Corp., Available at:
http://www.fairchildsemi.com/ds/74/74AC04.pdf, February, 2005.