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Passive Frequency-Rejection Filter Using Improved-Q technique

LNA blocks of wireless receivers should in general comply with very severe requirements regarding blocking desensitization. As an example, in CDMA systems, operating in full-duplex mode, the mobile phone receiver’s LNA might work with maximum gain trying to process a very week signal while its transmitter needs to send to base-station its maximum output power. The transmit signal, even though is attenuated by the duplexer following the antenna, can leak towards LNA’s input, gets amplified cross-modulates and in the mixer a powerful jammer coming from a nearby base-station. Desensitization can also take place in the receiver due to transmitter’s noise mixing with the jammer, or the jammer reciprocally mixing with the local oscillator’s phase noise.

For these reasons, between the output of the LNA and the input of the mixer, phone makers add an external SAW filter to attenuate the leakage of the transmit signal.

Also, in GSM standard phones, a desired signal just about the phone’s sensitivity level can be accompanied by a strong blocker, as close as 80MHz to the edge of the PCS band. While the amplifier is forced to work at its maximum gain, the blocker must be attenuated before it reaches the mixer stage or before is intermodulating the LNA block.

SAW filters, besides being bulky and adding to the cost of the phone, can not be tuned, which is desirable for sharing the same LNA in a multi-band radio.

TV tuners also need tuned-selective filters in their receive front-end, especially the ones used in off-air or terrestrial broadcasting. The input signals of these tuners have a wide range of input power and there could be desired week signals in the presence of strong undesired cannels which need to be attenuated before demodulation takes place.

Integrating a tunable selective filter in the front end of the receiver is then very desirable. Since the achievable Q of the on-chip inductors is pretty much limited between 10 and 20, there is a need to improve this quality factor.

An example of such an integrated circuit rejection filter is the schematic in fig. 1 bellow, disclosed in the US patent 6,867,665 b2.

Passive Frequency-Rejection Filter Using Improved-Q technique LNA blocks of wireless receivers should in general comply with

Fig.1

The parallel tank formed by L, C1 and C2 is a rejection circuit between input and output of the filter. Resistor R is required in order to improve the equivalent Q of the circuit. The remaining components in the schematic of fig. 1 (C3, C4, R1 and R2) are not desired, but they represent parasitic components associated with desired capacitors C1 and C2. They model parasitic capacitances and losses in the substrate of an integrated circuit in which C1 and C2 are implemented.

There are some drawbacks associated with this schematic.

The existence of C3, R1 and C4, R2 degrade the equivalent Q of the circuit, making it less selective (meaning that around the rejection frequency the transfer function of this circuit doesn’t vary very quickly). Also, when making this circuit tunable (by varying the value of capacitors C1 and C2) both plates of these capacitors are “hot” (carrying signal). This is a problem since the active elements performing the switching or tuning of these capacitors will add noise and nonlinearities to the circuit. Also if possible, is preferable to use only one variable capacitor instead of two.

There is a need to improve this solution and it is the purpose of the present disclosure to amend these issues, as can be seen in the following description.

In fig. 2 bellow r represents the losses of inductors L and capacitor C. R is added to the circuit to improve the Q of the circuit as it’ll be explained. If the triangle mnp in fig. 2 is transformed into a star between these three nodes, we obtain the circuit in fig. 3a).

The parallel tank formed by L, C1 and C2 is a rejection circuit between input and
Fig.2 Fig.3
Fig.2
Fig.3

The important thing to emphasize here is that the circuit in fig. 3a) is equivalent to the one in fig. 3b) and between nodes o and ground we have essentially a series RLC circuit which at resonance remains with a resistance Rb equal to:

The parallel tank formed by L, C1 and C2 is a rejection circuit between input and

where Q is the quality factor of inductor L. As can be seen R can be selected such that Rb = 0 In this case, if we apply a current generator at the input of this network and measure the output current into a short-circuited load, we can obtain a transfer function as in fig. 4

bellow, where f is a frequency between 1900MHz and 2200MHz, Iout(f) is the short-circuit output current and the resonance is selected to take place at 1980MHz:

bellow, where f is a frequency between 1900MHz and 2200MHz, Iout(f) is the short-circuit output current

Fig. 4

The advantage of the circuit disclosed in fig. 2 over the one disclosed in US patent 6,867,665 b2 is the fact that capacitor C has now one plate connected to ground and if this is selected to be the bottom plate then all parasitics associated with this plate are short-circuited to ground, with no effect on overall Q of the circuit.

Another embodiment of the present invention immerges from fig. 2 if one can realize that the two L inductors in branches mp and np can represent the primary and secondary leakage inductors of a transformer with a coupling coefficient k, like in fig. 5 bellow:

bellow, where f is a frequency between 1900MHz and 2200MHz, Iout(f) is the short-circuit output current
Fig. 5 Fig. 6
Fig. 5
Fig. 6

where Lp, k and r represent the magnetization inductance, the coupling factor and the losses of the transformer. If now we represent the transformer by its T equivalent circuit, we obtain the circuit in fig. 6 which essentially is similar to the one in fig. 2 to which an inductor Lp is added in series with the capacitor C, so that a new value for C needs to be recalculated in order to preserve the same resonance frequency. As an example, if the magnetization

inductor is 5nH, k = 0.8, Q = 10 (r = 6.22ohms), C =1.2pF and R = 20.7ohms then the transfer characteristic of the circuit in fig. 6 is the one plotted in fig. 4 above.

The transformer can be implemented either as a layout structure in different layers of an integrated circuit or it can be fabricated using bond-wires. Bellow in fig. 7 is an example of using a package portion to implement this circuit:

inductor is 5nH, k = 0.8, Q = 10 (r = 6.22ohms), C =1.2pF and R

Fig. 7

Inside the package there’s a resistor and a capacitor connected together to the package, whereas outside the package the two short-circuits connect in series two adjacent bond-wires. With typical values for the model components of the package, a capacitance value of 3.6pF and R varying between 1ohm and 2ohms we can obtain a transfer function like in fig. 8 bellow, where the maximum rejection is obtain for R = 1.5ohms:

inductor is 5nH, k = 0.8, Q = 10 (r = 6.22ohms), C =1.2pF and R

Fig. 8

As can be seen, since the Q of a bond-wire is relatively high, the bandwidth of the rejection might not be wide enough. Accordingly there might be necessary to couple two portions of the package in parallel with C values slightly different like in fig. 9 bellow. If the two series resonances are separated one from the other such that they lay to the left and to the right of the bandwidth of interest, then we can obtain a transfer function corresponding to a band-pass filter like in figure 10 bellow, where the two capacitors are selected so that the rejection frequencies take place at 2GHz and 2.3GHz respectively.

Fig. 9 . 10 Fig Such a configuration might be useful for instance in a completely
Fig. 9 . 10
Fig. 9
. 10

Fig

Such a configuration might be useful for instance in a completely integrated TV tuner solution, where first the signal is upconverted to a 2GHz band for image rejection, and then down-converted to baseband or a low IF frequency.

Claims

  • - The circuit in fig.2 having one resistor R, one capacitor C and two inductors L implemented in an IC technology

  • - The circuit in fig. 2 having one resistor and one capacitor implemented in IC technology and two inductors inside the chip fabricated using bond-wires

  • - The circuit in fig. 5 having one resistor R, one capacitor C and one transformer T implemented in an integrated circuit technology

  • - A schematic having a resistor R and a capacitor C in an IC technology and connected to a transformer implemented by two (or more) package bond-wires mutually coupled like in fig. 7

  • - The schematic in fig. 9 having one resistor R and two capacitors C1 and C2 with slightly different values necessary to enlarge the rejection bandwidth, connected to two transformers implemented by using bond-wires of an IC package

  • - Also the schematic in fig.9 having the two capacitors tuned such that the two rejection frequencies are to the left and to the right of the pass-band of interest.

NOTE

I didn't apply for a patent in the one year time-frame from the provisional application

for a patent, so this now is public domain.

Raducu Lazarescu, raduculazarescu@netscape.net