Maulana Abul Kalam Azad University of Technology, PGMVD – 201

West Bengal
M.TECH. SEMESTER - II, FEBRUARY 2018
Home Work – I
PGMVD – 201: ANALOG VLSI CIRCUITS
(SOLUTION)

1 a)

For the circuit shown above plot the transconductance against the drain-to-source voltage of
M1 .

Solution:

b) Explain channel-length modulation in a MOSFET and derive the equation for the drain-
current in its presence.

MAKAUT, West Bengal, M.Tech. Semester–II, Home Work, February 2018 (Course # PGMVD – 201) Solution Page 1 of 7
 Solution:

c) Prove that the transconductance of a MOSFET in the presence of channel-length modulation

is
𝑊
µ𝑛 𝐶𝑂𝑋 𝐿 𝐼𝐷
𝑔𝑚 = √ where symbols carry their usual meaning in this context.
1 + 𝜆𝑉𝐷𝑆

MAKAUT, West Bengal, M.Tech. Semester–II, Home Work, February 2018 (Course # PGMVD – 201) Solution Page 2 of 7
 Solution:

2 a) For the circuit shown below calculate the drain-current as a function of VGS and VDS and
prove that it can be viewed as a single transistor with an aspect ratio of W/(2L). Assume that
neither body-effect nor channel-length modulation exists, i.e., λ = γ = 0.

Solution:

MAKAUT, West Bengal, M.Tech. Semester–II, Home Work, February 2018 (Course # PGMVD – 201) Solution Page 3 of 7
 b)

Prove the following relationship that keeps the NMOS transistor M1 in saturation. Assume
that C1 acts as a AC short at the frequency of operation.
VGS3 + VTH1 ≥ VGS2 where VGS2(3) = Gate-to-source voltage of the transistor M2(3).

Solution:
If𝑉𝑖𝑛 =𝑉𝐷𝐷 , we may write𝑉𝑋 =𝑉𝐷𝐷 − 𝑉𝐺𝑆3
And if𝑀1 is to operate in saturation we must have𝑉𝐷𝐷 − 𝑉𝐺𝑆3 − 𝑉𝑇ℎ1 ⩽ 𝑉𝐷𝐷 − |𝑉𝐺𝑆2 |
Therefore,𝑉𝐺𝑆3 + 𝑉𝑇ℎ1 ⩾ |𝑉𝐺𝑆2 |

MAKAUT, West Bengal, M.Tech. Semester–II, Home Work, February 2018 (Course # PGMVD – 201) Solution Page 4 of 7
 3 a) Draw the circuit diagram and its small-signal equivalent of a MOSFET cascode amplifier
and prove that its output resistance can be expressed as

where gm2 = transconductance of the MOSFET in the CG stage, ro2 = resistance due to
CLM of the MOSFET in the CG stage, ro1 = resistance due to CLM of the MOSFET in the
CS stage.

Solution:

MAKAUT, West Bengal, M.Tech. Semester–II, Home Work, February 2018 (Course # PGMVD – 201) Solution Page 5 of 7
 b) Draw the small-signal equivalent circuit of a CS stage with a load resistance RD in the
presence of channel-length modulation and hence derive the equation for its voltage-gain.
Hence find the voltage-gain if the load resistance is replaced with an ideal current-source.

Solution:

The small-signal equivalent for the circuit shown above is

Since both body and source terminals are connected to ground there would be no body-effect.

Applying KVL around the input-loop we may write𝑉1 =𝑉𝑖𝑛

𝑉𝑜𝑢𝑡 𝑉𝑜𝑢𝑡
Applying KCL at the output node we get + +𝑔𝑚 𝑉1 =0
𝑅𝐷 𝑟0
𝑉𝑜𝑢𝑡
Therefore, the voltage-gain𝐴𝑉 = = − 𝑔𝑚 (𝑅𝐷 ∥ 𝑟0 )
𝑉𝑖𝑛
If the load resistance is replaced with an ideal current-source, lim 𝐴𝑉 = − 𝑔𝑚 𝑟0
𝑅𝐷 →∞

4 a) Find the condition under which a MOSFET behave as a linear resistance and hence derive
the equation for this resistance in terms of gate-to-source voltage.

Solution:
1 𝑊
Drain current 𝐼𝐷 = µ𝑛 𝐶𝑂𝑋 [2(𝑉𝐺𝑆 − 𝑉𝑇ℎ ) − 𝑉𝐷𝑆 ]𝑉𝐷𝑆
2 𝐿
If𝑉𝐷𝑆 ≪ 2(𝑉𝐺𝑆 − 𝑉𝑇ℎ )we can write
𝑊
𝐼𝐷 = µ𝑛 𝐶𝑂𝑋 (𝑉𝐺𝑆 − 𝑉𝑇ℎ )𝑉𝐷𝑆
𝐿
Therefore, the MOSFET behaves as a linear resistance with resistance
𝜕𝐼𝐷 𝑊
𝑅𝑂𝑁 = = µ𝑛 𝐶𝑂𝑋 (𝑉𝐺𝑆 − 𝑉𝑇ℎ )
𝜕𝑉𝐷𝑆 𝐿

MAKAUT, West Bengal, M.Tech. Semester–II, Home Work, February 2018 (Course # PGMVD – 201) Solution Page 6 of 7
 b) Find IX in the following circuit. Assume that there is no CLM and body effect.

Solution:

𝑅1
𝑉𝐺𝑆 = (𝑉𝑋 − 𝑉𝐷𝐷 ) … … . (1) 𝑎𝑛𝑑 𝑉𝐷𝑆 = 𝑉𝑋 − 𝑉𝐷𝐷 … … . . (2)
𝑅1 + 𝑅2

𝐶𝑎𝑠𝑒 − I: The 𝑃𝑀𝑂𝑆 𝑑𝑒𝑣𝑖𝑐𝑒 𝑜𝑢𝑡 𝑜𝑓 𝑐𝑢𝑡𝑜𝑓𝑓: 𝑉𝐺𝑆 < −|𝑉𝑇𝐻2 |

𝑅1
∴ (𝑉 − 𝑉𝐷𝐷 ) > −𝑉𝑇𝐻2 ;
𝑅1 + 𝑅2 𝑋
𝑅2
⇒ 𝑉𝑋 < 𝑉𝐷𝐷 − (1 + ) 𝑉𝑇𝐻2
𝑅1
2
1 𝑊 𝑅1 𝑉𝐷𝐷 − 𝑉𝑋
∴ 𝐷𝑟𝑎𝑖𝑛 𝑐𝑢𝑟𝑟𝑒𝑛𝑡: 𝐼𝑋 = 𝜇𝑝 𝐶𝑂𝑋 ( ) ((𝑉𝐷𝐷 − 𝑉𝑋 ) − 𝑉𝑇𝐻2 ) +
2 𝐿 2 𝑅1 + 𝑅2 𝑅1 + 𝑅2

𝐶𝑎𝑠𝑒 − 𝐼𝐼: The 𝑃𝑀𝑂𝑆 𝑑𝑒𝑣𝑖𝑐𝑒 𝑖𝑛 𝑐𝑢𝑡𝑜𝑓𝑓: 𝑉𝐺𝑆 > −|𝑉𝑇𝐻2 |;

𝑅2
⇒ 𝑉𝑋 > 𝑉𝐷𝐷 − (1 + ) 𝑉𝑇𝐻2 and the drain current is zero.
𝑅1

𝑉𝐷𝐷 − 𝑉𝑋
∴ 𝐼𝑋 =
𝑅1 + 𝑅2

MAKAUT, West Bengal, M.Tech. Semester–II, Home Work, February 2018 (Course # PGMVD – 201) Solution Page 7 of 7