APPLIED PHYSICS LETTERS 97, 083301 共2010兲

Device characteristics of short-channel polymer field-effect transistors

Takeshi Hirose,1 Takashi Nagase,1,2,a兲 Takashi Kobayashi,1,2 Rieko Ueda,3 Akira Otomo,3
and Hiroyoshi Naito1,2,b兲
1
Department of Physics and Electronics, Osaka Prefecture University, Sakai 599-8531, Japan
2
The Research Institute for Molecular Electronic Devices, Osaka Prefecture University,
Sakai 599-8531, Japan
3
Kobe Advanced ICT Research Center, National Institute of Information and Communications Technology,
Kobe 651-2492, Japan
共Received 15 January 2010; accepted 29 July 2010; published online 23 August 2010兲
The influence of channel materials on the electrical characteristics of organic field-effect transistors
共OFETs兲 with short-channel lengths ranging from 1 ␮m to 30 nm is investigated using polymer
semiconductors. The current-voltage characteristics of short-channel OFETs strongly depend on the
electrode/organic semiconductor contacts, and the parabolic output current due to space-charge
limited current can be reduced by increasing the ionization potential of organic semiconductors.
Transistor operations with a high on/off ratio over 103 are achieved in OFETs with 30 nm length
channels. © 2010 American Institute of Physics. 关doi:10.1063/1.3480549兴

The electrical performances of organic field-effect tran-
sistors 共OFETs兲 have significantly improved in the past de-
cade and flexible active-matrix organic light-emitting diode
共OLED兲 displays with an OFET backplane have recently
been demonstrated.1 However, further improvement in the
performances of OFETs remains necessary to realize high
output current and high frequency devices, and enhancement
in the charge mobility of organic semiconductors is espe-
cially crucial. An alternative approach for improving OFET
performances is the downscaling of channel lengths 共L兲,
which are currently several tens of micrometer, into the sub-
micrometer regime. The output current and operational fre-
quency of FET devices are well known to be, respectively,
proportional to L−1 and L−2, and the shrinkage of the L is
therefore a critical issue for enhancing OFET characteristics
as well as realizing high-integrated OFET circuits. However,
it has been reported that short-channel OFETs typically suf-
fer from high space-charge limited current 共SCLC兲, which is
caused by the application of a high source-drain electric field
to the organic semiconductor channel and which significantly
degrades transistor characteristics 关parabolic drain current-
voltage 共Id-Vd兲 characteristics without current saturation and
increase in the off current兴.2–5 Recently, such short-channel
effects in OFETs have been found to strongly depend on the
device architecture and can be suppressed by inserting an
insulating mesa structure between source and drain
electrodes6 or by using ultrathin gate dielectrics.7
In this letter, we investigate the influence of channel ma-
terials on the electrical characteristics of short-channel
OFETs. Bottom-contact p-type OFETs with L ranging from
1 ␮m to 30 nm were fabricated using polymer semiconduc-
tors with different ionization potentials. The short-channel
effects in OFETs can be reduced by increasing the ionization
potential of organic semiconductors. The transistor opera-
tions are demonstrated in OFETs with 30 nm length chan-
nels.
Figure 1共a兲 shows a schematic diagram of the fabricated
bottom-contact OFET devices. For the channel materials,
a兲
Electronic mail: nagase@pe.osakafu-u.ac.jp.
b兲
Electronic mail: naito@pe.osakafu-u.ac.jp.
we used three different polymer semiconductors of regio-
regular poly共3-hexylthiophene兲 共P3HT兲, poly共2,5-bis共3-
hexadecylthiophene-2-yl兲thieno关3,2-b兴thiophene兲 共pBTTT兲,
and poly共9,9-dioctylfluorene-co-bithiophene兲 共F8T2兲, whose
ionization potentials were 4.9 eV,8 5.1 eV,9 and 5.5 eV,10
respectively. Their chemical structures are shown in Fig.
1共b兲. A heavily doped Si wafer with a thermally grown SiO2
layer whose thickness was 200 or 50 nm was used as a sub-
strate. Ti/Au source-drain electrodes with different L
共1 ␮m – 30 nm兲 were patterned on the SiO2 surface using
electron beam lithography and a lift-off technique. The bot-
tom thin Ti layer 共1–2 nm兲 was employed to promote the
adhesion of the Au layer to the underlying SiO2 surface. The
channel width 共W兲 was scaled to maintain W / L = 10 in order
to adjust the dimension of output current in the devices hav-
ing different L. A scanning electron microscope 共SEM兲 im-
age of a fabricated electrode with L = 30 nm is displayed in
Fig. 1共c兲. The substrate was ultrasonically cleaned in acetone
and 2-propanol, followed by UV/ O3 cleaning. Then the SiO2
surface was chemically modified with self-assembled mono-
layers 共SAMs兲 of phenethyltrichlorosilane or octadecyl-
trichlorosilane 共ODTS兲 to enhance the field-effect mobility.11
For the pBTTT FETs, ODTS SAMs were used.12 Finally, the
semiconductor layers were deposited on the substrate sur-
faces by spin coating or drop casting from a toluene solution,
followed by annealing at 100 ° C in vacuum to remove dop-
ants such as O2 and H2O from the semiconductor layers. The
I-V measurements of the fabricated OFETs were performed
in vacuum in a probe station 共Desert Cryogenics TTP-4兲 us-
ing source meters 共Keithley 2611 and 2400兲 at room tem-
perature.
Figure 1共d兲 shows the output characteristics of P3HT
FETs with L of 1 ␮m, 100 nm, and 30 nm. The SiO2 thick-
ness was 200 nm. As the channel length decreases, the Id-Vd
characteristics become parabolic and the Id at the gate volt-
age of Vg = 0 V increases. Such behavior is consistent with
the previous results in the literature3 and has been explained
by the increase in the bulk current due to SCLC.13 In the
P3HT FETs, the source-drain Au electrodes form Ohmic con-
tact to the P3HT semiconductors,10 and the application of the
Vd to the submicrometer channel leads to an extremely high

0003-6951/2010/97共8兲/083301/3/$30.00 97, 083301-1 © 2010 American Institute of Physics

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 083301-2 Hirose et al. Appl. Phys. Lett. 97, 083301 共2010兲

(a) (d) P3HT FET

Drain current (nA)

Organic semiconductor -80
SAM L=1 μm L=100 nm -8 L=30 nm Vg (V)
-60 -10 -40
Source Drain -6 -30
Ti/Au Ti/Au -40 -4 -20
-5 -10
SiO2 -20 -2 0
n+-Si (gate) 0 00 0 10
0 -10 -20 -30 -40 -5 -10 -15 0 -5 -10 -15
Drain voltage (V)
(b) C16H33
(e) pBTTT FET -0.8

Drain current (μA)

C6H13 S -0.8 -0.8
Vg (V)
S S L=1 μm L=100 nm L=30 nm -60
S
-0.6 -0.6 -0.6
S n n -50
P3HT pBTTT H33C16 -0.4 -0.4 -0.4 -40
-30
-0.2 -0.2 -0.2 -20
S
-10
S 0 0 0
n 0 -10 -20 -30 -40 0 -5 -10 -15 0 -5 -10 -15 -20
H17C8 C8H17
F8T2 Drain voltage (V)
(f)
Drain current (nA)
F8T2 FET -6
(c) Vg (V)
-40 L=1 μm -15 L=100 nm L=30 nm -60
Au -30 -4 -50
-10
-20 -40
-2 -30
SiO2 -10
-5
-20
Au -10
0 0 0
100 nm 0 -10 -20 -30 -40 0 -5 -10 -15 0 -5 -10 -15 -20
Drain voltage (V)

FIG. 1. 共Color online兲 共a兲 Schematic diagram of fabricated bottom-contact OFET device. 共b兲 Chemical structures of polymer semiconductors used in this
study. 共c兲 A SEM image of source-drain electrodes with L = 30 nm. Output characteristics of 共d兲 P3HT FETs, 共e兲 pBTTT FETs, and 共f兲 F8T2 FETs on
200-nm-thick SiO2 dielectrics with channel lengths of 1 ␮m, 100 nm, and 30 nm.

source-drain electric field, resulting in significant contribu-
tion of SCLC to Id.
Figures 1共e兲 and 1共f兲 show the output characteristics of
pBTTT and F8T2 FETs on 200-nm-thick SiO2 dielectrics
with different L, respectively. The parabolic Id-Vd character-
istics as observed in the P3HT FETs are significantly sup-
pressed, and pBTTT and F8T2 FETs with L = 1 ␮m exhibit
standard transistor characteristics with Id saturation. These
results are attributed to the formation of Schottky barriers for
hole injection in the pBTTT and F8T2 FETs caused by the
potential difference between the work function of source Au
electrode 共4.9 eV兲 and the ionization potential of the polymer
semiconductors, which leads to contact-limited charge trans-
port and suppresses the SCLC.
It can be seen in Fig. 1共e兲 that the pBTTT FET with L
= 100 nm shows parabolic Id-Vd characteristics and low cur-
rent modulation whereas the pBTTT FET with L = 30 nm
exhibits linear Id-Vd characteristics and enhanced current
modulation. Similar enhancement in the current modulation
by shrinking the L is observed in F8T2 FETs and the F8T2
FETs with L = 30 nm exhibits clear Id saturation behavior
despite using thick SiO2 gate dielectrics 共200 nm兲, as shown
resulting increase in the effectiveness of the gate electric
field at the channel region leads to the enhancement in the
Vg-induced current modulation in nanochannel OFETs. The
decrease in saturation current observed in F8T2 FETs with
shorter channel lengths reflects the increase in the contribu-
tion of the contact resistance to the channel resistance in
shorter channel devices; if this is not the case, current level
comparable to that of longer channel devices should be ob-
served in the shorter channel devices because of the same
W / L ratio.
To gain insight into the influence of the energy barrier at
the electrode/organic semiconductor contacts on the electri-
cal characteristics of short-channel OFETs, we examined
electrode modification with pentafluorothiophenol 共PFT兲
SAMs in pBTTT FETs. Figure 2 shows the output character-
istics of short-channel pBTTT FETs with PFT-modified Au
electrodes on 200-nm-thick SiO2 dielectric. The output cur-
rent is significantly altered from that of the devices with
nonmodified Au electrodes 关Fig. 1共e兲兴 and displays strong
parabolic behaviors with low Vg modulation. It has been re-
Drain current (PA)

in Fig. 1共f兲. The parabolic Id-Vd characteristics observed in -6 -0.8

the pBTTT FET reflect the lower ionization potential of L=1 Pm -1 L=100 nm L=30 nm
pBTTT 共5.1 eV兲 than that of F8T2 共5.5 eV兲, indicating the -0.6
-4
electrical characteristics of short-channel pBTTT FETs are -0.4
-0.5
also influenced by SCLC. The enhancement in the current -2
-0.2
modulation in pBTTT and F8T2 FETs with L = 30 nm can be
0 0 0
explained by the formation of the voltage drop at the source 0 -10 -20 -30 -40 0 -5 -10 -15 0 -5 -10 -15 -20
electrode/organic semiconductor contact due to the Schottky Drain voltage (V)
barrier.10,14 The voltage drop at the contact 共i.e., contact re-
FIG. 2. 共Color online兲 Output characteristics of pBTTT FETs with PFT-
sistance兲 should lead to the decrease in the net source-drain modified Au electrodes on 200-nm-thick SiO2 dielectric with channel
electric field at the channel region,5,7 which is more pro- lengths of 1 ␮m, 100 nm, and 30 nm measured at Vg = −60 to ⫺10 V in
nounced in the devices with shorter channel lengths. The 10 V steps.
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 083301-3 Hirose et al.
Drain current (nA) Vg (V) 10-6
Drain current (A)
-20
-300 (a) -7
-18 10
-200 -16 -8
10
-14
-100 -12 10-9
-10
-8 -10
0
0 -5 -10 -15 -20
10
Drain voltage (V)
FIG. 3. 共Color online兲 共a兲 Output and 共b兲 transfer characteristics of pBTTT
FET on 50-nm-thick SiO2 dielectric with channel length of 30 nm.
ported that surface modification with fluorinated SAMs in-
creases the metal work function owing to molecular dipoles15
and enhances the output current in OLEDs16 and OFETs.17
The observed parabolic Id-Vd characteristics in the devices
with PFT-modified Au electrodes are most likely to be
caused by SCLC because of the lowering of the hole injec-
tion barrier. The results in Figs. 1 and 2 clearly indicate that
the electrical characteristics of short-channel OFETs can be
controlled by the ionization potential of organic semiconduc-
tors.
It is expected that reducing the gate dielectric thickness
leads to further suppression of the short-channel effects.7 The
electrical characteristics of the pBTTT FET on the 50-nm-
thick SiO2 dielectric with the 30 nm channel are shown in
Fig. 3. Compared with the device on the 200-nm-thick SiO2
关Fig. 1共e兲兴, the SCLC considerably decreases, and the
device exhibits clear saturation behaviors with a high on/off
ratio over 103. The average field-effect mobility is
0.014 cm2 / V s, which is slightly decreased compared with
the device with L = 1 ␮m 共0.055 cm2 / V s兲. The field-effect
mobility of OFET devices is known to be strongly influenced
by contact resistance;12 the field-effect mobility generally in-
cludes the influence of contact resistance as well as intrinsic
charge mobility. The decrease in the field-effect mobility in
shorter channel devices is caused by the increase in the con-
tribution of the contact resistance to the channel resistance,
which becomes dominate as the channel length is reduced.
Reducing contact resistance is indeed important to real-
ize OFETs with the high output current and high cutoff fre-
quency. However, controlling contact resistance provides a
technologically useful approach to suppress the short-
channel effects in OFETs with reduced channel lengths,
which can lead to overall improvement in the output current
共⬀W / L兲 and cutoff frequency 共⬀1 / L2兲 as compared with
long-channel OFETs when the decrease in field-effect mobil-
ity by shrinking channel length is not significant. This ap-
proach also improves the reproducibility for both of device
fabrication and characteristics of nanochannel OFETs since
the transistor operation can be achieved even by relatively
thick gate dielectrics 共exceeding 10 nm兲. Note that downscal-
ing the L into the nanometer regime in OFETs is expected to
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Appl. Phys. Lett. 97, 083301 共2010兲
enhance field-effect mobility since the charge transport in
long-channel OFETs is generally limited by trapping into
(b)
grain boundaries. The optimization of the processing condi-
Vd=-20 V
tion and the ionization potential of organic semiconductors
can therefore lead to further improvement in the device per-
formance of nanochannel OFETs.
In conclusion, we have investigated the device charac-
0 -5 -10 -15 -20
teristics of bottom-contact OFETs with short channel lengths
Gate voltage (V) fabricated using polymer semiconductors and found that the
short-channel effects in OFETs can be reduced by controlling
the ionization potential of organic semiconductors. This is
attributed to the decrease in the SCLC and the increase in the
contact resistance. Transistor operations of 30 nm channel
OFETs with clear saturation behaviors have been demon-
strated.
We would like to thank Sumitomo Chemical Co., Ltd.
for supplying the F8T2. This work was supported by the
Semiconductor Technology Academic Research Center
共STARC兲, and by a Grant-in-Aid for Young Scientists 共B兲
共Grant Nos. 19710120 and 21710140兲 from the Ministry of
Education, Culture, Sports, Science and Technology of
Japan.
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