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Microstrip Slotline Yields Tiny Divider
This four-substrate, four-way broadband power divider covers 3.6 to 8.4 GHz with low insertion loss and
high isolation in a circuit measuring just 14 x 16 mm.

| July 2011

Copyright © 2011 Penton Media, Inc., All rights reserved.


Printing of this document is for personal use only.
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Zheng Zhang, Yong-Cheng Jiao, Xiao-Ming Wang,


Li-Na Chen, and Fu-Shun Zhang
Power dividers are widely used in RF and microwave
circuits and systems to distribute signals for various
purposes, such as amplification and transmission.
They are employed in amplifiers, mixers, phase
shifters, and the feeding network for an antenna
array.1,2 In recent years, there has been a great
interest in designing microwave circuits with multilayer
microstrip technology which can be used to miniaturize 1. These drawings show the configuration
power dividers—for example, low-temperature-cofired- of the four-way power divider: (a) the
ceramic (LTCC) and laminated multichip-module
3,4 middle input layer, (b) the second and
(LMCM) approaches. In these newer technologies, a
common-ground structure is frequently used. The fourth ground layers, (c) the top and
usual method for achieving efficient power transfer bottom output layers, and (d) the view of
between two sides of the common ground plane is to the overall power divider.
use a wired via; however, this is difficult and labor-
intensive to fabricate. Work performed in ref. 5
reported on a broadband wireless via using microstrip-slotline transitions, which were implemented in the studies
of refs. 6 and 7.
To demonstrate the effectiveness of miniaturizing RF/microwave power dividers by means of microstrip-slotline
transitions, a compact four-way power divider was designed for broadband use from 3.6 to 8.4 GHz. The design
was found to exhibit insertion loss of 6.5 dB, with insertion loss maintained within a ±0.5-dB window. The power
divider also achieved high isolation between the output ports and better than10-dB return loss at the input and
output ports.
Figure 1 shows the four-substrate construction of the
multilayer four-way power divider. The circuit design
consists of five conductor layers interleaved by four
dielectric layers. The four dielectric substrates are the
same size of 14 x 16 mm, with thickness (h) of 0.6 mm
relative dielectric constant, εr, of 2.65, and dielectric
loss tangent (tan δ) of 0.002. The input port is at the
middle layer, while the four output ports are formed at
the top and bottom layers of the multilayer structure.
2. These plots show the simulated S- The ground planes, which have coupling slots in the
parameters for the power divider with and shape of a narrow rectangle ending with two circles,
without air gaps, which impact impedance are at the second and fourth layers of the structure.
matching. Due to the symmetry of the multilayer power divider,
the RF signals at the input port are equally divided in
amplitude and phase among the four output signal
ports.
Figure 1(a) shows the middle metalized input patch for the proposed power divider. The dimensions of this T-
shaped microstrip structure are determined by the parameters W1, L1, W2, L2, W3, L3, W4, and L4 in Fig. 1(a).
These two impedance transforms, with dimensions of W2 x L2 and W3 x L3, were introduced to improve the
impedance bandwidth of the power divider.
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Figure 1(b) shows the configurations of the second and fourth layer grounds, which are the same. The length of
the slot line, W5, is chosen to be one-quarter of the effective wavelength, λeff, at the center frequency (6 GHz).
The effective wavelength, λeff, can be expressed as:

where:
c = the velocity of light in a vacuum,
f = the center frequency of the power divider, and
εeff = the effective dielectric constant of the transmission medium.

For a typical slotline, both of the regions above and below the substrate are air, and the effective dielectric
constant of the transmission medium is the average value of the air and the substrate.8 That is:

In this case, for the slotline used in the proposed power divider, the regions above and below the substrate are
not air but other substrates, with the same permittivity. As a result, the effective relative permittivity used in Eq. 1
should be calculated by Eq. 3:

To achieve a higher return loss at the microstrip ports, the slot width L5 should be chosen for an impedance
close to 50 Ω as seen from the microstrip side. As detailed in refs. 9 and 10, the impedance of the slot as seen
from the microstrip line, Zin, should equal n2Zs, where the impedance transformation ratio n and the slot
impedance Zs are determined by the slot width and substrate characteristics. In the present design, the slot width
is chosen to be Zs = 95 Ω and n = 0.8, so that the impedance of the slot as seen from the microstrip line Zin =
(0.8)2 x 95 = 60.8 O. The radius of the slot circle, r1 , is selected to be between one and two times of L5, since it
is used to terminate a slot line.

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Figure 1(c) depicts the same four output metalized patches. The radius r2 of the quarter-circle is also selected to
be a quarter-wavelength at the center frequency (6 GHz). The widths of microstrip line output and input ports are
both W3. The final values of all variables in Fig. 1 are W1 = 8 mm, W2 = 0.4 mm, W3 = 2 mm, W4 = 1.64 mm, W5
= 7.86 mm, W6 = 5 mm, W7 = 6 mm, L1 = 3.75 mm, L2 = 0.2 mm, L3 = 1.5 mm, L4 = 6.5 mm, L5 = 0.35 mm, L6 =
0.8 mm, L7 = 8.44 mm, r1 = 1 mm, and r2 = 6 mm.

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Because the proposed power divider was implemented
using four separate dielectric substrates, substrate
alignment was a concern. For example, air gaps
between different layers might be introduced during the
fabrication and impact the impedance matches at
those areas. These air gaps may cause undesirable
influence on the S-parameters. Suppose the four
substrates are interleaved by three 0.1-mm-thick air
gaps. Figure 2 shows the simulated S-parameters of
the proposed power divider with and without the three 3. These plots show the simulated and
air gaps. It was found that the introduced air gaps have measured S-parameters for the four-way
little effect on the return loss of port 1, but they power divider.
significantly affect the insertion loss. A mismatch
between the input and output ports induced by the
introduced air gaps, which lower the effective relative permittivity of the slotline, increases the insertion loss
significantly. Thus, it will be much better to implement this power divider in LTCC technology for its advantage of
eliminating much of the substrate alignment tolerance.
To understand the behavior of the proposed power divider and obtain the optimum performance parameters, a
simulation was performed with Microwave Studio from CST, and measurements were made with a model
37269A vector network analyzer (VNA) from Anritsu Company. Because of the limited technology level available
for fabrication, the proposed power divider was designed by using four separate dielectric substrates rather than
LTCC technology.
Figure 3(a) presents the simulated and measured return and insertion losses. From the results, it can be seen
that the simulated and measured results are in close agreement. The discrepancies result most likely from
substrate alignment tolerances and the electrical effects of the SMA connectors added to the power divider,
which were not incorporated into the simulations. Over the full 3.6-to-8.4-GHz operating band, the return loss is
better than 10 dB, and the insertion loss is equal to 6.5±0.5 dB, indicating that the designed power divider can
successfully divide an incoming signal into four signal paths with equal amplitude at each output. The simulated
and measured isolation results are plotted in Fig. 3(b). It can be seen that the isolation is better than 10 dB.
The four-way power divider demonstrated here shows reasonable performance even when fabricated with four
separate laminate boards, rather than a more appropriate technology such as LTCC. The approach is suitable
for miniaturizing a power divider while maintaining low insertion loss, good amplitude balance, and high isolation
between ports. The approach is well suited for a variety of C-band applications requiring low loss and small size.
Acknowledgment
This work was supported by the RIM Advanced Antenna Research Program.
References
1. David M. Pozar, Microwave Engineering, 3rd ed., Wiley, New York, 2005.
2. Wenjie Feng, Wenquan Che, and Kuan Deng, “Compact Planar Magic-T Using E-Plane Substrate Integrated
Waveguide (SIW) Power Divider and Slotline Transition,” IEEE Microwave and Wireless Components Letters,
Vol. 20, No. 6, June 2010, pp. 331-333.
3. A.M. Abbosh, “Broadband multilayer inphase power divider for C-band applications,” Electronics Letters, Vol.
44, No. 2, January 2008, pp. 120-121.
4. K. Song, Y. Fan, and X. Zhou, “Broadband multilayer in-phase power divider,” Electronics Letters, Vol. 44, No.
6, March 2008, pp. 417-418.
5. C.H. Ho, L. Fan, and K. Chang, “Slot-coupled double-sided microstrip interconnects and coup-lers,” MTT-S
International Microwave Symposium Digest, Vol. 3, 1993, pp. 1321-1324.
6. M.E. Bialkowski and A.M. Abbosh, “Design of a Compact UWB Out-of-Phase Power Divider,” IEEE Microwave
and Wireless Components Letters, Vol. 17, No. 4, April 2007, pp. 289-291.
7. Norhudah Seman, Marek E. Bialkowski, and Wee Chang Khor, “Ultra Wideband Vias and Power Dividers in
Microstrip-Slot Technology,” in Proceedings of the Asia-Pacific Microwave Conference 2007, pp. 1-4.
8. K.C. Gupta, Ramesh Garg, Inder Bahl, and Prakash Bhartia, Microstrip Lines and Slotlines, 2nd ed., Artech
House, Norwood, MA, 1996, pp. 272-274.
9. J. Knorr, “Slot-line transitions,” IEEE Transactions on Microwave Theory & Techniques, Vol. 22, May 1974, pp.
548–554.
10. R. Janaswamy and D. Schaubert, “Characteristic impedance of a wide slotline on low-permittivity substrates,”
IEEE Transactions on Microwave Theory & Techniques, Vol. 34, No. 8, August 1986, pp. 900–902.

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