The function of the 18FxxK40 devices differs somewhat from other PIC18 parts.

Because of this, the following commands are configured a bit differently when
executed on the 18FxxK40 devices.

--------------------------------------------------------------------------------
HPWM

Use the following PBP DEFINE statements to specify the output pins for HPWM.
Check the Microchip datasheet (Peripheral Pin Select PPS) for the pins allowed
on each CCP/PWM channel. The PPS peripheral will automatically be configured
for the specified output pin upon execution of HPWM. When used on devices other
than the 18FxxK40, these defines will only control the Data Direction SFRs (TRIS).

These defines are intended for use when the HPWM output pin is static. If you
wish to change the PWM output pin at runtime by changing PPS SFRs, you should
not use the HPWM command, but rather set the appropriate SFRs manually.

DEFINE CCP1_REG PORTC 'Channel-1 port

DEFINE CCP1_BIT 2 'Channel-1 bit
DEFINE CCP2_REG PORTC 'Channel-2 port
DEFINE CCP2_BIT 1 'Channel-2 bit
DEFINE CCP3_REG PORTC 'Channel-3 port
DEFINE CCP3_BIT 3 'Channel-3 bit
DEFINE CCP4_REG PORTG 'Channel-4 port
DEFINE CCP4_BIT 3 'Channel-4 bit
DEFINE CCP5_REG PORTG 'Channel-5 port
DEFINE CCP5_BIT 4 'Channel-5 bit
DEFINE CCP6_REG PORTE 'Channel-6 port
DEFINE CCP6_BIT 6 'Channel-6 bit
DEFINE CCP7_REG PORTE 'Channel-7 port
DEFINE CCP7_BIT 7 'Channel-7 bit

CCP and PWM peripherals are both supported by HPWM.

Default output pins if no DEFINE is used:

2xK40 4xK40 6xK40

CCP1 RC2 RC2 RC2
CCP2 RC1 RC1 RC1
CCP3/PWM3 RC6* RD1 RC3
CCP4/PWM4 RA7 RA7 RG3
CCP5 RG4
PWM6 RE6
PWM7 RE7

* Note that default CCP3/PWM3 setting on 28-pin devices conflicts with the default
TX1 setting described below.

--------------------------------------------------------------------------------
HSEROUT/HSEROUT2

Use the following PBP DEFINE statements to specify the output pins for HSEROUT
and HSEROUT2. Check the Microchip datasheet (Peripheral Pin Select PPS) for the
pins allowed on each EUSART. The PPS peripheral will automatically be configured
for the specified RX/TX pins only once after reset or power up. This allows the
PPS SFRs to be changed at runtime to relocate the RX/TX pins as needed. These
defines will have no effect when code is executed on devices other than the
18FxxK40.
DEFINE HSER_RXREG PORTC
DEFINE HSER_RXBIT 7
DEFINE HSER_TXREG PORTC
DEFINE HSER_TXBIT 6
DEFINE HSER2_RXREG PORTB
DEFINE HSER2_RXBIT 7
DEFINE HSER2_TXREG PORTB
DEFINE HSER2_TXBIT 6

Default output pins if no DEFINE is used:

2xK40 4xK40 6xK40

RX1 RC7 RC7 RC7
TX1 RC6* RC6 RC6
RX2 RB6 RB6 RG2
TX2 RB7 RB7 RG1

* Note that default TX1 setting on 28-pin devices conflicts with the default
CCP3/PWM3 setting described above.

--------------------------------------------------------------------------------
I2CREAD/I2CWRITE

The memory map of the 18F4xK40 forces PBP to reduce the I2CREAD/I2CWRITE clock
frequency slightly to allow I2C operation on PORTE pins. If you aren't using
I2CREAD/I2CWRITE on PORTE, you may use the following define to maximize the
clock frequency on ports A, B, C and D.

DEFINE I2C_ONLYABCD 1

This define has no effect on 18F2xK40 and 18F6xK40 devices.