You are on page 1of 3

The commands below have specific needs regarding PPS functions.

For devices similar to PIC18(L)FxxK42

--------------------------------------------------------------------------------
HPWM

Use the following PBP DEFINE statements to specify the output pins for HPWM.
Check the Microchip datasheet (Peripheral Pin Select PPS) for the pins allowed
on each CCP/PWM channel. The PPS peripheral will automatically be configured
for the specified output pin upon execution of HPWM. When used on non-PPS
devices, these defines will only control the Data Direction SFRs (TRIS).

These defines set PPS SFRs only once at program initialization. You may
change the PWM output pin at any point in your program code by modifying
the PPS SFRs. The HPWM command may be used without these DEFINEs if you
manually configure the PPS and TRIS SFRs.

DEFINE CCP1_REG PORTC 'Channel-1 port


DEFINE CCP1_BIT 2 'Channel-1 bit
DEFINE CCP2_REG PORTC 'Channel-2 port
DEFINE CCP2_BIT 1 'Channel-2 bit
DEFINE CCP3_REG PORTC 'Channel-3 port
DEFINE CCP3_BIT 3 'Channel-3 bit
DEFINE CCP4_REG PORTG 'Channel-4 port
DEFINE CCP4_BIT 3 'Channel-4 bit
DEFINE CCP5_REG PORTG 'Channel-5 port
DEFINE CCP5_BIT 4 'Channel-5 bit
DEFINE CCP6_REG PORTE 'Channel-6 port
DEFINE CCP6_BIT 6 'Channel-6 bit
DEFINE CCP7_REG PORTE 'Channel-7 port
DEFINE CCP7_BIT 7 'Channel-7 bit
DEFINE CCP8_REG PORTE 'Channel-8 port
DEFINE CCP8_BIT 7 'Channel-8 bit

CCP and PWM peripherals are both supported by HPWM.

NO DEFAULT PPS IS SET for CCP/PWM channels for the K42 families. If you
fail to include the appropriate DEFINEs from above to locate the CCP/PWM
output pins for a specific channel, the HPWM command will not function for
said channel.

ONLY INCLUDE DEFINEs FOR USED HPWM CHANNELS! If you include DEFINEs from
above for unused CCP/PWM channels, the ports/pins specified as CCP/PWM
outputs may not function as normal I/O until the PPS SRFs are cleared
in your program code.

--------------------------------------------------------------------------------
HSEROUT/HSEROUT2

Use the following PBP DEFINE statements to specify the output pins for HSEROUT
and HSEROUT2. Check the Microchip datasheet (Peripheral Pin Select PPS) for the
pins allowed on each EUSART. The PPS peripheral will automatically be configured
for the specified RX/TX pins only once after reset or power up. This allows the
PPS SFRs to be changed at runtime to relocate the RX/TX pins as needed. These
defines will have no effect when code is executed on devices without PPS.

DEFINE HSER_RXREG PORTC


DEFINE HSER_RXBIT 7
DEFINE HSER_TXREG PORTC
DEFINE HSER_TXBIT 6
DEFINE HSER2_RXREG PORTB
DEFINE HSER2_RXBIT 5
DEFINE HSER2_TXREG PORTB
DEFINE HSER2_TXBIT 4

New DEFINEs have been created for the K42 UART.

Previous DEFINEs HSERx_RCSTA and HSERx_TXSTA will have no


effect on the K42 devices. Instead use the following to set the UART control
register. You can set the UxCON0 register directly (U1CON0 = $30), but this
may corrupt the calculation for subsequent DEFINE HSERx_BAUD setting. Since
the default value is good for baud rate as low as 244 with a 64Mhz Fosc, these
defines are usually not required.

DEFINE HSER_U1CON0 30h ' default is BRGS=1, 8-bit mode


DEFINE HSER2_U2CON0 30h

The K42 devices don't offer an 8-bit baud rate generator. All BRG values
must use the 16-bit calculation found in the datasheet. In pursuit of clarity,
the previous HSERx_SPBRG and HSERx_SPBRGH defines have been replaced and
will have no effect on the K42 devices. Use the following defines to initilize
the BRG register pairs with a 16-bit value. This will overwrite values
derived from the HSERx_BAUD defines, so these defines are only useful in
special cases. If no defines are used to set baud rate, the default of
9600 baud will be used.

DEFINE HSER_U1BRG 103 ' example for 9600 baud, BRGS=0, Fosc=16MHz
DEFINE HSER2_U2BRG 103

Since the K42 devices have built-in parity modes, the parity-related
DEFINEs are not used by the HSER commands. They will have no effect when
defined. See the device datasheet for UART parity modes. Built-in parity
error flags and interrupts will function when using HSER commands.

The following DEFINEs have no effect when used with K42 devices:

DEFINE HSERx_EVEN
DEFINE HSERx_ODD
DEFINE HSERx_BITS
DEFINE HSERx_RCSTA
DEFINE HSERx_TXSTA
DEFINE HSERx_SPBRG
DEFINE HSERx_SPBRGH

Examples using minimum settings:

' desired baud=115200, Fosc=16MHz, actual baud rate 114285


DEFINE OSC 16
DEFINE HSER_RXREG PORTC
DEFINE HSER_RXBIT 7
DEFINE HSER_TXREG PORTC
DEFINE HSER_TXBIT 6
DEFINE HSER_BAUD 115200
' desired baud=2400, Fosc=64MHz, actual baud rate 2399.88
DEFINE OSC 64
DEFINE HSER_RXREG PORTC
DEFINE HSER_RXBIT 7
DEFINE HSER_TXREG PORTC
DEFINE HSER_TXBIT 6
DEFINE HSER_BAUD 2400

You might also like