42lh35fd Chassis Lj91a PDF

Internal Use Only
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LCD TV
SERVICE MANUAL
CHASSIS : LJ91A
MODEL : 42LH35FD 42LH35FD-SF
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL61862403 (0906-REV00) Printed in Korea

CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ........................................................................................6
ADJUSTMENT INSTRUCTION ...............................................................10
EXPLODED VIEW .................................................................................. 17
SVC. SHEET ...............................................................................................
Copyright LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
such as WATER PIPE,
shock. CONDUIT etc.
To Instrument’s
0.15uF
exposed
Leakage Current Cold Check(Antenna Cold Check) METALLIC PARTS
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1 Ω
measured resistance should be between 1MΩ and 5.2MΩ. *Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service unit under test.
manual and its supplements and addenda, read and follow the 2. After removing an electrical assembly equipped with ES
SAFETY PRECAUTIONS on page 3 of this publication. devices, place the assembly on a conductive surface such as
NOTE: If unforeseen circumstances create conflict between the aluminum foil, to prevent electrostatic charge buildup or
following servicing precautions and any of the safety precautions on exposure of the assembly.
page 3 of this publication, always follow the safety precautions. 3. Use only a grounded-tip soldering iron to solder or unsolder ES
Remember: Safety First. devices.
4. Use only an anti-static type solder removal device. Some solder
General Servicing Precautions removal devices not classified as "anti-static" can generate
1. Always unplug the receiver AC power cord from the AC power electrical charges sufficient to damage ES devices.
source before; 5. Do not use freon-propelled chemicals. These can generate
a. Removing or reinstalling any component, circuit board electrical charges sufficient to damage ES devices.
module or any other receiver assembly. 6. Do not remove a replacement ES device from its protective
b. Disconnecting or reconnecting any receiver electrical plug or package until immediately before you are ready to install it.
other electrical connection. (Most replacement ES devices are packaged with leads
c. Connecting a test substitute in parallel with an electrolytic electrically shorted together by conductive foam, aluminum foil
capacitor in the receiver. or comparable conductive material).
CAUTION: A wrong part substitution or incorrect polarity 7. Immediately before removing the protective material from the
installation of electrolytic capacitors may result in an leads of a replacement ES device, touch the protective material
explosion hazard. to the chassis or circuit assembly into which the device will be
installed.
2. Test high voltage only by measuring it with an appropriate high CAUTION: Be sure no power is applied to the chassis or circuit,
voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged
Do not test high voltage by "drawing an arc". replacement ES devices. (Otherwise harmless motion such as
3. Do not spray chemicals on or near this receiver or any of its the brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity
4. Unless specified otherwise in this service manual, clean sufficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10% (by volume) Acetone and 90% (by 1. Use a grounded-tip, low-wattage soldering iron and appropriate
volume) isopropyl alcohol (90%-99% strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500°F to 600°F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500°F to 600°F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500°F to 600°F)
Some semiconductor (solid-state) devices can be damaged easily b. First, hold the soldering iron tip and solder the strand against
by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors and component lead and the printed circuit foil, and hold it there
semiconductor "chip" components. The following techniques only until the solder flows onto and around both the
should be used to help reduce the incidence of component component lead and the foil.
damage caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. splashed solder with a small wire-bristle brush.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through Circuit Board Foil Repair
which the IC leads are inserted and then bent flat against the Excessive heat applied to the copper foil of any printed circuit
circuit foil. When holes are the slotted type, the following technique board will weaken the adhesive that bonds the foil to the circuit
should be used to remove and replace the IC. When working with board causing the foil to separate from or "lift-off" the board. The
boards using the familiar round hole, use the standard technique following guidelines and procedures should be followed whenever
as outlined in paragraphs 5 and 6 above. this condition is encountered.
Removal At IC Connections
1. Desolder and straighten each IC lead in one operation by gently To repair a defective copper pattern at IC connections use the
prying up on the lead with the soldering iron tip as the solder following procedure to install a jumper wire on the copper pattern
melts. side of the circuit board. (Use this technique only on IC
2. Draw away the melted solder with an anti-static suction-type connections).
solder removal device (or with solder braid) before removing the
IC. 1. Carefully remove the damaged copper pattern with a sharp
Replacement knife. (Remove only as much copper as absolutely necessary).
1. Carefully insert the replacement IC in the circuit board. 2. carefully scratch away the solder resist and acrylic coating (if
2. Carefully bend each IC lead against the circuit foil pad and used) from the end of the remaining copper pattern.
solder it. 3. Bend a small "U" in one end of a small gauge jumper wire and
3. Clean the soldered areas with a small wire-bristle brush. carefully crimp it around the IC pin. Solder the IC connection.
(It is not necessary to reapply acrylic coating to the areas). 4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
"Small-Signal" Discrete Transistor copper pattern. Solder the overlapped area and clip off any
Removal/Replacement excess jumper wire.
1. Remove the defective transistor by clipping its leads as close as
possible to the component body. At Other Connections
2. Bend into a "U" shape the end of each of three leads remaining Use the following technique to repair the defective copper pattern
on the circuit board. at connections other than IC Pins. This technique involves the
3. Bend into a "U" shape the replacement transistor leads. installation of a jumper wire on the component side of the circuit
4. Connect the replacement transistor leads to the corresponding board.
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder 1. Remove the defective copper pattern with a sharp knife.
each connection. Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
Power Output, Transistor Device 2. Trace along the copper pattern from both sides of the pattern
Removal/Replacement break and locate the nearest component that is directly
1. Heat and remove all solder from around the transistor leads. connected to the affected copper pattern.
2. Remove the heat sink mounting screw (if so equipped). 3. Connect insulated 20-gauge jumper wire from the lead of the
3. Carefully remove the transistor from the heat sink of the circuit nearest component on one side of the pattern break to the lead
board. of the nearest component on the other side.
4. Insert new transistor in the circuit board. Carefully crimp and solder the connections.
5. Solder each transistor lead, and clip off excess lead. CAUTION: Be sure the insulated jumper wire is dressed so the
6. Replace heat sink. it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LCD TV used LJ91A 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety: UL, CSA, IEC specification, CE
2. Requirement for Test - EMC: FCC, ICES, IEC specification, CE
Each part is tested as below without special appointment.
1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC

2) Relative Humidity : 65±10%
3) Power Voltage : Standard input voltage(100~240V@50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
4. Electrical specification
4.1 General Specification
No Item Specification Remark
1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N
Available Channel 1) VHF : 02~13
2) UHF : 14~69
2.
3) DTV : 02-69
4) CATV : 01~135
3. Input Voltage 1) AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz
4. Market Central and South AMERICA
Screen Size 32 inch Wide (1920 X 1080) 32LH35FD-SF
5.
37 inch Wide (1920 X 1080) 37LH35FD-SF
42 inch Wide (1920 X 1080) 42LH35FD-SF
6. Aspect Ratio 16:9
7. Tuning System FS
Module LC320WUN-SAB2 (VITIAZ 3) 32LH35FD-SF
8.
LC370WUE-SBB2 (VITIAZ 4) 37LH35FD-SF
LC420WUE-SBC1 (VITIAZ 4) 42LH35FD-SF
Operating Environment 1) Temp : 0 ~ 40 deg
9.
2) Humidity : ~ 80 %
Storage Environment 1) Temp : -20 ~ 60 deg
10.
2) Humidity : ~ 85 %
5. Chromiance & Luminance spec.
No Item Min Typ Max Unit Remark
1. Max Luminance Module 400 500 cd/m LC420WUE-SBC1(V4)
(Center 1-point / Full White Set
400 500 cd/m
Pattern)
2. Luminance uniformity 77 % Full white
3. Color RED X Typ. 0.638 Typ.
4. coordinate Y -0.03 0.334 +0.03
5. GREEN X 0.290
6. Y 0.606
7. BLUE X 0.144
8. Y 0.064
9. WHITE X 0.279
10. Y 0.292
11. Color coordinate uniformity N/A
Contrast ratio 1000:1 1400:1 NORMAL
50000:1 80000:1 DCR
12. Color Cool 0.274 0.276 0.278 <Test Condition>

Temperature 0.281 0.283 0.285 85% Full white pattern
Standard 0.283 0.285 0.287 ** The W/B Tolerance is
0.291 0.293 0.295 –0.015 for Adjustment
Warm 0.311 0.313 0.315 Dynamic contrast : off
0.327 0.329 0.331 Dynamic color : off
OPC : off
13. Color Distortion, DG 10.0 %
14. Color Distortion, DP 10.0 deg
15. Color S/N, AM/FM 43.0 dB
16. Color Killer Sensitivity -80 dBm
6. Component Input (Y, CB/PB, CR/PR)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
3. 720*480 31.47 60 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.0 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.500 60 148.50 HDTV 1080P
10. 1920*1080 67.432 59.939 148.352 HDTV 1080P
11. 1920*1080 27.000 24.000 74.25 HDTV 1080P
12. 1920*1080 26.97 23.976 74.176 HDTV 1080P
13. 1920*1080 33.75 30.000 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
15. 1920*1080 56.25 50.000 148.5 HDTV 1080P
16. 1920*1080 28.125 25.000 74.25 HDTV 1080P
7. RGB Input (PC)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
PC DDC
1. 640*350 31.468 70.09 25.17 EGA X
2. 720*400 31.469 70.08 28.32 DOS O
3. 640*480 31.469 59.94 25.17 VESA(VGA) O
4. 800*600 35.156 56.25 36.00 VESA(SVGA) O
5. 800*600 37.879 60.31 40.00 VESA(SVGA) O
6. 1024*768 48.363 60.00 65.00 VESA(XGA) O
7. 1280*768 47.776 59.870 79.5 CVT(WXGA) O
8. 1360*768 47.712 60.015 85.50 VESA (WXGA) O
9. 1280*1024 63.981 60.020 108.00 VESA O
10. 1600*1200 75.00 60.00 162 VESA (UXGA) O
11 1920*1080 67.5 60 138.5 HDTV 1080P O
reduced timing
** RGB PC Monitor Range Limits

- Min Vertical Freq - 56 Hz
- Max Vertical Freq - 62 Hz
- Min Horiz. Freq - 30 kHz
- Max Horiz. Freq - 80 kHz
- Pixel Clock - 170 MHz
8. HDMI Input (PC/DTV)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
PC DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 35.156 56.25 36.00 VESA(SVGA) O
5 800*600 37.879 60.31 40.00 VESA(SVGA) O
6 1024*768 48.363 60.00 65.00 VESA(XGA) O
7 1280*768 47.776 59.870 79.5 CVT(WXGA) O
8 1360*768 47.712 60.015 85.50 VESA (WXGA) O
9 1280*1024 63.981 60.020 108.00 VESA (SXGA) O
10 1600*1200 75.00 60.00 162 VESA (UXGA) O
11 1920*1080 66.587 59.934 138.5 HDTV 1080P O
DTV
1 720*480 31.50 60 27.027 SDTV 480P
2 720*480 31.47 59.94 27.00 SDTV 480P
3 1280*720 45.00 60.00 74.25 HDTV 720P
4 1280*720 44.96 59.94 74.176 HDTV 720P
5 1920*1080 33.75 60.00 74.25 HDTV 1080I
6 1920*1080 33.72 59.94 74.176 HDTV 1080I
7 1920*1080 67.500 60 148.50 HDTV 1080P
8 1920*1080 67.432 59.939 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 26.97 23.976 74.176 HDTV 1080P
11 1920*1080 33.75 30.000 74.25 HDTV 1080P
12 1920*1080 33.71 29.97 74.176 HDTV 1080P
17. 1920*1080 56.25 50.000 148.5 HDTV 1080P
18. 1920*1080 28.125 25.000 74.25 HDTV 1080P
** HDMI Monitor Range Limits

- Min Vertical Freq - 56 Hz
- Max Vertical Freq - 62 Hz
- Min Horiz. Freq - 30 kHz
- Max Horiz. Freq - 80 kHz
- Pixel Clock - 170 MHz
9. Consignment Setting (OUTGOING CONDITION)
No Item Condition
1. Input Mode TV02CH
2. Volume Level 10
3. Mute Off
4. Aspect Ratio 16:9
5. System Color PAL-M
6 Booster On
7. Picture Picture Mode Vivid
Backlight 100
Contrast 100
Brightness 50
Sharpness 70
Color 70
Tint 0
Color Temperature Cool
Picture Reset
8. Audio Sound Mode Standard
Auto Volume Off
Clear Voice Off
SRS TruSurround XT Off
Balance 0
TV Speaker On
9. Time Clock Auto
Off Timer / On Timer Off
Sleep Timer / Auto Sleep
10. Option Language (Menu/Audio) Portugues
SimpLink On
Key Lock Off
Caption Off
Set ID 1
11. Channel Memory RF : 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
14, 30, 51, 63
CATV : 15, 16, 17
10. Mechanical Specification

No. Item Con tent Unit Remark
Width (W) Length (D) Height (H) mm
Before Packing With Stand
Product 1028 297 715.4 mm
1.
Dim ension
1028 88.7 658.6 mm Without Stand
After Packing 1330 228 770 mm With Stand
1314 212 748 mm Without Stand
18.0 Kg With Stand
Product Only SET
2. 16.2 Kg Without Stand
Weight
With BOX 21.8 Kg With Stand
20.0 Kg Without Stand
40ft 40ft(H-CUBIC)
Container
3. Loading Individual or Palletizing
Quantity Indi. Woo den Indi. Wooden
270 - 360 -
Swivel Degree +/- 20 degree
4. Stand Assy
Swivel Force 0.8Kg f ~ 2.5Kgf
ADJUSTMENT INSTRUCTION
1. Application Range 4. PCB Assembly Adjustment
This specification sheet is applied all of the LJ91A LCD TV 4.1. CPLD DOWNLOAD : JTAG MODE
models, which produced in manufacture department or similar
LG TV factory.
2. Notice
1) Because this is not a hot chassis, it is not necessary to use

an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs. .
3) The adjustment must be performed in the circumstance of
25 ±5°C of temperature and 65±10% of relative humidity if
there is no specific designation.
4) The input voltage of the receiver must keep 100~220V, 4.2. << PRINT PORT >> PIN MAP
50/60Hz.
5) Before adjustment, execute Heat-Run for 5 minutes. Pin JTAG Mode Signal Name
2 TCK
• After Receive 100% Full white pattern (06CH) then process
Heat-run 3 TMS
(or “8. Test pattern” condition of Ez-Adjust status) 8 TDI
• How to make set white pattern
1) Press Power ON button of Service Remocon 11 TDO
2) Press ADJ button of Service remocon. Select “8. Test 13 -
pattern” and, after select “White” using navigation button,
15 VCC
and then you can see 100% Full White pattern.
18 TO 25 GND
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes

(Especially sharp distinction black with white pattern –
13Ch, or Cross hatch pattern – 09Ch) then it can appear
image stick near black level.
3. Adjustment Items
3.1 PCB Assembly adjustment

• CPLD DOWNLOAD
• Adjust 480i Comp1
• Adjust 1080p Comp1/RGB
- If it is necessary, it can adjustment at Manufacture Line
- You can see set adjustment status at “1. ADJUST
CHECK” of the “In-start menu”
3.2 Set Assembly Adjustment

• EDID (The Extended Display Identification Data ) / DDC
(Display Data Channel) download
• Color Temperature (White Balance) Adjustment
• Make sure RS-232C control
• Selection Factory output option
Copyright LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
4.3. << 10P WAFER >> PIN MAP
4.4. Using RS-232C
Adjust 3 items at 3.1 PCB assembly adjustments “4.1.3
sequence” one after the order.
O Adjustment protocol
Order Command Set response

1. Inter the ad 00 00 d 00 OK00x
Adjustment mode
2. Change the kb 00 40 b 00 OK40x (Adjust 480i Comp1/1080p Comp1)
Source kb 00 60 b 00 OK60x (Adjust 1080p RGB)
3.Start Adjustment ad 00 10
4.Return the OKx ( Success condition )
Response NGx ( Failed condition )
5.Read (main) (main : component1 480i, RGB 1080p)
Adjustment data ad 00 20 000000000000000000000000007c007b006dx
(main) (main : component1 1080p)
ad 00 30 000000070000000000000000007c00830077x
6.Confirm ad 00 99 NG 03 00x (Failed condition)
Adjustment NG 03 01x (Failed condition)
NG 03 02x (Failed condition)
OK 03 03x (Success condition)
7. End of Adjustment ad 00 90 d 00 OK90x
See ADC Adjustment RS232C Protocol_Ver1.0
O Necessary items befire Adjustment items

- Patterb Generator : MSPG-925FA
- Adjust 480i Comp1(MSPG-925FA:model:209,
pattern:65) - Comp1 Mode
- Adjust 1080p Comp1(MSPG-925FA:model:225,
pattern:65)-Comp1 Mode
- Adjust RGB(MSPG-925FA:model:225, pattern:65) -
RGB-PC Mode
* If you want more information then see the below Adjustment

method (Factory Adjustment)
O Adjustment protocol
- Pattern Generator : (MSPG-925FA)
- Adjust 480i Comp1 (MSPG-925FA : model :209 , pattern
: 65)
- Adjust 1080p Comp1/RGB(MSPG-925FA:model : 225 ,
pattern : 65)
- Adjust RGB (MSPG-925FA:model :225 , Pattern :65) –
RGB-PC Mode
O Adjustment sequence
- ad 00 00 : Enter the ADC Adjustment mode.
- xb 00 40: Change the mode to Component1 (No actions)
- ad 00 10: Adjust 480i Comp
- ad 00 10: Adjust 1080p Comp
- xb 00 60: Change to RGB-PC mode(No action)
- ad 00 10: Adjust 1080p RGB
- ad 00 90: End of the adjustment
5. Factory Adjustment
5.1 Manual Adjust Component 480i/1080p

RGB 1080p
O Summary : Adjustment component 480i/1080i and RGB

1080p is Gain and Black levelsetting at Analog
to Digital converter, and compensate the RGB
deviation
O Using instrument
- Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator (It can output 480i/1080i
horizontal 100% color bar pattern signal, and its output
level must setting 0.7V±0.1V p-p correctly)
5.2 EDID (The Extended Display

Identification Data) / DDC (Display Data
Channel) Download.
<Pic.4 Adjustment pattern : 480i / 1080p 60Hz Pattern > O Summary

• It is established in VESA, for communication between
* You must make it sure its resolution and pattern cause every PC and Monitor without order from user for building user
instrument can have different setting condition. It helps to make easily use realize “Plug and
Play” function.
O Adjustment method 480i Comp1, Adjust 1080p • For EDID data write, we use DDC2B protocol.
Comp1/RGB (Factory adjustment)
• ADC 480i Component1 adjustment O Auto Download
- Check connection of Component1 • After enter Service Mode by pushing “ADJ” key,
- MSPG-925FA Ë Model: 209, Pattern 65 • Enter EDID D/L mode.
• Set Component 480i mode and 100% Horizontal Color • Enter “START” by pushing “OK” key.
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL” Caution: - Never connect HDMI & D-sub Cable when the user
• ADC 1080p Component1 / RGB adjustment downloading .
- Check connection both of Component1 and RGB - Use the proper cables below for EDID Writing.
- MSPG-925FA Model: 225, Pattern 65
• Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
• After get each the signal, wait more a second and enter
the “IN-START” with press IN-START key of Service
remocon. After then select “7. External ADC” with
navigator button and press “Enter”.
• After Then Press key of Service remocon “Right
Arrow(VOL+)”
• You can see “ADC Component1 Success”
• Component1 1080p, RGB 1080p Adjust is same
method.
• Component 1080p Adjustment in Component1 input
mode
• RGB 1080p adjustment in RGB input mode
• If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”
Edid data and Model option download (RS232) - HDM2 EDID table (0x3D, 0x1C)
NO Item CMD 1 CMD 2 Data 0
Enter Download When transfer the ’Mode In’ ,
download MODE ModeIn A E 0 0 Carry the command.
Edid data and
Automaticall y download
Model option Download A E *Note1 *Note2
download (The use of a internal Data)
Adjust Mode Out A E 9 0
Adjustment To check Download
Confirmation A E 9 9 on Assembly line.
O Manual Download
• Write HDMI EDID data
- Using instruments
=> Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
=> S/W for DDC recording (EDID data write and
read)
=> D-sub jack
=> Additional HDMI cable connection Jig.
- HDMI-3 EDID table (0x3D, 0x0C)
- Preparing and setting.
=> Set instruments and Jig. Like pic.5), then turn on
PC and Jig.
=> Operate DDC write S/W (EDID write & read)
=> It will operate in the DOS mode.
Download jig
Main
PC
B/D
RGB cable
Pic.3) For write EDID data, setting Jig and another instruments.
• EDID data for LJ91D Chassis (Model name = LG TV)

- HDMI-1 EDID table (0x3D, 0x2C) - Analog (RGB) EDID table (0xA5, 0x25)
5.3 Adjustment Color Temperature(White O White Balance Adjustment
If you can’t adjust with inner pattern, then you can adjust
balance) it using HDMI pattern. You can select option at "Ez-Adjust
Menu – 7. White Balance" there items "NONE, INNER,
O Using Instruments HDMI". It is normally setting at inner basically. If you can’t
• Color Analyzer: CA-210 (CH 9) adjust using inner pattern you can select HDMI item, and
- Using LCD color temperature, Color Analyzer (CA-210) you can adjust.
must use CH 9, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the In manual Adjust case, if you press ADJ button of service
Coordination bellowed one. remocon, and enter "Ez-Adjust Menu – 7. White
• Auto-adjustment Equipment (It needs when Auto- Balance", then automatically inner pattern operates. (In
adjustment – It is availed communicate with RS-232C : case of "Inner" originally "Inner" will be selected.
Baud rate: 115200)
• Video Signal Generator MSPG-925F 720p, 216Gray • Connect all cables and equipments like Pic.5)
(Model: 217, Pattern 78) • Set Baud Rate of RS-232C to 115200. It may set
115200 orignally.
• Connect RS-232C cable to set
O Connection Diagram (Auto Adjustment)
• Connect HDMI cable to set
• Using Inner Pattern
F u l l W h i t e P at t er n C A -100+
COL OR
A NA L Y ZER
T Y PE ; C A -100+
R S-232C
• Using HDMI input

¢ RS-232C Command (Commonly apply)
wb 00 00 White Balance adjustment start.

wb 00 10 Start of adjust gain (Inner white
pattern)
wb 00 1f End of gain adjust
wb 00 20 Start of offset adjust(Inner white
pattern)
wb 00 2f End of offset adjust
wb 00 ff End of White Balance adjust(Inner
pattern disappeared)
• "wb 00 00": Start Auto-adjustment of white balance.

• "wb 00 10": Start Gain Adjustment (Inner pattern)
• "jb 00 c0" :
<Pic.5 Connection Diagram for Adjustment White balance> .
•…
• "wb 00 1f": End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00
2f-end)
• "wb 00 ff": End of white balance adjustment (inner
pattern disappear)
O White Balance Adjustment (Manual adjustment)
• Test Equipment: CA-210
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 9, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
• Manual adjustment sequence is like bellowed one.
- Turn to "Ez-Adjust" mode with press ADJ button of
service remocon.
- Select "10.Test Pattern" with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more
10cm from center of LCD module when adjustment.
- Press "ADJ" button of service remocon and select
"7.White-Balance" in "Ez-Adjust" then press "▶"
button of navigation key.
(When press "▶" button then set will go to full white
mode)
- Adjust at three mode (Cool, Medium, Warm)
- If "cool" mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then
control R, G gain adjustment High Light adjustment.
- If "Medium" and "Warm" mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.
- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter (■ key) turn
to Ez-Adjust mode. Then with ADJ button, exit from
adjustment mode
Attachment: White Balance adjustment coordination and color

temperature.
O Using CS-1000 Equipment.

- COOL : T=11000K, △uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, △uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, △uv=0.000, x=0.313 y=0.329
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
521
540
805
804
806
900
801
803
802
550
530
A10
LV1
A5
A2
200T
200
120 500
303
302
300
310
510
320
301
Block Diagram
(Front-end) (System + Scalar) NANDFlash

NANDFlash
IC101 DDR2
DDR2 DDR2
DDR2
IC101
128MB 256MB
256MB 256MB
256MB
128MB
Cable
ISDB-T/
1080P
PAL/NTS LVDS
Serial
C CVBS_LIVE
TP1
TU101/2 SPDIF
2069_L/R_OUT1
CVBS1/
SIF1 TP1
TP2
MPEG_TS
USB2.0
HDMI0_BCM
SIF_LIVE
CVBS1 X-TAL
CVBS2 54MHz
AV1 LR BCM3556
BCM3556
AV2 LR IC100
IC100 (Etc)
(400M
(400M MIPS)
MIPS)
COMP1_LR
COMP2_LR
RGB_LR
I2S_BCM NTP3100L
NTP3100L
(Comp1/2, RGB) IC500
IC500
HDMI4 I2C
SIDE HDMI_PORT4 MICOM
MICOM
TDA9996
HDMI0_BCM IC407
IC407 X-TAL
HDMI2 TDA9996
UI_HW_PORT1 IC601
IC601 24MHz
HDMI1
UI_HW_PORT2
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

LGE Internal Use Only
Power-Up Sequence
¾ BCM3556 (Main Chip)

There are no power sequence requirements. Any sequence will be acceptable
All supplies have a minimum ramp up time of 100us. There is no maximum ramp up time restriction
RESET should be held active during ramp up and at least 10ms after all voltages are above 95% of their specified nominal
levels
Min 100us
All power rails above

minimum operating voltage
either 1.2V, 1.8V, 2.5V, 3.3V
1.2V rail at 1.14V
1.8V rail at 1.71V
2.5V rail at 2.375V
3.3V rail at 3.135V 95%
either 1.2V, 1.8V, 2.5V, 3.3V
Min 10ms
Reset Input

Power-Up Sequence
¾ SAA7164 (MPEG Encoder)

Applications must guarantee all 4 conditions mentioned below during power-on of SAA7164
Condition 1:
RESET has to be LOW, when the 1.2 V digital and the 3.3 V digital supplies become available
RESET has to remain LOW for at least 5 ms after all supplies became available.
Condition 2:
Either power-on the 1.2 V analog and 3.3 V analog supplies simultaneously
Or power-on the 1.2 V analog supplies after the 3.3 V analog supplies
Condition 3:
Either power-on the 1.2 V analog, the 1.2 V digital and 3.3 V digital supplies simultaneously
Or power-on the 1.2 V digital supplies after the 1.2 V analog and 3.3 V digital supplies.
Condition 4:
Either power-on the 2.6 V digital supplies after the 3.3 V digital supplies
Or power-on the 1.2 V digital supplies simultaneously or after the 2.6 V digital supplies.

Power-Up Sequence
¾ Measured Waveform
All power have enough ramp up time (4 ms > minimum 100us)
RESET is negated after last power is ramped up (115 ms > minimum 10ms)
3.3V, 2.6V, 1.2V power sequence requirement of MPEG encoder is satisfied.
3.3V, 2.5V, 1.8V, 1.2V 2.5V, 1.8V, 1.2V, RESET

1. Power-Up Boot Fail Trouble Shooting
N Y
Check P800 All Voltage Level
Check Power connector Replace Power board
(20V, 12V, 5V_ST)
Check All Voltage Level N Replace one of L804/L807/L808

at L804/L807/L808 & Recheck
N Replace one of N
Check Voltage Level 3.3V at L815 IC807/IC802/L815/L823/L810/L826
& Recheck
N Replace one of IC803/L824/L827 N

Check Voltage Level 2.5V at L827
& Recheck
Check Micom IC407

Y
Redownload or replace
Check Voltage Level 1.8V N Replace one of IC804/L825 N
at IC804 #6 pin & Recheck
N Replace one of N
Check Voltage Level 1.2V at L803 IC809/IC800/L803/L816/L819/L801
& Recheck
N
Check X201 Clock 54MHz Replace X201
Check signal transition N

Maybe BCM3556 has troubles
at IC101 #9 pin
Replace IC101 Flash Memory

2. No OSD Trouble Shooting
N Y
Check 12V Voltage Level
Check Power connector Replace Power board
at P800 #13 Pin
Check 12V Voltage Level N Replace one of L804/L902

at L902 & Recheck
N Replace one of
Check 12V Voltage Level at L903 Q900/Q901/Q902/L903
& Recheck
Y
Check P903 N Maybe BCM3556(IC100)
#16(TXAC-), #17(TXAC+),
has troubles
#32(TXBC-), #33(TXBC+)
N
Check LVDS Cable Replace Cable
Check Voltage LCD Module

3. Digital TV Video Trouble Shooting
Check RF Cable
N Replace one of
Check Tuner(TU1101) Power
L1108/L1105/L1100/L1107/L1109
(5.0V, 2.5V, 3.3V, 1.2V)
& Recheck
Check TP Clock, Data, Sync N Maybe Tuner(TU1101) has

R1114, R1103, R1102 problems
Maybe BCM3556(IC100)
has problems

4. Analog TV Video Trouble Shooting
Check RF Cable
N Replace one of
Check Tuner Power
L1108/L1105/L1100/L1107/L1109
(5.0V, 2.5V, 3.3V, 1.2V)
& Recheck
Check CVBS Signal N Maybe Tuner(TU1100) has

TU1101 #9 Pin problems
Check CVBS Signal N Replace one of C1122/R1122

C102 & Recheck
has problems

5. Component Video Trouble Shooting
Check Signal Format

Is it supported signal?
Check Component Cable
N
Check Component Jack JK700 Replace Jack
Y
Replace one of
N R754, R755, R756
Check Component Signal
/L705/L706/L707
R754, R755, R756
R741, R744, R745
R741, R744, R745
/L702/L703/L704
& Recheck
Y
Check Component Signal N
C127, C128, C129 Replace it
C130, C131. C132
has problems

6. RGB Video Trouble Shooting
Check Signal Format

Check RGB Cable
N
Check RGB Jack JK701 Replace Jack
Check RGB Signal N

Replace It & Recheck
L708, L709, L710
Check Sync Signal N Replace one of R759/R761/IC702

IC702 #11, #3 & Recheck
N Replace it or re-burn
Check EEPROM (IC703)
& Recheck
has problems

7. AV Video Trouble Shooting
Check Signal Format

Check AV Cable
Y N
Check Jack JK700/JK704 Replace Jack
N Replace one of
Check CVBS Signal
R729/R706/C711/D703
C103
& Recheck
has problems

8. HDMI Video Trouble Shooting
Check Signal Format

Check HDMI Cable
Check HDMI Jack N

Replace Jack
JK500, JK501, JK503
Check IC601 Voltage Level N Replace one of

+1.8V_HDMI, +3.3V_HDMI L601/L602/R665/R663
Y
Check I2C Signal
R670/R671 N
/R605/R606/R616/R617/R639/R64
2
Y
has problems

9. All Source Audio Trouble Shooting
Make sure you can’t hear any

audio
N
Check Speaker Replace Speaker
N
Check Connector P500 Replace Connector
N Replace one of N
Check Signal Maybe NTP3100 has problems.
L508/L509/L510/L511/L504/L506
L504, L506 Replace It
& Recheck
Y
Check IC500 Power N
20V, 3.3V, 1.8V Replace It & Recheck
L500,L501,L502,L503,IC504
Check BCM3556 I2S Output N

R148, R149, R150
has problems

10. Digital TV Audio Trouble Shooting
N Follow procedure digital TV

Check video output
video trouble shooting
Follow procedure All source N Maybe BCM3556 internal audio

audio trouble shooting DSP has problems. Replace It

11. Analog TV Audio Trouble Shooting
N Follow procedure analog TV

Check video output
N Replace one of
Check Tuner Power
L1108/L1105/L1100/L1107/L1109
(5.0V, 2.5V, 3.3V, 1.2V)
& Recheck
Check SIF Signal N Maybe Tuner(TU1101) has

TU1101 #8 Pin problems
Y
Replace one of
Check SIF Signal N R1124,R1125,C1137,Q1101,R112
C1139 9
Recheck
Y
Check SIF Signal N Replace one of R113/R128

C141 & Recheck
Follow procedure All source N Maybe BCM3556 audio block has

audio trouble shooting problems. Replace It

12. Component / RGB / AV Audio Trouble Shooting
N Follow procedure external input

Check Video Output
N
Check Jack JK700/JK703/JK704 Replace Jack
Check Signal N
C204, C205 Replace IT
C206, C222
C210, C211
C217, C218
C220, C221

audio trouble shooting problems. Replace It

13. HDMI Audio Trouble Shooting
N
Follow procedure HDMI video
Check video output
trouble shooting
N
Re-download EDID data Replace IC601

audio trouble shooting problems. Replace it

14. USB Trouble Shooting
Check USB 2.0 Cable
Y
Check USB device
If devuce is 2.5 inch HDD,
Check power adaptor
N
Check JK1403 Replace Jack
N Replace one of
Check 5V voltage level at L1407
L1407/IC1402 & Recheck
has problems. Replace It.
• Exception
- USB power could be disabled by inrushing current
- In this case, remove the device and try to reboot the TV (AC power off/on)

15. Digital TV Recording Fail Trouble Shooting (USING USB HDD)
N
Follow procedure digital TV
Check video/audio output
video/audio trouble shooting
N
Check USB HDD more 40Gbyte Replace HDD
Maybe IC1402 has problems N Maybe BCM3556(IC100) USB

Replace It. block has problems. Replace It.

A B C D E F G H I J
+5.0V_ST
COMPONENT1/2,AV1 D733
ENKMC2838-T112
R,G,B PC INPUT A1
C
AV COMPONENT1 COMPONENT2 +5.0V A2
IC703
0.1uF
C753
D3.3V D3.3V D3.3V
C710 M24C02-RMN6T
22uF
R707 R736 R750 16V
2.7K 2.7K 2.7K C760 C761
E0 VCC
COMPOSITE1_SW COMP1_SW COMP2_SW RGB_VSYNC 1 8 0.1uF
4.7K
4.7K
R768
R765
C708 1K D716 C734 1K D722 C747 1K JP722
D701 9:H5 9:H4 ADMC5M03200L 9:H4 4700pF
R711 ADMC5M03200L R740 R753
D2A
D2B
D3A
D3B
VCC
ADMC5M03200L 100pF 100pF 100pF E1 WC
5.6V
Q2
Q3
7 JK700
PPJ227-01
5.6V 5.6V 2 7 /W_PROTECT 12:J4
10
11
12
13
14
COMP2_VID_INCM RGB_VS E2 SCL
9N [GN]E-LUG 11:M16 R759 22 R759-*1 3 6 DDC_SCL
TP5 R754 12:E5
11:K10 1K
74F08D
270nH 15
IC702
5K [GN]O-SPRING-L
COMP2_Y RGB_HV_1K VSS SDA
D717 RGB_HS 4 5 DDC_SDA
6K [GN]CONTACT-L
ADLC 5S 03 015 27pFL706 27pF
11:M17 12:E4
5.5V C741
COMP1_VID_INCM C749 11:K10
22
1
TP4 11:M17 R761
270nH
4E [GN]O-SPRING-S COMP1_Y R766 R772
R761-*1
GND
Q1
D1B
D1A
Q0
D0B
D0A
D712 11:M18 22 22
27pF L702 27pF R744 1K
3E [GN]CONTACT-S ADLC 5S 03 015 C735 15
5.5V C723 RGB_HV_1K
9M [BL]E-LUG L707 RGB_HSYNC
R756 D731 D732
7J [BL]C-LUG-L 270nH 15 ADLC 5S 03 015 ADLC 5S 03 015
5.5V 5.5V
D718 COMP2_Pb
ADLC 5S 03 015 11:M16
R745 27pF 27pF
5.5V
8D [BL]C-LUG-S 270nH 15 C742 C750
COMP1_Pb 11:M18
D714 L704
9L [YL]E-LUG
TP7 AV1_CVBS_INCM ADLC 5S 03 015 27pF 27pF
3:T19 5.5V
4L [YL]O-SPRING-S AV1_CVBS_IN 5:E2 C727 C737 D726 R762 R763 D727
6 3L [YL]CONTACT-S D703
ADLC 5S 03 015
R729
75
R706
15 C711
47pF
ADUC30S03010L
30V
10K 10K ADUC30S03010L
30V
5.5V OPT
R755
7H [RD]C-LUG-L 270nH 15
BG1608B121F D3.3V
COMP2_Pr
D721 L705 120ohm
11:M17 11:M18 RGB_B
ADLC 5S 03 015 L708-*1 R777
R741 5.5V C757 D723 L708
270nH 15 27pF 27pF B_VID_INCM 2.7K
8C [RD]C-LUG-S TP1 47pF ADUC30S03010L RGB_0OHM
COMP1_Pr 11:M18 3:T15 30V 0 RGB_SW
D715 C743 C748
9G [WH]E-LUG C712 L703 BG1608B121F 1K 9:H6
R714 ADLC 5S 03 015 120ohm C768
25V 1uF RGB_G R778
OPT
100 5.5V 27pF 27pF 11:M19 100pF
8M [WH]C-LUG-S_1 D724 L709-*1
AV1_L_IN C724 C736 C758 L709
5:E2 G_VID_INCM TP2
D704 C714 C744 47pF ADUC30S03010L 0 RGB_0OHM
0
ADMC5M03200L R708 100pF R751 3:T15 30V D734
470K 25V 1uF
5.6V 100 ADMC5M03200L
7G [WH]C-LUG-L BG1608B121F 5.6V
120ohm
R771
R773
COMP2_L_IN 5:H3
D719 11:M19 RGB_R
C729 ADMC5M03200L D725 L710-*1
R737 C759 L710
25V 1uF 5.6V R748 R_VID_INCM
100 5:H3 C751 TP3 47pF ADUC30S03010L R774
8B [WH]C-LUG-S_2 470K 3:T15 30V RGB_0OHM 0
COMP1_L_IN 100pF 0
R705 D709
9F [RD]E-LUG
GREEN_GND
DDC_CLOCK
5.1 ADMC5M03200L OPT
DDC_DATA
BLUE_GND
SYNC_GND
R730
RED_GND
DDC_GND
C738
H_SYNC
V_SYNC
AV1_INCM 3:T20 5.6V 470K
GND_2
GREEN
GND_1
BLUE
4N [RD]O-SPRING-S_1 100pF
RED
AV1_R_IN 5:E2
NC
C707 R710
5
JK701
3N [RD]CONTACT-S_1 R702 100 C715
1uF R749 5.1
KCN-DS-1-0089
470K
SHILED
D702 100pF COMP2_INCM
11
12
13
14
15
25V C745
ADMC5M03200L R752 3:T22
5.6V 25V 1uF
16
100
10
JP734
9
5F [RD]O-SPRING-L
COMP2_R_IN 5:H3
D720
5
6F [RD]CONTACT-L
ADMC5M03200LR747 C752
R728 5.1 5.6V 470K 100pF
COMP1_INCM
C731 5:H33:T24
4A [RD]O-SPRING-S_2
COMP1_R_IN
3A [RD]CONTACT-S_2 D710 1uF R738
ADMC5M03200L R732 25V 100 C739
5.6V 470K
100pF
SMD Gasket Option
MDS61887701
MDS61887701
MDS61887701
MDS61887701
MDS61887701
MDS61887701
15
SIDE_CVBS_IN 5:G4
SIDE_AV R715
GAS1
GAS2
GAS3
GAS4
GAS5
GAS6
C716
JK704 D706 R701 47pF TP6 SIDE_CVBS_INCM 3:T19
4 PPJ218-01
ADLC 5S 03 015
5.5V
75
D3.3V
50V
OPT
4A [YL]O_SPRING
R712
[YL]CONTACT 2.7K
5A
COMPOSITE2_SW
D707 C713 1K 9:H6
2A [YL]U_CAN ADMC5M03200L R720
100pF
5.6V
[WH]C_LUG C719
3B
SIDE_L_IN
R725 5:J4
[WH]U_CAN 1uF C721
2B R721 25V 100 R734 5.1
470K 100pF SIDE_INCM
C720 3:T18
4C [RD]O_SPRING
SIDE_R_IN
5C [RD]CONTACT R722
1uF
25V
R726
100 C722
5:J4 PC AUDIO
470K 100pF JK703
2C [RD]U_CAN PEJ024-01
JP720
D705 D708 E_SPRING
ADMC5M03200L ADMC5M03200L 3
5.6V 5.6V
INCM Place this INCM
near connector 6A T_TERMINAL1
3 Run along G, B, R traces

7A B_TERMINAL1
R767 5.1
C763
PC_INCM 3:T14
Run along Y, PB, Pr traces PC_R_IN
R775 5:J4
R_SPRING D729 1uF
4 ADMC5M03200L 25V 100
R769 C766
+3.3V_ST 5.6V 100pF
470K
5 T_SPRING
RS-232C C764
L701 7B B_TERMINAL2
BLM18PG121SN1D PC_L_IN
R776 5:J4
0.1uF
T_TERMINAL2 1uF
R709 R713 6B D730
C701
25V 100
4.7K ADMC5M03200L R770 C767
4.7K
R716 5.6V 470K 100pF
8 SHIELD_PLATE
0
JP721
IC701 RS232C_RxD 14:X8
MAX3232CDR R717
0 JK705
C706 RS232C_TxD 14:X7 KCN-DS-1-0088
C705 C1+ VCC
1 16 0.1uF
0.1uF R742
1
V+ GND RxD 6
2 15 220
2
C703 0.1uF R718
C1- DOUT1 100 TxD 7
3 14 OPT
3
0.1uF R719 R743

2 C704
C2+
4 13
RIN1 100 OPT
C717 D713
220
8
9
4
SPDIF OPTIC JACK

C2- ROUT1 C718 5
5 12 220pF ADUC30S03010L 47pF 47pF 10
D3.3V +5.0V
0.1uF 30V C726 C733
V- DIN1 220pF
6 11 JK702
C702 JST1223-001
DOUT2
7 10
DIN2 JP729
+5.0V_ST JP718
RIN2 ROUT2 R764 GND
8 9 D711
1
1K
Fiber Optic
ADUC30S03010L JP732
30V R739
3.3K VCC
+5.0V_ST
2
US_Commercial JP730
R703 BCM_SPDIF_OUT
100 C
R733 VINPUT
3
100K B Q702
R727
3.3K
R704
OPT
4
100 2SC3052 11:W20
R723 US_Commercial D728 C762
US_Commercial
FIX_POLE
0 E ADUC30S03010L 0.1uF
R735 30V
C 100K OPT
R724
10K B Q701 US_Commercial
12:D4;14:U23 IR 2SC3052
1/16W
OPT OPT
5%
1 E
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BRAZIL DVR DV 2009.01.20
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. VIDEO EXT.INPUT 1 17
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP
* HDMI CEC
29 +3.3V_ST +1.8V_AMP +1.8V_HDMI D3.3V +3.3V_HDMI
L601 L602
Q16;AH18 68K BLM18PG121SN1D BLM18PG121SN1D
MMBD301LT1G
JACK_GND 5V_HDMI_4
28 20
R666
C623 C629
D601
R641 Q601 0.1uF 0.1uF
0 AH19
9.1K
R667
SSM6N15FU
19 HPD4
HPD
18 12:F6
27 17
+5V_POWER
DDC/CEC_GND R642 0
JP605
R14;AG19
CEC_REMOTE
R658
0 DRAIN1
6 1
SOURCE1
HDMI_CEC
16 JP606 DDC_SDA_4 H8;H17;R26;AL11 GATE2 GATE1

SDA R13;AG19 5 2
AVRL161A1R1NT
15 DDC_SCL_4
R639 0
VR607
SCL
26 14
NC R643 0
H8;H17;W27;AL11
SOURCE2
4 3
DRAIN2
CEC_REMOTE
13 C612
CEC AG19 0.1uF
12 CK-_HDMI4
CLK-
25 11
10
CLK_SHIELD AG19
CK+_HDMI4
GND R664 OPT
GND
CLK+ AF19 0
9 D0-_HDMI4
DATA0-
8
24 7
DATA0_SHIELD
DATA0+
AF19
D0+_HDMI4
AF19
6 D1-_HDMI4
DATA1-
5
DATA1_SHIELD AF19
23 4
DATA1+
D1+_HDMI4
AE19
+3.3V_HDMI
3 D2-_HDMI4
DATA2-
2 AE19
DATA2_SHIELD
R665
22 1
DATA2+
D2+_HDMI4
0
KJA-ET-0-0032
JK503
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
21
C609
C610
C611
C613
C614
C615
GND SIDE_HDMI_PORT4
C624
D2-_HDMI4
20
D1-_HDMI4
D2+_HDMI4
D1+_HDMI4
CK+_HDMI4
D0-_HDMI4
CK-_HDMI4
DDC_SCL_4
DDC_SDA_4
D0+_HDMI4
HDMI0_RXC-_BCM 11:W17
HDMI0_RXC+_BCM 11:W17
HDMI0_RX0-_BCM 11:W17
HDMI0_RX0+_BCM 11:W17
+5.0V
HDMI_SCL
HDMI_SDA
5V_HDMI_1 5V_HDMI_2 0.1uF
HPD4
C625
P19;AJ15
5V_HDMI_2
0.1uF
C626
19 22
R628
0 AL11 0.1uF
19 HPD2 C627
R662
1.8K
18 R635 0.1uF
R634 R653 R656
5V_HDMI_4
JP603 47K 47K 47K 47K
18 17
16
R616 0
JP604
R18;AL12
DDC_SDA_2
R17;AL12
R661
1.8K
DDC_SDA_1 DDC_SDA_2
15 0 DDC_SCL_2 C616
R617 DDC_SCL_1 DDC_SCL_2 0.1uF
14 H8;R26;W27;AL11
17 13
R618 0
CEC_REMOTE
AL12
+1.8V_HDMI
CK-_HDMI2
12
C622 C628
C620
11 AL12 0.1uF 0.1uF
0.1uF
16 CK+_HDMI2
VDDC[1V8]_3
VDDH[3V3]_8
VDDH[3V3]_7
RXD_DDC_CLK
RXD_DDC_DAT
10
AL13 5V_HDMI_4
VDDO[1V8]
D0-_HDMI2
9
OUT_D0-
OUT_D0+
OUT_D1-
OUT_D1+
OUT_D2-
OUT_D2+
RXD_D2+
RXD_D2-
RXD_D1+
RXD_D1-
RXD_D0+
RXD_D0-
RXD_DC+
RXD_DC-
RXD_HPD
VSS_12
VSS_11
VSS_10
RXD_5V
8 AL13 5V_HDMI_2
D0+_HDMI2
15 7
AL13
D1-_HDMI2
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
6
VSS_1 1 75 VDDH[1V8]_2
5V_HDMI_1 R676 C621
5 OUT_C+ 2 74 R12K
AL13 0.1uF
D1+_HDMI2 OUT_C- 3 73 VSS_9 12K
4
14 3
AL14
D2-_HDMI2
R655
47K
R657
47K
C607
OUT_DDC_CLK
VDDO[3V3] 4
5
72
71
RXC_D2+
RXC_D2-
D2+_HDMI2
D2-_HDMI2
OUT_DDC_DAT 6 70 VDDH[3V3]_6
2 DDC_SDA_4 0.1uF
AL14 VSS_2 7 69 RXC_D1+
D2+_HDMI2 D1+_HDMI2
1 DDC_SCL_4 VDDC[1V8]_1 RXC_D1-
8
IC601 68 D1-_HDMI2
13 20 HPD1
RXA_HPD
RXA_5V
9
10
67
66
VSS_8
RXC_D0+
21 RXA_DDC_DAT 11 TDA9996HL 65 RXC_D0-
D0+_HDMI2
D0-_HDMI2
DDC_SDA_1 RXA_DDC_CLK VDDH[3V3]_5
12 64
DDC_SCL_1 RXA_C- RXC_C+
13 63 CK+_HDMI2
12 QJ41193-CFEE1-7F UI_HW_PORT2 EDID Pull-up CK-_HDMI1

CK+_HDMI1
RXA_C+ 14 62 RXC_C-
CK-_HDMI2
VDDH[3V3]_1 15 61 RXC_DDC_CLK
JK501 GND DDC_SCL_2
RXA_D0- 16 60 RXC_DDCC_DAT
D0-_HDMI1 DDC_SDA_2
RXA_D0+ 17 59 RXC_5V
D0+_HDMI1 VSS_3 RXC_HPD
18 58
R677 HPD2
11 D1-_HDMI1
D1+_HDMI1
RXA_D1-
RXA_D1+
19
20
57
56
CEC
VSS_7 0 CEC_REMOTE
VDDH[3V3]_2 21 55 VDDS[3V3]
RXA_D2- 22 54 CDEC_STBY Net Labels changed for HDMI2
L19;Z14 D2-_HDMI1 RXA_D2+ INT/HP_CTRL R678 0
5V_HDMI_1 23 53
D2+_HDMI1
10 22
VDDH[1V8]_1 24 52 XTAL_OUT OPT
0.1uF
R627
C619
NC 25 51 XTAL_IN
0 Y13 +5.0V
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
19 HPD1
R663
18 0
VSS_4
TEST
RXB_HPD
RXB_5V
RXB_DDC_DAT
RXB_DDC_CLK
RXB_C-
RXB_C+
VDDH[3V3]_3
RXB_D0-
RXB_D0+
VSS_5
RXB_D1-
RXB_D1+
VDDH[3V3]_4
RXB_D2-
RXB_D2+
VSS_6
CDEC_DDC
VDDC[1V8]_2
VDDC[3V3]
0 MODE
PD
SDA/SEL1
SCL/SEL0
C605
9 17
R605 0
JP601
M18;X13
DDC_SDA_1
0.1uF
16 JP602
M17;X12
R668
15 0 DDC_SCL_1 0
R606
+1.8V_HDMI R675
8 14
13
R607 0
H17;R26;W27;AL11
CEC_REMOTE OPT
0
Y12 C617 C618
CK-_HDMI1
12 C606 0.1uF 5.6nF
C604 C608
R670
0.1uF 0.1uF 0.1uF
11
0
Y12
7 10
CK+_HDMI1
Y12
R671
D0-_HDMI1 +3.3V_HDMI
9
8 R672
Y11
6 7 D0+_HDMI1
Y11
D1-_HDMI1
R669
0
4.7K OPT
R673
4.7K
6
OPT
5 4.7K
R674
Y11
D1+_HDMI1 OPT
5 4
3
Y10
D2-_HDMI1
5:G5;16:G14
5:G5;16:G14
2
SCL1_3.3V
SDA1_3.3V
Y10
D2+_HDMI1
1
4 20
21
3 QJ41193-CFEE1-7F
JK500 GND
UI_HW_PORT1 VARISTORS(VR500/501/502/503/504/505/506/507) on lines-HPD1/2/3/4 are all options
HDMI S/W For MSTAR Platform
in case HDMI Switch doesn’t support ’ESD protection’
2 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

1 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI INPUT 2 17
A B C D E F G H I J
6 IC504
D3.3V AZ1117H-1.8TRE1(EH13A)
+20.0V
INPUT 3 1 ADJ/GND R525

+1.8V_AMP
3.3
0.01uF
2 GND C513 C517
C520
C506 C518 C514
MLB-201209-0120P-N2
C505 0.1uF 0.1uF 330uF 0.1uF
10uF 0.1uF L508
OUTPUT D501 R530 L504 C547
1N4148W 5.6 DA-8580 C539 0.01uF
C532 0.1uF R536
C533 100V 4.7K R540
0.1uF C535
10uF OPT C543 3.3
1000pF 1S 1F
0.47uF
.
C512 D502 C536 R538
22000pF 1N4148W 1000pF R534 3.3 JP503
2S 2F C540
D3.3V OPT R531 4.7K 5
22uH 0.1uF 0.01uF L509
100V 5.6 C545 SPK_L+
4
5 L502
BLM18PG121SN1D 0.1uF
C567
C515
22000pF
MLB-201209-0120P-N2JP504
SPK_L-
C507 3
0.1uF JP505
SPK_R+
R526 MCLK : 12.288MHz 2
JP506
100
MICOM_RESET C522
SPK_R-
12:I4 1uF MLB-201209-0120P-N2 1
C531
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
PGND1A_2
PGND1A_1
PVDD1A_2
PVDD1A_1
1000pF L510
OUT1A_2
OUT1A_1
R556 R532 L506 C548
0 5.6 C541 0.01uF
9:H6 BCM_AUD_MCLK D503 DA-8580
1N4148W 0.1uF R537
R541 SMAW250-04Q
C537 4.7K
100V 1000pF 1S 1F C544
3.3 P500
+1.8V_AMP OPT
56
55
54
53
52
51
50
49
48
47
46
45
44
43
0.47uF
C509 R539
1uF BST1A 1 42 NC C525
C500 BLM18PG121SN1D 1uF D504 R535 3.3
10V VDR1A 41 VDR2A C538 2S 2F C542
100pF L500 2 1N4148W 22uH 4.7K
1000pF 0.1uF C546
RESET 3 40 BST2A OPT L511
C524 0.01uF
AD 100V R533
R527 4 39 PGND2A_2 22000pF
5.6
0 DVSS_1 MLB-201209-0120P-N2
5 38 PGND2A_1
3.3K VSS_IO 6 37 OUT2A_2
1000pF CLK_I IC500
R521 7 36 OUT2A_1
4 +1.8V_AMP
C501
C503
0.1uF
C534
10uF VDD_IO
DGND_PLL
8 NTP-3100L 35
34
PVDD2A_2
PVDD2A_1
9
AGND_PLL 10 IIC CH4 33 PVDD2B_2
L501
LFM 11 0x54 32 PVDD2B_1
BLM18PG121SN1D AVDD_PLL 12 31 OUT2B_2
DVDD_PLL 13 30 OUT2B_1
TEST0 14 29 PGND2B_2
C504 +20.0V
C552 R501
15
16
17
18
19
20
21
22
23
24
25
26
27
28
0.1uF 10uF
3.3
0.01uF
C528
DVSS_2
DVDD
SDATA
WCK
BCK
SDA
SCL
MONITOR_0
MONITOR_1
MONITOR_2
FAULT
VDR2B
BST2B
PGND2B_1
0.1uF C529
C530
C527
C564 330uF 0.1uF
0.01uF C526
0.1uF
+1.8V_AMP
C521 C523
L503 1uF 22000pF
BLM18PG121SN1D
3 C519 C516
10uF 0.1uF
R522
100
R528 MUTE1 12:G3
BCM_I2S_DATA_OUT 100
11:V25 C508
100 R529
11:V25 BCM_I2S_LRCLK_OUT 33pF
100 R542
11:V26 BCM_I2S_SCLK_OUT
100 R523
5:G5;16:G14 SDA1_3.3V
100 R524
5:G5;16:G14 SCL1_3.3V
C565 C566
33pF 33pF

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AUDIO 3 17
A B C D E F G H I J
* FROM LIPS & POWER B/D -->Apply changed Pin Map
+3.3V_MEMC
+5.0V_ST +3.3V_ST
+12.0V
L806
MLB-201209-0120P-N2
L832
E
R856 CHATTERING_BEAD
OPT
L823-*1 MLB-201209-0120P-N2
R854 1K R859 MLB-201209-0120P-N2 120
33K D3.3V
R851 Q806 0 L823
B
C877 R827 R828 CHATTERING_120
15pF 33K RT1P141C-T112 C896
50V OPT C 3.3K 330K C857 10uF
MLB-201209-0120P-N2
R862 RL_ON MLB-201209-0120P-N2 1uF +12.0V
Q807 B 10K L821 1/10W
2SC3875S(ALY) OPT
OPT
OPT IC802
L820
E OPT C886
OPT
D803
7 SC2621ASTRT A3.3V
10uF
1uF 120K D3.3V
L826
P800 1N4148W
25V
0
FW20020-24S R863
OPT OPT 100V
We’ll change SI4804 to KEC’s Product
C824
Q804 BST DH
1 14
OPT
Si4800BDY
NC PWR ON L815
1 2 JP1314
+5.0V_ST S1 D8 L810 MLB-201209-0120P-N2
1 8 OCS PN
10V
GND 3 4 GND 2 13
JP1315
GND 5 6 GND S2 D7 R844
L807 2 7 2.2uH
+12.0V 5.2V 5.2V C866 C845
7 8 COMP GND_2 620
5.2V 5.2V C883 S3 D6 3 12
9 10 JP1316 CB4532UK121E C880
22uF
+20.0V 3 6 IC807 10uF 10uF C867
1%
L804 GND 11 12 GND 220uF SI4804BDY R838 C868
CB4532UK121E 16V 16V G D5 FB DL
12V 12V 5.6K
100uF
13 14 4 5 4 11
JP1317
S1 D1_2 C869 C870
C871 C872 C874 C876
GND 15 16 GND L808 1 8 C847 C848 0.01uF 33uF 0.1uF
C861
22uF 20V 20V CB4532UK121E 10uF 10uF
0.1uF 330uF 0.1uF 17 18 LDOG DRV R837 C863
16V 35V 50V
JP1318
1% 5 10 G1 D1_1
50V
OPT
NC INV ON 2 7
OPT 19 20 JP1319
C882
470pF
R812
C860
A.DIM Err Out C884
21 22 330uF 1uF S2 D2_2 1
JP1322
NC PWM DIM
JP1320
C878 35V 35V
20K LDFB NC 3 6
23 24 0.1uF 6 9
0.1uF
JP1321
L805 50V G2 D2_1

4 5
4.7K MLB-201209-0120P-N2
C818 1% GND_1 VCC
10uF
7 8 C839
R847 10uF 16V
0.1uF
BCMPWM_VBR_A C8001 +5.0V +3.3V_ST R813 C823 1uF C862
C855
C873 C875 10V
470pF
1uF 16V 0.1uF 4.7K 6800pF C838 3.3nF
6
1%
1K
C827
25V 0.1uF 50V OPT
1uF
001:AF12
OPT
OPC_OUT2
OPT OPT R852

3.3K
R830 R839
10K
100
OPT R826
R848 C
6.8K
R822 R834 10K must be placed with pin#8,#10 as close as possible.
0
R849
Q808 B10K
C
2SC3052
B R855 D3.3V
OPT E 5% INV_ON/OFF
LDO BLOCK
MLB-201209-0120P-N2
Q802
2SC3875S(ALY) 10K R857
E 10K (For ENC / ENC DDR)
OPT
OPT OPT
C887
A2.5V * +1.26V Core for FRC
22uF D2.5V VOUT : 2.533V
L824
OPC_NON ERROR_OUT
R861 16V
R853 +1.8V +1.26V_MEMC
BCMPWM_VBR_B C879
0 C881
R850
0.1uF 0 NC_2 NC_3 IC804
L809 0 16V
1uF OPT 4 5 L827 SC4215ISTRT
R860 25V MLB-201209-0120P-N2 OPT
OPC_OUT OPT VIN MLB-201209-0120P-N2
VO
12.4K
0
OPC_EN 3 6 NC_1 GND
R817
1%
1 8
0 EN ADJ
R840 R816
A2[GN]
2 7 R846 EN ADJ
R835 1% 10K
2 7
39K 1K
ENG
NC_1 GND
5 C843
A1[RD]
1 8 C850 C851 VIN VO
C858 3 6
+12.0V 33uF C864 C840
6.3V
16V
6.3V
D805
ENG
10uF 10V 33uF 33uF
1% 10V 10V NC_2 NC_3 R818
C844
10uF 10uF
1%
C832
C834
6.3V SC4215ISTRT SAM2333 C828 C830 4 5
22K
0.1uF
6.3V 6.3V
10uF
10uF
CHATTERING_BEAD L817-*1 IC803 R841 10uF 0.1uF
120 10V 16V
MLB-201209-0120P-N2 18K
R807 L817
R809 CHATTERING_120
MLB-201209-0120P-N2 3.3K 150K C813 +12.0V
L814 1uF
OPT
1/10W
MLB-201209-0120P-N2
25V
IC801 +5.0V
L818
SC2621ASTRT D801
10uF
0
L812
OPT
OPT
1N4148W
OPT 100V DIMMING_1.8V
C805
Q801 BST DH
Si4800BDY 1 14
LH90_ONLY
S1 D8 L802 L829
1 8 OCS PN MLB-201209-0120P-N2
10V
2 13
S2 D7
2 7 2.2uH R825
LH90_ONLY
COMP GND_2
4 3 12 300 C890 C893
LH90_ONLY
S3 D6
3 6 IC808 C826 C841 C842 C831 +5.0V 0.1uF 10uF
SI4804BDY R820 C835 16V 10V
G D5 FB DL 10K
4 5 4 11
100uF
S1 D1_2
1 8 10uF 10uF 10uF 0.01uF
20V
SANYO
C817
LDOG DRV R811 470pF 16V 16V 16V
OPT
1% 5 10 G1
2 7
D1_1
IC805 +1.8V_MEMC
+1.8V
R821
10K
R802 AOZ1073AIL
C815
S2 D2_2 1 C822
10K LDFB NC 3 6
6 9 L825 L830
0.1uF
G2 D2_1 MLB-201209-0120P-N2
4 5 PGND LX_2 3.6uH
1 8
C801 OPT GND_1 VCC
10uF
7 8 C811 L822
OPT
10uF 16V OPT

0.1uF
R803 C803 1uF C820 MLB-201209-0120P-N2 C885

2200pF
1.1K
VIN LX_1 C859 C865 C891 C894
10V
C853
R823
1.1K 0.068uF C809 3.3nF
2 7 10uF 10uF 0.1uF OPT 0.1uF 10uF OPT
C807
1uF 10V 10V 16V 10V

AGND EN C889
3 6
R805
1.8K must be placed with pin#8,#10 as close as possible.
330uF D1.8V
FB COMP
C852 C854 4 5 4V
0.1uF 1000pF 10uF SANYO
C846
R829
50V L831
11K
LDO BLOCK MLB-201209-0120P-N2
3 (For TUNER 5V)

R832
20K
1%
C892 C895
0.1uF 10uF
C856 R831
MLB-201209-0120P-N2
+5.0V 15K
16V 10V
330pF
50V 1%
L816
We have to decide whether IC803 R806

LH50_90_ONLY LH50_90_ONLY
R808
use after D2.5V test D3.3V
6.8K 390K C812
BG2012B121F 1/10W 1uF
+1.8V_MEMC L813
+5.0V_ST
LH50_90_ONLY
BG2012B121F
IC800
SC2621ASTRT D800
10uF
D1.2V
L811
LH50_90_ONLY
1N4148W A1.2V
L819
100V +12.0V
0
Q800 BST DH
CB3216PA501E
Si4800BDY 1 14
L803
C804
L801 MLB-201209-0120P-N2
L833
S1 D8 OCS PN
2 S2
1
2
8
7
D7
2 13
2.2uH R824
Q809
SI4925BDY
COMP GND_2
S3 D6 3 12 1.2K
3 6 IC809 C825 C829
1%
S1 1 8 D1_2
SI4804BDY R814 C833
G D5 FB DL C836
4 5 4 11 2K +12.0V_LCD
10uF C837
LH50_90_ONLY
S1 D1_2 G1 2 7 D1_1
1 8 10uF 330uF 0.01uF 0.1uF
6.3V
C816
LDOG DRV R810 R815 470pF 6.3V 4V

1%
5 10 G1 D1_1 S2 3 6 D2_2
2 7 SANYO
200 C821
R800
C814
S2 D2_2 1
13K LDFB NC 3 6 C897 G2 4 5 D2_1
10uF
6 9 C898
0.1uF
LH50_90_ONLY
C899
G2 D2_1 R864 1uF 100uF
4 5 C849 1uF
47K LH35_LH50_ONLY
GND_1 VCC 4.7uF
7 8 C810 10uF
22K
R845
R801 C802 1uF 16V C819
1.5K
C800
OPT
R819
220pF
4.7K 2200pF C808

1%
3.3nF
C806
R865
1uF
47K
LH50_90_ONLY
R804 OPT C GND

15K must be placed with pin#8,#10 as close as possible. R842 B
10K
1%
1 R843
C Q805
2SC3052
E
LDO BLOCK 12:I5 LVDS_PANEL_CTRL 10K B
22K
R858
(For TUNER / BCM) Q803
E
2SC3052
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES GND GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 4 17
A B C D E F G H I J
D3.3V
TUNER
R1119
4.7K
OPT
7 C1116-*1
0.1uF
50V 0 @netLa
TU_LGIT RF_SW
C1116 R1118
2200pF
0 RF_GAIN1
+5.0V_TU 50V
RF_GAIN1
R1117
C1118 +5.0V_TU
TU_LGIT
2200pF
L1101
50V
L1107
CTR
1
RF-GAIN_SW C1125 C1126C1130
2
10V C1108
B0[+5V] 0.01uF 10uF 0.1uF
3 10uF 0.1uF +5.0V_TU
C1106 50V TU1102 Place close to Pin
VTU
4 TU_LGIT TU_LGIT VA1G5BF8005
RF_AGC L1109
TU_LGIT 5
B1[+5V] RF_SW
6 1
C1128 C1131C1134
TU1101 NC_1 GAIN_SW
7 2
6 TDYR-H071F
8
SIF
3
BB
D2.5V
0.01uF 22uF 0.1uF
Place close to Pin

VIDEO_OUT B1
9 4
L1105 D3.3V
NC_2 AFT 0
10 5
L1108
NC_3 SIF R1108 C1121
C1123 C1124
11 6 0.1uF
0.1uF10uF
AIF VIDEO C1127 C1132 C1135
12 7 0.1uF
0.1uF 10uF
B2[2.5V] B2
13 8
D1.2V A1[RD]
B3[3.3V] B3 C R1130 330
14 9 A2[GN]
B4[1.2V] B4 L1110
15 10 LD1101
SAM2333
RESET[SYRSTN] RESET 22 R1109 C1138
16 11 C1133 C1136 ENG
TUNER_RESETb 3:T26 0.1uF
SDA SDA 0.1uF 10uF
22 R1110 SAM2333 D3.3V
17 12 SDA0_3.3V 3:T26
LD1102
SCL SCL 22 R1111
18 13 ENG
SCL0_3.3V 3:T26 R1128
A1[RD]
RSEORF RSEORF 1K C
19 14 A2[GN]
SBYTE SBYTE 22 R1112
20 15 TU_SYNC 3:T27
5 21
SPBVAL
16
SPBVAL 0
R1116
+5.0V_TU
SRDT SRDT 22 R1113
22 17 TU_SDATA 3:T27
SRCK SRCK 22 R1114 L1111
23 18 TU_SCLK 3:T27
24 C1107 C1109
22pF 22pF 19
R1124
R1129
50V 50V 2012
SHIELD SHIELD
12K
470
TU_LGIT TU_LGIT C1139
TU_SHARP R1127 0.01uF
0
TU_SIF 3:T25
OPT
C1137 E TP9 TU_SIF_INCM
0.01uF 3:T25
B Q1101
R1125 2SA1504S
C
10K
16V
R1122
56 TU_CVBS_IN 3:T25
4
R1123
R1106
CM3216F100KE
10uF C1122
OPT
OPT
TP8 TU_CVBS_INCM
56
82
TU_LGIT
L1103
3:T25
10uH
GND
C1110
91pF
T U_LGIT
50V
MAIN & SUB TUNER +5V

3
GND2
IC1101
KIA78R05F
+5.0V_TU
1 2 3 4 5
2 L1102
VIN
VC
VOUT
NC
GND1
MLB-201209-0120P-N2
+12.0V
C1114 C1115 C1120

IC1100 0.1uF 4.7uF 100uF
AS7809DTRE1 1K 16V 10V 16V
L1100 R1100 OPT
MLB-201209-0120P-N2
INPUT 1 3 OUTPUT
2
GND
C1100 C1101 C1112 C1113
C1104 C1105 C1111
0.1uF 100uF C1102 C1103 0.33uF 0.1uF 47uF 0.1uF 0.01uF
16V 16V 0.1uF 100uF 16V
50V 50V 16V 50V 50V
16V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER 5 17
A B C D E F G H I J
* DDR2 1.8V By CAP - Place these Caps near Memory
D1.8V D1.8V
0.047uF
0.047uF
0.047uF
0.047uF
C305
C306
C307
C308
0.01uF
C309
C310
2700pF
C311
C312
C313
C314
0.01uF
C315
C316
2700pF
C317
C349
C350
C351
C323
C324
C325
C326
0.01uF
C327
C328
2700pF
C329
C330
C331
C332
0.01uF
C333
C334
2700pF
C335
C352
C353
C354
470pF
470pF
470pF
470pF
100uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
100uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
10uF
10uF
A1.2V
IC100
7 BCM3556
A6 0.1uF C345
DDR_BVDD0
A24 0.1uF C346
DDR_BVDD1
B7
DDR_BVSS0
B24
DDR_BVSS1
F20
DDR_PLL_TEST
B23 R312 0 DDR0_VREF0 DDR1_VREF0
DDR_PLL_LDO R325
B17 OPT DDR01_CKE
DDR01_CKE
DDR_COMP
C22
E16
R313
1% 240
22 ELPIDA ELPIDA
DDR01_ODT DDR01_ODT
C23 IC300 IC301
DDR_EXT_CLK
B12 EDE1116ACBG-1J-E
DDR0_CLK DDR0_CLK
C300 C301 C321 C322
EDE1116ACBG-1J-E
C12 DDR0_CLKb DDR0_DQ[0-15] DDR1_DQ[0-15]
DDR0_CLKB
A13 DDR1_CLK 470pF 0.1uF
DDR1_CLK 470pF 0.1uF
A12 DDR1_CLKb VREF DQ0 DDR0_DQ[0] VREF DQ0
DDR1_CLKB DDR01_A[0-3,7-13] J2 G8 DDR01_A[0-3,7-13] J2 G8 DDR1_DQ[0]
B15 DDR01_A[0] DQ1 DDR0_DQ[1] DQ1
DDR01_A00 G2 G2 DDR1_DQ[1]
E14 DDR01_A[1] DDR01_A[0-3] DQ2 DDR0_DQ[2] DQ2
DDR01_A01 A0 H7 H7 DDR1_DQ[2]
A15 DDR01_A[2] DDR0_A[4-6] DDR01_A[0] M8 DDR1_A[4-6] DDR01_A[0] A0 M8
H3 DQ3 DDR0_DQ[3] DQ3 DDR1_DQ[3]
DDR01_A02 A1 H3
6 DDR01_A03
DDR0_A04
D15
E13
DDR01_A[3]
DDR0_A[4] DDR0_A[4-6]
DDR01_A[1]
DDR01_A[2] A2
M3
M7
H1
H9
DQ4
DQ5
DDR0_DQ[4]
DDR0_DQ[5]
DDR01_A[1]
DDR01_A[2]
A1
A2
M3
M7
H1
H9
DQ4
DQ5
DDR1_DQ[4]
DDR1_DQ[5]
DDR01_A[3] A3 N2 DDR01_A[3] A3
E12 DDR0_A[5] DQ6 DDR0_DQ[6] N2 DQ6
DDR0_A05 DDR0_A[4] A4 F1 F1 DDR1_DQ[6]
F13 DDR0_A[6] N8 DDR1_A[4] A4 N8
F9 DQ7 DDR0_DQ[7] DQ7 DDR1_DQ[7]
DDR0_A06 DDR0_A[5] A5 DDR1_A[5] A5 F9
C14 DDR01_A[7] N3 DQ8 N3
DDR01_A07 C8 DDR0_DQ[8] C8 DQ8 DDR1_DQ[8]
DDR0_A[6] A6 N7 DDR1_A[6] A6
F14 DDR01_A[8] DQ9 DDR0_DQ[9] N7 DQ9
DDR01_A08 A7 C2 C2 DDR1_DQ[9]
B14 DDR01_A[9] DDR01_A[7] P2 DDR01_A[7] A7 P2
DDR01_A[7-13] D7 DQ10 DDR0_DQ[10] DQ10 DDR1_DQ[10]
DDR01_A09 DDR01_A[8] A8 A8 D7
D14 DDR01_A[10] P8 DQ11 DDR01_A[8] P8
DDR01_A10 D3 DDR0_DQ[11] D3 DQ11 DDR1_DQ[11]
DDR01_A[9] A9 P3 DDR01_A[9] A9
C13 DDR01_A[11] DQ12 DDR0_DQ[12] P3 DQ12
DDR01_A11 A10 D1 D1 DDR1_DQ[12]
D13 DDR01_A[12] DDR01_A[10] M2 DDR01_A[10] A10 M2
D9 DQ13 DDR0_DQ[13] DQ13 DDR1_DQ[13]
DDR01_A12 DDR01_A[11] A11 A11 D9
B13 DDR01_A[13] P7 DQ14 DDR01_A[11] P7
DDR01_A13 B1 DDR0_DQ[14] B1 DQ14 DDR1_DQ[14]
DDR01_A[12] A12 R2 DDR01_A[12] A12
F15 DDR1_A[4] DDR1_A[4-6] DQ15 DDR0_DQ[15] R2 DQ15
DDR1_A04 B9 B9 DDR1_DQ[15]
C15 DDR1_A[5]
DDR1_A05
D16 DDR1_A[6] BA0 D1.8V BA0 D1.8V
DDR1_A06 DDR01_BA0 L2 DDR01_BA0 L2
F16 DDR01_BA0 BA1 BA1
DDR01_BA0 DDR01_BA1 L3 VDD_5 DDR01_BA1 L3
B16 A1 A1 VDD_5
DDR01_BA1 DDR01_BA2 BA2 L1 BA2
DDR01_BA1 VDD_4 DDR01_BA2 L1 VDD_4
E15 E1 E1
DDR01_BA2 DDR01_BA2 DDR0_CLK
J9 VDD_3 DDR1_CLK VDD_3
A17 DDR01_CASb J9
DDR01_CASB R300 CK VDD_2 R303 CK VDD_2
A8 DDR0_DQ[0] 100 J8 M9 J8 M9
100
DDR0_DQ00 DDR0_CLKb CK K8 R1 VDD_1 CK VDD_1
B11 DDR0_DQ[1] DDR1_CLKb K8 R1
DDR0_DQ01 CKE
5 DDR0_DQ02
DDR0_DQ03
B8
D11
DDR0_DQ[2]
DDR0_DQ[3]
DDR01_CKE K2 DDR01_CKE CKE K2
E11 DDR0_DQ[4] ODT VDDQ_10 ODT VDDQ_10

DDR0_DQ04 DDR01_ODT K9 A9 DDR01_ODT K9 A9
C8 DDR0_DQ[5] CS VDDQ_9 CS VDDQ_9
DDR0_DQ05 L8 C1 L8 C1
C11 DDR0_DQ[6] DDR0_DQ[0-15] RAS VDDQ_8 RAS VDDQ_8
DDR0_DQ06 DDR01_RASb K7 C3 DDR01_RASb K7 C3
C9 DDR0_DQ[7] CAS VDDQ_7 CAS VDDQ_7
DDR0_DQ07 DDR01_CASb L7 C7 DDR01_CASb L7 C7
D8 DDR0_DQ[8] WE VDDQ_6 WE VDDQ_6
DDR0_DQ08 DDR01_WEb K3 C9 DDR01_WEb K3 C9
E10 DDR0_DQ[9] VDDQ_5 VDDQ_5
DDR0_DQ09 E9 E9
E9 DDR0_DQ[10] VDDQ_4 VDDQ_4 HYNIX
DDR0_DQ10 LDQS G1 G1
F11 DDR0_DQ[11] DDR0_DQS0 F7 VDDQ_3
HYNIX DDR1_DQS0 LDQS F7
DDR0_DQ11 G3 G3 VDDQ_3
DDR0_DQS1 UDQS B7 UDQS
F12 DDR0_DQ[12] VDDQ_2 IC300-*1 DDR1_DQS1 B7 VDDQ_2 IC301-*1
DDR0_DQ12 G7 G7
E8 DDR0_DQ[13] VDDQ_1 H5PS1G63EFR-20L
VDDQ_1 H5PS1G63EFR-20L
DDR0_DQ13 G9 G9
D10 DDR0_DQ[14] LDM LDM
DDR0_DQ14 DDR0_DM0 F3 VREF J2 G8 DQ0 DDR1_DM0 F3 VREF J2 G8 DQ0
F8 DDR0_DQ[15] UDM G2 DQ1
UDM G2 DQ1
DDR0_DQ15 DDR0_DM1 B3 A0 H7 DQ2 DDR1_DM1 B3 A0 H7 DQ2

M8 M8
C18 DDR1_DQ[0] A1 M3
H3 DQ3
A1 M3
H3 DQ3
DDR1_DQ00 A3 VSS_5 A2 M7
H1 DQ4
VSS_5 A2 M7
H1 DQ4
C20 DDR1_DQ[1] A3 N2
H9 DQ5 A3 A3 N2
H9 DQ5
DDR1_DQ01 DDR0_DQS0b LDQS E8 E3 VSS_4 A4 N8

F1 DQ6
LDQS VSS_4 A4 N8
F1 DQ6
A18 DDR1_DQ[2] A5 N3
F9 DQ7 DDR1_DQS0b E8 E3 A5 N3
F9 DQ7
DDR1_DQ02 DDR0_DQS1b UDQS A8 J3 VSS_3 A6 N7

C8 DQ8
UDQS VSS_3 A6 N7
C8 DQ8
B21 DDR1_DQ[3] A7 P2
C2 DQ9 DDR1_DQS1b A8 J3 A7 P2
C2 DQ9
DDR1_DQ03 N1 VSS_2 A8 P8
D7 DQ10
VSS_2 A8 P8
D7 DQ10
C21 DDR1_DQ[4] A9 P3
D3 DQ11 N1 A9 P3
D3 DQ11
DDR1_DQ04 P9 VSS_1 A10/AP M2

D1 DQ12
VSS_1 A10/AP M2
D1 DQ12
B18 DDR1_DQ[5] NC_5 A11 D9 DQ13
NC_5 P9 A11 D9 DQ13
DDR1_DQ05 R3 P7 DQ14 R3 P7 DQ14
4 A12 B1 A12 B1
R2 R2
B20 DDR1_DQ[6] DDR1_DQ[0-15] NC_6 B9 DQ15
NC_6 B9 DQ15
DDR1_DQ06 R7 R7
D18 DDR1_DQ[7] BA0 L2 BA0 L2
DDR1_DQ07 BA1 L3
A1 VDD_5
BA1 L3
A1 VDD_5
E18 DDR1_DQ[8] VSSQ_10 NC_4/BA2 L1 VDD_4 VSSQ_10
NC_4/BA2 L1 VDD_4
DDR1_DQ08 NC_1 B2 E1
B2 E1
D21 DDR1_DQ[9] A2 J9 VDD_3 NC_1 A2 J9 VDD_3
B8 VSSQ_9 CK J8 M9 VDD_2 VSSQ_9 CK J8 M9 VDD_2

DDR1_DQ09 NC_2 CK VDD_1 NC_2 B8 CK VDD_1
F18 DDR1_DQ[10] E2 VSSQ_8
K8 R1
E2 K8 R1
DDR1_DQ10 A7 CKE K2
A7 VSSQ_8 CKE K2
NC_3 R8 NC_3
E20 DDR1_DQ[11] VSSQ_7 R8 VSSQ_7
DDR1_DQ11 D2 ODT K9 A9 VDDQ_10 D2 ODT K9 A9 VDDQ_10
A22 DDR1_DQ[12] VSSQ_6 CS L8 C1 VDDQ_9
VSSQ_6
CS L8 C1 VDDQ_9
DDR1_DQ12 D8 RAS K7 C3 VDDQ_8 D8 RAS K7 C3 VDDQ_8

F17 DDR1_DQ[13] VSSQ_5 CAS L7 C7 VDDQ_7
VSSQ_5
CAS L7 C7 VDDQ_7
DDR1_DQ13 VSSDL J7 E7 WE K3 C9 VDDQ_6 VSSDL E7 WE K3 C9 VDDQ_6

B22 DDR1_DQ[14] VDDQ_5 J7 VDDQ_5
F2 VSSQ_4 E9
VSSQ_4 E9
DDR1_DQ14 LDQS F7
G1 VDDQ_4 F2 LDQS F7
G1 VDDQ_4
E17 DDR1_DQ[15] VSSQ_3 UDQS G3 VDDQ_3
VSSQ_3 UDQS G3 VDDQ_3
DDR1_DQ15 F8 B7
G7 VDDQ_2 F8 B7
G7 VDDQ_2
A10 DDR0_DM0 VSSQ_2 G9 VDDQ_1
VSSQ_2 G9 VDDQ_1
DDR0_DM0 H2 LDM F3 H2 LDM F3

C10 DDR0_DM1 VDDL VSSQ_1 UDM B3
VDDL VSSQ_1
UDM B3
DDR0_DM1 J1 H8 VSS_5 J1 H8 VSS_5
A3 A3
A20 DDR1_DM0 LDQS E8 E3 VSS_4 LDQS E8 E3 VSS_4
DDR1_DM0 UDQS A8 J3 VSS_3 UDQS A8 J3 VSS_3
F19 DDR1_DM1 N1 VSS_2 N1 VSS_2
DDR1_DM1 P9 VSS_1 P9 VSS_1
B10 DDR0_DQS0
NC_5/A14 R3 NC_5/A14 R3
DDR0_DQS0 NC_6/A15 R7 NC_6/A15 R7
B9 DDR0_DQS0b
DDR0_DQS0B NC_1 A2
B2 VSSQ_10
NC_1 A2
B2 VSSQ_10
F10 DDR0_DQS1 NC_2 E2
B8 VSSQ_9
NC_2 E2
B8 VSSQ_9
DDR0_DQS1 NC_3/A13 R8
A7 VSSQ_8
NC_3/A13 R8
A7 VSSQ_8
F9 DDR0_DQS1b D2 VSSQ_7 D2 VSSQ_7
DDR0_DQS1B D8 VSSQ_6 D8 VSSQ_6

B19 DDR1_DQS0 VSSDL J7 E7 VSSQ_5 VSSDL J7 E7 VSSQ_5
DDR1_DQS0 F2 VSSQ_4 F2 VSSQ_4

C19 DDR1_DQS0b F8 VSSQ_3 F8 VSSQ_3
DDR1_DQS0B VSSQ_2 VSSQ_2
3 DDR1_DQS1
DDR1_DQS1B
E19
D19
DDR1_DQS1
DDR1_DQS1b
VDDL J1
H2
H8 VSSQ_1 VDDL J1
H2
H8 VSSQ_1
C16 DDR01_RASb DDR0_VREF0

DDR01_RASB
A7 DDR1_VREF0
DDR_VREF0
A23
DDR_VREF1
C17 D1.8V DDR01_WEb
DDR01_WEB
C7
DDR_VDDP1P8_1
C361
D22
C343
C342
C360
C347
C344
C358
C359
DDR_VDDP1P8_2
C355 DDR_VTT
0.1uF
1uF 470pF 470pF 1uF 1uF 470pF 470pF 1uF
DDR01_A[0-3,7-13]
DDR1_A[4] AR304
DDR01_A[0] 75
C336
DDR_VTT DDR01_A[1] 0.01uF
DDR VTT DDR0_A[4-6]
DDR01_A[2]
AR305
C337
DDR0_A[4] 75 0.01uF
D3.3V DDR0_A[5]
DDR0_A[6]
2 IC302
DDR01_A[3]
DDR01_A[7]
AR306
75
C338
0.01uF
BD35331F-E2
DDR01_A[8]
C339
DDR01_A[9] 0.01uF
DDR1_VREF0 GND VTT DDR01_A[10] AR307
1 8
DDR01_A[11] 75
R302 C340
0 DDR01_A[12] 0.01uF
EN VTT_IN
2 7 D1.8V C348 DDR01_A[13]
C320 1uF
BCM recommends to remove this R
DDR0_VREF0 DDR01_CKE OPT 75 R310 C341
220uF
VTTS VCC DDR1_A[5] AR308 0.01uF
3 6
DDR1_A[6] 75
C357
0.1uF R301 DDR01_BA1
0 VREF VDDQ C362
4 5 DDR1_A[4-6] 0.1uF
DDR01_BA2
DDR01_RASb AR309
C304 75
0.1uF
C356 C302 DDR01_BA0

C303
0.1uF 0.1uF C318 C363 C319

R323
DDR01_CASb
1M
0.01uF DDR01_WEb
100uF 0.1uF 1uF
DDR01_ODT 75 R311

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR 6 17
A B C D E F G H I J
TX_0_DATA4_P
TX_0_DATA4_N
TX_0_DATA3_P
TX_0_DATA3_N
TX_0_DATA2_P
TX_0_DATA2_N
TX_0_DATA1_P
TX_0_DATA1_N
TX_0_DATA0_P
TX_0_DATA0_N
TX_1_DATA4_P
TX_1_DATA4_N
TX_1_DATA3_P
TX_1_DATA3_N
TX_1_DATA2_P
TX_1_DATA2_N
TX_1_DATA1_P
TX_1_DATA1_N
TX_1_DATA0_P
TX_1_DATA0_N
XTAL R2720
TX_0_CLK_P
TX_0_CLK_N
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
TX_1_CLK_P
TX_1_CLK_N
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:E7
7:E7
7:E7
7:E7
1M
URSA_A+[0-4],URSA_A-[0-4],URSA_ACK+,URSA_ACK- URSA_B+[0-4],URSA_B-[0-4],URSA_BCK+,URSA_BCK-
X2701
008:AF25
008:AM24
008:P27M_XTALO 0 08:P27
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
M_XTALI +3.3V_MEMC
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA0_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
12MHz
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P
C2717 C2724
M_XTALO
M_XTALI
20pF 20pF R2723 R2729
L2706
7 R2724
100
R2730
100
BLM18PG121SN1D
URSA_A+[0]
C2743
C2744
+3.3V_MEMC
BLM18PG121SN1D
0.1uF
URSA_A-[0]
URSA_A+[1]
URSA_A-[1]
URSA_A+[2]
URSA_A-[2]
URSA_ACK+
URSA_ACK-
URSA_A+[3]
URSA_A-[3]
URSA_A+[4]
URSA_A-[4]
URSA_B+[0]
URSA_B-[0]
URSA_B+[1]
URSA_B-[1]
100 100
1uF
008:AF11
008:AJ11
R2725 R2731
100 100
L2707
BLM18PG121SN1D
R2726 R2732
+1.26V_MEMC
100 100
+3.3V_MEMC
LH50_90_ONLY
BLM18PG121SN1D
LH50_90_ONLY
LH50_90_ONLY
LH50_90_ONLY
LH50_90_ONLY
L2703
R2727 R2733
LH50_90_ONLY
AR2704
0
1/16W
AR2706
0
1/16W
AR2701
0
1/16W
AR2702
0
1/16W
AR2703
0
1/16W
100 100
AR2705
0
1/16W
L2705
R2728 R2734
100 100
22uF
16V
C2740
0.1uF
C2709 10uF
C2711 0.1uF
C2742
0.1uF
C2713 0.1uF
C2715 0.1uF
C2708
C2756
10uF
10uF 10V
TX_1_DATA4_N
TX_1_DATA4_P
TX_1_DATA3_N
TX_1_DATA3_P
TX_1_CLK_N
TX_1_CLK_P
TX_1_DATA2_N
TX_1_DATA2_P
TX_1_DATA1_N
TX_1_DATA1_P
TX_1_DATA0_N
TX_1_DATA0_P
TX_0_DATA4_N
TX_0_DATA4_P
TX_0_DATA3_N
TX_0_DATA3_P
TX_0_DATA1_N
TX_0_DATA1_P
TX_0_DATA0_N
TX_0_DATA0_P
C2734
C2733
10V
TX_0_CLK_N
TX_0_CLK_P
TX_0_DATA2_N
TX_0_DATA2_P
0.1uF
C2727
C2730
0.1uF
10uF
C2754 10uF
AVDD_LVDS_1
AVDD_LVDS_2
PI Result R2736
GPIO[25]
AVDD_PLL
C2755
GPIO_13
GPIO_14
GPIO_12
10uF
6 820
GPIO_2
GPIO_1
GPIO_9
GPIO_8
LVACKP
LVACKM
GPIO_6
GPIO_4
10V
RECKP
RECKN
GND_6
ROCKP
ROCKN
GND_5
GND_2
LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
LVA3P
LVA3M
LVA4P
LVA4M
LVB0P
LVB0M
LVB1P
LVB1M
RE4P
RE4N
RE3P
RE3N
RE2P
RE2N
RE1P
RE1N
RE0P
RE0N
RO4P
RO4N
RO3P
RO3N
RO2P
RO2N
RO1P
RO1N
RO0P
RO0N
XOUT
SDAM
SCLM
REXT
R2714 0 C2751
XIN
001:L5 ISP_RXD_TR
+3.3V_MEMC 001:L5 ISP_TXD_TR R2715 0
0.1uF
C2749
B1
A1
C1
C2
A2
B2
B3
A3
C3
C4
A4
B4
F11
H8
B5
A5
C5
C6
A6
B6
B7
A7
C7
C8
A8
B8
G11
H7
K15
K16
D4
D3
B14
A14
D5
D6
N7
E11
D13
D11
G8
F10
B9
A9
C9
C10
A10
B10
B11
A11
C11
C12
A12
B12
D9
D7
B13
A13
C13
C14
D12
R2712 1K R2716 100 SDAS D8 GPIO_5
9:I4 SDA3_3.3V E1 0.1uF
R2717 100 SCLS GPIO_7
SCL3_3.3V D1 D10 C2750
9:I4
GPIO[8] F1 E10 GPIO_11
+3.3V_MEMC
GPIO[9] G1 E3 GPIO_10 0.1uF
R2713 1K C2731 0.1uF
OPT GND_14 K8 D2 GPIO_3
[E1]
VDDC_1 LVB2P URSA_B+[2]
1K OPT
1K OPT
E5 [D1] C15
URSA_B-[2]
R2706
R2708
BIT_SEL R2721 0 OPT GPIO[10] E2 B15 LVB2M

R2722 0 OPT GPIO[11] LVBCKP URSA_BCK+
GPIO12 GPIO14 LVDS_SEL F2 A15
Non M+S LVDS LOW LOW GPIO[12] LVBCKM URSA_BCK-
F3 A16
M+S 42" Mini LVDS LOW HIGH URSA_B+[3]
GPIO[13] G2 B16 LVB3P
M+S 47" Mini LVDS HIGH LOW
GPIO[22] LVB3M URSA_B-[3]
M+S 37" Mini LVDS HIGH HIGH M4 C16
URSA_B+[4]
R2707
R2709
GPIO[23] M5 D15 LVB4P

+3.3V_MEMC
1K
URSA_B-[4]
1K
GPIO[14] G3 D16 LVB4M

BLM18PG121SN1D
GPIO[15] E4 F9 AVDD_33_2 C2752
008:AE17
C2714 C2716 GPIO[16] GND_4
C2712
L2704 F4 G10 URSA_C+[0-4],URSA_C-[0-4],URSA_CCK+,URSA_CCK-
10uF
0.1uF 0.1uF GPIO[17] LVC0P URSA_C+[0]
C2710 G4 E15
5 10uF
10V
16V 16V GPIO[18]
GPIO[19]
H4 E16 LVC0M
LVC1P
0.1uF URSA_C-[0]
URSA_C+[1]
J4 E14
GPIO[20] LVC1M URSA_C-[1]
PI Result K4 F14
+1.8V_MEMC URSA_C+[2]
GPIO[21] L4 F16 LVC2P
C2732 VDDP_2 LVC2M URSA_C-[2]
BLM18PG121SN1D J6 F15
GND_7 LVCCKP URSA_CCK+
H9 G15
0.1uF
GND_15 K9 LVCCKM URSA_CCK-

10uF
L2702 0.1uF 0.1uF G16

LVC3P URSA_C+[3]
C2703 G14
C2707 URSA_C-[3]
URSA_DQ[0-31]
22uF VDDC_2 F6 H14 LVC3M

0.1uF
C2705
C2706
URSA_DQ[20] C2728 URSA_C+[4]

16V MDATA[20] H1 H16 LVC4P
URSA_DQ[19] MDATA[19] LVC4M URSA_C-[4]
H2 H15
LVD0P URSA_D+[0]
J15
* ISP Port for MEMC

URSA_DQ[17]
URSA_DQ[22]
MDATA[17]
MDATA[22]
H3
J1
IC2701 J16
J14
LVD0M
LVD1P
LVD1M
URSA_D-[0]
URSA_D+[1]
URSA_D-[1]
K14
URSA_DQ[27] MDATA[27] J2
URSA_DQ[28] 0.1uF MDATA[28] J3
URSA_DQ[25] C2719
MDATA[25] K1
LGE7329A G9
L14
GND_3
LVD2P
C2753
URSA_D+[2]
URSA_DQ[30] MDATA[30] LVD2M 0.1uF URSA_D-[2]
K2 L15
4 TJC2508-4A
P2701 +5.0V
AVDD_DDR_2
DQM[3]
K6 L16 LVDCKP
LVDCKM
URSA_DCK+
URSA_DCK-
URSA_DQM3 K3 M16
009:Q13
DQM[2] AVDD_33_1
ENG 009:Q13 URSA_DQM2 0.1uF
L1 F8
URSA_D+[3]
1 C2720
GND_10 J8
LH50_90_ONLY M15 LVD3P
R2701
R2702
DQS[2] LVD3M URSA_D-[3]

ENG
2.2K
2.2K
L2 M14
ENG
009:Q13 URSA_DQS2 URSA_D+[4]

DQSB[2] L3 N16 LVD4P
009:Q12 URSA_DQSB2 URSA_D-[4]
2 AVDD_DDR_4 L6 N15 LVD4M C2748
0.1uF VDDP_3 L8
ISP_RXD_TR GND_8 VDDC_5
C2729 H10 H6 008:AL17
3 B6 0.1uF +3.3V_MEMC
DQS[3] M1 N6 GPIO[24]
009:Q13 URSA_DQS3
DQSB[3] M2 E12 GPIO[7] URSA_D+[0-4],URSA_D-[0-4],URSA_DCK+,URSA_DCK-
009:Q12 URSA_DQSB3
4 AVDD_DDR_5 L7 D14 GPIO[6]
B6 URSA_DQ[31] MDATA[31] M3 F12 GPIO[5]
ISP_TXD_TR URSA_DQ[24] 0.1uF MDATA[24] N1 E13 GPIO[4]
R2738
GND_11 GPIO[3]
R2740
C2721 J9 F13
1K
1K
URSA_DQ[26] MDATA[26] GPIO[2]
N2 G13
URSA_DQ[29] MDATA[29] GPIO[1]
N3 H13
AVDD_DDR_6 L10 J13 GPIO[0]
+3.3V_MEMC URSA_DQ[23] MDATA[23] PWM0
P1 K12
BLM18PG121SN1D
URSA_DQ[16] MDATA[16] PWM1

R1 L12
3 URSA_DQ[18]
URSA_DQ[21]
MDATA[18]
MDATA[21]
T1 [L9]
[N13]
[N12] K13 CSZ
SDO
R2739
R2741
T2 [N5] M12
L2701
009:Q16
OPT
OPT
MCLK[0] SDI
1K
1K
URSA_MCLK R2 [N4] M13
0.1uF MCLKZ[0] SCK
URSA_MCLKZ P2 L13
009:Q15 GND_1 G7 N14 GPIO[30]
C2726
AVDD_MEMPLL GPIO[29]
L9 N13
C2701
MVREF GPIO[28]
C2702
0.1uF
10uF
009:Q15;009:Y15 N5 N12
ODT
URSA_ODT N4
J10
L11
K10
T10
K11
R10
P10
T11
R11
J11
P11
T12
R12
P12
H11
T13
R13
P13
T14
R14
P14
T15
R15
P15
T16
R16
P16
N10
N11
M11
0.1uF C2722
T3
R3
P3
T4
R4
P4
T5
R5
P5
T6
R6
P6
T7
R7
P7
T8
R8
P8
N8
F7
T9
R9
K7
P9
J7
N9
G6
M_SPI_CZ 008:AF6
GND_9
RASZ
CASZ
MADR[0]
MADR[2]
MADR[4]
GND_12
MADR[6]
MADR[8]
MADR[11]
WEZ
BADR[1]
BADR[0]
MADR[1]
MADR[10]
AVDD_DDR_7
MADR[5]
MADR[9]
MADR[12]
MADR[7]
MADR[3]
MCLKE
GND_16
VDDC_3
MDATA[4]
MDATA[3]
GND_13
MDATA[1]
MDATA[6]
AVDD_DDR_3
MDATA[11]
MDATA[12]
MDATA[9]
MDATA[14]
AVDD_DDR_1
DQM[1]
DQM[0]
DQS[0]
DQSB[0]
VDDP_1
DQS[1]
DQSB[1]
MDATA[15]
MDATA[8]
MDATA[10]
MDATA[13]
MDATA[7]
MDATA[0]
MDATA[2]
MDATA[5]
MCLK[1]
MCLKZ[1]
GPIO[26]
GPIO[27]
GND_17
RESET
VDDC_4
0.1uF M_SPI_DO 008:AF6
M_SPI_DI 008:AK5
C2723 M_SPI_CK 008:AK5
+3.3V_ST
C2747
C2741
0.1uF
0.1uF
C2745
0.1uF
C2746
0.1uF
R2737
10K
2
C2735
C2736
C2737
C2738
R2718
C2739
10K
+3.3V_MEMC
SPI FLASH MEMC_RESET 001:AB21
R2735
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
0
URSA_A[11]
URSA_A[10]
URSA_A[12]
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]
URSA_A[8]
URSA_A[1]
URSA_A[5]
URSA_A[9]
URSA_A[7]
URSA_A[3]
GPIO8 PWM1 PWM0

0.1uF
C2718
C2704
R2719
0.1uF
C2725
1uF
10K
I2C HIGH LOW HIGH

IC2702
URSA_DQ[11]
URSA_DQ[12]
URSA_DQ[14]
URSA_DQ[15]
URSA_DQ[10]
URSA_DQ[13]
W25X20AVSNIG
URSA_DQ[4]
URSA_DQ[3]
URSA_DQ[1]
URSA_DQ[6]
URSA_DQ[9]
URSA_DQ[8]
URSA_DQ[7]
URSA_DQ[0]
URSA_DQ[2]
URSA_DQ[5]
EEPROM HIGH HIGH LOW
R2703 56 CS
1 8
VCC
008:Y11M_SPI_CZ
R2704 56 DO
2 7
HOLD
008:Y11M_SPI_DO SPI HIGH HIGH HIGH

R2705 10K WP CLK R2710 56
3 6
M_SPI_CK
008:Y10
GND
4 5
DIO R2711 56
M_SPI_DI
008:Y11 URSA_DQ[0-31] 009:D21;009:AL21
1
URSA_RASZ
URSA_CASZ
URSA_WEZ
URSA_BA1
URSA_BA0
URSA_MCLKE
URSA_A[0-12]
009:Y13 URSA_DQM1
009:Y13 URSA_DQM0
009:Y13 URSA_DQS0
009:Y12URSA_DQSB0
009:Y13 URSA_DQS1
009:Y12URSA_DQSB1
009:Y16URSA_MCLK1
URSA_MCLKZ1
009:Y15
009:S17;009:W17
009:S17;009:W17
009:T10;009:V11
009:T10;009:V11
009:T10;009:V11
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES This page is all LH50/90_ONLY option
009:T10;009:V11

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
009:U20
BCM (BRAZIL VENUS) 2008.10.15

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Mstar FRC 7 15
29
28
DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_MEMC +1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR

27 BLM18PG121SN1D
L900
10V
10V
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C924
C926
C928
10uF
C929
C931
C933
C934
C935
C936
C937
C938
C939
C940
0.1uF
0.1uF
26
C942
C943
C944
C921
C925
C927
C941
C900
C913
C923
10uF
C902
10uF
10uF
C903
C904
C905
C906
C907
C909
C911
C912
C914
C915
C916
C917
C918
C919
C920
C922
C901
10uF
10uF
PI Result
25
24
008:N4
+1.8V_FRC_DDR +1.8V_FRC_DDR
23
1K 1%
R901
1K 1%
R921
URSA_A[0-12]
22 008:U4;009:AL21 URSA_DQ[0-31] URSA_DQ[0-31] 008:U4;009:D21
1000pF
1K 1%
1000pF
0.1uF
1K 1%
0.1uF
R922
R902
C930
C932
C910
C908
AR900 IC900 IC901 AR914
URSA_DQ[27] DDR_DQ[27] DDR_DQ[15] URSA_DQ[15]
H5PS5162FFR-S6C H5PS5162FFR-S6C
21 URSA_DQ[28]
URSA_DQ[25] 56
DDR_DQ[28]
DDR_DQ[25]
DDR_DQ[8]
DDR_DQ[10]
56 URSA_DQ[8]
URSA_DQ[10]
URSA_DQ[30] DDR_DQ[30] DDR_DQ[13] URSA_DQ[13]
DDR_DQ[16] DQ0 G8 J2 VREF VREF J2 G8 DQ0 DDR_DQ[0]
AR901 DDR_DQ[17] DQ1 LH50_90_ONLY LH50_90_ONLY DQ1 DDR_DQ[1] AR915
URSA_DQ[22] DDR_DQ[22] G2 G2 DDR_DQ[7] URSA_DQ[7]
DDR_DQ[18] DQ2 URSA_A[3] AR911 DDRA_A[3] DQ2 DDR_DQ[2]
20 URSA_DQ[17] DDR_DQ[17]
DDR_DQ[19] DQ3
H7
H3
M8 A0 DDRB_A[0]
DDRB_A[10] AR904 URSA_A[10] URSA_A[1] 22 DDRA_A[1]
DDRA_A[0] A0 M8
H7
H3 DQ3 DDR_DQ[3]
DDR_DQ[0] 56 URSA_DQ[0]
DDR_DQ[16-31]
URSA_DQ[19] 56 DDR_DQ[19] A1 DDRB_A[1] DDRA_A[1] A1 DDR_DQ[2] URSA_DQ[2]
DDR_DQ[0-15]
DDR_DQ[20] DQ4 M3 DDRB_A[1] 22 URSA_A[1] URSA_A[10] DDRA_A[10] M3 DQ4 DDR_DQ[4]
H1 H1
DDRB_A[0-12]
URSA_DQ[20] DDR_DQ[20] M7 A2 DDRB_A[2] DDRA_A[2] A2 M7 DDR_DQ[5] URSA_DQ[5]
DDRA_A[0-12]
DDR_DQ[21] DQ5 H9 DDRB_A[3] URSA_A[3] H9 DQ5 DDR_DQ[5]
N2 A3 DDRB_A[3] DDRA_A[3] A3 N2
AR902 DDR_DQ[22] DQ6 DDRB_A[9] URSA_A[9] URSA_A[9] DDRA_A[9] DQ6 DDR_DQ[6] AR916
URSA_DQ[31] DDR_DQ[31] F1 A4 DDRB_A[4] DDRA_A[4] A4 F1 DDR_DQ[11] URSA_DQ[11]
DDR_DQ[23] DQ7 N8 DDRB_A[12] AR905 URSA_A[12] URSA_A[12] AR912 DDRA_A[12] N8 DQ7 DDR_DQ[7]
19 URSA_DQ[24]
URSA_DQ[26] 56
DDR_DQ[24]
DDR_DQ[26]
DDR_DQ[24]
DDR_DQ[25]
DQ8
DQ9
F9
C8
N3
N7
A5
A6
DDRB_A[5]
DDRB_A[6]
DDRB_A[7]
DDRB_A[5]
22 URSA_A[7]
URSA_A[5]
URSA_A[7]
URSA_A[5]
22 DDRA_A[7]
DDRA_A[5]
DDRA_A[5]
DDRA_A[6]
A5
A6
N3
N7
F9
C8 DQ8
DQ9
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[12]
DDR_DQ[9]
56 URSA_DQ[12]
URSA_DQ[9]
URSA_DQ[29] DDR_DQ[29] C2 A7 DDRB_A[7] DDRA_A[7] A7 C2 DDR_DQ[14] URSA_DQ[14]
DDR_DQ[26] DQ10 P2 DDRB_A[0] URSA_A[0] URSA_A[2] DDRA_A[2] P2 DQ10 DDR_DQ[10]
D7 A8 DDRB_A[8] DDRA_A[8] A8 D7
AR903 DDR_DQ[27] DQ11 P8 DDRB_A[2] AR906 URSA_A[2] URSA_A[0] AR913 DDRA_A[0] P8 DQ11 DDR_DQ[11] AR917
URSA_DQ[23] DDR_DQ[23] D3 A9 DDRB_A[9] DDRA_A[9] A9 D3 DDR_DQ[6] URSA_DQ[6]
DDR_DQ[28] DQ12 P3 DDRB_A[4] 22 URSA_A[4] URSA_A[6] 22 DDRA_A[6] P3 DQ12 DDR_DQ[12]
18 URSA_DQ[16]
URSA_DQ[18] 56
DDR_DQ[16]
DDR_DQ[18]
DDR_DQ[29]
DDR_DQ[30]
DQ13
DQ14
D1
D9
M2
P7
A10/AP
A11
DDRB_A[10]
DDRB_A[11]
DDRB_A[6]
AR907
URSA_A[6] URSA_A[4]
AR910
DDRA_A[4]
DDRA_A[10]
DDRA_A[11]
A10/AP
A11
M2
P7
D1
D9 DQ13
DQ14
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[1]
DDR_DQ[3]
56 URSA_DQ[1]
URSA_DQ[3]
URSA_DQ[21] DDR_DQ[21] B1 A12 DDRB_A[12]
009:Q14 B_URSA_RASZ URSA_RASZ
008:I4;009:S17 URSA_RASZ
008:I4;009:W17 A_URSA_RASZ 009:Y14DDRA_A[12] A12 B1 DDR_DQ[4] URSA_DQ[4]
DDR_DQ[31] DQ15 R2 R2 DQ15 DDR_DQ[15]
B9 B_URSA_CASZ URSA_CASZ URSA_CASZ A_URSA_CASZ B9
009:Q14 008:J4;009:W17
008:J4;009:S17 009:Y14
DDRB_A[11] URSA_A[11] URSA_A[8] 22 DDRA_A[8]
+1.8V_FRC_DDR BA0 DDRB_A[8] URSA_A[8] URSA_A[11] DDRA_A[11] BA0 +1.8V_FRC_DDR
17 VDD5 A1
L2
L3 BA1
B_URSA_BA0
B_URSA_BA1
R903 22
009:T11
009:T11
22
009:V10
009:V10
R912
A_URSA_BA0
A_URSA_BA1
22
BA1
L2
L3
A1 VDD5
VDD4 URSA_MCLK 008:C11 008:U4 URSA_MCLK1 VDD4
E1 E1
R900
OPT
R923
OPT
150
150
VDD3 J9 J8 CK CK J8 J9 VDD3
VDD2 M9 K8 CK R904 22 R913 22 CK K8 M9 VDD2
URSA_MCLKZ 008:C10 008:U4 URSA_MCLKZ1
16 VDD1 R1 K2 CKE
B_URSA_MCLKE 009:T11 009:V10 A_URSA_MCLKE
CKE K2 R1 VDD1
K9 ODT R905 22 R914 22 ODT K9

URSA_ODT 008:C10;009:Y15 008:C10;009:Q15 URSA_ODT
VDDQ10 A9 L8 CS CS L8 A9 VDDQ10
VDDQ9 RAS RAS VDDQ9
15 VDDQ8
VDDQ7
C1
C3
K7
L7 CAS
WE
B_URSA_RASZ
B_URSA_CASZ
009:R17
009:R17
009:X17
009:X17
A_URSA_RASZ
A_URSA_CASZ
CAS
WE
K7
L7
C1
C3 VDDQ8
VDDQ7
C7 K3 B_URSA_WEZ A_URSA_WEZ K3 C7
009:T11 009:V10
VDDQ6 C9 C9 VDDQ6
VDDQ5 E9 E9 VDDQ5
F7 LDQS R906 56 R915 56 LDQS F7
VDDQ4 URSA_DQS2 008:C14 008:Q4 URSA_DQS0 VDDQ4
14 VDDQ3
VDDQ2
G1
G3
B7 UDQS R907 56
URSA_DQS3 008:C13 008:R4 URSA_DQS1
R916 56 UDQS B7
G1
G3 VDDQ3
VDDQ2
G7 G7
VDDQ1 G9 F3 LDM R908 56 R917 56 LDM F3 G9 VDDQ1
URSA_DQM2 008:C15 008:Q4 URSA_DQM0
B3 UDM R909 56 R918 56 UDM B3
URSA_DQM3 008:C15 008:P4 URSA_DQM1
13 VSS5 A3 E8 LDQS R910 56

URSA_DQSB2 008:C14 008:Q4 URSA_DQSB0
R919 56 LDQS E8 A3 VSS5
VSS4 E3 A8 UDQS R911 56 R920 56 UDQS A8 E3 VSS4
URSA_DQSB3 008:C13 008:R4 URSA_DQSB1
VSS3 J3 J3 VSS3
VSS2 N1 N1 VSS2
NC4 AR908 NC4
12 VSS1 P9
L1
R3 NC5
NC6
009:O16
009:O16
B_URSA_BA0
B_URSA_BA1
URSA_BA0
URSA_BA1
008:L4;009:T10
008:K4;009:T10
NC5
NC6
L1
R3
P9 VSS1
R7 R7
009:Q15 B_URSA_MCLKE URSA_MCLKE 008:M4;009:T10
VSSQ10 009:Q14 B_URSA_WEZ URSA_WEZ 008:K4;009:T10 VSSQ10
B2 NC1 22 NC1 B2
VSSQ9 A2 A2 VSSQ9
11 VSSQ8
VSSQ7
B8
A7
E2
R8
NC2
NC3 008:L4;009:V11 URSA_BA0
AR909
A_URSA_BA0 009:AA16
NC2
NC3
E2
R8
B8
A7 VSSQ8
VSSQ7
D2 +1.8V_FRC_DDR 008:K4;009:V11 URSA_BA1 A_URSA_BA1 +1.8V_FRC_DDR D2
009:AA16
VSSQ6 D8 D8 VSSQ6
008:M4;009:V11 URSA_MCLKE A_URSA_MCLKE 009:Z15
VSSQ5 E7 VSSDL VSSDL E7 VSSQ5
J7 008:K4;009:V11 URSA_WEZ A_URSA_WEZ 009:Y14 J7
VSSQ4 22 VSSQ4
10 VSSQ3
VSSQ2
F2
F8
F2
F8 VSSQ3
VSSQ2
H2 H2
VSSQ1 H8 J1 VDDL VDDL J1 H8 VSSQ1
8
resonance Compensation
7
+1.8V_MEMC
+1.8V_FRC_DDR
6
0.1uF
0.1uF
0.1uF
C945
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C946
C947
C948
C949
C950
C951
C952
3 This page is all LH50/90_ONLY option

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM (BRAZIL VENUS) 08.10.15
M-STAR FRC DDR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 8 15
A B C D E F G H I J
D3.3V D3.3V
RESET
2.7K
2.7K
2.7K
R4011
IC100
12:B3;12:I4 330 D3.3V D3.3V BCM3556
POWER_DET
R163
R164
R131
10:G2
R410
J23 N26
10K
JTAG_RESETb EBI_ADDR3 GPIO_00
J24 L26
R409
ENG EBI_ADDR4 GPIO_01 TUNER_RESETb 5:B6
910
H25 N25
SW400 EBI_ADDR2 GPIO_02
7 SKHMPWE010 1
IC400
KIA7029AF
H24
H23
EBI_ADDR1
EBI_ADDR0
GPIO_03
GPIO_04
L25
K27
3
R408 J25 K28
330 I O EBI_ADDR5 GPIO_05
1 3 F26 K24
SYS_RESETb D3.3V EBI_ADDR6 GPIO_06
5 2
H28 K26
EBI_ADDR8 GPIO_07
J26 K25
2
G C414 EBI_ADDR9 GPIO_08 VREG_CTRL

10uF H27 AA27
EBI_ADDR13 GPIO_09 BCMPWM_VBR_B 4:A5;7:C2
G26 AA28
2.7K
R116
EBI_ADDR12 GPIO_10
J27 AA26
EBI_ADDR11 GPIO_11 RF_GAIN1 5:B7
J28 L1
EBI_ADDR10 GPIO_12 RGB_SW 1:J5
F27 L3 0 R138
EBI_ADDR7 GPIO_13
G24 L2
EBI_TAB GPIO_14
R117 H26 Y25
EBI_WE1B GPIO_15 BCM_RX 14:R8
33 G27 Y26
EBI_CLK_IN GPIO_16 BCM_TX 14:X7
G28 M27
EBI_CLK_OUT GPIO_17
K23 AA25
EBI_RWB GPIO_18 RF_SW 5:B7
G25 R25
EBI_CS0B GPIO_19
NAND_IO[0-7] N28
GPIO_20 COMPOSITE2_SW 1:B4
N27 R105
GPIO_21 22
D3.3V NAND_IO[0] U24 AH18
NAND_DATA0 GPIO_22 BCM_AUD_MCLK 3:B6
6 NAND_IO[1]
NAND_IO[2]
T26
T27
NAND_DATA1
NAND_DATA2
GPIO_23
GPIO_24
P23
M23
BCMPWM_VBR_A
NVRAM
2.7K
2.7K
2.7K
NAND_IO[3] 4:A6
U26 AD19
NAND_DATA3 GPIO_25
NAND_IO[4] U27 AE19
NAND_DATA4 GPIO_26
NAND_IO[5] V26 M4
NAND_DATA5 GPIO_27 BIT_SEL 7:E3
NAND_IO[6] V27 M5
R194
R193
R192
NAND_DATA6 GPIO_28 LVDS_SEL 7:E2
D3.3V D3.3V NAND_IO[7] V28 L23
NAND_DATA7 GPIO_29
C2 NAND_CEb T24 Y28
NAND_CS0B GPIO_30
C2 NAND_ALE R23 Y27
NAND_ALE GPIO_31
C3 NAND_REb T23 G2 SF_SCK 0 R198
NAND_REB GPIO_32
4.7K
C2 NAND_CLE T25 G3 SF_MISO 0 R196

R422
NAND_CLE GPIO_33 D3.3V

C2 NAND_WEb R24 G5 SF_MOSI 0 R197 OPT
IC403 C3 U25
NAND_WEB GPIO_34
G6 0 R109 R120
NAND_RBb SF_CSB
NAND_RBB GPIO_35
4.7K
AT24C512BW-SH-T G4 2.7K
COMPOSITE1_SW
R419
GPIO_36 1:B7
L24
GPIO_37 BLUETOOTH_RESET I3;14:I3
W24 P25
A0 VCC SF_MISO GPIO_38
1 8 U23 L5
SF_MOSI GPIO_39 MEMC_RESET 17:A7;17:C6
C416 C420 V23 K4 0 R135
0.1uF 4700pF SF_SCK GPIO_40
A1 WP V24 K1
2 7 SF_CSB GPIO_41
L27
GPIO_42
5 A2
3 6
SCL
R411
22
I4;2:AH5;14:C5;3:B4
SCL2_3.3V
GPIO_43
GPIO_44
M26
N23
R28
R412 I4;2:AH5;14:C6;3:B4 GPIO_45
GND SDA 22 R27
4 5 SDA2_3.3V GPIO_46
R26
GPIO_47 DIMMING_RESET 3:C2;3:E2;3:H3
P28
GPIO_48
P27
GPIO_49
K6
GPIO_50
K5 22 R137
GPIO_51 DDC_SCL
P26 22 R143 12:E5
GPIO_52 DDC_SDA D3.3V
M3 22 R178 12:E4
GPIO_53
M2
OPT
4.7K OPT
HDMI_HTPLG_IN 11:AH18
GPIO_54
M1
GPIO_55 COMP1_SW 1:D7
4.7K
4.7K
4.7K
4.7K
4.7K
4.7K
4.7K
R187
R184
R183
R180
R177
R176
R171
R170
L4
GPIO_56
L6
GPIO_57 COMP2_SW 1:E7
W27
SGPIO_00 SCL0_3.3V 5:B3;5:B6
W28
SGPIO_01 SDA0_3.3V 5:B3;5:B6
W26
SGPIO_02 SCL1_3.3V 5:G5;16:G14
W25
SGPIO_03 SDA1_3.3V 5:G5;16:G14
J2
SGPIO_04 SCL2_3.3V B5;2:AH5;14:C5;3:B4
4 SGPIO_05
SGPIO_06
J1
K3
SDA2_3.3V
SCL3_3.3V
B5;2:AH5;14:C6;3:B4
12:F3
K2
SDA3_3.3V
* NAND FLASH MEMORY 1G bit SGPIO_07 12:F3
I2C 0 : TUNER
Boot Strap I2C
I2C
1
2
:
:
TDA9996,NTP3100
NVRAM, MICOM
D3.3V I2C 3 : FRC, DIMMING IC
D3.3V D3.3V D3.3V
IC101
NAND01GW3A2CN6E
2.7K
2.7K
2.7K
OPT
R314
R316
R320
E3;E6 E3;E6 NC_1 NC_29

1 48
NAND_IO[0] NAND_IO[3] NAND_IO[2]
NC_2 NC_28
2.7K
E3;E6 2 47
2.7K
2.7K
NC_3 NC_27
OPT
R318
R317
3 NC_4
3
4
46
45
NC_26 NAND_IO[0-7]
R191
NC_5 I/O7 NAND_IO[7]

5 44
NC_6 I/O6 NAND_IO[6]
6 43
NAND_IO[4]
Open Drain RB I/O5 NAND_IO[5]
E3;E6 E5 NAND_RBb 7 42
D3.3V D3.3V
2.7K
R I/O4 NAND_IO[4]
R315
E5 NAND_REb 8 41
E NC_25
E6 NAND_CEb 9 40
2.7K
2.7K
NC_7 NC_24
OPT
R321
R322
10 39
C116 C101
E3;E6 NC_8 NC_23
NAND_IO[0-7]
4700pF 11 38 4700pF
NAND_IO[6] NAND_IO[5]
VDD_1 VDD_2
E3;E6 C114 12 37 C115
2.7K
2.7K
0.1uF VSS_1 VSS_2 0.1uF

OPT
OPT
R319
R324
13 36
NC_9 NC_22
14 35
NC_10 NC_21
15 34
NAND_IO[0] : Flash Select (1) CL NC_20
E5 NAND_CLE 16 33
0 : Boot From Serial Flash
2 1 : Boot From NAND Flash E5 NAND_ALE
AL
17 32
I/O3 NAND_IO[3]
D3.3V W I/O2 NAND_IO[2]

E5 NAND_WEb 18 31
NAND_IO[1] : NAND Block 0 Write (DNS)
WP I/O1 NAND_IO[1]
0 : Enable Block 0 Write 19 30
1 : Disable Block 0 Write R136 NC_11 I/O0 NAND_IO[0]
20 29
4.7K
NC_12 NC_19
NAND_IO[3:2] : NAND ECC (01) 21 28
00 : No ECC NC_13 NC_18
C 22 27
01 : 1 ECC Bit
10 : 4 ECC Bit B Q101 NC_14 NC_17
FLASH_WP_1 23 26
KRC103S
11 : 8 ECC Bit NC_15 NC_16
24 25
E
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1, DNS)

00 : 1.2mA
01 : 1.8mA
10 : 2.4mA (Recommand)
1 11 : 3.0mA

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM3556 & NAND 9 17
A B C D E F G H I J K
D1.2V D1.2V
C243 C249 C250 C251 C252 C253 C254 C286 C287 C244 C246 C256 C258 C259 C262 C265 C266 C288 C290
0.1uF 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 33uF 33uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
54MHz X-TAL
1
IC100
BCM3556 D3.3V
D23 B4
5:B6 TU_SCLK PKT0_CLK LVDS_TX_0_DATA0_P LVDS_TX_1_DATA4_N 7:D7
C24 A4 C245 C255 C257 C261 C263 C264 C267 C289
TU_SDATA PKT0_DATA LVDS_TX_0_DATA0_N LVDS_TX_1_DATA4_P 7:D7
5:B6 B26 C6 4.7uF 0.1uF 0.01uF 0.1uF 4.7uF 0.1uF 0.01uF 0.1uF
5:B6 TU_SYNC PKT0_SYNC LVDS_TX_0_DATA1_P LVDS_TX_1_DATA3_N 7:D7
A25 B6
RMX0_CLK LVDS_TX_0_DATA1_N LVDS_TX_1_DATA3_P 7:D7
B25 B3
RMX0_DATA LVDS_TX_0_DATA2_P LVDS_TX_1_DATA2_N 7:D7
A26 A3
There are Lots of problem using fundamental crystal RMX0_SYNC LVDS_TX_0_DATA2_N LVDS_TX_1_DATA2_P 7:D7
A1
LVDS_TX_0_DATA3_P LVDS_TX_1_DATA1_N 7:D7
A2
LVDS_TX_0_DATA3_N LVDS_TX_1_DATA1_P 7:D7
G23 D5
POD2CHIP_MCLKI LVDS_TX_0_DATA4_P LVDS_TX_1_DATA0_N 7:D7 D3.3V
R205 D25 D6
22 POD2CHIP_MDI0 LVDS_TX_0_DATA4_N LVDS_TX_1_DATA0_P 7:D7
D24 C5
POD2CHIP_MDI1 LVDS_TX_0_CLK_P LVDS_TX_1_CLK_N 7:D7
12pF
C25 B5
POD2CHIP_MDI2 LVDS_TX_0_CLK_N LVDS_TX_1_CLK_P 7:D7
C298
1008LS-272XJLC R208 E27 B1

604 POD2CHIP_MDI3 LVDS_TX_1_DATA0_P LVDS_TX_0_DATA4_N 7:E7
E26 B2
2 1% D28
POD2CHIP_MDI4
POD2CHIP_MDI5
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
C2
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
7:E7
7:E7
C216
0.1uF
C270
0.1uF
C292
0.1uF
C294
0.1uF
D27 C3
POD2CHIP_MDI6 LVDS_TX_1_DATA1_N LVDS_TX_0_DATA3_P 7:E7
54MHz
54MHz_XTAL_P D26 D1
X201
D3
L206 POD2CHIP_MDI7 LVDS_TX_1_DATA2_P LVDS_TX_0_DATA2_N 7:E7
E23 D2
54MHz_XTAL_N D3 POD2CHIP_MISTRT LVDS_TX_1_DATA2_N LVDS_TX_0_DATA2_P 7:E7
E24 E1
POD2CHIP_MIVAL LVDS_TX_1_DATA3_P LVDS_TX_0_DATA1_N 7:E7
F25 E2
CHIP2POD_MCLKO LVDS_TX_1_DATA3_N LVDS_TX_0_DATA1_P 7:E7
C27 E3
CHIP2POD_MDO0 LVDS_TX_1_DATA4_P LVDS_TX_0_DATA0_N 7:E7
C296 C26 E4 D1.8V
33pF CHIP2POD_MDO1 LVDS_TX_1_DATA4_N LVDS_TX_0_DATA0_P 7:E7
B28 D3
CHIP2POD_MDO2 LVDS_TX_1_CLK_P LVDS_TX_0_CLK_N 7:E7 A1.2V
B27 D4 A2.5V
CHIP2POD_MDO3 LVDS_TX_1_CLK_N LVDS_TX_0_CLK_P 7:E7
A27 F5 C228 OPT
CHIP2POD_MDO4 LVDS_PLL_VREG
12pF
R211 F24 F1 10uF

22
C299
CHIP2POD_MDO5 LVDS_TX_AVDDC1P2
F23 F4 C247 C272 C275 C276 C278 C280 C297 C2004
CHIP2POD_MDO6 LVDS_TX_AVDD2P5_1 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF 4.7uF 4.7uF
E25 F2 33uF
CHIP2POD_MDO7 LVDS_TX_AVDD2P5_2
MOVE BOTTOM SIDE TO TOP SIDE OF PCB C28 C1
A3.3V A1.2V A2.5V CHIP2POD_MOSTRT LVDS_TX_AVSS_1
A28 F3
CHIP2POD_MOVAL LVDS_TX_AVSS_2
0.1uF
0.1uF
0.1uF
4.7uF
4.7uF
C4
C2000
C236
C239
C242
C295
LVDS_TX_AVSS_3
A5
L202 LVDS_TX_AVSS_4
AC18 E5
BLM18PG121SN1D VDAC_AVDD2P5 LVDS_TX_AVSS_5
AF20 E6
3 AG20
VDAC_AVDD1P2
VDAC_AVDD3P3_1
LVDS_TX_AVSS_6
LVDS_TX_AVSS_7
D7 D1.8V
4.7uF
AG21 E7
0.1uF
0.1uF
0.1uF
VDAC_AVDD3P3_2 LVDS_TX_AVSS_8
C214
C219
C223
C212
F7
LVDS_TX_AVSS_9
G7
LVDS_TX_AVSS_10 A1.2V
AF19 H7
D3.3V VDAC_AVSS_1 LVDS_TX_AVSS_11 C248 C281 C282 C283 C284 C285 C2005 C2006
ENG AD20 A2.5V 1000pF 1000pF 0.01uF 0.01uF 0.01uF 0.01uF
JTAG D3.3V
TJC2508-4A
P200 AE20
AH22
VDAC_AVSS_2
VDAC_AVSS_3
VDAC_RBIAS CLK54_AVDD1P2
AD27
1000pF 1000pF
C215 AH20 AD28

0.1uF R220
JP200 560 VDAC_1 CLK54_AVDD2P5
AG19 AD26
10K R229
1K R233
1K R234
1K R235
VDAC_2 CLK54_AVSS
4.7uF
R200
1.5K
C213 AC26
R201
1.5K
0.1uF
0.1uF
1
C200
CLK54_XTAL_N 54MHz_XTAL_N H4
C2001
C2002
0.01uF
AH21 AC27
JP201 VDAC_VREG CLK54_XTAL_P 54MHz_XTAL_P H4
AE25
2 CLK54_MONITOR
E5 BCM3549_JTAG_TRSTb Y23
JP202 PM_OVERRIDE
E5 BCM3549_JTAG_TDI M25
OPT BSC_S_SCL
E5 BCM3549_JTAG_TDO 3 M24
R236 1K BSC_S_SDA
E5 BCM3549_JTAG_TMS MNT_VOUT AA23 A1.2V
JP203 VCXO_AGND_1
E4 BCM3549_JTAG_TCK AB24
OPT 4 VCXO_AGND_2
9:A7 JTAG_RESETb R6 AC24 L203
1% 75
OPT
IC100
R228
R237 1K USB_AVSS_1 VCXO_AGND_3 BLM18PG121SN1D
T6 AF25
4
R232
A3.3V R7
USB_AVSS_2 VCXO_AVDD1P2
AF24 D1.2V BCM3556
OPT
A1.2V USB_AVSS_3 VCXO_PLL_AUDIO_TESTOUT

C233
0.1uF
C235
4.7uF
IC100
BBS DEBUG T7
A2.5V
USB_AVSS_4 BCM3556
1K
T8
USB_AVSS_5 D3.3V AD5 P16
R3 P24 DVSS_1 DVSS_62
USB_AVDD1P2 RESET_OUTB 9:B7;14:I27 AD6 R16
U3 F6 SYS_RESETb H8 DVSS_2 DVSS_63
USB_AVDD1P2PLL RESETB J7 T16
L200 T4 N24 2.7K VDDC_1 DVSS_3 DVSS_64
J8 K7 U16
BLM18PG121SN1D USB_AVDD2P5 NMIB VDDC_2
T3 J5 R221 K8 DVSS_4 DVSS_65
USB_AVDD2P5REF TMODE_0 L7 V16
R4 J4 VDDC_3 DVSS_5 DVSS_66
L8 M7 AA16
USB_AVDD3P3 TMODE_1 VDDC_4
U4 J6 A1.2V M8 DVSS_6 DVSS_67
USB_RREF TMODE_2 AB7 D17
V1 J3 A2.5V D3.3V VDDC_5 DVSS_7 DVSS_68
0.1uF
0.1uF
0.1uF
4.7uF
0.1uF
USB_DM1 N8 AC7 L17
USB_DM1 TMODE_3 VDDC_6
V2 V25 L201 P8 DVSS_8 DVSS_69
D3.3V USB_DP1 USB_DP1 SPI_S_MISO G8 M17
C201 R209 U1 AH3 BLM18PG121SN1D VDDC_7 DVSS_9 DVSS_70
USB_DM2 R8 D9 N17
100pF 3.9K USB_DM2 POR_OTP_VDD2P5 OPT VDDC_8
1% U2 AB8 AA8 DVSS_10 DVSS_71
USB_DP2 USB_DP2 POR_VDD1P2 C231 C234 R224 R225
VDDC_9
AA9 P17
T5 10uF 0.1uF 4.7K DVSS_11 DVSS_72
C207
C208
C209
4.7K H9
C202
C203
R210 USB_MONCDR VDDC_10

G10 R17
120 R5 H4 BCM3549_JTAG_TCK H10 DVSS_12 DVSS_73
USB_MONPLL EJTAG_TCK G2 A11 T17
2.7K R215 R1 H3 VDDC_11 DVSS_13 DVSS_74
BCM3549_JTAG_TDI H11 L11 U17
USB_PWRFLT_1 EJTAG_TDI G2 VDDC_12
USB_PWRFLT2 R2 H2 BCM3549_JTAG_TDO H12 DVSS_14 DVSS_75
USB_PWRFLT_2 EJTAG_TDO G2 M11 V17
14:AI20 T2 H1 VDDC_13 DVSS_15 DVSS_76
BCM3549_JTAG_TMS H13 N11 AA17
USB_PWRON_1 EJTAG_TMS G2 VDDC_14
USB_PWRON2 T1 G1 OPT BCM3549_JTAG_TRSTb H14 DVSS_16 DVSS_77
14:AH21 USB_PWRON_2 EJTAG_TRSTB G2 P11 AC19
H6 VDDC_15 DVSS_17 DVSS_78
5 EJTAG_CE0
EJTAG_CE1
H5
1K
1K
R226
R227 For using T32 Debugger
H15
H16
VDDC_16
VDDC_17
R11
T11
DVSS_18
DVSS_19
DVSS_79
DVSS_80
G18
L18
R218 P6 EJTAG_CE[1:0] = 01 H17
EPHY_VREF U11 M18
240 1K R219 P5 A1.2V VDDC_18 DVSS_20 DVSS_81
L204 H18 V11 N18
EPHY_RDAC BLM18PG121SN1D VDDC_19
INCM INCM P3
P2
EPHY_RDN
EPHY_RDP
PLL_MAIN_AVDD1P2
PLL_MAIN_AGND
AB26
AC25 C237 C240
H19
H21
VDDC_20
D12
G12
DVSS_21
DVSS_22
DVSS_82
DVSS_83
P18
R18
N3 AB27 0.1uF 4.7uF VDDC_21 DVSS_23 DVSS_84
A1.2V A2.5V J21 L12 T18
EPHY_TDN PLL_MAIN_MIPS_EREF_TESTOUT VDDC_22
N2 M6 L207 A1.2V K21 DVSS_24 DVSS_85
EPHY_TDP PLL_RAP_AVD_TESTOUT M12 U18
P1 N6 BLM18PG121SN1D VDDC_23 DVSS_25 DVSS_86
L21 N12 V18
EPHY_AVDD1P2 PLL_RAP_AVD_AVDD1P2 VDDC_24
Route INCM between P4 N7 C238 C241 M21 P12
DVSS_26 DVSS_87
D20
EPHY_AVDD2P5 PLL_RAP_AVD_AGND VDDC_25
associated Left and Right Example) N4 0.1uF 4.7uF N21 R12
DVSS_27 DVSS_88
G20
EPHY_PLL_VDD1P2 VDDC_26
signals of same channel. N1
EPHY_AGND_1
P21 T12
DVSS_28 DVSS_89
H20
N5 AA24 VDDC_27 DVSS_29 DVSS_90
R21
<<---- Left signal ----<< P7
EPHY_AGND_2 BYP_CPU_CLK
Y24 VDDC_28
U12
DVSS_30 DVSS_91
A21
Route all 3 traces T21 V12 E21
<<---- INCM -----------<< EPHY_AGND_3 BYP_DS_CLK
AE24 VDDC_29 DVSS_31 DVSS_92
1K R222 U21
as matched lines. <<---- Right signal ---<< BYP_SYS216_CLK VDDC_30
L13
DVSS_32 DVSS_93
F21
AD25 1K R223 V21
Shield all lines!!! AE6
BYP_SYS175_CLK VDDC_31
M13
DVSS_33 DVSS_94
G21
R202 51 C204 15nF W21 N13 E22
14:A5 AV1_L_IN AUDMX_LEFT1 VDDC_32
R203 51 C205 15nF AD7 A3.3V Y21 DVSS_34 DVSS_95
14:A5 AV1_R_IN AUDMX_RIGHT1 P13 F22
AF6 VDDC_33 DVSS_35 DVSS_96
AV1_INCM AUDMX_INCM1 R13 G22
14:A5 C2007 AH4 DVSS_36 DVSS_97
R204 51 C206 15nF T13 H22
0.15uF 14:A6 COMP1_L_IN AUDMX_LEFT2
AG5 DVSS_37 DVSS_98
6 14:A6 COMP1_R_IN
R206 51 C222 15nF
AG4
AUDMX_RIGHT2
D3.3V
AH27
AGC_VDDO
U13
DVSS_38 DVSS_99
J22
50V
COMP1_INCM AUDMX_INCM2 V13 K22

14:A6 C2008 AG6 DVSS_39 DVSS_100
R207 51 C210 15nF G14 L22
0.15uF 14:A5 COMP2_L_IN AUDMX_LEFT3
R212 51 C211 15nF AF7 C2003 AA12 DVSS_40 DVSS_101
14:A5 COMP2_R_IN AUDMX_RIGHT3 0.1uF L14 M22
AE7 VDDO_1 DVSS_41 DVSS_102
AA13 M14 N22
14:A5 COMP2_INCM AUDMX_INCM3 VDDO_2
C2009 R213 51 C217 15nF AH5 AA18 DVSS_42 DVSS_103
14:A4 SIDE_L_IN AUDMX_LEFT4 N14 P22
0.15uF AG7 VDDO_3 DVSS_43 DVSS_104
R214 51 C218 15nF AA19 P14 R22
14:A4 SIDE_R_IN AUDMX_RIGHT4 VDDO_4
AH6 E28 DVSS_44 DVSS_105
14:A4 SIDE_INCM AUDMX_INCM4 R14 T22
AD8 VDDO_5 DVSS_45 DVSS_106
C2010 R216 51 C220 15nF L28 T14 U22
14:A3 PC_L_IN AUDMX_LEFT5 VDDO_6
0.15uF R217 51 C221 15nF AF8 U28 DVSS_46 DVSS_107
14:A3 PC_R_IN AUDMX_RIGHT5 U14 V22
AE8 VDDO_7 DVSS_47 DVSS_108
AB28 V14 W22
14:A3 PC_INCM AUDMX_INCM5 VDDO_8
C2015 AH7 DVSS_48 DVSS_109
AUDMX_LEFT6 D1.8V L15 Y22
0.15uF AH8 DVSS_49 DVSS_110
AUDMX_RIGHT6 M15 AA22
AG8 A9 DVSS_50 DVSS_111
AUDMX_INCM6 N15 W23
0.47uF C2011
0.47uF C2012
0.47uF C2014
DDRV_1
0.47uF C2013
0.47uF C2016
AF5 G9 DVSS_51 DVSS_112

AUDMX_AVSS_1 P15 AB23
AB9 DDRV_2 DVSS_52 DVSS_113
G11 R15 F28
AUDMX_AVSS_2 DDRV_3
AA10 G13 DVSS_53 DVSS_114
A2.5V AUDMX_AVSS_3 T15 M28
A14 U15 T28
47nF
47nF
47nF
47nF
47nF
47nF
47nF
47nF
47nF
47nF
AUDMX_AVSS_4 DDRV_5
AA11 G15 DVSS_55 DVSS_116
AUDMX_AVSS_5 V15 AC28
G17 A16
C273 AUDMX_AVSS_6 DDRV_7
AC8 DVSS_57
7
C224
C225
C226
C227
C229
C230
C232
C260
C268
C269
A19 G16
AUDMX_LDO_CAP DDRV_8
0.1uF AE5 G19 DVSS_58
Place this TP,Resistors <<-- -->> Place capacitors very close to BCM3556 AUDMX_AVDD2P5 DDRV_9
L16
DVSS_59
near Audio connector. M16
DVSS_60
C271 N16
10uF DVSS_61

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM3556_AUDIO_XTAL 10 17
29
28
27
IC100
BCM3556
26 AG28
DS_AGCI_CTL I2S_CLK_IN
AE18
AH28 AF18 22 R149
DS_AGCT_CTL I2S_CLK_OUT BCM_I2S_SCLK_OUT 3:B4
AA21 AD17
EDSAFE_AVSS_1 I2S_DATA_IN
A2.5V AB22 AH19 22 R148
EDSAFE_AVSS_2 I2S_DATA_OUT BCM_I2S_DATA_OUT
AF26 AD18 3:B4
25 BLM18PG121SN1D
A1.2V AF27
EDSAFE_AVSS_3
EDSAFE_AVSS_4
I2S_LR_IN
I2S_LR_OUT
AG18 22 R150
BCM_I2S_LRCLK_OUT 3:B4 A2.5V
AF28 AG26
L102 EDSAFE_AVSS_5 AUD_LEFT0_N
AG27 AH26
EDSAFE_AVDD2P5 AUD_LEFT0_P
AE26 AF23
EDSAFE_DVDD1P2 AUD_AVDD2P5_0
AE28 AA20 C147 C155 C162
24 A1.2V
C113
0.1uF C144
AE27
EDSAFE_IF_N
EDSAFE_IF_P
AUD_AVSS_0_1
AUD_AVSS_0_2
AB21 0.01uF 0.1uF 10uF
0.1uF AD24 AC22 +5.0V

L103 PLL_DS_AGND AUD_AVSS_0_3
AB19 AC23
PLL_DS_AVDD1P2 AUD_AVSS_0_4
BLM18PG121SN1D C119 AB25 AD23
R125
PLL_DS_TESTOUT AUD_AVSS_0_5
OPT
470
0.1uF AH25
23 A1.2V A2.5V AUD_RIGHT0_N
AUD_RIGHT0_P
AG25
AB18 AH23 X18
BLM18PG121SN1D SD_V5_AVDD1P2 AUD_LEFT1_N HDMI_HTPLG_IN_5MA
C111 C112 AC17 AG23
SD_V5_AVDD2P5 AUD_LEFT1_P E
0.1uF 0.1uF L104 C120 C123 AB17 AG24
SD_V5_AVSS AUD_RIGHT1_N
1000pF 0.01uF AD14 AH24
22 BLM18PG121SN1D AD16
SD_V1_AVDD1P2
SD_V1_AVDD2P5
AUD_RIGHT1_P
AUD_AVDD2P5_1
AE22
ISA1530AC1
Q100
OPT
B
HDMI_HTPLG_IN
9:H4
L105 AB15 AB20 C148 C156 C163 C

SD_V1_AVSS_1 AUD_AVSS_1_1 0.01uF 0.1uF 10uF
AC15 AC21
SD_V1_AVSS_2 AUD_AVSS_1_2
C118 AD13 AE23
SD_V2_AVDD1P2 AUD_AVSS_1_3
0.1uF AE13 AF21
21 AC13
SD_V2_AVDD2P5
SD_V2_AVSS_1
AUD_LEFT2_N
AUD_LEFT2_P
AE21
AB14 AF22
SD_V2_AVSS_2 AUD_RIGHT2_N
AC14 AG22
SD_V2_AVSS_3 AUD_RIGHT2_P
AC12 AD21
SD_V3_AVDD1P2 AUD_AVDD2P5_2
INCM
75 1%
AD12 AC20 C149 C157 C164
20
75 1%
75 1%
R147
R119
R140
INCM AB13
AA14
SD_V3_AVDD2P5
SD_V3_AVSS_1
AUD_AVSS_2_1
AUD_AVSS_2_2
AD22
AH2
0.01uF 0.1uF 10uF
BCM_SPDIF_OUT
SD_V3_AVSS_2 AUD_SPDIF 1:H1
AC11 AC6
SD_V4_AVDD1P2 SPDIF_AVDD2P5
AD11 AE4
SD_V4_AVDD2P5 SPDIF_AVSS C150 +5.0V
AB12 AF3
19 1:G5 RGB_R
C124 0.1uF AD10
SD_V4_AVSS
SD_R
SPDIF_IN_N
SPDIF_IN_P
AH1
0.1uF
R108
C105 0.1uF AC10
1:F3 R_VID_INCM SD_INCM_R
C125 0.1uF AE9
1:G5 RGB_G SD_G
C106 0.1uF AF9 AG1 R103 1K
0
1:F2 G_VID_INCM SD_INCM_G HDMI_RX_0_CEC_DAT
C126 0.1uF AH9 AA6
18 1:F2 B_VID_INCM
C107 0.1uF
1:G6 RGB_B
COMP1_Y
AG9
SD_B
SD_INCM_B
HDMI_RX_0_HTPLG_IN
HDMI_RX_0_HTPLG_OUT
AA5 10K R102
HDMI_HTPLG_IN_5MA
A2.5V
1:D7 C127 0.1uF AG15 AB3 R101 0
1:D6 COMP1_Pr SD_Y1 HDMI_RX_0_DDC_SCL HDMI_SCL
1:D6 COMP1_Pb C128 0.1uF AE15 Y6 R107 0
R199
R190
R104
SD_PR1 HDMI_RX_0_DDC_SDA HDMI_SDA
5% 91
R114
5% 91
R129
5% 91
R141
C129 AF15 AC4 499 R152
34
34
0.1uF
34
SD_PB1 HDMI_RX_0_RESREF
AH15 AC1 1%
17 1:F2 COMP1_VID_INCM
0.1uF C117 C130 0.1uF AG16
SD_INCM_COMP1
SD_Y2
HDMI_RX_0_CLK_N
HDMI_RX_0_CLK_P
AC2
HDMI0_RXC-_BCM
HDMI0_RXC+_BCM
2:AA18
2:AA18
C131 0.1uF AF16 AD1
SD_PR2 HDMI_RX_0_DATA0_N HDMI0_RX0-_BCM 2:AA18
1:E7 COMP2_Y C132 0.1uF AH17 AD2 A3.3V
1:E6 COMP2_Pr SD_PB2 HDMI_RX_0_DATA0_P HDMI0_RX0+_BCM 2:AB18
1:E6 COMP2_Pb AH16 AE1
R181
SD_INCM_COMP2 HDMI_RX_0_DATA1_N HDMI0_RX1-_BCM 2:AB18
5% 91
R115
5% 91
R130
34
5% 91
R142
AG14 AE2
16 AE14
SD_Y3
SD_PR3
HDMI_RX_0_DATA1_P
HDMI_RX_0_DATA2_N
AF1
HDMI0_RX1+_BCM
HDMI0_RX2-_BCM
2:AB18
2:AC18 BLM18PG121SN1D
AF14 AF2
0.1uF C122 SD_PB3 HDMI_RX_0_DATA2_P HDMI0_RX2+_BCM 2:AC18 L109
1:F2 COMP2_VID_INCM AH14 AD3
ADLC 5S 03 015 SD_INCM_COMP3 HDMI_RX_0_VDD3P3 A1.2V
D1101 5.5V AH10 AE3 A2.5V
SD_L1 HDMI_RX_0_VDD1P2
AG10 AC3
15 R110 91 SD_C1 HDMI_RX_0_VDD2P5
R122
34
OPT AE10 AD4 C145 C153 C160

SD_INCM_LC1 HDMI_RX_0_AVSS_1 0.1uF 0.1uF
D1102 AE11 AB5 0.1uF
ADLC 5S 03 015 SD_L2 HDMI_RX_0_AVSS_2
5.5V AF11 AB6
SD_C2 HDMI_RX_0_AVSS_3 BLM18PG121SN1D
R111 91 AH11 AG2 L107
SD_INCM_LC2 HDMI_RX_0_AVSS_4
AH13 AB4
14 R118
OPT
75
AE12
SD_L3
SD_C3
HDMI_RX_0_AVSS_5
HDMI_RX_0_AVSS_6
AA7
OPT AF12 Y8
SD_INCM_LC3 HDMI_RX_0_PLL_AVSS
C102 0.1uF AD9 AC5 C158
14:A6 TU_CVBS_IN SD_CVBS1 HDMI_RX_0_PLL_DVDD1P2
C108 0.1uF C103 0.1uF AG11 W8 0.1uF
TU_CVBS_INCM 14:A5 AV1_CVBS_IN SD_CVBS2 HDMI_RX_0_PLL_DVSS
14:A6 C104 0.1uF AG12
13 14:A5 SIDE_CVBS_IN
AF13
SD_CVBS3
SD_CVBS4
A2.5V
+5.0V
AC9 AA3
SD_INCM_CVBS1 HDMI_RX_1_CEC_DAT R134
C109 0.1uF A2.5V AF10 V4 10K
14:A5 AV1_CVBS_INCM SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN R146
R112
AH12 U6 10K
10K
SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT
AG13 V5 R155
12 14:A6 TU_SIF
R113
0 C141 AF17
SD_INCM_CVBS4
SD_SIF1
HDMI_RX_1_DDC_SCL
HDMI_RX_1_DDC_SDA
V3
10K
10K R156
0.1uF AG17 W4 499 R153
240
R128
R127
C110 0.1uF SD_INCM_SIF1 HDMI_RX_1_RESREF

12K
14:A5 SIDE_CVBS_INCM AD15 W2 OPT 1%

A1.2V L106 SD_FB HDMI_RX_1_CLK_N
AE16 W3
R106
R121
BLM18PG121SN1D
R195
SD_FS HDMI_RX_1_CLK_P
34
34
34
AE17 Y1
11 C121
0.1uF
AB16
SD_FS2 HDMI_RX_1_DATA0_N
HDMI_RX_1_DATA0_P
PLL_VAFE_AVDD1P2
Y2
A3.3V
AA15 AA2
PLL_VAFE_AVSS HDMI_RX_1_DATA1_N
AC16 AA1
HDMI_RX_1_DATA1_P
AG3 PLL_VAFE_TESTOUT AB2 A1.2V A2.5V
RGB_HSYNC HDMI_RX_1_DATA2_N
AF4 AB1
10 A2.5V
1:G6 RGB_HS
RGB_VSYNC HDMI_RX_1_DATA2_P
HDMI_RX_1_VDD3P3
Y3
Y4
1:G7 RGB_VS HDMI_RX_1_VDD1P2
R133
W5
10K
HDMI_RX_1_VDD2P5
W1
HDMI_RX_1_AVSS_1
U5
9 14:A6 TU_SIF_INCM
C133 0.1uF
HDMI_RX_1_AVSS_2
W6
R139
120
HDMI_RX_1_AVSS_3
12K
U7
HDMI_RX_1_AVSS_4
V7
HDMI_RX_1_AVSS_5
W7
HDMI_RX_1_AVSS_6
U8
8
R182
HDMI_RX_1_AVSS_7
V8
HDMI_RX_1_AVSS_8
Y5
HDMI_RX_1_AVSS_9
V6
HDMI_RX_1_PLL_AVSS
AA4
HDMI_RX_1_PLL_DVDD1P2
Y7
7 HDMI_RX_1_PLL_DVSS
Place this TP near JACK <<-- -->> Place these components near BCM3556

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM VID_In/Front INT
11 17
A B C D E F G H I J
4:C5
ERROR_OUT
3.3V_VDDP_ST , MICOM
IC404
LED_WARM_STBY
+5.0V_ST +3.3V_ST
LED_POWER_ON
D3.3V
AZ1117H-3.3
EYEQ_SCL_3.3V
EYEQ_SDA_3.3V
4.7K
INPUT 3 1 ADJ/GND
R442
R441
100
2
C415 C404
10uF OUTPUT R443
0.1uF
33K
GND
C405 C417
+3.3V_ST
22uF 0.1uF
R462
R461
100
100
HDMI_CEC
2:AD27
R464
2K +3.3V_ST
R439
R440
100
100
R463
2K
+3.3V_ST
100
R436 R415
100
R427
33K R417
10K
P1.4/DA3
P1.3/DA2
P1.2/DA1
P1.1/DA0
P1.0/ET2
P4.2/AD2
IC405
R423
47K
KIA7029AF GND
C
Q400 C422 C418
P5.0
P5.1
P5.2
P5.3
I 1 3 O B 0.1uF
0.1uF
VDD
2SC3052
5 C423 2
4.7K
0.1uF E
G
C424 GND
R433
0.1uF
PDP :
44
43
42
41
40
39
38
37
36
35
34
LCD : GND R453
0.1uF 68K
HSYNC/P1.5 P5.4
1K
GND C431
1 33
R416
LVDS_PANEL_CTRL 4:G1
GND
R413 0 VSYNC/P1.6 2 32 P5.5 R459 OPT 22
AI_ON/OFF FLASH_WP_1 9:C1
POD R414 0
P1.7/SOGI 3 31 P5.6 R455 1K
OPT INV_ON/OFF 4:C6
RST 4 30 P5.7/CLKO2 R454 1K
4:D7;14:X19
+5.0V_ST 1:J7 HSCL1/P3.0/RXD IC407 P7.0/HBLANK
RL_ON
DDC_SCL
R429 22
5 29
33K
P4.3/AD3 6 28 P4.1/AD1 R456
R418
4.7K
1:J7
R430 22 HSDA1/P3.1/TXD 7 MTV416GMF 27 P7.1/VBLANK R4005 1K
9:A7;B3
DDC_SDA POWER_DET
P3.2/INT0 P7.2/HCLAMP
4 1:C1;14:U23 IR
R431 4.7K 8 26 MICOM_RESET 3:A6
14:R8 UCOM_RX
R424
220
P3.3/INT1 9 25 P6.7
R432 +5.0V
14:X6 UCOM_TX 220 ISDA/P3.4/T0 10 24 P6.6
4.7K
R460
ISCL/P7.5 11 23 P6.5
/W_PROTECT
12
13
14
15
16
17
18
19
20
21
22
Q401 1:I7
R428
+3.3V_ST C425 RT1N141C-T112-1 C
R434
15K B
4.7K
HSDA2/P7.4
HSCL2/P7.3
X2
X1
VSS
P4.0/AD0
P6.0/CLKO1
P6.1
P6.2
P6.3
P6.4
0.1uF +3.3V_ST
R425 4.7K
E
R426 4.7K
R448 R452
4.7K 4.7K
GND
R449
4.7K
+3.3V_ST
OPT
4.7K
R401
R403
R451
3 14:AA25
100
R400
100
R404
22 100
KEY2
R4006
4.7K GND R402
+3.3V_ST 100 14:AA25
KEY1
R407
4.7K
R450
X400
1K
IC406 R437 24MHz
POWER DETECT M24C16-WMN6T 22 C429 C430
C427 C428 0.1uF 0.1uF
+20.0V 22pF 22pF
MUTE1
OPC_EN
+5.0V_ST 8 1 R438
+3.3V_ST
3:D4
7:E2
4.7K
8 1 22 GND
R435
C426
+5.0V
R475 0.1uF 7 2
R477 7 2
R472
+12.0V 30K OPT
10K GND
1/10W
R471 6 3 GND
R468 1%
POWER_DET 6 3
SDA2_3.3V
SCL2_3.3V
OPT
C OPT R420
22
R480 R469 5 4
B Q461 5 4
15K 2SC3052
C OPT R474 R421
OPT 22
R467 E
2 B Q460
2SC3052
R470
OPT
OPT
GND GND
B5;2:AH5;14:C6;3:B4
B5;2:AH5;14:C5;3:B4
OPT OPT IC460
R481 E NCP803SN293 OPT
7.5K
R4009
RESET VCC 0
2 3
1
R473 R476
GND
OPT 5.1K
1/10W
5%
R4010
0

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM, POWER_DET 12 17
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM3556_POWER 13 17
BCM3556_POWER_GND
29
P1401
28 12507WS-12L CONTROL / IR / LED

WAFER-STRAIGHT
JP1409
USB JACK
SCL R1406 0 USB_POWER_OUT_2
1 EYEQ_SCL_3.3V Make this trace minimum 12 mil
JK1403
27 2
SDA
JP1410
R1407 0
EYEQ_SDA_3.3V
KJA-UB-4-0004
L1407
MLB-201209-0120P-N2
D1401
5.6V D1402 C1404 C1407
1
GND ADMC5M03200L 5.6V 1000pF 1000pF
USB DOWN STREAM

3 ADMC5M03200L OPT OPT
26 JP1407 BLM18PG121SN1D
2
USB_DM2 10:C4
KEY1 L1404 C1415
4 KEY1 330uF
JP1408 BLM18PG121SN1D 35V
3
USB_DP2 10:C4
KEY2 L1405
5 KEY2
25 JP1402 +5.0V_ST
4
5V_ST
6
5
L1406 CB3216PA501E
ZD1401
ZD1403
C1409
5.6B
5.6B
0.1uF 0.1uF 0.1uF
GND C1405 C1408 1000pF
7 C1411 +5.0V
50V
24 WARM_ST
JP1403
ADMC5M03200L
8 LED_WARM_STBY C1419
MLB-201209-0120P-N2
D1405
JP1404 22uF
5.6V
C1412 16V
IR L1401 0.1uF
MLB-201209-0120P-N2
9 IR
ZD1402
23 C1402 BLM18PG121SN1D
5.6B
D3.3V +5.0V_ST
GND 100pF
10 BCM Tolerance
+3.3V_ST
JP1405
USB_ST5V
R1417
USB_5V
L1402
L1409
L1410
3.3V USB_POWER_OUT_2 R1416
11 IC1402 2.7K
2.7K
22 12
PWR_ON
JP1406 C1403
1000pF
50V
C1406
0.1uF
CB3216PA501E
Make this trace minimum 12 mil
MIC2009YM6-TR
VOUT
6 1
VIN
ILIMIT GND
C1413 5 2 C1414
13 0.1uF 10uF
FAULT/ ENABLE
R1413 4 3 C1417
USB_PWRON2
21 GND +3.3V_ST
130
10:C5
0.1uF
R1401
JP1401
10K
R1414 47
USB_PWRFLT2 10:C5
OPT OPT
20 R1402
0
R1408
0
RL_ON
C
R1403 R1409
C1401
Q1401
2SC3052
B 4.7K 0
LED_POWER_ON
USB +5V Over Current Protection --> USB Jack
0.1uF
19 E
18
17 * Blue Tooth
MLB-201209-0120P-N2
D3.3V
RS-232C S/W +5.0V_ST
16
L1408
L1403
CB3216PA501E
11
LH90_ONLY
15 10
LH90_ONLY
C1410
100uF
9 LH90_ONLY C1418
16V
R1410 IC1401 C1416
10uF
27 MC14053BDR2G
USB_DM1 10:D4 16V 0.1uF 10V
0ISTL00024A
14 8
D1403
CDS3C05GTA
5.6V R1412
7 OPT LH90_ONLY 0 Y1 1 16 VDD
R1411 BCM_RX
27 9:H6
D1404 USB_DP1 10:D4 Y0 2 15 Y
13 6
CDS3C05GTA
5.6V
OPT
UCOM_RX
12:D4
RS232C_RxD
5 Z1 3 14 X
1:B2
RS232C_TxD
R1405
0 R1418
BLUETOOTH_RESET Z
13 X1 0 9:H6
12 4 LH90_ONLY 4 BCM_TX
Z0 5 +5.0V
3 12 X0 12:D4
UCOM_TX
R1404
0 R1421
VREG_CTRL INH 6 11 A 2.7K
11 2
LH90_ONLY
1 VEE 7 10 B
R1420
4.7K
VSS 8 C
10 12507WR-10L
P1402
9
LH90_ONLY

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB/USB2SATA/Etc 14 17
A B C D E F G H I J
DIMMING_1.8V DIMMING_RX_1.8V DIMMING_PLL_1.8V

D3.3V DIMMING_3.3V DIMMING_TX_3.3V
L3501 L3502 L3503 L3505

BLM18PG121SN1D BLM18PG121SN1D BLM18PG121SN1D BLM18PG121SN1D
C3501 C3508 C3509 C3511 C3513 C3514 C3521 C3525 C3528

22uF C3510 22uF
0.1uF 0.1uF 0.1uF 22uF 0.1uF 0.1uF 22uF
16V 16V 16V 22uF 16V 16V 16V 16V 16V 16V
16V
C3520
20pF
50V
DIMMING_3.3V
R3563
URSA_A+[0-4],URSA_A-[0-4],URSA_ACK+,URSA_ACK- DIMMING_RESET
R3546
R3528
0
URSA_B+[0-4],URSA_B-[0-4],URSA_BCK+,URSA_BCK-
X3500
25MHz
4.7K
R3529
C3519
1M
20pF
22
50V
IC3505
AZ7027RTRE1
R4240
0 OUT VCC
3 1
AR3509URSA_A-[4]
URSA_A+[4]
URSA_A-[3]
URSA_A+[3]
AR3510 URSA_ACK-
URSA_ACK+
URSA_A-[2]
URSA_A+[2]
AR3511URSA_A-[1]
URSA_A+[1]
URSA_A-[0]
URSA_A+[0]
URSA_B-[4]
URSA_B+[4]
URSA_B-[3]
URSA_B+[3]
AR3507 URSA_BCK-
URSA_BCK+
URSA_B-[2]
URSA_B+[2]
URSA_B-[1]
URSA_B+[1]
URSA_B-[0]
URSA_B+[0]
2
C3529 GND
0.1uF
DIMMING_SDA
DIMMING_SCL
DIMMING_WP
16V
SCL3_3.3V
SDA3_3.3V
AR3506
AR3508
LOCAL DIMMING DDC
0
6 DIMMING_3.3V
OPT
R4212
R4213
R4214
R4215
R4216
R4217
R4218
R4219
R4220
R4221
R4222
R4223
100
100
100
100
100
100
100
100
100
100
100
100
R3537
4.7K
DIMMING_3.3V L3504 IC3504 DIMMING_3.3V
BLM18PG121SN1D
R3535 24LC32AT-I/SNG
0
R3552
R3554
C3540 R3547
VCC A0
10K
10K
R3536 0.1uF 0
8 1 R3561
DIMMING_RX_1.8V 100 16V
LED_M_VS 4.7K
R3566
WP A1 0 OPT
R3530
R3533
0.1uF
0.1uF
0.1uF
0.1uF
DIMMING_3.3V DIMMING_WP 7 2 EEPROM_A1
100
16V
100
OPT
16V
16V
16V
LED_M_MOSI R3562
R3549
R3534 DIMMING_SCL 22 SCL A2 4.7K
6 3
DIMMING_1.8V 100
C3512
LED_M_SCLK R3565
C3517
C3523
C3524
R3531
R3532
DIMMING_SDA SDA VSS 0
100
5 4 OPT
2K
R3550
22
URSA_D+[0-4],URSA_D-[0-4],URSA_DCK+,URSA_DCK-
5
URSA_C+[0-4],URSA_C-[0-4],URSA_CCK+,URSA_CCK-
DIMMING_PLL_1.8V
RXANAGND_6
RXANA1.8_4
RXANAGND_5
RXANA1.8_3
RXANAGND_4
EEPROM_WP
EEPROM_NA
DIG3.3_4
DIG1.8_4
R1CLK2P
R1CLK2M
R1CLK1P
R1CLK1M
PORES_N
M_MOSI
M_SCLK
R1E2P
R1E2M
R1D2P
R1D2M
R1C2P
R1C2M
R1B2P
R1B2M
R1A2P
R1A2M
R1E1P
R1E1M
R1D1P
R1D1M
R1C1P
R1C1M
R1B1P
R1B1M
R1A1P
R1A1M
GND_4
XTALO
XTALI
S_SCL
S_SDA
M_SDA
M_SCL
M_VS
LH90_Slave_Inverter
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
C3506 0.1uF 16V DIG3.3_1 PLL1.8 C3539 0.1uF P3503
1 132
DIG1.8_1 PLLGND 16V 12507WS-10L
2 131
C3507 0.1uF 16V GND_1 3 130 M_MOSIP R3541 OPT
RXANAGND_1 M_MOSIN 100 OPT
4 129 R3542 LH90_Master_Inverter
URSA_C+[0]AR3505 R2A1M M_SCLKP
NC
0 R4224 5 128 R3539 OPT 100 1
URSA_C-[0] 100 100 P3501
R2A1P 6 127 M_SCLKN R3540
URSA_C+[1] AR3512 LVDS_CH1_A_N 12507WS-08L
R4225 R2B1M 7 126 T1A1N OPT 100 0 NC
URSA_C-[1] 100 LVDS_CH1_A_P 2
R2B1P 8 125 T1A1P
LVDS_CH1_B_N
URSA_C+[2]AR3503 R2C1M 9 124 T1B1N GND GND
0 R4226
4 URSA_C-[2]
URSA_CCK+
100
C3505 16V
R2C1P
RXANA1.8_1
10
11
123
122
T1B1P
TXANA3.3_13 C3538 0.1uF
LVDS_CH1_B_P
R3564
1
R3578
3
R4227 0.1uF 16V 0 GND

URSA_CCK- 100 R2CLK1M 12 121 TXANAGND_9 2 0 GND
AR3513 LVDS_CH1_C_N 4
R2CLK1P 13 120 T1C1N 0
URSA_C+[3]AR3504 R2D1M T1C1P LVDS_CH1_C_P R3572 R3567
0 R4228
URSA_C-[3] 100 R2D1P
14
15
LH90_ONLY 119
118 T1CLK1N LVDS_CH1_CLK_N LED_M_SCLK
0 SCLK
3
LED_S_SCLK
0 SCLK
5
URSA_C+[4] R2E1M T1CLK1P LVDS_CH1_CLK_P
R4229 16 117 R3577
URSA_C-[4] 100 R2E1P 17 IC3502 116 TXANA3.3_12 C3537 0.1uF
16V AR3514 LVDS_CH1_D_N
0 GND
4
R3579
0 GND
6
RXANAGND_2 18 115 T1D1N 0
URSA_D+[0] AR3502 LVDS_CH1_D_P R3574
URSA_D-[0]
0 R4230
100
R2A2M
R2A2P
19 LG5110 114 T1D1P
T1E1N LVDS_CH1_E_N LED_M_MOSI
0 MOSI
5
R3569
0 MOSI
7
20 113 LED_S_MOSI
URSA_D+[1] R2B2M T1E1P LVDS_CH1_E_P
R4231 21 112 R3573
URSA_D-[1] 100 RESERVED R3568
R2B2P TXANA3.3_11 C3536 0.1uF 0 0 RESERVED
22 111 6 8
AR3501 R2C2M TXANAGND_8 16V
URSA_D+[2] 23 110 AR3515
0 R4232 LVDS_CH2_A_N R3576
URSA_D-[2] 100 R2C2P 24 109 T1A2N 0 RESERVED R3571
0 0 RESERVED
C3504 16V RXANA1.8_2 T1A2P LVDS_CH2_A_P 7 9
URSA_DCK+ 25 108
R4233 0.1uF LVDS_CH2_B_N
URSA_DCK- 100 R2CLK2M 26 107 T1B2N R3575
LVDS_CH2_B_P VSYNC R3570
R2CLK2P T1B2P 0 0 VSYNC
AR3500 27 106 LED_M_VS 8 10
URSA_D+[3] R2D2M TXANA3.3_10 C3535 0.1uF LED_S_VS
0 R4234 28 105
URSA_D-[3] 100 AR3516 LVDS_CH2_C_N
R2D2P 29 104 T1C2N 16V 0 9 11
3 URSA_D+[4]
URSA_D-[4]
R4235
100
R2E2M
R2E2P
30
31
103
102
T1C2P
T1CLK2N
LVDS_CH2_C_P
LVDS_CH2_CLK_N
GND
RXANAGND_3 T1CLK2P LVDS_CH2_CLK_P
32 101
C3502 DIG3.3_2 33 100 TXANA3.3_9 C3534 0.1uF
C3503 0.1uF 16V DIG1.8_2 TXANAGND_7 16V
34 99 AR3517
0.1uF GND_2 T1D2N LVDS_CH2_D_N
35 98 0
16V LVDS_CH2_D_P
R3507 0 TDO 36 97 T1D2P
TDO LVDS_CH2_E_N
R3508 4.7K TRST_N 37 96 T1E2N
OPT R4236
TDI 0 EEPROM_A1_TDI T1E2P LVDS_CH2_E_P
EEPROM_A1 38 95
R4237 R3510 0 TMS 39 94 REXT R3538 47K
TMS
0 R3502 0 TCK TXANA3.3_8 C3532 0.1uF
TCK 40 93
R3503 0 TMODE[0] TXANAGND_6 16V
@xrefL
41 92 DIMMING_3.3V
R3504 0 TMODE[1] 42 91 TXANA3.3_7 C3533 0.1uF
R3505 0 TMODE[2] TXANAGND_5 16V
43 90
R3506 0 SCLKO 44 89 DIG3.3_3
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
DIMMING_1.8V
SCLKI
S_SCLK
S_MOSI
S_VS
S_SCLKN
S_SCLKP
S_MOSIN
S_MOSIP
T2E2P
T2E2N
T2D2P
T2D2N
TXANAGND_1
TXANA3.3_1
T2CLK2P
T2CLK2N
T2C2P
T2C2N
TXANA3.3_2
T2B2P
T2B2N
T2A2P
T2A2N
TXANAGND_2
TXANA3.3_3
T2E1P
T2E1N
T2D1P
T2D1N
TXANA3.3_4
T2CLK1P
T2CLK1N
T2C1P
T2C1N
TXANAGND_3
TXANA3.3_5
T2B1P
T2B1N
T2A1P
T2A1N
TXANA3.3_6
TXANAGND_4
GND_3
DIG1.8_3
JTAG
DIMMING_3.3V DIMMING_TX_3.3V
2 DIMMING_3.3V
R3521 100 OPT
R3522 100 OPT
R3523 100 OPT
R3524 100 OPT
IC3501
R3513
R3514
R3515
OPT MK2302S-01LFTR
R3517
R3518 100
R3519 100
R3520 100
DIMMING_3.3V
OPT
10K
10K
10K
P3504
12507WS-10L FBIN CLK2
0
1 8
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
1
ICLK
2 7
VDD R3548
TCK
16V
16V
16V
16V
16V
0
16V
GND CLK1
2 3 6
S0 S1
3
TDO 4 5 R3516
C3515
C3516
C3518
C3522
C3526
C3527
R3512 0
4 R3543
0 R3500 4.7K OPT
5
0 R3511
TMS R3501 0
OPT 4.7K
6 OPT
1K
R3509
8
R3544
AR3518
AR3519
AR3520
AR3521
AR3522
AR3523
LED_S_SCLK
LED_S_MOSI
0
9
TDI
LED_S_VS
10
0
LVDS_CH3_CLK_P0
0
LVDS_CH4_CLK_P
LVDS_CH4_CLK_N
LVDS_CH3_CLK_N
11
LVDS_CH4_E_P
LVDS_CH4_E_N
LVDS_CH4_D_P
LVDS_CH4_D_N
LVDS_CH4_C_P
LVDS_CH4_C_N
LVDS_CH4_B_P
LVDS_CH4_B_N
LVDS_CH4_A_P
LVDS_CH4_A_N
LVDS_CH3_E_P
LVDS_CH3_E_N
LVDS_CH3_D_P
LVDS_CH3_D_N
LVDS_CH3_C_P
LVDS_CH3_C_N
LVDS_CH3_B_P
LVDS_CH3_B_N
LVDS_CH3_A_P
LVDS_CH3_A_N
1
@xrefL This page is all LH90_only option
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LOCAL DIMMING IC 15 16
29
URSA_B+[0-4],URSA_B-[0-4],URSA_BCK+,URSA_BCK-
+12.0V_LCD
28 AR3601 AR3619 AR3613
CB3216PA501E
0 0 0
1/16W 1/16W 1/16W
URSA_B-[4] LVDS_CH2_E_P LVDS_CH2_E_P
L3601
P3601
URSA_B+[4] LVDS_CH2_E_N 7:D7 LVDS_TX_1_DATA4_N LVDS_CH2_E_N TF05-51S LH50_90_ONLY
7:D7
C3602 C3601
URSA_B-[3] LVDS_CH2_D_P LVDS_TX_1_DATA4_P LVDS_CH2_D_P
1000pF 10uF
P3602
16V
7:D7 LVDS_TX_1_DATA3_N
27 URSA_B+[3]
LH50_ONLY
LVDS_CH2_D_N
7:D7 LVDS_TX_1_DATA3_P
LH35_ONLYLH35_ONLY
LVDS_CH2_D_N
VCC
1
TF05-41S
VCC
50V
AR3602 AR3620 AR3614 2 GND
0 0 0 1
1/16W 1/16W 1/16W VCC
URSA_BCK- LVDS_CH2_CLK_P LVDS_CH2_CLK_P 3 GND
C3603
0.1uF
2
26 URSA_BCK+ LVDS_CH2_CLK_N 7:D7 LVDS_TX_1_CLK_N LVDS_CH2_CLK_N
OPT VCC
16V
4 LVDS_CH4_E_P LVDS_CH4_E+
URSA_B-[2] LVDS_CH2_C_P 7:D7 LVDS_TX_1_CLK_P LVDS_CH2_C_P R3607 3
0 NC
URSA_B+[2] LVDS_CH2_C_N 7:D7 LVDS_TX_1_DATA2_N LVDS_CH2_C_N 5 LVDS_CH4_E_N LVDS_CH4_E-
4
7:D7 LVDS_TX_1_DATA2_P GND
6 LVDS_CH4_D_P LVDS_CH4_D+
LH50_ONLY LH35_ONLYLH35_ONLY 5
GND
25 AR3603
0
1/16W
AR3621
0
1/16W
AR3615
0
1/16W GND
7
8
LVDS_CH4_D_N LVDS_CH4_D-
6
URSA_B-[1] LVDS_CH2_B_P LVDS_CH2_B_P GND
7
URSA_B+[1] LVDS_CH2_B_N 7:D7 LVDS_TX_1_DATA1_N LVDS_CH2_B_N GND
9 LVDS_CH4_CLK_P LVDS_CH4_CLK+
URSA_B-[0] LVDS_CH2_A_P 7:D7 LVDS_TX_1_DATA1_P LVDS_CH2_A_P 8
GND
7:D7 LVDS_TX_1_DATA0_N 10 LVDS_CH4_CLK_N LVDS_CH4_CLK-
24 URSA_B+[0] LVDS_CH2_A_N
7:D7 LVDS_TX_1_DATA0_P
LVDS_CH2_A_N
LVDS_CH2_E_P LVDS_CH2_E+
11 GND
9
LH50_ONLY LH35_ONLYLH35_ONLY 10
LVDS_CH2_E_N LVDS_CH2_E-
URSA_A+[0-4],URSA_A-[0-4],URSA_ACK+,URSA_ACK- AR3622 AR3616 12 LVDS_CH4_C_P LVDS_CH4_C+
0 0 11
1/16W 1/16W LVDS_CH2_D_P LVDS_CH2_D+
LVDS_CH1_E_P 13 LVDS_CH4_C_N LVDS_CH4_C-
12
23 AR3604
0
1/16W
7:E7
7:E7
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_CH1_E_N
LVDS_CH1_D_P
GND
14 LVDS_CH4_B_P LVDS_CH4_B+
13
URSA_A-[4] LVDS_CH1_E_P 7:E7 LVDS_TX_0_DATA3_N LVDS_CH1_D_N 15 LVDS_CH4_B_N LVDS_CH4_B-
14
URSA_A+[4] LVDS_CH1_E_N 7:E7 LVDS_TX_0_DATA3_P LVDS_CH2_CLK_P LVDS_CH2_CLK+
16 LVDS_CH4_A_P LVDS_CH4_A+
URSA_A-[3] LVDS_CH1_D_P LH35_ONLYLH35_ONLY 15
LVDS_CH2_CLK-
22 URSA_A+[3] LVDS_CH1_D_N AR3623
0
1/16W
AR3617
0
1/16W
LVDS_CH2_CLK_N
GND
17
18
LVDS_CH4_A_N LVDS_CH4_A-
16
LH50_ONLY LVDS_CH1_CLK_P GND
17
AR3605 7:E7 LVDS_TX_0_CLK_N LVDS_CH1_CLK_N LVDS_CH2_C_P LVDS_CH2_C+
19 GND
0 7:E7 LVDS_TX_0_CLK_P 18
1/16W LVDS_CH1_C_P LVDS_CH2_C-
URSA_ACK- LVDS_CH1_CLK_P LVDS_CH2_C_N 20
7:E7 LVDS_TX_0_DATA2_N LVDS_CH3_E_P LVDS_CH3_E+
21 URSA_ACK+
URSA_A-[2]
LVDS_CH1_CLK_N
LVDS_CH1_C_P
7:E7 LVDS_TX_0_DATA2_P
LH35_ONLYLH35_ONLY
LVDS_CH1_C_N
LVDS_CH2_B_P LVDS_CH2_B+
21 LVDS_CH3_E_N LVDS_CH3_E-
19
20
LVDS_CH2_B_N LVDS_CH2_B-
URSA_A+[2] LVDS_CH1_C_N AR3624 AR3618 22 LVDS_CH3_D_P LVDS_CH3_D+
0 0 21
1/16W 1/16W LVDS_CH2_A_P LVDS_CH2_A+
LVDS_CH1_B_P 23 LVDS_CH3_D_N LVDS_CH3_D-
LH50_ONLY 22
20 AR3606
0
1/16W
7:E7
7:E7
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_CH1_B_N
LVDS_CH1_A_P
LVDS_CH2_A_N
R3601
LVDS_CH2_A-
BIT_SEL
24 GND
23
0
URSA_A-[1] LVDS_CH1_B_P 7:E7 LVDS_TX_0_DATA0_N LVDS_CH1_A_N BIT_SEL 25 LVDS_CH3_CLK_P LVDS_CH3_CLK+
24
URSA_A+[1] LVDS_CH1_B_N 7:E7 LVDS_TX_0_DATA0_P OPT GND
26 LVDS_CH3_CLK_N LVDS_CH3_CLK-
URSA_A-[0] LVDS_CH1_A_P LH35_ONLYLH35_ONLY 25
LVDS_CH1_E+
19 URSA_A+[0] LVDS_CH1_A_N LVDS_CH1_E_P
LVDS_CH1_E_N LVDS_CH1_E-
27
28
GND
26
LVDS_CH3_C_P LVDS_CH3_C+
LH50_ONLY FROM BCM LVDS_CH1_D+
27
LVDS_CH1_D_P 29 LVDS_CH3_C_N LVDS_CH3_C-
28
URSA_D+[0-4],URSA_D-[0-4],URSA_DCK+,URSA_DCK- 30 LVDS_CH3_B_P LVDS_CH3_B+
18 GND
31 LVDS_CH3_B_N LVDS_CH3_B-
29
30
AR3607 LVDS_CH1_CLK_P LVDS_CH1_CLK+
0 32 LVDS_CH3_A_P LVDS_CH3_A+
1/16W 31
LVDS_CH1_CLK_N LVDS_CH1_CLK-
URSA_D-[4] LVDS_CH4_E_P 33 LVDS_CH3_A_N LVDS_CH3_A-
32
17 URSA_D+[4]
URSA_D-[3]
LVDS_CH4_E_N
LVDS_CH4_D_P
LVDS_CH1_C+
GND
34 GND
33
URSA_D+[3] LVDS_CH4_D_N LVDS_CH1_C_P 35 NC
34
LVDS_CH1_C_N LVDS_CH1_C-
LH50_ONLY 36 NC
35
AR3608 LVDS_CH1_B+
16 URSA_DCK-
0
1/16W
LVDS_CH4_CLK_P
LVDS_CH1_B_P
LVDS_CH1_B_N LVDS_CH1_B-
37
38
NC
36
NC
URSA_DCK+ LVDS_CH4_CLK_N 37
LVDS_CH1_A_P LVDS_CH1_A+
39 NC
URSA_D-[2] LVDS_CH4_C_P 38
LVDS_CH1_A_N LVDS_CH1_A-
URSA_D+[2] LVDS_CH4_C_N 40 NC
15 LH50_ONLY OPC_OUT2
R3602
0 LH50_ONLY R3608
0
GND
41 NC
39
R3603 LH35_LH90_ONLYOPC_EN 40
AR3609 0
0 OPC_EN 42 GND
1/16W R3604 41
OPC_OUT
URSA_D-[1] LVDS_CH4_B_P 0 37/42LH35_LH50_ONLY 43
OPC_OUT
14 URSA_D+[1]
URSA_D-[0]
LVDS_CH4_B_N
LVDS_CH4_A_P BCMPWM_VBR_B
R3605
0 37/42LH35_LH50_ONLY
R3606
OPT
PWM_IN
LVDS_SEL
44
42
URSA_D+[0] LVDS_CH4_A_N 0 45 GND

LVDS_SEL
NC
46
LH50_ONLY R3609
0 LH35_ONLY NC
13 NC
47
48
NC
URSA_C+[0-4],URSA_C-[0-4],URSA_CCK+,URSA_CCK- 49
NC
@xrefL
50
12 AR3610
0
GND
51
1/16W
URSA_C-[4] LVDS_CH3_E_P
52
URSA_C+[4] LVDS_CH3_E_N
URSA_C-[3] LVDS_CH3_D_P
11 URSA_C+[3] LVDS_CH3_D_N
GND
LH50_ONLY
AR3611
0
1/16W
10 URSA_CCK-
URSA_CCK+
LVDS_CH3_CLK_P
LVDS_CH3_CLK_N
URSA_C-[2] LVDS_CH3_C_P
URSA_C+[2] LVDS_CH3_C_N
9 LH50_ONLY
AR3612
0
1/16W
URSA_C-[1] LVDS_CH3_B_P
URSA_C+[1] LVDS_CH3_B_N
URSA_C-[0] LVDS_CH3_A_P
8 URSA_C+[0] LVDS_CH3_A_N
LH50_ONLY
7 FROM MTSRT-FRC
6
@xrefL

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS 16 17

42lh35fd Chassis Lj91a PDF

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 42LH35FD 42LH35FD-SF

P/NO : MFL61862403 (0906-REV00) Printed in Korea

PRODUCT SAFETY ..................................................................................3

ADJUSTMENT INSTRUCTION ...............................................................10

EXPLODED VIEW .................................................................................. 17

SVC. SHEET ...............................................................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

always perform an AC leakage current check on the exposed

1. Application range 3. Test method

1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC

12. Color Cool 0.274 0.276 0.278 <Test Condition>

6. Component Input (Y, CB/PB, CR/PR)

** RGB PC Monitor Range Limits

8. HDMI Input (PC/DTV)

** HDMI Monitor Range Limits

10. Mechanical Specification

1) Because this is not a hot chassis, it is not necessary to use

* Notice: if you maintain one picture over 20 minutes

3.1 PCB Assembly adjustment

3.2 Set Assembly Adjustment

Order Command Set response

See ADC Adjustment RS232C Protocol_Ver1.0

O Necessary items befire Adjustment items

* If you want more information then see the below Adjustment

5.1 Manual Adjust Component 480i/1080p

O Summary : Adjustment component 480i/1080i and RGB

5.2 EDID (The Extended Display

<Pic.4 Adjustment pattern : 480i / 1080p 60Hz Pattern > O Summary

• EDID data for LJ91D Chassis (Model name = LG TV)

• Using HDMI input

wb 00 00 White Balance adjustment start.

• "wb 00 00": Start Auto-adjustment of white balance.

Attachment: White Balance adjustment coordination and color

O Using CS-1000 Equipment.

(Front-end) (System + Scalar) NANDFlash

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

¾ BCM3556 (Main Chip)

All power rails above

either 1.2V, 1.8V, 2.5V, 3.3V

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

¾ SAA7164 (MPEG Encoder)

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

3.3V, 2.5V, 1.8V, 1.2V 2.5V, 1.8V, 1.2V, RESET

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

Check All Voltage Level N Replace one of L804/L807/L808

N Replace one of IC803/L824/L827 N

Check Micom IC407

Check signal transition N

Replace IC101 Flash Memory

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

Check 12V Voltage Level N Replace one of L804/L902

Check Voltage LCD Module

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

Check TP Clock, Data, Sync N Maybe Tuner(TU1101) has

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

Check CVBS Signal N Maybe Tuner(TU1100) has

Check CVBS Signal N Replace one of C1122/R1122

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.

Check Signal Format

Check Component Cable