United States Patent (19) (11) 4,401,933

Davy et al. (45) Aug. 30, 1983

54 MOTOR CONTROL SYSTEM FOR ASINGLE 1347.191 2/1972 Fed. Rep. of Germany .
PHASE INDUCTION MOTOR
OTHER PUBLICATIONS
75) Inventors: John C. Davy, Winchester; Brian P. "Coaxial Drive for Magnetic Disk File", IBM TDB,
Fenton, Totton; John G. Ramage, vol. 23, No. 3, Aug. 1980, p. 1198.
Eastleigh, all of England
73) Assignee: International Business Machines Primary Examiner-David Smith, Jr.
Corporation, Armonk, N.Y. Attorney, Agent, or Firm-R. E. Cummins; G. E. Roush
21 Appl. No.: 315,100 57 ABSTRACT
22 Filed: Oct. 26, 1981 A single phase induction motor control system employs
power line assisted starting and runs at higher than
30 . Foreign Application Priority Data power line frequency from an electronically generated
Nov. 28, 1980 EP European Pat. Off. ........... 80304294 inverter supply. This inverter supply is employed to .
provide an out of phase mains frequency signal to the
51) Int. Cl. ................................................ H02P1/42 run winding during starting in order to create the rotat
52 U.S. C. ..................................... 318/778; 318/786 ing magnetic field needed to start the motor. After the
58 Field of Search ................ 318/778, 768, 786, 779 motor has started, the power line supply is disconnected
56) References Cited from the start winding and the inverter supply fre
U.S. PATENT DOCUMENTS
quency is increased gradually to a final value corre
sponding to the desired operating speed. In this system
3,882,364 5/1975 Wright et al. ....................... 318/786 no phase shifting capacitors are needed to provide the
4,060,754 11/1977 Kirtley, Jr. .......................... 318/768 out of phase starting voltage and the run winding is
FOREIGN PATENT DOCUMENTS
optimized for running conditions.
1464454 9/1974 Australia. 5 Claims, 9 Drawing Figures

20PHASE

"-SPEED ZERO
SEQUENCE -SPEED GOOD
CONTRO
28

START
DRIVER BRAKE
TRACPULSES
SEESMONITOR. ERROR
LATCHES
29
Tris
U.S. Patent Aug. 30, 1983 sheet 2 of 8 4,401,933

+v REG. O

DRIVE GATED
AMP 72
W REF 85 --
O

4.

80

DRIVE 2 GATED 92 73
AMP
W REF
O

-v REG.
F. G. 3
U.S. Patent Aug. 30, 1983 Sheet 3 of 8 4,401,933
200 2O
CTR - CTR
D 202 CTR
203
RM BT

CTR 2 - CTR 2

F BRM BIT 2.
CTR 4 D - CTR 4

BRM BT 4

CTR 8 D - CTR 8
1
BRM BIT 8

BRM BT 6
-LOAD 6

F. G. A.
U.S. Patent Aug. 30, 1983 sheet 4 of $ 4,401,933
328

- END LTCH
CTR8 - ROTATION
OPERATION RESET

343
RAMP LTCH SROBE
-RUN LTCH
RESET START LCH
CTR
357 CTR 2
364 CTR 4
RUNTCH STROBE
STROBE
RESE

3. : RAMP LTCH
STOP / . CTR STOP
CTR
CTR 3622 -END LTCH
STOP BUFF
END LTCH RESET
368
RESET BRAKE LCH
3711 CTR 8
STOPBUFF ST R
COCK
N STROBE OPERATION BOTH LOW
D
D 367 TEST LTCH
- END LTCH
- ROATION
325

Ba
LE
FIG.5 FIG. 5A
U.S. Patent Aug. 30, 1983 Sheet 5 of 8 4,401,933

ART 33 OPERAON
RAMP LTCH -N ROTATION
RUN, LTCH BRAKE LTCH 34

-SART
LTCH
D. 339 335
D START
WNDNG
TEST LTCH BRAKE CH
-CTR -GATE
CTR 2 -OPERATION D. POWER P
TEST LTCH
CTR
- CTR 2 OPERATION s
338
-BRAK E LTCH s 337
336 BRAKE
START LTCH
SENSE GOOD

-DRIVE C

DRIVE 2

SAS
CLOCK
CTR CLOCK
CTR CLEAR
START LTCH RESET -
LOAD 16
CTRLOAD
RAMP LTCH -
RUN LTCH C 358 TEST LTCH
FORCE
BRM
-RAMP LTCH 375 OPERATION -SPEED
RUN TCH BRAKE LTCH ZERO
DRIVE UNSAFE SET BRAKE
-START -

X
E.
F.G. 5 B
cTR stop END LTCH
GATE clockD.
38
39
E * : GOOD
C
U.S. Patent Aug. 30, 1983 Sheet 8 of 8 4,401,933

SENSE O 62
GOOD START LATCH c
CTR 4

BRM Bf 16
- FORCE BRM
- START LATCH

-DRIVE PULSES
STROBE
GATE DRIVE

-TRAC PULSES
START LATCH
CTR 4

- POR D

-RESET CHECK D 68

DRIVE UNSAFE

FIG. 8 -D-D
 4,401,933
1.
MOTOR CONTROL SYSTEM FOR A SINGLE
PHASE INDUCTION MOTOR
Technical Field of the Invention
The invention relates to motor control systems for
controlling a single phase induction motor.
BACKGROUND OF THE INVENTION
10
A single phase induction motor comprises essentially
a wound annular laminated stator, which is energized
by a single phase a.c. supply, and a shorted rotor of the
cage type in which voltages are induced by the varia
tion of primary voltage in the stator winding. The appli 15
cation of single phase a.c. to the stator run winding
creates an oscillating magnetic field which provides a
torque to drive the motor once it is rotating. However,
the oscillating field alone will not start the motor. In
order to start this type of motor an auxiliary or start
winding is provided which is spatially displaced around 20
the stator from the run winding. The supply voltage is
applied to both windings but is time phase shifted in the
start winding. This phase shift causes a rotating rather
than an oscillating field to be produced, which is suffi
cient to cause the rotor to turn. 25
Many ways of effecting this phase shift are known,
the simplest being to make the run and start windings of
different inductance. This is the so-called "split-phase"
motor. Another equally common technique is to em
ploy a phase shifting capacitor which allows a more 30
efficient 90° phase shift to be introduced. The start
winding is switched out of circuit when the motor is
rotating so that the motor runs solely on the single
phase a.c. supplied to the run winding. This aspect of
single phase motor operation is very well known and is 35
discussed in various books on the subject. One such
book, for example is, "Electric Motors Handbook",
McGraw-Hill Book Company, 1978 in which Chapter 7
is of particular interest.
A single phase supply motor which is not only started
but also run as a two-phase motor by a somewhat differ
ent method is shown in UK Pat. No. 1,464,454. As with
conventional single phase motors, two spatially dis
placed windings are provided on the stator one of
which is supplied directly with a.c. The other winding 45
is centre tapped and each half of this winding may be
supplied with rectified mains (power line) voltage by
way of a respective thyristor. A gating circuit switches
the thyristors alternately at predetermined points in the
mains cycle so that the second winding is energized 50
with an alternating, though not sinusoidal, voltage
which is phase shifted from the power line (mains) by a
fixed amount. Because of the phase shift a rotating field
is produced which starts the motor. In this case the two
phase arrangement is also used to run the motor as well. 55
In many applications, the a.c. supply to the run wind
ing of a single phase induction motor is not provided
directly from the power line (mains) but is provided
electronically from, say, an inverter. UK Pat. No.
1,347,191 shows such a system and points out that under
constant speed and constant load running conditions, also have the advantage that the motor runs in a rela
the power required to run such a motor is often very tively defluxed state thereby significantly reducing vi
much less than that which is needed for starting. This bration.
means that the inverter must be designed to provide The system proposed in the Treseder article, refer
starting currents very much in excess of those needed 65 enced above, appears capable of offering some of these
during running. The patent proposes the use of the a.c. advantages but shows a three phase motor which neces
power line to supply the high currents needed during sarily requires a three phase power line supply and a
starting after which the motor is switched to the elec three phase inverter supply. Three phase power line
2
tronically generated a.c. supply for running. The gener
ated a.c. is synchronized with the power line prior to
switchover. In this way the generating circuit (inverter)
need only be designed for running conditions.
. A similar arrangement to that of UK Pat. No.
1,347,191 is decribed in an article by R C Treseder
entitled "Coaxial Drive for Magnetic Disk File' pub
lished in the IBM Technical Disclosure Bulletin, Vol
ume 23, No. 3, August 1980, page 1198, which shows a
four pole three phase induction motor for driving a
magnetic disk file. The optimum supply frequency for
the operating speed of the disk file is 120 Hz which is
provided to the motor by an oscillator driven three
phase power amplifier. To provide higher starting
torque than would be available from the 120 Hz gener
ated supply, the motor is started by connection to three
phase a.c. power line. When the motor has reached its
mains synchronous speed, which is sufficient for the
heads to fly, the power line is disconnected and the 120
Hz supply switched to drive motor.
DISCLOSURE OF THE INVENTION
Thus the prior art has recognised the benefits of
power line starting and electronically driven running
for a.c. induction motors in certain applications. Con
sidering further the example of a magnetic disk file in
which normally flying transducer heads start and stop
in contact with the disks, a high starting torque is essen
tial to achieve the minimum flying speed as soon as
possible thus minimising wear on the disks. This high
starting torque can best be provided by the power line.
To maximise the starting torque with a power line sup
ply a four pole motor is desirable. This is because the
synchronous speed of an induction motor is determined
by the number of poles and by the frequency of the
supply and the maximum torque is attained at a speed
just below synchronous speed. In the case of a power
line frequency four pole motor the synchronous speed is
1500 rp.m. at 50 Hz and 1800 r.p.m. at 60 Hz which
speeds are sufficient for the heads to fly.
. The torque/speed characteristics of induction motors
are such that the torque, after reaching a maximum just
below the synchronous speed, then falls sharply to zero
at the synchronous speed. The typical operating speed
of a magnetic disk file is around 3000 rp.m. and cannot,
therefore, be reached by continuing to run the motor
with the power line frequency torque/speed character
istic which is employed to start it. If the frequency of
the supply is approximately doubled, however, the sy
chronous speed is doubled and the motor can attain the
necessary operating speed.
Once the heads are flying, high acceleration is no
longer required to reach operating speed. Also, once at
operating speed, the load remains constant and the run
ning power is relatively low. Thus, an electronic type
power supply at twice mains frequency need only pro
vide about one tenth of the power required during start
ing to complete the acceleration and run the motor. The
lower power requirement and the doubled frequency
 3
4,401,933 4.
supplies are rarely available and three phase motors and gating off the power amplifying device whenever a
inverters are more complex than single phase. The sys predetermined current is exceeded.
tem would be considerably simpler and cheaper if a Another preferred feature of the invention is that the
single phase induction motor could be used requiring drive control signals should be square waves, the driver
only a single phase power line supply and a single phase 5 circuit being a switched bridge driver responsive to the
inverter. sense of the drive control signals to connect a voltage of
This is achieved in combination with an economic a respective polarity across the second stator winding.
starting technique for a single phase induction motor This arrangement has the advantage that a sinusoidal
according to the invention which provides a motor waveform does not have to be provided and the motor
control system for controlling a single phase induction O
will start and run with a simple square wave drive from
motor having a cage rotor and a stator with first and the electronic supply. : . . . .. .
second windings spatially displaced in phase from each
other, the system comprising sequencing means for.
sequentially indicating stages of motor operation in 15
BRIEF DESCRIPTION OF THE DRAWING
cluding an initial start stage, a switchable power line . The invention will now be described, by way of ex
connecting means arranged to connect single phase ample only, with reference to a preferred embodiment
alternating mains voltage to the first stator winding thereof as illustrated in the accompanying drawing,
during the start stage and to disconnect the power line forming a part of the specification, and in which:
voltage from the first winding at the end of the start FIG. 1 is a schematic block diagram of a motor con
stage, a driver circuit responsive to a periodic drive 20 trol system according to the present invention; ...
control signal to apply a correspondingly alternating FIG. 2 shows a start driver circuit employed in the
voltage to the second stator winding, and drive control system of FIG. 1; ... .
signal generating means for providing such a periodic FIG.3 shows a run driver circuit employed in the
drive control signal to the driver circuit both during system of FIG. 1; :' . .. .
and after the start stage, the drive control signal having, 25 FIG. 4 shows a counter buffer forming part of a con
during the start stage, a fixed phase shift with respect to: trol, circuit employed in the system of FIG. 1;
the power line voltage so that a rotating magnetic field FIGS.5, 5A and 5B shows a sequence controller and
is created to start the motor. other details of the same control circuit employed in
By employing the alternating single phase voltage FIG. 1; -
from the driver circuit not only to run the motor after 30 . . FIG. 6 shows various waveforms occurring in the
the start stage but also to provide an out of phase volt system of FIG. 1 and circuits of FIGS. 4 and 5;
age to the second stator winding during the start stage, FIG. 7 shows a monitor circuit employed in the sys
the need for additional phase shifting components such tem, of FIG. 1; and . . .. ..
as capacitors is avoided. Furthermore, the need for the FIG. 8 shows an error latch portion of the control
second winding to be balanced with the first and to 35 circuit employed in FIG. 1.
carry power line current is removed. Instead the second DETAILEDINVENTION,
DESCRIPTION OF THE
winding can be optimized for run conditions rather than
have to be a design compromise between start and run
conditions. In FIG. 1 is shown a single phase four pole induction
Preferably the drive control signal generating means motor 10 and an associated motor control system. The
is arranged to increase the frequency of the drive con motor 10 consists of a squirrel cage rotor 11, illustrated
trol signal subsequently to the start stage allowing ad schematically, and a wound laminated stator (not
vantage to be taken of the altered torque/speed charac shown) surrounding the rotor and spaced from it by a
teristics which result from the frequency increase. The Small air gap. . . . . . .
frequency can be increased in ramp fashion. 45 The windings with which the invention is concerned
The drive control signal generating means can advan are primarily a 'start winding 13, a run winding 14 and a
tageously includes power line sensing means for deriv sense winding 17. The sense winding 17 is wound on the
ing a first drive control signal from the line voltage, and same stator teeth as the start winding 13 and inductively
a variable frequency signal source for generating a sec senses alternating current applied to the start winding.
ond drive control signal of variable frequency, the sys 50 Also provided is a brake winding 15 for braking the
tem further comprising switchable connecting means motor. A brake circuit 16 applies d.c. braking current to
responsive to indications from the sequencing means to the winding 16 in response to an input command
connect the first drive control signals to the driver '-BRAKE'. The brake circuit is not relevant to the
circuit during the start stage and to connect the second invention and thus will not be further described.
drive control signals to the driver circuit subsequently 55 A voltage regulator 20 supplies a regulated d.c. volt.
to the start stage. : age derived from the power line both to the brake cir
Another preferred feature of the invention is that the cuit 16 and to a run driver circuit 21 which provides
driver circuit power output is limited so that the major alternating drive current to the run winding 14. The run
proportion of power to the motor during the start stage winding is energised, initially, to help start the motor
is provided by the power line. The drive circuit only and, subsequently, to keep it running during normal
has to provide enough power during starting to get the operation in accordance with the disclosed invention.
motor to turn. It is not ncessary that the drive to the run A.C. power line voltage is supplied directly to a start
and start windings be balanced during the start stage. driver circuit 22 connected to the start winding 13. The
Thus the driver circuit can be designed to provide only start winding is energised initially by line voltage and
the relatively low power consumed during running. 65 provides the bulk of the power necessary to bring the
The limitation of driver circuit power is preferably motor up to a minimum operating speed. After the
achieved by limiting the current through a power am motor reaches this minimum speed the start winding is
plifying device in the circuit. This may be done by disconnected and the motor continues to accelerate to
 5
4,401,933
6
its final operating speed under the action of the run together with the diodes 91 and 92 act during switching
winding alone. to clamp the emitter of transistor 70 to the negative rail
The Start driver circuit 22 is shown in FIG. 2 to or the collector of transistor 71 to the positive rail. This
gether with the start: winding 13. The circuit simply ensures that neither transistor is ever subjected to a
comprises a triac 60 for switching power line a.c. voltage greater than the full line voltage.
through the start winding. Gating signals for the triac Another function of inductances 93 and 94 is to give
60 are produced by a gated oscillator 61 (for example a short circuit protection to transistors 70 and 71. Thus, if
Texas Instruments type 555) in response to a control both are on as a result of some fault the rate of rise of
signal -START WINDING going low. The gating current will be slow enough for amplifiers 78 and 79 to
signals, which are of a frequency of 10 KHz, are in 10 be gated off before damage is done to the transistors.
verted and then amplified in a transistor 62 which At the heart of the motor control system of FIG. 1 is
supplies them to the primary of a pulse transformer 63. the control circuit 26 which may be loosely divided into
The resulting pulses in the transformer secondary all three sections 27, 28 and 29 and which are described in
trigger the triac to pass the applied power line a.c. to detail in FIGS. 4, 5 and 8 below. The control proper is
start winding 13. If the signal -START WINDING 15 performed by section 28 which is responsive to external
goes high the oscillator is gated off and the triac 60 is no commands from a system interface at 31 such as
longer triggered thus preventing further energisation of "STOP" and "-START" commands. Another input
start winding 13. . . .. . to the control section 28 is a source of timing pulses at
The run driver circuit 21 together with the run wind 1.2 second intervals from a timer 32. The control sec
ing 14 is shown in FIG. 3: Essentially the winding 14 is 20 tion 28 primarily comprises a sequencer for causing
connected in a half bridge arrangement between Dar sequential performance of the motor control operations
lington power transistors 70 and 71 and reservoir capac necessary to start, run and stop the motor. Various
itors 72 and 73. The d.c. power supply across the bridge stages of motor operation are defined by corresponding
is obtained from voltage regulator 20 and is applied latches within control section 28 which are set and reset
across terminals 74 and 75. 25 in a predefined sequence and in response to external
Antiphase periodic drive control signals -DRIVE 1 commands.
and -DRIVE 2 from a control circuit 26, FIG. 1, are The error latches 29 of circuit 26 are connected to
applied via an opto isolator 40 to gated amplifiers 78 and monitor circuit 40 and to interface latches 41, as shown
79 which provide corresponding switching currents to in FIG. 1 for sensing various motor conditions, with the
the bases of power transistors 70 and 71. When transis 30 latch states indicating the current stage of the motor
tor 70 is on transistor 71 is off and the converse. operation sequence. This diagnostic information is
Motor drive current thus flows alternately in oppo stored internally in further latches within section 29 and
site directions through the parallel combination of run output either directly or by way of a further interface
winding 14 and a capacitor 80 to charge and discharge latch buffer 41 to the system.
capacitors 72 and 73 in turn so that the junction between 35 The operation of the motor control system of FIG. 1,
the capacitors provides a center tapped supply. The rate in accordance with the principles of the invention, may
of change of voltage through winding 14 is limited by be followed with reference to the waveforms of FIG. 6.
capacitor 80. - .. .' ' In response to a predetermined combination of input
The current through each of the transistors 70 and 71 commands (-START and STOP both low), the con
is sensed by means of the voltage developed across one trol section 28 of circuit 26 applies the signal -START
of resistors 83 and 84. This voltage is compared with a WINDING (coincident with START LATCH in FIG.
predetermined reference maximum allowable voltage 6) to start driver 22 to cause application of single phase
Vrefin one of comparators 85 and 86. If the allowable power line a.c. to start winding 13. The line frequency
current is exceeded the outputs of the comparators gate may be either 50 or 60 Hz. The presence of mains volt
off their respective amplifiers 78 and 79 for the duration 45 age is detected inductively by the sense winding 17.
of single shots 87 or 88. The chopping action of this The signal on the sense winding is phase shifted by
gating circuit reduces the effective r.m. s. voltage across 120' by phase shifter 45. The phase shifted signal is
the run winding. The regulated supply applied between squared by an overdriven comparator to produce a
terminals 74 and 75 is 230 volts so that a maximum of signal "START PHASE" which is applied to control
115 volts can be switched across the winding 14. How 50 section 28. Because the latches in the control section 28
ever, in the start stage with the motor cold and winding indicate that the motor 11 is in the starting stage of
resistance low the application of this voltage would operation, the START PHASE signal is gated through
draw, much more current through devices 70 and 71 section 28 and inverted to constitute a pair of opposite
than they can tolerate. The gating circuit prevents such phase drive control signals-DRIVE 1, and -DRIVE
high currents being drawn and its action reduces the 55 2.
effective voltage across winding 14 during starting to These signals, which are logic signals, are converted
some 40 volts. This protective action effectively limits to power transistor switching signals in a conventional
the power output required of the driver permitting a optoisolator 48 (for example, Texas Instruments, TIL
much simpler lower rated driver circuit than would 112) and applied to the run driver 21. This circuit, as has
otherwise be required. The limitation of power corre been described in FIG. 3, is a switching half bridge
sponds to the power required to run the motor at oper driver supplied with regulated d.c. from voltage regula
ating speed. . .. . . . . . .tor 20. The -DRIVE 1 and -DRIVE 2 signals cause
.
Transistors 70 and 71 are protected against transient the alternate switching of the regulated d.c. voltage in
overloads when the current through the winding 14 is opposite directions across the run winding 14. The 120
reversed by means of diodes 91 and 92. One function of 65 phase relationship between the drive signals and the
inductances 93 and 94 is, together with capacitance 80, power line voltage to the start winding is equivalent to
to limit transient power dissipated in the transistors 70 a 90° phase relationship between the currents in the start
and 71 when they are switched. The diodes 95 and 96 and run windings. This is because the current in the start
 7
4,401,933
8
winding lags the applied voltage by about 30'. The out would need more turns and would produce less torque
of phase currents in the two windings cause a rotating and run hotter.
magnetic field to be created in the motor air gap which Details of counter buffer 27 and of the control por
starts the rotor turning. tion 28 of control circuit 26 are shown in FIGS. 4 and
Once the rotor is rotating, most of the power needed 5 respectively. The operation of these portions of con
to provide a high starting torque is drawn from the trol circuit 26 will now be explained in detail with refer
power line. The out of phase signal to the run winding ence to the timing diagram of FIG. 6.
is primarily needed to cause the initial movement and Taking first the counter buffer of FIG. 4 it can be
the continued supply of out of phase drive signals to the seen that the four outputs CTR1, CTR2, CTR4 and
run winding has relatively little effect on the starting 10 CTR3 (see FIG. 6) of counter 35 are applied to buffer
torque. The start stage is terminated after a predeter 27 and inverted by inverters such as 200. The four
mined time indicated by counter 35. At this time the line counter bit values and their inverses are made available
supply is disconnected from the start winding 13 in on lines such as 201 and 202 to the control portion 28.
response to a change of state of the control signal-S- The true counter bit values are also applied to AND
TART WINDING. At this point the motor is turning at 5 gates such as 203 so that, if a gating signal -FORCE
around 50% of its final operating speed. BRM (FIG. 6) from control portion 28 is high, they
The motor operation now enters a ramp stage in appear as signals BRM BIT 1, 2, 4 and 8 on four of the
which the motor runs on alternating current supplied to input control lines 38 (FIG. 1) to the binary rate multi
its run winding 14 alone and the frequency of that cur plier of the programmable divider 36. If -FORCE
rent is increased in ramp fashion to that corresponding 20 BRM is low all the signals BRM BIT 1, 2, 4 and 8 are
to the final operating speed. ZeO.
After the start stage terminates the control section 27 A fifth input line 38 carries a signal BRM BIT 16
no longer derives the drive control signals -DRIVE 1 (FIG. 6) which is generated by a latch circuit whose
and-DRIVE 2 from the START PHASE signal but inputs are -CTR4 and a signal-LOAD 16 from con
instead from the variable frequency signal BRM IN 25 trol portion 28. The latch is set when -CTR4 is high
from programmable divider 36. AT the beginning of the and reset by the -LOAD 16 signal. The latch consists
ramp stage, the counter 35 is loaded in response to the of NAND 204 and inverter 205 the outputs of which are
signal-CTR LOAD and counter buffer control sec dot ORed at junction 206 and inverted by inverter 207.
tion 27 gates the counter output to determine the divi The control portion 28 of circuit 26 is illustrated in
sion ratio of the programmable divider. With the 30 detail in FIG. 5. Various waveforms and signals occur-.
counter in a loaded state, the input lines 38 to the di ring in the circuit portion of FIG. 5 are shown in FIG.
vider are in the state 01 111 corresponding to a fre 6 to assist in explaining the operation of the circuit.
quency of BRM IN of 55 Hz. At the heart of the circuit of FIG. 5 are six latches of
During the ramp stage, the counter 35 is incremented the Set/Reset type, each corresponding to a unique
periodically in response to pulses from timer 32 and the 35 stage of motor or motor control operation. The latches
frequency of BRM IN is increased in steps from 55 to consist of Test Latch 301, Start Latch 302, Ramp Latch
100 Hz. The drive signals -DRIVE 1 and -DRIVE 2 303, Run Latch 304, Brake Latch 305 and End Latch.
also increase correspondingly in frequency with the 306. The latches are set and reset sequentially by input
result that the motor accelerates steadily to reach its logic 310 which is a network of logic gates responsive
operating speed at the end of the ramp. 40 to the external signals shown applied to the circuit 26 in
The ramp stage of motor operation now terminates FIG. 1 and also to internally generated signals from all
and the sequence progresses to the run stage. In this three portions of circuit 26. Because of the large number
stage, the 100 Hz drive signals continue to be applied to of gates and inputs the interconnections within input
the run winding until the operation is terminated by the logic 310 have not been shown in detail. Instead the
STOP external command going high or by the occur 45 inputs to individual gates have been explicitly identified
rence of a fault condition such as the "DRIVE UN by name. .
SAFE" signal from diagnostic control section 29. The output states of the latches (Q and P or Q), as
Upon termination of the run stage the motor opera well as being fed back to the input logic 310, are also
tion sequence enters a braking stage in which the drive applied to output logic 311. Output logic .311 is a net
signals to the run winding are removed and the brake 50 work of logic gates providing the various control and
winding 15 is energised by way of the brake circuit 16 to drive signals emerging from portion 27, FIG. 1, to other
bring the motor to rest. parts of the motor control circuit, for example the
The employment of the electronically generated sig -DRIVE 1 and -DRIVE 2 signals to the run driver
nals -DRIVE 1 and -DRIVE 2 to provide the out of circuit 21. As with input logic 310 not all the intercon
phase starting current, synchronized with the mains has 55 nections of the output logic 311 are shown but instead
several advantages. One of these is that power line the inputs to individual gates are explicitly identified.
starting of a single phase induction motor is achieved Another component of the control circuit portion of
without the need for a large phase shifting capacitor. FIG. 5 is a latch 312 of the Data/Clocked type. In
Perhaps more important is that no compromise between response to signals from the gates of input logic 310, this
start and run winding design is necessary. The two latch, at clock times defined by the signal CLOCK IN
windings do not have to be balanced and carry the same from timer 32, generates RESET pulses which are fed
currents but instead each may be optimized for start and back to the same gates to step the latches through their
run conditions respectively. Thus the start winding is sequence.
designed for full line voltages ranging from 180 to 260 Two frequently occurring signals which are simply
volts r. m.s. whereas the run winding is designed for a 65 combinations of the outputs of certain latches are OP
voltage range of from 40 to 115 volts r. m.s. The run ERATION, which indicates that the motor is starting
winding to start winding turns ratio is 3 to 5. If a com or running, and ROTATION which indicates that it is
promise over voltages were necessary, the run winding starting, running or braking. An OR gate 313 produces
 4,401,933
9 10
the signal OPERATION and a further OR gate 314 resets the Test latch. Simultaneously, the signal
produces ROTATION. -GATE POWER goes down, activating the voltage
The sequence of operation is as follows: External regulator 21, and GATE DRIVE goes up to enable
control signals -START and STOP are initially high passage of the signals -DRIVE 1 and -DRIVE 2 to
prior to motor operation and are inverted and combined the Run driver 21.
by NOR gate 315 to produce a BOTH HIGH signal. Once the Start latch 302 is set, the motor is energised
This signal passes through OR gate 316 to produce a as explained in connection with FIG. 1. The signal
CLEAR signal which is effective to reset all latches -START LTCH is buffered by inverters 344 and 345
301-306 and also to clear the counter 35. and emerges as -START WINDING. This enables
Before the motor is allowed to start, a checking and 10 the start driver circuit 22 to apply line voltage to the
testing cycle is carried out. Firstly, the -START and start winding 13.
STOP signals go low consecutively. The correct opera A switching circuit including AND gates 349 and 350
tion of the input control lines carrying these signals to receives both the signals START PHASE and BRM IN
interface 31 is confirmed by the generation of two nega as inputs. NAND 349 is enabled by the Start latch to
tive pulses in the signal -SPEED GOOD which is 5 apply the START PHASE signal to an AND gate 351
provided to the system interface 33. The signal -S- and its inverse to an AND gate 352. Thus, the drive
PEED GOOD, in this instance, is produced from NOR control signals -DRIVE 1 and -DRIVE 2 are pro
gate 317 in response to the application of -START and vided by the START PHASE signal during the Start
a delayed version STOPBUFF of the STOP signal to a stage. When the Start latch is later reset, the signal
NAND circuit 318. The output of the NAND 318 is 20 BRM IN constitutes the input instead. The two AND
applied to NOR 317 by way of a dot OR junction 319. gates 351 and 352 must be enabled by GATE DRIVE
After this line check operation, the -START and and not inhibited by diagnostic signals DRIVE UN
STOP signals both go high again. Subsequently, both SAFE and SENSE GOOD, the latter being NANDed
lines go low and this is the start of the motor control with START LTCH by gate 353.
operation proper. A signal BOTH LOW is generated by 25 Thus as a result of the setting of the Start latch, line
NAND gate 320 and inverter 321. This signal is applied voltage is applied to the start winding and simulta
to an AND gate 325 whose other inputs are all positive neously drive control signals are applied to the run
since all latches are in their reset state. The output of driver to cause a synchronised but out of phase energi
AND 325 by way of an OR 326 generates the first sation of the run winding. The resulting rotating mag
RESET pulse from latch 312. This RESET pulse is 30 netic field, as explained above, causes the rotor to begin
applied to another AND gate 327 whose output sets the to rotate. The high power available from the line and
Test latch 301. The other inputs to AND 327 indicate the relatively low line frequency maximise the torque to
that no other latch is set and that, as a result of the accelerate the motor as rapidly as possible up to a mini
application of the signal CTR CLOCK, the counter 35 mum operating speed.
has incremented from zero. The latter input indicating a 35 The application of line power to the start winding
non zero count, is provided by OR 328. continues until the Start stage of the sequence is termi
The incrementing of the counter 35 is also a result of nated. This happens when the counter reaches a count
the same BOTH LOW signal which by way of OR 330 of 7 and the Ramp latch 303 is set by the immediately
generates a signal GATE CLOCK. This signal enables following Strobe pulse by way of an AND gate 356.
the timer clock 32 which produces the CLOCK IN This automatically generates a Reset pulse which resets
timing pulse train. The CLOCKIN signal is inverted to the Start latch by way of AND 357. As soon as the Start
produce a signal STROBE which in turn is applied to latch goes down, the signal -START WINDING is
an AND gate 331. In the absence of a signal CTRSTOP removed from the start driver circuit. 22 and the start
and providing the Run Latch is reset, STROBE is gated winding 13 is no longer energized.
through AND 331 and inverted to produce the signal 45 Also when the Ramp latch is set the signal-FORCE
CTR CLOCK which increments counter 35. BRM, produced by OR gate 358, goes high and the
The setting of the Test Latch thus indicates that the programmable divider 36 is set in accordance with the
necessary clocking signals and RESET pulses are being contents of the counter 35 and the value of the BRM
properly generated. Before proceeding to the Start BIT 16. These values are not significant until the Start
stage of operation, the setting of the Test latch is first 50 latch is reset causing the generation of signals-LOAD
used to cause the control signals GATE DRIVE 16 and -CTRLOAD from inverter 359. The -LOAD
-GATE POWER and -BRAKE (see FIG. 6) to be 16 signal forces BRM BIT 16 low and the -CTR
generated for Test purposes. These signals are gener LOAD signal sets all the counter 35 outputs to 1. The
ated by three NAND gates 335, 336 and 337 if any of programmable divider 36 thus receives a control word
the inputs to these gates go low. Two of these inputs are 55 01111 on lines 38 which corresponds to an output fre
provided by additional NAND gates 338 and 339 quency of approximately 55 Hz. The frequency of drive
which, while the Test latch is set, go low at counts of 1 signals -DRIVE 1 and DRIVE 2 to the run driver is
and 2, respectively to cause the generation of respective thus forced to this value at the start of the frequency
signals by NAND gates 335, 336, and 337. While the ramp as the controlling input is now BRM IN to AND
Test latch is set, the other inputs to these NAND gates 350. The frequency of 55 Hz is chosen as a compromise
-OPERATION and -BRAKE LTCH remain high. between the two possible mains frequencies of 50 and 60
Setting of the Test latch generates the signal-SPEED Hz.
ZERO via an OR gate 340 to the system interface 33. After the counter 35 has been loaded it is incremented
When the counter 35 reaches a count of 3, the Start by the subsequent CTR CLOCK pulses so that the
latch is set upon receipt of the next Strobe pulses by an 65 frequency of BRM IN increases in twelve steps until it
AND gate 342. This generates a Reset pulse from latch corresponds to the final required operating frequency.
312 at the reset positive clock edge. Since the Start latch This condition is indicated by the setting of the Run
is set, OPERATION is now high and an AND 343 latch 304 at a count of 12 by way of AND gates 362 and
 4,401,933
11
363. The output of AND gate 362 is a signal CTR
STOP which removes the CTR CLOCK signal by
inhibiting AND gate 331. The counter contents are
frozen and the state of the lines 38 is fixed at 11100,
corresponding to a frequency of BRM IN of approxi
mately 100 Hz. The setting of Run latch 304 produces
another RESET pulse to reset Ramp latch 303 by way
of AND gate 364. The motor is now running at full
operating speed and will continue in this state indefi
nitely until the external command, STOP, goes high. O
When STOP goes high, with -START remaining
low, the Run stage of operation is terminated. The buff
ered signal STOPBUFF causes AND 367 to generate a
RESET pulse by way of OR 326 and latch 312. This
pulse and STOP BUFF are applied to an AND 368 15
which produces a signal SET BRAKE to set the Brake
latch 305 and simultaneously reset the Run latch. At the
same time, a pulse CTR CLEAR, produced by OR 368,
clears the counter 35 and -CTR STOP returns high
thus freeing the counter once again. The signal OPER 20
ATION goes low as does GATE DRIVE, removing
the drive signals from the run winding driver circuit 21.
The -BRAKE signal is produced by NAND 337, in
response to the setting of the Brake latch, and causes the
operation of the brake circuit 16 which proceeds to stop 25
the motor by a d.c. braking technique.
After counter 35 reaches a count of 8, the braking is
complete and the End latch 306 is set by AND 370 upon
receipt of the next Strobe pulse. A final RESET pulse is
generated, by way of AND 370, which, applied to a
further AND 371, resets the Brake latch. The signal
ROTATION produced by OR 314 goes low and the
signals GATE CLOCK, --GATE POWER and
-BRAKE change state to terminate their respective
operations. Also the signals -SPEED GOOD and 35
-SPEED ZERO to interface 33 both go low.
In response to the dropping of these two signals at
interface 33, the external system subsequently raises the
external signal -START. The signal BOTH HIGH is
once again produced by OR 315 and the resulting
CLEAR pulse from OR 316 clears all latches and the
counter. The resetting of the End latch is verified to the
system when -SPEED GOOD is driven high again by
the output of NAND 318.
Should the DRIVE UNSAFE signal have gone high 45
for any reason during the Run stage of motor operation,
as indicated by the dotted lines in FIG. 6, then -S-
PEED GOOD rises immediately as a result of an output
from an AND gate 375 and GATE DRIVE falls to
remove the drive signals from driver 21.
The remaining portion 29 of control circuit 26 is
shown in FIG.8. As shown the circuit is simply a num
ber of latches, each of which captures outputs from
monitor circuit 40 details of which are shown in FIG. 7.
The inputs to the monitor circuit of FIG. 7 are
SENSE which is the output of sense winding 44 (FIG.
1), the drive control signals-DRIVE 1 and -DRIVE
2 and the triac pulses from Start driver 22.
Considering FIG. 7 first, the SENSE signal is com
pared with a predetermined voltage reference by a
differential amplifier 501. The output of the amplifier is
applied to trigger a single shot 502 whose period is 200
mS. Providing the SENSE voltage exceeds the thresh
old voltage, its oscillations will keep the single shot 502
triggered so that its Q output is always high. This signal
is the SENSE GOOD signal.
The Q output of single shot 502 is low as long as
SENSE GOOD is high and thus does not alter the
12
initially cleared state of a flip-flop 503. The Q output of
flip-flop 503 is gated with SENSE GOOD and the sig
nal GATE DRIVE in AND gate 504 to produce a
signal DRIVE ON.
The signal DRIVE ON is used to enable a further
AND gate 507 to which the drive control signals
DRIVE 1 and DRIVE 2 are applied. The DRIVE 1
signal is delayed slightly in delay 508 so that AND 507.
produces pulses whenever DRIVE 1 or DRIVE 2
pulses are present. The output pulses of AND 508 trig
ger a 10 mS single shot 509. If drive pulses do not ap
pear for an interval greater than 10 mS, the Q output of
single shot 509 goes high and sets a flip-flop 510. The Q
output of this flip-flop is the signal-DRIVE PULSES
indicating that the drive pulses have disappeared. An
other AND gate 511 will set flip flop 510 if either
DRIVE 1 or DRIVE 2 is stuck high.
A further output of the monitor circuit is the signal
-TRIAC PULSES. This, when high, indicates the
absence of triac pulses in the Start driver 22 which
should be produced in response to the signal-START
WINDING. Again a timing out single shot 515 and
data/clock flip-flop 516 are used.
Finally, the occurrence of an open circuit in the sense
winding 17 is monitored by applying the SENSE signal
to a differential amplifier 519. The output is half wave
rectified and gated by the signal GATE DRIVE
through an AND gate 520 to the clock input of a flip
30 flop 521. If no pulses are present the flip-flop 521 will
revert from its initially cleared state to its set state caus
ing the signal SENSE OPEN to be produced.
The signal SENSE OPEN bypasses error latches 29
and is applied directly to the interface latches 41. The
other signals are however applied to error latches 29 as
shown in FIG. 8.
In FIG. 8, the SENSE GOOD signal is inverted and
applied to AND gates 610 and 611 whose outputs set
latches 612 and 613 respectively. Latch 612 is set if
SENSE GOOD goes low during the Start stage of
operation and latch 613 is set if SENSE GOOD goes
low after the Start stage.
The signal -DRIVE PULSES is gated by GATE
DRIVE through AND 614 to set a latch 615. The signal
-TRIAC PULSES is gated ty START LTCH and
CTR4 through an AND 616 to set a latch 617.
Should any of these latches 612, 613, 615 and 617 be
set, the DRIVE UNSAFE signal is produced by OR
618. All four latches are initially set by POR and can be
50 reset for test purposes by the signal RESET CHECK.
The preferred embodiment of the invention described
above with reference to FIGS. 1 to 8 is only one exam
ple of how the invention may be put into practice.
Within the scope of the invention as broadly disclosed
55 and claimed, many changes and alternatives are possi
ble.
For example, in the preferred embodiment, the drive
control signals to the run driver circuit are derived from
sensed line voltage during the Start stage and from a
separate oscillator during the Ramp and Run stages. It
would be equally possible to derive the drive signals to
the run winding entirely from a variable frequency
oscillator and synchronise the oscillator output with the
line by means of a phase locked loop during the Start
65 stage.
Also although the drive control signals applied to the
Run driver are essentially switching signals of square
wave form, there is no reason why sinusoidal signals
 4,401,933
13
could not be employed and applied after amplification
by way of triac devices to the run winding.
Many aspects of the motor control operation in the
preferred embodiment are essentially open loop for
example the durations of the start, ramp and brake
stages are determined by a counter. It would be possible
to define these stages by monitoring the motor speed. If
speed were monitored in this way, closed loop control
of the frequency ramp and of final speed could be em
ployed. In this case a smooth rather than a staircase
ramp function could also be employed.
The invention claimed is:
1. A system for rotating a member from a rest posi
tion to a predetermined constant operating speed com
prising a single phase induction motor and a motor
control system;
said single phase motor comprising:
(1) a cage type rotor coupled to said member; and
(2) a stator having at least:
(a) a run winding; and
(b) a start winding spatially displaced in phase
from said run winding;
said control system comprising:
(1) first switch means for selectively connecting a
single phase alternating power line voltage to
said start winding in response to a start control
signal, said alternating power line voltage having
a constant frequency which is substantially
below the optimum supply frequency for rotat
ing said motor at said constant operating speed;
(2) means selectively connectable to said run wind
ing for developing a rotating magnetic field to
cause initial rotation of said member from said
rest position;
(3) a run drive circuit for supplying a run voltage to
said run winding including means for varying the
frequency of said run voltage between a fre
quency approximating the frequency of said
power line voltage and said optimum supply
14
frequency of said motor in accordance with a
speed control signal; and
(4) second switch means for selectively switching
said run winding between said rotating magnetic
5 field developing means and said run drive circuit
in response to a run control signal; and
(5) means for supplying said control signals to said
first and secnd switch means in a predetermined
sequence which causes
10 (a) said start winding and said run winding to be
initially energized simultaneously to produce a
high starting torque which rapidly accelerates
said motor to a minimum operating speed de
termined by said constant frequency;
15 (b) said start winding to be disconnected from
said line voltage and said run winding to be
switched to said run driver circuitry after a
predetermined time; and
(c) the frequency of said run voltage to be in
20 creased to said optimum supply frequency to
accelerate said motor to said constant operat
ing speed.
2. The system recited in claim 1 in which said means
for developing a rotating magnetic field includes a third
25 winding disposed on said stator and inductively coupled
to said start winding.
3. The system recited in claim 2 in which said run
drive circuit includes a variable frequency oscillator.
4. The system recited in claim 3 in which said means
30 for supplying said control signals in a predetermined
sequence includes a timing circuit for establishing said
predetermined time and the rate at which the frequency
of said run voltage is increased.
5. The system recited in claim 4 in which said run
35 winding and said start winding have been optimized to
perform their intended function so that considerably
less power is consumed when said motor is running at
said predetermined constant operating speed.
k k k sk
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