Compal Confidential

A B C D E
1 1
Compal Confidential
2 2
Cougar
Schematics Document
Intel Cedar Trail Processor/ Tiger point
3
2010-11-05 3
REV:0.1
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEAMTIC MB A6856
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019CG
Date: Tuesday, December 21, 2010 Sheet 1 of 34
A B C D E
A B C D E
Compal Confidential
Model Name : PBU00
File Name : P
1
Low Power Clock Generator 1
Fan Control ICS9LVRS387AKLFT MLF

page 24
page 9
HDMI Conn.
page 15
Intel Cedarview Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM
page 10
LED Conn. LVDS

page 16 ONE CHANNEL (22x22mm) page 6,7,8 1.5V DDRIII 800
2
DMI x 2 2
PCIeMini Card
WWAN USB Conn X3 Int. Camera
(FULL)
USB port 6 USB USB USB port 0,1,4 USB port 7
page 16
5V 480MHz 5V 480MHz page 18,21 page 16
PCIeMini Card
PCIe 1x [2]
WLAN +BT COMBO (HALF) 1.5V 2.5GHz(250MB/s)
Tiger Pointer
PCIe port 2 USB
page 16 Card Reader Card Reader Conn.
RTL5137 page 23
PCIe 1x USB port 3 page 23
(17x17mm)
RJ45 RTL8105E 1.5V 2.5GHz(250MB/s) SATA port 0 SATA HDD
page 22
10/100 LAN 5V 1.5GHz(150MB/s)
page 19
PCIe port 3 page 22
page 11,12,13,14
3 3
RTC CKT.
page 13 HD Audio 3.3V 24.576MHz/48Mhz
3.3V 33 MHz
LPC BUS
DC/DC Interface CKT. HDA Codec
ALC269
page 26 page 20
ENE KB926 E0
page 24
Power Circuit DC/DC
Int.
page 27~35 MIC CONN MIC CONN HP CONN SPK CONN
page 20 page 21 page 21 page 21
Touch Pad Int.KBD SPI ROM (10A 1X) (10B 2X)
page 26 page 25 page 25
4
Power/B 4
page 26

SCHEAMTIC MB A6856
A
4019CG
A B C D E
A B C D E
Voltage Rails
1 SIGNAL 1
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 G3
Full ON HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) ON ON ON OFF
B+ AC or battery power rail for power circuit. ON ON ON ON S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
+0.89VS 0.89VS GFX support voltage ON OFF OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
+1.05VS VCCP switched power rail ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.5V 1.5V power rail for DDR ON ON OFF OFF
+1.8VS 1.8VS switched power rail ON OFF OFF OFF
+3VALW 3.3V always on power rail ON ON ON OFF
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF
BTO Option Table
+3V_WLAN 3.3V power rail for LAN ON ON OFF OFF
2 +3VS 3.3V switched power rail ON ON OFF OFF 2
+5VALW 5V always on power rail ON OFF ON OFF Function Mini PCI-E SLOT CAMERA & MIC BLUE TOOTH Clock gen
+5VS 5V switched power rail ON OFF OFF OFF
+VSB VSB always on power rail ON ON ON OFF
description
+RTCVCC RTC power ON ON ON ON explain Wi-Fi WiMax 3GGPS 3G CAMERA MIC BLUE TOOTH Tpye
BTO WLAN@ WIMAX@ 3GGPS@ 3G@ CAM@ MIC@ BT@ low@ normal@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Function
description
explain
BTO
3 3
EC SM Bus1 address EC SM Bus2 address

Device Address Device Address
Smart Battery 0001 011X b EMC1402 1001 010X b
ICH7M SM Bus address

Device Address
Clock Generator 1101 001Xb

(SLG8SP556VTR)
DDR DIMMA 1010 000Xb
WWAN/WLAN
4 4

SCHEAMTIC MB A6856
Custom A
4019CG
A B C D E
5 4 3 2 1
D D
C C
B B
A
Security Classification Compal Secret Data Compal Electronics, Inc. A
2010/06/27 2011/6/27 Title

Issued Date Deciphered Date SCHEAMTIC MB A6856
A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019CG
5 4 3 2 1
5 4 3 2 1
B+ DESIGN CURRENT 250mA Cougar Power Map

Ipeak=6.97A, Imax=4.88A
DESIGN CURRENT 522mA
+3VALWP +-5%
** The SW just is reserved.
The power passes by jump or
UP6182CQAG 0-ohm resistor. WOL_EN#
** P-CHANNEL +3V_LAN
AO3413 DESIGN CURRENT 300mA
D D
Ipeak=3.98A, Imax=2.8A +5VALWP +-5%

SUSP
N-CHANNEL +5VS
SI4800BDY
VGATE
APL5930KA DESIGN CURRENT 151mA

+1.8VS
C C
SUSP
N-CHANNEL DESIGN CURRENT 5586mA
+3VS
SI4800BDY ENVDD
P-CHANNEL +LCD_VDD
AO3413 DESIGN CURRENT 2000mA
VGATE#
N-CHANNEL DESIGN CURRENT 294mA

+3VS_PRIME
SUSP# SI4800BDY
SY8033BDBC Ipeak=1.308A, Imax=4A +1.05VSP +-5%

VR_ON
B Imax=3.5A DESIGN CURRENT 4500mA +CPU_COREP B
RT8165BGQW DESIGN CURRENT 2000mA +GFX_COREP
SYSON
Ipeak=19.6A, Imax=13.72A +1.5VP +-5%
G5603RU1U
SUSP#
DESIGN CURRENT 2112mA +1.5VSP
IRF8113PBF
SUSP

+0.75VSP
UP7711U8
A A

SCHEAMTIC MB A6856
Custom A
5 4 3 2 1
5 4 3 2 1
<10> DDR_A_MA[0..14]
<10> DDR_A_DQS#[0..7]
<10> DDR_A_DM[0..7]
<10> DDR_A_DQS[0..7] U1B

U1A ?
CEDARVIEW
<10> DDR_A_D[0..63] DDR_A_MA0 DDR_A_D0
CEDARVIEW AK14 DDR3_MA0 DDR3_DQ0 Y30
DDR_A_MA1 AK16 Y29 DDR_A_D1
REV = 1.10 DDR_A_MA2 DDR3_MA1 REV = 1.10 DDR3_DQ1 DDR_A_D2
AJ14 DDR3_MA2 DDR3_DQ2 AC30
DMI_RXP0_C L3 K6 DMI_TXP0 <12> DDR_A_MA3 AJ16 AC31 DDR_A_D3
DMI_RXN0_C DMI_RXP0 DMI_TXP0 DDR_A_MA4 DDR3_MA3 DDR3_DQ3 DDR_A_D4
L2 DMI_RXN0 DMI_TXN0 K5 DMI_TXN0 <12> AK18 DDR3_MA4 DDR3_DQ4 W31
D DMI_RXP1_C DDR_A_MA5 DDR_A_D5 D
M3 DMI_RXP1 DMI_TXP1 L5 DMI_TXP1 <12> AH18 DDR3_MA5 DDR3_DQ5 W28
DMI_RXN1_C M2 L6 DMI_TXN1 <12> DDR_A_MA6 AJ18 AB28 DDR_A_D6
DMI_RXP2_C DMI_RXN1 DMI_TXN1 DDR_A_MA7 DDR3_MA6 DDR3_DQ6 DDR_A_D7
N2 DMI_RXP2 DMI_TXP2 L9 DMI_TXP2 <12> AK20 DDR3_MA7 DDR3_DQ7 AB30
DMI_RXN2_C N1 L8 DMI_TXN2 <12> DDR_A_MA8 AJ20 AA24 DDR_A_D8
DMI_RXP3_C DMI_RXN2 DMI_TXN2 DDR_A_MA9 DDR3_MA8 DDR3_DQ8 DDR_A_D9
P2 N5 DMI_TXP3 <12> AH20 AA22
DMI
DMI_RXN3_C DMI_RXP3 DMI_TXP3 DDR_A_MA10 DDR3_MA9 DDR3_DQ9 DDR_A_D10
P3 DMI_RXN3 DMI_TXN3 N6 DMI_TXN3 <12> AJ12 DDR3_MA10 DDR3_DQ10 AE27
+1.5VS DDR_A_MA11 AK21 AE26 DDR_A_D11
DDR_A_MA12 DDR3_MA11 DDR3_DQ11 DDR_A_D12
<9> CLK_CPU_EXP N9 DMI_REFCLKP RSVD_TP_R8 R8 T1 R493 AJ21 DDR3_MA12 DDR3_DQ12 AB27
<9> CLK_CPU_EXP# N8 R7 DDR_A_MA13 AJ8 AA25 DDR_A_D13
DMI_REFCLKN RSVD_TP_R7 T2 DDR3_MA13 DDR3_DQ13
2 1 DMI_REF1P5 T2 T1 DMI_IRCOMP1 2 DMI_REF1P5 DDR_A_MA14 AH22 AD25 DDR_A_D14
DMI_REF1P5 DMI_RCOMP DDR3_MA14 DDR3_DQ14
1U_0402_6.3V6K
R973 0_0402_5% AJ22 AD27 DDR_A_D15
7.5K_0402_5% DDR3_MA15 DDR3_DQ15 DDR_A_D16
1 DDR3_DQ16 AD29
C1088
+1.5V pull up must be placed DDR_A_WE# AH10 AE29 DDR_A_D17

<10> DDR_A_WE# DDR3_WE# DDR3_DQ17
1 OF 6 DDR_A_CAS# AJ10 AJ30 DDR_A_D18
within 500 mils from Cedarview <10> DDR_A_CAS# DDR3_CAS# DDR3_DQ18
DDR_A_RAS# AJ11 AK29 DDR_A_D19
2 CDV_22MM_REV1P10 <10> DDR_A_RAS# DDR3_RAS# DDR3_DQ19
? AD28 DDR_A_D20
DDR_A_BS0 DDR3_DQ20 DDR_A_D21
<10> DDR_A_BS0 AK12 DDR3_BS0 DDR3_DQ21 AD30
DDR_A_BS1 AH13 AG30 DDR_A_D22
<10> DDR_A_BS1 DDR3_BS1 DDR3_DQ22
+1.5V pull up must be placed DDR_A_BS2 AK22 AJ29 DDR_A_D23
<10> DDR_A_BS2 DDR3_BS2 DDR3_DQ23
AE24 DDR_A_D24
within 500 mils from Cedarview AH12
DDR3_DQ24
AG24 DDR_A_D25
DDR3_CS#0 DDR3_DQ25 DDR_A_D26
AH8 DDR3_CS#1 DDR3_DQ26 AD22
DDR_CS2# AK11 AC21 DDR_A_D27
<10> DDR_CS2# DDR3_CS#2 DDR3_DQ27
DDR_CS3# AK8 AG27 DDR_A_D28
<10> DDR_CS3# DDR3_CS#3 DDR3_DQ28
AG25 DDR_A_D29
C948 1 DMI_RXP0_C DDR3_DQ29 DDR_A_D30
<12> DMI_RXP0 2 AH23 DDR3_CKE0 DDR3_DQ30 AG21
0.1U_0402_10V6K AJ24 AE21 DDR_A_D31
DDR_CKE2 DDR3_CKE1 DDR3_DQ31 DDR_A_D32
<10> DDR_CKE2 AK24 DDR3_CKE2 DDR3_DQ32 AD13
<12> DMI_RXN0 C949 1 2 DMI_RXN0_C DDR_CKE3 AH24 AD11 DDR_A_D33
<10> DDR_CKE3 DDR3_CKE3 DDR3_DQ33
0.1U_0402_10V6K SMPWROK AG8 DDR_A_D34
DDR3_DQ34
0.1U_0402_16V4Z
AK10 AG7 DDR_A_D35
C950 1 DMI_RXP1_C DDR3_ODT0 DDR3_DQ35 DDR_A_D36
<12> DMI_RXP1 2 AK7 DDR3_ODT1 DDR3_DQ36 AG13
10K_0402_5%
C 0.1U_0402_10V6K M_ODT2 DDR_A_D37 C
<10> M_ODT2 AL9 DDR3_ODT2 DDR3_DQ37 AE13
M_ODT3 AJ7 AD10 DDR_A_D38
<10> M_ODT3 DDR3_ODT3 DDR3_DQ38
2
<12> DMI_RXN1 C951 1 2 DMI_RXN1_C 1 AF8 DDR_A_D39
DDR3_DQ39
1
0.1U_0402_10V6K D DDR_A_D40
AG15 DDR3_CK0 DDR3_DQ40 AH2
<27> SYSON# SYSON# 2 Q37 AF15 AG3 DDR_A_D41
G DDR3_CK#0 DDR3_DQ41 DDR_A_D42
AF17 DDR3_CK1 DDR3_DQ42 AD2
S 2N7002_SOT23 2 DDR_A_D43
For ES1 sample AG17 AD3
1
DDR3_CK#1 DDR3_DQ43
R880
C1063
Close to CPU M_CLK_DDR2 AD17 AH4 DDR_A_D44
<10> M_CLK_DDR2 DDR3_CK2 DDR3_DQ44
M_CLK_DDR#2 AC17 AK3 DDR_A_D45
<10> M_CLK_DDR#2 DDR3_CK#2 DDR3_DQ45
@ M_CLK_DDR3 AC15 AE2 DDR_A_D46
<10> M_CLK_DDR3 DDR3_CK3 DDR3_DQ46
<12> DMI_RXP2 C961 1 2 DMI_RXP2_C @ M_CLK_DDR#3 AD15 AD4 DDR_A_D47
<10> M_CLK_DDR#3 DDR3_CK#3 DDR3_DQ47
0.1U_0402_10V6K AD7 DDR_A_D48
<10> DRAMRST# DDR3_DQ48
@ R878 AD6 DDR_A_D49
C963 1 DMI_RXN2_C DDR3_DQ49 DDR_A_D50
<12> DMI_RXN2 2 +1.5V 1 2 AK25 DDR3_DRAMRST# DDR3_DQ50 AA6
0.1U_0402_10V6K AB5 DDR_A_D51
10K_0402_5% DDR_VREF DDR3_DQ51 DDR_A_D52
AJ27 DDR3_VREF DDR3_DQ52 AE8
<12> DMI_RXP3 C964 1 2 DMI_RXP3_C AL28 AE5 DDR_A_D53
0.1U_0402_10V6K R883 0_0402_5% DDR3_VREF_NCTF DDR3_DQ53 DDR_A_D54
DDR3_DQ54 AB9
<9> CLK_CPU_MPLL_C 1 2 CLK_CPU_MPLL AC19 DDR3_REFP DDR3_DQ55 AA8 DDR_A_D55
<12> DMI_RXN3 C958 1 2 DMI_RXN3_C <9> CLK_CPU_MPLL#_C 1 2 CLK_CPU_MPLL# AB19 AB2 DDR_A_D56
0.1U_0402_10V6K R892 0_0402_5% DDR3_REFN DDR3_DQ56 DDR_A_D57
DDR3_DQ57 AB4
0_0402_5% W4 DDR_A_D58
R881 1 SMPWROK DDR3_DQ58 DDR_A_D59
<32> SM_PWROK 2 AA5 DDR3_DRAM_PWROK DDR3_DQ59 V3
DRAM_VR_PWRGD W7 AC2 DDR_A_D60
<7> DRAM_VR_PWRGD DDR3_VCCA_PWROK DDR3_DQ60
AB3 DDR_A_D61
DDR_ODTPU DDR3_DQ61 DDR_A_D62
AJ26 DDR3_ODTPU DDR3_DQ62 Y2
+1.5V DDR_CMDPU AJ25 W1 DDR_A_D63
DDR_DQPU DDR3_CMDPU DDR3_DQ63
AK27 DDR3_DQPU
AA30 DDR_A_DQS0
DDR3_DQS0
1
AB11 AB24 DDR_A_DQS1
R500 RSVD_TP_AB11 DDR3_DQS1 DDR_A_DQS2
AB13 RSVD_TP_AB13 DDR3_DQS2 AF30
AF19 AE22 DDR_A_DQS3
B 1K_0402_1% RSVD_TP_AF19 DDR3_DQS3 DDR_A_DQS4 B
AG19 RSVD_TP_AG19 DDR3_DQS4 AG10
AF4 DDR_A_DQS5
2
DDR_VREF DDR3_DQS5 DDR_A_DQS6
DDR3 AB6
XDP Reserve +1.05VS DDR3_DQS6
DDR3_DQS7 Y3 DDR_A_DQS7
1
1
R504 C953 DDR_A_DM0 Y28 AA31 DDR_A_DQS#0
XDP_TDI R495 DDR_A_DM1 DDR3_DM0 DDR3_DQS#0 DDR_A_DQS#1
<7> XDP_TDI 1 2 AB26 DDR3_DM1 DDR3_DQS#1 AB25
51_0402_5% Reserve PM_SLP_S4# to turn on DRAM_PWROK 1K_0402_1% 0.1U_0402_16V4Z DDR_A_DM2 AE30 AF29 DDR_A_DQS#2
XDP_TMS R496 2 DDR_A_DM3 DDR3_DM2 DDR3_DQS#2 DDR_A_DQS#3
<7> XDP_TMS 1 2 AB21 AF22
2
51_0402_5% DDR_A_DM4 DDR3_DM3 DDR3_DQS#3 DDR_A_DQS#4
AG11 DDR3_DM4 DDR3_DQS#4 AF10
<7> XDP_TDO XDP_TDO R499 1 2 DDR_A_DM5 AG2 AF3 DDR_A_DQS#5
51_0402_5% DDR_A_DM6 DDR3_DM5 DDR3_DQS#5 DDR_A_DQS#6
AB8 DDR3_DM6 DDR3_DQS#6 AB7
DDR_A_DM7 AA3 AA2 DDR_A_DQS#7
DDR3_DM7 DDR3_DQS#7
CDV_22MM_REV1P10
2 OF 6 ?
<7> XDP_TRST# XDP_TRST# R502 1 2 DDR_DQPU
R966 @ 0_0402_5%
51_0402_5%
XDP_TCK R505 1 2 <7> XDP_DBREST# 1 2
<7> XDP_TCK
1
33.2_0402_1%
51_0402_5% 1
R967 0_0402_5% @
R893
1 2 C952 0.01U_0402_16V7K
<13> PCH_POK
+5VALW +1.5V 2 R553 DDR_CMDPU
2
DRAM_VR_PWRGD 1 2 22.6_0402_1%
R968 12.1K_0402_1%
2
R503
R969 1 2DDR_ODTPU
10K_0402_5%
270_0402_1%
1
A A
1 1 1 1
C1050 C1065
C203 C204
68P_0402_50V8J 0.1U_0402_16V4Z 68P_0402_50V8J 0.1U_0402_16V4Z
2 2 2 2

SCHEAMTIC MB A6856
2010.07.12 RF request DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019CG A
5 4 3 2 1
5 4 3 2 1
R894 1 2 1M_0402_5%
H_FERR#_CPU 1 2 H_FERR#
H_FERR# <11>
Y3 R895 0_0402_5%
27MHZ_18PF_X3S027000FI1H-X U1D ?
H_A20M#_C 1 2 H_A20M#
CEDARVIEW H_A20M# <11>
CPU_DREFCLK_C 1 3 CPU_DREFCLK#_C R896 0_0402_5%
2 4
1 1 REV = 1.10
U1C ? C1076 C1077
18P_0402_50V8J 18P_0402_50V8J L26 B18 H_SMI#
2 2 RSVD_L26 SMI# H_SMI# <11>
CEDARVIEW L27 C22 H_NMI
STRAP_L27 NMI/LINT10 H_NMI <11>
D D14 K28 C18 H_A20M#_C D
REV = 1.10 CRT_HSYNC STRAP_K28 RSVD_C18 H_STPCLK#
CRT_VSYNC C14 K25 RSVD_K25 STPCLK# D22 H_STPCLK# <11>
J28 RSVD_J28
H25 H_RSVD_K26 K26
<15> HDMICLK_C DDI0_DDC_SCL RSVD_K26
J22 B12 K27
ICH
<15> HDMIDAT_C DDI0_DDC_SDA CRT_RED RSVD_K27
CRT_GREEN B11 H27 RSVD_H27
C8 DDI0_AUXP CRT_BLUE C11 K30 RSVD_K30
B8 DDI0_AUXN L29 RSVD_L29
D12 L30 C21 H_DPRSTP#
DDI
CRT_IRTN RSVD_L30 DPRSTP# H_DPRSTP# <13>
VGA
<15> HPD_C H22 DDI0_HPD CRT_IREF A13 K29 RSVD_K29 DPLSLP# B21 H_DPSLP# H_DPSLP# <13>
J31 RSVD_J31 CPUSLP# B22 H_CPUSLP# H_CPUSLP# <11>
HDMI_TXD2+ G2 E29 +3VS H30
<15> HDMI_TXD2+ DDI0_TXP0 CRT_DDC_DATA RSVD_H30
HDMI_TXD2- G3 E27 A23 H_INIT#
<15> HDMI_TXD2- DDI0_TXN0 CRT_DDC_CLK INIT# H_INIT# <11>
HDMI_TXD1+ F3 D20 H_INTR
<15> HDMI_TXD1+ DDI0_TXP1 INTR/LINT00 H_INTR <11>
HDMI_TXD1- F2 F17 CPU_SSCDREFCLK
<15> HDMI_TXD1- DDI0_TXN1 DPL_REFSSCCLKP CPU_SSCDREFCLK <9>
HDMI_TXD0+ D4 E17 CPU_SSCDREFCLK# K24 B20 H_THERMTRIP# H_THERMTRIP# <11>
<15> HDMI_TXD0+ DDI0_TXP2 DPL_REFSSCCLKN CPU_SSCDREFCLK# <9> HV_GPIO_RCOMP THERMTRIP#
HDMI_TXD0- @ R897
2.2K_0402_5%
2.2K_0402_5%
<15> HDMI_TXD0- C3 DDI0_TXN2 K23 MV_GPIO_RCOMP RSVD_L11 L11
HDMI_CLK0+ B7 B9 CPU_DREFCLK_C 1 2
<15> HDMI_CLK0+ DDI0_TXP3 DPL_REFCLKP CPU_DREFCLK <9>
R900
HDMI_CLK0- A7 A9 CPU_DREFCLK#_C 1 20_0402_5% Close to CPU
<15> HDMI_CLK0- DDI0_TXN3 DPL_REFCLKN CPU_DREFCLK# <9>
1
@ R898 0_0402_5%
49.9_0402_1%
49.9_0402_1%
R899
R902
H15 RSVD_TP_H15 PBE# C20 H_FERR#_CPU
R901
J15 R958 0_0402_5%
RSVD_TP_J15
F28 LVDS_VTRL_CLK A19 H_PROCHOT# 1 2 VR_HOT VR_HOT <34>
1
LVDS_CTRL_CLK PROCHOT#
F25 E24 LVDS_VTRL_DATA D23 H_PWRGD H_PWRGD <13>
2
DDI1_DDC_SCL LVDS_CTRL_DATA PWRGOOD PLTRST#
G27 DDI1_DDC_SDA RESET# G30 PLTRST# <13,17,22>
LVDS_DDC_CLK G24 LCD_EDID_CLK <16> DBR# E30 XDP_DBREST# XDP_DBREST# <6>
D10 DDI1_AUXP LVDS_DDC_DATA H24 LCD_EDID_DATA <16>
C10 DDI1_AUXN
LVDS_IBG E10 L_IBG R509
PRDY# H29 XDP_PRDY#
C BREF_1.5V D26 F10 2.37K_0402_1% G29 XDP_PREQ# C
DDI1_HPD LVDS_VBG PREQ#
1U_0402_6.3V6K
1 E11 DDI1_TXP0 LVDS_VREFH H2 R509 be placed U1.R22 HPLL_REFCLK_P J19 CLK_CPU_HPLCLK CLK_CPU_HPLCLK <9>
C1120
F11 DDI1_TXN0 LVDS_VREFL H3 HPLL_REFCLK K19 CLK_CPU_HPLCLK# CLK_CPU_HPLCLK# <9>

J11 DDI1_TXP1
+1.5VS
CPU
H11 G10 E19
LVDS
2 DDI1_TXN1 LVDS_TXP0 LCD_TXOUT0+ <16> RSVD_E19
F13 DDI1_TXP2 LVDS_TXN0 H10 LCD_TXOUT0- <16> RSVD_F19 F19
E13 DDI1_TXN2 LVDS_TXP1 F8 LCD_TXOUT1+ <16>
J13 DDI1_TXP3 LVDS_TXN1 E8 LCD_TXOUT1- <16> Close to CPU
2
K13 DDI1_TXN3 LVDS_TXP2 H7 LCD_TXOUT2+ <16>

R903 H8 LCD_TXOUT2- <16>
LVDS_TXN2 0_0402_5% R959 XDP_TCK_R C25 SVID_ALERT#
10_0402_5% J17 RSVD_TP_J17 LVDS_TXP3 G5 <6> XDP_TCK TCLK SVID_ALERT# B16 SVID_ALERT# <34>
H17 G6 0_0402_5% R960 XDP_TDI_R C24 D18 SVID_CLK
RSVD_TP_H17 LVDS_TXN3 <6> XDP_TDI TDI SVID_CLK SVID_CLK <34>
0_0402_5% R961 XDP_TDO_R B25 C16 SVID_DATA
<6> XDP_TDO SVID_DATA <34>
1
BREF_1.5V 0_0402_5% R962 XDP_TMS_R D24 TDO SVID_DATA

E15 BREF1P5V LVDS_CLKP H4 LCD_TXCLK+ <16> <6> XDP_TMS TMS
1 2 BREFREXT F15 J4 0_0402_5% R963 XDP_TRST#_R B24
BREFREXT LVDS_CLKN LCD_TXCLK- <16> <6> XDP_TRST# TRST#
R904 7.5K_0402_1%
HDA_BITCLK_CPU H21 R5
IHDA
<13> HDA_BITCLK_CPU AZIL_BCLK RSVD_R5

HDA_SYNC_CPU F22 G22 R6
<13> HDA_SYNC_CPU AZIL_SYNC PANEL_BKLTCTL GMCH_INVT_PWM <16> RSVD_R6
E25 ENBKL W25
PANEL_BKLTEN ENBKL <24> RSVD_W25
33_0402_5%1 R905 2HDA_SDIN1_CPU E22 F29 W26 K21
<13> HDA_SDIN1 AZIL_SDI PANEL_VDDEN GMCH_ENVDD <16> RSVD_W26 RSVD_K21
HDA_SDOUT_CPU F21 N24 L22
<13> HDA_SDOUT_CPU AZIL_SDO RSVD_N24 RSVD_L22
N25 RSVD_N25 RSVD_L24 L24
HDA_RST#_CPU E21
<13> HDA_RST#_CPU AZIL_RST# 3 OF 6 ENBKL R517
100K_0402_5%
CDV_22MM_REV1P10
To be placed <500 mils to U1 ball
B ? B
4 OF 6
CDV_22MM_REV1P10
?
H_DPRSTP# C954 1 @2 220P_0402_50V7K
JXDP1
XDP_PREQ# 1 CONN@ H_DPSLP# C955 1 @2 220P_0402_50V7K +1.8VS
XDP_PRDY# 1
2 2
3 H_PWRGD C956 1 @2 220P_0402_50V7K
3 XDP_PREQ# R501
T68 4 4 1 2
5 H_A20M# C957 1 @2 220P_0402_50V7K 51_0402_5%
T67 5
6 XDP_PRDY# R906 1 2
6 51_0402_5%
T69 7 7
T70 8 8
9 H_INIT# C959 1 2 220P_0402_50V7K +1.05VS
DRAM_VR_PWRGD R976 2 9
<6> DRAM_VR_PWRGD 1 0_0402_5% 10 10
H_PWRGD R964 2 1 0_0402_5% PWRGD_REQ 11 H_INTR C960 1 2 220P_0402_50V7K
H_RSVD_K26 R970 2 @ 11
1 0_0402_5% 12 12
SVID_ALERT# R907 2 1
13 H_FERR# C962 1 @2 220P_0402_50V7K 75_0402_5%
CPU_ITP 13 SVID_DATA R908 2
<9> CPU_ITP 14 14 1
<9> CPU_ITP# CPU_ITP# 15 H_NMI C965 1 @2 220P_0402_50V7K 110_0402_1%
15 H_PROCHOT# R511 2
+1.8VS 16 16 1
PLTRST# 2 R965 1 1K_0402_5% 17 H_SMI# C966 1 @2 220P_0402_50V7K 100_0402_5%
XDP_DBREST# 17
18 18
19 H_STPCLK# C967 1 @2 220P_0402_50V7K +3VS
XDP_TDO 19
20 20
XDP_TRST# 21
A 21 A
XDP_TDI 22 XDP_DBREST# 1K_0402_1% 2 1 R971
XDP_TMS 22 PWRGD_REQ 1K_0402_1% 2
23 23 1 R972
24 24
25 25
XDP_TCK 26 26
27
28
G1 Security Classification Compal Secret Data Compal Electronics, Inc.
G2
ACES_85201-2605
SCHEAMTIC MB A6856
Custom A
5 4 3 2 1
5 4 3 2 1
+1.05VS
?
723mA U1F
?
U1E
R525 R909
1 2 +VCCA_VCCD 1 2 +VCCDMPL CEDARVIEW A11 CEDARVIEW H19
+CPU_CORE VSS VSS
2.2U_0402_6.3V6M
0_0805_5% 0_0603_5% A16 VSS VSS H26
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 4234mA1U_0402_6.3V6K 4.7U_0603_6.3V6K A21 H28
1U_0402_6.3V6K VSS VSS
+VCCA_VCCD AA14 REV = 1.10 P18 4.7U_0603_6.3V6K A25 REV = 1.10 H6
VCCADDR_1 VCC_CPU_01 VSS VSS
C1078
1 1 1 1 AA16 VCCADDR_2 VCC_CPU_02 P19 AA1 VSS VSS J10
C971
C970
C972
C973
W16 VCCADDR_3 VCC_CPU_03 P21 1 1 1 1 1 1 1 AA10 VSS VSS J2
1 C974 C975 C976 C977 C988 C987 C996
W18 VCCADDR_4 VCC_CPU_04 P28 AA13 VSS VSS J21
@ P29 @ @ @ AA19 J30
@ 2 @ 2 2 2 +1.05VS_EAST VCC_CPU_05 VSS VSS
N30 VCCRAMXXX_1 VCC_CPU_06 P30 AA21 VSS VSS K11
2 2 2 2 2 2 2
N31 VCCRAMXXX_2 VCC_CPU_07 R22 AA23 VSS VSS K15
+VCCA_VCCD V4 R23 AA26 K3
VCCRAMXXX_3 VCC_CPU_08 4.7U_0603_6.3V6K VSS VSS
VCC_CPU_09 R24 1U_0402_6.3V6K 1U_0402_6.3V6K AA27 VSS VSS K7
+VCCA_VDDR W8 R25 AA29 K8
C973 1UF for VCCACKDDR_1 VCC_CPU_10 VSS VSS
W9 VCCACKDDR_2 VCC_CPU_11 R26 AA7 VSS VSS K9
CPU pin V4
DDR
D VCC_CPU_12 R27 AA9 VSS VSS L1 D
CPU
W11 VCCADLLDDR_1 VCC_CPU_13 T19 Please closed U1 ball AB15 VSS VSS L10
R526 W13 VCCADLLDDR_2 VCC_CPU_14 T21 AB17 VSS VSS L13
1 2 +1.05VS_EAST +1.05VS T29 AB23 L23
VCC_CPU_15 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
+VCCCK_DDR AJ6 T30 AB29 L25
0_0603_5% VCCCKDDR_1 VCC_CPU_16 VSS VSS
1 1 AK6 VCCCKDDR_2 VCC_CPU_17 T31 AC1 VSS VSS L31
+CPU_CORE
C1079
C1080
VCC_CPU_18 U22 AC10 VSS VSS L7

+VCC_SM AH14 U23 2 x 330uF(9mohm/2) AC11 M29
V_SM_1 VCC_CPU_19 VSS VSS
GND
330U_D2_2.5VY_R9M
AH19 V_SM_2 VCC_CPU_20 U24 AC13 VSS VSS M4
@ 2 2
1 AK23 V_SM_3 VCC_CPU_21 U25 1 1 AC22 VSS VSS N10
AK5 V_SM_4 VCC_CPU_22 U26 AC28 VSS VSS N14
+ + +
C1081
C1079 1UF for C1080 1UF for AL11 U27 C984 C985 AC4 N19
CPU pin N30,N31 CPU pin L19 V_SM_5 VCC_CPU_23 VSS VSS
AL16 V_SM_6 VCC_CPU_24 V18 AD19 VSS VSS N21
AL21 V19 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M AD21 N22
2 V_SM_7 VCC_CPU_25 +CPU_CORE 2 2 VSS VSS
R956 AG31 V_SM_8 VCC_CPU_26 V21 AD24 VSS VSS N23
1 2 +VCCA_VDDR V28 AD26 N26
VCC_CPU_27 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+VCCADP_1.05 B5 V29 AD5 N27

0_0603_5% VCCADP_1 VCC_CPU_28 VSS VSS
1 1 1 C6 VCCADP_2 VCC_CPU_29 V30 AD8 VSS VSS N28
C1082
C1083
C1084
D6 VCCADP_3 AE1 VSS VSS N4

+GFX_CORE
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
Close Chipset pin AE10 VSS VSS N7
+VCCADP0_SFR K17 1938mA 1 1 1 1 AE11 P14
2 2 2 VCCADP0_SFR VSS VSS
POWER
C989
C990
C991
C1085
@ +VCCADP1_SFR L18 N11 AE15 P16
VCCADP1_SFR VCC_GFX_01 VSS VSS
VCC_GFX_02 N13 AE17 VSS VSS P4
+1.05VS_EAST L19 P11 AE19 T14
+VCCAGPIO1.5V VCCAGPIO_LV VCC_GFX_03 2 2 2 2 VSS VSS
R910 L16 VCCAGPIO_REF VCC_GFX_04 P13 AE3 VSS VSS T18
1 2 +VCCADP_1.05 +VCCAGPIO1.8V N18 R10 AE31 T3
VCCAGPIO_DIO VCC_GFX_05 VSS VSS
1U_0402_6.3V6K
0_0603_5% VCC_GFX_06 R9 AF11 VSS VSS U5

1 +VCCAGPIO3.3V D30 T11 AF13 U6
VCCAGPIO_1 VCC_GFX_07 VSS VSS
C1086
D31 VCCAGPIO_2 VCC_GFX_08 T13 AF21 VSS VSS U9

VCC_GFX_09 U10 AF24 VSS VSS V2
R974 2 1 0_0402_5% B13 V11 AF28 W10
2 VCCADAC VCC_GFX_10 VSS VSS
VCC_GFX_11 V13 AF7 VSS VSS W14
+VCCALVDS H5 AG22 W19
+VCCDLVDS VCCALVDS +VCC_DMI VSS VSS
J1 B4 AG5 W2
DMI
VCCDLVDS VCCADMI_1 +CPU_CORE VSS VSS
1 R531 2 +VCC_DMI
VCCADMI_2 C5 AH26 VSS VSS W21
1U_0402_6.3V6K
VCCADMI_3 A4 AH28 VSS VSS W22

0_0603_5% 1 R975 2 1 0_0402_5% L21 K4 +VCCADMI_1.5VS AH6 W23
VCCDIO VCCADMI_PLLSFR VSS VSS
1
C994
C AH9 VSS VSS W24 C

+VCCAZILAON B29 V16 +VCCA_VCCD R532 AJ2 W27
VCCAZILAON_1 VCCFHV_1 VSS VSS
A30 VCCAZILAON_2 VCCFHV_2 T16 AJ3 VSS VSS W30
2 100_0402_5% AK13 VSS VSS W5
+VCCSFRMPL AA18 V14 AK19 W6
2
+VCCDMPL VCCSFRMPL VCCFHV_3 VSS VSS
PLL
AA11 VCCDMPL AK28 VSS VSS Y4
VCC_CPUSENSE M28 VCCSENSE VCCSENSE <34> AK9 VSS
+VCCPLLCPU0 B27 M30 VSSSENSE AL13
+1.5V VCCPLLCPU0 VSS_CPUSENSE VSSSENSE <34> VSS
+VCCPLLCPU1 C29 AL19 A27
VCCPLLCPU1_1 VCC_GFXSENSE VSS VSS
B30 VCCPLLCPU1_2 VCC_GFXSENSE U8 AL23 VSS VSS A29
1
1 2 +VCCCK_DDR U7 VSS_GFXSENSE +1.8VS AL25 A3
+VCCAHPLL VSS_GFXSENSE R911 R533 VSS VSS
B26 VCCAHPLL AL7 VSS VSS AH1
22U_0805_6.3V6M
1U_0402_6.3V6K
R530 N16 +VCCATHRM 1 2 B10 AJ1

0_0603_5% VCCTHRM_1 100_0402_5% VSS VSS
1 1 VCCTHRM_2 K2 B14 VSS VSS AJ31
10U_0805_10V4Z
C992
C993
1U_0402_6.3V6K
0_0603_5% B19 AK1
2
VSS VSS
1 1 B23 VSS VSS AK2
C1090
C1089
C12 VSS VSS AK30
2 2
C26 VSS VSS AK31
@ C30 AL2
2 +GFX_CORE 2 VSS VSS
Please closed U1 ball C7 VSS VSS AL29
D19 VSS VSS AL3
D28 VSS VSS AL30
1
D8 VSS VSS AL5
+3VS_PRIME R912 D9 B2
VSS VSS
E2 VSS VSS B3
100_0402_5% E5 B31
R913 VSS VSS
1 2 +VCCAGPIO3.3V E7 C1
2
+1.5V VSS VSS
R527 0_0603_5% F24 VSS VSS C2
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M F4 C31
R914 VSS VSS
1 2 +VCC_SM 1 2 +VCCAZILAON VCC_GFXSENSE G1 E1
VCC_GFXSENSE <34> VSS VSS
VSS_GFXSENSE G11
0_0603_5% VSS_GFXSENSE <34> VSS
0_1206_5% 2 2 2 2 2 2 G13 VSS
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
G15 VSS VSS_CDVDET L14
1
C1092
C1093
C979 C980 C981 C982 G17 D13

R915 VSS VSSA_CRTDAC
G19 VSS
1 1 1 1 1 1
G21 VSS
5 OF 6 100_0402_5% G31
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M VSS
B CDV_22MM_REV1P10 G8 B
2
VSS
H13 VSS
+1.8VS ?
+1.05VS 6 OF 6
CDV_22MM_REV1P10
?
R916 R917 +GFX_CORE
1 2 +VCCDLVDS 1 2 +VCCPLLCPU0
+1.5VS
0_0603_5% 0_0603_5%
1U_0402_6.3V6K
10U_0805_10V4Z 10U_0805_10V4Z
1 1 2 +VCCALVDS +VCCA_VCCD 1 2
330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
C983 R918 0_0402_5% 1 1 C159 22P_0402_50V8J
R919
+VCCADMI_1.5VS
4.7U_0603_6.3V6K
1 2 RF@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C1094
C1095
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K 1 1 1
0_0603_5% 2
C1006
C1007
C1008
C1009
1 C986 1 1 1 1 1 +VCCCK_DDR 1 2
2 2 + +
C1097
C1005
C1004
C1096
C150 22P_0402_50V8J
0.1uH use 2 R920 +GFX_CORE RF@
1 2 +VCCPLLCPU1 @ @ @
2 0 ohm replace 2 2 2 2 2 2 2
1U_0402_6.3V6K
0_0603_5%
R921 1 1 1 2
1U_0402_6.3V6K
1 2 +VCCAGPIO1.8V C153 22P_0402_50V8J

R922 +CPU_CORE
C1098
C1099
1 2 +VCCAGPIO1.5V 1 RF@
0_0603_5%
C1100
0_0603_5% 2 2 Close Chipset pin

2 1 2
C1101 C156 22P_0402_50V8J
@ 2
R923 RF@
0.1U_0402_10V6K 1 2 +VCCAHPLL
1
0_0603_5%
1U_0402_6.3V6K
10U_0805_10V4Z
1 1 2010.07.12 RF request
C1102
C1103
2 2
+1.5VS +1.5VS +1.5VS

Reserve SFR option
A for cedar view A
2
R924 R925 R926

0_0603_5% 0_0603_5% 0_0603_5%
1
@ @ @
R927 R928 R929
+1.05VS 1 2 +VCCADP0_SFR +1.05VS 1 2 +VCCADP1_SFR +1.05VS 1 2 +VCCSFRMPL
0_0603_5% 0_0603_5%
4.7U_0603_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z
1U_0402_6.3V6K
0_0603_5% 1 1 1 1 1 1
C1104
C1105
C1106
C1107
C1109

C1108
@ 2010/06/27 2011/6/27 Title

@ 2 2 @ 2 2 2 2 Issued Date Deciphered Date
SCHEAMTIC MB A6856
Custom A
5 4 3 2 1
5 4 3 2 1
+3VM_CK505 2010.03.23 Change R81 from bead to 0 ohm

FSC FSB FSA CPU SRC PCI REF DOT_96 USB R81 250 mA CPU_SSCDREFCLK CPU_SSCDREFCLK#
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1 2
1 1 1 1 1 1
0_0603_5% C126 C127 C128 C129 C133
0 0 0 266 100 33.3 14.318 96.0 48.0 C940 @ C941 @
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J 33P_0402_50V8K 33P_0402_50V8K
2 2 2 2 2 2
0 0 1 133 100 33.3 14.318 96.0 48.0
+1.05VM_CK505 7/13 For RF request 7/13 Add 33pFfor RF request
R82
0 1 0 200 100 33.3 14.318 96.0 48.0 80 mA 7/21 Reserve 33pFfor RF request
+1.05VS 1 2
FBMH1608HM601-T_0603 1 1 1 1 1 1 +3VS
0 1 1 166 100 33.3 14.318 96.0 48.0 C134 C135 C136 C137 C138 C139 C141
D D
7/13 For RF request 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J
2 2 2 2 2 2 R83 R84
1 0 0 333 100 33.3 14.318 96.0 48.0
2010.03.23 Change R477 from bead to 0 ohm 2.2K_0402_5% 2.2K_0402_5%
1 0 1 100 100 33.3 14.318 96.0 48.0 +1.5VM_CK505
8/27 Delete C93, C94, C95, C102 for low power CLK GEN Q1A
R477 2N7002DW-T/R7_SOT363-6
1 1 0 400 100 33.3 14.318 96.0 48.0 +1.5VS 1 2 <13> PCH_SMBDATA 6 1 CLK_SMBDATA
10U_0805_10V4Z
0_0603_5% 1
SA00003H610 (ICS :CS9LVRS387AKLFT MLF)
C942
1 1 1 LOW@
Reserved
2
+3VS
Low power CLK Gen.
5
2
7/13 For RF request NORMAL@
7/21 Delete C296, C297 for RF request
U4 7/13 Add 22pF to gnd and close to U3 for RF request CLK_SMBCLK
Normal Power Low Power RTM875N-397-GR
<13> PCH_SMBCLK 3 4
+3VM_CK505 +3VM_CK505 Q1B 2N7002DW-T/R7_SOT363-6
LOW@U4
LOW@ U4
7/21 Reserve 22pF to gnd and close to U3 for RF request
R477 @ Stuff NORMAL@ R478 9 CLK_SMBDATA
+3VM_1.5VM_R SDA CLK_SMBDATA <10,17>
R478 Stuff @ +1.5VM_CK505
1 2 55 VDD_SRC
10 CLK_SMBCLK SRC PORT LIST
0_0603_5% SCL CLK_SMBCLK <10,17>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R479 Stuff @ LOW@ R483
LOW@R483 1 1 1
6 VDD_REF
C943
C944
C945
R480 @ Stuff 1
0_0603_5%
2 12 VDD_PCI CPU_0 71 CLK_CPU_HPLCLK
CLK_CPU_HPLCLK <7> PORT DEVICE
CLK_CPU_HPLCLK#
R483 @ Stuff 2 2 2
72 VDD_CPU CPU_0# 70 CLK_CPU_HPLCLK# <7>
NORMAL@ R479
1 2 19 68 CLK_CPU_MPLL_C
SRC0 CPU_DREFCLK
+1.05VM_CK505 VDD_48 CPU_1 CLK_CPU_MPLL_C <6>
0_0603_5% 27 67 CLK_CPU_MPLL#_C
CLK_CPU_MPLL#_C <6>
SRC2 CPU_EXP
VDD_PLL3 CPU_1#
LOW@ R480
LOW@R480 +1.05VM_CK505
SRC3
+1.05VS +1.05VM_1.5VM_R CPU_SSCDREFCLK
C +1.5VM_CK505 1 2 66 VDD_CPU_IO SRC_0/DOT_96 24 CPU_SSCDREFCLK <7> SRC4 PCIE_SATA C
47P_0402_50V8J
0.1U_0402_16V4Z
0_0603_5% CPU_SSCDREFCLK#
1 31 VDD_PLL3_IO SRC_0#/DOT_96# 25 CPU_SSCDREFCLK# <7> SRC6 PCIE_WLAN
1
C946
C947
@
R481
470_0402_5%
62 VDD_SRC_IO
28 CPU_DREFCLK
CPU_DREFCLK <7>
SRC7
R482 2 LCDCLK/27M
2.2K_0402_5%
7/13 For RF request 52 VDD_SRC_IO CPU_DREFCLK# SRC8
29 CPU_DREFCLK# <7>
2
FSA 2 LCDCLK#/27M_SS
1 23 VDD_IO SRC9 PCIE_LAN
8/24 Change net name to FSB for U3.2 CLK_CPU_EXP
38 VDD_SRC_IO SRC_2 32 CLK_CPU_EXP <6> SRC10 PCIE_PCH
7/13 Add 33pF to GND for RF request 10_0402_5% 1 2 R92 CLK_CPU_EXP#
SRC_2# 33 CLK_CPU_EXP# <6> SRC11 PCIE_WWAN
1
<23> CLK_48M_CR
@ R484 7/21 Reserve 33pF to GND for RF request 10_0402_5% 1 2 R91 FSA 20
<12> CLK_PCH_48M USB_0/FS_A
SRC_3 35
1K_0402_5% 8/27 C303, C324, C325, C326, C327 to GND for RF request 1 2 FSB 2
C143 22P_0402_50V8J FS_B/TEST_MODE
36
2
33_0402_5% 1 SRC_3#
2 R93 FSC 7 REF_0/FS_C/TEST_
<13> CLK_PCH_14M
1 2 8 39 CLK_PCIE_SATA
REF_1 SRC_4 CLK_PCIE_SATA <11> +3VS
+3VS R65 1 2 H_STP_CPU#_R C868 22P_0402_50V8J
10K_0402_5% 40 CLK_PCIE_SATA#
SRC_4# CLK_PCIE_SATA# <11>
VGATE 1
+1.05VS <13,24,27,33,34> VGATE CKPWRGD/PD#
7/22 Add R241 pull up to +3VS for RF Intel request 11 57 CLK_PCIE_WLAN WLAN_CLKREQ# R99 2 1 10K_0402_5%
NC SRC_6 CLK_PCIE_WLAN <17>
WWAN_CLKREQ# R100 2 1 10K_0402_5%
1
56 CLK_PCIE_WLAN# LAN_CLKREQ# R101 2 1 10K_0402_5%

SRC_6# CLK_PCIE_WLAN# <17>
R485@
470_0402_5% R432 1 2 0_0402_5% H_STP_CPU#_R 53
R486 <13> H_STP_CPU# CPU_STOP#
SRC_7 61
1K_0402_5% R427 1 2 0_0402_5% H_STP_PCI#_R 54 CLK_PCIE_PCH 1 2
2
FSB <13> H_STP_PCI# PCI_STOP# @ C1067 56P_0402_50V8

2 1 SRC_7# 60
CLK_PCIE_PCH# 1 2
CLK_XTAL_IN 5 @ C1066 56P_0402_50V8
XTAL_IN CPU_ITP
B
SRC_8/CPU_ITP 64 CPU_ITP <7> B
CLK_XTAL_OUT 4 XTAL_OUT
1
R608 1 2 H_STP_PCI#_R 1 2 63 CPU_ITP#

R488
+3VS
10K_0402_5% C144 22P_0402_50V8J SRC_8#/CPU_ITP# CPU_ITP# <7> 2010.07.12 RF request
0_0402_5% 33_0402_5% 1 2 R103 CLK_PCI_DDR_R 13 CLK_PCIE_LAN
<17> CLK_PCI_DDR PCI_1 SRC_9 44 CLK_PCIE_LAN <22>
REQ PORT LIST
2
PCI2_TME 14 45 CLK_PCIE_LAN#
PCI_2 SRC_9# CLK_PCIE_LAN# <22>
1 2
C145 22P_0402_50V8J 15 PCI_3
50 CLK_PCIE_PCH
CLK_PCIE_PCH <12>
PORT DEVICE
+1.05VS 33_0402_5% 1 PCI4_SEL SRC_10
8/14 Add R250 pull up for Intel request <24> CLK_PCI_LPC 2 R107 16 PCI_4/SEL_LCDCL
33_0402_5% 1 2 R108 ITP_EN 17
SRC_10# 51 CLK_PCIE_PCH#
CLK_PCIE_PCH# <12> REQ_3#
<11> CLK_PCI_PCH PCIF_5/ITP_EN
1
R489 7/13 Add 33pF to GND for RF request 1 2 48 CLK_PCIE_WWAN

CLK_PCIE_WWAN <17>
REQ_4#
470_0402_5% C146 22P_0402_50V8J SRC_11
R490 18 47 CLK_PCIE_WWAN#
CLK_PCIE_WWAN# <17>
REQ_6# PEIC_WLAN
10K_0402_5% VSS_PCI SRC_11#
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# REQ_7#
2
FSC 2 1 3 VSS_REF
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# REQ_9# PCIE_LAN
22 37
Pin28/29 : LCDCLK / LCDCLK# VSS_48 CLKREQ_3#
1 = Pin24/25 : SRC_0 / SRC_0# 26 41
REQ_10#
VSS_IO CLKREQ_4#
1
@ R491 Pin28/29 : 27M/27M_SS 69 58 WLAN_CLKREQ#

WLAN_CLKREQ# <17>
REQ_11# PEIC_WWAN
VSS_CPU CLKREQ_6#
For PCI2_TME:0=Overclocking of CPU and SRC allowed REQ_A#
0_0402_5% 30 65
(ICS only) 1=Overclocking of CPU and SRC NOT allowed VSS_PLL3 CLKREQ_7#
2
34 43 LAN_CLKREQ#
VSS_SRC CLKREQ_9# LAN_CLKREQ# <22>
+3VS +3VS +3VS 59 49
VSS_SRC SLKREQ_10#
7/22 Add R242 to R253 for Intel request WWAN_CLKREQ#
42 VSS_SRC CLKREQ_11# 46 WWAN_CLKREQ# <17>
2
A A
R119 R118 R112 73 21
CLK_XTAL_IN VSS USB_1/CLKREQ_A#
C147 22P_0402_50V8J 10K_0402_5% 10K_0402_5% 10K_0402_5% 7/21 Change WWAN_CLKREQ# from REQ4 to REQ11
1
ICS9LVRS387AKLFT MLF
1
Y1
14.31818MHZ 20PF 7A14300003 ITP_EN PCI4_SEL PCI2_TME
2
CLK_XTAL_OUT
2
C148 22P_0402_50V8J @
R113@ R114@ R115 Security Classification Compal Secret Data Compal Electronics, Inc.
Routing the trace at least 10mil Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title
10K_0402_5% 10K_0402_5% 10K_0402_5%
SCHEAMTIC MB A6856
1
A
2010.03.09 Change Y1 to 5 x3.2 size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019CG
5 4 3 2 1
5 4 3 2 1
+DIMM_VREF +1.5V +1.5V

3A@1.5V
<6> DDR_A_DQS#[0..7]
<6> DDR_A_D[0..63] JDDR1

+1.5V +DIMM_VREF 1 2
VREF_DQ VSS1 DDR_A_D2
<6> DDR_A_DM[0..7] 3 VSS2 DQ4 4
DDR_A_D4 5 6 DDR_A_D7
DDR_A_D5 DQ0 DQ5
<6> DDR_A_DQS[0..7] Layout Note: 7 DQ1 VSS3 8
0.1U_0402_16V4Z
9 10 DDR_A_DQS#0
Place near JDDR1 DDR_A_DM0 VSS4 DQS#0 DDR_A_DQS0
<6> DDR_A_MA[0..14] 1 11 DM0 DQS0 12
1
C117
1K_0402_1%
13 VSS5 VSS6 14
DQ2 DQ6
R74
2 DQ3 DQ7
D R879 19 VSS7 VSS8 20 D
2
DDR_A_D9 DQ8 DQ12 DDR_A_D13
1 2 +DIMM_VREF 23 DQ9 DQ13 24
0_0402_5% 25 26
VSS9 VSS10
1
1K_0402_1%
DDR_A_DQS#1 27 28 DDR_A_DM1
+1.5V DDR_A_DQS1 DQS#1 DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# <6>
R75
31 VSS11 VSS12 32
35 36
2
DQ11 DQ15
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
37 VSS13 VSS14 38
22U_0805_6.3V6M
22U_0805_6.3V6M
2 2 2 2 DDR_A_D20 39 40 DDR_A_D16
DQ16 DQ20
C101
C102
DQ17 DQ21
C99
C100
43 VSS15 VSS16 44
1 1 1 1 DDR_A_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
+DIMM_VREF 49 50 DDR_A_D19
+1.5V DDR_A_D18 VSS18 DQ22 DDR_A_D23
0.1U_0402_16V4Z
20mils DDR_A_D22
51 DQ18 DQ23 52
53 DQ19 VSS19 54
55 56 DDR_A_D28
DDR_A_D24 VSS20 DQ28 DDR_A_D29
1 1 1 57 DQ24 DQ29 58
C115 C104 C105 DDR_A_D25 59 60
DQ25 VSS21
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@ DDR_A_DQS#3
330U_D2_2.5VY_R9M
1 61 VSS22 DQS#3 62
1 1 1 1 1 1 2.2U_0603_6.3V6K DDR_A_DM3 63 64 DDR_A_DQS3
+ 2 2 2 DM3 DQS3
65 VSS23 VSS24 66
C106
C107
C108
C109
C110
CZ03
CZ04
69 DQ27 DQ31 70
2 2 2 2 2 2 @ 2 0.1U_0402_16V4Z 71 VSS25 VSS26 72
+1.5V
<6> DDR_CKE2 DDR_CKE2 73 74 DDR_CKE3
CKE0 CKE1 DDR_CKE3 <6>
75 VDD1 VDD2 76
2010.03.27 Add CZ03,CZ04 for ESD 77 NC1 A15 78
<6> DDR_A_BS2 DDR_A_BS2 79 80 DDR_A_MA14
C BA2 A14
0.1U_0402_16V4Z
C
81 VDD3 VDD4 82
1
1K_0402_1%
1 DDR_A_MA12 83 84 DDR_A_MA11
A12/BC# A11
C118
R77
DDR_A_MA9 85 86 DDR_A_MA7
+V_DDR_CPU_REF A9 A7
87 VDD5 VDD6 88
DDR_A_MA8 89 90 DDR_A_MA6
2 DDR_A_MA5 A8 A6 DDR_A_MA4
Layout Note: 91 92
2
A5 A4
93 VDD7 VDD8 94
Place one cap close to every 2 pullup DDR_A_MA3 95 96 DDR_A_MA2
A3 A2
1
1K_0402_1%
resistors terminated to +0.75VS DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 VDD9 VDD10 100
R76
<6> M_CLK_DDR2 M_CLK_DDR2 101 102 M_CLK_DDR3
CK0 CK1 M_CLK_DDR3 <6>
<6> M_CLK_DDR#2 M_CLK_DDR#2 103 104 M_CLK_DDR#3
CK0# CK1# M_CLK_DDR#3 <6>
105 106
2
DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
107 A10/AP BA1 108 DDR_A_BS1 <6>
<6> DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS#
BA0 RAS# DDR_A_RAS# <6>
111 VDD13 VDD14 112
<6> DDR_A_WE# DDR_A_WE# 113 114 DDR_CS2#
WE# S0# DDR_CS2# <6>
+0.75VS <6> DDR_A_CAS# DDR_A_CAS# 115 116 M_ODT2
CAS# ODT0 M_ODT2 <6>
117 VDD15 VDD16 118
DDR_A_MA13 M_ODT3 +V_DDR_CPU_REF
119 A13 ODT1 120 M_ODT3 <6>+VREF_CA
<6> DDR_CS3# DDR_CS3# 121 122
S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CA 1 2
NCTEST VREF_CA R877 0_0402_5%
127 VSS27 VSS28 128
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D37 129 130 DDR_A_D36 1 1 1
DQ32 DQ36
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 DDR_A_D32 131 132 DDR_A_D33

DQ33 DQ37
C213
C215
C214
133 VSS29 VSS30 134
C111
C112
C113
C114

DDR_A_DQS4 DQS#4 DM4 2 @ 2 2
137 DQS4 VSS31 138
2 2 2 2 DDR_A_D38
139 VSS32 DQ38 140
DDR_A_D34 141 142 DDR_A_D39
DDR_A_D35 DQ34 DQ39
143 DQ35 VSS33 144
145 146 DDR_A_D47
B DDR_A_D41 VSS34 DQ44 DDR_A_D45 B
147 DQ40 DQ45 148
DDR_A_D44 149 150
DQ41 VSS35 DDR_A_DQS#5
151 VSS36 DQS#5 152
DDR_A_DM5 153 154 DDR_A_DQS5
DM5 DQS5
155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46
159 DQ43 DQ47 160
161 VSS39 VSS40 162
DDR_A_D49 163 164 DDR_A_D48
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDR_A_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_A_D50
DDR_A_D54 VSS44 DQ54 DDR_A_D51
175 DQ50 DQ55 176
DDR_A_D55 177 178
DQ51 VSS45 DDR_A_D56
179 VSS46 DQ60 180
DDR_A_D60 181 182 DDR_A_D61 +3VS
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_A_DQS#7
VSS48 DQS#7
1
DDR_A_DM7 187 188 DDR_A_DQS7
DM7 DQS7 R513
189 VSS49 VSS50 190
DDR_A_D58 191 192 DDR_A_D59 10K_0402_5%
193 DQ59 DQ63 194
1 R207 2 195 196
2
10K_0402_5% VSS51 VSS52 PM_EXTTS#0
197 SA0 EVENT# 198
199 200 CLK_SMBDATA
+3VS VDDSPD SDA CLK_SMBDATA <9,17>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
201 202 CLK_SMBCLK

SA1 SCL CLK_SMBCLK <9,17>
1 1 1 203 VTT1 VTT2 204 +0.75VS
10K_0402_5%
C219
C220
R208 205 206 0.65A@0.75V

G1 G2
2 2 FOX_AS0A621-U4SG-7H
A +0.75VS A
2

SCHEAMTIC MB A6856
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019CG A
5 4 3 2 1
5 4 3 2 1
+3VS
U15A TGP
R539 1 2 8.2K_0402_5% RSVD01
A5 PAR AD0 B22
R540 1 2 8.2K_0402_5% RSVD02 PCI_DEVSEL# B15 D18
CLK_PCI_PCH DEVSEL# AD1
<9> CLK_PCI_PCH J12 PCICLK AD2 C17
PCI_RST# A23 C18
<24> PCI_RST# PCIRST# AD3
PCI_IRDY# B7 B17
+3VS IRDY# AD4
C22 PME# AD5 C19
1
100K_0402_5%
RP7 PCI_SERR# B11 B18 PCI_RST#
PCI_PIRQB# R541 PCI_STOP# SERR# AD6
D 1 8 F14 STOP# AD7 B19 D
2 7 PCI_PIRQF# PCI_PLOCK# A8 D16
PCI_PIRQC# PCI_TRDY# PLOCK# AD8 CLK_PCI_PCH
3 6 A10 TRDY# AD9 D15
PCI_PIRQA# PCI_PERR#
0.1U_0402_16V4Z
4 5 D10 A13
2
PERR# AD10
1
PCI_FRAME# A16 E14 1
8.2K_0804_8P4R_5% FRAME# AD11 R542 @
AD12 H14
C1015
For EC request. L14 @ 10_0402_5%
+3VS AD13
AD14 J14
RP8 2
A18 E10 1
2
PCI_PIRQE# GNT1# AD15 @
1 8 E16 GNT2# AD16 C11
2 7 PCI_PLOCK# E12 C1016
PCI_PIRQG# REQ1# AD17 8.2P_0402_50V8D
3 6 G16 B9
4 5 PCI_IRDY# REQ2# A20
REQ1# PCI AD18
B13
2
REQ2# AD19
AD20 L12
8.2K_0804_8P4R_5% B8
AD21
G14 GPIO48/STRAP1# AD22 A3
+3VS A2 B5
RP16 GPIO22 GPIO17/STRAP2# AD23
C15 GPIO22 AD24 A6
1 8 PCI_SERR# GPIO1 C9 G12
PCI_PERR# GPIO1 AD25
2 7 AD26 H12
3 6 PCI_TRDY# R543 R544 C8 For EMI, close to TigerPoint
GPIO1 10K_0402_5% 10K_0402_5% AD27
4 5 AD28 D9
@ @ PCI_PIRQA# B2 C7
8.2K_0804_8P4R_5% PCI_PIRQB# PIRQA# AD29
D7 PIRQB# AD30 C1
+3VS PCI_PIRQC# B3 B1
RP10 PCI_PIRQD# PIRQC# AD31
H10 PIRQD#
1 8 GPIO22 PCI_PIRQE# E8 +1.05VS
PCI_DEVSEL# PCI_PIRQF# PIRQE#/GPIO2
2 7 D6 PIRQF#/GPIO3
3 6 PCI_PIRQD# PCI_PIRQG# H8 H16
C PCI_PIRQH# PCI_PIRQH# PIRQG#/GPIO4 C/BE0# C
4 5 F8 PIRQH#/GPIO5 C/BE1# M15
1
C/BE2# C13
8.2K_0804_8P4R_5% D11 L16 R546
RSVD01 STRAP0# C/BE3# 60.4_0402_1%
K9 RSVD01
RSVD02 M13 RSVD02
+3VS 2
2
1
RP11 R545 H_FERR#
1 8 REQ2# @ 1K_0402_5% TIGERPOINT_ES1_BGA360 R546 closed TigerPoint within 1"
2 7 REQ1#
PCI_STOP# U15C TGP
3 6
1
4 5 PCI_FRAME#
R12 RSVD03 SATA0RXN AE6 SATA_IRX_C_DTX_N0 <19>
8.2K_0804_8P4R_5% AE20 AD6 +1.05VS
RSVD04 SATA0RXP SATA_IRX_C_DTX_P0 <19>
AD17 RSVD05 SATA0TXN AC7 SATA_ITX_DRX_N0 <19>
AC15 RSVD06 SATA0TXP AD7 SATA_ITX_DRX_P0 <19>
AD18 RSVD07 SATA1RXN AE8 T63 PAD
Y12 RSVD08 SATA1RXP AD8 T64 PAD
AA10 AD9 T65 PAD R930
RSVD09 SATA1TXN H_IGNNE#
AA12 RSVD10 SATA1TXP AC9 T66 PAD 1 2
Y10 1K_0402_5%
RSVD11
AD15 RSVD12
SATA
W10 RSVD13
V12 RSVD14
AE21 RSVD15
AE18 RSVD16
AD19 RSVD17
U12 RSVD18
SATA_CLKN AD4 CLK_PCIE_SATA# <9> Please closed Tiger point
AC17 AC4 CLK_PCIE_SATA <9> +3VS
B
AB13
RSVD19 SATA_CLKP PIN within 500 mils B
RSVD20
AC13 RSVD21 SATARBIAS# AD11 SATARBIAS R547 24.9_0402_1%
AB15 RSVD22 SATARBIAS AC11 R548
Y14 RSVD23 SATALED# AD25 SATALED# <26>
SATALED#
AB16 RSVD24 10K_0402_5%
AE24 RSVD25
AE23 R549
RSVD26 GATEA20
10K_0402_5%
AA14 U16 GATEA20 GATEA20 <24> R550
RSVD27 A20GATE H_A20M# SERIRQ
V14 RSVD28 A20M# Y20 H_A20M# <7> 1 2
Y21 H_CPUSLP# H_CPUSLP# <7>
CPUSLP# H_IGNNE# 8.2K_0402_5%
IGNNE# Y18
AD16 AD21 +1.05VS
RSVD29 INIT3_3V# H_INIT#
AB11 RSVD30 INIT# AC25 H_INIT# <7>
+3VS AB10 AB24 H_INTR
RSVD31 INTR H_INTR <7>
HOST
1
R551 Y22 H_FERR#
FERR# H_FERR# <7>
1 2 AD23 T17 H_NMI R552
GPIO36 NMI H_NMI <7>
AC21 EC_KBRST# EC_KBRST# <24> 60.4_0402_1%
8.2K_0402_5% RCIN# SERIRQ
SERIRQ AA16 SERIRQ <24>
AA21 H_SMI#
H_SMI# <7>
2
SMI# H_STPCLK#
STPCLK# V18 H_STPCLK# <7>
THRMTRIP# AA20 H_THERMTRIP# <7>
3
A A
TIGERPOINT_ES1_BGA360

SCHEAMTIC MB A6856
A
4019CG
5 4 3 2 1
5 4 3 2 1
D D
USB PORT LIST
PORT #EVT DEVICE

TGP
U15B
USB0 USB1(Left)
<6> DMI_TXN0 R23
R24
DMI0RXN USBP0N H7
H6
USB20_N0
USB20_P0
USB20_N0 <18> USB1(Right) USB1 USB2(Left)
<6> DMI_TXP0 DMI0RXP USBP0P USB20_P0 <18>
<6> DMI_RXN0 P21
P20
DMI0TXN USBP1N H3
H2
USB20_N1
USB20_P1
USB20_N1 <18> USB2(Right) USB2 NC
<6> DMI_RXP0 DMI0TXP USBP1P USB20_P1 <18>
<6> DMI_TXN1 T21
T20
DMI1RXN USBP2N J2
J3
T49 PAD USB3 Card-reader
<6> DMI_TXP1 DMI1RXP USBP2P T50 PAD
<6> DMI_RXN1 T24
T25
DMI1TXN USBP3N K6
K5
USB20_N3 <23> Card-reader USB4 USB3(Right)
<6> DMI_RXP1 DMI1TXP USBP3P USB20_P3 <23>
DMI
<6> DMI_TXN2 T19 DMI2RXN USBP4N K1 USB20_N4
USB20_P4
USB20_N4 <18> USB5 WWAN
<6> DMI_TXP2 T18 DMI2RXP USBP4P K2
USB20_N5_L
USB20_P4 <18> USB3(Left) USB6
<6> DMI_RXN2 U23
U24
DMI2TXN USBP5N L2
L3 USB20_P5_L WLAN + BT
<6> DMI_RXP2 DMI2TXP USBP5P USB20_N6 WWAN USB7
<6> DMI_TXN3 V21
V20
DMI3RXN USBP6N M6
M5 USB20_P6
USB20_N6 <17> CMOS
<6> DMI_TXP3
V24
DMI3RXP USBP6P
N1 USB20_N7
USB20_P6 <17> WLAN + BT (Combo) #6/27 EVT
<6> DMI_RXN3 DMI3TXN USBP7N USB20_N7 <16>
USB20_P7
<6> DMI_RXP3 V23 DMI3TXP USBP7P N2 USB20_P7 <16> CMOS
D4 USB_OC#0_1_PCH
OC0# USB_OC#0_1_PCH <18>
USB_OC#0_1_PCH
USB
PAD T59 K21 PERN1 OC1# C5
PAD T60 K22 D3 USB_OC#2
PERP1 OC2# USB_OC#3
PAD T61 J23 PETN1 OC3# D2 #DVT USB_OC# control by EC PCH reserve
PAD T62 J24 E5 USB_OC#4_PCH
C PETP1 OC4# USB_OC#4_PCH <18> C
PCIE_PTX_C_IRX_N2 M18 E6 SLP_CHG_M3_PCH
<17> PCIE_PTX_C_IRX_N2 PERN2 OC5#/GPIO29 SLP_CHG_M3_PCH <18> +3VALW
WLAN+BT Combo PCIE_PTX_C_IRX_P2 M19 C2 SLP_CHG_M4_PCH
<17> PCIE_PTX_C_IRX_P2 PERP2 OC6#/GPIO30 SLP_CHG_M4_PCH <18>
<17> PCIE_ITX_C_PRX_N2 C1017 2 1 0.1U_0402_10V6K PCIE_ITX_PRX_N2 K24 C3 USB_OC#7 RP12
C1018 2 PCIE_ITX_PRX_P2 PETN2 OC7#/GPIO31 USB_OC#0_1_PCH 4
<17> PCIE_ITX_C_PRX_P2 1 0.1U_0402_10V6K K25 PETP2 #EVT 6/27 support sleep charge function 5
PCIE_PTX_C_IRX_N3 L23 SLP_CHG_M4_PCH 3 6
<22> PCIE_PTX_C_IRX_N3 PERN3
PCI-E
PCIE_PTX_C_IRX_P3 L24 USB_OC#7 2 7
<22> PCIE_PTX_C_IRX_P3 PERP3
LAN <22> PCIE_ITX_C_PRX_N3 C1019 2 1 0.1U_0402_10V6K PCIE_ITX_PRX_N3 L22 G2 1 8
C1020 2 PETN3 USBRBIAS
<22> PCIE_ITX_C_PRX_P3 1 0.1U_0402_10V6K PCIE_ITX_PRX_P3 M21 PETP3 USBRBIAS# G3 R957 10K_0804_8P4R_5%
PCIE_PTX_C_IRX_N4 P17 22.6_0402_1% Please closed Tiger point
<17> PCIE_PTX_C_IRX_N4 PERN4
PCIE_PTX_C_IRX_P4 P18 RP13
<17> PCIE_PTX_C_IRX_P4 PERP4 PIN within 200 mils
WWLAN <17> PCIE_ITX_C_PRX_N4 C1021 2 1@ 0.1U_0402_10V6K PCIE_ITX_PRX_N4 N25 USB_OC#3 4 5
C1022 2 PETN4
<17> PCIE_ITX_C_PRX_P4 1@ 0.1U_0402_10V6K PCIE_ITX_PRX_P4 N24 PETP4
USB_OC#2 3 6
F4 CLK_PCH_48M USB_OC#4_PCH 2 7
CLK48 CLK_PCH_48M <9>
SLP_CHG_M3_PCH 1 8
10K_0804_8P4R_5%
1
Please closed Tiger point 33_0402_5%
RF@C225
RF@ C225 PIN within 500 mils @ # DVT For RF need stuff
PCIE_ITX_PRX_N21 2 R554
+1.5VS
2
12P_0402_50V8J R555 24.9_0402_1% 1
1 2 H24 @
RF@C226
RF@ C226 DMI_ZCOMP C1023
J22 DMI_IRCOMP 1 2
PCIE_ITX_PRX_P21 2 22P_0402_50V8J R3 0_0402_5%
2 RF@ L2
<9> CLK_PCIE_PCH# W23 DMI_CLKN
12P_0402_50V8J W24 For EMI, Close to TigerPoint USB20_N5_L 1 1 2 USB20_N5
<9> CLK_PCIE_PCH DMI_CLKP 2 USB20_N5 <17>
2
TIGERPOINT_ES1_BGA360 USB20_P5_L 4 3 USB20_P5

4 3 USB20_P5 <17>
WCM-2012-900T_0805
1 2
B R4 0_0402_5% B
# PVT C225, C226 add
12p to GND for RF 2010.07.12 RF request
A A

SCHEAMTIC MB A6856
5 4 3 2 1
5 4 3 2 1
+3VALW 33_0402_5%
1 2 R931 BITCLK_PCH
<7> HDA_BITCLK_CPU
33_0402_5%
1 2 R582
<20> HDA_BITCLK_CODEC
2.2K_0402_5% 1 R560 2 PCH_SMBCLK 33_0402_5%

1 2 R932 RST#_PCH
<7> HDA_RST#_CPU
33_0402_5%
1 2 R609
<20> HDA_RST#_CODEC
2.2K_0402_5% 1 R561 2 PCH_SMBDATA
BITCLK_PCH
33_0402_5%
1 2 R933 SDOUT_PCH
<7> HDA_SDOUT_CPU +3VALW
33_0402_5%
1 2 R568
<20> HDA_SDOUT_CODEC
2 @ PM_CLKRUN# 1 2
+3VALW R598 10K_0402_5%
1
D 33_0402_5% SYNC_PCH D
<7> HDA_SYNC_CPU 1 2 R934 C1024 @
33_0402_5%
1 2 R569 10P_0402_50V8J EVT# For EC request 7/5 R610
<20> HDA_SYNC_CODEC 1
10K_0402_5%
10K_0402_5% 2 R562 1 SYS_RST#
2
BOARD_ID
1
8.2K_0402_5% R563 ICH_RI# @
R611
10K_0402_5% 2 R564 1 EC_SWI# U15D TGP
10K_0402_5%
10K_0402_5% 2 R565 1 SLP_CHG# AA5 T15 GPIO0
2
LDRQ1#/GPIO23 BMBUSY#/GPIO0 GPIO6
<24> LPC_AD0 V6 LAD0/FWH0 GPIO6 W16
LPC
AA6 W14 SLPIOVR
<24> LPC_AD1 LAD1/FWH1 GPIO7
Y5 K18 EC_SMI#
<24> LPC_AD2 LAD2/FWH2 GPIO8 EC_SMI# <24>
W8 H19 EC_SCI#
<24> LPC_AD3 LAD3/FWH3 GPIO9 EC_SCI# <24>
Y8 M17 PCH_ACIN
+3VALW LDRQ0# GPIO10 GPIO12
<24> LPC_FRAME# Y4 LFRAME#/FWH4 GPIO12 A24
C23 EC_LID_OUT#
GPIO13 EC_LID_OUT# <24>
BITCLK_PCH P6 P5 SLP_CHG#
RST#_PCH HDA_BIT_CLK GPIO14 GPIO15 SLP_CHG# <18>
U2 HDA_RST# GPIO15 E24
AUDIO
W2 AB20 T43
<20> HDA_SDIN0 HDA_SDIN0 DPRSLPVR
<7> HDA_SDIN1 V2 HDA_SDIN1 STP_PCI# Y16 H_STP_PCI# <9>
P8 HDA_SDIN2 STP_CPU# AB19 H_STP_CPU# <9>
SDOUT_PCH AA1 R3
RP14 SYNC_PCH Y1 HDA_SDOUT GPIO24 R570 1
HDA_SYNC GPIO25 C24 2 1K_0402_5%
5 4 LINKALERT# <9> CLK_PCH_14M AA3 CLK14 GPIO26 D19 BOARD_ID
1
6 3 GPIO11 GPIO27 D20 12/31 Add HW Board ID function
7 2 SMLINK0 R571 U3 EE_CS GPIO28 F22
8 1 SMLINK1 # MP C1026 4.7P change to AE2 EE_DIN CLKRUN# AC19 PM_CLKRUN# 2010.04.22 Add C1064 for ESD solution PLTRST#
10_0402_5% T6 U14
10K_0804_8P4R_5% 10p for RF request RF@ V3
EE_DOUT EPROM GPIO33
AC1
2
C C1025 EE_SHCLK GPIO34 C
GPIO38 AC23
2
18P_0402_50V8J 1 T4 AC24 1
LAN_CLK GPIO39 BT_PWR# <17>
2 1 RTCX1 RF@ P7 R573
C1026 LANR_RSTSYNC H_PWRGD C1064 100K_0402_5%
B23 LAN_RST# CPUPWRGD/GPIO49 AB22 H_PWRGD <7>
10M_0402_5%
+3VALW Y2 AA2 0.1U_0402_16V4Z
LAN
MISC
LAN_RXD0
1
RP15 32.768KHZ_12.5PF_Q13MC14610002 2 10P_0402_50V8J EC_THERM# 2
AD1 AB17 EC_THERM# <24>
1
R572 LAN_RXD1 THRM#
1 8 GPIO15 2 NC OSC 1 AC2 LAN_RXD2 VRMPWRGD V16 VGATE
2 7PCH_LOW_BAT# W3 LAN_TXD0 MCH_SYNC# AC18 MCH_SYNC#
3 6 GPIO12 3 NC OSC 4 T7 LAN_TXD1 PWRBTN# E21 PBTN_OUT#
PBTN_OUT# <24>
4 5 EC_LID_OUT# U4 H23 ICH_RI#
2
C1027 LAN_TXD2 RI# T42

SUS_STAT#/LPCPD# G22 7/20 Add test point
8.2K_0804_8P4R_5% 18P_0402_50V8J EC_CLK
W4 D22 EC_CLK <24> 01/11 Reserve EC_CLK for KBC
RTC
RTCX2 RTCX1 SUSCLK SYS_RST#
2 1 V5 RTCX2 SYS_RESET# G18
RTCRST# T5 G23 PLTRST#
RTCRST# PLTRST# PLTRST# <7,17,22>
C25 EC_SWI#
WAKE# EC_SWI# <24>
GPIO11 E20 T8 INTRUDER#
PCH_SMBCLK SMBALERT#/GPIO11 INTRUDER# PCH_POK
<9> PCH_SMBCLK H18 SMBCLK PWROK U10 8/24 Add R254 pull down for EC request
SMB
+RTCVCC R574 1 2 <9> PCH_SMBDATA PCH_SMBDATA E23 AC3 PCH_RSMRST#
20K_0402_5% LINKALERT# SMBDATA RSMRST# INTVRMEN
H21 LINKALERT# INTVRMEN AD3
SMLINK0 F25 J16 PCH_SPKR +3VALW
+RTCVCC J1 SMLINK0 SPKR PCH_SPKR <20>
@ SMLINK1 F24 SMLINK1
1 1 2 2 SLP_S3# H20 PM_SLP_S3# <24>
2
1M_0402_5% 1 R575 INTRUDER#
2 R2 SPI_MISO SLP_S4# E25 PM_SLP_S4# <24>
T1 F21 R578
JUMP_43X39 SPI_MOSI SLP_S5# PM_SLP_S5# <24>
1 R576
SPI
332K_0402_1% 2 INTVRMEN M8 330K_0402_5%
C1028 SPI_CS# PCH_LOW_BAT#
P9 SPI_CLK BATLOW# B25
1U_0402_6.3V4Z R4 AB23 H_DPRSTP#
H_DPRSTP# <7>
1
SPI_ARB DPRSTP# H_DPSLP# D44
1 2 DPSLP# AA18 H_DPSLP# <7>
F20 PCH_ACIN 2 1
+3VS RSVD31 ACIN <24,30>
CH751H-40PT_SOD323-2
B 8.2K_0402_5% R577
7/20 Add SLPIOVR pull up 8.2k to +3vs B
SLPIOVR TIGERPOINT_ES1_BGA360
8.2K_0402_5%
9/23 Change RP17 to R256, R257, R258 for layout request
@R579 PM_CLKRUN#
D45
8.2K_0402_5% R580 GPIO0 PCH_POK 2 1 PCH_RSMRST#
8.2K_0402_5% R581 GPIO6
PCH_POK 1 2 D46
+3VS R583 10K_0402_5% 1 2
<29,31> POK
EC_PWROK 1 2
R584 10K_0402_5% CH751H-40PT_SOD323-2
1K_0402_5% 1 R585 2 MCH_SYNC#

1 2
R586 0_0402_5%
+3VS R587 2 1 0_0402_5%
PCH_RSMRST# 1 3
C
EC_RSMRST# <24>
1 1 2 @ Q36
E
@ R588 MMBT3906_SOT23-3
C1030 10K_0402_5%
B
2
0.1U_0402_16V4Z 1 2 +3VALW
2 @ R589
1
4.7K_0402_5%
5
+RTCBATT @ U5 @ D7B @D7A

@ D7A
1 BAV99DW-7_SOT363 BAV99DW-7_SOT363
P
<24> EC_PWROK B
Y 4 PCH_POK <6>
+RTCVCC +RTCBATT_R 2
<9,24,27,33,34> VGATE A
G
JRTC
6
1 3 TC7SH08FUF_SSOP5 2 1
D6 RSMRST# circuit
3
A 1 GND R126 @ R590

@R590 A
2 2 GND 4
2 1 2 +RTCBATT 2.2K_0402_5%
ACES_85205-0200N 1 1K_0402_5%
CONN@ 3 2010.03.22 Un-stuff RSMRST# circuit and use 0 ohm bypass
+3VL
1 2010.03.22 Un-stuff U5 and C1030
C1029
1U_0402_6.3V6K DAN202U_SC70
2 Security Classification Compal Secret Data Compal Electronics, Inc.

SCHEAMTIC MB A6856
5 4 3 2 1
5 4 3 2 1
D U15F TGP D
TGP
+5VS +3VS U15E A1
VSS01
VSS02 A25
F12 +V5REF_RUN B6
VCC5REF VSS03
1
VSS04 B10
R591 D8 B16
VSS05
VSS06 B20
100_0402_5% RB751V-40TE17_SOD323-2 F5 +V5REF_SUS B24
VCC5REF_SUS VSS07
E18
2
+SATAPLL VSS08
VCCSATAPLL Y6 VSS09 F16
+V5REF_RUN 2mA G4
VSS10
1 6mA VCCRTC AE3 +RTCVCC VSS11 G8
C1031
0.01U_0402_16V7K
H1
0.1U_0402_10V6K
1U_0402_6.3V6K +DMIPLL VSS12
VCCDMIPLL Y25 1 1 VSS13 H4
C1033
VSS14 H5
2
C1032
VCCUSBPLL F6 VSS15 K4
1432mA R592 K8
+VCC1_5 1 2 2 VSS16
2 +1.5VS VSS17 K11
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
10U_0805_10V4Z
VSS18 K19
W18 0_0603_5% K20
V_CPU_IO VSS19
14mA 2 2 1 1 1 L4
C1034
C1035
+5VALW +3VALW VSS20
C1036
C1037
C1038
VSS21 M7
VSS22 M11
VCC1_5_1 AA8 VSS23 N3
1
D47 1 1 2 2 2
VCC1_5_2 M9 VSS24 N12
R593 M20 N13
VCC1_5_3 VSS25
POWER
VCC1_5_4 N22 VSS26 N14
10_0402_5% RB751V-40TE17_SOD323-2 N23
R594 VSS27
P11
2
C +V5REF_SUS +VCC1_05 1 VSS28 C

2 +1.05VS VSS29 P13
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z
P19
10mA 955mA 0_0603_5% VSS30
R14
C1039 1 1 1 1 VSS31
C1040
C1041
C1042
VCC1_05_1 J10 VSS32 R22
VCC1_05_2 K17 VSS33 T2
0.1U_0402_10V6K P15 T22
2 VCC1_05_3 2 2 2 VSS34
VCC1_05_4 V10 VSS35 V1
VSS36 V7
VSS37 V8
VSS38 V19
216mA R596 V22
+VCC33 VSS39
VCC3_3_1 H25 1 2 +3VS_PRIME VSS40 V25
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VCC3_3_2 AD13 VSS41 W12
F10 1 1 1 1 1 1 1 0_0603_5% W22
C1043
C1044
VCC3_3_3 VSS42
C1045
C1046
C1047
C1048
C1049
G10 @ @ Y2
VCC3_3_4 VSS43
VCC3_3_5 R10 VSS44 Y24
VCC3_3_6 T9 VSS45 AB4
2 2 2 2 2 2 2
VSS46 AB6
VSS47 AB7
VCCSUS3_3_1 F18 VSS48 AB8
VCCSUS3_3_2 N4 VSS49 AC8
K7 R599 AD2
VCCSUS3_3_3 +VCCSUS33 VSS50
VCCSUS3_3_4 F1 1 2 +3VALW VSS51 AD10
0.1U_0402_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_6.3V4Z
VSS52 AD20
92mA 0_0603_5% AD24
VSS53
1 1 1 1 VSS54 AE1
C1051
C1052
C1053
C1054
@ AE10
VSS55
VSS56 AE25
2 2 2 2
5
B B
TIGERPOINT_ES1_BGA360
VSS57 G24
Place closely pin Y25 within 100mlis. VSS58 AE13
VSS59 F2
+1.5VS
+1.5VS
R601
1 2 RSVD32 AE16
1 2 +DMIPLL RF@C1068
RF@C1068 2200P_0402_50V7K
+3VS
0.01U_0402_16V7K
4.7U_0603_6.3V6K
24mA 1 2
0_0603_5% 1 1 RF@C207
RF@ C207 68P_0402_50V8J
1 2
C1055
C1056
@ RF@C1069
RF@ C1069 2200P_0402_50V7K TIGERPOINT_ES1_BGA360
+3VALW 1 2
2 2 RF@C208
RF@ C208 68P_0402_50V8J
1 2
RF@C1070
RF@ C1070 2200P_0402_50V7K
+1.05VS 1 2
RF@C209
RF@ C209 68P_0402_50V8J
Place closely pin Y6 within 100mlis. RF@C1071
RF@ C1071
1 2
2200P_0402_50V7K
1 2
+1.5VS RF@ C210 68P_0402_50V8J
R602
1 2
1 2 +SATAPLL RF@C1072
RF@ C1072 0.1U_0402_10V6K
10U_0805_10V4Z
0.1U_0402_10V6K
45mA
0_0603_5% 1 2
C1057
C1058
A 2010.07.12 RF request A
2 1

SCHEAMTIC MB A6856
5 4 3 2 1
A B C D E
HDMI CONNECTOR
HDMI_CLK- @ 1 2 HDMI_R_CK- 9/1 PN change to SCS00004000
R935 0_0402_5%
L14
1 1 2 2
D53 F1
+5VS 2 1 +5VS_HDMI 2 1 +HDMI_5V_OUT
4 3 1.1A_6V_MINISMDC110F-2 1
4 3 RB161M-20_SOD123-2 C1110
WCM-2012-900T_0805
1 HDMI_CLK+ @ HDMI_R_CK+ 0.1U_0402_16V4Z 1
1 2
R936 0_0402_5% 2
HDMI_TX0- @ 1 2 HDMI_R_D0-
R937 0_0402_5%
L15
1 1 2 2
4 4 3 3
<7> HDMI_TXD0+
C1111 1
C1112 1
2 0.1U_0402_16V7K
0.1U_0402_16V7K
HDMI_TX0+
HDMI_TX0- HDMI_TX0+ @
WCM-2012-900T_0805
HDMI_R_D0+
< HDMI Connector >
<7> HDMI_TXD0- 2 1 2
C1113 1 2 0.1U_0402_16V7K HDMI_TX1+ R938 0_0402_5%
<7> HDMI_TXD1+
C1114 1 2 0.1U_0402_16V7K HDMI_TX1- HDMI_TX1- @ 1 2 HDMI_R_D1-
<7> HDMI_TXD1-
R939 0_0402_5%
C1115 1 2 0.1U_0402_16V7K HDMI_TX2+ L16 JHDMI1

<7> HDMI_TXD2+
C1116 1 2 0.1U_0402_16V7K HDMI_TX2- 1 2 HPD 19
<7> HDMI_TXD2- 1 2 HP_DET
C1117 1 2 0.1U_0402_16V7K HDMI_CLK+ +HDMI_5V_OUT 18
<7> HDMI_CLK0+ +5V
C1118 1 2 0.1U_0402_16V7K HDMI_CLK- 17
<7> HDMI_CLK0- DDC/CEC_GND
4 3 HDMIDAT 16
4 3 HDMICLK SDA
15 SCL
WCM-2012-900T_0805 14
HDMI_TX1+ @ HDMI_R_D1+ Reserved
1 2 13 CEC
R940 0_0402_5% HDMI_R_CK- 12 20
HDMI_TX2- @ HDMI_R_D2- CK- GND
1 2 11 CK_shield GND 21
R941 0_0402_5% HDMI_R_CK+ 10 22
HDMI_R_D0- CK+ GND
9 D0- GND 23
L17 8
HDMI_R_D0+ D0_shield
1 1 2 2 7 D0+
HDMI_R_D1- 6
2 D1- 2
5 D1_shield
4 3 HDMI_R_D1+ 4
4 3 HDMI_R_D2- D1+
3 D2-
WCM-2012-900T_0805 2
HDMI_TX2+ @ HDMI_R_D2+ HDMI_R_D2+ D2_shield
1 2 1 D2+
C1119 0_0402_5%
SUYIN_100042GR019M23BZR_19P-T
CONN@
+3VS
+HDMI_5V_OUT
+3VS
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2
2
R944
R945
R942
R943
1
5
1
Q3B
4 3 HDMIDAT
<7> HDMICLK_C HDMI_CLK+ 1 2
2N7002DW-T/R7_SOT363-6 R946 619_0402_1%
2
HDMI_CLK- 1 2
R947 619_0402_1%
1 6 HDMICLK
<7> HDMIDAT_C Q3A
3 2N7002DW-T/R7_SOT363-6 HDMI_TX0- 3
1 2
R948 619_0402_1%
HDMI_TX0+ 1 2
R949 619_0402_1%
+3VS HDMI_TX1- 1 2
R950 619_0402_1%
HDMI_TX1+ 1 2
1
R951 619_0402_1%
R952
10K_0402_5%
HDMI_TX2+ 1 2
R953 619_0402_1%
2
HDMI_TX2- 1 2
<7> HPD_C
R954 619_0402_1% 9/1 PN change to SB00000EN00
1
D
Q42 2 HPD
1
G D
2N7002_SOT23 S +3VS 2
3
G
R955 Q43 S
3
1M_0402_5% 2N7002_SOT23-3
1
4 4

Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title SCHEAMTIC MB A6856
A
4019CG
A B C D E
5 4 3 2 1
LCD POWER CIRCUIT
D D
+LCDVDD
1/22 DVT:Change R117 from 47K to 100K
+3VS W=40mils
1
R116 +3VS
150_0603_5%
1
1
C149
2
1 @
R117 C183 4.7U_0805_10V4Z
3
100K_0402_5% 2
Q2B 0.1U_0402_16V7K 2A
3
2
S
G
2N7002DW-T/R7_SOT363-6 5 2 1 2
R141 47K_0402_5% 1/22 DVT:Change Q11 from SI2301BDS to A03413
D Q11
1
1 AO3413_SOT23
# MP Add C227~C232 for RF request C498
+LCDVDD
6
0.01U_0402_25V7K W=40mils
@ C227 2
1 2 LCD_TXOUT0- Q2A
<7> GMCH_ENVDD 2 1 1
1
12P_0201_50V8J 2N7002DW-T/R7_SOT363-6 C186 C187 +3VS
@ C228 @
1
1 2 LCD_TXOUT0+ R142 4.7U_0805_10V4Z 0.1U_0402_16V4Z
2 2
2.2K_0402_5%
2.2K_0402_5%
C 12P_0201_50V8J 100K_0402_5% C
2
@ C229
R143
R144
1 2 LCD_TXOUT1-
1/22 DVT:Add C498 with 0.01uF
12P_0201_50V8J
@ C230
1
1 2 LCD_TXOUT1+
LCD_EDID_CLK LCD_EDID_CLK <7>
12P_0201_50V8J
@ C231 LCD_EDID_DATA
1 2 LCD_TXOUT2- LED/PANEL BD. Conn. LCD_EDID_DATA <7>
12P_0201_50V8J
@ C232
1 2 LCD_TXOUT2+
12P_0201_50V8J
JLVDS1
+LCDVDD R377 1 2 0_0805_5% (20 MIL) +LCDVDD_R 1 1

2 2
RF@C1074
RF@C1074 +3VS 3
LCD_TXCLK- LCD_EDID_CLK 3
2 1 1 4 4
C468 1 LCD_EDID_DATA 5
10P_0402_50V8J @ C469 LCD_TXOUT0- 5
<7> LCD_TXOUT0- 6 6
RF@C1075
RF@C1075 680P_0402_50V7K @ <7> LCD_TXOUT0+ LCD_TXOUT0+ 7
2 7
2 1 LCD_TXCLK+ 680P_0402_50V7K 8 8
2 LCD_TXOUT1- CH751H-40PT_SOD323-2 D55
<7> LCD_TXOUT1- 9 9
10P_0402_50V8J <7> LCD_TXOUT1+ LCD_TXOUT1+ 10 2 1 INVT_PWM_R
B 10 <24> INVT_PWM B
<7> LCD_TXOUT2- LCD_TXOUT2- 11
LCD_TXOUT2+ 11
<7> LCD_TXOUT2+ 12 12
# PVT Add C1074, C1075 13 R420 1 2 @ 0_0402_5%
13 <7> GMCH_INVT_PWM
10p and stuff for RF LCD_TXCLK- 14
<7> LCD_TXCLK- 14
LCD_TXCLK+ 15
<7> LCD_TXCLK+ 15
16 16
17 17
18 18
680P_0402_50V7K 2 1 C188 CH751H-40PT_SOD323-2 D54 INVT_PWM_R 19
BKOFF# 19
<24> BKOFF#_L 2 1 20 20
21 21
68P_0402_50V8J 2 1 C189 1 2 +LCD_INV 22
C306 0.1U_0402_16V4Z 22
23 23
24 24
+3VS_LVDS_CAM 25 25 MGND4 34
250mA B+ R376 1 2 0_0805_5% +LCD_INV USB20_N7_R 26 33
USB20_P7_R 26 MGND3
27 27
28
<20> DMIC_CLK
DMIC_CLK
DMIC_DAT
29
30
28
29 MGND2 32
31
Int. Camera 1 @
R392
2
0_0402_5%
+3VS_LVDS_CAM <20> DMIC_DAT 30 MGND1
R105 L13
1 1 2 2
0_0603_5% W=20mils 0.1U_0402_16V4Z #6/27 EVT I-PEX_20143-030E-20F~D USB20_N7_R
USB20_N7 <12>
+3VS 1 2 1 2 @ USB20_P7_R
USB20_P7 <12>
C313 4 3
D9 4 3
3 DMIC_CLK WCM2012F2S-900T04_0805
1 1 2
2 DMIC_DAT R393 0_0402_5%
A A
@
PACDN042Y3R_SOT23-3
For EMI request

LCD_TXCLK+ C871 1 2 10P_0402_50V8J LCD_TXCLK- 2010/06/27 2011/6/27 Title
Issued Date Deciphered Date
SCHEAMTIC MB A6856
2/25 PVT:Mount C871 with 10pF A
4019CG
5 4 3 2 1
A B C D E
Mini-Express Card for WLAN/WiMax 2/25 PVT:Mount C479,C480 with 47pf

3/16 PVT:Add BOM Config of C481,C482 to WLAN@
+3V_WLAN +1.5V_WLAN
120 mil
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 1 1
C258 C259 C260 C479 C261 C262 C263 C480
WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@
2 2 2 47P_0402_50V8J 2 2 2 47P_0402_50V8J
1 0.01U_0402_25V7K 4.7U_0805_10V4Z 0.01U_0402_25V7K 4.7U_0805_10V4Z 1
For WWAN request For WWAN request
+1.5V_WLAN
+1.5VS
+3V_WLAN +3VS
BT_CTRL 2 1 EC_RX_P80_CLK_R 1 2 PJ20
1K_0402_5% R888 0_0805_5% 2 1
R326 JWLAN 2 1
1 @ JUMP_43X79
1
# MP Add R326 1K for WB195 pin 51 3 3 2 2
BT_CTRL 5 4
WLAN_CLKREQ# 5 4
<9> WLAN_CLKREQ# 7 7 6 6
9 8 LPC_FRAME#_R
9 8 LPC_FRAME#_R <24>
11 10 LPC_AD3_R
<9> CLK_PCIE_WLAN# 11 10 LPC_AD3_R <24>
13 12 LPC_AD2_R #EVT WLAN&BT Combo module circuits
<9> CLK_PCIE_WLAN 13 12 LPC_AD2_R <24>
15 14 LPC_AD1_R
15 14 LPC_AD1_R <24>
16 LPC_AD0_R BT BT
16 LPC_AD0_R <24>
on module on module
PLTRST# 17 Enable Disable
CLK_PCI_DDR 17
<9> CLK_PCI_DDR 19 19 18 18
21 20 WL_OFF_R#
21 20 PLTRST#
<12> PCIE_PTX_C_IRX_N2 23 23 22 22 PLTRST# <7,13,22> BT_CRTL HI LO
<12> PCIE_PTX_C_IRX_P2 25 25 24 24
27 27 26 26
29 29 28 28 # MP Add R328
<12> PCIE_ITX_C_PRX_N2 31 31 30 30 CLK_SMBCLK <9,10> by pass for cost down
<12> PCIE_ITX_C_PRX_P2 33 33 32 32 CLK_SMBDATA <9,10>
35 34 +3VS BT_CTRL
35 34
37 37 36 36 USB20_N6 <12>
WLAN/ WiFi +3V_WLAN 39 39 38 38 USB20_P6 <12>
2
41 41 40 40
2 @ R259 R328 @ 2
43 43 42 42
45 44 LED_WIMAX#_R 1 2 LED_WIMAX# 100K_0402_5% 0_0402_5%
45 44 LED_WIMAX# <24,26>
47 47 46 46
R425 1 2 0_0402_5% 49 48 R428 R229@
<24> EC_TX_P80_DATA
1
49 48
1
R426 1 EC_RX_P80_CLK_R 0_0402_5% 100K_0402_5% D
<24> EC_RX_P80_CLK 2 51 51 50 50
0_0402_5% 52 1 2 +3VS 2 Q41
52 <13> BT_PWR#
Debug card using 53 GND
G
1
54 S 2N7002_SOT23
3
R429 GND WLAN@
100K_0402_5% CONN@ ACES_88910-5204
#DVT WLAN,WWAN and BT LED #DVT Q41 due die
control by EC and HW reserve @ D49 change to single
2
WL_OFF_R# 2 1 WL_OFF# <24>

Mini-Express Card for 3G/GPS 1 2
3G current need to 2750mA 3/16 PVT:Add BOM Config of C481,C482 to 3GGPS@ R430
0_0402_5%
+3V_WWAN +1.5V_WWAN
120 mil
#DVT R430 reserve for leakage power
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 1 1
C265 C266 C267 C482 C268 C269 C270 C481
WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ D14
2 2 2 47P_0402_50V8J 2 2 2 47P_0402_50V8J 1 V I/O V I/O 6
0.01U_0402_25V7K 4.7U_0805_10V4Z 0.01U_0402_25V7K 4.7U_0805_10V4Z
For WWAN request For WWAN request 2 Ground V BUS 5 +UIM_PWR
2/25 PVT:Mount C482,C481 with 47pf +UIM_PWR
3 +3V_WWAN +3VS 3 4 3
+1.5VS +1.5V_WWAN V I/O V I/O
IP4223CZ6_SO6-6
1
1 2 R231
1 2 R889 0_0805_5% @ 4.7K_0402_5%
R890 0_0805_5% J3GSIM @
JGPS WWAN@
WWAN@ +UIM_PWR +UIM_PWR 1 4
UIM_RST VCC GND UIM_VPP
1 120 mil 2 5
2
1 RST VPP
1
Reserve 3 2 1 UIM_CLK 3 6 UIM_DATA

3 2 D13 CLK I/O
5 5 4 4
<9> WWAN_CLKREQ# WWAN_CLKREQ# 7 6 +1.5V_WWAN C296 GLZ20A LL-34 7 8
7 6 +UIM_PWR 0.1U_0402_16V4Z GND GND
9 9 8 8 +UIM_PWR 3G@
UIM_DATA 3G@ 2 SUYIN_254020MA006S522ZL~D
<9> CLK_PCIE_WWAN# 11 10 1
2
11 10 UIM_CLK
<9> CLK_PCIE_WWAN 13 13 12 12 12P_0402_50V8J 1 1 12P_0402_50V8J
15 14 UIM_RST C297
15 14 UIM_VPP C307 C298 CONN@ 22P_0402_50V8J
16 16
3G@ 3G@ 2 3G@
2 2
17 17
19 18 # DVT For RF need stuff
19 18 UWB_OFF#_R
21 20 # DVT For RF need stuff
21 20 PLTRST#
<12> PCIE_PTX_C_IRX_N4 23 23 22 22
<12> PCIE_PTX_C_IRX_P4 25 25 24 24
27 27 26 26
29 29 28 28
31 30 CLK_SMBCLK
<12> PCIE_ITX_C_PRX_N4 31 30
33 32 CLK_SMBDATA D52 @
<12> PCIE_ITX_C_PRX_P4 33 32 UWB_OFF#_R 2
35 35 34 34 1 UWB_OFF# <24>
37 37 36 36 USB20_N5 <12>
+3V_WWAN 39 38 CH751H-40PT_SOD323-2
39 38 USB20_P5 <12>
41 41 40 40
43 42 LED_WIMAX#_R
4 43 42 4
45 45 44 44 1 2
47 47 46 46
49 48 WWAN@ R431
49 48 0_0402_5%
51 51 50 50
52 52 #DVT R431reserve for leakage power
53 GND
54 GND
P-TWO_A54402-A0G16-N
CONN@ Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title
SCHEAMTIC MB A6856
A
4019CG
A B C D E
5 4 3 2 1
USB CONN- -Left W=30mils

+5VALW 1.4A +USB_VCCB
U24
1 GND OUT 8
SLP_CHG_M3 SLP_CHG_M4 2
3
IN OUT 7
6
IN OUT USB_OC#4
<24> USB_CHG_EN# 1 2 4 EN# OC# 5
Mode 3 R88
HIGH LOW 0_0402_5% APL3510BXI-TRG MSOP 8
<24> USB_EN# 1 2 1
Mode 4 @ R87 C288
LOW HIGH 0_0402_5% @
4.7U_0805_10V4Z
2
#PVT R88 CHG@ change to
SLP_CHG FUNCTION +3VALW always stuff for OC protect
D U11 CHG@ actioc same D
+USB_VCCB
LOW D=1D USB20_P4_S 1 1D+ VCC 10 W=30mils
USB20_N4_S +USB_VCCB 0.1U_0402_16V4Z
HIGH D=2D 2 1D- S 9 SLP_CHG# <13>
1
USB20_P4 3 8 USB20_P4_R 1 1 1
<12> USB20_P4 2D+ D+ + C2
C1 C3 C4
USB20_N4 4 7 USB20_N4_R
<12> USB20_N4 2D- D- 150U_B2_6.3VM_R45M
USB_CHG_EN# 2 2 2 2
5 GND OE# 6
470P_0402_50V8J 1000P_0402_50V7K JUSB1

1 VCC
TS3USB221RSER_QFN10_2x1P5~D USB20_N4_RL 2
USB20_P4_RL D-
3 D+
1 2 nonCHG@ 4 GND
R221 0_0402_5%
1 2 nonCHG@ 5 GND1
R222 0_0402_5% 6 GND2
7 GND3
CHG@ 8
R211 0_0402_5% GND4 C5
2 1 SLP_CHG_M3 1 2 SUYIN_020133GB004M25MZL 0.1U_0402_16V4Z
<12> SLP_CHG_M3_PCH
@ R1 0_0402_5% CONN@ D1
CHG@ L1 1 6 1 2
R213 0_0402_5% USB20_N4_R USB20_N4_RL I/O1 I/O4
1 1 2 2
2 1 SLP_CHG_M4 2 5 +5VALW
<12> SLP_CHG_M4_PCH REF1 REF2
USB20_P4_R 4 3 USB20_P4_RL USB20_P4_RL 3 4 USB20_N4_RL
4 3 I/O2 I/O3
Use PCH 0120 reserve both EC and PCH.

+USB_VCCB
WCM-2012-900T_0805
1
@ R2
2
0_0402_5%
CM1293A-04SO_SOT23-6
For EMI request
1
CHG@ R215 R216
U12 75K_0402_1% 43K_0402_1%
C SLP_CHG_M3 1 CHG@ CHG@ C
1OE#
4
2
2
SLP_CHG_M4 2OE#
10 3OE#
13 USB20_P4_S_O
4OE# USB20_N4_S_O @
USB20_P4_S 2 3 USB20_P4_S_O <12> USB_OC#0_1_PCH 1 2 USB_OC#0_1 1 2 USB_OC#0_1_EC <24>
1A 1B
1
USB20_N4_S 5 6 USB20_N4_S_O R7 0_0402_5% R9 0_0402_5%

2A 2B USB_OC#4
9 3A 3B 8 R220 1 CHG@ 2 R218 R219 <12> USB_OC#4_PCH 1 2 1 2 USB_OC#4_EC <24>
12 4A 4B 11 100_0402_5% 51K_0402_1% 51K_0402_1% R8 0_0402_5% R10 0_0402_5%
CHG@ CHG@ @
+USB_VCCB 14 7
2
VCC GND
2
SN74CBT3125PWRG4_TSSOP14
C361
0.1U_0402_16V4Z
1 CHG@
#DVT USB_OC# control by EC
For EMI request For EMI request

2/3 DVT: Change D38,D37 from PRTR5V0U2X_SOT143-4 to CM1293A-04SO_SOT23-6
USB CONN H2 H3 H4 H11 H12 H13 H14
@ @ @ @ @ @ @
1
1
H_2P3 H_2P3 H_2P3 H_3P3 H_3P3 H_2P0N H_2P0X2P6N
+5VALW 1.4A +USB_VCCA

W=60mils # PVT Add H14 and remove H1
U18 H6 H7 H8 H9 H10
B B
1 GND OUT 8
2 IN OUT 7
3 6 1 @ @ @ @ @
USB_EN# IN OUT C283
4 5
1
1
EN# OC# @ H_2P3 H_2P3 H_1P2 H_1P2 H_1P2
APL3510BXI-TRG MSOP 8 4.7U_0805_10V4Z
2
Add 0.1u Caps for each screw hole for ESD rule
+3VS +5VALW
USB_OC#0_1
0.1U_0402_16V4Z
+USB_VCCA
1 1 1 1 1 1 @ 1
0.1U_0402_16V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
JP1
1 @ C530 @ C531 @ C528 @ C535 C534 C526@ C527
1 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2
3 3
4 4
USB20_P0 5
<12> USB20_P0 5
USB20_N0 6
<12> USB20_N0 6
7 7 Close to H1,H7 Close to H2 Close to H9,H6
USB20_P1 8
<12> USB20_P1 8
USB20_N1 9
<12> USB20_N1 9
10 10
# PVT Close to H4
11 GND
12 GND 2010.07.20 Add for ESD solution
ACES_85201-1005N_10P
CONN@ FIDUCIAL_C40M80
FM1 FM2
@ @
1
A A
FM3 FM4
@ @
1
Close to H5

SCHEAMTIC MB A6856
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019CG A
5 4 3 2 1
A B C D E F G H
SATA Conn.
For 1.8" SSD
+5VS +3VS SSD HDD need 400mA for 3V(PHISON)
Place closely JHDD SATA CONN.
1.2A
1 1 1 1 1 1 1 1
1 C275 C276 C277 C278 C279 C280 C281 C282 1
@ @ @ @
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2
JSATA
GND 1
2 SATA_ITX_C_DRX_P0 C284 1 2 0.01U_0402_25V7K
A+ SATA_ITX_DRX_P0 <11>
3 SATA_ITX_C_DRX_N0 C285 1 2 0.01U_0402_25V7K
A- SATA_ITX_DRX_N0 <11>
GND 4
5 SATA_IRX_DTX_N0 C286 1 2 0.01U_0402_25V7K
B- SATA_IRX_C_DTX_N0 <11>
6 SATA_IRX_DTX_P0 C287 1 2 0.01U_0402_25V7K
B+ SATA_IRX_C_DTX_P0 <11>
GND 7
V33 8 +3VS
V33 9
V33 10
GND 11
GND 12
GND 13
V5 14 +5VS
V5 15
V5 16
GND 17
Reserved 18
2 19 2
GND
V12 20
V12 21
V12 22
GND 23
GND 24
SUYIN_127043FR022G226ZL_NR
CONN@
3 3
4 4

SCHEAMTIC MB A6856
Custom A
4019CG
A B C D E F G H
A B C D E
Speaker Connector
RA2
+PVDD1 600 mA 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z +5V_CODEC placement near Audio Codec
1 1 0_0603_1% 1 1
CA57 CA44 RA13
place close to chip CA56 CA43 SPKL+ 2 1 SPK_L1
SPK_L1 <21>
2
0_0603_1% 1
JA1 2 2 2 2
2
0.1U_0402_16V4Z JUMP_43X39 10U_0805_10V4Z 10U_0805_10V4Z CA19
470P_0402_50V8J 2
2
1
1 1 @ place close to chip @ CA24
CA2 CA1 1 1U_0402_6.3V4Z
1
1 +3VS_DVDD @ 1
10U_0805_10V4Z +3VS_DVDD RA11 470P_0402_50V8J CA20 1
2 2
# DVT For RF
+PVDD2 2 1 +5V_CODEC RA14
0_0603_1% SPKL- 2
1 1 1 2 1 @ SPK_L2
SPK_L2 <21>
0.1U_0402_16V4Z 0.1U_0402_16V4Z CA60 @ 0_0603_1%
1 2 35 mA CA61 C224 @ RA15
+3VS +AVDD
RA1 FBMH1608HM601-T 1 1 68P_0402_50V8J SPKR+ 2 1 SPK_R1
2 2 RF@ 2 10U_0805_10V4Z SPK_R1 <21>
0_0603_1% 1
CA8 CA7
10U_0805_10V4Z RA3 CA25
2 2 68 mA 10U_0805_10V4Z 0.1U_0402_16V4Z 2 470P_0402_50V8J
1 +5V_CODEC 2
0_0603_1% @ 2 CA27
ALC259@ 1 1U_0402_6.3V4Z
UA1 ALC269@ @
39
46
25
38
1 1 1 1
9
ALC259-VB5-GR_QFN48_7X7 UA1 CA3 CA4 CA5 CA6 470P_0402_50V8J CA26 1
Change CA9 and CA10 RA16
DVDD
DVDD_IO
PVDD1
PVDD2
AVDD1
AVDD2
SPKR- 2
Ext. Mic/LINE IN 2 1 @ SPK_R2
SPK_R2 <21>
to 1U at pre-MP 2 2 2 2
place close to chip 0_0603_1%
10U_0805_10V4Z 0.1U_0402_16V4Z
CA9 1U_0402_6.3V4Z
MIC1_LINE1_R_L 2 1 LINE1_L 23 40 SPKL+
<21> MIC1_LINE1_R_L
CA10 LINE1_R 24 LINE1_L SPK_OUT_L+
41 SPKL- Beep sound
<21> MIC1_LINE1_R_R
MIC1_LINE1_R_R 2 11U_0402_6.3V4Z
LINE1_R SPK_OUT_L- EC Beep RA7
14 45 SPKR+ 1 2
LINE2_L SPK_OUT_R+ <24> EC_BEEP
15 44 SPKR- 47K_0402_5%
4.7U_0805_10V4Z CA21 LINE2_R SPK_OUT_R-
MIC1_LINE1_R_L 2 1 MIC_L 21 32
MIC1_L HP_OUT_L HP_L <21>
MIC_R 22 33
MIC1_LINE1_R_R 2 1
MIC1_R HP_OUT_R HP_R <21> PCI Beep RA8
CA13
16 1 2 1 2 MONO_IN
4.7U_0805_10V4Z CA22 MIC2_L <13> PCH_SPKR
17 MIC2_R 47K_0402_5%
10 HDA_SYNC_CODEC 0.1U_0402_16V4Z
2 SYNC HDA_SYNC_CODEC <13> 2
DMIC_DAT 2 6 HDA_BITCLK_CODEC
<16> DMIC_DAT GPIO0/DMIC_DATA BCLK HDA_BITCLK_CODEC <13>
DMIC_CLK_R 3 GPIO1/DMIC_CLK
1
5 HDA_SDOUT_CODEC HDA_SDOUT_CODEC <13> 1
SDATA_OUT RA12 100P_0402_50V8J
EC_MUTE# 4 8 HDA_SDIN0_R 2 1 CA18
<24> EC_MUTE# PD# SDATA_IN HDA_SDIN0 <13>
RA6 33_0402_5% 4.7K_0402_5%
2
2
HDA_RST#_CODEC 11 47
<13> HDA_RST#_CODEC RESET# EAPD
1
48 #DVT PC beep R,C change 4.7K and 100P

MONO_IN SPDIFO
1 2 12 PCBEEP
RA40 CA11 CA12 100P_0402_50V8J 20
100K_0402_5% 0.01U_0402_25V7K MONO_OUT
@ @ SENSE_A 13
2
SENSE A
For EMI MIC2_VREFO 29
+5VALW +5VS
18 SENSE B +5V_CODEC
MIC1_VREFO_R 30 +MIC1_VREFO_R CA23 10U_0805_10V4Z
1 2 36 CBP LDO_CAP 28 1 2
CA15 ALC269@
2.2U_0603_6.3V4Z 35 27 AC_VREF 1 2
CBN VREF RA53 0_0805_5%
+MIC1_VREFO_L 31 19 AC_JDREF2 RA9 1 20K_0402_1% 1 2
MIC1_VREFO_L JDREF RA54 0_0805_5%
1 2
EC_MUTE# 43 34 CPVEE 1 2 ALC259@
PVSS2 CPVEE CA14 2.2U_0603_6.3V4Z CA17 CA16
42 PVSS1
49 DVSS2 AVSS1 26 2.2U_0603_6.3V4Z
1
2 1
7 DVSS1 AVSS2 37
RA45 0.1U_0402_16V4Z
4.7K_0402_5% Add RA45 and un-mount RA43 at PVT ALC269Q-VB2-GR_QFN48_7X7 MIC_SENSE
for audio noise issue place close to chip
1
3 3
DGND AGND
2
RA55 ALC259@
# DVT For RF need stuff 0_0402_5%
6
for EMI request
EC control EC_MUTE# behavior: High-state / low-state QA1A
2
HDA_BITCLK_CODEC 1 2 1 2 ALC269@ RA28 100K_0402_5%
# DVT For RF need stuff CA47 1 2 0.1U_0603_50V7K RA42 10_0402_5% 2N7002DW-T/R7_SOT363-6 2
RF@ CA62 12P_0402_50V8J ALC269@
CA48 1 2 0.1U_0603_50V7K RF@
1
<16> DMIC_CLK 1 2DMIC_CLK_R
RA47 39_0402_5% CA49 1 2 0.1U_0603_50V7K Add RA43 for S/M battery mode at PVT
2
CA50 1 2 0.1U_0603_50V7K
C438 +3VL RA44 100K_0402_5%
100P_0402_50V8J 1 2
1 RA18 FBMH1608HM601-T for RF request
<24> SM_SENSE#
3
place close to chip For EMI
QA1B
Sense Pin Impedance Codec Signals Function ALC269@
MIC_SENSE 2 1 SENSE_A 5
+3VS B+ BACK_SENSE <21>
39.2K PORT-I (PIN 32, 33) Headphone out RA10 20K_0402_1% 2N7002DW-T/R7_SOT363-6
4
20K PORT-B (PIN 21, 22) Ext. MIC
SENSE A 1
@ CA28
2
1U_0402_6.3V4Z
<21> NBA_PLUG
10K PORT-C (PIN 23, 24) RA21 39.2K_0402_1% 1 2
4 @ CA29 1U_0402_6.3V4Z 4
5.1K (PIN 48) #EVT EMI for DMIC_CLK solution

SCHEAMTIC MB A6856
A B C D E
A B C D E
# PVT for DC mode only detect

VL
SPEAKER
4.7K_0402_5%
RA48
MIC
1
ALC269@
JMIC1
1 8 1
7
3
2
MIC1_L LA2 1 2 FBM-11-160808-601-T_0603 MIC1_L_1 1
4
MIC1_R LA1 1 2 FBM-11-160808-601-T_0603 MIC1_R_1 2
DA7 BACK_SENSE 5
<20> BACK_SENSE
2 6
0.1U_0402_16V4Z
1
CA63
3 JSPK1 1 1 1 SINGA_2SJ2285-001191
6 CONN@
PESD5V0U2BT_SOT23-3 GND2 CA68 CA69 @
5 GND1
33P_0402_50V8K
33P_0402_50V8K
SPK_R1 2 2 2
<20> SPK_R1 4 4 1 1
SPK_R2 3
<20> SPK_R2 3
1
0_0402_5%
SPK_L1 2 ESD request CA64 CA65
<20> SPK_L1 2
SPK_L2 1 @ 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<20> SPK_L2 1 2 2
PESD5V0U2BT_SOT23-3 CONN@ RA56
2 E&T_3806-F04N-02R ALC259@
2
1
2 2
3
DA6
Head phone
Ext.MIC/LINE IN JACK JHP2
8
RA46 2 1 +MIC1_VREFO_R 7
1K_0402_5% RA36 2.2K_0402_5% 3
MIC1_LINE1_R_R 2 1 MIC1_R HP_L RA52 1 2 40.2_0402_1% HP_L_R LA4 1 2 FBM-11-160808-601-T_0603 PL 1
<20> MIC1_LINE1_R_R <20> HP_L
4
HP_R RA51 1 2 40.2_0402_1% HP_R_R LA3 1 2 FBM-11-160808-601-T_0603 PR 2
MIC1_LINE1_R_L MIC1_L <20> HP_R
<20> MIC1_LINE1_R_L 2 1
1K_0402_5% <20> NBA_PLUG NBA_PLUG 5
RA35 2 1 +MIC1_VREFO_L 6
RA31 2.2K_0402_5%
3 1 1 CA71 SINGA_2SJ2285-001191 3
@
33P_0402_50V8K
0.1U_0402_16V4Z CA70 CONN@
33P_0402_50V8K 1
2 2
2 1
CA66
CA67 0.1U_0402_16V4Z
2 ESD request
ESD request
4 4

SCHEAMTIC MB A6856
A B C D E
A B C D
3/10 Change CL13 0805-->0603

UL1
+3V_LAN
Close to Pin 27,39,12,47,48
<12> PCIE_PTX_C_IRX_P3 CL1 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_P3 22 HSOP LED3/EEDO 31
37 +LAN_VDD10
LED1/EESK
<12> PCIE_PTX_C_IRX_N3 CL2 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_N3 23 HSON LED0 40 1 2
LL1 @ 0.1U_0402_16V4Z CL10
17 30 RL2 2 1 10K_0402_5% +LAN_REGOUT 1 2 1 2
<12> PCIE_ITX_C_PRX_P3 HSIP EECS/SCL
18 32 RL1 2 1 10K_0402_5% 2.2UH +-5% NLC252018T 0.1U_0402_16V4Z CL4
<12> PCIE_ITX_C_PRX_N3 HSIN EEDI/SDA
1 2 1 2
Layout Note: LL1 must be 0.1U_0402_16V4Z CL5
RL19 0_0402_5% 16 1 LAN_MDI0+ within 200mil to Pin36 CL13 CL9 1 2
<9> LAN_CLKREQ# CLKREQB MDIP0
2 LAN_MDI0- CL8,CL9 must be within 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL6
MDIN0 LAN_MDI1+ 200mil to LL1 2 1
1
<7,13,17> PLTRST# 25 PERSTB MDIP1 4 1 2 1
5 LAN_MDI1- +LAN_REGOUT: Width =60mil 0.1U_0402_16V4Z CL7

MDIN1
<9> CLK_PCIE_LAN 19 REFCLK_P NC/MDIP2 7
<9> CLK_PCIE_LAN# 20 REFCLK_N NC/MDIN2 8
NC/MDIP3 10
+3VALW 11
LAN_X1 NC/MDIN3
43 CKXTAL1
LAN_X2 44 13 +LAN_VDD10 Close to Pin 3,6,9,13,29,41,45
CKXTAL2 DVDD10
1
29 +LAN_VDD10 +LAN_EVDD10
RL102 DVDD10 +LAN_VDD10
DVDD10 41
10K_0402_5% LOM_WAKE# 28 2 1
<24> LOM_WAKE# LANWAKEB 0_0603_5% LL2 1 2 1 2
ISOLATEB 26 27 +3V_LAN 0.1U_0402_16V4Z CL19
2
ISOLATEB DVDD33 CL18 CL17

DVDD33 39 1 2
LOM_WAKE# 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL20
2 1
14 NC/SMBCLK AVDD33 12 +3V_LAN 1 2
15 42 0.1U_0402_16V4Z CL21
NC/SMBDATA AVDD33
+3V_LAN 1 RL22 2 1K_0402_5% 38 GPO/SMBALERT AVDD33 47 Close to Pin 21 1 2
48 0.1U_0402_16V4Z CL22
AVDD33
ENSWREG 33 ENSWREG
EVDD10 21 +LAN_EVDD10
+LAN_VDDREG 34 VDDREG
35 VDDREG AVDD10 3 +LAN_VDD10
AVDD10 6
9 +3V_LAN +LAN_VDDREG
AVDD10
1 2 46 RSET AVDD10 45
RL5 2.49K_0402_1% 2 1
+3VS 24 36 +LAN_REGOUT 0_0603_5% LL3
GND REGOUT 1 2
49 PGND @
CL28 CL29
1
2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 2
RL6 RTL8105E-VB-GR_QFN48_6X6 2 1
1K_0402_1%
2
ISOLATEB
+3V_LAN
RL7 +3VS
15K_0402_5%
+3VALW TO +3V_LAN
2 1 RL4 @
@CL33
@ CL33 0.01U_0402_16V7K 0_0402_5% +3VALW
2 1 +3VALW
@CL34
@ CL34 0.01U_0402_16V7K
2
2 1 ENSWREG Vgs=-4.5V,Id=3A,Rds<97mohm
@CL35
@ CL35 0.01U_0402_16V7K RL25
RL23 100K_0402_5% 2
0_0402_5% CL12
YL1
0.1U_0402_16V7K QL1
3
S
LAN_X1 2 1LAN_X2
1 G
# MP reserve CL33,CL34,CL35 <24> WOL_EN# 1 2 2
RL16 47K_0402_5%
25MHZ_20PF_7A25000012
+3VS to GND decouplin cap for D
1 1 1
1
EMI request CL14 AO3413_SOT23
CL26 CL27 0.01U_0402_25V7K +3V_LAN
27P_0402_50V8J 27P_0402_50V8J
2 2 2
1 1
3 3
CL15 CL8 1U_0402_6.3V4Z

4.7U_0805_10V4Z
@ 2 2
UL2
LAN_MDI1+ 1 16 RJ45_MIDI1+
LAN_MDI1- TD+ TX+ RJ45_MIDI1- JLAN1
2 TD- TX- 15
2 1 3 14 RL26 RJ45_MIDI1- 1
CL30 0.01U_0402_16V7K CT CT CL31 1 RJ45_MIDI1+ 1
4 NC NC 13 2 1000P_0402_50V7K 1 2 75_0402_1% 2 2
5 12 1 2 1 2 RJ45_GND 1 2 1000P_1808_3KV7K LANGND 3
NC NC CL32 1000P_0402_50V7K 75_0402_1% CL3 RJ45_MIDI0- 3
6 CT CT 11 4 4
LAN_MDI0+ 7 10 RJ45_MIDI0+ RL27 RJ45_MIDI0+ 5
LAN_MDI0- RD+ RX+ RJ45_MIDI0- 5
8 RD- RX- 9 1 6 6
CL23 7 7
8 8
NS681680 4.7U_0603_6.3V6K 9
2 GND1
10 GND2
ACES_88231-08001
CONN@
#DVT remove CL16 and CL23, Add ESD diode #DVT LAN connect pin defind change
4
# MP change back to orignal design for EMI # PVT Add pin 7 connect to LANGND 4
　D28 remove and add CL23 4.7U

SCHEAMTIC MB A6856
A B C D
A B C D E
XD_CD#
SP1 XD_RDY SD_WP MS_CLK
SP2 XD_RE# MS_INS#
SP3 XD_CE# SD_D1
SP4 XD_CLE SD_D0 MS_D7
SP5 XD_ALE SD_D7 MS_D3
SP6 XD_WE# SD_CD#
SP7 XD_WP SD_D6 MS_D6
SP8 XD_D0 SD_CLK MS_D2
SP9 XD_D1 SD_D5 MS_D0
1 SP10 XD_D2 SD_CMD 1
SP14 XD_D6 MS_BS
XD_D7
+3VS_CR CC4 2 1 100P_0402_50V8J

UC1
RC7 1 2 6.2K_0603_1% RREF 1
R891 REFE
17 CR_LED#
GPIO0 CR_LED# <26>
+3VS 2 1 <12> USB20_N3 2 DM
3 24 XTLI 2 1
<12> USB20_P3 DP CLK_IN CLK_48M_CR <9>
0_0402_5% RC19
0_0805_5%
4 3V3_IN XD_D7 23 R556 C1073
+VCC_3IN1
4.7U_0805_10V4Z
0.1U_0402_16V4Z
1 2 VREG
5
6
CARD_3V3
22
48Mhz1 2 1 2
V18 SP14
1U_0402_6.3V6K
CC5
CC13
1 need 12 mil trace 21 SD_DATA2

SP13
CC8
7 20 SD_DATA3
XD_CD# SP12 33_0402_5% 22P_0402_50V8J
SP11 19
2 1 SDWP# SDCMD @ @
8 SP1 SP10 18
2
9 SP2 SP9 16
SD_DATA1 10 15 SD_MS_CLK RC11 1 2 33_0402_5% SDCLK # DVT reserve for 48M CLK
SP3 SP8
EPAD
SD_MS_DATA0 11 14
2
SP4 SP7 SDCD# 2
12 SP5 SP6 13
RTS5137-GR QFN 24P_4X4
25
2 in 1 Card Reader
JREAD1
SD_DATA3 1 SD-DAT3
SDCMD 2 SD-CMD
+VCC_3IN1 3 SD-GND
4 SD-VCC
0.1U_0402_16V4Z
3 SDCLK 3
2 5 SD-CLK
CB29
6 SD-GND
1 SD_MS_DATA0 7 SD-DAT0
SD_DATA1 8 SD-DAT1
SD_DATA2 9 SD-DAT2
SDCD# 10 12
DETECT GND1
SDWP# 11 13
PROTECT GND2
#DVT swap conncet pin10 and pin11 TAITW_PSDATA009GLBS1ZZ4H

CONN@
10_0402_5% 10P_0402_50V8J
SDCLK 1 2
@ RC18 @ CC15
4 4

SCHEAMTIC MB A6856
Custom A
4019CG
A B C D E
+3V_EC +3V_EC +3VALW
01/06 Reserve +3VL power for EC
@ R612
+EC_AVCC 2 1
0_0603_5% CLK_PCI_LPC
LPC_FRAME#_R 1 2 LPC_FRAME# C384 R613 +3VL
<17> LPC_FRAME#_R 1 1 1 1 1 1
1
0.1U_0402_16V4Z
C378
0.1U_0402_16V4Z
C379
0.1U_0402_16V4Z
C380
0.1U_0402_16V4Z
C381
1000P_0402_50V7K
C382
1000P_0402_50V7K
C383
0_0402_5% @ R310 1 2 2 1
LPC_AD3_R 1 2 LPC_AD3 0_0603_5% R302
<17> LPC_AD3_R
0_0402_5% @ R311 0.1U_0402_16V4Z @ 10_0402_5%
LPC_AD2_R 2 2 2 2 2 2 +EC_AVCC +3V_EC
<17> LPC_AD2_R 1 2 LPC_AD2 R614
111
125
0_0402_5% @ R315
22
33
96
67
2 1
2
9
LPC_AD1_R 1 2 LPC_AD1 U29 0_0603_5% 1
<17> LPC_AD1_R
0_0402_5% @ R316
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
LPC_AD0_R 1 2 LPC_AD0 C385
<17> LPC_AD0_R
0_0402_5% @ R317 @ 22P_0402_50V8J
2
GATEA20 1 21
<11> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F SM_SENSE# <20>
12/31 Add for miniI PCIE debug card. EC_KBRST# 2 23 EC_BEEP
<11> EC_KBRST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 EC_BEEP <20>
SERIRQ 3 26 EC_PWM_FAN Place closely pin 109
<11> SERIRQ SERIRQ# FANPWM1/GPIO12 EC_PWM_FAN <25> R243
LPC_FRAME# 4 27 ACOFF @ R329
<13> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <30>
LPC_AD3 5 +3VALW 1 2 1 2 LID_SW#
+3V_EC <13> LPC_AD3 LAD3
R303 LPC_AD2 7 PWM Output 0_0402_5%
<13> LPC_AD2 LAD2
47K_0402_5% LPC_AD1 8 63 BATT_TEMPA R330 1
<13> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMPA <29> 47K_0402_5%
ECRST# LPC_AD0
2 1 <13> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I
+3VL 1
0_0402_5%
2
@ C525
ADP_I/AD2/GPIO3A 65 ADP_I <30>
2 1 CLK_PCI_LPC 12 AD Input 66 ADP_V 0.1U_0402_16V4Z
<9> CLK_PCI_LPC PCICLK AD3/GPIO3B ADP_V <30> 2
C387 0.1U_0402_16V4Z PCI_RST# 13 75 Delet KILL_SW# # MP change LID# pull up to +3VL
<11> PCI_RST# PCIRST#/GPIO05 AD4/GPIO42
ECRST# 37 76
EC_SCI# 20
ECRST# SELIO2#/AD5/GPIO43 #6/27 EVT
<13> EC_SCI# SCI#/GPIO0E
LED_WIMAX# 38 CLK_PCI_LPC 1 2
<17,26> LED_WIMAX# CLKRUN#/GPIO1D
68 USB_CHG_EN# @ C211 68P_0402_50V8J
DAC_BRIG/DA0/GPIO3C USB_CHG_EN# <18>
70 #DVT remove EN_DFAN1 INVT_PWM 1 2
KSO[0..15] EN_DFAN1/DA1/GPIO3D IREF @ C212 68P_0402_50V8J
<25> KSO[0..15]
#DVT EC to contral WWAN, DA Output IREF/DA2/GPIO3E 71 IREF <30>
KSI0 55 72 CHGVADJ EC_TX_P80_DATA 1 2
KSI[0..7] WLAN and BT LED KSI1 56
KSI0/GPIO30 DA3/GPIO3F CHGVADJ <30>
@ C216 68P_0402_50V8J
<25> KSI[0..7] KSI2 KSI1/GPIO31 EC_RX_P80_CLK 1
57 KSI2/GPIO32 2
KSI3 58 83 EC_MUTE# @ C217 68P_0402_50V8J
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <20>
confirm battery team change +5VALW to +3VALW KSI4 59 84 USB_EN#
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# <18>
KSI5 60 85
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C
+3V_EC
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 2010.07.12 RF request
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <26>
KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <26>
KSO1 40
EC_SMB_CK1 KSO2 KSO1/GPIO21
41 KSO2/GPIO22
R323 2.2K_0402_5% KSO3 42 97 VGATE
KSO3/GPIO23 SDICS#/GPXOA00 VGATE <9,13,27,33,34>
EC_SMB_DA1 KSO4 43 98 WOL_EN#
KSO4/GPIO24 SDICLK/GPXOA01 WOL_EN# <22> +3V_EC
R314 2.2K_0402_5% KSO5
EVT# For EC request 7/5
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 Delet SBPWR_EN#
LID_SW#
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 #6/27 EVT LID_SW# <26>
KSO7 46 SPI Device Interface 1 2
KSO8 KSO7/GPIO27 330K_0402_5% R307
47 KSO8/GPIO28
+3VS KSO9 EC_SI_SPI_SO D21
48 KSO9/GPIO29 SPIDI/RD# 119 EC_SI_SPI_SO <25>
KSO10 49 120 EC_SO_SPI_SI ACIN_D 2 1
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI <25> ACIN <13,30>
EC_SMB_CK2 KSO11 50 SPI Flash ROM 126 EC_SPICLK
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK <25>
R308 2.2K_0402_5% KSO12 51 128 SPI_CS# CH751H-40PT_SOD323-2
KSO12/GPIO2C SPICS# SPI_CS# <25>
EC_SMB_DA2 KSO13 52 Add D21 for AC-IN leakage issue
R309 2.2K_0402_5% KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73 USB_OC#0_1_EC
KSO15/GPIO2F CIR_RX/GPIO40 USB_OC#0_1_EC <18>
81 74 USB_OC#4_EC
KSO16/GPIO48 CIR_RLC_TX/GPIO41 USB_OC#4_EC <18>
For EC recommend 10/17 82 89 FSTCHG
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG <30>
90 BATT_FULL_LED#
BATT_CHGI_LED#/GPIO52 BATT_FULL_LED# <26>
01/06 Add HW board ID in EC pin16 91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# <25>
EC_SMB_CK1 77 GPIO 92 BATT_CHG_LOW_LED#
<29> EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_CHG_LOW_LED# <26> +3VALW
EC_SMB_DA1 78 93 PWR_ON_LED#
+3V_EC <29> EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_ON_LED# <26>
EC_SMB_CK2 79 SM Bus 95 SYSON
EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON <27,32>
EC_SMB_DA2 80 121 VR_ON R5
EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <34>
127 ACIN_D 10K_0402_5%
AC_IN/GPIO59
1
USB_OC#0_1_EC 2 1
R318 2 1 PCI_RST#
10K_0402_5% C389 0.1U_0402_16V4Z PM_SLP_S3# 6 100 EC_RSMRST# R6
<13> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <13>
PM_SLP_S5# 14 101 EC_LID_OUT# 10K_0402_5%
<13> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# <13>
EC_SMI# 15 102 EC_ON USB_OC#4_EC 2 1
<13> EC_SMI# EC_ON <26>
2
HW_BOARD_ID HW_BOARD_ID EC_SMI#/GPIO08 EC_ON/GPXO05 EC_SWI#

2010.07.15 EMI request 16 LID_SW#/GPIO0A EC_SWI#/GPXO06 103 EC_SWI# <13>
17 104 EC_PWROK
SUSP#/GPIO0B ICH_PWROK/GPXO06 EC_PWROK <13>
1
@ WP 18 GPO 105 BKOFF#_L BKOFF#_L <16>

R319 PBTN_OUT#/GPIO0C BKOFF#/GPXO08 WL_OFF#
19 EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09 106 WL_OFF# <17>
10K_0402_5% INVT_PWM 25 107 UWB_OFF# UWB_OFF# <17> #DVT USB_OC# control by EC
<16> INVT_PWM EC_THERM#/GPIO11 GPXO10
FAN_SPEED1 28 108 Delet ARROW_LED#
<25> FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11
29 #6/27 EVT
2
EC_TX_P80_DATA FANFB2/GPIO15
<17> EC_TX_P80_DATA 30 EC_TX/GPIO16
EC_RX_P80_CLK 31 110 PM_SLP_S4#
<17> EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# <13>
ON/OFFBTN# 32 112 ENBKL Chenge EAPD to NC
<26> ON/OFFBTN# ON_OFF/GPIO18 ENBKL/GPXID2 ENBKL <7>
PWR_SUSP_LED# 34 114
<26> PWR_SUSP_LED#
36
PWR_LED#/GPIO19
GPI
GPXID3
115 EC_THERM# #6/27 EVT
NUMLED#/GPIO1A GPXID4 EC_THERM# <13>
@ R320 Delet NUM_LED# 116 SUSP#
GPXID5 SUSP# <27,33>
WP_R 1 2 WP 117 PBTN_OUT#
<25> WP_R #6/27 EVT GPXID6
118 LOM_WAKE#
PBTN_OUT# <13>
0_0402_5% GPXID7 LOM_WAKE# <22>
122 XCLK1
1 2 123 124 +EC_V18R
<13> EC_CLK XCLK0 V18R
0_0402_5% R322 20mil
AGND
01/11 Reserve EC pin17 for WP function.

GND
GND
GND
GND
GND
1 C391
1
BATT_TEMPA 1 2 4.7U_0603_6.3V6K
C388 100P_0402_50V8J RZ01 KB926QFE0_LQFP128
11
24
35
94
113
69
100K_0402_5% @ CZ01 20mil

ACIN_D 2 20P_0402_50V8J TP_CLK
1 2 +5VS 1 2
C390 100P_0402_50V8J R595 4.7K_0402_5%
2
1 2 TP_DATA
R597 4.7K_0402_5%
01/11 Reserve EC_CLK for KBC

+3V_EC Layout: R322 need to close EC pin123
KSO1 1 2
R312 47K_0402_5%
KSO2 1 2
R313 47K_0402_5% 2010/06/27 2011/6/27 Title
Issued Date Deciphered Date
SCHEAMTIC MB A6856
to avoid EC entry ENE test mode AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom A
4019CG
+5VS +3VS
# DVT For RF
SPI Flash (8Mb*1)
FAN Control Circuit # DVT For RF 1
# DVT For RF +3V_EC 2/3 DVT: Add C501,C502,C503,R412 for EMI request
1 RF@
1
RF@ C223 1
C222 R332 R887 68P_0402_50V8J RF@ +3V_EC
68P_0402_50V8J 2 C221
10K_0402_5% 10K_0402_5%
2 68P_0402_50V8J 330P_0402_50V7K
JFAN 2 U36 1 1 1
1
1 1 8 C503 C502 C411
1 <24> SPI_CS# CE# VDD
R600 2 R321
<24> FAN_SPEED1 2
<24> EC_PWM_FAN 1 2 EC_PWM_FAN_R 3 0_0402_5% 0.1U_0402_16V4Z
3 2 2 2
+5VS 4 4 <24> EC_SI_SPI_SO 2 SO HOLD# 7
10_0603_5% 470P_0402_50V8J
2
1 5 GND1
@ 6 3 6 EC_SPICLK
GND2 <24> WP_R WP# SCK EC_SPICLK <24>
C218
68P_0402_50V8J ACES_88231-04001 1
2 CONN@ C501 EC_SO_SPI_SI
4 VSS SI 5 EC_SO_SPI_SI <24>
330P_0402_50V7K
2 8M W25Q80BVSSIG SOIC 8P # PVT remove EON BIOS ROM
01/11 Reserve WP function for SPI ROM

R412
1 2 1 2 EC_SPICLK
#DVT Reserve for EC protect 33_0402_5%
C508 12P_0402_50V8J
RF@ RF@
# DVT For RF need stuff
LPC Debug Port

KSI0 C414 1 2 100P_0402_50V8J
KSI1 C419 1 2 100P_0402_50V8J
KSI2 C416 1 2 100P_0402_50V8J
KSI3 C418 1 2 100P_0402_50V8J
KEYBOARD KSI4 C422 1 2 100P_0402_50V8J
KSI5 C424 1 2 100P_0402_50V8J

CONN. KSI6 C426 1 2 100P_0402_50V8J
KSI[0..7] KSI7 C428 1 2 100P_0402_50V8J

KSI[0..7] <24>
KSO[0..15] KSO0 C430 1 2 100P_0402_50V8J
KSO[0..15] <24>
KSO1 C432 1 2 100P_0402_50V8J
JKB KSO2 C434 1 2 100P_0402_50V8J

1 KSO3 C436 1 100P_0402_50V8J
2 2
3 CAPS_LED# <24>
R382 1 2 300_0402_5% +3VS
4 KSI1
5 KSI6
6 KSI5
7 KSI0 KSO4 C415 1 100P_0402_50V8J
8 2
KSI4
9 KSI3 KSO5 C420 1 100P_0402_50V8J
10 2
KSI2
11 KSI7 KSO6 C417 1 100P_0402_50V8J
12 2
KSO15
13 KSO12 KSO7 C421 1 100P_0402_50V8J
14 2
KSO11
15 KSO10 KSO8 C423 1 100P_0402_50V8J
16 2
KSO9
17 KSO8 KSO9 C425 1 100P_0402_50V8J
18 2
KSO13
19 KSO7 KSO10 C427 1 100P_0402_50V8J
20 2
KSO6
21 KSO14 KSO11 C429 1 100P_0402_50V8J
22 2
KSO5
23 KSO3 KSO12 C431 1 100P_0402_50V8J
24 2
KSO4
25 KSO0 KSO13 C433 1 100P_0402_50V8J
26 2
KSO1
27 KSO2 KSO14 C435 1 100P_0402_50V8J
28 2
29 KSO15 C437 1 100P_0402_50V8J
30 2
31 CAPS_LED# C461 1 100P_0402_50V8J
32 2
33
34
@ ACES_88170-3400
3/4 PVT:Mount C414~C437,C461 for EMI request
12/18 Follow KB Matrix the same to KSKAA
Security Classification Compal Secret Data COMPAL Electronics Inc

SCHEAMTIC MB A6856
A
4019CG
A B C D E
Power Button +3V_EC

#DVT change power
ON/OFF power rail +3VALW-->+3V_EC
Touch/B Connector
1/22 DVT:JTOUCH pin define reversal
2
+5VS
R324
100K_0402_5%
1
D24 JTOUCH
1
2 R325 R223
1 2 0_0402_5% 1 8
ON/OFFBTN# <24> <24> LID_SW# 1 G2
ON/OFFBTN#_R 1 0_0603_5% 2 7
2 G1
3 51_ON# <28> <24> TP_DATA 3 3
<24> TP_CLK 4
2
CHN202UPT SC-70 4
5 5
1 1
2 6 6
2
E-T_7182K-F06N-00R
1
D C405 D26
1 1U_0402_6.3V4Z CONN@
2 Q15 PJDLC05_SOT23-3
<24> EC_ON G
2
S 2N7002_SOT23 #MP Change To E&T footprint
3
R327
10K_0402_5%
2
1
@ R333 R331
JPOWER
1 0_0402_5% 0_0402_5%
1
2
1
ON/OFFBTN#_R R415 1 2
2 FBMA-10-100505-151T 3 3
4 4
0.1U_0402_16V4Z
+3VALW
+3VL
180P_0402_50V8J
5 GND
3
2
PJSOT24C_SOT23-3
2 D27 6
@ @ GND
1
C538
C505
JOINT_F1017WR-S-04P
CONN@
1 @
2
# MP change LID power to +3VL
1
# DVT change D27 reverse voltage

2 to 24V from 6V 2
LED Conn
+5VS 1
JLED
1
ISPD
+5VALW 2 2
3 ZZZ
<24> BATT_CHG_LOW_LED# 3
<24> BATT_FULL_LED# 4 4
<24> PWR_SUSP_LED# 5 5
6
<24> PWR_ON_LED#
<17,24> LED_WIMAX# 7
6
7
PCB
8 8
SATALED#_R 9 PCB LA-6851
9
10 10
4/7 MP:PCB P/N Change to DAZ08100105
11 GND
12 GND
P-TWO_161021-10021
CONN@
# PVT change non ZIF for cost

D50
2 1 CR_LED# <23>
3 CH751H-40PT_SOD323-2 3
D51
SATALED#_R 2 1 SATALED# <11>
4 4

SCHEAMTIC MB A6856
A B C D E
A B C D E
+3VALW TO +3VS +5VALW TO +5VS

4/2 MP:For EMI ESD solution
+3VALW +3VS Vgs=-0V,Id=9A,Rds=18.5mohm +5VALW +5VS
4/2 MP:For EMI ESD solution
SI7326DN-T1-E3_PAK1212-8 1 1 SI7326DN-T1-E3_PAK1212-8 1 1
Q18 Q19
470_0805_5%
470_0805_5%
1 C439 C440 1 C441 C442
2
2 1U_0402_6.3V4Z 4.7U_0805_10V4Z 2 1U_0402_6.3V4Z 4.7U_0805_10V4Z
2 2 2 2 R343
1 5 3 5 3 1
R342
0.1U_0402_16V4Z
@1 1 R344 2 +VSB 1 R346 2 +VSB

4
3 1
3 1
0.01U_0402_25V7K
47K_0402_5% 47K_0402_5%
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 1 1 1
6
0.022U_0402_16V7K
C529 C447
1
C446 C448 C449 R349 Q7A
2 R348 Q6A Q6B 200K_0402_5% Q7B
2 2 SUSP 2 2 @ SUSP
2 5 2 5
330K_0402_5% 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
4
4/2 MP:For EMI ESD solution 2/25 PVT:Change C447 with 0.022uF 3/23 For EMI ESD solution
+3VS TO +3VS_PRIME
+3VS +3VS_PRIME
@ +5VALW
R977 1 2 0_0805_5% +5VALW
SI7326DN-T1-E3_PAK1212-8
2
Q20
1 R362 R978
2 100K_0402_5% 100K_0402_5%
2
10U_0805_10V6K
1U_0402_6.3V4Z
5 3 1 1
1 R979
1
2 C1122 C1123 470_0603_5% SYSON# 2
<6> SYSON#
C1121 @ VGATE#
4
10U_0805_10V6K 2 2
1 1
6
2
D Q28B
2 SUSP Q45A
G SYSON 5 2N7002DW-T/R7_SOT363-6 2
<24,32> SYSON <9,13,24,33,34> VGATE
2
S Q44
3
+VSB 1 R186 2 2N7002_SOT23-3 2N7002DW-T/R7_SOT363-6
1
@ R402
47K_0402_1% 1 10K_0402_5%
3
C1124
1
Q45B
0.1U_0402_25V7K~D
VGATE# 2
5
2N7002DW-T/R7_SOT363-6
4
+5VALW #DVT change to 470 ohm for

+VS power leakage +1.5V TO +1.5VS
2
+GFX_CORE +1.5VS +1.8VS

R361 +1.5V +1.5VS
470_0603_5%
2
3 @ R603 R363@ R604@ 3

1
470_0603_5% 470_0603_5% 470_0603_5% SI7326DN-T1-E3_PAK1212-8 1 2

SUSP Q33 C1059
<32> SUSP
1 C1060
1
1
6
2 10U_0805_10V4Z
2 1
5 3
6
Q28A
2 @ Q25B @ Q31B 1U_0402_6.3V4Z
<24,33> SUSP#
@Q31A
4.7U_0805_10V4Z
4
2
2N7002DW-T/R7_SOT363-6 2 SUSP 5 SUSP 5 SUSP

1
C1061 8/31 Change Q20 from SB000002880 to SB00000DW00 for HW design

R401 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
1
10K_0402_5% 2 200K_0402_5% 1 R605 2 +VSB

47K_0402_5%
1
1
+3VALW
1
R606 C1062
2
2/6 DVT: Reserve +1.5VS,+1.05VS,+0.75VS,+1.8VS discharge circuit 0.01U_0402_25V7K
2 R607
2
10K_0402_5%
3
+1.05VS
+0.75VS +1.5V
1
8/14 R237 for HW design
2
5
2
@ @ R365@ Q35B
6
R366 R367 1 470_0603_5% 1 2N7002DW-T/R7_SOT363-6
4
470_0603_5% 470_0603_5% @ @
C533 C532
1
1U_0402_6.3V4Z 1U_0402_6.3V4Z Q35A 2 SUSP#

6 1
4 2 2 4
7/9 Add Q29, Q30, R228 for Intel power sequence 2N7002DW-T/R7_SOT363-6
1
1
@Q25A D D
2 SUSP @ Q26 2SYSON# @ Q24 2 SUSP
G G
2N7002DW-T/R7_SOT363-6 2N7002_SOT23 S 2N7002_SOT23 S Security Classification Compal Secret Data Compal Electronics, Inc.
1

SCHEAMTIC MB A6856
Custom A
4019CG
A B C D E
A B C D
VIN
PL1
PF1 SMB3025500YA_2P
DC301001M80 DC_IN_S1 1 2 DC_IN_S2 1 2
PJP1 5A_24V_0466005.NR
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
1
+
PC4
PC1
PC2
PC3
1 1
2
-
@ SINGA_2DW-0005-B03
VIN
2
PD3
RLS4148_LL34-2
1
1
1
PQ4 PR8 PR9
68_1206_5% 68_1206_5%
BSS84_SOT23-3
2
PD4
2 1 N1 3 1
BATT+ VS
2 2
RLS4148_LL34-2
1
PR10 PC6
1
100K_0402_1% 0.22U_0603_25V7K PC5
2
0.1U_0603_25V7K
2
2
PR11
<26> 51_ON# 1 2
22K_0402_1%
PJ332 PJ152
+3VALWP 2 2 1 1 +3VALW +1.5VP 2 2 1 1 +1.5V
@ JUMP_43X118 @ JUMP_43X118
(6A,240mils ,Via NO.= 10) (4.1A,180mils ,Via NO.= 12)
(OCP min=8A) (OCP min=6.03A)
PJ352 PJ402
+5VALWP 2 2 1 1 +5VALW +1.05VSP 2 2 1 1 +1.05VS
3 3
@ JUMP_43X118 @ JUMP_43X118
(5.5A,220mils ,Via NO.= 10) (3.5A,140mils ,Via NO.=7)
(OCP min=7.8A)
PJ182
PJ5 2 1
+1.8VSP 2 1 +1.8VS
+VSBP 2 1 +VSB
2 1
@ JUMP_43X118
@ JUMP_43X39
(3A,120mils ,Via NO.= 1)
(120mA,40mils ,Via NO.= 1)
PJ75 PJ502
+0.75VSP 2 2 1 1 +0.75VS +GFX_COREP 2 2 1 1 +GFX_CORE
@ JUMP_43X79 @ JUMP_43X118
4 PJ331 PJ503 4
2 1 +CPU_COREP 2 2 1 1 +CPU_CORE
+3VLP 2 1 +3VL
@ JUMP_43X39 @ JUMP_43X118
(100mA,40mils ,Via NO.= 2) (3A,120mils ,Via NO.= 1)

SCHEAMTIC MB A6856
Size
Document Number Rev
A B C D
A B C D
7A_24VDC_429007.WRML VMB 1
PL2 PH1 under CPU botten side :

PJP2 PF2 SMB3025500YA_2P
9 9 BATT_S1 1 2 1 2 BATT+
CPU thermal protection at 95 degree C
8
8
7 7 Recovery at 56 degree C
6 BATT_P4
6 BATT_P5
5 5
EC_SMDA
1
10 GND 4 4
11 3 EC_SMCA PC7 PC8
1
GND 3 0.01U_0402_25V7K
2 1000P_0402_50V7K
2 PR14
2
1 1 1K_0402_1%
@ SUYIN_200045MR009G171ZR
2
PD6
VL
1
PJSOT24C_SOT23-3
1
PD5 2
PJSOT24C_SOT23-3 1 PR15
3
1
PR16 19.6K_0402_1%
6.49K_0402_1% PC9
3
2
2 1 0.1U_0402_25V6
2
+3VL
2
PR18
1
8.66K_0402_1%
PR19 PU1
1
2 2
1 8
1
1K_0402_1% VCC TMSNS1
PH1
2 7
2
GND RHYST1
2
100K_0402_1%_NCP15WF104F03RC
PR20 PR21 BATT_TEMPA <24> 3 6
2
OT1 TMSNS2
100_0402_1% 100_0402_1%
4 OT2 RHYST2 5
<31> VS_ON
1
G718TM1U_SOT23-8
EC_SMB_DA1 <24>
EC_SMB_CK1 <24>
PQ5
BSS84_SOT23-3
B+ 3 1 +VSBP
3 3
0.22U_0603_25V7K
100K_0402_1%
1
PC10
1
1
PR23
PC11 @
VL @ 0.1U_0603_25V7K
2
2
2
PR24
2
1 2
PR25 22K_0402_1%
100K_0402_1%
1
D
PR26
1 2 2 PQ6
<13,31> POK
G SSM3K7002FU_SC70-3
0_0402_5%
S
3
1
@ PC12
.1U_0402_16V7K
2
4 4

SCHEAMTIC MB A6856
Size
Document Number Rev
A B C D
A B C D
10U_1206_25V6M
10U_1206_25V6M
PC228 47P_0402_50V8J
1
1
PC209
PC227
PR215
B+ CHG_B+
P2 PQ204 P3 0.05_1206_1% PQ207
PD203
2
AO4407A_SO8 PL201 AO4435_SO8
VIN 2 1 1 8 1 4 2 1 1 8
2 7 PC225 PC226 1.2UH_1231AS-H-1R2N=P3_2.9A_30% 2 7
3 6 2 3 CSIN 3 6
B340A_SMA2
2200P_0402_50V7K
10U_1206_25V6M
5 0.1U_0402_25V6 5
PC224 47P_0402_50V8J
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
0.1U_0402_25V6
CSIP
1
4
4
1
1
1 1
PC231
PC232
1
PC233
1
PC208
PC222
PC207
VIN
2
PC211 PR236
1 2
2
VIN
2
1
2
5600P_0402_25V7K
2
47K_0402_1%
0.1U_0603_25V7K
1
1
2
6251VDD
PR210
200K_0402_1% PR212 PR226 PR237
2
ACSETIN
PC210
200K_0402_1% 191K_0402_1% 10K_0402_1%
2.2U_0603_6.3V6K
2
PD201
1
1000P_0402_25V8J
RB751V-40_SOD323-2 ACSETIN
1
PC212
1 1
3
1
1
PC217
47K
2
PR228
PR227 14.3K_0402_1%
2 47K
2
PR216 10_1206_5%
2
PQ210 10K_0402_1%
2
<24> FSTCHG 2 1 PU200
1
1
PDTA144EU_SOT323-3 PC218
1 24 DCIN 2 1
1
VDD DCIN
1
1
0.1U_0603_25V7K
PR213 PR217 PQ215
BATT_ON 2 2 23 ACPRN 2
PQ211 150K_0402_1% 100K_0402_1% ACSET ACPRN DTC115EUA_SC70-3
DTC115EUA_SC70-3 PR229 20_0402_5%
2
2
6251_EN 3 22 1 2 CSON
6
D EN CSON
1
PC219 PQ201
3
3
5
2
AON7408L_DFN8-5
0.047U_0402_16V7K PR238
G CSOP
4 21 1 2
1
CELLS CSOP 100K_0402_1%
PR230 20_0402_5%
S PQ212A PC213
1
2
2 DMN66D0LDW-7_SOT363-6 1 2 5 20 PR2312 1 20_0402_5% 2
ICOMP CSIN
2
PC220 4
PQ212B PC214 PR218 6800P_0402_25V7K BATT_ON
0.1U_0603_25V7K
DMN66D0LDW-7_SOT363-6 1 2 1 2 6 19 1 2
1
VCOMP CSIP PL202
3
D
10K_0402_1% PR232 2_0402_5% PR235
5 0.01U_0402_25V7K PR219 10UH_MPL73-100_3A_20% BATT+
3
2
1
G 1 2 7 18 LX_CHG 1 2 CHG 1 4
<24> ADP_I ICM PHASE
47K_0402_1%
1
5
S PC215 PQ202 2 3
4
PR211 1 2 6251VREF 8 17 DH_CHG

47K_0402_1% PR220 VREF UGATE PR206
AON7408L_DFN8-5
0.02_1206_1%
10U_1206_25V6M
10U_1206_25V6M
PACIN 1 2 309K_0402_1% .1U_0402_16V7K PR205 PC205 4.7_1206_5%
BST_CHG 1 BST_CHGA 2
2200P_0402_50V7K
<24> IREF 2 1 9 16 2 1
2
CHLIM BOOT
0.1U_0402_25V6
0_0603_5% 4
0.01U_0402_25V7K
1
1
0.1U_0603_25V7K
1
PC202
PC203
PC204
PC229
PR222 PD202
1
1
6251VREF
1 2 6251aclim 10 15 6251VDDP PC206
ACLIM VDDP
1
PQ213 RB751V-40_SOD323-2
PC216
2
24.9K_0402_1%
2
680P_0603_50V7K
2
DTC115EUA_SC70-3 PR221 1 2 6251VDD
2
3
2
1
ACOFF 2 100K_0402_1% 11 14 DL_CHG PR233 4.7_0603_5%
<24> ACOFF
2
VADJ LGATE
1
2
2
PC221
PR223 12 13 4.7U_0603_6.3V6M
1
GND PGND
20K_0402_1%
3
ISL6251AHAZ-T_QSOP24
CP mode PR224
<24> CHGVADJ 1 2
3 Iada=0~1.579A(30W) CP= 92%*Iada; CP=1.45A 15.4K_0402_1% 3
2
Vaclim=1.08132V(30W) PR70=53.6k PR216=0.05

PR225
31.6K_0402_1%
VIN
1
6251VDD
CC=0.25A~2A CHGVADJ=(Vcell-4)*9.455
IREF=1.636*Icharge Vcell CHGVADJ
IREF=0.409V~3.272V 4V 0V
1
PR241
1
VCHLIM need over 95mV 4.2V 1.898V 10K_0402_1% PR246

PR240 1 2
- 4.35V 3.309V 47K_0402_1% PR242 ACIN <13,24> 309K_0402_1%
10K_0402_1% PR247
2
10K_0402_1%
2
Ki PACIN 1 2 ADP_V <24>

Vchlim=Iref*(PR221/(PR220+PR221))
1
=Iref*(100K/(309K+100K))
1
PQ214
Vin Detector
1
=Iref*0.2444 DTC115EUA_SC70-3 PR248 PC223
1
Ichanrge=(165mV/PR235)*(Vchlim/3.3V) 47K_0402_1% .1U_0402_16V7K

ACPRN 2
=(165m/20m)*(1/3.3V)*Iref*0.5537 PR243
2
14.3K_0402_1% High 18.089V
2
=0.611*Iref
Iref=1.636*Ichanrge =>Ki=1.636 Low 17.44V
2
3
Kv
4 4
Rinternal ic=514K Rec=3K R1=PR224=15.4K R2=PR225=31.6K
R=514K//31.6K//(15.4K+3k)=11.372K
r=514K//514K//31.6K=28.14K
Vcell=0.175*Vadj+3.99v
4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))
1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899 Security Classification Compal Secret Data Compal Electronics, Inc.
1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv Issued Date 2010/01/25 Deciphered Date 2009/04/28 Title
A=Vref*(R/(R+514K))=0.052 SCHEAMTIC MB A6856
Kv=9.455 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D
5 4 3 2 1
2VREF_6182
D D
1
PC363
1U_0402_6.3V6K
2
PR362 PR364
13K_0402_1% 30K_0402_1%
1 2 1 2
PR363 PR365
UP6182_B+ 20K_0402_1% 19.1K_0402_1%
1 2 1 2 UP6182_B+
PL331
HCB2012KF-121T50_0805
ENTRIP1
ENTRIP2
B+ 1 2 +3VLP PR337 PR357
2200P_0402_50V7K
120K_0402_1% 120K_0402_1%
10U_1206_25V6M
PC374 0.1U_0402_25V6
PC375 47P_0402_50V8J
2200P_0402_50V7K
10U_1206_25V6M
1 2 1 2
0.1U_0402_25V6
1
1
PC372
PC366
PC368
1
4.7U_0603_6.3V6K
5
5
2
2
1
AON7408L_DFN8-5 PQ331 PQ351
PC361
VREF
2
ENTRIP2
VFB2
VFB1
ENTRIP1
TONSEL
2
C C
25
2
P PAD
PC367
PC360
4 4
7 VO2 VO1 24 POK <13,29>
PC335 8 VREG3 PGOOD 23 PC355

PR335 PR355 AON7408L_DFN8-5
1
2
3
3
2
1
0.1U_0603_25V7K
1 2 1 2 BST_3V 9 VBST2 VBST1 22 BST_5V 1 2 1 2 0.1U_0603_25V7K
PL332 0_0603_5% 0_0603_5% PL352
UG_3V 10 21 UG_5V
4.7UH_FDVE0630-H-4R7M=P3_5.5A_20% DRVH2 DRVH1 4.7UH_FDVE0630-H-4R7M=P3_5.5A_20%
LX_3V LX_5V
+5VALWP
+3VALWP 1 2 11 LL2 LL1 20 1 2
5
5
1
1
PQ332 LG_3V 12 19 LG_5V PQ352
S CER CAP 0.1U 25V K X5R 0402

DRVL2 DRVL1
2200P_0402_50V7K
@ PR336
SKIPSEL
@ PR356
150U_B2_6.3VM_R35M
VREG5
PU330
0.1U_0402_25V6
4.7_1206_5% 4.7_1206_5%
VCLK
1
GND
1
EN0
VIN
PC373
1
4 4
1
2
PC369
+ +
PC352
PC332 TPS51125ARGER_QFN24_4X4
PC371
PR360
13
14
15
16
17
18
1
1
499K_0402_1%
2
150U_B2_6.3VM_R35M @ PC336
2
2
2 @ PC356 2
AON7702L_DFN8-5 1 2 AON7702L_DFN8-5
B+
1
2
3
3
2
1
680P_0603_50V7K 680P_0603_50V7K
2
2
Ipeak=6A
100K_0402_5%
1
1
Imax=4.2A VL
PR361
PC362
F=375KHz
1
1U_0402_6.3V6K
PC364
2
B Total Capacitor 150uF, 4.7U_0603_6.3V6K
B
2
ESR 35mohm ENTRIP1 ENTRIP2 UP6182_B+ Ipeak=5.5A
2
Imax=3.85A
F=300KHz
6
D
3
PQ360A
2 5 Total Capacitor 150uF,
G G PQ360B
ESR 35mohm
1
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 PC365
S S
2VREF_6182
1
0.1U_0603_25V7K
2
PR370
VL 2 1
100K_0402_1%
1
<29> VS_ON PQ361

DTC115EUA_SC70-3
PR371
VS 1 2 2
100K_0402_1%
42.2K_0402_1%
1
1
PR372
@ PC370
0.1U_0402_16V4Z
2
2
A A

SCHEAMTIC MB A6856
5 4 3 2 1
A B C D
1 1
PL151
HCB2012KF-121T50_0805
1.5_B+ 1 2 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
2200P_0402_50V7K
0.1U_0402_25V6
1
1
1
1
PC163
1
PC168
PC164
PC165
5
PC169
PQ151
2
2
2
2
PR164
255K_0402_1%
4
1 2
PR160
<24,27> SYSON 1 2 PR155
BST_1.5V 1 2 AON7408L_DFN8-5
0_0402_5%
3
2
1
0_0603_5%
1
PL152
15
14
PC160 @
1
PU150 PC155 S COIL 2.2UH +-20% PCMC063T-2R2MN 8A
.1U_0402_16V7K BST_1.5V-1 1 2 2 1 +1.5VP
EN_SKIP
TP
BST
2
2 13 DH_1.5V 0.1U_0603_25V7K
PC170 2200P_0402_50V7K
TON DH
3 12 LX_1.5V Ipeak=4.5A
OUT LX
220U_B2_2.5VM_R25M
PR161 PR157 Imax=3.15A
0.1U_0402_25V6
1 2 4 11 1 2 PQ152 PR156 1
+5VALW VCC ILIM +5VALW 4.7_1206_5%
1
VFB=0.75V F=313KHz
1
100_0603_5% 8.2K_0402_1%
PC152
PC167
5 10 +
2 FB VDD Total Capacitor 220uF, 2
2
1
2
DL_1.5V
2
PC161 <6> SM_PWROK 6 PGOOD DL 9 4 ESR 25mohm
2
AGND
PGND
4.7U_0603_6.3V6K
2
AON7702L_DFN8-5
2
1
1 PC162 PC156
G5603RU1U_TQFN14_3P5X3P5 4.7U_0805_10V6K 680P_0603_50V7K
3
2
1
2
PR165
10K_0402_1%
2
+1.5VP
PR162
1 2
10K_0402_1%
1
PR163
10K_0402_1%
2
3
+1.5V 3
1
PJ76
1
JUMP_43X79
@
2
2
PU75
1 VIN VCNTL 6 +3VALW
PC260 2 5
GND NC
2
4.7U_0805_6.3V6K
1
3 7 PC261
PR261 VREF NC
1
1K_0402_1% 4 8 1U_0603_10V6K
VOUT NC
9
2
TP
G2992F1U_SO8
.1U_0402_16V7K
PR262
+0.75VSP
1
D
SSM3K7002FU_SC70-3
0_0402_5%
PQ261
1K_0402_1%
PC263
1 2 2
<27> SUSP
1
G
2
S PR263 PC264
3
1
10U_0603_6.3V6M
2
PC262
.1U_0402_16V7K
2
4 4
For shortage changed

SCHEAMTIC MB A6856
A B C D
A B C D
1 1
+3VALW +5VALW
1
PJ181
@ JUMP_43X39
1
2
1U_0603_10V6K
PC181
2
2
2 2
1
PC182
2
4.7U_0805_25V6-K
PU180
6 VCNTL
5 VIN VOUT 3 +1.8VSP
PR184 9 4
VIN VOUT
0.01U_0402_25V7K
0_0402_5%
PC183
<9,13,24,27,34> VGATE 1 2 8 EN
22U_0805_6.3V6M
7 2 PR182
GND
POK FB
1
3K_0402_1%
2
1
PC184
@ PC185
2
APL5930KAI-TRG_SO8
2
0.47U_0402_6.3V6K
1
PR183
VCCP_POK 2.4K_0402_1%
+3VS
2
10K_0402_1%
2
PR410
1
3 3
PU400
SY8033BDBC_DFN10_3X3 PL400
4
@ PJ400 1UH_PCMC063T-1R0MN_11A_20%
+5VALW 2 1 10 2 LX_1.05V 1 2 +1.05VSP Ipeak=3.5A
PG
2 1 PVIN LX
ILIM = 2.45A
68P_0402_50V8J
JUMP_43X39 9 3
PVIN LX
1
F=1MHz
4.7_1206_5%
1
1
PC402
PC405 8 SVIN Total Capacitor66uF,
PR403
22U_0805_6.3V6M PR404
22U_0805_6.3V6M
6 10K_0402_1%
22U_0805_6.3V6M
2
2
FB
5
2
EN
1
NC
NC
TP
PC404
PC403
2
FB=0.6Volt FB_1.05V
680P_0603_50V7K
11
2
PR402
1
<24,27> SUSP# 1 2 EN_1.05V
1
PC406
0_0402_5% PR405
13.7K_0402_1%
1
2
1
@ PR401 PC401@
2
499K_0402_1% 0.1U_0402_10V7K
2
2
Pin 1 define same with Pin 2 & Pin 3 that just for SY8035 ,
4
SY8035 is for 5A loading , let LX shape can bigger!! 4

SCHEAMTIC MB A6856
A B C D
A B C D E F G H
+CPU_CORE
1
PR528 PR526
100_0402_5% 100_0402_5%
2
<8> VSSSENSE VCCSENSE <8>
1
PR529 PR527
+5VALW 0_0402_5% 0_0402_5%
1 1
2
1
PR525
10_0402_1%
1
VCC
2
VCC PR530 PC511
1
0_0402_5% PL501
1
PR540 PR520 PR521 PR522 PR523 PR531 560P_0402_50V7K PR537 PR538 +CPU_B+ HCB2012KF-121T50_0805
162K_0402_1%
10U_0805_25V6K
10U_0805_25V6K
PC512 @ 130K_0402_1% 4.7_0402_1%
2
0_0402_5%
150K_0402_1%
51K_0402_1%
10K_0402_1%
10K_0402_1%
2.2U_0603_10V6K 1 2 1 2 1 1 2 B+
47U_25V_M
0.1U_0402_25V6
2
2
PC549
PC536
PC552
PC550
PR532 +
1
@ PR535
1
PR533
1
2
0_0402_5%
10K_0402_1%
RNTC1N
0_0402_5% PC566
2
SETINIA 0.1U_0402_25V6
RNTC1P 2
5
2
SETINI
2
TEMPMAX PR505 PC505
0_0603_5% 0.22U_0603_10V7K PQ501
ICCMAX 1 2 1 2 4 AON7408L_DFN8-5
ICCMAXA +CPU_COREP
PL502
1
1
PR599 PR598 PR517 PR518 PR519 1UH_PCMC063T-1R0MN_11A_20%
3
2
1
1
33K_0402_1%
2.2K_0402_1%
5.1K_0402_1%
@ @ PR534 1 2
0_0402_5%
0_0402_5%
PR536 0_0402_5%
1
30K_0402_1%
2
2
@ PR506 PH505
2
PC502 4.7_1206_5% 10K_0402_1%_ERTJ0EG103FA
2
68P_0402_50V8J
VCC RNTC1N
1 2RNTC1P
1 2
4 PR541
1.33K_0402_1%
2
10K_0402_1%_ERTJ0EG103FA PQ502
10K_0402_1%_ERTJ0EG103FA
AON7702L_DFN8-5 @ PC506 PR543 @ PR542 @
1
10K_0402_1%
680P_0603_50V7K 0_0402_5% 0_0402_5%
3
2
1
2
1
PR544 @ 0_0402_5% PR545 @ 0_0402_5%
1
2
1
2 10K_0402_1% PR587 1 2 1 2 2
PH503
PH502
PR586
VCC PC534
0.1U_0402_25V6
1 2
2
PR546 0.1U_0402_25V6
1
10K_0402_1%
10K_0402_1% 1 2
1
PR539
PC544
10
2
9
1
PU500
1
510_0402_1%
0.1U_0402_25V6
SETINIA
VCC
GFXPS2
RGND
FB
COMP
ISEN1N
ISEN1P
TONSET
BOOT1
2
2
PC530 PR588
1
510_0402_1%
0.1U_0402_25V6
PC535
2
PR589
1
41
2
GND
1
1
11 40 PC513
2
SETINI UGATE1 +5VALW
2.2U_0603_10V6K
12 39
2
TMPMAX PHASE1
1 2
PR582 OCSET 13 38 PR547
PR584 430_0402_1% 6.04K_0402_1% ICCMAX LGATE1 0_0603_5%
VCC 1 2 1 2 14 37
ICCMAXA PVCC PVCC
15 TSEN LGATEA 36
1
10K_0402_1%
PH501
1 2 16 RT8165BGQW_WQFN40_5X5 35
PR580 OCSET PHASEA
VR_ON <24>
10K_0402_1%_ERTJ0EG103FA 17 34
TSENA UGATEA
2
18 OCSETA BOOTA 33
PR550 0_0402_5% +CPU_B+
PR583 OCSETA 19 32 1 2 PR552 PR553
PR585 680_0402_1% 17.4K_0402_1% IBIAS EN 130K_0402_1% 2.2_0402_1%
1
10U_0805_25V6K
10U_0805_25V6K
VCC 1 2 1 2 PC543 PR590 20 31 1 2 1 2 PC537
VRHOT TONSETA
2
56K_0402_1%
0.1U_0402_25V6
0.1U_0402_25V6
1
5
10K_0402_1%
PH500
2
VRA_READY
PC546
PC548
1 2 PR581 VR_READY PC545
1
0.1U_0402_25V6
2
2
ISENAN
COMPA
ISENAP
10K_0402_1%_ERTJ0EG103FA PC515
RGNDA
ALERT
1
VCLK
0.22U_0603_10V7K
VDIO
2
FBA
1 2 1 2 4
+1.05VS PR515 0_0603_5%
3 PR576 75_0402_1% PQ503 3
21
22
23
24
25
26
27
28
29
30
1 2 VR_HOT AON7408L_DFN8-5
VR_HOT <7> +GFX_COREP
PL503
3
2
1
PR574 10K_0402_1% 1UH_PCMC063T-1R0MN_11A_20%
1 2 VGATE 1 2
GFXPG
5
PR575 10K_0402_1% SVID_ALERT#
1 2 SVID_DATA
1
SVID_CLK
PR577 150_0402_1% PH504
1 2 PR516 @ 10K_0402_1%_ERTJ0EG103FA
2
4 4.7_1206_5% RNTCAP1 2RNTCAN
PR578 130_0402_1% PR556
1 2
1
2
1 2 1.33K_0402_1%
1
PC565 PQ504 PR559 @ PR560 @

PR573 120P_0402_50V8 AON7702L_DFN8-5 PC516 @ 0_0402_5% 0_0402_5%
1 2
3
2
1
1
18K_0402_1%
1 2 680P_0603_50V7K
1
PR579 130_0402_1% PR563 PR557 @ 0_0402_5% PR558 @ 0_0402_5%
2
0_0402_5% 1 2 1 2
RNTCAN
RNTCAP
PC538
2
<7> SVID_ALERT# 0.1U_0402_25V6

1 2
<7> SVID_DATA PR561 0_0402_5%
1
PR565 PR566 PR572 1 2

1
10K_0402_1%
<7> SVID_CLK @ @
1
PR564
0_0402_5%
0_0402_5%
0_0402_5% PC541 PR562 @ 0_0402_5%

GFXPG
0.1U_0402_25V6 1 2 VCC
2
2
<9,13,24,27,33> VGATE
2
1
PR567
0_0402_5%
PC514
2
560P_0402_50V7K
2
1
4 4
PR570 PR568
0_0402_5% 0_0402_5%
2
<8> VSS_GFXSENSE VCC_GFXSENSE <8>

1
PR571 PR569
10_0402_5% 10_0402_5%
COMPAL Electronics Inc

2
Security Classification Compal Secret Data

+GFX_COREP
SCHEAMTIC MB A6856
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A2 4019CG A
A B C D E F G H

Compal Confidential

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A B C D E

Security Classification Compal Secret Data Compal Electronics, Inc.

Fan Control ICS9LVRS387AKLFT MLF

LED Conn. LVDS

Security Classification Compal Secret Data Compal Electronics, Inc.

EC SM Bus1 address EC SM Bus2 address

ICH7M SM Bus address

Clock Generator 1101 001Xb

Security Classification Compal Secret Data Compal Electronics, Inc.

2010/06/27 2011/6/27 Title

B+ DESIGN CURRENT 250mA Cougar Power Map

Ipeak=3.98A, Imax=2.8A +5VALWP +-5%

APL5930KA DESIGN CURRENT 151mA

N-CHANNEL DESIGN CURRENT 294mA

SY8033BDBC Ipeak=1.308A, Imax=4A +1.05VSP +-5%

B Imax=3.5A DESIGN CURRENT 4500mA +CPU_COREP B

RT8165BGQW DESIGN CURRENT 2000mA +GFX_COREP

DESIGN CURRENT 500mA

Security Classification Compal Secret Data Compal Electronics, Inc.

<10> DDR_A_DQS[0..7] U1B

+1.5V pull up must be placed DDR_A_WE# AH10 AE29 DDR_A_D17

Security Classification Compal Secret Data Compal Electronics, Inc.

F11 DDI1_TXN0 LVDS_VREFL H3 HPLL_REFCLK K19 CLK_CPU_HPLCLK# CLK_CPU_HPLCLK# <9>

K13 DDI1_TXN3 LVDS_TXP2 H7 LCD_TXOUT2+ <16>

BREF_1.5V 0_0402_5% R962 XDP_TMS_R D24 TDO SVID_DATA

<13> HDA_BITCLK_CPU AZIL_BCLK RSVD_R5

VCC_CPU_18 U22 AC10 VSS VSS L7

+VCCADP_1.05 B5 V29 AD5 N27

D6 VCCADP_3 AE1 VSS VSS N4

0_0603_5% VCC_GFX_06 R9 AF11 VSS VSS U5

D31 VCCAGPIO_2 VCC_GFX_08 T13 AF21 VSS VSS U9

VCCADMI_3 A4 AH28 VSS VSS W22

C AH9 VSS VSS W24 C

R530 N16 +VCCATHRM 1 2 B10 AJ1

G15 VSS VSS_CDVDET L14

C979 C980 C981 C982 G17 D13

1 2 +VCCAGPIO1.8V C153 22P_0402_50V8J

0_0603_5% 2 2 Close Chipset pin

+1.5VS +1.5VS +1.5VS

R924 R925 R926

Security Classification Compal Secret Data Compal Electronics, Inc.

@ 2010/06/27 2011/6/27 Title

+3VM_CK505 2010.03.23 Change R81 from bead to 0 ohm

56 CLK_PCIE_WLAN# LAN_CLKREQ# R101 2 1 10K_0402_5%

FSB <13> H_STP_PCI# PCI_STOP# @ C1067 56P_0402_50V8

R608 1 2 H_STP_PCI#_R 1 2 63 CPU_ITP#

R489 7/13 Add 33pF to GND for RF request 1 2 48 CLK_PCIE_WWAN

@ R491 Pin28/29 : 27M/27M_SS 69 58 WLAN_CLKREQ#

+DIMM_VREF +1.5V +1.5V

<6> DDR_A_D[0..63] JDDR1

1 1 1 1 DDR_A_D32 131 132 DDR_A_D33

DDR_A_DQS#4 135 136 DDR_A_DM4

201 202 CLK_SMBCLK

R208 205 206 0.65A@0.75V

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

PORT #EVT DEVICE

TIGERPOINT_ES1_BGA360 USB20_P5_L 4 3 USB20_P5

Security Classification Compal Secret Data Compal Electronics, Inc.

2.2K_0402_5% 1 R560 2 PCH_SMBCLK 33_0402_5%

C1027 LAN_TXD2 RI# T42

1K_0402_5% 1 R585 2 MCH_SYNC#

+RTCBATT @ U5 @ D7B @D7A

A 1 GND R126 @ R590

　D28 remove and add CL23 4.7U