Wikirer435

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Interview with Ward Cunningham, inventor of the wiki

A wiki (/ˈwɪki/ ( listen) WIK-ee) is a website on which users collaboratively modify

content and structure directly from the web browser. In a typical wiki, text is written
using a simplified markup language and often edited with the help of a rich-text
editor.[1]

A wiki is run using wiki software, otherwise known as a wiki engine. A wiki engine is a
type of content management system, but it differs from most other such systems,
including blog software, in that the content is created without any defined owner or
leader, and wikis have little inherent structure, allowing structure to emerge according
to the needs of the users.[2] There are dozens of different wiki engines in use, both
standalone and part of other software, such as bug tracking systems. Some wiki engines
are open source, whereas others are proprietary. Some permit control over different
functions (levels of access); for example, editing rights may permit changing, adding, or
removing material. Others may permit access without enforcing access control. Other
rules may be imposed to organize content.

The online encyclopedia project Wikipedia is the most popular wiki-based website, and
is one of the most widely viewed sites in the world, having been ranked in the top ten
since 2007.[3] Wikipedia is not a single wiki but rather a collection of hundreds of wikis,
with each one pertaining to a specific language. In addition to Wikipedia, there are tens
of thousands of other wikis in use, both public and private, including wikis functioning
as knowledge management resources, notetaking tools, community websites, and
intranets. The English-language Wikipedia has the largest collection of articles; as of
September 2016, it had over five million articles. Ward Cunningham, the developer of
the first wiki software, WikiWikiWeb, originally described it as "the simplest online
database that could possibly work".[4] "Wiki" (pronounced [ˈwiki][note 1]) is a Hawaiian
word meaning "quick".[5][6][7]

QPI is an uncore component in Intel's Nehalem microarchitecture

The QPI is an element of a system architecture that Intel calls the QuickPath
architecture that implements what Intel calls QuickPath technology.[11] In its simplest
form on a single-processor motherboard, a single QPI is used to connect the processor
to the IO Hub (e.g., to connect an Intel Core i7 to an X58). In more complex instances
of the architecture, separate QPI link pairs connect one or more processors and one or
more IO hubs or routing hubs in a network on the motherboard, allowing all of the
components to access other components via the network. As with HyperTransport, the
QuickPath Architecture assumes that the processors will have integrated memory
controllers, and enables a non-uniform memory access (NUMA) architecture.

Each QPI comprises two 20-lane point-to-point data links, one in each direction (full
duplex), with a separate clock pair in each direction, for a total of 42 signals. Each
signal is a differential pair, so the total number of pins is 84. The 20 data lanes are
divided onto four "quadrants" of 5 lanes each. The basic unit of transfer is the 80-bit flit,
which is transferred in two clock cycles (four 20 bit transfers, two per clock.) The 80-bit
flit has 8 bits for error detection, 8 bits for "link-layer header", and 64 bits for data. QPI
bandwidths are advertised by computing the transfer of 64 bits (8 bytes) of data every
two clock cycles in each direction.[8]

Although the initial implementations use single four-quadrant links, the QPI
specification permits other implementations. Each quadrant can be used independently.
On high-reliability servers, a QPI link can operate in a degraded mode. If one or more of
the 20+1 signals fails, the interface will operate using 10+1 or even 5+1 remaining
signals, even reassigning the clock to a data signal if the clock fails.[8] The initial
Nehalem implementation used a full four-quadrant interface to achieve 25.6 GB/s,
which provides exactly double the theoretical bandwidth of Intel's 1600 MHz FSB used
in the X48 chipset.

Although some high-end Core i7 processors expose QPI, other "mainstream" Nehalem
desktop and mobile processors intended for single-socket boards (e.g. LGA 1156 Core
i3, Core i5, and other Core i7 processors from the Lynnfield/Clarksfield and successor
families) do not expose QPI externally, because these processors are not intended to
participate in multi-socket systems. However, QPI is used internally on these chips to
communicate with the "uncore", which is part of the chip containing memory
controllers, CPU-side PCI Express and GPU, if present; the uncore may or may not be
on the same die as the CPU core, for instance it is on a separate die in the Westmere-
based Clarkdale/Arrandale.[12][13][14][15]:3 These post-2009 single-socket chips
communicate externally via the slower DMI and PCI Express interfaces, because the
functions of the traditional northbridge are actually integrated into these processors,
starting with Lynnfield, Clarksfield, Clarkdale and Arrandale; thus, there is no need to
incur the expense of exposing the (former) front-side bus interface via the processor
socket.[16] Although the core–uncore QPI link is not present in desktop and mobile
Sandy Bridge processors (as it was on Clarkdale, for example), the internal ring
interconnect between on-die cores is also based on the principles behind QPI, at least as
far as cache coherency is concerned.[15]:10