Spring'97

PROGRAMMABLE LOGIC DEVICES

A programmable logic device (PLD) is an integrated circuit with internal logic gates that are
connected through electronic fuses. Programming the device involves the blowing of fuses along
the paths that must be disconnected so as to obtain a particular configuration. The word
programming refers to a hardware procedure that specifies the internal configuration device. The
gates in a PLD are divided into an AND array and OR array that are connected together to
provide an AND-OR sum of product implementation. The initial state of a PLD has all the fuses
intact.

We will look at three types of PLDs. The three types of PLDs differ in the placement of fuses in
the AND-OR array as shown below:

The most flexible PLD is the programmable logic array (PLA), where both the AND and OR
arrays can be programmed. The product terms in the AND array may be shared by any OR gate
to provide the required sum of products implementation.

PROGRAMMABLE LOGIC ARRAYS (PLAs)

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A block diagram of the PLA shown below consists of 8 inputs, 7 outputs, 5 product terms, and
7 sum terms. The product terms constitute a group of 5 AND gates and the sum terms constitute
a group of 7 OR gates.

A typical PLA has 16 inputs, 48 product terms, and 8 outputs. The number of programmed fuses
is 28 ‚ 5 € 5 ‚ 7Þ There two types of PLAs:
1) mask-programmable PLA • custom-made PLA
2) field-programmable PLA (FPLA) • programmed by a user

The following figure show the internal construction of a specific PLA.

This circuit represent the following Boolean expressions:

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J" œ EF w € EG and J# œ EG € FG

E F G J" J# Product Inputs Outputs

! ! ! ! ! term E F G J" J#
! ! " ! ! 1 " ! • " •
! " ! ! ! 2 " • " " "
! " " ! " 3 • " " • "
" ! ! " !
" ! " " "
" " ! ! !
" " " " "

Examples:
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1) Implement the following Boolean expressions:
J! œ E € Fw G w ß J" œ F w G w € EFß J# œ EG w € EFß J$ œ Fw G € E
#Ñ PLA implementation of a 2-bit multiplier.
3) Design a function generator of three inputs that implements the logic functions
AND, OR, NAND, NOR, XOR, and XNOR:

PROGRAMMABLE ARRAYS LOGIC (PALs)

A programmable array logic (PAL) is a programmable logic device with a fixed OR array and a
programmable AND array. The PAL is easier to program but not as flexible as the PLA. The
typical PAL usually limits the number of inputs to an OR gate to 2, 4, 8, or 16.
Examples:
1) BCD to Gray-code converter
2) Two-bit comparator

Read-Only Memories (ROMs)

An read-only memory (ROM) is a device that includes both the decoder and the OR gates within
a single IC package. The connections between the outputs of the decoder and the inputs of the
OR gates can be specified for each particular configuration. The ROM is used to implement
complex combinational circuits within one IC package or as permanent storage for binary
information.

ROMs come with special internal electronic fuses that can be programmed for a specific
configuration. Once the pattern is established, it stays within the unit even when power is turned
off and on again.

A ROM consists of 8 input lines and 7 outputs lines. Each bit combination of the input
variables is called an address. Each bit combination that comes out of the output lines is called a
word. The number of bits per word is equal to number of output lines 7Þ An address is
essentially a binary number that denotes one of the minterms of 8 variables. The number of
distinct addresses possible with 8 input variables is #8 . An output word can be selected by a
unique address, and since there are #8 distinct addresses in a ROM, there are #8 distinct words
that are said to be stored in the unit. A ROM is characterized by the number of words #8 and the
number of bits per word 7Þ

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For example, a 32 ‚ 8 ROM consist of 32 words of 8 bits each. This means there are eight
output lines and that there are 32 distinct words stored in the unit. The particular word selected
that is presently available on the output lines is determined from the five inputs lines. A ROM is
sometimes specified by the total number of bits it contains, which is #8 ‚ 7Þ For example, a
2048-bit ROM may be organized as 512 words of 4 bits each. This means that the unit has four
output lines and 9 input lines to specify #* œ &"# words. The total number of the bits stored in
the unit is 512 ‚ 4 œ #!%)Þ

Examples
1) Design a combinational circuit using a ROM. This circuit accepts a 3 bit number and
generates an output binary number equal to the square of the input number.

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Inputs Outputs
E# E" E! F& F% F$ F# F" F! Decimal
! ! ! ! ! ! ! ! ! !
! ! " ! ! ! ! ! " "
! " ! ! ! ! " ! ! %
! " " ! ! " ! ! " *
" ! ! ! " ! ! ! ! "'
" ! " ! " " ! ! " #&
" " ! " ! ! " ! ! $'
" " " " " ! ! ! " %*

E# E" E! J$ J# J" J!
! ! ! ! ! ! !
! ! " ! ! ! !
! " ! ! ! ! "
! " " ! ! " !
" ! ! ! " ! !
" ! " ! " " !
" " ! " ! ! "
" " " " " ! !

2) Design a one-bit full adder using ROM.

Types of ROMs

ì Mask programming
ì Programmable read-only memory (PROM)
ì Erasable PROM (EPROM)

Assignment p.380 5.1, 5.2, 5.3