TV PLASMA LG - 42PT250B-SA Chassis PB11K PDF

Internal Use Only
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Asia/Oceania http://biz.lgservice.com
PLASMA TV
SERVICE MANUAL
CHASSIS : PB11K
MODEL : 42PT250B 42PT250B-SA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL66986905 (1101-REV00) Printed in Korea

CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................6
BLOCK DIAGRAM ...................................................................................................................13
EXPLODED VIEW ...................................................................................................................14
CIRCUIT DIAGRAM ....................................................................................................................
Copyright ©2011 LG Electronics Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the Do not use a line Isolation Transformer during this check.
servicing of a receiver whose chassis is not isolated from the AC Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
power line. Use a transformer of adequate power rating as this between a known good earth ground (Water Pipe, Conduit, etc.)
protects the technician from accidents resulting in personal injury and the exposed metallic parts.
from electrical shocks. Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
It will also protect the receiver and it's components from being Reverse plug the AC cord into the AC outlet and repeat AC
damaged by accidental shorts of the circuitry that may be voltage measurements for each exposed metallic part. Any
inadvertently introduced during the service operation. voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it In case any measurement is out of the limits specified, there is
with the specified. possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check circuit
Due to high vacuum and large surface area of picture tube, AC Volt-meter
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Good Earth Ground

Leakage Current Cold Check(Antenna Cold Check) such as WATER PIPE,
With the instrument AC plug removed from AC source, connect To Instrument's CONDUIT etc.
0.15uF
an electrical jumper across the two AC plug prongs. Place the exposed
AC switch in the on position, connect one lead of ohm-meter to METALLIC PARTS
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna
terminals, phone jacks, etc. 1.5 Kohm/10W
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application Range
(1) This spec sheet is applied all of PDP TV with PB11K chassis.
Model Name Market Brand

42PT250B-SA Brazil / chile / Peru / Venezuela / Costarica / Uruguay LG
2. Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 °C ± 5 °C
(2) Relative Humidity : 65 % ± 10 %
(3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz)
* Standard Voltage of each product is marked by models
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification
Model Name Market Appliance
42PT250B-SA Brazil / chile / Peru / Venezuela/ Costarica / Uruguay Safety : IEC / EN60065
4. General Specification
No Item Specification Remark
1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N PW350B, PV550B, PT250B
2) DVB-T PW350E, PV550E,
PT250E, PT260E
2. Available Channel 1) VHF : 02~13 PW350B, PV550B, PT250B
2) UHF : 14~69
3) DTV : 07-69 (VHF high/UHF)
4) CATV : 02~135
1) VHF : 02~13 PW350E, PV550E,
2) UHF : 14~69 PT250E, PT260E
3) DTV : 14~69 (UHF)
4) CATV : 02~135
3. Input Voltage 1)AC 100 ~ 240V 50/60Hz
4. Market Brazil / chile / Peru / Venezuela PW350B, PV550B, PT250B
/ Costarica / Uruguay
Colombia / Panama PW350E, PV550E,
PT250E, PT260E
5 Screen Size 42 inch Wide(1024 × 768) PW350B, PW350E
PT250E, PT260E
50 inch Wide(1024 × 768) PW350B, PW350E
PT250B, PT250E, PT260E
50 inch Wide(1024 × 768) PV550B, PV550E
60 inch Wide(1024 × 768) PV550B, PV550E
6. Aspect Ratio 16:9 50/42PW350B-SA
50/42PW350E-DC
7. Tuning System FS
8. Module PDP42T3 (3D)#### (1024 × 768) PW350B, PW350E
PDP42T3N (2D)#### (1024 × 768) PT250B, PT250E, PT260E
PDP50T3 (3D)#### (1024 × 768) PW350B, PW350E
PDP50T3N (2D)#### (1024 × 768) PT250B, PT250E, PT260E
PDP60R3 #### (1920 × 1080) PV550B, PV550E
PDP50R3 #### (1920 × 1080) PV550B, PV550E
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : 0 ~ 90 %
ADJUSTMENT INSTRUCTION
1. Application Range 4. PCB Assembly Adjustment

This spec. sheet applies to PB11K Chassis applied PDP TV
all models manufactured in TV factory.
4-1. Using RS-232C

- Adjust 3 items at 3-1 PCB assembly adjustments
2. Specification “ (3) Adjustment sequence” one after the order.
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation (1) Adjustment protocol
transformer will help protect test instrument. Order Command Set response
(2) Adjustment must be done in the correct order. But it is 1. Inter the aa 00 00 a 00 OK00x
flexible when its factory local problem occurs. Adjustment
mode
(3) The adjustment must be performed in the circumstance of 2. Change the XB 00 40 b 00 OK40x (Adjust 480i Comp1 )
25 cC ± 5 cC of temperature and 65 % ± 10 % of relative Source XB 00 60 (Adjust 1080p Comp1)
humidity if there is no specific designation. b 00 OK60x (Adjust 1080p RGB)
(4) The input voltage of the receiver must keep 100 V - 240 V, 3. Start ad 00 10
Adjustment
50 / 60 Hz. 4. Return the OKx ( Success condition )
(5) Before adjustment, execute Heat-Run for 5 minutes. Response NGx ( Failed condition )
5. Read data ( main ) (main : component1 480i, RGB 1080p)
V After Receive 100% Full white pattern (06CH) then Adjustment ad 00 20 00000000000000000000000007c007b006dx
process Heat-run data ( main ) (main : component1 480i, RGB 1080p)
ad 00 30 000000070000000000000000007c00830077x
(or “8. Test pattern” condition of Ez-Adjust status) 6. Confirm ad 00 99 NG 03 00x (Failed condition)
V How to make set white pattern Adjustment NG 03 01x (Failed condition)
1) Press Power ON button of Service Remocon NG 03 02x (Failed condition)
2) Press ADJ button of Service remocon. Select “10. OK 03 03x (Success condition)
7. End of ad 00 90 d 00 OK90x
Test pattern” and, after select “White” using
Adjustment
navigation button, and then you can see 100% Full
White pattern. < See ADC Adjustment RS232C Protocol_Ver1.0 >
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp distinction black with white pattern – (2) Necessary items before Adjustment items
O Pattern Generator : (MSPG-925FA)
13Ch, or Cross hatch pattern – 09Ch) then it can
O Adjust 480i Comp1
appear image stick near black level.
(MSPG-925FA:model :209, pattern :65) – Comp1 Mode
O Adjust 1080p Comp1
(MSPG-925FA:model :225 , pattern :65) – Comp1 Mode
O Addjust RGB (MSPG-925FA:model :225 , pattern :65)
3. Adjustment items – RGB-PC Mode
3-1. PCB Assembly adjustment * If you want more information then see the below Adjustment
(1) Adjust 480i Comp1 method (Factory Adjustment)
(2) Adjust 1080p Comp1/RGB
- If it is necessary, it can adjustment at Manufacture Line (3) Adjustment sequence
O aa 00 00: Enter the ADC Adjustment mode.
- You can see set adjustment status at “9. ADJUST
O xb 00 40: Change the mode to Component1 (No actions)
CHECK” of the “In-start menu”
O ad 00 10: Adjust 480i Comp
O ad 00 10: Adjust 1080p comp
3-2. Set Assembly Adjustment O xb 00 60: Change to RGB-PC mode(No action)
(1) EDID (The Extended Display Identification Data ) O ad 00 10: Adjust 1080p RGB
(2) Color Temperature (White Balance) Adjustment O xb 00 90: Endo of Adjustmennt
(3) Make sure RS-232C control
(4) Selection Factory output option
5. Factory Adjustment
PU11A / PB11A : USE INTERNAL ADC(S7R) : using internal
pattern.
5-1. Auto Adjust Component

480i/1080p RGB 1080p
(1) Summary : Adjustment component 480i/1080i and RGB
1080p is Gain and Black level setting at Analog
to Digital converter, and compensate the RGB
deviation
(2) Using instrument

1) Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator
(It can output 480i/1080i horizontal 100 % color bar
pattern signal, and its output level must setting
0.7 V ± 0.1 V p-p correctly) Caution : Set Volume 0 after adjustment
5-2. Use Internal ADC(S7R)

- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC
Calibration(START)
< Adjustment pattern : 480i / 1080p 60Hz Pattern >

5-3. EDID(The Extended Display
Identification Data) / DDC(Display Data
* You must make it sure its resolution and pattern cause every Channel) download
instrument can have different setting
(1) Summary
1) It is established in VESA, for communication between
PC and Monitor without order from user for building user
2) Adjustment method 480i Comp1, Adjust 1080p
condition. It helps to make easily use realize “Plug and
Comp1/RGB (Factory adjustment)
Play” function.
O ADC 480i Component1 adjustment -
2) For EDID data write, we use DDC2B protocol.
- Check connection of Component1
- MSPG-925FA Ë Model: 209, Pattern 65
O Set Component 480i mode and 100% Horizontal 5-4. Auto Download
Color Bar Pattern(HozTV31Bar), then set TV set to (1) After enter Service Mode by pushing “ADJ” key,
Component1 mode and its screen to “NORMAL” (2) Enter EDID D/L mode.
O ADC 1080p Component1 / RGB adjustment (3) Enter “START” by pushing “OK” key.
- Check connection both of Component1 and RGB
- MSPG-925FA Ë Model: 225, Pattern 65 Caution
O Set Component 1080p mode and 100% Horizontal - Never connect HDMI & D-sub Cable when the user
Color Bar Pattern(HozTV31Bar), then set TV set to downloading .
Component1 mode and its screen to “NORMAL” - Use the proper cables below for EDID Writing.
O After get each the signal, wait more a second and
enter the “IN-START” with press IN-START key of
Service remocon. After then select “7. External ADC”
with navigator button and press “Enter”.
O After Then Press key of Service remocon “Right
Arrow(VOL+)”
O You can see “ADC Component1 Success”
O Component1 1080p, RGB 1080p Adjust is same
method.
O Component 1080p Adjustment in Component1 input
mode
O RGB 1080p adjustment in RGB input mode
O If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”
O It only needs to PCM EDID D/L for North America Product.

(PU11A)
EDID data (Model name = LG TV)
HDMI-1 EDID table(2D HD) - South Centural America

(PT250B/E, PT260E)
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F
0 02 03 27 F1 4E 02 03 11 12 93 04 15 16 05 14 10
10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 10 00
20 B8 2D 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58
* Edid data and Model option download(RS232)
30 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16
40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51
50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00
60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D2
HDMI-2 EDID table(2D HD) - South Centural America

(PT250B/E, PT260E)
5-5. Manual Download 0 1 2 3 4 5 6 7 8 9 A B C D E F
(1) Write HDMI EDID data
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
1) Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC 10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
adjustment. 20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
- S/W for DDC recording (EDID data write and read)
- D-sub jack 30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
- Additional HDMI cable connection Jig. 40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20
2) Preparing and setting.
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
- Set instruments and Jig. Like pic.5), then turn on PC
and Jig. 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
- Operate DDC write S/W (EDID write & read) 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F
- It will operate in the DOS mode.
0 02 03 27 F1 4E 02 03 11 12 93 04 15 16 05 14 10
10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 20 00
20 B8 2d 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58
30 2C 45 00 40 84 63 00 00 1E 01 1E 80 18 71 1C 16
40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51
50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00
< For write EDID data, setting Jig and another instruments >
60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C2
HDMI-3 EDID table(2D HD) - South Centural America (2) Connection Diagram (Auto Adjustment)
(PT250B/E, PT260E) 1) Using Inner Pattern
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 15 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88
40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
2) Using HDMI input
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 0F
0 02 03 27 F1 4E 02 03 11 12 93 04 15 16 05 14 10
10 1F 22 20 26 15 07 50 09 57 07 68 03 0C 00 30 00
20 B8 2d 00 E3 05 03 01 02 3A 80 18 71 38 2D 40 58
30 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16
40 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51
50 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00
60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
< Connection Diagram for Adjustment White balance >
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B2
(3) White Balance Adjustment

RGB EDID table(2D HD) - South Centural America - If you can’t adjust with inner pattern, then you can adjust
(PT250B/E, PT260E) it using HDMI pattern. You can select option at “Ez-Adjust
0 1 2 3 4 5 6 7 8 9 A B C D E F Menu – 7. White Balance” there items “NONE, INNER,
HDMI”. It is normally setting at inner basically. If you can’t
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
adjust using inner pattern you can select HDMI item, and
10 01 15 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26 you can adjust.
20 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01
- In manual Adjust case, if you press ADJ button of service
30 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
40 36 00 40 84 63 00 00 1C A0 0F 20 00 31 58 1C 20 then automatically inner pattern operates. (In case of
“Inner” originally “Test-Pattern. On” will be selected in The
50 28 80 11 00 BC 39 20 00 00 00 00 00 00 FD 00 3A
“Test-Pattern. On/Off”.
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 28 O Connect all cables and equipments like Pic.5)
O Set Baud Rate of RS-232C to 115200. It may set
115200 orignally.
* See Working Guide if you want more information about EDID O Connect RS-232C cable to set
communication. O Connect HDMI cable to set
5-6. Adjustment Color Temperature

(White balance)
(1) Using Instruments
1) Color Analyzer: CA-210 (CH 9)
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 9, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
2) Auto-adjustment Equipment (It needs when Auto-
adjustment – It is availed communicate with RS-232C :
Baud rate: 115200)
3) Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)
V RS-232C COMMAND(Commonly apply) (4) White Balance Adjustment (Manual adjustment)
1) Test Equipment: CA-210
RS-232C COMMAND
- Using PDP color temperature, Color Analyzer (CA-
[CMD ID DATA] Meaning 210) must use CH 10, which Matrix compensated
wb 00 00 White Balance adjustment start. (White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
wb 00 10 Start of adjust gain 2) Manual adjustment sequence is like bellowed one.
(Inner white pattern) - Turn to “Ez-Adjust” mode with press ADJ button of
wb 00 1f End of gain adjust service remocon.
- Select “10.Test Pattern” with CH+/- button and press
wb 00 20 Start of offset adjust enter. Then set will go on Heat-run mode. Over 30
(Inner white pattern) minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more
wb 00 2f End of offset adjust
10cm from center of PDP module when adjustment.
wb 00 ff End of White Balance adjust - Press “ADJ” button of service remocon and select
(Inner pattern disappeared) “7.White-Balance” in “Ez-Adjust” then press “G” button
of navigation key. (When press “G” button then set will
go to full white mode)
- Adjust at three mode (Cool, Medium, Warm)
O wb 00 00”: Start Auto-adjustment of white balance. - If “cool” mode
O “wb 00 10”: Start Gain Adjustment (Inner pattern) Let B-Gain to 192 and R, G, B-Cut to 64 and then
O “jb 00 c0” : control R, G gain adjustment High Light adjustment.
O… - If “Medium” and “Warm” mode Let R-Gain to 192 and
O “wb 00 1f”: End of Adjustment R, G, B-Cut to 64 and then control G, B gain
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f- adjustment High Light adjustment.
end) - All of the three mode
O “wb 00 ff”: End of white balance adjustment (inner Let R-Gain to 192 and R, G, B-Cut to 64 and then
pattern disappear) control G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter (_ key) turn to
Ez-Adjust mode. Then with ADJ button, exit from
V Adjustment Mapping information adjustment mode
RS-232C COMMAND CENTER
[CMD ID DATA] MIN (DEFAULT) MAX * Attachment: White Balance adjustment coordination and color
Cool Mid Warm Cool Mid Warm temperature.
R Gain jg Ja jd 00 184 192 192 192
O Using CS-1000 Equipment.
G Gain jh Jb je 00 187 183 159 192 - COOL : T=11000K, _uv=0.000, x=0.276 y=0.283
B Gain ji Jc jf 00 192 161 95 192 - MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, _uv=0.000, x=0.313 y=0.329
R Cut 64 64 64 127
G Cut 64 64 64 127 O Using CA-210 Equipment. (10 CH)
B Cut 64 64 64 127 - Contras value : 216 Gray
Color Test Color Coordination
temperature Equipment x y
O When Color temperature (White balance) Adjustment COOL CA-210 0.276±0.002 0.283±0.002
(Automatically)
MEDIUM CA-210 0.285±0.002 0.293±0.002
- Press “Power only key” of service remocon and
operate automatically adjustment. WARM CA-210 0.313±0.002 0.329±0.002
- Set BaudRate to 115200.
O You must start “wb 00 00” and finish it “wb 00 ff”.
O If it needs, then adjustment “Offset”. - Brighness spec.
Item Min Typ Max Unit Remark
White 49 60 - cd/m - 100%Window White
average Pattern
brightness - 100IRE(255Gray)
- Picture: Vivid(Medium )
Brightness -20 +20 % - 85IRE(216Gray) 100%
uniformity Window White Pattern
- Picture: Vivid(Medium)
Copyright ©2011 LG Electronics Inc. All rights reserved. - 10 - LGE Internal Use Only
6. Test of RS-232C control. 9. POWER PCB Ass’y Voltage
- Press In-Start button of Service Remocon then set the “4.Baud Adjustment
Rate” to 115200. Then check RS-232C control and
(Va/Vs Voltage Adjustment)
(1)Test equipment : D.M.M 1EA

(2) Connection Diagram for Measuring : refer to fig.1
7. Selection of Country option.
- Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.
(1) Models: All models which PB82C Chassis (See the first
page.)
(2) Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
(3) Select one of these three (USA, CANADA, MEXICO)
defends on its market using “Vol. +/-“button.
<XPOWER4 42T3 PSU>
Caution : Don’t push The INSTOP KEY after completing the < fig.1 : 42 inch Power PCB Assy Voltage adjustment >
function inspection
Caution : Inspection only PAL M / NTSC 9-1. Adjustment method

(1) Vs adjustment (refer fig.1)
1) Connect + terminal of D.M.M. to Vs pin of P811, connect
-terminal to GND pin of P811
2) After turning VR901, voltage of D.M.M adjustment as
8. GND and ESD Testing same as Vs voltage which on label of panel left/top (
deviation ; ±0.5V)
8-1. Prepare GND and ESD Testing. (2) Va adjustment (refer fig.1)
- Check the connection between set and power cord 1) After receiving 100% Full White Pattern, HEAT RUN.
2) Connect + terminal of D.M.M. to Va pin of P811, connect
-terminal to GND pin of P811.
3) After turning VR502,voltage of D.M.M adjustment as
8-2. Operate GND and ESD auto-test. same as Va voltage which on label of panel left/top
(1) Fully connected (Between set and power cord) set enter (deviation; ±0.5V)
the Auto-test sequence.
(2) Connect D-Jack AV jack test equipment.
(3) Turn on Auto-controller(GWS103-4)
(4) Start Auto GND test. 10. Default Service option.
(5) If its result is NG, then notice with buzzer.
(6) If its result is OK, then automatically it turns to ESD Test.
(7) Operate ESD test 10-1. ADC-Set.
(8) If its result is NG, then notice with buzzer. V R-Gain adjustment Value (default 128)
(9) If its result is OK, then process next steps. Notice it with V G-Gain adjustment Value (default 128)
Good lamp and STOPER Down. V B-Gain adjustment Value (default 128)
V R-Offset adjustment Value (default 128)
V G-Offset adjustment Value (default 128)
V B-Offset adjustment Value (default 128)
8-3. Check Items.

(1) Test Voltage 10-2. White balance. Value.
GND: 1.5KV/min at 100mA CENTER (DEFAULT)
Signal: 3KV/min at 100mA
(2) Test time: just 1 second. Cool Mid Warm
(3) Test point R Gain 192 192 192
- GND test: Test between Power cord GND and Signal
G Gain 192 192 192
cable metal GND.
- ESD test: Test between Power cord GND and Live and B Gain 192 192 192
neutral. R Cut 64 64 64
(4) Leakage current: Set to 0.5mA(rms)
G Cut 64 64 64
B Cut 64 64 64
10-3. Temperature Threshold
V Threshold Down Low 20
V Threshold Up Low 23
V Threshold Down High 70
V Threshold Up High 75
11. USB DOWNLOAD

(*.epk file download)
V Put the USB Stick to the USB socket
V Press Menu key, and move OPTION
V Press “FAV” Press 7 times.
V Select download file (epk file)
V After download is finished, remove the USB stick.
V Press “IN-START” key of ADJ remote control, check the

S/W version.
BLOCK DIAGRAM
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
601
520
207
206
200
602
201
204
590
580
501
240
910
900
203
303
301
205
202
304
302
305
A9
A4
A10
LV1
A12
A21
120
300
A2
570
- 14 - LGE Internal Use Only

S7R-Multi(Brazil)
S7 IC Configuration IC101-*1
LGE101DC-R [S7R DIVX/MS10]
+3.3V_AVDD S7R_BR
AE1 W26
NC_48 LVACLKP/LLV6P/BLUE[3]
AF16 W25
NC_78 LVACLKN/LLV6N/BLUE[2]
AF1 U26
NC_64 LVA0P/LLV3P/BLUE[9]
AE3 U25
NC_50 LVA0N/LLV3N/BLUE[8]
R38 1K AD14 U24
READY AD3
V26
+3.3V_AVDD PWM0 AF15

NC_34
NC_77
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
V25
AF2 V24
R33 1K NC_65 LVA2N/LLV5N/BLUE[4]
2G BIT NAND Flash

AE15 W24
AD2 Y26
NC_33 LVA3N/LLV7N/BLUE[0]
READY R39 1K AD16

AD15
NC_47 LVA4P/LLV8P
Y25
Y24
IC104 L102 PWM1 AE16
NC_46 LVA4N/LLV8N
/PF_CE0 NC_63
H : Serial Flash NAND01GW3B2CN6E R34 1K READY LVBCLKP/LLV0P/GREEN[5]

AC26
AC25
LVBCLKN/LLV0N/GREEN[4]
L : NAND Flash R40 1K AF3
LVB0P/RLV6P/RED[1]
AA26
AA25
NC_66 LVB0N/RLV6N/RED[0]
/PF_CE1 AF14
NC_76 LVB1P/RLV7P/GREEN[9]
AA24
H : 16 bit READY AUD_MASTER_CLK AD1

NC_32 LVB1N/RLV7N/GREEN[8]
AB26
NC_1 NC_29 R35 1K AD13

LVB2P/RLV8P/GREEN[7]
AB25
AB24
L : 8 bit 1 48 AE14
AC24
R41 1K AE13
NC_61 LVB3P/LLV1P/GREEN[3]
AD26
NC_60 LVB3N/LLV1N/GREEN[2]
NC_2 NC_28 LVB4P/LLV0P/GREEN[1]
AD25
2 47 AUD_SCK AE4
LVB4N/LLV0N/GREEN[0]
AD24
PCM_A[0-7] R36 1K READY AD5

NC_51
NC_3 NC_27 AF4

NC_36
NC_67 RLV3P/RED[7]
AD23
3 46 R42 1K AD4
NC_35 RLV3N/RED[6]
AE23
AE26
RLV0P/LVSYNC
AE2 AE25
NC_4 NC_26 AUD_LRCH NC_49 RLV0N/LHSYNC
AF26
4 45 R37 1K RLV1N/LCK
RLV2P/RED[9]
AF25
AF8 AE24
NC_71 RLV1P/LDE
R16 R19 NC_5 I/O7 PCM_A[7] AD9
NC_40 RLV2N/RED[8]
AF24
AF23
1K 5 44 AE9
RLV4P/RED[5]
AD22
3.9K AF9
NC_56 RLV4N/RED[4]
AE22
NC_72 RLV5P/RED[3]
NC_6 I/O6 PCM_A[6] RLV5N/RED[2]
AF22
6 43 AE11
AF6
NC_58
NC_69
AD19
RB I/O5 PCM_A[5] AE6
NC_53
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
AE19
/F_RB 7 42 AF11
AD6
NC_74 TCON18/CS7/GCLK5
AD21
AE21
AD12 AF21
R I/O4 PCM_A[4] AE5
NC_43 TCON11/CS5/HCON
AD20
/PF_OE 8 41 AF12
NC_52
NC_75
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
AE20
AF5 AF20
NC_68 TCON16/WPWM
E NC_25 AE12
NC_59 TCON12/DPM
AF19
AD18
/PF_CE0 9 40 <T3 CHIP Config(AUD_LRCH)> AE10

TCON1/STV/GSP/VST
AE18
NC_57 TCON5/TP/SOE
AF7 AF18
NC_7 NC_24 C6 Boot from SPI flash : 1’b0 AD11

NC_70
NC_42
TCON14/SACN_BLK
10 39 10uF Boot from NOR flash : 1’b1 AD7

AD10
NC_38
AB22
NC_41 TCON21/CS10/VGH_ODD
R17 NC_8 NC_23 6.3V
AE7
NC_54 TCON20/CS9/VGH_EVEN
AB23
C4 <CHIP_CONF={AUBCK_OUT,AUMCK_OUT,PWM1,PWM0}> AF10
NC_73 TCON13/LEDON
AC23
1K 11 38 AD8
AC22
READY 0.1uF 1.CHIP_CONF= 4’h3:{0,0,1,1}MIPS_no_EJ_NOR8

VDD_1 VDD_2 2.CHIP_CONF= 4’h4:{0,1,0,0}MIPS_EJ1_NOR8 AB16
12 37 NC_26
AA14
3.CHIP_CONF= 4’h5:{0,1,0,1}MIPS_EJ2_NOR8 NC_19
NC_30
AC15
VSS_1 VSS_2 C7 0.1uF 4.CHIP_CONF= 4’hB:{1,0,1,1}B51_Secure_no_scramble

+3.3V_AVDD 13 36 NC_15
Y16
AC16
5.CHIP_CONF= 4’hC:{1,1,0,0}B51_Secure_scramble AE8
NC_55
NC_31
NC_29
AC14
NC_9 NC_22
R10 14 35 Y11
NC_12 NC_21
AA16
1.MIPS as host(8051’s reset remains until MIPS deactive it.),No EJ PAD,Byte mode NAND flash Y19
GND_105 NC_20
AA15
NC_10 NC_21 2.MIPS as host,EJ use PAD1,Byte mode NAND flash Y10
1K 15 34 NC_11
AA11
READY 3.MIPS as host,EJ use PAD2,Byte mode NAND flash NC_17
AB15
CL NC_20 4.8051 as host,Internal SPI flash secure boot,no scramble NC_25
AB14
/PF_CE1 16 33 NC_24
R8 5.8051 as host,Internal SPI flash secure boot with scramble

AL I/O3 PCM_A[3]
10K 17 32
PF_ALE
W I/O2 PCM_A[2]
R4 /PF_WE 18 31
0 WP I/O1 PCM_A[1]
PF_WP 19 30
R12 NC_11 I/O0 PCM_A[0]
R3
1K
NC_12
20 29
NC_19
S7R_NORMAL
10K 21 28
READY NC_13 NC_18
22 27
S7R IC101
NC_14 NC_17
23 26 LGE101DC-R-1 [S7R DIVX]
NC_15 NC_16
24 25
U22 N21
PCM_D0 TCON0/POL
T21 M21
PCM_D1 TCON2/GSP_R/GCLK1 5V_DET_HDMI_2
T22 L22
PCM_D2 TCON4/CPV/GSC/GCLK3 5V_DET_HDMI_4
AB18 L21
PCM_D3 TCON6/FLK 5V_DET_HDMI_3
AC18 P21
PCM_D4 TCON8/CS2/FLK3 SIDE_CVBS_DET
AC19
PCM_D5
AC20
PCM_D6
PCM_A[0-7] AC21 K21
PCM_D7 GPIO36/UART3_RX 3D_RF_RXD
L23
GPIO37/UART3_TX 3D_RF_TXD
PCM_A[0] U21 K20
PCM_A0 GPIO38 3D_RF_RESET
PCM_A[1] V21 L20
V4 LGD BIT SEL PCM_A[2] PCM_A1 GPIO39 COMP1_DET
Y22 M20
H or NC : 10 bit PCM_A[3] PCM_A2 GPIO40
AA22 G20
8K BIT HDCP EEPROM L : 8 bit PCM_A[4] R22
PCM_A3 GPIO41
G19
ERROR_DET
8M BIT serial Flash PCM_A[5] R21
PCM_A4 GPIO42 TUNER_RESET
+3.3V_AVDD PCM_A5
Serial FLASH MEMORY Addr:10101-- V4 LGD LVDS SEL
PCM_A[6] T23 F20 R97 33
PCM_A[7] PCM_A6 GPIO50/UART1_RX MOD_ROM_RX
for BOOT +3.3V_ST +3.3V_ST L or NC : VESA T24 F19 R98 33 MOD_ROM_TX
PCM_A7 GPIO51/UART1_TX
+3.3V_ST IC103 H : JEIDA AA23 C18 C19
PCM_A8
READY
MX25L8005M2I-15G READY 10pF 10pF READY

4.7K
Y20 E7
R11
PCM_A9 GPIO6/PM0/INT0 AC_DET

C5 IC102 AB17 D7
CAT24WC08W-T PCM_A10 GPIO7/PM1/PM_UART_TX UART_PM_TX
0.1uF R7 AA21 E11
CS# VCC 16V V4 LGD OPC LED_RED
4.7K PCM_A11 GPIO8/PM2
/FLASH_WP
15G 1 8 A0 1
8 VCC U23 G9
/SPI_CS L or NC : DISABLE 5V_ON
R9 PCM_A12 GPIO9/PM3
A1 2 WP R13 4.7K H : ENABLE Y23 F9
10K 7 PCM_A13 GPIO10/PM4 RL_ON
SO HOLD# W23 C5
2 7 PCM_A14 GPIO11/PM5/PM_UART_RX/INT1 UART_PM_RX EDID_WP
SPI_SDO A2 3 SCL E8
6 I2C_SCL
R1 BIT_SEL,LVDS_SE : LCD MODULE OPT PM_SPI_CS1/GPIO12/PM6 C
VSS 4 SDA CH_2 W22 E9
0 WP# SCLK 5 PCM_REG_N PM_SPI_WP1/GPIO13/PM7 /FLASH_WP
3 6 I2C_SDA OPC: Optimal power control FOR PICTURE F7 R80 10K B Q103
SPI_SCK
C3 PM_SPI_WP2/GPIO14/PM8/INT2 2SC3052
C AA17 F6
R2 0.1uF AFLC: LED TV OPTION PCM_OE_N GPIO15/PM9 MODEL_OPT_3
0 B Q101 GND SI V22 D8 E
4 5 SPI_SDI $0.199 PCM_WE_N PM_SPI_CS2/GPIO16/PM10 READY LED_WHITE
KRC103S W21 G12
READY READY R24 33
IC103-*1
PCM_IORD_N GPIO17/PM11/INT3
Y21 F10
E MX25L8006EM2I-12G PCM_IOWR_N GPIO18/PM12/INT4
R92 33 /SPI_CS
CS# VCC
1 8 AA20 D9 R81 33
PCM_CE_N PM_SPI_CK/GPIO1 SPI_SCK
SO/SIO1
2 7
HOLD# V23 D11
PCM_IRQA_N GPIO0/PM_SPI_CZ
P23 E10
WP#
GND
3 6
SCLK
SI/SIO0
1M BIT EEPROM R23
PCM_CD_N PM_SPI_DI/GPIO2
D10
R82
R83
33
33
SPI_SDI
SPI_SDO
4 5 PCM_WAIT_N PM_SPI_DO/GPIO3
P22
+3.3V_AVDD PCM_RESET
AR103
AA9
I2C : A0 TS0_CLK
/PF_CE0 AC17 AA5
PCM_PF_CE0Z TS0_VLD
/PF_CE1 AB20 AA10
R6 PCM_PF_CE1Z TS0_SYNC
/PF_OE AA18
4.7K IC109 22 PCM_PF_OEZ
/PF_WE AR102 AB21 AB5
READY M24M01-HRMN6TP PCM_PF_WEZ TS0_D0
PF_ALE AB19 AC4
PCM_PF_ALE TS0_D1
PF_WP AD17 Y6
NC VCC PCM_PF_AD[15] TS0_D2
1 8 AA19 AA6
C1 /F_RB PCM_PF_RBZ TS0_D3
0.1uF 22 W6
E1 WP TS0_D4
4.7K
4.7K
2 7 AA7
R20
R22
TS0_D5
R52 33 M23 Y9
E2 SCL S7_TXD UART_TX2/GPIO65 TS0_D6
3 6 I2C_SCL N23 AA8
S7_RXD R53 33
UART_RX2/GPIO64 TS0_D7
CH_2
VSS SDA
4 5 I2C_SDA R55 M22 AC5
33 FE_TS_CLK
CH_2 I2C_SDA DDCR_DA/GPIO71 TS1_CLK
R54 33 N22 AC6
I2C_SCL DDCR_CK/GPIO72 TS1_VLD FE_TS_VLD
AB6
TS1_SYNC FE_TS_SYN
512KBIT = $0.35 R50 33 A5
RGB_DDC_SDA DDCA_DA/UART0_TX
CH_8 R51 33 B5 AC10
RGB_DDC_SCL DDCA_CK/UART0_RX TS1_D0 FE_TS_SERIAL
IC109-*1
AB10
M24512-HRMN6TP TS1_D1
AC9 BRAZIL DEMOD OPT
E0 VCC TS1_D2
1 8 R56 22 K23 AB9
PWM0 PWM0/GPIO66 TS1_D3
E1
2 7
WP
ST_NVRAM_512K R57 22 K22
PWM1/GPIO67 TS1_D4
AC8
E2 SCL PWM1
3 6
PWM2 G23 AB8
VSS SDA
AV_CVBS_DET PWM2/GPIO68 TS1_D5
4 5
R129 22 G22 AC7
MODEL_OPT_1 PWM3/GPIO69 TS1_D6
G21 AB7
+1.8V_ON PWM4/GPIO70 TS1_D7
C6 D12
KEY1 SAR0/GPIO31 MPIF_CLK
B6 D14
KEY2 R46 22 SAR1/GPIO32 MPIF_CS_N
C8
TOUCH_VER_CHK SAR2/GPIO33
22 READY C7 E14 R99 1K
R18 SAR3/GPIO34 MPIF_BUSY
A6
AMP_MUTE SAR4/GPIO35
E12
MPIF_D0
F12
MPIF_D1
D13
MPIF_D2
E13
MPIF_D3
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX63425902(5) 2010.10.21
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. S7/FLASH/NVRAM/GPIO 1 14
Copyright © 2011 LG Electronics Inc. All rights reserved.

Only for training and service purposes LGE Internal Use Only
IC101
LGE101DC-R-1 [S7R DIVX]
MUST BE LINE IMPEADANCE 100 OHM !!

F1 W2
A_RXCP VIFP
F2 W1
A_RXCN VIFM
G2 Close to MSTAR INTERNAL_DEMOD
A_RX0P INTERNAL_DEMOD R228 100 C259 0.1uF
G3 V2
A_RX0N IP IF_P_MSTAR
H3 V1 INTERNAL_DEMOD R229 100 C260 INTERNAL_DEMOD
0.1uF
A_RX1P IM IF_N_MSTAR
G1
A_RX1N
H1 Y2 C252 0.1uF R246 47 +3.3V_AVDD
A_RX2P SSIF/SIFP TUNER_SIF
H2 Y1 C253 0.1uF R247 47 C256 R248 INTERNAL_DEMOD
A_RX2N SSIF/SIFM 1000pF 300
F5 15pF 50V
3D_RFMODULE_DD DDCDA_DA/GPIO24 32.768KHz READY READY
F4 U3 L202 IC101
3D_RFMODULE_DC DDCDA_CK/GPIO23 QP X201 READY
C234 INTERNAL_DEMOD
E6 V3 C254 LGE101DC-R-1 [S7R DIVX]
READY C235 R256
HOTPLUGA/GPIO19 QM 0.1uF
1K Close to MSTAR
D3 Y5 INTERNAL_DEMOD
READY 15pF 50V R255
CK+_HDMI2 B_RXCP IFAGC
C1 Y4 10K AE1 W26
CK-_HDMI2 B_RXCN RF_TAGC NC_48 LVACLKP/LLV6P/BLUE[3] LVDS_CLK_1-
D1 IF_AGC_MAIN AF16 W25
LVDS OUT
D0+_HDMI2 B_RX0P NC_78 LVACLKN/LLV6N/BLUE[2] LVDS_CLK_1+
D2 U1 CH_5(AMP_DEMODE BRAZIL) INTERNAL_DEMOD AF1 U26
D0-_HDMI2 B_RX0N TGPIO0/UPGAIN AMP_DEMOD_SCL C255 NC_64 LVA0P/LLV3P/BLUE[9] LVDS_DATA_1_A-
E2 U2 CH_5(AMP_DEMODE BRAZIL) AE3 U25
D1+_HDMI2 B_RX1P TGPIO1/DNGAIN AMP_DEMOD_SDA 0.022uF NC_50 LVA0N/LLV3N/BLUE[8] LVDS_DATA_1_A+
E3 R3 CH_6 TU_SCL 16V
INTERNAL_DEMOD AD14 U24
D1-_HDMI2 B_RX1N TGPIO2/I2C_CLK NC_45 LVA1P/LLV4P/BLUE[7] LVDS_DATA_1_B-
F3 T3 CH_6 TU_SDA AD3 V26
D2+_HDMI2 B_RX2P TGPIO3/I2C_SDA NC_34 LVA1N/LLV4N/BLUE[6] LVDS_DATA_1_B+
GND_C
E1 +3.3V_AVDD AF15 V25 LVDS_DATA_1_C-
D2-_HDMI2 B_RX2N NC_77 LVA2P/LLV5P/BLUE[5]
D4 T2 AF2 V24 LVDS_DATA_1_C+
DDC_SDA_2 C257 27pF
R227
DDCDB_DA/GPIO26 XTALIN X200 NC_65 LVA2N/LLV5N/BLUE[4]
E4 T1 READY
1M
DDC_SCL_2 AE15 W24 LVDS_DATA_1_D-
DDCDB_CK/GPIO25 XTALOUT 24MHz L200 NC_62 LVA3P/LLV7P/BLUE[1]
D5 R205 AD2 Y26
HPD2 HOTPLUGB/GPIO20 3.3K NC_33 LVA3N/LLV7N/BLUE[0] LVDS_DATA_1_D+
AD16 Y25
22 C258 27pF L201 NC_47 LVA4P/LLV8P LVDS_DATA_1_E-
AA2 G14 R158 AD15 Y24
CK+_HDMI4 C_RXCP SPDIF_IN/GPIO177 P_SDA CH_5(MODULE I2S) LVDS_DATA_1_E+
HDMI
AA1 R207 NC_46 LVA4N/LLV8N

G13 100 AE16
CK-_HDMI4 C_RXCN SPDIF_OUT/GPIO178 SPDIF_OUT NC_63
AB1
D0+_HDMI4 C_RX0P
AA3 AC26
D0-_HDMI4 C_RX0N LVDS_CLK_2-
AB3 LVBCLKP/LLV0P/GREEN[5]
B7 AC25
D1+_HDMI4 C_RX1P DM_P0 USB2_DM_to_MAIN LVDS_CLK_2+
AB2 LVBCLKN/LLV0N/GREEN[4]
A7 AA26
D1-_HDMI4 C_RX1N DP_P0 USB2_DP_to_MAIN LVDS_DATA_2_A-
AC2 LVB0P/RLV6P/RED[1]
AF3 AA25 LVDS_DATA_2_A+
D2+_HDMI4 C_RX2P +3.3V_AVDD NC_66 LVB0N/RLV6N/RED[0]
AC1 AF17 AF14 AA24
D2-_HDMI4 C_RX2N DM_P1 USB1_DM_to_MAIN LVDS_DATA_2_B-
NC_76 LVB1P/RLV7P/GREEN[9]
AB4 AE17 AD1 AB26
DDC_SDA_4 DDCDC_DA/GPIO28 DP_P1 USB1_DP_to_MAIN READY LVDS_DATA_2_B+
AA4
DDC_SCL_4
AC3
DDCDC_CK/GPIO27 R202
3.3K
S7 RESET CIRCUIT AD13
LVB2P/RLV8P/GREEN[7]
AB25
AB24
LVDS_DATA_2_C-
HPD4 HOTPLUGC/GPIO21 LVDS_DATA_2_C+
F14
SUB_SDA CH_7(SUB I2C)
SW200
*Active High reset AE14 AC24 LVDS_DATA_2_D-
I2S_IN_BCK/GPIO175 R215 22 NC_61 LVB3P/LLV1P/GREEN[3]
A2 F13 TMUE312GAB AE13 AD26
CK+_HDMI3 D_RXCP I2S_IN_SD/GPIO176 P_SCL LVDS_DATA_2_D+
4
NC_60 LVB3N/LLV1N/GREEN[2]
A3 F15 +3.3V_ST AD25
CK-_HDMI3 D_RXCN I2S_IN_WS/GPIO174 SUB_SCL CH_7(SUB I2C) LVDS_DATA_2_E-
LVB4P/LLV0P/GREEN[1]
5
B3 CH_5(MODULE I2S) AD24
D0+_HDMI3 D_RX0P READY LVDS_DATA_2_E+
A1 LVB4N/LLV0N/GREEN[0]
D20 AE4
D0-_HDMI3 D_RX0N BIT CLOCK I2S_OUT_BCK/GPIO181 AUD_SCK R201 NC_51
B1 E20
3
D1+_HDMI3 MASTER CLOCK I2S_OUT_MCK/GPIO179 100 AD5
D_RX1P AUD_MASTER_CLK C200 READY NC_36
B2 D19 AF4 AD23
D1-_HDMI3 D_RX1N SERIAL DATA I2S_OUT_SD/GPIO182 AUD_LRCH 4.7uF NC_67 RLV3P/RED[7]
C2 F18 AD4 AE23
D2+_HDMI3 D_RX2P I2S_OUT_SD1/GPIO183 MODEL_OPT_2 10V
NC_35 RLV3N/RED[6]
C3 E18 AE26
D2-_HDMI3 D_RX2N I2S_OUT_SD2/GPIO184 +USB1_OCD R145 RLV0P/LVSYNC
B4 D18 10 AE2 AE25
DDC_SDA_3 DDCDD_DA/GPIO30 I2S_OUT_SD3/GPIO185 +USB1_CTL NC_49 RLV0N/LHSYNC
C4 E19 SOC_RESET AF26
DDC_SCL_3 DDCDD_CK/GPIO29
E5 WORD SELECT I2S_OUT_WS/GPIO180 AUD_LRCK RLV1N/LCK
FRC PART
HPD3 AF25
HOTPLUGD/GPIO22 RLV2P/RED[9]
D6 D200 AF8 AE24
HDMI_CEC_S7 CEC/GPIO5 R142 C202 NC_71 RLV1P/LDE
N1 KDS181 AD9 AF24
R143 LINE_IN_0L 62K 0.1uF
R146 NC_40 RLV2N/RED[8]
P3 16V AF23
10K 10K LINE_IN_0R RLV4P/RED[5]
R163 22 G5 P1 C238 2.2uF AE9 AD22
DSUB_HSYNC HSYNC0 LINE_IN_1L AV_LIN_COM1
AUDIO IN
NC_56 RLV4N/RED[4]
DSUB
R164 22 G6 P2 C239 2.2uF AF9 AE22

DSUB_VSYNC VSYNC0 LINE_IN_1R AV_RIN_COM1 NC_72 RLV5P/RED[3]
R166 33 C215 0.047uF K1 P4 C240 2.2uF AF22
DSUB_R RIN0P LINE_IN_2L SIDE_LIN RLV5N/RED[2]
R167 68 C216 0.047uF L3 P5 C241 2.2uF AE11
DSUB_R- RIN0M LINE_IN_2R SIDE_RIN NC_58
R168 33 C203 0.047uF K3 R6 C242 2.2uF AF6
DSUB_G GIN0P LINE_IN_3L COMP2_LIN NC_69
R169 68 C217 0.047uF K2 T6 C243 2.2uF AD19
DSUB_G- GIN0M LINE_IN_3R COMP2_RIN TCON3/OE/GOE/GCLK2
R170 33 C218 0.047uF J3 U5 C244 2.2uF AE6 AE19
DSUB_B BIN0P LINE_IN_4L PC_LIN NC_53 TCON15/SCAN_BLK1
R171 68 C219 0.047uF J2 V5 C245 2.2uF AF11 AD21
DSUB_B- BIN0M LINE_IN_4R PC_RIN NC_74 TCON18/CS7/GCLK5
R172 0 C204 1000pF J1 U6 C246 2.2uF AD6 AE21
SOGIN0 LINE_IN_5L NC_37 TCON19/CS8/GCLK6
V6 C247 2.2uF AD12 AF21
LINE_IN_5R NC_43 TCON11/CS5/HCON
AE5 AD20
R139 33 NC_52 TCON10/CS4/OPT_N
G4 AF12 AE20
COMPONENT 1/2
HSYNC1 NC_75 TCON9/CS3/OPT_P

R194 33 H6 U4 AF5 AF20
VSYNC1 LINE_OUT_0L
MODEL OPTION3 NC_68 TCON16/WPWM
TV/MNT CVBS
R173 33 C220 0.047uF K5 W3 AE12 AF19

COMP1_Pr+ RIN1P LINE_OUT_2L NC_59 TCON12/DPM
0.047uF
AUDIO OUT
R174 68 C221 K4 W4 AD18

COMP1_Pr- RIN1M LINE_OUT_3L TCON1/STV/GSP/VST
R175 33 C222 0.047uF J4 V4 AE10 AE18
COMP1_Y+ GIN1P LINE_OUT_0R PIN NAME HIGH LOW NC_57 TCON5/TP/SOE
R176 68 C223 0.047uF K6 Y3 AF7 AF18
COMP1_Y- GIN1M LINE_OUT_2R N/A NC_70 TCON14/SACN_BLK
R177 33 C224 0.047uF H4 W5 MODEL_OPT_1 AD11
COMP1_Pb+ BIN1P LINE_OUT_3R NC_42
R178 68 C225 0.047uF J6 AD7
COMP1_Pb- BIN1M NC_38
R179 0 C205 1000pF J5 R4 MODEL_OPT_2 AD10 AB22
MINILV
SOGIN1 MIC_DET_IN NC_41 TCON21/CS10/VGH_ODD
T5 AE7 AB23
MICCM LED_RED LED_WHITE NC_54 TCON20/CS9/VGH_EVEN
R5 MODEL_OPT_3 AF10 AC23
MICIN NC_73 TCON13/LEDON
H5 AD8 AC22
33 HSYNC2 NC_39 TCON17/CS6/GCLK4
R180 C206 0.047uF N3 T4 +3.3V_AVDD +3.3V_ST
COMP2_Pr+ RIN2P AUCOM
R181 68 C207 0.047uF N2
COMP2_Pr- RIN2M
R182 33 C208 0.047uF M2 P7 AB16
COMP2_Y+ GIN2P VRM NC_26
Close to IC
LED_RED
READY 3.3K
READY 3.3K
READY
68 0.047uF M1
R264
R183 C209 C248 4.7uF AA14
3.3K
R219
3.3K
R266
R221
COMP2_Y- GIN2M NC_19
R184 33 C210 0.047uF L2 R7 C249 1uF as close as possible AC15
COMP2_Pb+ BIN2P VAG NC_30
R185 68 C211 0.047uF L1 P6 C250 10uF
COMP2_Pb- BIN2M VRP +3.3V_AVDD
R186 0 C212 1000pF M3 C251 0.1uF Y16
SOGIN2 TU_2INPUT_CTRL NC_15
R1 R224 22 AC16
HP_OUT_1L READY FE_BOOSTER_CTL MODEL_OPT_1 NC_31
R2 R216 AE8 AC14
HP_OUT_1R 22 NC_55 NC_29
R154 33 C213 0.047uF N4 R203
R223 22
TUNER_CVBS CVBS0P 3.3K
R155 33 C214 0.047uF N6 RF_SWITCH_CTL MODEL_OPT_2 Y11 AA16
CVBS1P 22 R217 NC_12 NC_21
R187 33 C226 0.047uF L4 E21 R222 22 Y19 AA15
AV_CVBS CVBS2P ET_RXD0 3D_GPIO_2
33 TU_2INPUT_CTRL MODEL_OPT_3 GND_105 NC_20
R188 C227 0.047uF L5 E22
READY
READY
SIDE_CVBS_IN CVBS3P ET_TXD0 3D_GPIO_0

R189 33 C228 0.047uF L6 Y10
READY
3.3K
1/16W
CVBS4P
LED_WHITE
M4 NC_11
R141 C201 R190 33 C229 0.047uF D21 AA11
CVBS5P ET_RXD1 LG8300_RESET
R218
R220
R265
300 1000pF M5 NC_17
3.3K
3.3K
R191 33 C230 0.047uF F21

READY 50V CVBS6P ET_TXD1 DSUB_DET
R192 33 C231 0.047uF K7 AB15
CVBS7P NC_25
E23 AB14
ET_REFCLK COMP2_DET NC_24
M6 D22
CVBS_OUT1 ET_TX_EN 3D_GPIO_1
M7 F22 R208 22
N/A CVBS_OUT2 ET_MDC /DEMOD_RESET
D23 R209 22
ET_MDIO DISP_EN
R156 68 C233 0.047uF N5 F23
VCOM0 ET_CRS /AMP_RESET
R140
F8 1K
AVLINK
G8
IRINT TX
K8
TESTPIN
A4
RESET SOC_RESET
Y17
NC_16
R273
10K
READY


THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 2 14

L323
+1.26V_VDDC VDDC
BLM18PG121SN1D VDDC
IC101
LGE101DC-R-1 [S7R DIVX]
C383 C380
C304 VDDC
10uF 0.1uF C309 C313 C321 C328 C335 C344 C349 C353
16V 16V C338 C341
6.3V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF H11 G18
VDDC_1 GND_1
H12 H9
VDDC_2 GND_2
H13 H10
VDDC_3 GND_3
H14 H18
VDDC_4 GND_4
VDDC H15 H19
+1.26V_VDDC +1.26V_MIU1VDDC J12
VDDC_5 GND_5
J10
VDDC_6 GND_6
L321 J13 J17
BLM18SG121TN1D VDDC_7 GND_7
J14 J18
VDDC_8 GND_8
J15 J19
C327 C333 C337 C340 C343 C381 VDDC_9 GND_9
16V C346 C351 C357 C363 C384 J16 K9
16V 16V 16V 16V 16V 16V 10uF VDDC_10 GND_10
0.1uF 0.1uF 16V 16V 16V L18 K10
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 6.3V 0.1uF VDDC_11 GND_11
K11
+1.26V_MIU0VDDC GND_12
+1.26V_MIU1VDDC H16 K12
A_DVDD GND_13
K19 K13
B_DVDD GND_14
VDDC K14
GND_15
L19 K15
VDDC_12 GND_16
M18 K16
VDDC_13 GND_17
M19 K17
+1.26V_VDDC +1.26V_MIU0VDDC VDDC_14 GND_18
N18 K18
L324 VDDC_15 GND_19
AVDD2P5_2.5 N19 L9
BLM18SG121TN1D VDDC_16 GND_20
N20 L10
+2.5V_AVDD L303 VDDC_17 GND_21
Place to S7m closely P18 L11
BLM18PG121SN1D C386 C385 VDDC_18 GND_22
10uF P19 L12
16V VDDC_19 GND_23
6.3V 0.1uF P20 L13
VDDC_20 GND_24
C334 L14
C314 C322 C329 GND_25
16V 16V 16V 10uF Y12 L15
0.1uF 0.1uF 0.1uF 6.3V NC_13 GND_26
L16
GND_27
L17
GND_28
J11 M9
AVDD1P2 GND_29
L7 M10
DVDD_NODIE GND_30
C379 ADC2P5_2.5 M11
AVDD25_PGA_2.5 16V GND_31
L304 M12
0.1uF GND_32
BLM18PG121SN1D Place to S7m closely H7 M13
AVDD2P5_ADC_1 GND_33
J7 M14
AVDD2P5_ADC_2 GND_34
J8 M15
VDD33_3.3 Place to S7m closely AU25_2.5 AVDD25_REF GND_35
C315 M16
16V GND_36
M17
0.1uF GND_37
L8 N10
AVDD_AU25 GND_38
N11
C336 C339 C342 C345 C350 C356 C361 GND_39
16V C354 C371 N12
16V 16V 16V 16V 16V 10uF 10uF 22uF AVDD2P5_2.5
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF GND_40
AU25_2.5 0.1uF 6.3V 6.3V 16V W15 N13
L305 PVDD_1 GND_41
Y15 N14
BLM18PG121SN1D PVDD_2 GND_42
AVDD25_PGA_2.5 N15
GND_43
Place to S7m closely U8 N16
AVDD25_PGA GND_44
AVDD_NODIE_3.3 N17
GND_45
C317 P10
16V GND_46
M8 P11
0.1uF AVDD_NODIE GND_47
P12
GND_48
VDD33_DVI P13
GND_49
N9 P14
ADC2P5_2.5 AVDD_DVI_1 GND_50
L306 P9 P15
AVDD_DVI_2 GND_51
BLM18PG121SN1D N8 P16
AVDD_DMPLL_3.3 AVDD3P3_CVBS GND_52
P8 P17
AVDD_DMPLL GND_53
R10
Place to S7m closely AU33_3.3 GND_54
R11
C316 C323 GND_55
16V T7 R12
16V AVDD_AU33 GND_56
0.1uF 0.1uF U7 R13
VDD33_3.3 AVDD_EAR33 GND_57
R14
GND_58
+3.3V_ST AVDD_DMPLL_3.3 R15
GND_59
L307 T9 R16
AVDD33_T GND_60
+3.3V_ST
BLM18PG121SN1D R17
GND_61
R8 R18
VDDP_1 GND_62
R9 T10
+1.5V_DDR_IN C326 VDDP_2 GND_63
T8 T11
AVDD_DDR0_1.5 16V VDDP_3 GND_64
L300 0.1uF T12
GND_65
BLM18PG121SN1D Place to S7m closely T13
GND_66
V20 T14
NC_5 GND_67
W20 T15
NC_8 GND_68
T16
C301 C306 C310 C318 C324 C332 GND_69
16V 16V 16V 16V 10uF AVDD_NODIE_3.3 U19 T17
0.1uF 10uF L302 NC_2 GND_70
0.1uF 0.1uF 0.1uF 6.3V U20 T18
6.3V
BLM18PG121SN1D NC_3 GND_71
V19 T19
NC_4 GND_72
FRC_LPLL_3.3 U10
GND_73
C305 W19 U11
16V NC_7 GND_74
U18 U12
0.1uF AVDD_LPLL GND_75
AVDD_DDR1_1.5 T20 U13
L301 NC_1 GND_76
Place to S7m closely U14
BLM18PG121SN1D GND_77
Y14 U15
NC_14 GND_78
U16
GND_79
VDD33_3.3 U17
C302 C307 C311 C319 C325 C330 GND_80
16V +3.3V_AVDD V7
16V 16V 16V 10uF 10uF GND_81
0.1uF 0.1uF 0.1uF 0.1uF R19 V8
6.3V 6.3V
AVDD_MEMPLL GND_82
W14 V9
NC_6 GND_83
AVDD_DDR0_1.5 V10
GND_84
VDD33_DVI V11
GND_85
L310 D15 V12
AVDD_DDR0_D_1 GND_86
BLM18PG121SN1D D16 V13
Place to S7m closely AVDD_DDR0_D_2 GND_87
E15 V14
E16 V15
C347 C352 C358 C362 AVDD_DDR1_1.5 E17 V16
16V 16V 16V 10uF AVDD_DDR0_C GND_90
0.1uF V17
0.1uF 0.1uF 6.3V GND_91
F16 V18
F17 W7
G16 W8
G17 W9
VDD33_3.3 AVDD_DDR1_D_4 GND_95
L309 H17 W10
AVDD_DDR1_C GND_96
BLM18PG121SN1D W11
GND_97
W12
GND_98
AB11 W13
NC_22 GND_99
AB12 W16
AVDD_DDR0_1.5 NC_23 GND_100
MVREF AC11 W17
NC_27 GND_101
R300 AC12 W18
1K NC_28 GND_102
AU33_3.3 AA12 Y13
NC_18 GND_103
1% L314 Y18
GND_104
R301 BLM18PG121SN1D Place to S7m closely AA13
1K MVREF GND_106
AB13
1% GND_107
C375 AC13
C366 C374 GND_108
16V 16V 10uF G15 D17
0.1uF 0.1uF 6.3V MVREF GND_109
H23
GND_110
AF13
GND_111
Y7 J9
NC_9 GND_FU
Y8 U9
FRC_LPLL_3.3 NC_10 PGA_VCOM
L316
L320
BLM18PG121SN1D BLM18PG121SN1D
C368
16V
0.1uF

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Main IC Power 3 13
S7M_POWER_BLOCK

POWER Wafer 18P 17V
MLB-201209-0120P-N2
Stand-by (5V_ST --> +3.3V ST)
L501 L511 C524
+5V_ST C522 68uF
120-ohm 0.1uF 35V
P501 P500
50V +5V_ST +3.3V_ST
3A
SMAW200-H18S1 READY +3.3V +5V IC506
AZ1085S-3.3TR/E1 +5V --> +3.3V
R502 IC500
C502 C508 C505 C504
10K EAN58801701 INPUT OUTPUT
10uF 0.1uF 10uF 100uF
16V 1 2 +5V AP2121N-3.3TRE1 3 2 +3.3V
10V 16V 16V READY L507
C539 1 READY R520 C544 C545 L509 C549
3 4 3A VIN 3 2 VOUT 0.1uF 1K 22uF 0.1uF
120-ohm
2A 0.1uF
+3.3V_ST 5 6 ADJ/GND
READY
16V 16V 16V 16V
R526 1 A2[RD] A1[GN] R532
7 8 C521 C525 C585 C527
9 10
22
0.1uF C530 C500 GND 1
R504
ERROR_DET 10uF 100uF 100uF
16V READY16V 10uF 10uF C501 C509 C512 C515 LD501
11 12 16V 16V
16V 0.1uF 10uF 10uF 0.1uF SAM2333
C
10K JP505 16V
100 13 14 READY 16V 6.3V 6.3V 16V
R506
RL_ON 15 16
17 18
C513 R513 100
AC_DET
0.1uF 19
+3.3V_ST 16V C519 R529
0.1uF 1K
16V READY
R508
10K
R507 100
5V_ON
C514
0.1uF
16V
+5V_TU
17V => +5V
120-ohm
L506
EAP61606601
2A
L505
22.0uH
MBRA340T3G
IC507 READY
17V C557
TPS54231D C590
R527
105K
0.1uF 100pF
1%
C560 C561 C565 R1
D501
50V 10uF 10uF 10uF 50V
40V
BOOT PH 16V 16V 16V
1 2A 8 READY
VIN GND
2 7
EN COMP R528
P_CH FET(+5V_ST_EN Source) 3 6 20K R2
R523
1%
16K
C552 C554 C555
3.2A / P-CHANNEL 4.7uF 4.7uF 0.01uF SS
4 5
VSENSE C559
50V 50V 50V
Q501 470pF
50V
R524
3.6K
+5V_ST RTR030P02 +5V_ST_EN C556
C563
0.015uF
S D 50V 15pF
50V
1/10W
R525
51K
READY
5%
C511 C517
0.01uF C526 C532
+3.3V_ST 22uF
1/16W
16V 25V 100uF 0.01uF

R505 25V
10K 16V
G
5%
1/16W
R500
10K
5%
R503 C Vout=0.8*(1+R1/R2)
10K B Q500
RL_ON MMBT3904(NXP)
1/16W
5% E
+5V_ST_EN --> +3.3V_AVDD

+5V_ST_EN
IC504
AZ1085S-3.3TR/E1
INPUT 3 2 OUTPUT
+3.3V_AVDD
C568 1 READY R512 C569 C570 L508 C571
22uF 120-ohm
0.1uF ADJ/GND 1K 0.1uF 2A 0.1uF
READY
16V 16V 16V 16V
A2[RD] A1[GN] R533
+5V_ST_EN --> +1.5V_DDR_IN LD500

SAM2333
1
C
+5V_ST_EN --> +1.26V_VDDC
+5V_ST_EN
READY
R501
+5V_ST_EN
10K
READY
C510
READY
R509 Vout=0.8*(1+R1/R2) READY
R516
0 R530
0.1uF
10K READY
EP[GND]
16V 0
C540 Vout=0.827*(1+R1/R2)
VIN_3
PWRGD
BOOT
C518
0.1uF READY +1.26V_VDDC
+1.5V_DDR_IN R517
EN
16V 0
0.1uF
50V R531
EP[GND]
L502
0
16
15
14
13
3.6uH
VIN_3
PWRGD
VIN_1 PH_3
BOOT
1 12
C542
S7 core 2.5V
EN
THERMAL R1 0.1uF
VIN_2 2 17 11 PH_2
50V L503
R514
16
15
14
13
C503 GND_1 PH_1 10.7K C529 3.6uH

C506 3 IC501 10 100pF C531 C533 C534 VIN_1
10uF 1% C536 1 12 PH_3
16V 0.1uF TPS54319TRE 50V 22uF 10uF 10uF
16V GND_2 SS/TR 0.1uF THERMAL
4 9 R1
3A C520 1000pF
6.3V
READY
10V 10V 16V VIN_2 2 17 11 PH_2
R521 Multi Power(+3.3V_AVDD -->2.5V_AVDD)
5
C537 GND_1 PH_1 39K C546

C538 3 IC502 10 100pF C547 C548 C550
10uF 0.1uF 1% C551
TPS54319TRE
AGND
VSENSE
COMP
RT/CLK
16V 50V 22uF 10uF 10uF 0.1uF

16V GND_2 4 9 SS/TR
6.3V 10V 10V 16V IC505-*1
3A C543 1000pF READY TJ3964S-2.5 +2.5V_AVDD
5
R510
10K R515
R511
AGND
VSENSE
COMP
RT/CLK
12K +3.3V_AVDD VIN VOUT

330K R2
L510
C516 1/16W IC505
2700pF 1% GND
0IPRPML001A
R518 MIC39100
10K R522
Switching freq: 600K R519
C541
330K
75K
1/16W R2 IN 1 3 OUT 1.8A
2700pF 1%
2
Switching freq: 600K GND C567 C573 C580 C586 C589
C562 C564 READY 10uF 10uF 0.1uF 47uF 47uF
10uF 0.1uF 6.3V 6.3V 16V 16V 16V
6.3V 16V READY

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 5 13

BRAZIL DEMODULATOR V
+3.3V EXTERNAL_DEMOD
+3.3V_DE
L609
MLB-201209-0120P-N2
EXTERNAL_DEMOD
READY
READY C691 C692 C693 C694 C695
10uF 0.1uF 0.1uF 0.1uF 0.1uF
6.3V 16V 16V 16V 16V
EXTERNAL_DEMOD EXTERNAL_DEMOD
IC600
+1.2V_DE
KIA1117ST00
R602
OUT IN 10
2 3
R2
1
GND/ADJ
R601
R1
1.2K
+1.2V_DE
+3.3V_DE R633 22
FE_TS_VLD
EXTERNAL_DEMOD
C697 C652 R632 22
10uF 10uF EXTERNAL_DEMOD FE_TS_SYN
C685
6.3V EXTERNAL_DEMODEXTERNAL_DEMOD
EXTERNAL_DEMOD
EXTERNAL_DEMOD R631 22
0.01uF C686
6.3V
C688
C687
0.1uF C689
EXTERNAL_DEMOD FE_TS_SERIAL
C690 R630 22
0.1uF FE_TS_CLK
16V EXTERNAL_DEMOD
0.1uF
EXTERNAL_DEMOD
1uF
1uF
EXTERNAL_DEMOD
HDVDDL1
VDDH_5
VDDL_7
VSS_11
HDVDDH
VSS_10
VDDH_4
AGC_S
TEST0
HDVPP
TEST2
TEST1
GPO2
DENB
PCKB
SDOB
SCKB
NC_4
NC_3
DENA
PCKA
SDOA
GPI2
SCKA
RON
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
VSS_1 1 75 VSS_9
AVDD_S 2 74 INTB
0.1uF AII_S 3 73 INTA
C663
EXTERNAL_DEMOD AIQ_S SADR
4 72
AVSS_S 5 71 VDDH_3 EXTERNAL_DEMOD EXTERNAL_DEMOD
VRT_S SCL C684 0.1uF 22 R642
6 70 AMP_DEMOD_SCL
VRB_S 7 69 SDA
AMP_DEMOD_SDA
TCPO_S VSS_8 22
R643
C664 0.1uF
VDDL_1
8
9
IC602 68
67 HDVDDL0 EXTERNAL_DEMOD EXTERNAL_DEMOD
R640 EXTERNAL_DEMOD
2.2K MSCL_S SADR_S C683 0.1uF
10 66
EXTERNAL_DEMOD R641 2.2K MSDA_S 11 MN884433
EXTERNAL_DEMOD
65 NC_2
IF_N_MSTAR VSS_2
EXTERNAL_DEMOD 12 64 SADR_T
EXTERNAL_DEMOD VSSH VDDL_6
13 63
0.1uF PSEL VSS_7 C682 0.1uF
C665 14 62
ZSEL ERRB EXTERNAL_DEMOD
EXTERNAL_DEMOD
15 61
EXTERNAL_DEMOD VDDL_2 16 60 SYNCB
INTERNAL_DEMOD 0.1uF ACKI ERRA
C666 17 59
5%
1/16W
EXTERNAL_DEMOD
R621 TCPO_T 18 58 SYNCA
R603
10K 1% IR_T TDO

19 57
EXTERNAL_DEMOD VRT_T 20 56 CSEL1
C670 C667 0.1uF VRB_T CSEL0
EXTERNAL_DEMOD 21 55
0.1uF C668 0.1uF
EXTERNAL_DEMOD EXTERNAL_DEMOD AVDD_T 22 54 TMS
16V C669 0.1uF
R622 100 AIN_T TRST
TUNER_IF_N 23 53
AIP_T 24 52 VDDL_5
TUNER_IF_P R623 100 AVSS_T VSS_6 C681 0.1uF
C671 25 51
EXTERNAL_DEMOD
EXTERNAL_DEMOD
0.1uF EXTERNAL_DEMOD
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
16V
5%
1/16W
+3.3V_DE
R604
Close to R622,R623
EXTERNAL_DEMOD
VSS_3
MSCL_T
MSDA_T
VDDH_1
GPO1
AGCI_T
AGCR_T
GPO0
VDDL_3
VSS_4
XO
XI
VDDH_2
GPI1
GPI0
TEST4
SHVPP
SHVDDH
NC_1
VSS_5
VDDL_4
TCK
TDI
NRST
TEST3
INTERNAL_DEMOD
R639
2.7K
R624 2.2K
EXTERNAL_DEMOD
R625
EXTERNAL_DEMOD
2.2K
IF_P_MSTAR /DEMOD_RESET
EXTERNAL_DEMOD
C696
EXTERNAL_DEMOD
EXTERNAL_DEMOD 0.1uF
C672 C674 C677 C679 C680 16V
0.1uF 0.1uF 0.1uF
0.1uF
0.1uF
16V
EXTERNAL_DEMOD 16V EXTERNAL_DEMOD
16V 16V
EXTERNAL_DEMOD 16V
EXTERNAL_DEMOD
C678
0.1uF
R627 16V
1M
EXTERNAL_DEMOD
ISDB_IF_AGC
R626 10K X602
EXTERNAL_DEMOD
EXTERNAL_DEMOD 25MHz
EXTERNAL_DEMOD
C673
0.1uF C675 C676
30pF 30pF
50V 50V
EXTERNAL_DEMOD
EXTERNAL_DEMOD

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BRAZIL DEMODULATOR 6 14

ST Audio AMP
+3.3V
R705
10K
READY R708
0
C READY
R704
10K B 19 18
AMP_MUTE Q700
READY 2SC3052 EAPD/OUT4B OUT3A/FFX3A
E READY 20 17
TWARN/OUT4A OUT3B/FFX3B
C703
0.1uF 0 R709
21 16
50V VDD_DIG_1 CONFIG
C707
22 15 0.1uF
GND_DIG_1 VDD 50V
AC_DET
22 R710
23 14
R702 PWRDN GND_REG JP701
2.2 24 13 R726 L700 C719 C723

10.0uH
VDD_PLL OUT1A 20 0.22uF 1000pF
R706 50V 50V
2K C705 25 12
SMAW250-H04R
C700 C717
0.1uF 680pF
50V
FILTER_PLL GND1 C708 1uF 25V 0.22uF
16V C701 C714 50V
4700pF C720 C724 4
R703 50V 26 11 C709 0.1uF 50V 330pF
L701 0.22uF 1000pF
GND_PLL VCC1 50V 10.0uH JP702
P700
0 Close-by 50V 50V
27 Close-by
AUD_MASTER_CLK 3
22 R711
10
XTI OUT1B JP703
AUD_SCK
28 9 L702 2
22 R712 C715 10.0uH
BICKI OUT2A C710 1uF 25V 330pF C721 C725
AUD_LRCK 50V 0.22uF 1000pF
22 R713
29 8 C711 0.1uF 50V C718
0.22uF 50V 50V 1
LRCKI VCC2 50V
AUD_LRCH R727 C722 C726
22 R714
30 7 20 L703 0.22uF 1000pF
READY READY READY READY
SDI GND2 10.0uH JP704
/AMP_RESET
Close-by 50V 50V
C730 C731 C732 C733 31 6 C712 17V
22pF 22pF 22pF 22pF 22 R715 C713 C716 C728 C729
RESET OUT2B 0.1uF 100uF 100uF 100uF 100uF
50V 50V 50V 50V 50V 25V 25V
C706 25V 25V
R700 2K 32 5 0.1uF
22 R716 INT_LINE VCC_REG 50V
AMP_DEMOD_SDA
THERMAL
R701 2K
33 4
22 R717 SDA VSS
37
AMP_DEMOD_SCL
34 3
SCL TEST_MODE
R707 35 2
10K GND_DIG_2 SA
C702 C704 36 Close-by 1
0.1uF 0.1uF
VDD_DIG_2 GND_SUB
50V
50V
[EP]GND
STA368BWG
IC700

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AUDIO AMP 7 14

+3.3V_ST
R871
0
R800
G
68K
Q800
+3.3V_ST
BSS83
R835
D
B
S
READY
D801
91K
CEC_REMOTE HDMI_CEC_S7
HDMI_JACK S7
R872
0
READY
HDMI 1 HDMI 2 SIDE HDMI(SMD TYPE)

5V_DET_HDMI_2 5V_DET_HDMI_4
5V_HDMI_4
C
5V_HDMI_2 5V_DET_HDMI_3
R833 10K
SHIELD HDMI1 B
5V_HDMI_3
HPD2 HDMI2 BODY_SHIELD SIDE HDMI C SIDE HDMI
R823 HDMI1 C
Q805 SHIELD R851 R857 10K
20 Q807 B
1K E HDMI1 R842 B 10K
HDMI2 20 1K 2SC3875S(ALY) HPD4
$0.47 2SC3875S(ALY) HPD3 SIDE HDMI SIDE HDMI SIDE HDMI
C803 20 1K R869
->$0.24 19 R822 R824 HDMI2 HDMI2 HDMI2 HDMI2
Q806 E SIDE HDMI
1.8K 3.3K 0.1uF E 19 R856 R860 C810
C808 2SC3875S(ALY) HOT_PLUG_DETECT 1.8K 3.3K 0.1uF
18 16V $0.47 19 R841 R843
HDMI1 HDMI1 HDMI1 1.8K 3.3K 0.1uF 16V
D806 ->$0.24 18
READY HDMI1 16V VDD[+5V] D808
17 18 READY SIDE HDMI
AVRL161A1R1NT R826 22 D807 17
HDMI2
16 DDC_SDA_2 17 READY DDC/CEC_GND AVRL161A1R1NT R858 22
R827 22 AVRL161A1R1NT R845 22 16 DDC_SDA_4
DDC_SCL_2 DDC_SDA_3 SDA R859 22
15 16 R844
HDMI1 22 15 DDC_SCL_4
SIDE HDMI
DDC_SCL_3 SCL
14 15
R828 0 HDMI2 14
CEC_REMOTE RESERVED R878 0
13 HDMI1 14 CEC_REMOTE
R846 0 13 SIDE HDMI
CK-_HDMI2 CEC_REMOTE CEC
12 13 HDMI2 CK-_HDMI4
12
EAG59023302
CK-_HDMI3 TMDS_CLK-
11 12
CK+ 11
10
EAG59023301
CK+_HDMI2 TMDS_CLK_SHIELD
11 CK+_HDMI4
D0- CK+ 10
9 D0-_HDMI2 10 TMDS_CLK+
CK+_HDMI3
D0_GND D0- 9 D0-_HDMI4
8 9 TMDS_DATA0-
D0-_HDMI3
D0+ D0_GND 8
7 D0+_HDMI2 8 TMDS_DATA0_SHIELD
D1- D0+ 7 D0+_HDMI4
6 D1-_HDMI2 7 TMDS_DATA0+
D0+_HDMI3
5 6 TMDS_DATA1-
D1-_HDMI3
D1+ D1_GND 5
D2- D1+ 4 D1+_HDMI4
3 D2-_HDMI2 4 TMDS_DATA1+
D1+_HDMI3
2 3 TMDS_DATA2-
D2-_HDMI3
D2+ D2_GND 2
D2+ HDMI2 1 D2+_HDMI4
1 TMDS_DATA2+
D2+_HDMI3
JK801 GND
HDMI1 RSD-105156-100
JK803 JK804
10mm GND
GND
5V_HDMI_4 +5V
5V_HDMI_3 +5V
5V_HDMI_2 +5V
HDMI
A2
A1
ENKMC2838-T112
A2
A1
SIDE
C HDMI2
SIDE HDMI D805

IC804
C
D804
A2
A1
HDMI2 AT24C02BN-SH-T
HDMI1 IC802 ENKMC2838-T112
IC801 ENKMC2838-T112 SIDE HDMI
D803 AT24C02BN-SH-T C811
AT24C02BN-SH-T HDMI1 HDMI2
VCC 0.1uF
C
A0
SIDE HDMI
HDMI1 C809 1 8
C805 0.1uF
SIDE HDMI
SIDE HDMI
0.1uF A0 VCC R864
A0 VCC 1 8 18K
HDMI2
1 8 A1 WP
R850 2 7 R867 R868
R831 18K 18K 18K
HDMI2
HDMI2
18K A1 WP EDID_WP
A1 WP R832 R834 2 7 R852 R853
2 7 HDMI1 A2 SCL R862 22
18K 18K 18K 18K 3 6
EDID_WP DDC_SCL_4
EDID_WP HDMI1 HDMI1 A2 SCL R848 22
A2 SCL R830 22 3 6 DDC_SCL_3 SIDE HDMI
3 6 DDC_SCL_2 GND SDA R863 22
HDMI2 4 5 DDC_SDA_4
HDMI1
GND SDA R849 22
GND SDA R829 22 4 5 DDC_SDA_3 SIDE HDMI
4 5 DDC_SDA_2
HDMI1 HDMI2
GND
GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 8 14
HDMI

RGB SUB Board I/F +5V_ST
P902
D907
D908
D904
D905
D906
READY 12507WS-15L
R910
P900 +3.3V_ST 10K
SPG09-DB-010 L903
IR 1
C900
0.1uF C925
16V
DSUB_R
R906 4700pF
R950 2
75 2.7K R938 R941
RED_GND
6 DSUB_R- 10K 10K R943
GND_2 22
1 READY KEY1 3
11 RED L902
R949 C930
GREEN_GND 0 R944
7 DDC_DATA
22 10pF
4
RGB_DDC_SDA KEY2
2 12 GREEN C
DSUB_G R948
C926
BLUE_GND +3.3V 4.7K B Q901
8 R908
LED_RED 2SC3052
10pF 5
H_SYNC 75
3 13 BLUE +3.3V_ST
C928
DSUB_G- E
R911
NC 1uF 6
10K
9 R914 10V
V_SYNC 10K
4 14 R946
GND_1 L904 22
R974 0 R917 1K SUB_SCL 7
SYNC_GND R909
10 DSUB_DET 10K
DDC_CLOCK C914 R947
5 15 DDC_GND R973 0 D909 0.1uF C924 22 8
SUB_SDA 10pF
30V 16V
READY READY READY
READY C923 9
16 +3.3V_ST 10pF
SHILED
READY
L900
DSUB_B +5V
10
R907 C927
75 0.1uF
L901
16V 11
READY
R915 DSUB_B- R939 LED_WHITE
22 R937 LED_WHITE 2.7K C932
L905 DSUB_HSYNC 0 0.1uF
12
C916 16V
10pF LED_WHITE C933 LED_WHITE
R916 C 10pF
22 50V R940 LED_WHITE
DSUB_VSYNC 4.7K B Q902
LED_WHITE 13
C917 LED_WHITE 2SC3052 +3.3V_ST
10pF
50V E 14
R945 15
RGB_DDC_SCL
10K
16
TOUCH_VER_CHK
GND
ROM DOWNLOAD FOR PDP

+5V_ST
+3.3V
IC901
READY
AT24C02BN-SH-T For RGB Debugging
R975 FOR NON_RGB_DEBUG
1K P906
R903
C922
1 8 R923 R924 0.1uF 12507WR-03L
10 R912 10K
PC_SER_DATA 18K 10K
2 7
C905 C908
220pF 220pF EDID_WP 1
50V 50V 3 6 RGB_DDC_SCL
READY READY RGB_DDC_SCL
R902
10
PC_SER_CLK 4 5 RGB_DDC_SDA 2
READY
C901 C906 R976 C918 C919 RGB_DDC_SDA
270pF 220pF D900 D901 1K 18pF 18pF
3
50V 50V 50V 50V
READY READY
4
232C_NO6
232C_NO4
PC AUDIO
RS232C IR Wafer/ SIDE_HDMI/USB GASKET GND
READY
READY
R930
SCREW GND Seperate

R932
+3.3V_ST
100
JK900
100
PEJ027-01
C902 C907 3 E_SPRING

0.1uF 0.1uF C909 R959 M1 M2 M3
50V 50V 0.1uF 0
50V MDS62110209 MDS62110209 MDS62110209
6A T_TERMINAL1
C910
0.1uF R961
R980 0 0
50V
7A B_TERMINAL1
DOUT2
PC_RIN
RIN2
R966
C2-
C2+
C1-
C1+
D910 R931 0
V-
V+
4 R_SPRING C920 10K

5.6V 820pF
50V R926 R935 R962
8
470K 12K 0
UART_PM_TX
UART_PM_RX
5 T_SPRING
IC900
$0.179 7B B_TERMINAL2
MAX3232CDR +5V_ST PC_LIN EMI_GND1
+3.3V_ST R933 R952
D911 C921
6B T_TERMINAL2 10K 0
+3.3V_ST 820pF
5.6V 50V R927
10
11
12
13
14
15
16
R936
9
470K 12K R953

0
ROUT2
DIN2
DIN1
ROUT1
RIN1
DOUT1
GND
VCC
R934 R954
R901 0
READY
R900
R918
R928
R942
USA
22
R929
R981
R982
10K
10K
22
10K C911
10K
22
22
READY
0 0.1uF
READY
R951
50V 0
S7_TXD
S7_RXD EMI_GND2
R905
D902 R956
USA IR JACK
100
UART_TXD_3DR904
UART_RXD_3D 0
100 30V
READY R978
PC_SER_DATA JK901 R955
0
22 PEJ027-01
PC_SER_CLK D914
30V
D915
READY 22 D903 E_SPRING R957
30V
R979 IR JACK 3 0
READY 30V
C903 220pF 50V
6A T_TERMINAL1 R958
USA IR 0
C904 220pF 50V
READY 232C_NO4
7A B_TERMINAL1 C915
232C_NO6
22 READY
R977
TX 4 R_SPRING R960 EMI_GND3
NON_IR JACK
0
R919
R922
USA
T_SPRING
0
5
100K
C USA R963
0
Q900 B 7B B_TERMINAL2
SPG09-DB-009
2SC3052
USA
100K 6B T_TERMINAL2
E R920
P901
IR JACK
10
TX
IR JACK
EAG60841801 10 GND
D912
5.6B
R921
EMI_GND4
1

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR RGB/RS232/PC/USA IR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SUB IR 9 14

SIDE CVBS
+3.3V
5A [YL]E-LUG
SIDE_CVBS_IN
ADMC5M03200L_AMODIODE
4A [YL]O-SPRING C1016
+3.3V D1022 R1044 47pF
R1077 3A +3.3V 30V 50V
READY
10K [YL]CONTACT 75
R1080
R1036
1K
R1059 4B
10K
COMP2_DET [WH]O-SPRING
10K
AV_CVBS_DET R1019
D1012 3C 1K
5.6V [RD]CONTACT SIDE_CVBS_DET
D1000 R1060
D1020
C1000 1K C1013
30V
5.6V 100pF 4C READY 0.1uF
50V [RD]O-SPRING
16V
READY R1086
10K 5C [RD]E-LUG
COMP2_RIN R1040
PPJ235-01 10K
R1079
C1011 R1095 SIDE_LIN
470K 1000pF 12K JK1002 C1015
D1021
R1038
D1010 50V 820pF
470K
R1043
12K
5.6V
+3.3V
R1039
10K
R1061
R1085 SIDE_RIN
10K C1014
D1019
R1037
10K
470K
COMP2_LIN 820pF
12K
R1042
C1010 R1094
R1078
JK1000 R1062
COMP1_DET
470K
1000pF
50V
12K
D1011
PPJ239-01 D1001 1K 5.6V
5.6V
6H [RD1]E-LUG
5H [RD1]O-SPRING_2
4H [RD1]CONTACT_2
SPDIF
5G [WH1]O-SPRING
+5V +5V
4F [RD1]CONTACT_1
R1058
1K C1024
5F [RD1]O-SPRING_1 IC1000
NL17SZ00DFT2G 10uF JK1003
COMP2_Pr+ C1023 16V JST1223-001
READY
READY
A VCC
READY SPDIF_OUT 1 5 0.1uF
D1004
R1067 C1003 B
NAND 50V
75 10pF 2
R1055 GND
[RD1]E-LUG-S 30V GATE
Fiber Optic
7F 50V GND
3 4
Y 100
COMP2_Pr-
VCC
2
R1051 C1022
R1065 100
5E [BL1]O-SPRING 0 22pF
COMP2_Pb+ VINPUT
READY
3
READY
4
D1003 C1001
30V 75 10pF
7E [BL1]E-LUG-S R1004 50V FIX_POLE
COMP2_Pb-
R1003
R1006
0
4D [GN1]CONTACT 0
+5V
R1096
0 READY
5D [GN1]O-SPRING R1083
3.6K READY
READY C
R1093
82 READY
B Q1000
2SC3052
[GN1]E-LUG
READY
6D C1009
0.47uF E R1098 AV_CVBS
25V 0
READY R1084
READY +5V
4.7K R1097
6N [RD2]E-LUG 270
R1099
READY 0READY
C
R1092
82
5N [RD2]O-SPRING_2 B
READY Q1001
2SC3052
E
R1021
COMP2_Y+
[RD2]CONTACT
READY
0READY
4N
R1020
270
R1002
5M [WH2]O-SPRING
READY
READY 0
D1002 C1002
30V 75 10pF
R1001
50V
5L [RD2]O-SPRING_1 0 R1005
COMP2_Y-
R1081
10K
7L [RD2]E-LUG-S AV_RIN_COM1
D1009 R1075 C1008

5.6V 470K R1089
1000pF 12K
50V
5K [BL2]O-SPRING R1082
COMP1_DET AV_CVBS_DET RESULT
10K
AV_LIN_COM1
R1072 C1007 R1088
D1008 470K
5.6V 1000pF 12K
7K [BL2]E-LUG-S 50V
HIGH HIGH COMP1_DET

READY
COMP1_Pr+
4J [GN2]CONTACT D1006 C1004READY
30V R1076
75 10pF
50V
COMP1_Pr- HIGH LOW AV_CVBS
5J [GN2]O-SPRING
R1071
0
COMP1_Pb+
[GN2]E-LUG READY
READY
6J R1073 C1006 LOW HIGH

D1007 75 10pF
30V 50V
COMP1_Pb-
R1070
0
COMP1_Y+ LOW LOW
READY
D1005 READY
R1074 C1005
30V 75 10pF
50V
COMP1_Y-
R1069
0

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CVBS/COM1/2 JACK 10 14

USB1 SIDE
SWITCH ADDED
+3.3V +3.3V
SIDE USB
Capacitors on VBUSA should be IC1101
placed as closd to connector as possible. R1129 AP2191SG-13 R1141
10K 10K +5V
NC GND
SIDE USB 8 1
READY
OUT_2 IN_1
7 2
$0.11
+USB1_OCD OUT_1
6 3
IN_2
C1120
R1124 22 FLG EN R1145 22 0.1uF
JP1101 C1122 SIDE USB
5 4
SIDE USB
16V
C1116
10uF 100uF +USB1_CTL SIDE USB
3AU04S-305-ZC-(LG) 16V 16V
SIDE USB SIDE USB
JP1102
JK1102
1
USB DOWN STREAM
USB1_DM_to_MAIN
2
USB1_DP_to_MAIN
3
JP1103
D1100 D1102
CDS3C05HDMI1 CDS3C05HDMI1
4
5.6V 5.6V
10mm READY READY
5
USB2 REAR(SVC)
SVC USB
L1100 +5V
0LCML00003B
MLB-201209-0120P-N2
SVC USB
JK1100 C1121
KJA-UB-0-0037 0.1uF
16V
SVC USB
2 USB2_DM_to_MAIN
3 USB2_DP_to_MAIN
D1101 D1103
4 CDS3C05HDMI1 CDS3C05HDMI1
5.6V 5.6V
READY READY
5

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. 2010.10.21
EAX63425902(3)
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
SIDE / SVC USB 11 14
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

VCC_1.5V_DDR VCC_1.5V_DDR VCC_1.5V_DDR
VCC_1.5V_DDR
VCC_1.5V_DDR
R1201
DDR3 1.5V By CAP - Place these Caps near Memory VCC_1.5V_DDR

R1204
R1227
DDR3 1.5V By CAP - Place these Caps near Memory
1K 1%
R1224
1K 1%
1K 1%
1K 1%
A-MVREFDQ A-MVREFCA B-MVREFDQ
0.1uF
1000pF
B-MVREFCA
0.1uF
0.1uF
1000pF
1000pF
1%
0.1uF
1000pF
1%
1%
R1202
1%
R1205
R1228
C1205
C1216
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
R1225
C1206
C1207
C1208
C1210
C1211
C1212
C1213
C1214
C1215
C1217
C1218
C1219
C1220
C1221
C1222
C1223
C1224
C1235
C1246
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
C1227
C1228
C1229
C1230
C1231
C1232
C1233
C1234
C1236
C1237
C1238
C1239
C1241
C1242
C1243
C1244
C1245
10uF
C1202
C1201
C1204
C1249
C1203
C1247
C1250
1K
C1248
1K
1K
1K
Close to DDR Power Pin Close to DDR Power Pin
CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3
VCC_1.5V_DDR
+1.5V_DDR_IN
L1201
R1215
B-TMA0 B-MA0
56
C1225 C1226
10uF R1216
R1213 0.1uF
10V B-TMA2 B-MA2
A-MA0 A-TMA0 16V 56
56
AR1211
R1214
B-TMA11
IC1202
A-MA2 A-TMA2 B-MA11
56 B-TMA1
H5TQ1G63BFR-H9C
B-MA1
AR1208
IC1201 B-TMA8 B-MA8
A-MA11 A-TMA11
H5TQ1G63BFR-H9C B-TMA6 B-MA6
A-MA1 A-TMA1 N3
KOR FAB M8
56 B-MA0 A0 VREFCA B-MVREFCA
A-MA8 A-TMA8 AR1214 P7
B-MA1 A1
A-MA6 A-TMA6 B-TMBA0 B-MBA0 P3
M8 N3 KOR FAB B-MA2 A2
A-MVREFCA VREFCA A0 A-MA0 56 B-TMA3 B-MA3 N2 H1
P7 AR1203 B-MA3 A3 VREFDQ B-MVREFDQ
A1 A-MA1 IC101 B-TMA5 B-MA5 P8
P3 B-MA4 A4
A-MA2 A-MBA0 A-TMBA0 P2
H1
A2
N2 LGE101DC-R-1 [S7R DIVX] B-TMA7 B-MA7 B-MA5 A5 R1226
A-MVREFDQ VREFDQ A3 A-MA3 A-MA3 A-TMA3 56 R8 L8
P8 B-MA6 A6 ZQ
A4 A-MA4 A-MA5 A-TMA5 AR1215 R2
P2 B-MA7 240
A-MA7 A-TMA7 A7
R1203 A5 A-MA5 B8 A25 B-TMA4 B-MA4 T8 1%
L8 R8 56 A-TMA0 A_DDR3_A0/DDR2_A13 B-TMA0 B-MA8 A8
ZQ A6 A-MA6 B_DDR3_A0/DDR2_A13 B-TMA12 B-MA12 R3 B2
R2 AR1204 B9 B24 B-MA9
240 A-TMA1 A_DDR3_A1/DDR2_A8 B_DDR3_A1/DDR2_A8 B-TMA1 A9 VDD_1
A7 A-MA7 A8 A24 B-TMBA1 B-MBA1 L7 D9
1% T8 A-MA4 A-TMA4 A-TMA2 B-TMA2 B-MA10 A10/AP VDD_2
A8 A-MA8 A_DDR3_A2/DDR2_A9 B_DDR3_A2/DDR2_A9 B-TMA10 B-MA10 R7 G7
B2 R3 C21 P25 B-MA11
A-MA12 A-TMA12 A-TMA3 A_DDR3_A3/DDR2_A1 B_DDR3_A3/DDR2_A1 B-TMA3 56 A11 VDD_3
VDD_1 A9 A-MA9 B10 C24 N7 K2
D9 L7 A-MBA1 A-TMBA1 A-TMA4 A_DDR3_A4/DDR2_A2 B-TMA4 B-MA12 A12/BC VDD_4
VDD_2 A10/AP A-MA10 B_DDR3_A4/DDR2_A2 AR1219 T3 K8
G7 R7 A22 P26 B-MA13 A13
A-MA10 A-TMA10 A-TMA5 A_DDR3_A5/DDR2_A10 B_DDR3_A5/DDR2_A10 B-TMA5 VDD_5
VDD_3 A11 A-MA11 A10 B26 B-TMRESETB B-MRESETB N1
K2 N7 56 A-TMA6 A_DDR3_A6/DDR2_A4 B-TMA6 VDD_6
VDD_4 A12/BC A-MA12 B_DDR3_A6/DDR2_A4 B-TMBA2 B-MBA2 M7 N9
K8 T3 B22 R24 A15
AR1201 A-TMA7 A_DDR3_A7/DDR2_A3 B_DDR3_A7/DDR2_A3 B-TMA7 VDD_7
VDD_5 A13 A-MA13 C9 B25 B-TMA13 B-MA13 R1
N1 A-MRESETB A-TMRESETB A-TMA8 A_DDR3_A8/DDR2_A6 B-TMA8 VDD_8
VDD_6 B_DDR3_A8/DDR2_A6 B-TMA9 B-MA9 M2 R9
N9 M7 C23 T26 B-MBA0 BA0
VCC_1.5V_DDR
A-MBA2 A-TMBA2 A-TMA9 A_DDR3_A9/DDR2_A12 B_DDR3_A9/DDR2_A12 B-TMA9 VDD_9
VDD_7 A15 B11 D24 56 N8
R1 A-MA13 A-TMA13 A-TMA10 B-TMA10 B-MCK B-MBA1 BA1
A_DDR3_A10/DDR2_RASZ B_DDR3_A10/DDR2_RASZ
R1238 R1237
VDD_8 A9 A26 R1222 M3
R9 M2 B-MBA2
56
VCC_1.5V_DDR A-MA9 A-TMA9 A-TMA11 A_DDR3_A11/DDR2_A11 B_DDR3_A11/DDR2_A11 B-TMA11 B-TMCK B-MCK BA2
VDD_9 BA0 A-MBA0 C10 C25 C1240 A1
N8 A-MCK 22 VDDQ_1
R1236 R1235
56 A-TMA12 A_DDR3_A12/DDR2_A0 B_DDR3_A12/DDR2_A0 B-TMA12

BA1 A-MBA1 B23 T25 J7 A8
R1223
56
M3 R1206 A-TMA13 B-TMA13 CK VDDQ_2

A-MBA2 A_DDR3_A13/DDR2_A7 B_DDR3_A13/DDR2_A7 0.01uF K7 C1
56
BA2 C1209 B-TMCKB B-MCKB
A1 A-MCK A-TMCK 22 CK VDDQ_3
VDDQ_1 22 K9 C9
A8 J7 AR1220 B-MCKE CKE VDDQ_4
0.01uF R1207 B-MCKB D2
56
VDDQ_2 CK
C1 K7 A-MCKB A-TMCKB B-TMRASB B-MRASB VDDQ_5
VDDQ_3 CK B21 P24 L2 E9
C9 K9 A-MCKB 22 CS VDDQ_6
A-MCKE A-TMBA0 A_DDR3_BA0/DDR2_BA2 B_DDR3_BA0/DDR2_BA2 B-TMBA0 B-TMCASB B-MCASB K1 F1
VDDQ_4 CKE AR1202 A11 C26
D2 A-TMBA1 B-TMBA1 B-TMODT B-MODT B-MODT ODT VDDQ_7
IC1201-*1
VDDQ_5 A_DDR3_BA1/DDR2_CASZ B_DDR3_BA1/DDR2_CASZ J3 H2
H5TQ1G63BFR-H9C-C L2 A-MRASB A-TMRASB A23 R26 IC1202-*1
E9
VDDQ_6 CS
A-TMBA2 A_DDR3_BA2/DDR2_A5 B_DDR3_BA2/DDR2_A5 B-TMBA2 B-TMWEB B-MWEB VCC_1.5V_DDR B-MRASB
K3
RAS VDDQ_8
H9 H5TQ1G63BFR-H9C-C
CHN FAB F1 K1 A-MCASB A-TMCASB B-MCASB CAS VDDQ_9
N3 M8
A-MODT 56 L3
P7
A0 VREFCA VDDQ_7 ODT A-MODT A-TMODT A12 D26 R1232 CHN FAB
A1 H2 J3 A-TMCK B-TMCK R1219 B-MWEB WE N3 M8
P3
A2 VDDQ_8 RAS A-MRASB A_DDR3_MCLK/DDR2_MCLK B_DDR3_MCLK/DDR2_MCLK 10K J1 P7
A0 VREFCA
N2 H1
H9 K3 VCC_1.5V_DDR A-MWEB A-TMWEB C11 D25 B-TMDQSL B-MDQSL
A1
P8
A3 VREFDQ
A-TMCKB A_DDR3_MCLKZ/DDR2_MCLKZ B_DDR3_MCLKZ/DDR2_MCLKZ B-TMCKB NC_1 P3
A2
A4 VDDQ_9 CAS A-MCASB B12 E24 22 T2 J9 N2
A3 VREFDQ
H1
P2
A5 L3 56 B-MRESETB RESET NC_2 P8
R8 L8
A-MWEB R1231 A-TMCKE A_DDR3_CKE/DDR2_DQ5 B_DDR3_CKE/DDR2_DQ5 B-TMCKE R1220 L1
A4
R2
A6 ZQ WE 10K R1208
P2
A5
T8
A7 J1 B-TMDQSLB B-MDQSLB NC_3 R8
A6 ZQ
L8
R3
A8
B2
NC_1 A-MDQSL A-TMDQSL 22 L9 R2
A7
L7
A9 VDD_1
D9
J9 T2 22 NC_4 T8
A8
R7
A10/AP VDD_2
G7
NC_2 RESET A-MRESETB C20 N25 R1217 F3 T7 R3
A9 VDD_1
B2
A11 VDD_3 L1 R1209 A-TMODT B-TMODT B-MDQSL DQSL NC_6 L7 D9

N7 K2
NC_3 A_DDR3_ODT/DDR2_ODT B_DDR3_ODT/DDR2_ODT B-TMDQSU B-MDQSU G3 R7
A10/AP VDD_2
G7
T3
A12/BC VDD_4
K8
L9 A-MDQSLB A-TMDQSLB A20 M26 B-MDQSLB
A11 VDD_3
A13 VDD_5
N1 22 A-TMRASB A_DDR3_RASZ/DDR2_WEZ B_DDR3_RASZ/DDR2_WEZ B-TMRASB 22 DQSL N7
A12/BC VDD_4
K2
M7
VDD_6
N9
NC_4 B20 N24 R1218
T3
A13 VDD_5
K8
A15 VDD_7 T7 F3 A-TMCASB B-TMCASB

N1
VDD_8
R1
NC_6 DQSL A-MDQSL R1211 A_DDR3_CASZ/DDR2_BA1 B_DDR3_CASZ/DDR2_BA1 B-TMDQSUB B-MDQSUB C7 A9 M7
VDD_6
N9
M2 R9
G3 A21 N26 B-MDQSU DQSU
A15 VDD_7
N8
BA0 VDD_9 A-MDQSU A-TMDQSU A-TMWEB A_DDR3_WEZ/DDR2_BA0 B_DDR3_WEZ/DDR2_BA0 B-TMWEB 22 VSS_1 VDD_8
R1
M3
BA1 DQSL A-MDQSLB 22 B7 B3 M2
BA0 VDD_9
R9
BA2 B-MDQSUB DQSU VSS_2 N8

BA1
VDDQ_1
A1
R1212 AR1212 E1 M3
J7 A8
A9 C7 C22 R25 BA2
K7
CK VDDQ_2
C1 A-MDQSUB A-TMDQSUB A-TMRESETB A_DDR3_RESETB B_DDR3_RESETB B-TMRESETB VSS_3 VDDQ_1
A1
CK VDDQ_3 VSS_1 DQSU A-MDQSU B-TMDQL1 B-MDQL1 E7 G8 J7

CK VDDQ_2
A8
K9
CKE VDDQ_4
C9
B3 B7 22 B-MDML DML VSS_4 K7
CK VDDQ_3
C1
D2
L2
VDDQ_5
E9
VSS_2 DQSU A-MDQSUB B-TMDQL3 B-MDQL3 D3 J2 K9
CKE VDDQ_4
C9
K1
CS VDDQ_6
F1
E1 AR1209 B-MDMU DMU VSS_5 VDDQ_5
D2
J3
ODT VDDQ_7
H2
VSS_3 C16 J25 B-TMDML B-MDML J8 L2
CS VDDQ_6
E9
RAS VDDQ_8 G8 E7 A-MDQL1 A-TMDQL1 A-TMDQSL B-TMDQSL VSS_6 K1 F1

K3
CAS VDDQ_9
H9
VSS_4 DML A-MDML A_DDR3_DQSL/DDR2_DQS0 B_DDR3_DQSL/DDR2_DQS0 B-TMDQU2 B-MDQU2 E3 M1 J3
ODT VDDQ_7
H2
L3
J2 D3 B16 J24 B-MDQL0 DQL0
RAS VDDQ_8
WE
J1 A-MDQL3 A-TMDQL3 A-TMDQSLB A_DDR3_DQSLB/DDR2_DQSB0 B_DDR3_DQSLB/DDR2_DQSB0 B-TMDQSLB VSS_7 K3
CAS VDDQ_9
H9
T2
NC_1
J9
VSS_5 DMU A-MDMU 22 F7 M9 L3
WE
RESET NC_2
L1
J8 A-MDML A-TMDML B-MDQL1 DQL1 VSS_8 NC_1
J1
NC_3
L9
VSS_6 A16 H26 AR1213 F2 P1 T2
RESET NC_2
J9
NC_4 M1 E3 A-MDQU2 A-TMDQU2 A-TMDQSU B-TMDQSU B-MDQL2 DQL2 VSS_9 L1

F3
DQSL NC_6
T7
VSS_7 DQL0 A-MDQL0 A_DDR3_DQSU/DDR2_DQSB1 B_DDR3_DQSU/DDR2_DQSB1 B-TMCKE B-MCKE F8 P9
NC_3
L9
G3
M9 F7 C15 H25 B-MDQL3 DQL3
NC_4
DQSL 22 A-TMDQSUB A_DDR3_DQSUB/DDR2_DQS1 B_DDR3_DQSUB/DDR2_DQS1 B-TMDQSUB VSS_10 F3
DQSL NC_6
T7
C7 A9
VSS_8 DQL1 A-MDQL1 B-TMDQL7 B-MDQL7 H3 T1 G3
DQSL
B7
DQSU VSS_1
B3
P1 F2 AR1210 B-MDQL4 DQL4 VSS_11
DQSU VSS_2
E1
VSS_9 DQL2 A-MDQL2 A14 F26 B-TMDQL5 B-MDQL5 H8 T9 C7
DQSU VSS_1
A9
VSS_3 P9 F8 A-MCKE A-TMCKE A-TMDML B-TMDML B-MDQL5 DQL5 VSS_12 B7 B3

E7
DML VSS_4
G8
VSS_10 DQL3 A-MDQL3 A_DDR3_DML//DDR2_DQ13 B_DDR3_DML/DDR2_DQ13 G2
DQSU VSS_2
E1
D3 J2
T1 H3 B18 L24 B-MDQL6 DQL6 E7
VSS_3
G8
DMU VSS_5
J8 A-MDQL7 A-TMDQL7 A-TMDMU A_DDR3_DMU/DDR2_DQ6 B_DDR3_DMU/DDR2_DQ6 B-TMDMU 22 DML VSS_4
E3
VSS_6
M1
VSS_11 DQL4 A-MDQL4 H7 D3
DMU VSS_5
J2
DQL0 VSS_7 T9 H8 A-MDQL5 A-TMDQL5 B-MDQL7 DQL7 VSS_6

J8
F7
DQL1 VSS_8
M9
VSS_12 DQL5 A-MDQL5 AR1216 B1 E3 M1
F2 P1
G2 C18 L25 DQL0 VSS_7
F8
DQL2 VSS_9
P9 A-TMDQL0 A_DDR3_DQL0/DDR2_DQ3 B_DDR3_DQL0/DDR2_DQ3 B-TMDQL0 VSSQ_1 F7
DQL1 VSS_8
M9
H3
DQL3 VSS_10
T1
DQL6 A-MDQL6 B13 F24 B-TMDQL0 B-MDQL0 D7 B9 F2
DQL2 VSS_9
P1
DQL4 VSS_11 H7 22 A-TMDQL1 B-TMDQL1 B-MDQU0 DQU0 VSSQ_2 F8 P9

H8
DQL5 VSS_12
T9
DQL7 A-MDQL7 A_DDR3_DQL1/DDR2_DQ7 B_DDR3_DQL1/DDR2_DQ7 B-TMDQL2 B-MDQL2 C3 D1 H3
DQL3 VSS_10
T1
G2
B1 AR1205 A19 L26 B-MDQU1 DQU1
DQL4 VSS_11
H7
DQL6
A-TMDQL2 A_DDR3_DQL2/DDR2_DQ1 B_DDR3_DQL2/DDR2_DQ1 B-TMDQL2 VSSQ_3 H8
DQL5 VSS_12
T9
DQL7
B1
VSSQ_1 C13 F25 B-TMDQL6 B-MDQL6 C8 D8 G2
DQL6
VSSQ_1 B9 D7 A-MDQL0 A-TMDQL0 A-TMDQL3 B-TMDQL3 B-MDQU2 DQU2 VSSQ_4 H7
D7
DQU0 VSSQ_2
B9
VSSQ_2 DQU0 A-MDQU0 A_DDR3_DQL3/DDR2_DQ10 B_DDR3_DQL3/DDR2_DQ10 B-TMDQL4 B-MDQL4 C2 E2
DQL7
B1
C3 D1
D1 C3 C19 M25 B-MDQU3 DQU3
VSSQ_1
C8
DQU1 VSSQ_3
D8 A-MDQL2 A-TMDQL2 A-TMDQL4 A_DDR3_DQL4/DDR2_DQ4 B_DDR3_DQL4/DDR2_DQ4 B-TMDQL4 VSSQ_5 D7
DQU0 VSSQ_2
B9
C2
DQU2 VSSQ_4
E2
VSSQ_3 DQU1 A-MDQU1 A13 E26 22 A7 E8 C3
DQU1 VSSQ_3
D1
DQU3 VSSQ_5 D8 C8 A-MDQL6 A-TMDQL6 A-TMDQL5 B-TMDQL5 B-MDQU4 DQU4 VSSQ_6 C8 D8

A7
DQU4 VSSQ_6
E8
VSSQ_4 DQU2 A-MDQU2 A_DDR3_DQL5/DDR2_DQ0 B_DDR3_DQL5/DDR2_DQ0 AR1217 A2 F9 C2
DQU2 VSSQ_4
E2
A2 F9
E2 C2 B19 M24 B-MDQU5 DQU5
DQU3 VSSQ_5
B8
DQU5 VSSQ_7
G1 A-MDQL4 A-TMDQL4 A-TMDQL6 A_DDR3_DQL6/DDR2_CKE B_DDR3_DQL6/DDR2_CKE B-TMDQL6 VSSQ_7 A7
DQU4 VSSQ_6
E8
A3
DQU6 VSSQ_8
G9
VSSQ_5 DQU3 A-MDQU3 C12 E25 B-TMDQU7 B-MDQU7 B8 G1 A2
DQU5 VSSQ_7
F9
DQU7 VSSQ_9 E8 A7 22 A-TMDQL7 B-TMDQL7 B-MDQU6 DQU6 VSSQ_8 B8 G1
VSSQ_6 DQU4 A-MDQU4 A_DDR3_DQL7/DDR2_DQ2 B_DDR3_DQL7/DDR2_DQ2 B-TMDQU3 B-MDQU3 A3 G9 A3

DQU6 VSSQ_8
G9
DQU7 VSSQ_9
F9 A2 AR1206 B-MDQU7 DQU7 VSSQ_9
VSSQ_7 DQU5 A-MDQU5 A15 G26 B-TMDQU5 B-MDQU5
G1 B8 A-MDQU7 A-TMDQU7 A-TMDQU0 B-TMDQU0
VSSQ_8 DQU6 A-MDQU6 A_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU0/DDR2_DQ15 B-TMDMU B-MDMU
G9 A3 A17 J26
A-MDQU3 A-TMDQU3 A-TMDQU1 A_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU1/DDR2_DQ9 B-TMDQU1 22
VSSQ_9 DQU7 A-MDQU7 B14 G24
A-MDQU5 A-TMDQU5 A-TMDQU2 A_DDR3_DQU2/DDR2_DQ8 B_DDR3_DQU2/DDR2_DQ8 B-TMDQU2 AR1218
C17 K25
A-MDMU A-TMDMU A-TMDQU3 A_DDR3_DQU3/DDR2_DQ11 B_DDR3_DQU3/DDR2_DQ11 B-TMDQU3 B-TMDQU6 B-MDQU6
22 B15 H24
A-TMDQU4 A_DDR3_DQU4/DDR2_DQM1 B_DDR3_DQU4/DDR2_DQM1 B-TMDQU4 B-TMDQU0 B-MDQU0
AR1207 A18 K26
A-TMDQU5 A_DDR3_DQU5/DDR2_DQ12 B_DDR3_DQU5/DDR2_DQ12 B-TMDQU5 B-TMDQU4 B-MDQU4
A-MDQU6 A-TMDQU6 C14 G25
A-TMDQU6 A_DDR3_DQU6/DDR2_DQM0 B_DDR3_DQU6/DDR2_DQM0 B-TMDQU6
A-MDQU0 A-TMDQU0 B17 K24
A-TMDQU7 A_DDR3_DQU7/DDR2_DQ14 B_DDR3_DQU7/DDR2_DQ14 B-TMDQU7 22
A-MDQU4 A-TMDQU4
R1221
B-TMDQU1 B-MDQU1
22 22
R1210
A-MDQU1 A-TMDQU1
22 10K R1234
B-MCKE
R1233 10K
A-MCKE

DDR 12 14
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

< KOREA / BRAZIL TUNER >
+5V_TU
L1303
MLB-201209-0120P-N2
TU_2INPUT_CTRL
RF_SWITCH_CTL R1343
10K
C1302 TU_2INPUT_CTRL
0.1uF
16V
TU_2INPUT_CTRL E R1321
Q1306
2.2K
ISA1530AC1
TU_2INPUT_CTRL B TU_2INPUT_CTRL
C
R1344
C 10K
Q1307 BTU_2INPUT_CTRL
USA/KOR_TUNER 2SC3052 FE_BOOSTER_CTL
TU1300 C1311
TU_2INPUT_CTRL
E
0.01uF
TDTR-T036F 25V
+5V_TU TU_2INPUT_CTRL
+5V_TU
TU1300-*1
UDA55AL L1302
RF_S/W_CTL R1329
470
1 BR_TUNER
C1309 C1308 C1300 C1301
NC_1
1 BST_CTL 1200pF 4.7uF 0.1uF 100uF R1332
NC_2
2 50V 10V 16V 82
TUNER_SIF
2
+B[+5V]
+B1[5V] E
3 3 +3.3V C1325
NC[RF_AGC]
4 NC_1[RF_AGC] Close to the tuner
270nH L1304
100pF 50V B ISA1530AC1
AS
4 C1305
1200pF
C1314
1200pF R1301 R1325
C
Q1304
5 50V 50V R1300 3K TU_SCL 4.7K
SCL
NC_2 0 R1310 TU_2INPUT_CTRL TU_2INPUT_CTRL
3K
6 5 270nH CH_6
SDA TU_SDA
7 SCLT +5V_TU
NC(IF_TP)
6 L1305
C1312 C1313
8 C1318
SDAT 62pF 62pF C1319
SIF 50V 50V 20pF 20pF
9 7 50V 50V
NC_3
10 NC_3 R1330 R1331
8 220 220
VIDEO
11
GND
SIF
12 9
+1.2V R1334
13 NC_4 READY R1324 0 0
+3.3V
10 TUNER_CVBS
14 +1.2V_DE E
RESET
VIDEO
15 11
IF_AGC_CNTL B Q1305
16 GND L1301 +3.3V ISA1530AC1
DIF_1
12 +3.3V C
17 C1307 L1300
DIF_2
+B2[1.2V] 4.7uF C1306 R1309 R1311
13 10V 100K
18 0.1uF 100
C1304 TUNER_RESET
+B3[3.3V] 4.7uF C1303 C1310
19 14 10V 0.1uF 0.1uF
16V
SHIELD RESET
15
IF/AGC R1322
1K
16
EXTERNAL_DEMOD
DIF_1[N] TUNER_IF_N
C1316 ISDB_IF_AGC
17 0.1uF
TUNER_IF_N 16V
DIF_2[P] TUNER_IF_P EXTERNAL_DEMOD
18 TUNER_IF_P
Close to the tuner

19
SHIELD
R1323
1K
C1317 INTERNAL_DEMOD IF_AGC_MAIN

0.1uF
16V
INTERNAL_DEMOD
Close to the tuner

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. KOREA/BRAZIL CAN TUNER 13 14
LGIT CAN TUNER

+3.3V_3D
FLASH_WP
IC1400
FLASH_WP
READY READY READY READY READY
LG8300
L/R_DETECT
L/R_DETECT
P_SCL
P_SDA
R1480 R1483 R1484 R1487 R1488

UART_TXD_3D
UART_RXD_3D
3.3K 3.3K 3.3K 3.3K 3.3K +1.0V

SPI_CSZ
SPI_CK
SPI_DI
+3.3V_3D
SPI_DO
A2
/JTAG_TRST
52 81 GND_0
BOOT_SEL
JTAG_TCLK
2MBIT(256K X 8Bit) serial Flash F6 F5
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
BOOT_SEL
JTAG_TDO
JTAG_TDI
JTAG_TMS
TMODE[3] VDD10_1 GND_1
80 F13 F7
51 VDD10_2 GND_2
JP1410
JP1411
JP1412
JP1413
JP1414
TMODE[2] PC_SER_CLK G6 F8
R1536 R1539 PC_SER_CLK 79 VDD10_3 GND_3
TMODE[1]
R14200
3D_ASIC 50 PC_SER_DATA G7 F9
R15400
3D_ASIC 78
TMODE[0] R1566 PC_SER_DATA SCL_3.3V_MOD VDD10_4 GND_4
READY
+3.3V_3D 2.2K 0 77 G8 F10

49
S 3D_ASIC
R1479 R1481 R1482 R1485 R1486 4.7K DISP_EN VDD10_5 GND_5
G9 F11
22 R1415
G
22 R1412
22 R1413
22 R1414
22 R1417
76
22 R1410
22 R1411
22 R1416
22 R1419
3.3K 3.3K 3.3K 3.3K 3.3K

22 R1418
SCL_3.3V_MOD
22 R1453
VDD10_6
22 R1455
22 R1456
GND_6
22 R1452
22 R1454
48 SDA_3.3V_MOD G10 F12
75 VDD10_7 GND_7
R1457
DISP_EN G11 F14
P_SDA 74
R1489
IC1402 SDA_3.3V_MOD 47 VDD10_8 GND_8
D
G12 G5
10K
W25X20BVSNIG C1432 73
22
SDA_3.3V_MOD VDD10_9 GND_9
0.1uF Q1402 46 G13 G14
SPI_CSZ 2N7002(F) 72 VDD10_10 GND_10
CS
1 8
VCC 16V H6 G16
A16
B16
C16
D16
A15
B15
C15
D15
A14
B14
C14
D14
A13
B13
C13
D13
A12
B12
C12
D12
A11
B11
C11
D11
A10
B10
C10
D10
45 71 VDD10_11 GND_11
A9
B9
C9
D9
A8
B8
C8
D8
A7
B7
C7
D7
A6
B6
C6
D6
A5
B5
C5
D5
A4
B4
C4
D4
A3
SPI_DO DO HOLD 70 H13 H7
2 7 R1584 44 TA1N VDD10_12 GND_12
22 69 J6 H8
UART_TXD
UART_RXD
SPI_CS
SPI_SCLK
SPI_DO
SPI_DI
SCL
SDA
SCL_M
SDA_M
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[22]
GPIO[23]
GPIO[24]
GPIO[25]
GPIO[26]
GPIO[27]
GPIO[28]
GPIO[29]
GPIO[30]
GPIO[31]
TDI
TMS
TRST
TDO
TCK
TEST_SE
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
BOOT_SEL
WP CLK TA1P VDD10_13 GND_13
3 6
SPI_CK +3.3V_3D 2D 68 J13 H9
3D_ASIC 43 VDD10_14 GND_14
C TB1N K6 H10
GND DIO 67 VDD10_15 GND_15
B Q1400 4 5 SPI_DI 42 TB1P
FLASH_WP KRC103S 66 K13 H11
R1535 R1537 VDD10_16 GND_16
TC1N L6 H12
B2 U18 E 3D_ASIC 3D_ASIC 41 65
TE4P 100 LVDS_DATA_1_A- TC1P VDD10_17 GND_17
TE4P RA1N 2.2K L7 H14
B1 U17 R1476 0 64
S 3D_ASIC
LVDS_DATA_1_A+ 4.7K TA1N VDD10_18 GND_18
TE4N TE4N RA1P 40 L8 H15
G
B3 T18 R1538 63 VDD10_19 GND_19
TD4P TD4P RB1N 100 LVDS_DATA_1_B- TA1P TCLK1N L9 H16
C3 T17 R1477 39 62 VDD10_20
TD4N LVDS_DATA_1_B+ TCLK1P GND_20
TD4N RB1P L10 J7
C1 R18 P_SCL SCL_3.3V_MOD TB1N 61 VDD10_21 GND_21
100
D
TCLK4P TCLK4P RC1N LVDS_DATA_1_C- 38 L11 J8
C2 R17 R1474 60
TCLK4N LVDS_DATA_1_C+ Q1401 TD1N VDD10_22 GND_22
TCLK4N RC1P TB1P 59 L12 J9
D2 P18 2N7002(F) 37 VDD10_23 GND_23
TC4P TC4P RCLK1N 100 LVDS_CLK_1- C1530 TD1P L13 J10
D1 P17 R1475 58
LVDS_CLK_1+ 1000pF TC1N VDD10_24 GND_24
TC4N TC4N RCLK1P READY 36 TE1N +1.0V_LTX M6 J11
D3 N18 57 VDD10_25 GND_25
TB4P 100 LVDS_DATA_1_D- R1585 TE1P
TB4P RD1N TC1P 56 M13 J12
E3 N17 R1472 LVDS_DATA_1_D+ 22 35 VDD10_26 GND_26
TB4N TB4N RD1P C1529 J14
E1 M18 2D 55
TA4P
E2
TA4P RE1N
M17 R1473
100 LVDS_DATA_1_E-
LVDS_DATA_1_E+
1000pF
READY
EJTAG +3.3V_3D
34
54 H5
LTX_VDD10_1
GND_27
GND_28
J15
TA4N TA4N RE1P TCLK1N TA2N J5 J16
33 53 LTX_VDD10_2 GND_29
TA2P K5 K7
F2 L18 TCLK1P 52 LTX_VDD10_3 GND_30
TE3P
TE3N
F1
TE3P
TE3N
RA2N
RA2P
L17 R1469
100 LVDS_DATA_2_A-
LVDS_DATA_2_A+
2D BYPASS C1525
1000pF
C1528
1000pF
32 TB2N
TB2P
51 +3.3V_VDD
L5
LTX_VDD10_4 GND_31
K8
READY 50 M5 K9
F3 K18 READY 31 LTX_VDD10_5 GND_32
TD3P
TD3N
G3
G1
TD3P
TD3N IC1400 RB2N
RB2P
K17
J18
R1470
100
100
LVDS_DATA_2_B-
LVDS_DATA_2_B+
R1495 R1500
R1507
3.3K
READY
TD1N
30
TC2N
TC2P
49
48
GND_33
GND_34
K10
K11
3D_ASIC
TCLK3P TCLK3P RC2N R1471 LVDS_DATA_2_C- 3.3K 3.3K P1400 TD1P E5 K12
G2 J17 READY 0 R1533 0 R1564 29 47 VDD33_1 GND_35
TCLK3N LVDS_DATA_2_C+ C1532 R1494 R1501 YFDW254-14S LVDS_DATA_1_E+ TCLK2N
TCLK3N RC2P
3D_ASIC
3D_ASIC
3D_ASIC
3.3K TE1P 46 E6 K14
H2 H18 1000pF 3.3K 0 R1534 0 R1565 TE1N VDD33_2 GND_36
TC3P TC3P RCLK2N 100 LVDS_CLK_2- READY LVDS_DATA_1_E- TE1N 28 TCLK2P E7 K15
H1 H17 R1468 READY R1499 0 R1528 0 R1559 45
LVDS_CLK_2+ VDD33_3 GND_37
TC3N
TB3P
TB3N
H3
J3
TC3N
TB3P
TB3N
LG8300 RCLK2P
RD2N
RD2P
G18
G17 R1467
100 LVDS_DATA_2_D-
LVDS_DATA_2_D+
C1531
1000pF
/JTAG_TRST
JTAG_TDI
3.3K
nTRST
TDI
1
3
2
4
GND
GND
LVDS_DATA_1_D+
LVDS_DATA_1_D-
LVDS_CLK_1+
0 R1529
0 R1530
0 R1560
0 R1561
TD1P
TD1N
TCLK1P
TE1P
27
26
TD2N
TD2P
44
43
E8
E9
E10
VDD33_4
VDD33_5
GND_38
GND_39
K16
L14
L15
J1 F18 READY TDO GND 0 R1531 0 R1562 42 VDD33_6 GND_40
TA3P 100 LVDS_DATA_2_E- JTAG_TDO 5 6 TE2N
TA3P RE2N R1466 LVDS_CLK_1- TCLK1N 41 E11 M7
J2 F17 LVDS_DATA_2_E+ TMS 7 8 GND 0 R1532 0 R1563 25 VDD33_7 GND_41
TA3N TA3N RE2P JTAG_TMS LVDS_DATA_1_C+ TE2P E12 M8
TCK GND 0 R1523 0 R1554 TC1P 40
JTAG_TCLK 9 10 TA2N VDD33_8 GND_42
27pF
C1414
50V LVDS_DATA_1_C- TC1N 24 E13 M9
K2 0 nRST NC 0 R1524 0 R1555 39
TE2P 11 12 LVDS_DATA_1_B+ VDD33_9 GND_43
TE2P TB1P TA2P 38 E14 M10
K1 A17 DINT 13 14 VIO 0 R1525 0 R1556 23 VDD33_10 GND_44
TE2N TE2N CLK_XIN R1491 TA3N E15 M11
LVDS_DATA_1_B- TB1N
3D_ASIC
K3 B18 0 R1526 0 R1557 37
25MHz
X1400
READY TB2N VDD33_11 GND_45

R1478
TD2P TD2P CLK_XOUT LVDS_DATA_1_A+ 22 TA3P F15 M12

1M 1%
L3 B17 R1498 0 R1527 0 R1558 TA1P 36 +3.3V_LRX VDD33_12 GND_46

C1413
1K
27pF
TD2N TD2N PO_RST_N LVDS_DATA_1_A- TA1N TB2P TB3N G15 M14

50V
L1 21 35 VDD33_13 GND_47
TCLK2P TCLK2P TB3P M15
L2 V2 0 R1519 0 R1550 TC2N 34 GND_48
TCLK2N TCLK2N LR_SYNC LVDS_DATA_2_E+ TE2P 20 TC3N L16 N5
M2 V3 0 R1520 0 R1551 33 LRX_AVDD33_1 GND_49
TC2P TC2P EMITTER_PULSE LVDS_DATA_2_E- TE2N TC2P TC3P N16 N6
M1 0 R1521 0 R1552 19 32 +3.3V_LTX LRX_AVDD33_2 GND_50
TC2N R1464 LVDS_DATA_2_D+
TC2N 0 TD2P 31 N15
M3 0 R1522 0 R1553 GND_51
TB2P TB2P LG8300_RESET LVDS_DATA_2_D- TD2N 18 TCLK3N E4 P5
N3 0 R1514 0 R1545 30
3D_ASIC
TB2N LVDS_CLK_2+ TCLK3P LTX_AVDD33_1 GND_52

1K
R1583
TB2N TCLK2P TCLK2N 29 G4 P11

N1 0 R1515 0 R1546 17 LTX_AVDD33_2 GND_53
TA2P TA2P LVDS_CLK_2- TCLK2N L4 R4
N2 0 R1516 0 R1547 TCLK2P 28 LTX_AVDD33_3 GND_54
TA2N TA2N LVDS_DATA_2_C+ TC2P 16 TD3N N4 R14
0 R1517 0 R1548 READY READY 27 LTX_AVDD33_4 GND_55
LVDS_DATA_2_C- TC2N 1000pF 1000pF TD3P J4
P2 3D_L/R_SYNC 0 R1518 0 R1549 15 26 DDR_VREF_LG8300 LTX_AVDD33_5
TE1P TE1P LVDS_DATA_2_B+ TB2P C1526 C1527 TE3N M16
P1 EMITTER_PULSE 0 R1511 0 R1542 25
TE1N TE1N
LG8300_RESET LVDS_DATA_2_B-
TD2N
14 TE3P LRX_AVSS33_1
P16
P3 0 R1512 0 R1543 TB2N 24
TD1P +3.3V_3D LVDS_DATA_2_A+ LRX_AVSS33_2
TD1P TA2P TD2P 23 T4
R3 0 R1513 0 R1544 13 DDR_VREF0
TD1N TD1N READY LVDS_DATA_2_A- TA2N R11 F4
R1 TE2N 22 DDR_VREF1 LTX_AVSS33_1
TCLK1P TCLK1P SW1400 READY 12 TA4N V17 H4
R2 JTP-1127WEM 21 +1.8V DDR_VREF2 LTX_AVSS33_2
TCLK1N R1421 R1423 R1424 TA4P
TCLK1N 10K TE2P 20 K4
T2 1 2 0 0 11 LTX_AVSS33_3
TC1P TC1P LG8300_RESET TB4N N7 M4
T1 READY C1428 READY 19 DDR_VDDQ_1 LTX_AVSS33_4
TC1N TC1N 10 TB4P N8 P4
T3 3 4 0.1uF 18
TB1P TC4N DDR_VDDQ_2 LTX_AVSS33_5
TB1P 16V 17 N9
U3 READY 9 DDR_VDDQ_3
TB1N TB1N +3.3V_3D TC4P N10
U1 16 DDR_VDDQ_4
TA1P TA1P 8 N11 C17
DDR_ADDR[10]
DDR_ADDR[11]
DDR_ADDR[12]
DDR_DQS_N[0]
DDR_DQS_N[1]
DDR_TDOUT[0]
DDR_TDOUT[1]
U2 15 DDR_VDDQ_5 DDRPLL_AVSS33
DDR_ADDR[0]
DDR_ADDR[1]
DDR_ADDR[2]
DDR_ADDR[3]
DDR_ADDR[4]
DDR_ADDR[5]
DDR_ADDR[6]
DDR_ADDR[7]
DDR_ADDR[8]
DDR_ADDR[9]
TA1N TA1N TCLK4N N12 D17

DDR_DQS[0]
DDR_DQS[1]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
7 14
DDR_BA[0]
DDR_BA[1]
DDR_RAS_N
DDR_CAS_N
DDR_DM[0]
DDR_DM[1]
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_TAOUT
TCLK4P DDR_VDDQ_6 SYSPLL_AVSS33

DDR_CK_N
DDR_CS_N
DDR_WE_N
N13 E16
R1428
13
DDR_CKE
DDR_ODT
READY
R1430
10K
DDR_VDDQ_7 ADPLL_AVSS33
READY
10K
DDR_CK
+1.8V 6 N14 F16 +3.3V_PLL

12 DDR_VDDQ_8 SSPLL_AVSS33
TD4N P6
5 11 DDR_VDDQ_9
TD4P P7 C18
MOD_ROM_TX 10 DDR_VDDQ_10 DDRPLL_AVDD33
4 TE4N P8 D18
9
U5
V8
V5
U8
R6
T8
T6
R8
R7
U7
C_DDR_A[10] R9
C_DDR_A[11] T7
C_DDR_A[12] V7
U9
T9
V6
U6
V9
R5
U4
V4
T5
R10
V14
V12
U14
U12
R15
T12
C_DDR_DQ[0] V15
T15
U16
T16
R16
V16
T14
U15
T13
V11
U13
U11
T11
V13
R12
R13
U10
T10
V10
MOD_ROM_RX TE4P DDR_VDDQ_11 SYSPLL_AVDD33

8 P9 E17
3 DDR_VDDQ_12 SSPLL_AVDD33
C1415 C1416 C1423 C1424 C1427 C1430 C1431 C1434 C1436 C1437 C1439 C1442 C1444 C1445 C1450 C1452 C1453 C1456 R1432 0 READY P10 E18
C_DDR_A[0]
C_DDR_A[1]
C_DDR_A[2]
C_DDR_A[3]
C_DDR_A[4]
C_DDR_A[5]
C_DDR_A[6]
C_DDR_A[7]
C_DDR_A[8]
C_DDR_A[9]
3D_L/R_SYNC 7 DDR_VDDQ_13 ADPLL_AVDD33

10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 2 P12
C_DDR_DQ[10]
C_DDR_DQ[11]
C_DDR_DQ[12]
C_DDR_DQ[13]
C_DDR_DQ[14]
C_DDR_DQ[15]
6.3V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 6
C_DDR_DQ[1]
C_DDR_DQ[2]
C_DDR_DQ[3]
C_DDR_DQ[4]
C_DDR_DQ[5]
C_DDR_DQ[6]
C_DDR_DQ[7]
C_DDR_DQ[8]
C_DDR_DQ[9]
DDR_VDDQ_14
3D_L/R_SYNC_FHD 5 P13
1
C_DDR_BA[0]
C_DDR_BA[1]
/C_DDR_WE
C_DDR2_CLK
C_DDR2_ODT
/C_DDR_RAS
/C_DDR_CAS
C_DDR_DQM0
C_DDR_DQM1
DDR_VDDQ_15
/C_DDR2_CLK
C_DDR_DQS0P
C_DDR_DQS1P
C_DDR_DQS0M
C_DDR_DQS1M
/C_DDR_CS
C_DDR2_CKE
MOD_ROM_TX P14
4 DDR_VDDQ_16
MOD_ROM_RX P15
C_DDR_A[12-0]
3 DDR_VDDQ_17
3D_L/R_SYNC_FHD
TF05-51S 2
C_DDR_DQ[15-0]
P1401 1
HD
5V TO 1.0V 104060-8017
P1402
FHD
+5V
AR1413 READY R1502

22 R1492 0
1/16W L1400
DDR_DQ[15-0] BLM18PG121SN1D +1.0V
C_DDR_DQ[5] DDR_DQ[5] 10K
READY
C1429
R1425
C_DDR_DQ[2] DDR_DQ[2]
AR1402 AR1404 0.1uF +1.0V
R1409 22 22 C_DDR_DQ[0] DDR_DQ[0] 16V READY
22 1/16W 1/16W C_DDR_DQ[7] DDR_DQ[7] R1504 0
C_DDR2_CLK DDR2_CLK
EP[GND]
/C_DDR_WE /DDR_WE C_DDR_A[10] DDR_A[10]

R1406 C1480 C1481 C1487 C1492 C1493 C1498 C1503 C1509 C1510 C1516
VIN_3
PWRGD
AR1412 C1464 C1467 C1472 C1519 C1520 C1521

BOOT
22 C_DDR2_CKE DDR2_CKE C_DDR_A[5] DDR_A[5] 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
/C_DDR2_CLK /DDR2_CLK 22 C1441 L1403 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
EN
C_DDR_BA[1] DDR_BA[1] C_DDR_A[7] DDR_A[7] 1/16W 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
0.1uF 6.3V 6.3V 16V
R1407 C_DDR_DQ[13] DDR_DQ[13]
22 C_DDR_BA[0] DDR_BA[0] C_DDR_A[11] DDR_A[11] 50V L1402
16
15
14
13
C_DDR_DQS0P DDR_DQS0P C_DDR_DQ[10] DDR_DQ[10] 3.6uH

R1408 AR1401 AR1403 VIN_1 PH_3
22 C_DDR_DQ[8] DDR_DQ[8] 1 12
22 22
C_DDR_DQS1P DDR_DQS1P 1/16W 1/16W C_DDR_DQ[15] DDR_DQ[15] THERMAL R1
VIN_2 2 11 PH_2
17
R1404 C_DDR_A[2] DDR_A[2] C_DDR_A[8] DDR_A[8] R1510
22 C1419 C1420 GND_1 PH_1 5.1K 3D_ASIC READY +1.0V_LTX +3.3V_LRX
C_DDR_A[0] DDR_A[0] C_DDR_A[6] DDR_A[6] AR1411 10uF 3 IC1404 10 C1448 C1449 C1451 C1455 C1454
C_DDR_DQM0 DDR_DQM0 0.1uF 1% +1.0V +1.0V_LTX
22 16V TPS54319TRE 100pF 22uF 10uF 10uF 0.1uF
R1405 /C_DDR_RAS /DDR_RAS C_DDR_A[4] DDR_A[4] 1/16W GND_2 SS/TR
22 4 3A
3D_ASIC 9 50V 10V 10V 10V 16V
C_DDR_DQM1 DDR_DQM1 C_DDR2_ODT DDR2_ODT /C_DDR_CAS /DDR_CAS C_DDR_DQ[14] DDR_DQ[14] L1411
C1440
5
R1402 C_DDR_DQ[9] DDR_DQ[9] 2200pF

AR1400 C1471 C1479 C1485 C1502 C1508 C1515
22 22 C1466 C1486 C1491
C_DDR_DQ[11] DDR_DQ[11] 0.1uF 0.1uF
AGND
VSENSE
COMP
RT/CLK
C_DDR_DQS0M DDR_DQS0M 1/16W 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
C_DDR_DQ[12] DDR_DQ[12] R1509 16V 16V 16V 6.3V 16V 16V
R1403 22K R2 6.3V 16V 16V
22 C_DDR_A[1] DDR_A[1] 1%
C_DDR_DQS1M DDR_DQS1M AR1410 10K
C_DDR_A[3] DDR_A[3]
R1401 22 R1503 +3.3V_VDD
22 C_DDR_A[12] DDR_A[12] 1/16W R1506 +3.3V_3D
/C_DDR_CS /DDR_CS C_DDR_DQ[3] DDR_DQ[3] 330K
C_DDR_A[9] DDR_A[9] C1435 L1410
C_DDR_DQ[4] DDR_DQ[4] 2700pF +3.3V_VDD +3.3V_LTX
C_DDR_DQ[1] DDR_DQ[1]
C_DDR_DQ[6] DDR_DQ[6] +3.3V_LTX
L1408
C_DDR_DQ[15-0] Switching freq: 600K
C1470 C1477 C1478 C1484 C1490 C1496 C1497 C1501 C1507 C1513 C1514 C1518
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V
Vout=0.8*(1+R1/R2) 6.3V 6.3V 16V 16V 16V 16V 16V
L1409
+3.3V_PLL
LGE8300 DDR2 256MBIT +3.3V_PLL

DDR_VREF_LG8300
L1407
+3.3V_LRX
+5V 5.0V TO 3.3V+3.3V +3.3V_3D

+3.3V_3D +3.3V_3D_A
DDR_VREF_DDR
L1405
C1469 C1475 C1476 C1483 C1489
IC1406 2D 0.1uF 0.1uF 0.1uF 0.1uF
10uF
AZ1085S-3.3TR/E1 6.3V 16V 16V 16V 16V C1500 C1506 C1512 C1517
L1404 10uF 0.1uF 0.1uF 0.1uF
6.3V 16V 16V 16V
C1400 C1402 IC1401 INPUT 3 2 OUTPUT
0.1uF 470pF
16V 50V W9725G6JB-25 C1459 1 C1460 3D_ASIC
DDR_DQ[15-0] 0.1uF ADJ/GND 22uF C1462
16V 16V 0.1uF 3D_ASIC
3D_ASIC
VREF
3D_ASIC DQ0 DDR_DQ[0] R154116V
DDR_A[12-0] J2 G8 1
G2 DQ1 DDR_DQ[1] L1412
DDR_DQ[2] +1.8V
DDR_A[0] H7 DQ2
A0 M8 DDR_DQ[3] IC1403
DDR_A[1] H3 DQ3
A1 M3 DDR_DQ[4] SI3865BDV
DDR_A[2] H1 DQ4 READY
A2 M7 DDR_DQ[5]
DDR_A[3] H9 DQ5 R1436
A3 N2 DDR_DQ[6]
DQ6 22K R1/C1 R2 READY
DDR_A[4] A4 F1 6 1
DDR_A[5] A5
N8
N3
F9 DQ7 DDR_DQ[7]
DDR_DQ[8]
+3.3V_3D_A 3.3V TO 1.8V R1433 0 ON/OFF D2_1
C1465 C1468
10uF
C1473
0.1uF
C1474
0.1uF
C1482
0.1uF
C1488
0.1uF
C1494
0.1uF
C1495
0.1uF
C1499
0.1uF
C1504
0.1uF
C1505
0.1uF
C1511
0.1uF
DDR_A[6] C8 DQ8 10uF
A6 N7 DDR_DQ[9] IC1407 +1.8V_ON 5 $0.081 2
6.3V 6.3V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
DDR_A[7] A7 C2 DQ9
KIA1117ST18
READY
RF EMITTER (STRAIGHT)
READY
P2 DQ10 DDR_DQ[10] +1.8V S2 D2_2

1K
R1434
DDR_A[8] A8 D7 4 3 READY
P8 DQ11 DDR_DQ[11] C1534
READY
DDR_A[9] D3 C1535
R1568
1/10W
A9
560
R1437
P3 DDR_DQ[12] INADJ/GND 22uF

DDR_A[10] D1 DQ12 4.7uF P1404
A10/AP 16V
M2 DDR_DQ[13] 10V +3.3V
5%
DDR_A[11] D9 DQ13 C1457 C1458 OUT 3225 12507WS-12L +3.3V

0
A11 1uF
P7 DDR_DQ[14] 22uF 0.1uF
READY
DDR_A[12] B1 DQ14 READY

A12 R2 25V 16V
DQ15 DDR_DQ[15] C1533
B9 C1461 JP1401
22uF
16V C1463 1
DDR_BA[0] BA0 L2 +1.8V READY READY READY
3D_ASIC
R1431 0.1uF R1581 R1590 R1591

DDR_BA[1] BA1 L3
A1 VDD_5
1 16V
+3.3V3D TO +3.3V_3D_A 2
JP1402 2.7K 2.7K 2.7K
DDR2_CLK E1 VDD_4 3D_ASIC

R1400
CLK VDD_3 JP1403 R1575

J8 J9
100
100
/DDR2_CLK
CLK K8 M9 VDD_2 3
ZD1401 3D_ASIC
3D_RF_RXD IR EMITTER (STRAIGHT)
CKE K2 R1 VDD_1
3D_ASIC
JP1404 5.6B R1576

DDR2_CKE 100
4 3D_RF_TXD P1403
DDR2_ODT ODT K9 ZD1402 3D_ASIC
R1579
12507WS-04L
3D_ASIC
JP1405 5.6B
/DDR_CS CS L8 A9 VDDQ_10
5
100
READY
+5V
3D_ASIC
+1.8V 3D_RF_RESET
RAS VDDQ_9 +1.8V
R1589
/DDR_RAS K7 C1
1K
CAS VDDQ_8 3D_ASIC 3D_ASIC 1

/DDR_CAS L7 C3 R1578 0
WE VDDQ_7 6 3D_RFMODULE_DC L1406
/DDR_WE K3 C7
3D_ASIC 120-ohm
C9 VDDQ_6 2A
ZD1403 2
3D_ASIC
E9 VDDQ_5 5.6B R1577 0 READY

LDQS 7 3D_RFMODULE_DD
DDR_DQS0P F7 VDDQ_4 DDR_VREF_LG8300
G1 3D_ASIC DDR_VREF_DDR 3D_ASIC
DDR_DQS1P UDQS B7 R1426 +3.3V
VDDQ_3 R1429 ZD1404 3
3D_ASIC
3D_ASIC 3D_ASIC
G3 4.7K 5.6B
3D_ASIC 4.7K 8
G7 VDDQ_2 1% 1% 3D_ASIC
READY READY READY
DDR_DQM0 LDM F3 G9 VDDQ_1 R1567 R1573 R1580 R1574 0
JP1406 4
DDR_DQM1 UDM B3
3D_ASIC
3D_ASIC 3D_ASIC
3D_ASIC R1571 0 2.7K 2.7K 2.7K EMITTER_PULSE
R1427 9 3D_GPIO_0 READY
R1435
3D_ASIC
4.7K 4.7K 3D_ASIC

1% ZD1405 5
3D_ASIC
1% JP1407 5.6B
DDR_DQS0M LDQS E8 A3 VSS_5 3D_ASIC R1569 0
3D_ASIC 10 3D_GPIO_1
UDQS VSS_4 C1403 C1404 C1405 C1406
DDR_DQS1M A8 E3 0.1uF 1000pF 3D_ASIC
0.1uF 1000pF ZD1406
3D_ASIC
J3 VSS_3 JP1408 5.6B

R1570 0
VSS_2 11 3D_GPIO_2
NC_4 N1
L1 VSS_1 3D_ASIC
P9 ZD1407
3D_ASIC
NC_5 R3 5.6B
JP1409 R1572 0
NC_6 12 3D_L/R_SYNC
R7
3D_ASIC
3D_ASIC
3D_ASIC
3D_ASIC
ZD1408
3D_ASIC
5.6B
1K
R1586
1K
R1587
1K
R1588
VSSQ_10 13
NC_1 B2
A2 VSSQ_9
NC_2 B8
E2 VSSQ_8
NC_3 R8
A7
D2 VSSQ_7
Close to LG8300 Close to DDR2(IC1401)
D8 VSSQ_6
VSSDL E7 VSSQ_5
J7
F2 VSSQ_4
F8 VSSQ_3
+1.8V
H2 VSSQ_2
VDDL J1 H8 VSSQ_1
C1401
100pF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES 50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 3DF 14 14

Great Company Great People
GP2-R
GP2-R Training
Training manual
manual
Contents
- Block Diagram
- System Design
- Trouble Shooting Guide
ATSC Group GP2‐R Team
Last updated 2010.06.03
Block Diagram – Overview()
X-tal NAND
Serial Flash
Cable
IF DDR3
ISDB-T/ (24MHz) Flash
PAL/NTSC SIF
IF(ATSC) LVDS
LVDS
CVBS LVDS out Con.
Con.
HD/SD HD
HD
Serial_TS(SBTVD) HD(WXGA,XGA)
DEMOD FHD
FHD
Video 3D
3D
Encoder FHD 2D/3D
CVBS(ATV)
SPDIF Out
Y/Cb/Cr
COMP1 Audio
Y/Cb/Cr
COMP2 DSP MCLK
STA368
R/G/B Video (Digital AMP)
RGB-PC I2S
Front
DDC End
S7L
CVBS
Rear AV
CVBS
Side AV
IR
L/R RX/TX
AV1,2 L/R Audio
L/R
COMP 1,2 L/R Front RS-232C
End UART
RGB-PC L/R UART
TMDS/DDC
HDMI 1 Rear USB( SVC only)
TMDS/DDC HDMI
HDMI 2 USB2.0
HDMI 3 TMDS/DDC RX Side USB
Customer Oriented R&D Breakthrough

1. Power-Up Boot Fail Trouble Shooting
(Front-end) (System + Scalar)

Serial_Flash NANDFlash
Serial_Flash NANDFlash DDR3
DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
ISDB-T/ SIF1 CVBS_LIVE
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7L
S7L
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out)
AV1
AV1_LR
AV2
AV2_LR I2S
TAS5709
TAS5709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
(Comp1/2, RGB)
(USB)
HDMI_Rear(D port)
SIDE HDMI_PORT Rear USB( SVC only)
UI_HW_PORT1
HDMI_Side (C port) Side USB
UI_HW_PORT1
HDMI_Side (B port)

Reset Design
GPIO Reset TAS5709

Active Low (AMP)
H/W Reset S7 GPIO Reset

Active High (Main Soc) Active Low Tuner
GPIO Reset
Demodulator
Active Low

S7 Power Sequence Appendix
Power Up Sequence
Power Note:
3.3V_AVDD_MPLL
XTAL
(AVDD_DMPLL)
t1
3.3V 1.05V (VDDC)
AVDD_DMPLL
t2
Reset 3.3V_VDDP (VDDP)
(HI Active)
t3
1.5V/1.8V (AVDD_DDR0/1)
1.26V
t4
Other Power (AVDD_AU25,
3.3V
VDDP AVDD_AU33,
AVDD_MEMPLL,
1.5V/1.8V AVDD2P5_ADC…etc)
with
Other Power
Time

S7 Power Sequence Appendix
Power Up Timing Requirements
Time Description Min Typ. Max Unit
t1 XTAL stable to Reset falling 5 ― ― ms
t2 Reset pulse width 5 ― ― ms
t3 1.26V to Reset falling 5 ― ― ms
t4 3.3VDDP to Reset falling 5 ― ― ms

S7 Power Sequence
# t2 : Reset Pulse Width : 40ms Æ OK

S7 Power Sequence
a) AC On b) DC(Remocon) On
1 :X-tal 1 :X-tal
2 : 3.3V 2 : 3.3V
3 : 1.26V 3 : 1.26V
4 : Reset 4 : Reset
# t1 : Reset Pulse Width : 400ms Æ OK # t1 : Reset Pulse Width : 120ms Æ OK


GP2-R I2C MAP
TGPIO2/I2C_CLK (R3) <TU_SCL> CH 6 +3.3V_TU
TGPIO3/I2C_SDA (T3) <TU_SDA>
TUNER
TUNER
LGIT
LGIT HN(LGT10)
HN(LGT10)
0xC2(PLL)/0x10(Analog
0xC2(PLL)/0x10(Analog Demod)
Demod)
DDCR_CK/GPIO72 (N22) <I2C-SCL> CH 2 +3.3V
DDCR_DA/GPIO71 (M22) <I2C-SDA>
NVRAM
NVRAM HDCP
HDCP EEPROM
EEPROM
0xA0
0xA0 0xA8
0xA8
TGPIO0 (U1) <SCL1> CH 5 +3.3V
TGPIO1 (U2) <SDA1>
AMP
AMP DEMOD.(BRAZIL)
DEMOD.(BRAZIL)
SATURN 7 TAS5709
TAS5709 MN884433
MN884433
0x36
0x36 0xD8
0xD8
TGPIO183 (F18) <MODULE_SCL> +3.3V
TGPIO177 (G14) <MODULE_SDA>
PDP
PDP MODULE
MODULE
DDCDB_CK/GPIO25 (D4) <DDC_SCL2> CH 12 0x1C

0x1C
EEPROM
EEPROM 5V_HDMI_1
DDCDB_DA/GPIO26 (E4) <DDC_SDA2> HDMI1
HDMI1 /+5.0V
0XA0
0XA0
DDCDD_CK/GPIO29 (B4) <DDC_SCL3> EEPROM
EEPROM CH 12 5V_HDMI_2
DDCDD_DA/GPIO30 (C4) <DDC_SDA3> HDMI1
HDMI1 /+5.0V
0XA0
0XA0
DDCDC_CK/GPIO27 (AA4) <DDC_SCL4> EEPROM

EEPROM CH 11 5V_HDMI_Side
DDCDC_DA/GPIO28 (AB4) <DDC_SDA4> HDMI1
HDMI1 /+5.0V
0XA0
0XA0
DDCA_CK/UART0_RX (N22) <RGB_DDC_SCL> EEPROM

EEPROM CH 8 +5V_ST
DDCA_DA/UART_TX (M22) <RGB_DDC_SDA> RGB
RGB
0XA0
0XA0
I2S_IN_WS/GPIO174 (F15) <NEC_SCL> CH 7 +3.3V

I2S_IN_BCK/GPIO175 (F14) <NEC_SDA>
SUB
SUB I2C
I2C
Touch
Touch Eye’
Eye’
0x70
0x70

GPIO Structure
GPIO Signal Name Direction Description
66 PWM0 Input Chip configuration
67 PWM1 Input Chip configuration
31 DSUB_DET Input D-Sub Auto link check
32 Model_OPT_3 Input Model option 3
42 Model_OPT_0 Input Model option 0
11 Model_OPT_1 Input/Output Model option 1 /FE_BOOSTER_CTRL
14 Model_OPT_2 Input/Output Model option 2/RF_SWITCH_CTL
TCON2/GSP 5V_DET_HDMI_2 Input (HDMI3 Ready) HDMI 5V Detect

_R/GCLK1
TCON4/CPV 5V_DET_HDMI_4 Input HDMI Side 5V Detect

//GSC_R/G
CLK3
TCON6/FLK 5V_DET_HDMI_3 Input HDMI_1 5V Detect
40 COMP1_DET Input Compnent1 Auto link
50 MOD_ROM_RX Input Module Rom download UART
51 MOD_ROM_TX Output Module Rom download UART
5 USB1_OCD input USB1_OCD
7 USB1_CTRL Output USB1_5V Power Control
15 TUNER_RESET Output TUNER_RESET
16 DEMOD_RESET Output Demodulator Reset
17 AV_CVBS_DET Input AV_CVBS Auto link
176 COMP2_DET Input Compnent2 Auto link
TCON8/CS2 SIDE_CVBS_DET Input SIDE_CVBS Auto link

/FLK3

GP2-R Power flow
16V_ P_17V IC700 $0.72 +3.3V_AU_AVDD L901 +3.3V

1 2 +3.3V_DVDD
Audio TAS5709 L903 Regulator
IC507 +5V_TU
L505 IC
MP8706EN L1301 +1.2V_DE
TU1300
L1303
Tuner L1300 +3.3V
5 6 P_+5V IC502 +1.5V_DDR_IN

+5V L507 L503
7 8 MP2212DN $5.65
L1201 IC1201~2
RL_ON 15 P_+5V IC501
+1.05V_VDDC DDR3
MP8706EN
AC_DET 16
M_ON 17 P_+5V IC504 +3.3V L303 AVDD2P5_2.5

L514 +3.3V_AVDD
AZ1085S
L304 AVDD25_PGA_2.5
5Vst 13 14
P_+5V IC801/802/804 +3.3V IC505 +2.5V_AVDD
HDMI eeprom L306 ADC2P5_2.5
MIC39100
P_+5V P904 +3.3V IC104 +1.05V_VDDC VDDC

L501
L323
3D LVDS NAND flash
+1.05V_VDDC +1.05V_MIU1VDDC
L321
+5V_ST P_+5V P905 +3.3V IC103 +1.05V_VDDC +1.05V_MIU0VDDC
Emitter board Serial flash
L324
USB +1.5V_DDR_IN AVDD_DDR0_1.5

P_+5V IC1101 +3.3V IC102 L300
AP21915 HDCP eeprom +1.5V_DDR_IN AVDD_DDR1_1.5

L301
USB(SVC)
P_+5V +3.3V IC109 +3.3V_ST AVDD_DMPLL_3.3_ST
L307 L308
NVRAM
+3.3V_ST AVDD_NODIE_3.3_ST
CEC FET L302
BSS83 +3.3V_DE IC602 IC101
L609
MN884433 +3.3V_AVDD VDD33_DVI S7L
IC500 +3.3V_ST L310
L502
AP2121N +3.3V_AVDD VDD33_3.3
L309
IC600
P905 AZ1117 +1.2V_DE VDD33_3.3 AU33_3.3
IC901 R202
Emitter board
L901 L314
RGB eeprom
IC1000 VDD33_3.3 FRC_LPLL_3.3
L316
NAND gate
L900 R201
IC900 Reset
Optic
MAX3232

Trouble Shooting Guide for LG Service Man
Please check system, after power Off/On one time

2. No OSD Trouble Shooting
3. Digital TV Video Trouble Shooting
4. Analog TV Video Trouble Shooting
5. Component Video Trouble Shooting
6. RGB Video Trouble Shooting
7. AV Video Trouble Shooting
8. HDMI Video Trouble Shooting
9. All Source Audio Trouble Shooting
10. Digital TV Audio Trouble Shooting
11. Analog TV Audio Trouble Shooting
12. Component / RGB / AV Audio Trouble Shooting
13. HDMI Audio Trouble Shooting
14. USB Trouble Shooting


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
KIA7427AF HDMI CEC (Stand-by)
COMP2_LR
RGB_LR EXT_IN
(Comp1/2, RGB) Reset 24C16
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
SIDE HDMI_PORT Rear USB( SVC only PJ230)
UI_HW_PORT1

N Y
Check P500 All Voltage Level
Check Power connector Replace Power board
(17V, 5V, 3.5/5V_ST)
Check All Voltage Level N Replace one of Bead, IC500

at Bead, RL_ON, IC500 output & Recheck
N If Q501 Output is normal, N

Check Voltage Level 3.3V at IC504,
Replace of the IC504
R124(Micom)
& Recheck
N Check R527 voltage level N

Check Voltage Level 1.26V at C534 (3.3V RL_ON)
Replace one of IC501 & Recheck
Check Micom Redownload or
Y
replace
N Check R500 voltage level N
Check Voltage Level 1.5V
(ON/OFF Control)
at IC502 #7 pin
Replace one of IC502 & Recheck
N Replace one of IC505 and application N

Check Voltage Level 2.5V at C589
circuit & Recheck
N N
Check X200 Clock24MHz Replace X200
Check signal transition N Maybe Serial Flash Memory N Check S7 Main chip and Soc_Reset
at IC103 problem Signal from micom GPIO
Y
N
Check signal transition N Maybe NAND Flash Memory or S7
IC104 have troubles
Check DDR Memory
Y /Replace one


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check P500 N Check GPIO Path of Micom

5V_ON
N Y
Check 5V Voltage Level
Check Power connector Replace Power board
at P500
Check 5V Voltage Level N Replace one of L507,501

at L507, L501 & Recheck
N Replace one of Q501

Check 5V Voltage Level at Q501
& Recheck
Y
Check P903 N Maybe S7(IC101)
(TXAC-), (TXAC+), (TXBC-),
has troubles
(TXBC+), Display Enable
N
Check LVDS Cable Replace Cable
Check PDP Module Electrical Specifications

Power Supply Sequence
Check CAS
Input Signal Timing Specification
Control Signal Register
It should satisfy the Pixel Clock on CAS.

No OSD Trouble Shooting (Module Power Sequence)
Vcc
(5V)
TOn TOff TOnR
Va
TVaR TVaF
Vs
TVsR TVsF
Td_on Td_off
DISPEN Normal Display
Symbol Description Min. Max. unit

Time interval between 90% of Vcc and 10% of Vs
TOn 750 1250 msec
when Power On
Time interval between 10% of Vs and 90% of Vcc
TOff 20 - msec
when Power Off
Time interval between 10% of Vcc and 90% of Vcc
TOnR 2000 - msec
when Power On
TVaR Rising Time of Va (10% to 90%) 10 300 msec

TVaF Falling Time of Va (90% to 10%) 50 500 msec
TVsR Rising Time of Vs (10% to 90%) 100 400 msec
TVsF Falling Time of Vs (90% to 10%) 90 500 msec
Time interval between 90% of Vs
Td_on 3100 - msec
and DISPEN rising edge when Power On
Time interval between DISPEN falling edge 1500 6000 msec

Td_off
and 90% of Vs when Power Off Recommended 2sec

Module Control Trouble Shooting
“TILT” on Adjust Remocon N N

PDP Module Power is OK? Check SMPS & cable
: PDP internal pattern displays?
SCL
Y Y
Replace PDP Module
SDA
PDP Module is OK. N Check Signal N Replace Control

Check SCL,SDA line output Board
< Sample Signal >
1 9 1 8
SCL
SDA 0 0 0 1 1 1 0 W A7 A6 A1 A0
Start Chip ID Address Byte Write ACK Command Address

By (0x1C) only By Slave Addr=A[7:0]
Master
9 1 9 ACK signal Check

SCL (continue) Low : OK
High : Error
SDA (continue) D7 D6 D0
ACK Command Data ACK Stop

By Slave for Addr By Slave By Master
Master : Image Board

Slave : PDP Module


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check RF Cable
Check Tuner(TU1300) Power N Replace one of Bead

(5.0V, 3.3V, 1.2V) & Recheck
N
Check IF Signal pin #17, 18 Maybe Tuner has problems
Check Demodulator Power N

Replace L609 / IC600
(3.3V, 1.2V) L609, IC600
Check Demodulator X-TAL N

Replace X-TAL
(X602)
Check TP Clock, Data, Sync N

Maybe Demodulator has problems
R630, R631, R632
Maybe MstarS7(IC100)
has problems


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check RF Cable
N Replace one of
Check Tuner Power
L1301/L1300/L1302
(5.0V, 3.3V, 1.2V)
& Recheck
Check CVBS Signal N

Maybe Tuner(TU1300) has problems
TU1300 #11 Pin
N Replace one of
Check CVBS Signal
R1330/Q1305/R154/C213
R1334
& Recheck
Maybe MstarS7(IC100)
has problems


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check Signal Format

Is it supported signal?
Check Component Cable
N
Check Component Jack JK1001 Replace Jack
N Replace one of
Check Component Signal
R1020/R1021/R1022
R1020/R1021/R1022
R1005/R1012/R1013
R1005/R1012/R1013
& Recheck
Y
Check Component Signal N
R175/R173/R177 Replace it
R180/R182/R184
Maybe Mstar S7(IC100)

has problems


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check Signal Format

Check RGB Cable
N
Check RGB Jack P901 Replace Jack
Check RGB Signal N

Replace It & Recheck
R907,R908,R909
N Replace one of R915/R916

Check Sync Signal
& Recheck
N Replace it or re-burn
Check EEPROM (IC901)
& Recheck

has problems


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check Signal Format

Check AV Cable
N
Check Jack JK1001/JK1002 Replace Jack
N Replace one of
Check CVBS Signal
C1016/C1018
C1016/C1018
& Recheck
N Replace one of
Check CVBS Signal
R187/R188/C226/C227
R187/R188/C226/C227
& Recheck

has problems


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check Signal Format

Check HDMI Cable
Check HDMI Jack N

Replace Jack
JK803, JK804
Y
Check I2C Signal N
R844/R845 Replace It & Recheck
/R858/R859/R848/R849/R862/R863

has problems


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_S7
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_S7
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Make sure you can’t hear any audio
N
Check Speaker Replace Speaker
N
Check Connector P703 Replace Connector
N Replace one of N
Check Signal Maybe TAS9709 has problems.
Capacitor, Register
L700, L701 Replace It
& Recheck
Y
Check IC700 Power N
17V, 3.3V Replace It & Recheck
L702,L703
Check Mstar S7 I2S Output N

Replace It & Recheck
R724, R725, R726

has problems


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

N Follow procedure digital TV video

Check video output
trouble shooting
Follow procedure All source audio N Maybe Mster S7 internal audio DSP
trouble shooting has problems. Replace It


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

N Follow procedure analog TV video

Check video output
trouble shooting
Check Tuner Power N Replace one of L1300/L1301/L1302

(5.0V, 3.3V, 1.2V) & Recheck
Check SIF Signal N

Maybe Tuner(TU1300) has problems
TU1300 #9 Pin
N Replace one of
Check SIF Signal C252/R246/R1332/Q1304/R1325
IC501 & Recheck
Follow procedure All source audio N Maybe Mstar S7 audio block has
trouble shooting problems. Replace It
< SIF waveform – sample >

- Defend on the input signal.


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

N Follow procedure external input

Check Video Output
video trouble shooting
N
Check Jack JK1001/JK1002/P900 Replace Jack
Check Signal Replace one of

C206/C207/C208/C209/C210/C211 C206/C207/C208/C209/C210/C211
C212/C220/C221/C222/C223/C224 N C212/C220/C221/C222/C223/C224
C225/C205/R166/R167/R168/R169 C225/C205/R166/R167/R168/R169
R170/R171/R127/C215/C216/C203 R170/R171/R127/C215/C216/C203
C217/C218/C219/C204/R187/R188 C217/C218/C219/C204/R187/R188
C226/C227 C226/C227 & Recheck
trouble shooting problems. Replace It


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

N
Follow procedure HDMI video
Check video output
trouble shooting
N
Re-download EDID data Replace IC802, IC804
trouble shooting problems. Replace it


DDR3
1MB
1MB 256MB
256MB 256MB(128*2)
256MB(128*2)
WXGA/XGA
Cable
CVBS_LIVE LVDS
PAL/NTSC SPDIF
IF TP1
SIF_LIVE
Demodulator TP1 S7
S7
MN884433 I2S_BCM
EXT_IN
HDMI_D
Rear(0)
USB2.0
HDMI_C Side(1)
(External Input)
(Audio Out) (Micom)
AV1
AV1_LR
AV2
AV2_LR I2S_BCM
TAS9709
TAS9709
COMP1_LR
COMP2_LR
RGB_LR EXT_IN
NEC
I2C Micom
(USB) Local
KEY
IR
HDMI_Rear(D port)
UI_HW_PORT1

Check USB 2.0 Cable
Y
Check USB device
If device is 2.5 inch HDD,
Check power adaptor
Check P1102 (250/350 tool) N

Replace Jack
P1100 (230 tool)
Y
Check 5V voltage level N Replace one of
IC1101 #2 (250/350 tool)
IC1101,L1100 & Recheck
L1100 (230 tool)
MaybeMstar S7 (IC101)
has problems. Replace It.
• Exception
- USB power could be disabled by inrushing current
- In this case, remove the device and try to reboot the TV (AC power off/on)

TV PLASMA LG - 42PT250B-SA Chassis PB11K PDF

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TV PLASMA LG - 42PT250B-SA Chassis PB11K PDF

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 42PT250B 42PT250B-SA

P/NO : MFL66986905 (1101-REV00) Printed in Korea

SAFETY PRECAUTIONS ...........................................................................................................3

ADJUSTMENT INSTRUCTION ..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................13

EXPLODED VIEW ...................................................................................................................14

CIRCUIT DIAGRAM ....................................................................................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Good Earth Ground

Model Name Market Brand

1. Application Range 4. PCB Assembly Adjustment

4-1. Using RS-232C

5-1. Auto Adjust Component

(2) Using instrument

5-2. Use Internal ADC(S7R)

< Adjustment pattern : 480i / 1080p 60Hz Pattern >

O It only needs to PCM EDID D/L for North America Product.

HDMI-1 EDID table(2D HD) - South Centural America

HDMI-2 EDID table(2D HD) - South Centural America

(3) White Balance Adjustment

5-6. Adjustment Color Temperature

(1)Test equipment : D.M.M 1EA

Caution : Inspection only PAL M / NTSC 9-1. Adjustment method

8-3. Check Items.

11. USB DOWNLOAD

V Press “FAV” Press 7 times.

V Select download file (epk file)

V After download is finished, remove the USB stick.

V Press “IN-START” key of ADJ remote control, check the

- 14 - LGE Internal Use Only

+3.3V_AVDD PWM0 AF15

2G BIT NAND Flash

READY R39 1K AD16

H : Serial Flash NAND01GW3B2CN6E R34 1K READY LVBCLKP/LLV0P/GREEN[5]

H : 16 bit READY AUD_MASTER_CLK AD1

NC_1 NC_29 R35 1K AD13

PCM_A[0-7] R36 1K READY AD5

NC_3 NC_27 AF4

/PF_CE0 9 40 <T3 CHIP Config(AUD_LRCH)> AE10

NC_7 NC_24 C6 Boot from SPI flash : 1’b0 AD11

10 39 10uF Boot from NOR flash : 1’b1 AD7

READY 0.1uF 1.CHIP_CONF= 4’h3:{0,0,1,1}MIPS_no_EJ_NOR8

VSS_1 VSS_2 C7 0.1uF 4.CHIP_CONF= 4’hB:{1,0,1,1}B51_Secure_no_scramble

READY 3.MIPS as host,EJ use PAD2,Byte mode NAND flash NC_17

R8 5.8051 as host,Internal SPI flash secure boot with scramble

MX25L8005M2I-15G READY 10pF 10pF READY

PCM_A9 GPIO6/PM0/INT0 AC_DET

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

Copyright © 2011 LG Electronics Inc. All rights reserved.

MUST BE LINE IMPEADANCE 100 OHM !!

AA1 R207 NC_46 LVA4N/LLV8N

R164 22 G6 P2 C239 2.2uF AF9 AE22

HSYNC1 NC_75 TCON9/CS3/OPT_P

R173 33 C220 0.047uF K5 W3 AE12 AF19

R174 68 C221 K4 W4 AD18

SIDE_CVBS_IN CVBS3P ET_TXD0 3D_GPIO_0

R191 33 C230 0.047uF F21

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 2 14

Copyright © 2011 LG Electronics Inc. All rights reserved.