OptiX OSN 2500 Intelligent Optical Transmission PDF

OptiX OSN 2500 Intelligent Optical Transmission
System
V100R010
Hardware Description
Issue 06
Date 2011-01-20
HUAWEI TECHNOLOGIES CO., LTD.

Copyright © Huawei Technologies Co., Ltd. 2011. All rights reserved.
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Issue 06 (2011-01-20) Huawei Proprietary and Confidential i

Copyright © Huawei Technologies Co., Ltd.
OptiX OSN 2500 Intelligent Optical Transmission System
Hardware Description About This Document
About This Document
Related Versions
The following table lists the product versions related to this document.
Product Name Version
OptiX OSN 2500 V100R010
Intended Audience
This document describes the structure, composition, boards, and cables of the OptiX OSN
equipment.
The readers can have a comprehensive understanding of the hardware of the OptiX OSN
equipment through this document.
This document is intended for:
l Network design and planning engineers

l Hardware installers
Symbol Conventions
The symbols that may be found in this document are defined as follows.
Symbol Description
Indicates a hazard with a high level of risk, which if not

avoided, will result in death or serious injury.
DANGER
Indicates a hazard with a medium or low level of risk, which

if not avoided, could result in minor or moderate injury.
WARNING
Issue 06 (2011-01-20) Huawei Proprietary and Confidential iii

About This Document Hardware Description
Symbol Description
Indicates a potentially hazardous situation, which if not

avoided, could result in equipment damage, data loss,
CAUTION
performance degradation, or unexpected results.
TIP Indicates a tip that may help you solve a problem or save
time.
NOTE Provides additional information to emphasize or supplement

important points of the main text.
GUI Conventions
The GUI conventions that may be found in this document are defined as follows.
Convention Description
Boldface Buttons, menus, parameters, tabs, window, and dialog titles

are in boldface. For example, click OK.
> Multi-level menus are in boldface and separated by the ">"

signs. For example, choose File > Create > Folder.
Change History
Updates between document issues are cumulative. Therefore, the latest document issue contains
all updates made in previous issues.
Updates in Issue 06 (2011-01-20) Based on Product Version

V100R010
This document of the V100R010 version is of the sixth release. Compared with Issue 05, this
version has the following new or optimized content:
l Topic "EoS/EoP Boards" has the following changes:

– Regarding the N5EFS0, the number of supported VCTRUNKs is changed.
– Regarding the N1EFS0A, the number of supported VCTRUNKs is changed.
l In topic "Optical Amplifier Boards and Dispersion Compensation Boards", the description
of support for TN11OBU1 boards in extended slots is deleted.
iv Huawei Proprietary and Confidential Issue 06 (2011-01-20)


V100R010
This document of the V100R010 version is of the fifth release. Compared with Issue 04, this
l Topic "EoS/EoP Boards" has the following changes:

– The description of the N2EFT8 and N2EFT8A is added.
– Regarding the N5EFS0, the number of supported VCTRUNKs is changed and the
description of support for the ping response function is added.
– Regarding the EFS0A, the number of supported VCTRUNKs is changed and the
description of support for the ping response function is added.
– The description of support for traffic classification based on PORT+SVLAN is added
for the N1EFS0A.
– The description of support for the ping response function is added for the N3EFS4.
– The description of support for the following functions is added for the N3EGS2:
unknown multicast packet discarding function, static multicast function, traffic
classification based on PORT+DSCP or PORT+ToS, and ping response function.
– The description of support for the ping response function is added for the N4EGS4.
l In topic "SDH Boards", the description of support for both optical and electrical modules
on an N1OU08 is added.

V100R010
This document of the V100R010 version is of the fourth release. Compared with Issue 03, this
Based on version V100R010C00, version V100R010C01 has the following new functions and
features: The "Functions and Features" part of the EGS2/EMS4/EGS4 is updated. The following
description is added: The N3EGS2/N1EMS4/N1EGS4/N4EGS4 supports the IGMP snooping
fast-leave function.

V100R010
This document of the V100R010 version is of the third release. Compared with Issue 02, this
l The topic "RPC Power Cable" is added.

l The bound bandwidths of the data boards are provided.
Issue 06 (2011-01-20) Huawei Proprietary and Confidential v


V100R010
This document of the V100R010 version is of the second release. Compared with Issue 01, this
l The number of supported VCTRUNKs for the N5EFS0 is changed to 24 in topic "Version
Description" of the EFS0.
l The power consumption and weight of each board are updated.

V100R010
This document of the V100R010 version is of the initial release. Compared with the V100R009,
this version has the following new or optimized content:
l The description of the EFP0 is added to the topic "EoS/EoP Boards".

l The DNI function is added to the description of the N4EGS4, and the MSTP function is
added to the description of the N1EGS4.
l The description of the lower order microwave SNCP function is added to the topic
"Microwave Boards".
l The topic "Mapping Policies of Power Consumption" is added.
l The topic "Data Boards" is divided into topics "EoS Boards", "ATM Boards", "RPR
Boards", and "SAN Boards".
l The topic "Pluggable Optical Module" is added.
l The topic "Board Information Quick Reference" is added, including the following contents:
compatibility on OptiX OSN equipment, specifications of board interfaces (optical
interfaces, electrical interfaces, and auxiliary interfaces), loopback capability of boards,
functions of boards, and protection capability of boards.

V100R009
This document of the V100R009 version is of the fourth release. Compared with Issue 03, this
l The topics of "Application", "Configuring and Commissioning the Board", "Maintaining
the Board", "List of Alarms", and "List of Performance Events" are added for the SL1,
SLQ41, SEP1, SL16A, SF64, PQ1, PQM, PL3, PL3A, DX1, SPQ4, ADL4, ADQ1, EFS0A,
EFS0, EFS4, EFT4, EFT8A, EFT8, EGR2, EGS2, EGS4A, EGS4, EGT2, EMR0, EMS2,
EMS4, IDL4, IDQ1, MST4, CXL1, CXL4, CXL16, CXLLN, CXLQ41, IFSD1, and
RPWR.
l The "Task Collection" chapter is added.
l The "Functions and Features" parts of the SL16, SL16A are updated. Description of whether
the boards support the TCM function and AU-3 services is modified.
vi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

l Based on version V100R009C04, this version has the following new or modified content:
– The "Version Description" part of the SLO1 is updated. The following description is
added: The N3SLO1 is discontinued.
– The "Version Description" parts of the CXL1, CXL4, and CXL16 are updated. The
following description is added: The Q3CXL is discontinued, and the Q5CXL can
substitute for the Q2CXL that operates at the same line rate.
– The "Functions and Features" part of the CXLLN is updated. The DCC processing
capability of the CXLLN is modified.
– The "Jumpers and DIP Switches" part of the CXLLN is updated. The CF card in the
figure that shows the layout of the jumpers on the Q5CXLLN board is deleted.
– The "Microwave Boards" part is updated. Description of the matching ODUs and related
reference is added.
– The "Engineering Labels" part is updated. Description of the engineering label for the
IF cable is added.

V100R009
This document of the V100R009 version is of the third release. Compared with Issue 02, this
l Description of the Q3SAP is deleted.
l The N1IDQ1A and N1IDL4A of the product version V100R009C04 are added.
l The "Board Protection" parts of the EFS0 and EFS0A are updated.
l The "Valid Slots" part of the ETS8 is updated.
l The "Version Description" and "Functions and Features" parts of the following boards are
updated: SL1, SLQ1, SLO1, SL4, SLD4, SLQ4, SL16, and SL16A. The update is with
regard to whether the boards support the TCM function or AU-3 services.
l The "Functions and Features", "Working Principle and Signal Flow", and "Front Panel"
parts of the CXLLN and CXLQ41 are updated. In addition, the "Working Principle and
Signal Flow" part of the CXLD41 is updated.
l The "Version Description" parts of the SL4 and SLD4 are updated. The known bugs are
fixed.

V100R009
This document of the V100R009 version is of the second release. Compared with Issue 01, this
l Descriptions of the N3SLN, N3SLD41, N3SLT1, N1PQMA, Q5CXLD41 are deleted.
l Description of the Q1PIUA is added.
l Descriptions of the GE electrical interfaces on the N2EGT2, N3EGS2, N1EMS2, N1EMS4,
N1EGS4, and N4EGS4 boards are added.
Issue 06 (2011-01-20) Huawei Proprietary and Confidential vii

l The "Valid Slots" part of the EFS0 and EFS0A boards is optimized.
l The descriptive style of the technical specifications of the boards is unified.

V100R009
Compared with the V100R008, this version has the following new or optimized content:
l Descriptions of the N3SLT1, N3SLO1, N3SLN, N3SLD41, N3SLQ41, N1PQMA, N2PO1,
Q5CXLLN, Q5CXLD41, Q5CXLQ41, N5EFS0, N1EFS0A, N3EFS4, N3EGS2,
N4EGS4, N2EGT2, N1EMS2, N1EFF8A, N1ETF8A, N1IFSD1, N1RPWR, Q3SAP,
N1RPC01, and N1PRC02 are added.
l The differences between the N63E cabinet and the T63E cabinet are added.
l The parameters that need to be set for the WDM boards and optical amplifier boards are
added.
l Several bugs in this document of the previous version are fixed.

V100R008
This document of the V100R008 version is of the fourth release. The updated contents are as
follows.
The differences between the N63E cabinet and the T63 cabinet are added.
Update the "75-ohm 8xE1 Cable".
Several bugs are fixed.

V100R008
This document of the V100R008 version is of the third release. The updated contents are as
follows:
Several bugs in this document of the previous version are fixed.

V100R008
This document of the V100R008 version is of the second release. The updated contents are as
follows:
Descriptions of the N2EGS4A are added.
viii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


V100R008
This document of the V100R008 version is of the first release. Compared with the V100R007,
this version has the following new or optimized content:
Descriptions of the N1SL1A, N1SLQ1A, N1SL4A, N1SLD4A, N1SLQ4A, Q3CXL1,
Q3CXL4, Q3CXL16, and N2BPA are added.
Issue 06 (2011-01-20) Huawei Proprietary and Confidential ix

Hardware Description Contents
Contents
About This Document...................................................................................................................iii

1 Equipment Structure.................................................................................................................1-1
2 Cabinet.........................................................................................................................................2-1
2.1 Types of Cabinets............................................................................................................................................2-2
2.2 Configuration of the Cabinet.........................................................................................................................2-10
2.2.1 Indicators..............................................................................................................................................2-11
2.2.2 DC Power Distribution Unit.................................................................................................................2-11
2.2.3 Other Configurations............................................................................................................................2-13
2.3 Technical Specifications...............................................................................................................................2-13
3 Subrack.........................................................................................................................................3-1
3.1 Structure..........................................................................................................................................................3-2
3.2 Slot Allocation.................................................................................................................................................3-3
3.3 Slot Access Capacity.......................................................................................................................................3-5
3.4 Ventilation Mode.............................................................................................................................................3-8
3.5 Cable Management..........................................................................................................................................3-9
3.6 Mapping Policies of Power Consumption.....................................................................................................3-11
4 Board List and Classification...................................................................................................4-1

4.1 Appearances and Dimensions of the Boards...................................................................................................4-2
4.2 Bar Codes of the Boards..................................................................................................................................4-3
4.3 Classification of the Boards............................................................................................................................ 4-4
5 Cross-Connect Boards and System Control Boards.............................................................5-1

5.1 CXL1...............................................................................................................................................................5-2
5.1.1 Version Description................................................................................................................................5-3
5.1.2 Application.............................................................................................................................................5-3
5.1.3 Functions and Features...........................................................................................................................5-4
5.1.4 Working Principle and Signal Flow.......................................................................................................5-7
5.1.5 Front Panel...........................................................................................................................................5-12
5.1.6 Jumpers and DIP Switches...................................................................................................................5-14
5.1.7 Valid Slots............................................................................................................................................5-17
5.1.8 Feature Code........................................................................................................................................5-17
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xi

Contents Hardware Description
5.1.9 Configuring and Commissioning the Board.........................................................................................5-18

5.1.10 Parameter Settings..............................................................................................................................5-20
5.1.11 Maintaining the Board........................................................................................................................5-21
5.1.12 List of Alarms.....................................................................................................................................5-22
5.1.12.1 Q2CXL1..........................................................................................................................................5-22
5.1.12.2 Q3CXL1..........................................................................................................................................5-24
5.1.13 List of Performance Events................................................................................................................5-26
5.1.13.1 Q2CXL1..........................................................................................................................................5-26
5.1.13.2 Q3CXL1..........................................................................................................................................5-27
5.1.14 Technical Specifications....................................................................................................................5-28
5.2 CXL4.............................................................................................................................................................5-29
5.2.1 Version Description..............................................................................................................................5-31
5.2.2 Application...........................................................................................................................................5-31
5.2.3 Functions and Features.........................................................................................................................5-32
5.2.4 Working Principle and Signal Flow.....................................................................................................5-35
5.2.5 Front Panel...........................................................................................................................................5-40
5.2.7 Valid Slots............................................................................................................................................5-45
5.2.8 Feature Code........................................................................................................................................5-45
5.2.12 List of Alarms.....................................................................................................................................5-50
5.2.12.1 Q2CXL4..........................................................................................................................................5-50
5.2.12.2 Q3CXL4..........................................................................................................................................5-52
5.2.13.1 Q2CXL4..........................................................................................................................................5-54
5.2.13.2 Q3CXL4..........................................................................................................................................5-55
5.3 CXL16...........................................................................................................................................................5-57
5.3.2 Application...........................................................................................................................................5-59
5.3.5 Front Panel...........................................................................................................................................5-68
5.3.7 Valid Slots............................................................................................................................................5-73
5.3.8 Feature Code........................................................................................................................................5-73
5.3.12 List of Alarms.....................................................................................................................................5-78
xii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

5.3.12.1 Q2CXL16........................................................................................................................................5-78
5.3.12.2 Q3CXL16........................................................................................................................................5-80
5.3.13.1 Q2CXL16........................................................................................................................................5-82
5.3.13.2 Q3CXL16........................................................................................................................................5-83
5.4 CXLLN..........................................................................................................................................................5-86
5.4.2 Application...........................................................................................................................................5-87
5.4.5 Front Panel...........................................................................................................................................5-95
5.4.7 Valid Slots............................................................................................................................................5-98
5.4.8 Feature Code........................................................................................................................................5-98
5.4.10 Parameter Settings............................................................................................................................5-101
5.4.11 Maintaining the Board......................................................................................................................5-102
5.4.12 List of Alarms...................................................................................................................................5-103
5.4.12.1 Q5CXLLN.....................................................................................................................................5-104
5.4.13 List of Performance Events..............................................................................................................5-107
5.4.13.1 Q5CXLLN.....................................................................................................................................5-107
5.4.14 Technical Specifications..................................................................................................................5-108
5.5 CXLQ41......................................................................................................................................................5-111
5.5.1 Version Description............................................................................................................................5-113
5.5.2 Application.........................................................................................................................................5-113
5.5.3 Functions and Features.......................................................................................................................5-113
5.5.4 Working Principle and Signal Flow...................................................................................................5-117
5.5.5 Front Panel.........................................................................................................................................5-121
5.5.6 Jumpers and DIP Switches.................................................................................................................5-122
5.5.7 Valid Slots..........................................................................................................................................5-124
5.5.8 Feature Code......................................................................................................................................5-124
5.5.9 Configuring and Commissioning the Board.......................................................................................5-125
5.5.12 List of Alarms...................................................................................................................................5-129
5.5.12.1 Q5CXLQ41...................................................................................................................................5-130
5.5.13.1 Q5CXLQ41...................................................................................................................................5-133
6 SDH Boards.................................................................................................................................6-1
6.1 SL1..................................................................................................................................................................6-3
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6.1.2 Application.............................................................................................................................................6-4
6.1.5 Front Panel.............................................................................................................................................6-9
6.1.7 Valid Slots............................................................................................................................................6-11
6.1.8 Feature Code........................................................................................................................................ 6-11
6.1.12 List of Alarms.....................................................................................................................................6-14
6.1.12.1 N1SL1............................................................................................................................................. 6-15
6.1.12.2 N2SL1............................................................................................................................................. 6-15
6.1.12.3 R1SL1..............................................................................................................................................6-17
6.1.13.1 N1SL1............................................................................................................................................. 6-18
6.1.13.2 N2SL1............................................................................................................................................. 6-18
6.1.13.3 R1SL1..............................................................................................................................................6-19
6.1.14 Technical Specifications.................................................................................................................... 6-19
6.2 SL1A............................................................................................................................................................. 6-21
6.2.2 Application...........................................................................................................................................6-22
6.2.5 Front Panel........................................................................................................................................... 6-25
6.2.6 Valid Slots............................................................................................................................................6-27
6.2.7 Feature Code........................................................................................................................................ 6-27
6.2.8 Parameter Settings................................................................................................................................6-27
6.2.9 Technical Specifications...................................................................................................................... 6-28
6.3 SLQ1............................................................................................................................................................. 6-29
6.3.2 Application...........................................................................................................................................6-30
6.3.5 Front Panel........................................................................................................................................... 6-35
6.3.6 Valid Slots............................................................................................................................................6-36
6.3.7 Feature Code........................................................................................................................................ 6-37
6.4 SLQ1A.......................................................................................................................................................... 6-39
xiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

6.4.2 Application...........................................................................................................................................6-40
6.4.5 Front Panel...........................................................................................................................................6-44
6.4.6 Valid Slots............................................................................................................................................6-46
6.4.7 Feature Code........................................................................................................................................6-46
6.4.9 Technical Specifications......................................................................................................................6-47
6.5 SLO1.............................................................................................................................................................6-48
6.5.2 Application...........................................................................................................................................6-49
6.5.5 Front Panel...........................................................................................................................................6-53
6.5.6 Valid Slots............................................................................................................................................6-55
6.5.7 Feature Code........................................................................................................................................6-55
6.6 SLT1..............................................................................................................................................................6-57
6.6.2 Application...........................................................................................................................................6-58
6.6.5 Front Panel...........................................................................................................................................6-62
6.6.6 Valid Slots............................................................................................................................................6-64
6.6.7 Feature Code........................................................................................................................................6-64
6.7 SEP1..............................................................................................................................................................6-66
6.7.2 Application...........................................................................................................................................6-67
6.7.5 Front Panel...........................................................................................................................................6-74
6.7.7 Valid Slots............................................................................................................................................6-75
6.7.8 Board Protection...................................................................................................................................6-75
6.7.9 Feature Code........................................................................................................................................6-77
6.7.13 List of Alarms.....................................................................................................................................6-81
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xv

6.7.13.1 N1SEP1...........................................................................................................................................6-81
6.7.14.1 N1SEP1...........................................................................................................................................6-82
6.8 SL4................................................................................................................................................................6-83
6.8.2 Application...........................................................................................................................................6-84
6.8.5 Front Panel........................................................................................................................................... 6-89
6.8.6 Valid Slots............................................................................................................................................6-90
6.8.7 Feature Code........................................................................................................................................ 6-91
6.9 SL4A............................................................................................................................................................. 6-93
6.9.2 Application...........................................................................................................................................6-94
6.9.5 Front Panel........................................................................................................................................... 6-98
6.9.6 Valid Slots............................................................................................................................................6-99
6.9.7 Feature Code........................................................................................................................................ 6-99
6.10 SLD4.........................................................................................................................................................6-101
6.10.1 Version Description..........................................................................................................................6-102
6.10.2 Application.......................................................................................................................................6-102
6.10.3 Functions and Features.....................................................................................................................6-103
6.10.4 Working Principle and Signal Flow.................................................................................................6-104
6.10.5 Front Panel.......................................................................................................................................6-107
6.10.6 Valid Slots........................................................................................................................................6-108
6.10.7 Feature Code....................................................................................................................................6-109
6.11 SLD4A......................................................................................................................................................6-111
6.11.2 Application.......................................................................................................................................6-112
6.11.5 Front Panel.......................................................................................................................................6-117
6.11.6 Valid Slots........................................................................................................................................6-118
6.11.7 Feature Code....................................................................................................................................6-118
xvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)


6.12 SLQ4.........................................................................................................................................................6-120
6.12.2 Application.......................................................................................................................................6-122
6.12.5 Front Panel.......................................................................................................................................6-126
6.12.6 Valid Slots........................................................................................................................................6-127
6.12.7 Feature Code....................................................................................................................................6-127
6.13 SLQ4A......................................................................................................................................................6-129
6.13.2 Application.......................................................................................................................................6-130
6.13.5 Front Panel.......................................................................................................................................6-135
6.13.6 Valid Slots........................................................................................................................................6-136
6.13.7 Feature Code....................................................................................................................................6-136
6.14 SL16..........................................................................................................................................................6-138
6.14.2 Application.......................................................................................................................................6-140
6.14.5 Front Panel.......................................................................................................................................6-144
6.14.6 Valid Slots........................................................................................................................................6-146
6.14.7 Feature Code....................................................................................................................................6-146
6.15 SL16A.......................................................................................................................................................6-149
6.15.2 Application.......................................................................................................................................6-151
6.15.5 Front Panel.......................................................................................................................................6-155
6.15.6 Jumpers and DIP Switches...............................................................................................................6-157
6.15.7 Valid Slots........................................................................................................................................6-157
6.15.8 Feature Code....................................................................................................................................6-157
6.15.9 Configuring and Commissioning the Board.....................................................................................6-158
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xvii

6.15.10 Parameter Settings..........................................................................................................................6-159

6.15.11 Maintaining the Board....................................................................................................................6-160
6.15.12 List of Alarms.................................................................................................................................6-161
6.15.12.1 N1SL16A....................................................................................................................................6-161
6.15.12.2 N2SL16A....................................................................................................................................6-162
6.15.12.3 N3SL16A....................................................................................................................................6-163
6.15.13 List of Performance Events............................................................................................................6-165
6.15.13.1 N1SL16A....................................................................................................................................6-165
6.15.13.2 N2SL16A....................................................................................................................................6-165
6.15.13.3 N3SL16A....................................................................................................................................6-166
6.15.14 Technical Specifications................................................................................................................6-166
6.16 SF16..........................................................................................................................................................6-168
6.16.2 Application.......................................................................................................................................6-169
6.16.5 Front Panel.......................................................................................................................................6-173
6.16.6 Valid Slots........................................................................................................................................6-175
6.16.7 Feature Code....................................................................................................................................6-175
6.17 SLQ41.......................................................................................................................................................6-178
6.17.2 Application.......................................................................................................................................6-179
6.17.5 Front Panel.......................................................................................................................................6-183
6.17.7 Valid Slots........................................................................................................................................6-185
6.17.8 Feature Code....................................................................................................................................6-185
6.17.12 List of Alarms.................................................................................................................................6-189
6.17.12.1 N3SLQ41....................................................................................................................................6-189
6.17.13.1 N3SLQ41....................................................................................................................................6-191
6.18 EU04..........................................................................................................................................................6-193
6.18.2 Application.......................................................................................................................................6-194
xviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


6.18.5 Front Panel.......................................................................................................................................6-195
6.18.6 Valid Slots........................................................................................................................................6-197
6.19 EU08..........................................................................................................................................................6-198
6.19.2 Application.......................................................................................................................................6-198
6.19.5 Front Panel.......................................................................................................................................6-199
6.19.6 Valid Slots........................................................................................................................................6-201
6.20 OU08.........................................................................................................................................................6-202
6.20.2 Application.......................................................................................................................................6-203
6.20.5 Front Panel.......................................................................................................................................6-204
6.20.6 Valid Slots........................................................................................................................................6-207
7 PDH Boards.................................................................................................................................7-1
7.1 PD1..................................................................................................................................................................7-3
7.1.2 Application.............................................................................................................................................7-4
7.1.5 Front Panel.............................................................................................................................................7-8
7.1.6 Valid Slots..............................................................................................................................................7-9
7.1.7 Feature Code........................................................................................................................................ 7-10
7.2 PQ1................................................................................................................................................................7-13
7.2.2 Application...........................................................................................................................................7-15
7.2.5 Front Panel........................................................................................................................................... 7-19
7.2.7 Valid Slots............................................................................................................................................7-20
7.2.8 Feature Code........................................................................................................................................ 7-21
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xix


7.2.13 List of Alarms.....................................................................................................................................7-25
7.2.13.1 N1PQ1.............................................................................................................................................7-25
7.2.13.2 N2PQ1.............................................................................................................................................7-26
7.2.14.1 N1PQ1.............................................................................................................................................7-26
7.2.14.2 N2PQ1.............................................................................................................................................7-26
7.2.15 Known Restrictions on the Board......................................................................................................7-27
7.3 PQM..............................................................................................................................................................7-27
7.3.2 Application...........................................................................................................................................7-29
7.3.5 Front Panel...........................................................................................................................................7-33
7.3.7 Valid Slots............................................................................................................................................7-34
7.3.8 Feature Code........................................................................................................................................7-34
7.3.13 List of Alarms.....................................................................................................................................7-39
7.3.13.1 N1PQM...........................................................................................................................................7-39
7.3.14.1 N1PQM...........................................................................................................................................7-40
7.4 PL3................................................................................................................................................................7-41
7.4.2 Application...........................................................................................................................................7-42
7.4.5 Front Panel...........................................................................................................................................7-46
7.4.7 Valid Slots............................................................................................................................................7-48
7.4.8 Feature Code........................................................................................................................................7-48
xx Huawei Proprietary and Confidential Issue 06 (2011-01-20)


7.4.13 List of Alarms.....................................................................................................................................7-53
7.4.13.1 N1PL3............................................................................................................................................. 7-53
7.4.13.2 N2PL3............................................................................................................................................. 7-54
7.4.14.1 N1PL3............................................................................................................................................. 7-54
7.4.14.2 N2PL3............................................................................................................................................. 7-55
7.4.15 Known Restrictions on the Board...................................................................................................... 7-55
7.5 PL3A............................................................................................................................................................. 7-56
7.5.2 Application...........................................................................................................................................7-57
7.5.5 Front Panel........................................................................................................................................... 7-61
7.5.7 Valid Slots............................................................................................................................................7-63
7.5.8 Feature Code........................................................................................................................................ 7-63
7.5.12 List of Alarms.....................................................................................................................................7-65
7.5.12.1 N1PL3A.......................................................................................................................................... 7-66
7.5.12.2 N2PL3A.......................................................................................................................................... 7-66
7.5.13.1 N1PL3A.......................................................................................................................................... 7-67
7.5.13.2 N2PL3A.......................................................................................................................................... 7-67
7.6 PD3................................................................................................................................................................7-69
7.6.2 Application...........................................................................................................................................7-70
7.6.5 Front Panel........................................................................................................................................... 7-74
7.6.6 Valid Slots............................................................................................................................................7-75
7.7 PQ3................................................................................................................................................................7-78
7.7.2 Application...........................................................................................................................................7-79
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxi


7.7.5 Front Panel...........................................................................................................................................7-83
7.7.6 Valid Slots............................................................................................................................................7-84
7.8 DX1...............................................................................................................................................................7-87
7.8.2 Application...........................................................................................................................................7-88
7.8.5 Front Panel...........................................................................................................................................7-91
7.8.7 Valid Slots............................................................................................................................................7-93
7.8.8 Feature Code........................................................................................................................................7-93
7.8.13 List of Alarms.....................................................................................................................................7-98
7.8.13.1 N1DX1............................................................................................................................................7-98
7.8.14.1 N1DX1............................................................................................................................................7-99
7.9 DXA............................................................................................................................................................7-100
7.9.2 Application.........................................................................................................................................7-100
7.9.5 Front Panel.........................................................................................................................................7-102
7.9.6 Valid Slots..........................................................................................................................................7-104
7.10 SPQ4..........................................................................................................................................................7-104
7.10.2 Application.......................................................................................................................................7-106
7.10.5 Front Panel.......................................................................................................................................7-111
7.10.7 Valid Slots........................................................................................................................................7-113
xxii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

7.10.8 Feature Code....................................................................................................................................7-113

7.10.9 Board Protection...............................................................................................................................7-113
7.10.10 Configuring and Commissioning the Board...................................................................................7-115
7.10.13 List of Alarms.................................................................................................................................7-118
7.10.13.1 N1SPQ4.......................................................................................................................................7-118
7.10.13.2 N2SPQ4.......................................................................................................................................7-119
7.10.14.1 N1SPQ4.......................................................................................................................................7-120
7.10.14.2 N2SPQ4.......................................................................................................................................7-120
7.11 D12B.........................................................................................................................................................7-121
7.11.2 Application.......................................................................................................................................7-122
7.11.5 Front Panel.......................................................................................................................................7-122
7.11.6 Valid Slots........................................................................................................................................7-125
7.12 D12S..........................................................................................................................................................7-126
7.12.2 Application.......................................................................................................................................7-127
7.12.5 Front Panel.......................................................................................................................................7-128
7.12.6 Valid Slots........................................................................................................................................7-130
7.13 D75S..........................................................................................................................................................7-132
7.13.2 Application.......................................................................................................................................7-133
7.13.5 Front Panel.......................................................................................................................................7-134
7.13.6 Valid Slots........................................................................................................................................7-136
7.14 D34S..........................................................................................................................................................7-137
7.14.2 Application.......................................................................................................................................7-138
7.14.5 Front Panel.......................................................................................................................................7-139
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxiii

7.14.6 Valid Slots........................................................................................................................................7-140

7.14.7 Technical Specifications.................................................................................................................. 7-140
7.15 C34S..........................................................................................................................................................7-141
7.15.2 Application.......................................................................................................................................7-142
7.15.5 Front Panel....................................................................................................................................... 7-143
7.15.6 Valid Slots........................................................................................................................................7-144
7.16 MU04........................................................................................................................................................ 7-145
7.16.2 Application.......................................................................................................................................7-146
7.16.5 Front Panel....................................................................................................................................... 7-147
7.16.6 Valid Slots........................................................................................................................................7-149
7.17 DM12........................................................................................................................................................ 7-150
7.17.2 Application.......................................................................................................................................7-151
7.17.5 Front Panel....................................................................................................................................... 7-152
7.17.6 Valid Slots........................................................................................................................................7-154
7.18 TSB4..........................................................................................................................................................7-156
7.18.2 Application.......................................................................................................................................7-156
7.18.5 Front Panel....................................................................................................................................... 7-157
7.18.6 Valid Slots........................................................................................................................................7-158
7.19 TSB8..........................................................................................................................................................7-159
7.19.2 Application.......................................................................................................................................7-160
7.19.5 Front Panel....................................................................................................................................... 7-161
7.19.6 Valid Slots........................................................................................................................................7-162
xxiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

8 EoS/EoP Boards...........................................................................................................................8-1
8.1 EFT4................................................................................................................................................................8-3
8.1.2 Application.............................................................................................................................................8-4
8.1.5 Front Panel.............................................................................................................................................8-8
8.1.7 Valid Slots............................................................................................................................................8-10
8.1.8 Feature Code........................................................................................................................................8-10
8.1.10 Configuring the Board Functions.......................................................................................................8-12
8.1.13 List of Alarms.....................................................................................................................................8-14
8.1.13.1 R1EFT4...........................................................................................................................................8-14
8.1.14.1 R1EFT4...........................................................................................................................................8-15
8.2 EFT8..............................................................................................................................................................8-21
8.2.2 Application...........................................................................................................................................8-22
8.2.5 Front Panel...........................................................................................................................................8-28
8.2.7 Valid Slots............................................................................................................................................8-30
8.2.8 Feature Code........................................................................................................................................8-30
8.2.13 List of Alarms.....................................................................................................................................8-33
8.2.13.1 N1EFT8...........................................................................................................................................8-33
8.2.13.2 N2EFT8...........................................................................................................................................8-34
8.2.14.1 N1EFT8...........................................................................................................................................8-35
8.2.14.2 N2EFT8...........................................................................................................................................8-37
8.3 EFT8A...........................................................................................................................................................8-42
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxv


8.3.2 Application...........................................................................................................................................8-44
8.3.5 Front Panel...........................................................................................................................................8-49
8.3.7 Valid Slots............................................................................................................................................8-52
8.3.8 Feature Code........................................................................................................................................8-52
8.3.13 List of Alarms.....................................................................................................................................8-55
8.3.13.1 N1EFT8A........................................................................................................................................8-55
8.3.13.2 N2EFT8A........................................................................................................................................8-56
8.3.14.1 N1EFT8A........................................................................................................................................8-57
8.3.14.2 N2EFT8A........................................................................................................................................8-58
8.4 EGT2.............................................................................................................................................................8-64
8.4.2 Application...........................................................................................................................................8-66
8.4.5 Front Panel...........................................................................................................................................8-71
8.4.7 Valid Slots............................................................................................................................................8-75
8.4.8 Feature Code........................................................................................................................................8-75
8.4.13 List of Alarms.....................................................................................................................................8-78
8.4.13.1 N1EGT2..........................................................................................................................................8-78
8.4.13.2 N2EGT2..........................................................................................................................................8-79
8.4.14.1 N1EGT2..........................................................................................................................................8-80
8.4.14.2 N2EGT2..........................................................................................................................................8-81
8.5 EFS0..............................................................................................................................................................8-92
xxvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)


8.5.2 Application...........................................................................................................................................8-94
8.5.5 Front Panel.........................................................................................................................................8-102
8.5.7 Valid Slots..........................................................................................................................................8-103
8.5.8 Feature Code......................................................................................................................................8-104
8.5.9 Board Protection.................................................................................................................................8-104
8.5.11 Configuring the Board Functions.....................................................................................................8-106
8.5.14 List of Alarms...................................................................................................................................8-108
8.5.14.1 N1EFS0.........................................................................................................................................8-108
8.5.14.2 N2EFS0.........................................................................................................................................8-109
8.5.14.3 N4EFS0.........................................................................................................................................8-109
8.5.14.4 N5EFS0.........................................................................................................................................8-110
8.5.15.1 N1EFS0.........................................................................................................................................8-111
8.5.15.2 N2EFS0.........................................................................................................................................8-113
8.5.15.3 N4EFS0.........................................................................................................................................8-114
8.5.15.4 N5EFS0.........................................................................................................................................8-116
8.5.16 Known Restrictions on the Board....................................................................................................8-117
8.6 EFS0A.........................................................................................................................................................8-126
8.6.2 Application.........................................................................................................................................8-127
8.6.5 Front Panel.........................................................................................................................................8-134
8.6.7 Valid Slots..........................................................................................................................................8-136
8.6.8 Feature Code......................................................................................................................................8-136
8.6.14 List of Alarms...................................................................................................................................8-141
8.6.14.1 N1EFS0A......................................................................................................................................8-141
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxvii

8.6.15.1 N1EFS0A......................................................................................................................................8-142
8.7 EFS4............................................................................................................................................................8-148
8.7.2 Application.........................................................................................................................................8-150
8.7.5 Front Panel.........................................................................................................................................8-156
8.7.7 Valid Slots..........................................................................................................................................8-159
8.7.8 Feature Code......................................................................................................................................8-159
8.7.13 List of Alarms...................................................................................................................................8-162
8.7.13.1 N1EFS4.........................................................................................................................................8-162
8.7.13.2 N2EFS4.........................................................................................................................................8-163
8.7.13.3 N3EFS4.........................................................................................................................................8-164
8.7.14.1 N1EFS4.........................................................................................................................................8-165
8.7.14.2 N2EFS4.........................................................................................................................................8-166
8.7.14.3 N3EFS4.........................................................................................................................................8-168
8.8 EFP0............................................................................................................................................................8-178
8.8.2 Application.........................................................................................................................................8-179
8.8.5 Front Panel.........................................................................................................................................8-185
8.8.7 Valid Slots..........................................................................................................................................8-187
8.8.8 Feature Code......................................................................................................................................8-187
8.8.13 List of Alarms...................................................................................................................................8-190
8.8.13.1 N1EFP0.........................................................................................................................................8-191
xxviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

8.8.14.1 N1EFP0.........................................................................................................................................8-192
8.9 EGS2........................................................................................................................................................... 8-198
8.9.2 Application.........................................................................................................................................8-200
8.9.5 Front Panel......................................................................................................................................... 8-207
8.9.7 Valid Slots..........................................................................................................................................8-210
8.9.8 Feature Code...................................................................................................................................... 8-210
8.9.13 List of Alarms...................................................................................................................................8-214
8.9.13.1 N2EGS2........................................................................................................................................ 8-214
8.9.13.2 N3EGS2........................................................................................................................................ 8-215
8.9.14.1 N2EGS2........................................................................................................................................ 8-216
8.9.14.2 N3EGS2........................................................................................................................................ 8-217
8.9.15 Known Restrictions on the Board.................................................................................................... 8-218
8.10 EMS2.........................................................................................................................................................8-228
8.10.2 Application.......................................................................................................................................8-229
8.10.5 Front Panel....................................................................................................................................... 8-236
8.10.7 Valid Slots........................................................................................................................................8-240
8.10.8 Feature Code.................................................................................................................................... 8-240
8.10.10 Configuring the Board Functions...................................................................................................8-242
8.10.13 List of Alarms.................................................................................................................................8-244
8.10.13.1 N1EMS2......................................................................................................................................8-244
8.10.14.1 N1EMS2......................................................................................................................................8-246
8.10.15 Known Restrictions on the Board.................................................................................................. 8-247
8.10.16 Technical Specifications................................................................................................................ 8-247
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxix

8.11 EMS4.........................................................................................................................................................8-256
8.11.2 Application.......................................................................................................................................8-257
8.11.5 Front Panel.......................................................................................................................................8-264
8.11.7 Valid Slots........................................................................................................................................8-268
8.11.8 Feature Code....................................................................................................................................8-269
8.11.14 List of Alarms.................................................................................................................................8-277
8.11.14.1 N1EMS4......................................................................................................................................8-277
8.11.15.1 N1EMS4......................................................................................................................................8-278
8.12 EGS4.........................................................................................................................................................8-288
8.12.2 Application.......................................................................................................................................8-290
8.12.5 Front Panel.......................................................................................................................................8-298
8.12.7 Valid Slots........................................................................................................................................8-301
8.12.8 Feature Code....................................................................................................................................8-301
8.12.14 List of Alarms.................................................................................................................................8-310
8.12.14.1 N1EGS4......................................................................................................................................8-310
8.12.14.2 N3EGS4......................................................................................................................................8-311
8.12.14.3 N4EGS4......................................................................................................................................8-312
8.12.15.1 N1EGS4......................................................................................................................................8-313
8.12.15.2 N3EGS4......................................................................................................................................8-315
8.12.15.3 N4EGS4......................................................................................................................................8-316
8.12.16 Known Restrictions on the Board..................................................................................................8-317
xxx Huawei Proprietary and Confidential Issue 06 (2011-01-20)


8.13 EFF8..........................................................................................................................................................8-327
8.13.2 Application.......................................................................................................................................8-328
8.13.5 Front Panel....................................................................................................................................... 8-329
8.13.6 Valid Slots........................................................................................................................................8-331
8.14 EFF8A.......................................................................................................................................................8-333
8.14.2 Application.......................................................................................................................................8-333
8.14.5 Front Panel....................................................................................................................................... 8-334
8.14.6 Valid Slots........................................................................................................................................8-336
8.15 ETF8..........................................................................................................................................................8-337
8.15.2 Application.......................................................................................................................................8-338
8.15.5 Front Panel....................................................................................................................................... 8-339
8.15.6 Valid Slots........................................................................................................................................8-340
8.16 ETF8A.......................................................................................................................................................8-342
8.16.2 Application.......................................................................................................................................8-342
8.16.5 Front Panel....................................................................................................................................... 8-343
8.16.6 Valid Slots........................................................................................................................................8-345
8.17 ETS8..........................................................................................................................................................8-346
8.17.2 Application.......................................................................................................................................8-347
8.17.5 Front Panel....................................................................................................................................... 8-348
8.17.6 Valid Slots........................................................................................................................................8-349
9 ATM Boards................................................................................................................................9-1
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxxi

9.1 ADL4...............................................................................................................................................................9-2
9.1.2 Application.............................................................................................................................................9-3
9.1.5 Front Panel.............................................................................................................................................9-7
9.1.6 Jumpers and DIP Switches.....................................................................................................................9-9
9.1.7 Valid Slots..............................................................................................................................................9-9
9.1.8 Feature Code..........................................................................................................................................9-9
9.1.13 List of Alarms.....................................................................................................................................9-12
9.1.13.1 N1ADL4..........................................................................................................................................9-12
9.1.14.1 N1ADL4..........................................................................................................................................9-13
9.2 ADQ1............................................................................................................................................................9-15
9.2.2 Application...........................................................................................................................................9-16
9.2.5 Front Panel...........................................................................................................................................9-21
9.2.7 Valid Slots............................................................................................................................................9-23
9.2.8 Feature Code........................................................................................................................................9-23
9.2.13 List of Alarms.....................................................................................................................................9-26
9.2.13.1 N1ADQ1.........................................................................................................................................9-26
9.2.14.1 N1ADQ1.........................................................................................................................................9-27
9.3 IDL4..............................................................................................................................................................9-29
9.3.2 Application...........................................................................................................................................9-31
xxxii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


9.3.5 Front Panel...........................................................................................................................................9-35
9.3.7 Valid Slots............................................................................................................................................9-36
9.3.8 Feature Code........................................................................................................................................9-37
9.3.14 List of Alarms.....................................................................................................................................9-40
9.3.14.1 N1IDL4...........................................................................................................................................9-40
9.3.15.1 N1IDL4...........................................................................................................................................9-41
9.4 IDL4A...........................................................................................................................................................9-43
9.4.2 Application...........................................................................................................................................9-44
9.4.5 Front Panel...........................................................................................................................................9-49
9.4.6 Valid Slots............................................................................................................................................9-50
9.4.7 Feature Code........................................................................................................................................9-50
9.5 IDQ1..............................................................................................................................................................9-52
9.5.2 Application...........................................................................................................................................9-54
9.5.5 Front Panel...........................................................................................................................................9-58
9.5.7 Valid Slots............................................................................................................................................9-59
9.5.8 Feature Code........................................................................................................................................9-60
9.5.14 List of Alarms.....................................................................................................................................9-63
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxxiii

9.5.14.1 N1IDQ1...........................................................................................................................................9-63
9.5.15.1 N1IDQ1...........................................................................................................................................9-65
9.6 IDQ1A...........................................................................................................................................................9-67
9.6.2 Application...........................................................................................................................................9-68
9.6.5 Front Panel...........................................................................................................................................9-72
9.6.6 Valid Slots............................................................................................................................................9-74
9.6.7 Feature Code........................................................................................................................................9-74
10 RPR Boards..............................................................................................................................10-1
10.1 EGR2...........................................................................................................................................................10-2
10.1.2 Application.........................................................................................................................................10-3
10.1.5 Front Panel.......................................................................................................................................10-10
10.1.7 Valid Slots........................................................................................................................................10-12
10.1.8 Feature Code....................................................................................................................................10-12
10.1.13 List of Alarms.................................................................................................................................10-16
10.1.13.1 N2EGR2......................................................................................................................................10-16
10.1.14.1 N2EGR2......................................................................................................................................10-17
10.2 EMR0........................................................................................................................................................10-26
10.2.2 Application.......................................................................................................................................10-27
10.2.5 Front Panel.......................................................................................................................................10-34
xxxiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)


10.2.7 Valid Slots........................................................................................................................................10-36
10.2.8 Feature Code....................................................................................................................................10-37
10.2.13 List of Alarms.................................................................................................................................10-40
10.2.13.1 N2EMR0.....................................................................................................................................10-40
10.2.14.1 N2EMR0.....................................................................................................................................10-41
11 SAN Boards.............................................................................................................................11-1
11.1 MST4...........................................................................................................................................................11-2
11.1.2 Application.........................................................................................................................................11-3
11.1.5 Front Panel.........................................................................................................................................11-7
11.1.7 Valid Slots..........................................................................................................................................11-9
11.1.8 Feature Code......................................................................................................................................11-9
11.1.13 List of Alarms.................................................................................................................................11-12
11.1.13.1 N1MST4......................................................................................................................................11-12
11.1.14.1 N1MST4......................................................................................................................................11-13
12 Microwave Boards..................................................................................................................12-1
12.1 IFSD1..........................................................................................................................................................12-2
12.1.2 Application.........................................................................................................................................12-3
12.1.5 Front Panel.........................................................................................................................................12-6
12.1.7 Valid Slots..........................................................................................................................................12-9
12.1.8 Feature Code......................................................................................................................................12-9
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxxv


12.1.13 List of Alarms.................................................................................................................................12-13
12.1.13.1 N1IFSD1.....................................................................................................................................12-13
12.1.14.1 N1IFSD1.....................................................................................................................................12-14
12.2 RPWR........................................................................................................................................................12-16
12.2.2 Application.......................................................................................................................................12-17
12.2.5 Front Panel.......................................................................................................................................12-19
12.2.7 Valid Slots........................................................................................................................................12-21
12.2.8 Feature Code....................................................................................................................................12-21
12.2.11 List of Alarms.................................................................................................................................12-23
12.3 ODU..........................................................................................................................................................12-23
13 WDM Boards...........................................................................................................................13-1
13.1 CMR2..........................................................................................................................................................13-3
13.1.2 Application.........................................................................................................................................13-3
13.1.5 Front Panel.........................................................................................................................................13-6
13.1.6 Valid Slots..........................................................................................................................................13-7
13.1.7 Feature Code......................................................................................................................................13-7
13.2 CMR4..........................................................................................................................................................13-9
13.2.2 Application.........................................................................................................................................13-9
13.2.5 Front Panel.......................................................................................................................................13-12
13.2.6 Valid Slots........................................................................................................................................13-13
13.2.7 Feature Code....................................................................................................................................13-13
xxxvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)


13.3 MR2...........................................................................................................................................................13-15
13.3.2 Application.......................................................................................................................................13-16
13.3.5 Front Panel.......................................................................................................................................13-18
13.3.6 Valid Slots........................................................................................................................................13-20
13.3.7 Feature Code....................................................................................................................................13-20
13.4 MR2A........................................................................................................................................................13-22
13.4.2 Application.......................................................................................................................................13-22
13.4.5 Front Panel.......................................................................................................................................13-25
13.4.6 Valid Slots........................................................................................................................................13-27
13.5 MR2B........................................................................................................................................................13-28
13.5.2 Application.......................................................................................................................................13-28
13.5.5 Front Panel.......................................................................................................................................13-31
13.5.6 Valid Slots........................................................................................................................................13-32
13.6 MR2C........................................................................................................................................................13-33
13.6.2 Application.......................................................................................................................................13-34
13.6.5 Front Panel.......................................................................................................................................13-37
13.6.6 Valid Slots........................................................................................................................................13-38
13.7 MR4...........................................................................................................................................................13-39
13.7.2 Application.......................................................................................................................................13-40
13.7.5 Front Panel.......................................................................................................................................13-42
13.7.6 Valid Slots........................................................................................................................................13-43
13.7.7 Feature Code....................................................................................................................................13-43
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxxvii


13.8 LWX..........................................................................................................................................................13-45
13.8.2 Application.......................................................................................................................................13-46
13.8.5 Front Panel.......................................................................................................................................13-49
13.8.6 Valid Slots........................................................................................................................................13-51
13.8.7 Feature Code....................................................................................................................................13-51
13.9 FIB.............................................................................................................................................................13-55
13.9.2 Application.......................................................................................................................................13-55
13.9.5 Front Panel.......................................................................................................................................13-56
13.9.6 Valid Slots........................................................................................................................................13-58
14 Auxiliary Boards.....................................................................................................................14-1
14.1 SAP..............................................................................................................................................................14-2
14.1.2 Application.........................................................................................................................................14-3
14.1.5 Jumpers...............................................................................................................................................14-6
14.1.6 Front Panel.........................................................................................................................................14-7
14.1.7 Valid Slots..........................................................................................................................................14-9
14.2 SEI.............................................................................................................................................................14-10
14.2.2 Application.......................................................................................................................................14-10
14.2.5 Front Panel.......................................................................................................................................14-12
14.2.6 Valid Slots........................................................................................................................................14-19
14.3 FAN...........................................................................................................................................................14-19
14.3.2 Application.......................................................................................................................................14-20
xxxviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

14.3.5 Front Panel.......................................................................................................................................14-22

14.3.6 Valid Slots........................................................................................................................................14-22
15 Optical Amplifier Boards.....................................................................................................15-1

15.1 BA2.............................................................................................................................................................15-2
15.1.2 Application.........................................................................................................................................15-2
15.1.5 Front Panel.........................................................................................................................................15-5
15.1.6 Valid Slots..........................................................................................................................................15-8
15.1.7 Feature Code......................................................................................................................................15-8
15.2 BPA...........................................................................................................................................................15-10
15.2.2 Application.......................................................................................................................................15-11
15.2.5 Front Panel.......................................................................................................................................15-14
15.2.6 Valid Slots........................................................................................................................................15-15
15.2.7 Feature Code....................................................................................................................................15-15
15.3 COA..........................................................................................................................................................15-17
15.3.2 Application.......................................................................................................................................15-18
15.3.5 Front Panel.......................................................................................................................................15-23
15.3.6 Valid Slots........................................................................................................................................15-27
15.3.7 Feature Code....................................................................................................................................15-28
15.4 RPC01.......................................................................................................................................................15-30
15.4.2 Application.......................................................................................................................................15-30
15.4.5 Front Panel.......................................................................................................................................15-33
15.4.6 Valid Slots........................................................................................................................................15-34
15.4.8 Feature Code....................................................................................................................................15-35
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xxxix

15.5 RPC02.......................................................................................................................................................15-37
15.5.2 Application.......................................................................................................................................15-38
15.5.5 Front Panel.......................................................................................................................................15-40
15.5.6 Valid Slots........................................................................................................................................15-41
15.5.8 Feature Code....................................................................................................................................15-42
15.6 OBU1........................................................................................................................................................15-44
15.6.2 Application.......................................................................................................................................15-45
15.6.5 Front Panel.......................................................................................................................................15-47
15.6.6 Valid Slots........................................................................................................................................15-49
15.6.7 Feature Code....................................................................................................................................15-49
16 Power Boards...........................................................................................................................16-1
16.1 UPM............................................................................................................................................................16-2
16.1.2 Application.........................................................................................................................................16-2
16.1.5 Front Panel.........................................................................................................................................16-5
16.1.6 Valid Slots..........................................................................................................................................16-7
16.2 PIU..............................................................................................................................................................16-8
16.2.2 Application.........................................................................................................................................16-9
16.2.5 Front Panel.......................................................................................................................................16-11
16.2.6 Valid Slots........................................................................................................................................16-12
16.3 PIUA..........................................................................................................................................................16-13
16.3.2 Application.......................................................................................................................................16-13
xl Huawei Proprietary and Confidential Issue 06 (2011-01-20)


16.3.5 Front Panel.......................................................................................................................................16-15
16.3.6 Valid Slots........................................................................................................................................16-16
17 Pluggable Optical/Electrical Module................................................................................. 17-1

17.1 Overview.....................................................................................................................................................17-2
17.2 SFP/eSFP.....................................................................................................................................................17-3
17.3 XFP............................................................................................................................................................17-10
17.4 CWDM/DWDM........................................................................................................................................17-11
18 Cables....................................................................................................................................... 18-1
18.1 Fiber Jumper................................................................................................................................................18-2
18.1.1 Categories of the Fiber Jumpers.........................................................................................................18-2
18.1.2 Connector...........................................................................................................................................18-2
18.2 Power Cable and Grounding Cable.............................................................................................................18-5
18.2.1 Power Cable of the Cabinet................................................................................................................18-5
18.2.2 Grounding Cable of the Cabinet Door...............................................................................................18-8
18.2.3 Subrack Power Cable.........................................................................................................................18-9
18.2.4 COA Power Cable............................................................................................................................18-10
18.2.5 UPM Power Cable............................................................................................................................18-11
18.2.6 RPC Power Cable.............................................................................................................................18-12
18.3 Alarm Cable..............................................................................................................................................18-14
18.3.1 Cabinet Indicator Cable....................................................................................................................18-14
18.3.2 Indicator Cascading Cable Between Subracks or Alarm Cascading Cable Between the OptiX OSN
Equipment...................................................................................................................................................18-16
18.3.3 Alarm Cascading Cable Between the OptiX OSN Equipment and the Other Huawei Transmission
Equipment...................................................................................................................................................18-17
18.3.4 Alarm Input/Output Cable................................................................................................................18-19
18.4 Management Cable....................................................................................................................................18-20
18.4.1 OAM Serial Port Cable....................................................................................................................18-21
18.4.2 Serial 1 to 4/F1/F&f Serial Port Cable.............................................................................................18-22
18.4.3 RS-232/RS-422 Serial Port Cable....................................................................................................18-24
18.4.4 Ordinary Telephone Line.................................................................................................................18-25
18.4.5 COA Cascading Cable.....................................................................................................................18-26
18.4.6 Straight Through Cable....................................................................................................................18-27
18.4.7 Crossover Cable...............................................................................................................................18-29
18.5 Signal Cable..............................................................................................................................................18-30
18.5.1 75-ohm 8xE1 Cable..........................................................................................................................18-31
18.5.2 120-ohm 8xE1 Cable........................................................................................................................18-33
18.5.3 E3/T3/STM-1 Cable.........................................................................................................................18-35
18.5.4 Framed E1 Cable..............................................................................................................................18-37
18.5.5 Nx64 kbit/s Cable.............................................................................................................................18-37
18.6 Clock Cable...............................................................................................................................................18-55
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xli

18.6.1 Clock Cable......................................................................................................................................18-56

18.6.2 One-Channel Clock Transit Cable and Two-Channel Clock Transit Cable....................................18-58
19 Indicators.................................................................................................................................19-1
19.1 Indicators on the Cabinet.............................................................................................................................19-2
19.2 Alarm Indicators on the Boards..................................................................................................................19-2
20 Labels........................................................................................................................................20-1
20.1 Safety Labels...............................................................................................................................................20-2
20.1.1 Label Description...............................................................................................................................20-2
20.1.2 Label Position.....................................................................................................................................20-3
20.2 Engineering Labels......................................................................................................................................20-5
21 Board Information Quick Reference..................................................................................21-1

21.1 Compatibility of Board Versions with the Products...................................................................................21-2
21.2 Quick Reference Table for Optical Interfaces...........................................................................................21-10
21.3 Quick Reference of Board Functions........................................................................................................21-10
21.3.1 Information Quick Reference of SDH Boards.................................................................................21-10
21.3.2 Information Quick Reference of PDH Boards.................................................................................21-15
21.3.3 Information Quick Reference of Data Boards..................................................................................21-15
21.4 Loopback Capability of the Boards...........................................................................................................21-18
21.5 Protection Schemes Supported by Each Board.........................................................................................21-26
21.6 Power Consumption and Weight of Each Board......................................................................................21-33
22 Parameter Settings.................................................................................................................22-1
22.1 Data Boards.................................................................................................................................................22-2
22.1.1 SDH Parameters.................................................................................................................................22-2
22.1.2 Ethernet Parameters............................................................................................................................22-3
22.1.2.1 Basic Attributes...............................................................................................................................22-4
22.1.2.2 Flow Control...................................................................................................................................22-5
22.1.2.3 Network Attributes..........................................................................................................................22-6
22.1.2.4 Advanced Attributes........................................................................................................................22-8
22.1.2.5 TAG Attributes..............................................................................................................................22-11
22.1.2.6 Encapsulation/Mapping.................................................................................................................22-12
22.1.2.7 Bound Paths...................................................................................................................................22-14
22.1.3 ATM Parameters..............................................................................................................................22-15
22.2 SDH Processing Boards............................................................................................................................22-15
22.3 PDH Boards...............................................................................................................................................22-16
22.4 WDM Boards............................................................................................................................................22-18
22.5 Cross-Connect and Timing Units..............................................................................................................22-26
22.6 Optical Amplifier Boards..........................................................................................................................22-30
23 Task Collection.......................................................................................................................23-1
23.1 Querying the Protection Subnet..................................................................................................................23-3
23.2 Troubleshooting Service Unavailability......................................................................................................23-3
xlii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

23.3 Troubleshooting the Clock Tracing Failure................................................................................................23-4

23.4 Configuring the F&f Debugging Serial Port and OAM NM Port...............................................................23-5
23.5 Testing the Frequency Accuracy of the Free-Run Clock............................................................................23-6
23.6 Testing the Clock Holdover Accuracy........................................................................................................23-7
23.7 Checking Board Parameters........................................................................................................................23-8
23.8 Testing the SAN Service Channel.............................................................................................................23-12
A Glossary.....................................................................................................................................A-1
A.1 Numerics........................................................................................................................................................A-3
A.2 A....................................................................................................................................................................A-3
A.3 B....................................................................................................................................................................A-5
A.4 C....................................................................................................................................................................A-6
A.5 D....................................................................................................................................................................A-9
A.6 E...................................................................................................................................................................A-10
A.7 F...................................................................................................................................................................A-12
A.8 G..................................................................................................................................................................A-14
A.9 H..................................................................................................................................................................A-14
A.10 I..................................................................................................................................................................A-15
A.11 J..................................................................................................................................................................A-16
A.12 L.................................................................................................................................................................A-16
A.13 M................................................................................................................................................................A-18
A.14 N................................................................................................................................................................A-19
A.15 O................................................................................................................................................................A-20
A.16 P.................................................................................................................................................................A-21
A.17 Q................................................................................................................................................................A-23
A.18 R................................................................................................................................................................A-23
A.19 S.................................................................................................................................................................A-25
A.20 T.................................................................................................................................................................A-28
A.21 U................................................................................................................................................................A-29
A.22 V................................................................................................................................................................A-30
A.23 W...............................................................................................................................................................A-30
Contents
About This Document...................................................................................................................iii

1 Equipment Structure.................................................................................................................1-1
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xliii

2 Cabinet.........................................................................................................................................2-1
2.1 Types of Cabinets............................................................................................................................................2-2
2.2 Configuration of the Cabinet.........................................................................................................................2-10
2.2.1 Indicators..............................................................................................................................................2-11
2.2.2 DC Power Distribution Unit.................................................................................................................2-11
2.2.3 Other Configurations............................................................................................................................2-13
3 Subrack.........................................................................................................................................3-1
3.1 Structure..........................................................................................................................................................3-2
3.2 Slot Allocation.................................................................................................................................................3-3
3.3 Slot Access Capacity.......................................................................................................................................3-5
3.4 Ventilation Mode.............................................................................................................................................3-8
3.5 Cable Management..........................................................................................................................................3-9
3.6 Mapping Policies of Power Consumption.....................................................................................................3-11
4 Board List and Classification...................................................................................................4-1

4.1 Appearances and Dimensions of the Boards...................................................................................................4-2
4.2 Bar Codes of the Boards..................................................................................................................................4-3
4.3 Classification of the Boards............................................................................................................................4-4
5 Cross-Connect Boards and System Control Boards.............................................................5-1

5.1 CXL1...............................................................................................................................................................5-2
5.1.2 Application.............................................................................................................................................5-3
5.1.5 Front Panel...........................................................................................................................................5-12
5.1.7 Valid Slots............................................................................................................................................5-17
5.1.8 Feature Code........................................................................................................................................5-17
5.1.12 List of Alarms.....................................................................................................................................5-22
5.1.12.1 Q2CXL1..........................................................................................................................................5-22
5.1.12.2 Q3CXL1..........................................................................................................................................5-24
5.1.13.1 Q2CXL1..........................................................................................................................................5-26
5.1.13.2 Q3CXL1..........................................................................................................................................5-27
5.2 CXL4.............................................................................................................................................................5-29
xliv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

5.2.2 Application...........................................................................................................................................5-31
5.2.5 Front Panel........................................................................................................................................... 5-40
5.2.7 Valid Slots............................................................................................................................................5-45
5.2.8 Feature Code........................................................................................................................................ 5-45
5.2.12 List of Alarms.....................................................................................................................................5-50
5.2.12.1 Q2CXL4..........................................................................................................................................5-50
5.2.12.2 Q3CXL4..........................................................................................................................................5-52
5.2.13.1 Q2CXL4..........................................................................................................................................5-54
5.2.13.2 Q3CXL4..........................................................................................................................................5-55
5.3 CXL16...........................................................................................................................................................5-57
5.3.2 Application...........................................................................................................................................5-59
5.3.5 Front Panel........................................................................................................................................... 5-68
5.3.7 Valid Slots............................................................................................................................................5-73
5.3.8 Feature Code........................................................................................................................................ 5-73
5.3.12 List of Alarms.....................................................................................................................................5-78
5.3.12.1 Q2CXL16........................................................................................................................................5-78
5.3.12.2 Q3CXL16........................................................................................................................................5-80
5.3.13.1 Q2CXL16........................................................................................................................................5-82
5.3.13.2 Q3CXL16........................................................................................................................................5-83
5.4 CXLLN..........................................................................................................................................................5-86
5.4.2 Application...........................................................................................................................................5-87
5.4.5 Front Panel........................................................................................................................................... 5-95
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xlv


5.4.7 Valid Slots............................................................................................................................................5-98
5.4.8 Feature Code........................................................................................................................................5-98
5.4.12 List of Alarms...................................................................................................................................5-103
5.4.12.1 Q5CXLLN.....................................................................................................................................5-104
5.4.13.1 Q5CXLLN.....................................................................................................................................5-107
5.5 CXLQ41......................................................................................................................................................5-111
5.5.2 Application.........................................................................................................................................5-113
5.5.5 Front Panel.........................................................................................................................................5-121
5.5.7 Valid Slots..........................................................................................................................................5-124
5.5.8 Feature Code......................................................................................................................................5-124
5.5.12 List of Alarms...................................................................................................................................5-129
5.5.12.1 Q5CXLQ41...................................................................................................................................5-130
5.5.13.1 Q5CXLQ41...................................................................................................................................5-133
6 SDH Boards.................................................................................................................................6-1
6.1 SL1..................................................................................................................................................................6-3
6.1.2 Application.............................................................................................................................................6-4
6.1.5 Front Panel.............................................................................................................................................6-9
6.1.7 Valid Slots............................................................................................................................................6-11
6.1.8 Feature Code........................................................................................................................................6-11
6.1.12 List of Alarms.....................................................................................................................................6-14
xlvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

6.1.12.1 N1SL1.............................................................................................................................................6-15
6.1.12.2 N2SL1.............................................................................................................................................6-15
6.1.12.3 R1SL1..............................................................................................................................................6-17
6.1.13.1 N1SL1.............................................................................................................................................6-18
6.1.13.2 N2SL1.............................................................................................................................................6-18
6.1.13.3 R1SL1..............................................................................................................................................6-19
6.2 SL1A.............................................................................................................................................................6-21
6.2.2 Application...........................................................................................................................................6-22
6.2.5 Front Panel...........................................................................................................................................6-25
6.2.6 Valid Slots............................................................................................................................................6-27
6.2.7 Feature Code........................................................................................................................................6-27
6.3 SLQ1.............................................................................................................................................................6-29
6.3.2 Application...........................................................................................................................................6-30
6.3.5 Front Panel...........................................................................................................................................6-35
6.3.6 Valid Slots............................................................................................................................................6-36
6.3.7 Feature Code........................................................................................................................................6-37
6.4 SLQ1A..........................................................................................................................................................6-39
6.4.2 Application...........................................................................................................................................6-40
6.4.5 Front Panel...........................................................................................................................................6-44
6.4.6 Valid Slots............................................................................................................................................6-46
6.4.7 Feature Code........................................................................................................................................6-46
6.5 SLO1.............................................................................................................................................................6-48
6.5.2 Application...........................................................................................................................................6-49
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xlvii


6.5.5 Front Panel...........................................................................................................................................6-53
6.5.6 Valid Slots............................................................................................................................................6-55
6.5.7 Feature Code........................................................................................................................................6-55
6.6 SLT1..............................................................................................................................................................6-57
6.6.2 Application...........................................................................................................................................6-58
6.6.5 Front Panel...........................................................................................................................................6-62
6.6.6 Valid Slots............................................................................................................................................6-64
6.6.7 Feature Code........................................................................................................................................6-64
6.7 SEP1..............................................................................................................................................................6-66
6.7.2 Application...........................................................................................................................................6-67
6.7.5 Front Panel...........................................................................................................................................6-74
6.7.7 Valid Slots............................................................................................................................................6-75
6.7.9 Feature Code........................................................................................................................................6-77
6.7.13 List of Alarms.....................................................................................................................................6-81
6.7.13.1 N1SEP1...........................................................................................................................................6-81
6.7.14.1 N1SEP1...........................................................................................................................................6-82
6.8 SL4................................................................................................................................................................6-83
6.8.2 Application...........................................................................................................................................6-84
6.8.5 Front Panel...........................................................................................................................................6-89
6.8.6 Valid Slots............................................................................................................................................6-90
6.8.7 Feature Code........................................................................................................................................6-91
xlviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


6.9 SL4A.............................................................................................................................................................6-93
6.9.2 Application...........................................................................................................................................6-94
6.9.5 Front Panel...........................................................................................................................................6-98
6.9.6 Valid Slots............................................................................................................................................6-99
6.9.7 Feature Code........................................................................................................................................6-99
6.10 SLD4.........................................................................................................................................................6-101
6.10.2 Application.......................................................................................................................................6-102
6.10.5 Front Panel.......................................................................................................................................6-107
6.10.6 Valid Slots........................................................................................................................................6-108
6.10.7 Feature Code....................................................................................................................................6-109
6.11 SLD4A......................................................................................................................................................6-111
6.11.2 Application.......................................................................................................................................6-112
6.11.5 Front Panel.......................................................................................................................................6-117
6.11.6 Valid Slots........................................................................................................................................6-118
6.11.7 Feature Code....................................................................................................................................6-118
6.12 SLQ4.........................................................................................................................................................6-120
6.12.2 Application.......................................................................................................................................6-122
6.12.5 Front Panel.......................................................................................................................................6-126
6.12.6 Valid Slots........................................................................................................................................6-127
6.12.7 Feature Code....................................................................................................................................6-127
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xlix

6.13 SLQ4A......................................................................................................................................................6-129
6.13.2 Application.......................................................................................................................................6-130
6.13.5 Front Panel.......................................................................................................................................6-135
6.13.6 Valid Slots........................................................................................................................................6-136
6.13.7 Feature Code....................................................................................................................................6-136
6.14 SL16..........................................................................................................................................................6-138
6.14.2 Application.......................................................................................................................................6-140
6.14.5 Front Panel.......................................................................................................................................6-144
6.14.6 Valid Slots........................................................................................................................................6-146
6.14.7 Feature Code....................................................................................................................................6-146
6.15 SL16A.......................................................................................................................................................6-149
6.15.2 Application.......................................................................................................................................6-151
6.15.5 Front Panel.......................................................................................................................................6-155
6.15.7 Valid Slots........................................................................................................................................6-157
6.15.8 Feature Code....................................................................................................................................6-157
6.15.12 List of Alarms.................................................................................................................................6-161
6.15.12.1 N1SL16A....................................................................................................................................6-161
6.15.12.2 N2SL16A....................................................................................................................................6-162
6.15.12.3 N3SL16A....................................................................................................................................6-163
6.15.13.1 N1SL16A....................................................................................................................................6-165
6.15.13.2 N2SL16A....................................................................................................................................6-165
6.15.13.3 N3SL16A....................................................................................................................................6-166
6.16 SF16..........................................................................................................................................................6-168
l Huawei Proprietary and Confidential Issue 06 (2011-01-20)


6.16.2 Application.......................................................................................................................................6-169
6.16.5 Front Panel.......................................................................................................................................6-173
6.16.6 Valid Slots........................................................................................................................................6-175
6.16.7 Feature Code....................................................................................................................................6-175
6.17 SLQ41.......................................................................................................................................................6-178
6.17.2 Application.......................................................................................................................................6-179
6.17.5 Front Panel.......................................................................................................................................6-183
6.17.7 Valid Slots........................................................................................................................................6-185
6.17.8 Feature Code....................................................................................................................................6-185
6.17.12 List of Alarms.................................................................................................................................6-189
6.17.12.1 N3SLQ41....................................................................................................................................6-189
6.17.13.1 N3SLQ41....................................................................................................................................6-191
6.18 EU04..........................................................................................................................................................6-193
6.18.2 Application.......................................................................................................................................6-194
6.18.5 Front Panel.......................................................................................................................................6-195
6.18.6 Valid Slots........................................................................................................................................6-197
6.19 EU08..........................................................................................................................................................6-198
6.19.2 Application.......................................................................................................................................6-198
6.19.5 Front Panel.......................................................................................................................................6-199
6.19.6 Valid Slots........................................................................................................................................6-201
Issue 06 (2011-01-20) Huawei Proprietary and Confidential li

6.20 OU08.........................................................................................................................................................6-202
6.20.2 Application.......................................................................................................................................6-203
6.20.5 Front Panel.......................................................................................................................................6-204
6.20.6 Valid Slots........................................................................................................................................6-207
7 PDH Boards.................................................................................................................................7-1
7.1 PD1..................................................................................................................................................................7-3
7.1.2 Application.............................................................................................................................................7-4
7.1.5 Front Panel.............................................................................................................................................7-8
7.1.6 Valid Slots..............................................................................................................................................7-9
7.1.7 Feature Code........................................................................................................................................7-10
7.2 PQ1................................................................................................................................................................7-13
7.2.2 Application...........................................................................................................................................7-15
7.2.5 Front Panel...........................................................................................................................................7-19
7.2.7 Valid Slots............................................................................................................................................7-20
7.2.8 Feature Code........................................................................................................................................7-21
7.2.13 List of Alarms.....................................................................................................................................7-25
7.2.13.1 N1PQ1.............................................................................................................................................7-25
7.2.13.2 N2PQ1.............................................................................................................................................7-26
7.2.14.1 N1PQ1.............................................................................................................................................7-26
7.2.14.2 N2PQ1.............................................................................................................................................7-26
7.3 PQM..............................................................................................................................................................7-27
lii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


7.3.2 Application...........................................................................................................................................7-29
7.3.5 Front Panel...........................................................................................................................................7-33
7.3.7 Valid Slots............................................................................................................................................7-34
7.3.8 Feature Code........................................................................................................................................7-34
7.3.13 List of Alarms.....................................................................................................................................7-39
7.3.13.1 N1PQM...........................................................................................................................................7-39
7.3.14.1 N1PQM...........................................................................................................................................7-40
7.4 PL3................................................................................................................................................................7-41
7.4.2 Application...........................................................................................................................................7-42
7.4.5 Front Panel...........................................................................................................................................7-46
7.4.7 Valid Slots............................................................................................................................................7-48
7.4.8 Feature Code........................................................................................................................................7-48
7.4.13 List of Alarms.....................................................................................................................................7-53
7.4.13.1 N1PL3.............................................................................................................................................7-53
7.4.13.2 N2PL3.............................................................................................................................................7-54
7.4.14.1 N1PL3.............................................................................................................................................7-54
7.4.14.2 N2PL3.............................................................................................................................................7-55
7.5 PL3A.............................................................................................................................................................7-56
7.5.2 Application...........................................................................................................................................7-57
Issue 06 (2011-01-20) Huawei Proprietary and Confidential liii


7.5.5 Front Panel...........................................................................................................................................7-61
7.5.7 Valid Slots............................................................................................................................................7-63
7.5.8 Feature Code........................................................................................................................................7-63
7.5.12 List of Alarms.....................................................................................................................................7-65
7.5.12.1 N1PL3A..........................................................................................................................................7-66
7.5.12.2 N2PL3A..........................................................................................................................................7-66
7.5.13.1 N1PL3A..........................................................................................................................................7-67
7.5.13.2 N2PL3A..........................................................................................................................................7-67
7.6 PD3................................................................................................................................................................7-69
7.6.2 Application...........................................................................................................................................7-70
7.6.5 Front Panel...........................................................................................................................................7-74
7.6.6 Valid Slots............................................................................................................................................7-75
7.7 PQ3................................................................................................................................................................7-78
7.7.2 Application...........................................................................................................................................7-79
7.7.5 Front Panel...........................................................................................................................................7-83
7.7.6 Valid Slots............................................................................................................................................7-84
7.8 DX1...............................................................................................................................................................7-87
7.8.2 Application...........................................................................................................................................7-88
liv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

7.8.5 Front Panel...........................................................................................................................................7-91

7.8.7 Valid Slots............................................................................................................................................7-93
7.8.8 Feature Code........................................................................................................................................7-93
7.8.13 List of Alarms.....................................................................................................................................7-98
7.8.13.1 N1DX1............................................................................................................................................7-98
7.8.14.1 N1DX1............................................................................................................................................7-99
7.9 DXA............................................................................................................................................................7-100
7.9.2 Application.........................................................................................................................................7-100
7.9.5 Front Panel.........................................................................................................................................7-102
7.9.6 Valid Slots..........................................................................................................................................7-104
7.10 SPQ4..........................................................................................................................................................7-104
7.10.2 Application.......................................................................................................................................7-106
7.10.5 Front Panel.......................................................................................................................................7-111
7.10.7 Valid Slots........................................................................................................................................7-113
7.10.8 Feature Code....................................................................................................................................7-113
7.10.13 List of Alarms.................................................................................................................................7-118
7.10.13.1 N1SPQ4.......................................................................................................................................7-118
7.10.13.2 N2SPQ4.......................................................................................................................................7-119
7.10.14.1 N1SPQ4.......................................................................................................................................7-120
7.10.14.2 N2SPQ4.......................................................................................................................................7-120
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lv

7.11 D12B.........................................................................................................................................................7-121
7.11.2 Application.......................................................................................................................................7-122
7.11.5 Front Panel.......................................................................................................................................7-122
7.11.6 Valid Slots........................................................................................................................................7-125
7.12 D12S..........................................................................................................................................................7-126
7.12.2 Application.......................................................................................................................................7-127
7.12.5 Front Panel.......................................................................................................................................7-128
7.12.6 Valid Slots........................................................................................................................................7-130
7.13 D75S..........................................................................................................................................................7-132
7.13.2 Application.......................................................................................................................................7-133
7.13.5 Front Panel.......................................................................................................................................7-134
7.13.6 Valid Slots........................................................................................................................................7-136
7.14 D34S..........................................................................................................................................................7-137
7.14.2 Application.......................................................................................................................................7-138
7.14.5 Front Panel.......................................................................................................................................7-139
7.14.6 Valid Slots........................................................................................................................................7-140
7.15 C34S..........................................................................................................................................................7-141
7.15.2 Application.......................................................................................................................................7-142
7.15.5 Front Panel.......................................................................................................................................7-143
7.15.6 Valid Slots........................................................................................................................................7-144
7.16 MU04........................................................................................................................................................7-145
lvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

7.16.2 Application.......................................................................................................................................7-146
7.16.5 Front Panel.......................................................................................................................................7-147
7.16.6 Valid Slots........................................................................................................................................7-149
7.17 DM12........................................................................................................................................................7-150
7.17.2 Application.......................................................................................................................................7-151
7.17.5 Front Panel.......................................................................................................................................7-152
7.17.6 Valid Slots........................................................................................................................................7-154
7.18 TSB4..........................................................................................................................................................7-156
7.18.2 Application.......................................................................................................................................7-156
7.18.5 Front Panel.......................................................................................................................................7-157
7.18.6 Valid Slots........................................................................................................................................7-158
7.19 TSB8..........................................................................................................................................................7-159
7.19.2 Application.......................................................................................................................................7-160
7.19.5 Front Panel.......................................................................................................................................7-161
7.19.6 Valid Slots........................................................................................................................................7-162
8 EoS/EoP Boards...........................................................................................................................8-1
8.1 EFT4................................................................................................................................................................8-3
8.1.2 Application.............................................................................................................................................8-4
8.1.5 Front Panel.............................................................................................................................................8-8
8.1.7 Valid Slots............................................................................................................................................8-10
8.1.8 Feature Code........................................................................................................................................8-10
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lvii


8.1.13 List of Alarms.....................................................................................................................................8-14
8.1.13.1 R1EFT4...........................................................................................................................................8-14
8.1.14.1 R1EFT4...........................................................................................................................................8-15
8.2 EFT8..............................................................................................................................................................8-21
8.2.2 Application...........................................................................................................................................8-22
8.2.5 Front Panel...........................................................................................................................................8-28
8.2.7 Valid Slots............................................................................................................................................8-30
8.2.8 Feature Code........................................................................................................................................8-30
8.2.13 List of Alarms.....................................................................................................................................8-33
8.2.13.1 N1EFT8...........................................................................................................................................8-33
8.2.13.2 N2EFT8...........................................................................................................................................8-34
8.2.14.1 N1EFT8...........................................................................................................................................8-35
8.2.14.2 N2EFT8...........................................................................................................................................8-37
8.3 EFT8A...........................................................................................................................................................8-42
8.3.2 Application...........................................................................................................................................8-44
8.3.5 Front Panel...........................................................................................................................................8-49
8.3.7 Valid Slots............................................................................................................................................8-52
8.3.8 Feature Code........................................................................................................................................8-52
lviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

8.3.13 List of Alarms.....................................................................................................................................8-55

8.3.13.1 N1EFT8A........................................................................................................................................8-55
8.3.13.2 N2EFT8A........................................................................................................................................8-56
8.3.14.1 N1EFT8A........................................................................................................................................8-57
8.3.14.2 N2EFT8A........................................................................................................................................8-58
8.4 EGT2.............................................................................................................................................................8-64
8.4.2 Application...........................................................................................................................................8-66
8.4.5 Front Panel...........................................................................................................................................8-71
8.4.7 Valid Slots............................................................................................................................................8-75
8.4.8 Feature Code........................................................................................................................................8-75
8.4.13 List of Alarms.....................................................................................................................................8-78
8.4.13.1 N1EGT2..........................................................................................................................................8-78
8.4.13.2 N2EGT2..........................................................................................................................................8-79
8.4.14.1 N1EGT2..........................................................................................................................................8-80
8.4.14.2 N2EGT2..........................................................................................................................................8-81
8.5 EFS0..............................................................................................................................................................8-92
8.5.2 Application...........................................................................................................................................8-94
8.5.5 Front Panel.........................................................................................................................................8-102
8.5.7 Valid Slots..........................................................................................................................................8-103
8.5.8 Feature Code......................................................................................................................................8-104
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lix


8.5.14 List of Alarms...................................................................................................................................8-108
8.5.14.1 N1EFS0.........................................................................................................................................8-108
8.5.14.2 N2EFS0.........................................................................................................................................8-109
8.5.14.3 N4EFS0.........................................................................................................................................8-109
8.5.14.4 N5EFS0.........................................................................................................................................8-110
8.5.15.1 N1EFS0.........................................................................................................................................8-111
8.5.15.2 N2EFS0.........................................................................................................................................8-113
8.5.15.3 N4EFS0.........................................................................................................................................8-114
8.5.15.4 N5EFS0.........................................................................................................................................8-116
8.6 EFS0A.........................................................................................................................................................8-126
8.6.2 Application.........................................................................................................................................8-127
8.6.5 Front Panel.........................................................................................................................................8-134
8.6.7 Valid Slots..........................................................................................................................................8-136
8.6.8 Feature Code......................................................................................................................................8-136
8.6.14 List of Alarms...................................................................................................................................8-141
8.6.14.1 N1EFS0A......................................................................................................................................8-141
8.6.15.1 N1EFS0A......................................................................................................................................8-142
8.7 EFS4............................................................................................................................................................8-148
8.7.2 Application.........................................................................................................................................8-150
8.7.5 Front Panel.........................................................................................................................................8-156
8.7.7 Valid Slots..........................................................................................................................................8-159
8.7.8 Feature Code......................................................................................................................................8-159
lx Huawei Proprietary and Confidential Issue 06 (2011-01-20)


8.7.13 List of Alarms...................................................................................................................................8-162
8.7.13.1 N1EFS4.........................................................................................................................................8-162
8.7.13.2 N2EFS4.........................................................................................................................................8-163
8.7.13.3 N3EFS4.........................................................................................................................................8-164
8.7.14.1 N1EFS4.........................................................................................................................................8-165
8.7.14.2 N2EFS4.........................................................................................................................................8-166
8.7.14.3 N3EFS4.........................................................................................................................................8-168
8.8 EFP0............................................................................................................................................................8-178
8.8.2 Application.........................................................................................................................................8-179
8.8.5 Front Panel.........................................................................................................................................8-185
8.8.7 Valid Slots..........................................................................................................................................8-187
8.8.8 Feature Code......................................................................................................................................8-187
8.8.13 List of Alarms...................................................................................................................................8-190
8.8.13.1 N1EFP0.........................................................................................................................................8-191
8.8.14.1 N1EFP0.........................................................................................................................................8-192
8.9 EGS2...........................................................................................................................................................8-198
8.9.2 Application.........................................................................................................................................8-200
8.9.5 Front Panel.........................................................................................................................................8-207
8.9.7 Valid Slots..........................................................................................................................................8-210
8.9.8 Feature Code......................................................................................................................................8-210
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lxi


8.9.13 List of Alarms...................................................................................................................................8-214
8.9.13.1 N2EGS2........................................................................................................................................8-214
8.9.13.2 N3EGS2........................................................................................................................................8-215
8.9.14.1 N2EGS2........................................................................................................................................8-216
8.9.14.2 N3EGS2........................................................................................................................................8-217
8.10 EMS2.........................................................................................................................................................8-228
8.10.2 Application.......................................................................................................................................8-229
8.10.5 Front Panel.......................................................................................................................................8-236
8.10.7 Valid Slots........................................................................................................................................8-240
8.10.8 Feature Code....................................................................................................................................8-240
8.10.13 List of Alarms.................................................................................................................................8-244
8.10.13.1 N1EMS2......................................................................................................................................8-244
8.10.14.1 N1EMS2......................................................................................................................................8-246
8.11 EMS4.........................................................................................................................................................8-256
8.11.2 Application.......................................................................................................................................8-257
8.11.5 Front Panel.......................................................................................................................................8-264
8.11.7 Valid Slots........................................................................................................................................8-268
8.11.8 Feature Code....................................................................................................................................8-269
lxii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


8.11.14 List of Alarms.................................................................................................................................8-277
8.11.14.1 N1EMS4......................................................................................................................................8-277
8.11.15.1 N1EMS4......................................................................................................................................8-278
8.12 EGS4.........................................................................................................................................................8-288
8.12.2 Application.......................................................................................................................................8-290
8.12.5 Front Panel.......................................................................................................................................8-298
8.12.7 Valid Slots........................................................................................................................................8-301
8.12.8 Feature Code....................................................................................................................................8-301
8.12.14 List of Alarms.................................................................................................................................8-310
8.12.14.1 N1EGS4......................................................................................................................................8-310
8.12.14.2 N3EGS4......................................................................................................................................8-311
8.12.14.3 N4EGS4......................................................................................................................................8-312
8.12.15.1 N1EGS4......................................................................................................................................8-313
8.12.15.2 N3EGS4......................................................................................................................................8-315
8.12.15.3 N4EGS4......................................................................................................................................8-316
8.13 EFF8..........................................................................................................................................................8-327
8.13.2 Application.......................................................................................................................................8-328
8.13.5 Front Panel.......................................................................................................................................8-329
8.13.6 Valid Slots........................................................................................................................................8-331
8.14 EFF8A.......................................................................................................................................................8-333
8.14.2 Application.......................................................................................................................................8-333
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lxiii


8.14.5 Front Panel.......................................................................................................................................8-334
8.14.6 Valid Slots........................................................................................................................................8-336
8.15 ETF8..........................................................................................................................................................8-337
8.15.2 Application.......................................................................................................................................8-338
8.15.5 Front Panel.......................................................................................................................................8-339
8.15.6 Valid Slots........................................................................................................................................8-340
8.16 ETF8A.......................................................................................................................................................8-342
8.16.2 Application.......................................................................................................................................8-342
8.16.5 Front Panel.......................................................................................................................................8-343
8.16.6 Valid Slots........................................................................................................................................8-345
8.17 ETS8..........................................................................................................................................................8-346
8.17.2 Application.......................................................................................................................................8-347
8.17.5 Front Panel.......................................................................................................................................8-348
8.17.6 Valid Slots........................................................................................................................................8-349
9 ATM Boards................................................................................................................................9-1
9.1 ADL4...............................................................................................................................................................9-2
9.1.2 Application.............................................................................................................................................9-3
9.1.5 Front Panel.............................................................................................................................................9-7
9.1.6 Jumpers and DIP Switches.....................................................................................................................9-9
9.1.7 Valid Slots..............................................................................................................................................9-9
9.1.8 Feature Code..........................................................................................................................................9-9
lxiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)


9.1.13 List of Alarms.....................................................................................................................................9-12
9.1.13.1 N1ADL4..........................................................................................................................................9-12
9.1.14.1 N1ADL4..........................................................................................................................................9-13
9.2 ADQ1............................................................................................................................................................9-15
9.2.2 Application...........................................................................................................................................9-16
9.2.5 Front Panel........................................................................................................................................... 9-21
9.2.7 Valid Slots............................................................................................................................................9-23
9.2.8 Feature Code........................................................................................................................................ 9-23
9.2.13 List of Alarms.....................................................................................................................................9-26
9.2.13.1 N1ADQ1......................................................................................................................................... 9-26
9.2.14.1 N1ADQ1......................................................................................................................................... 9-27
9.3 IDL4..............................................................................................................................................................9-29
9.3.2 Application...........................................................................................................................................9-31
9.3.5 Front Panel........................................................................................................................................... 9-35
9.3.7 Valid Slots............................................................................................................................................9-36
9.3.8 Feature Code........................................................................................................................................ 9-37
9.3.14 List of Alarms.....................................................................................................................................9-40
9.3.14.1 N1IDL4........................................................................................................................................... 9-40
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lxv


9.3.15.1 N1IDL4...........................................................................................................................................9-41
9.4 IDL4A...........................................................................................................................................................9-43
9.4.2 Application...........................................................................................................................................9-44
9.4.5 Front Panel...........................................................................................................................................9-49
9.4.6 Valid Slots............................................................................................................................................9-50
9.4.7 Feature Code........................................................................................................................................9-50
9.5 IDQ1..............................................................................................................................................................9-52
9.5.2 Application...........................................................................................................................................9-54
9.5.5 Front Panel...........................................................................................................................................9-58
9.5.7 Valid Slots............................................................................................................................................9-59
9.5.8 Feature Code........................................................................................................................................9-60
9.5.14 List of Alarms.....................................................................................................................................9-63
9.5.14.1 N1IDQ1...........................................................................................................................................9-63
9.5.15.1 N1IDQ1...........................................................................................................................................9-65
9.6 IDQ1A...........................................................................................................................................................9-67
9.6.2 Application...........................................................................................................................................9-68
9.6.5 Front Panel...........................................................................................................................................9-72
9.6.6 Valid Slots............................................................................................................................................9-74
lxvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

9.6.7 Feature Code........................................................................................................................................9-74

10 RPR Boards..............................................................................................................................10-1
10.1 EGR2...........................................................................................................................................................10-2
10.1.2 Application.........................................................................................................................................10-3
10.1.5 Front Panel.......................................................................................................................................10-10
10.1.7 Valid Slots........................................................................................................................................10-12
10.1.8 Feature Code....................................................................................................................................10-12
10.1.13 List of Alarms.................................................................................................................................10-16
10.1.13.1 N2EGR2......................................................................................................................................10-16
10.1.14.1 N2EGR2......................................................................................................................................10-17
10.2 EMR0........................................................................................................................................................10-26
10.2.2 Application.......................................................................................................................................10-27
10.2.5 Front Panel.......................................................................................................................................10-34
10.2.7 Valid Slots........................................................................................................................................10-36
10.2.8 Feature Code....................................................................................................................................10-37
10.2.13 List of Alarms.................................................................................................................................10-40
10.2.13.1 N2EMR0.....................................................................................................................................10-40
10.2.14.1 N2EMR0.....................................................................................................................................10-41
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lxvii

11 SAN Boards.............................................................................................................................11-1
11.1 MST4...........................................................................................................................................................11-2
11.1.2 Application.........................................................................................................................................11-3
11.1.5 Front Panel.........................................................................................................................................11-7
11.1.7 Valid Slots..........................................................................................................................................11-9
11.1.8 Feature Code......................................................................................................................................11-9
11.1.13 List of Alarms.................................................................................................................................11-12
11.1.13.1 N1MST4......................................................................................................................................11-12
11.1.14.1 N1MST4......................................................................................................................................11-13
12 Microwave Boards..................................................................................................................12-1
12.1 IFSD1..........................................................................................................................................................12-2
12.1.2 Application.........................................................................................................................................12-3
12.1.5 Front Panel.........................................................................................................................................12-6
12.1.7 Valid Slots..........................................................................................................................................12-9
12.1.8 Feature Code......................................................................................................................................12-9
12.1.13 List of Alarms.................................................................................................................................12-13
12.1.13.1 N1IFSD1.....................................................................................................................................12-13
12.1.14.1 N1IFSD1.....................................................................................................................................12-14
12.2 RPWR........................................................................................................................................................12-16
12.2.2 Application.......................................................................................................................................12-17
lxviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


12.2.5 Front Panel.......................................................................................................................................12-19
12.2.7 Valid Slots........................................................................................................................................12-21
12.2.8 Feature Code....................................................................................................................................12-21
12.2.11 List of Alarms.................................................................................................................................12-23
12.3 ODU..........................................................................................................................................................12-23
13 WDM Boards...........................................................................................................................13-1
13.1 CMR2..........................................................................................................................................................13-3
13.1.2 Application.........................................................................................................................................13-3
13.1.5 Front Panel.........................................................................................................................................13-6
13.1.6 Valid Slots..........................................................................................................................................13-7
13.1.7 Feature Code......................................................................................................................................13-7
13.2 CMR4..........................................................................................................................................................13-9
13.2.2 Application.........................................................................................................................................13-9
13.2.5 Front Panel.......................................................................................................................................13-12
13.2.6 Valid Slots........................................................................................................................................13-13
13.2.7 Feature Code....................................................................................................................................13-13
13.3 MR2...........................................................................................................................................................13-15
13.3.2 Application.......................................................................................................................................13-16
13.3.5 Front Panel.......................................................................................................................................13-18
13.3.6 Valid Slots........................................................................................................................................13-20
13.3.7 Feature Code....................................................................................................................................13-20
13.4 MR2A........................................................................................................................................................13-22
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lxix

13.4.2 Application.......................................................................................................................................13-22
13.4.5 Front Panel.......................................................................................................................................13-25
13.4.6 Valid Slots........................................................................................................................................13-27
13.5 MR2B........................................................................................................................................................13-28
13.5.2 Application.......................................................................................................................................13-28
13.5.5 Front Panel.......................................................................................................................................13-31
13.5.6 Valid Slots........................................................................................................................................13-32
13.6 MR2C........................................................................................................................................................13-33
13.6.2 Application.......................................................................................................................................13-34
13.6.5 Front Panel.......................................................................................................................................13-37
13.6.6 Valid Slots........................................................................................................................................13-38
13.7 MR4...........................................................................................................................................................13-39
13.7.2 Application.......................................................................................................................................13-40
13.7.5 Front Panel.......................................................................................................................................13-42
13.7.6 Valid Slots........................................................................................................................................13-43
13.7.7 Feature Code....................................................................................................................................13-43
13.8 LWX..........................................................................................................................................................13-45
13.8.2 Application.......................................................................................................................................13-46
13.8.5 Front Panel.......................................................................................................................................13-49
13.8.6 Valid Slots........................................................................................................................................13-51
13.8.7 Feature Code....................................................................................................................................13-51
13.9 FIB.............................................................................................................................................................13-55
lxx Huawei Proprietary and Confidential Issue 06 (2011-01-20)


13.9.2 Application.......................................................................................................................................13-55
13.9.5 Front Panel.......................................................................................................................................13-56
13.9.6 Valid Slots........................................................................................................................................13-58
14 Auxiliary Boards.....................................................................................................................14-1
14.1 SAP..............................................................................................................................................................14-2
14.1.2 Application.........................................................................................................................................14-3
14.1.5 Jumpers...............................................................................................................................................14-6
14.1.6 Front Panel.........................................................................................................................................14-7
14.1.7 Valid Slots..........................................................................................................................................14-9
14.2 SEI.............................................................................................................................................................14-10
14.2.2 Application.......................................................................................................................................14-10
14.2.5 Front Panel.......................................................................................................................................14-12
14.2.6 Valid Slots........................................................................................................................................14-19
14.3 FAN...........................................................................................................................................................14-19
14.3.2 Application.......................................................................................................................................14-20
14.3.5 Front Panel.......................................................................................................................................14-22
14.3.6 Valid Slots........................................................................................................................................14-22
15 Optical Amplifier Boards.....................................................................................................15-1

15.1 BA2.............................................................................................................................................................15-2
15.1.2 Application.........................................................................................................................................15-2
15.1.5 Front Panel.........................................................................................................................................15-5
15.1.6 Valid Slots..........................................................................................................................................15-8
15.1.7 Feature Code......................................................................................................................................15-8
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lxxi


15.2 BPA...........................................................................................................................................................15-10
15.2.2 Application.......................................................................................................................................15-11
15.2.5 Front Panel.......................................................................................................................................15-14
15.2.6 Valid Slots........................................................................................................................................15-15
15.2.7 Feature Code....................................................................................................................................15-15
15.3 COA..........................................................................................................................................................15-17
15.3.2 Application.......................................................................................................................................15-18
15.3.5 Front Panel.......................................................................................................................................15-23
15.3.6 Valid Slots........................................................................................................................................15-27
15.3.7 Feature Code....................................................................................................................................15-28
15.4 RPC01.......................................................................................................................................................15-30
15.4.2 Application.......................................................................................................................................15-30
15.4.5 Front Panel.......................................................................................................................................15-33
15.4.6 Valid Slots........................................................................................................................................15-34
15.4.8 Feature Code....................................................................................................................................15-35
15.5 RPC02.......................................................................................................................................................15-37
15.5.2 Application.......................................................................................................................................15-38
15.5.5 Front Panel.......................................................................................................................................15-40
15.5.6 Valid Slots........................................................................................................................................15-41
15.5.8 Feature Code....................................................................................................................................15-42
15.6 OBU1........................................................................................................................................................15-44
lxxii Huawei Proprietary and Confidential Issue 06 (2011-01-20)


15.6.2 Application.......................................................................................................................................15-45
15.6.5 Front Panel.......................................................................................................................................15-47
15.6.6 Valid Slots........................................................................................................................................15-49
15.6.7 Feature Code....................................................................................................................................15-49
16 Power Boards...........................................................................................................................16-1
16.1 UPM............................................................................................................................................................16-2
16.1.2 Application.........................................................................................................................................16-2
16.1.5 Front Panel.........................................................................................................................................16-5
16.1.6 Valid Slots..........................................................................................................................................16-7
16.2 PIU..............................................................................................................................................................16-8
16.2.2 Application.........................................................................................................................................16-9
16.2.5 Front Panel.......................................................................................................................................16-11
16.2.6 Valid Slots........................................................................................................................................16-12
16.3 PIUA..........................................................................................................................................................16-13
16.3.2 Application.......................................................................................................................................16-13
16.3.5 Front Panel.......................................................................................................................................16-15
16.3.6 Valid Slots........................................................................................................................................16-16
17 Pluggable Optical/Electrical Module.................................................................................17-1

17.1 Overview.....................................................................................................................................................17-2
17.2 SFP/eSFP.....................................................................................................................................................17-3
17.3 XFP............................................................................................................................................................17-10
17.4 CWDM/DWDM........................................................................................................................................17-11
18 Cables.......................................................................................................................................18-1
18.1 Fiber Jumper................................................................................................................................................18-2
Issue 06 (2011-01-20) Huawei Proprietary and Confidential lxxiii

18.1.1 Categories of the Fiber Jumpers.........................................................................................................18-2

18.1.2 Connector...........................................................................................................................................18-2
18.2 Power Cable and Grounding Cable.............................................................................................................18-5
18.2.1 Power Cable of the Cabinet................................................................................................................18-5
18.2.2 Grounding Cable of the Cabinet Door...............................................................................................18-8
18.2.3 Subrack Power Cable.........................................................................................................................18-9
18.2.4 COA Power Cable............................................................................................................................18-10
18.2.5 UPM Power Cable............................................................................................................................18-11
18.2.6 RPC Power Cable.............................................................................................................................18-12
18.3 Alarm Cable..............................................................................................................................................18-14
18.3.1 Cabinet Indicator Cable....................................................................................................................18-14
18.3.2 Indicator Cascading Cable Between Subracks or Alarm Cascading Cable Between the OptiX OSN
Equipment...................................................................................................................................................18-16
18.3.3 Alarm Cascading Cable Between the OptiX OSN Equipment and the Other Huawei Transmission
Equipment...................................................................................................................................................18-17
18.3.4 Alarm Input/Output Cable................................................................................................................18-19
18.4 Management Cable....................................................................................................................................18-20
18.4.1 OAM Serial Port Cable....................................................................................................................18-21
18.4.2 Serial 1 to 4/F1/F&f Serial Port Cable.............................................................................................18-22
18.4.3 RS-232/RS-422 Serial Port Cable....................................................................................................18-24
18.4.4 Ordinary Telephone Line.................................................................................................................18-25
18.4.5 COA Cascading Cable.....................................................................................................................18-26
18.4.6 Straight Through Cable....................................................................................................................18-27
18.4.7 Crossover Cable...............................................................................................................................18-29
18.5 Signal Cable..............................................................................................................................................18-30
18.5.1 75-ohm 8xE1 Cable..........................................................................................................................18-31
18.5.2 120-ohm 8xE1 Cable........................................................................................................................18-33
18.5.3 E3/T3/STM-1 Cable.........................................................................................................................18-35
18.5.4 Framed E1 Cable..............................................................................................................................18-37
18.5.5 Nx64 kbit/s Cable.............................................................................................................................18-37
18.6 Clock Cable...............................................................................................................................................18-55
18.6.1 Clock Cable......................................................................................................................................18-56
18.6.2 One-Channel Clock Transit Cable and Two-Channel Clock Transit Cable....................................18-58
19 Indicators.................................................................................................................................19-1
19.1 Indicators on the Cabinet.............................................................................................................................19-2
19.2 Alarm Indicators on the Boards..................................................................................................................19-2
20 Labels........................................................................................................................................20-1
20.1 Safety Labels...............................................................................................................................................20-2
20.1.1 Label Description...............................................................................................................................20-2
20.1.2 Label Position.....................................................................................................................................20-3
20.2 Engineering Labels......................................................................................................................................20-5
21 Board Information Quick Reference..................................................................................21-1
lxxiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

21.1 Compatibility of Board Versions with the Products...................................................................................21-2

21.2 Quick Reference Table for Optical Interfaces...........................................................................................21-10
21.3 Quick Reference of Board Functions........................................................................................................21-10
21.3.1 Information Quick Reference of SDH Boards.................................................................................21-10
21.3.2 Information Quick Reference of PDH Boards.................................................................................21-15
21.3.3 Information Quick Reference of Data Boards..................................................................................21-15
21.4 Loopback Capability of the Boards...........................................................................................................21-18
21.5 Protection Schemes Supported by Each Board.........................................................................................21-26
21.6 Power Consumption and Weight of Each Board...................................................................................... 21-33
22 Parameter Settings.................................................................................................................22-1
22.1 Data Boards.................................................................................................................................................22-2
22.1.1 SDH Parameters.................................................................................................................................22-2
22.1.2 Ethernet Parameters............................................................................................................................22-3
22.1.2.1 Basic Attributes...............................................................................................................................22-4
22.1.2.2 Flow Control...................................................................................................................................22-5
22.1.2.3 Network Attributes..........................................................................................................................22-6
22.1.2.4 Advanced Attributes........................................................................................................................22-8
22.1.2.5 TAG Attributes..............................................................................................................................22-11
22.1.2.6 Encapsulation/Mapping.................................................................................................................22-12
22.1.2.7 Bound Paths...................................................................................................................................22-14
22.1.3 ATM Parameters..............................................................................................................................22-15
22.2 SDH Processing Boards............................................................................................................................22-15
22.3 PDH Boards...............................................................................................................................................22-16
22.4 WDM Boards............................................................................................................................................ 22-18
22.5 Cross-Connect and Timing Units..............................................................................................................22-26
22.6 Optical Amplifier Boards..........................................................................................................................22-30
23 Task Collection.......................................................................................................................23-1
23.1 Querying the Protection Subnet..................................................................................................................23-3
23.2 Troubleshooting Service Unavailability......................................................................................................23-3
23.3 Troubleshooting the Clock Tracing Failure................................................................................................23-4
23.4 Configuring the F&f Debugging Serial Port and OAM NM Port...............................................................23-5
23.5 Testing the Frequency Accuracy of the Free-Run Clock............................................................................23-6
23.6 Testing the Clock Holdover Accuracy........................................................................................................23-7
23.7 Checking Board Parameters........................................................................................................................23-8
23.8 Testing the SAN Service Channel.............................................................................................................23-12
A Glossary.....................................................................................................................................A-1
A.1 Numerics........................................................................................................................................................A-3
A.2 A....................................................................................................................................................................A-3
A.3 B....................................................................................................................................................................A-5
A.4 C....................................................................................................................................................................A-6
A.5 D....................................................................................................................................................................A-9
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A.6 E...................................................................................................................................................................A-10
A.7 F...................................................................................................................................................................A-12
A.8 G..................................................................................................................................................................A-14
A.9 H..................................................................................................................................................................A-14
A.10 I..................................................................................................................................................................A-15
A.11 J..................................................................................................................................................................A-16
A.12 L.................................................................................................................................................................A-16
A.13 M................................................................................................................................................................A-18
A.14 N................................................................................................................................................................A-19
A.15 O................................................................................................................................................................A-20
A.16 P.................................................................................................................................................................A-21
A.17 Q................................................................................................................................................................A-23
A.18 R................................................................................................................................................................A-23
A.19 S.................................................................................................................................................................A-25
A.20 T.................................................................................................................................................................A-28
A.21 U................................................................................................................................................................A-29
A.22 V................................................................................................................................................................A-30
A.23 W...............................................................................................................................................................A-30
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Hardware Description Figures
Figures
Figure 1-1 Appearance of the OptiX OSN 2500 that is installed in the 300 mm ETSI cabinet...........................1-2
Figure 1-2 Appearance of the OptiX OSN 2500 subrack.....................................................................................1-3
Figure 2-1 Appearances of the T63 cabinet and N63E cabinet............................................................................2-3
Figure 2-2 Locations of the cable holes at the top of the T63 cabinet.................................................................2-4
Figure 2-3 Locations of the cable holes at the bottom of the T63 cabinet...........................................................2-5
Figure 2-4 Locations of the cable holes at the top of the N63E cabinet..............................................................2-5
Figure 2-5 Locations of the cable holes at the bottom of the N63E cabinet........................................................2-6
Figure 2-6 Picture and dimensions of the enclosure frame..................................................................................2-6
Figure 2-7 Appearance of the N66T cabinet........................................................................................................2-8
Figure 2-8 Locations of the cable holes at the top of the N66T cabinet..............................................................2-9
Figure 2-9 Locations of the cable holes at the bottom of the N66T cabinet......................................................2-10
Figure 2-10 ETSI cabinet...................................................................................................................................2-10
Figure 2-11 Front panel of the N1PDU..............................................................................................................2-12
Figure 3-1 Structure of the OptiX OSN 2500 subrack.........................................................................................3-2
Figure 3-2 Slot layout of the OptiX OSN 2500 subrack (before the division of slots)........................................3-3
Figure 3-3 Slot layout of the OptiX OSN 2500 subrack (after the division of slots)...........................................3-4
Figure 3-4 Access capacity of each slot before slot division when slots 9 and 10 house the Q2CXL and Q3CXL
boards....................................................................................................................................................................3-6
Figure 3-5 Access capacity of each slot after slot division when slots 9 and 10 house the Q2CXL and Q3CXL
boards....................................................................................................................................................................3-7
Figure 3-6 Access capacity of each slot before slot division when slots 9 and 10 house the Q5CXL board
...............................................................................................................................................................................3-7
Figure 3-7 Access capacity of each slot after slot division when slots 9 and 10 house the Q5CXL board
...............................................................................................................................................................................3-8
Figure 3-8 Ventilation mode of the OptiX OSN 2500.........................................................................................3-9
Figure 3-9 Appearance of a fiber spool box.......................................................................................................3-10
Figure 4-1 Bar code of a board.............................................................................................................................4-4
Figure 5-1 Position of the CXL in the system......................................................................................................5-4
Figure 5-2 Functional block diagram of the Q2CXL1.........................................................................................5-8
Figure 5-4 Front panel of the Q2CXL1..............................................................................................................5-12
Figure 5-6 Positions of the jumper and DIP switch of the Q2CXL1.................................................................5-15
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Figures Hardware Description
Figure 5-8 Position of the CXL in the system....................................................................................................5-32

Figure 5-9 Functional block diagram of the Q2CXL4.......................................................................................5-36
Figure 5-10 Functional block diagram of the Q3CXL4.....................................................................................5-37
Figure 5-11 Front panel of the Q2CXL4............................................................................................................5-40
Figure 5-12 Front panel the Q3CXL4................................................................................................................5-41
Figure 5-13 Positions of the jumper and DIP switch of the Q2CXL4...............................................................5-43
Figure 5-15 Position of the CXL in the system..................................................................................................5-60
Figure 5-16 Functional block diagram of the Q2CXL16...................................................................................5-64
Figure 5-18 Front panel of the Q2CXL16..........................................................................................................5-68
Figure 5-19 Front panel the Q3CXL16..............................................................................................................5-69
Figure 5-20 Positions of the jumper and DIP switch of the Q2CXL16.............................................................5-71
Figure 5-23 Functional block diagram of the Q5CXLLN..................................................................................5-92
Figure 5-24 Front panel of the Q5CXLLN........................................................................................................5-95
Figure 5-25 Positions of the jumpers and DIP switch of the Q5CXLLN..........................................................5-97
Figure 5-26 Position of the CXL in the system................................................................................................5-113
Figure 5-27 Functional block diagram of the Q5CXLQ41..............................................................................5-117
Figure 5-28 Functional block diagram of the Q5CXLQ41/Q6CXLQ41.........................................................5-118
Figure 5-29 Front panel of the Q5CXLQ41.....................................................................................................5-121
Figure 5-30 Positions of the jumpers and DIP switch of the Q5CXLQ41.......................................................5-123
Figure 6-1 Networking and application of the SDH processing boards...............................................................6-5
Figure 6-2 Functional block diagram of the SL1.................................................................................................6-7
Figure 6-3 Front panel of the N1SL1/N2SL1......................................................................................................6-9
Figure 6-4 Front panel of the R1SL1.................................................................................................................6-10
Figure 6-5 Networking and application of the SDH processing boards.............................................................6-22
Figure 6-6 Functional block diagram of the SL1A............................................................................................6-24
Figure 6-7 Front panel of the SL1A...................................................................................................................6-26
Figure 6-9 Functional block diagram of the SLQ1............................................................................................6-33
Figure 6-10 Front panel of the N1SLQ1/N2SLQ1.............................................................................................6-35
Figure 6-11 Front panel of the R1SLQ1............................................................................................................6-36
Figure 6-12 Networking and application of the SDH processing boards...........................................................6-40
Figure 6-13 Functional block diagram of the SLQ1A.......................................................................................6-42
Figure 6-14 Front panel of the SLQ1A..............................................................................................................6-45
Figure 6-16 Functional block diagram of the SLO1..........................................................................................6-52
Figure 6-17 Front panel of the SLO1.................................................................................................................6-54
Figure 6-19 Functional block diagram of the SLT1...........................................................................................6-61
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Figure 6-20 Front panel of the SLT1..................................................................................................................6-63

Figure 6-22 Functional block diagram of the SEP1...........................................................................................6-70
Figure 6-23 Functional block diagram of the SEP when the SEP works with the EU08..................................6-71
Figure 6-24 Functional block diagram of the SEP when the SEP works with the OU08..................................6-72
Figure 6-25 Front panel of the SEP1..................................................................................................................6-74
Figure 6-26 TPS protection provided by the SEP..............................................................................................6-76
Figure 6-27 Slot configuration for the two 1:1 TPS protection groups of the SEP...........................................6-77
Figure 6-29 Functional block diagram of the SL4.............................................................................................6-87
Figure 6-30 Front panel of the N1SL4/N2SL4..................................................................................................6-89
Figure 6-31 Front panel of the R1SL4...............................................................................................................6-90
Figure 6-33 Functional block diagram of the SL4A..........................................................................................6-96
Figure 6-34 Front panel of the SL4A.................................................................................................................6-98
Figure 6-35 Networking and application of the SDH processing boards.........................................................6-103
Figure 6-36 Functional block diagram of the SLD4........................................................................................6-105
Figure 6-37 Front panel of the N1SLD4/N2SLD4...........................................................................................6-107
Figure 6-38 Front panel of the R1SLD4..........................................................................................................6-108
Figure 6-40 Functional block diagram of the SLD4A.....................................................................................6-115
Figure 6-41 Front panel of the SLD4A............................................................................................................6-117
Figure 6-43 Functional block diagram of the SLQ4........................................................................................6-124
Figure 6-44 Front panel of the SLQ4...............................................................................................................6-126
Figure 6-46 Functional block diagram of the SLQ4A.....................................................................................6-133
Figure 6-47 Front panel of the SLQ4A............................................................................................................6-135
Figure 6-49 Functional block diagram of the SL16.........................................................................................6-142
Figure 6-50 Front panel of the SL16................................................................................................................6-145
Figure 6-52 Functional block diagram of the N1SL16A/N2SL16A/N3SL16A..............................................6-154
Figure 6-53 Front panel of the SL16A.............................................................................................................6-156
Figure 6-55 Functional block diagram of the SF16.........................................................................................6-171
Figure 6-56 Front panel of the SF16................................................................................................................6-174
Figure 6-58 Functional block diagram of the SLQ41......................................................................................6-182
Figure 6-59 Front panel of the SLQ41.............................................................................................................6-184
Figure 6-60 Functional block diagram of the EU04.........................................................................................6-194
Figure 6-61 Front panel of the EU04...............................................................................................................6-196
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Figure 6-63 Front panel of the EU08............................................................................................................... 6-200
Figure 6-64 Functional block diagram of the OU08........................................................................................6-204
Figure 6-65 Front panel of the N1OU08 with optical interfaces......................................................................6-205
Figure 6-66 Front panel of the N2OU08..........................................................................................................6-206
Figure 7-1 Networking and application of the PDH processing boards...............................................................7-4
Figure 7-2 Functional block diagram of the PD1.................................................................................................7-6
Figure 7-3 Functional block diagram of the E1 mapping/demapping module.....................................................7-6
Figure 7-4 Front panel of the PD1........................................................................................................................7-8
Figure 7-5 Front panel of the R3PD1...................................................................................................................7-9
Figure 7-6 TPS protection provided by the PD1................................................................................................7-11
Figure 7-7 Slot configuration for the 1:2 TPS protection of the PD1................................................................7-12
Figure 7-8 Networking and application of the PDH processing boards.............................................................7-15
Figure 7-9 Functional block diagram of the PQ1...............................................................................................7-17
Figure 7-10 Functional block diagram of the mapping/demapping module......................................................7-17
Figure 7-11 Front panel of the PQ1....................................................................................................................7-19
Figure 7-12 TPS protection provided by the PQ1..............................................................................................7-21
Figure 7-13 Slot configuration for the 1:4 TPS protection of the PQ1..............................................................7-22
Figure 7-14 Networking and application of the PDH processing boards...........................................................7-29
Figure 7-15 Functional block diagram of the PQM...........................................................................................7-31
Figure 7-17 Front panel of the PQM..................................................................................................................7-33
Figure 7-18 TPS protection provided by the PQM (E1 services are provided as an example)..........................7-35
Figure 7-19 Slot configuration for the 1:4 TPS protection of the PQM.............................................................7-36
Figure 7-21 Functional block diagram of the PL3.............................................................................................7-44
Figure 7-23 Front panel of the PL3....................................................................................................................7-47
Figure 7-24 TPS protection provided by the PL3 in the OptiX OSN 1500B subrack.......................................7-49
Figure 7-25 Slot configuration for the two 1:1 TPS protection groups of the PL3............................................7-50
Figure 7-27 Functional block diagram of the PL3A..........................................................................................7-59
Figure 7-29 Front panel of the PL3A.................................................................................................................7-62
Figure 7-31 Functional block diagram of the PD3.............................................................................................7-72
Figure 7-32 Functional block diagram of the E3/T3 mapping/demapping module...........................................7-72
Figure 7-33 Front panel of the PD3....................................................................................................................7-74
Figure 7-34 TPS protection provided by the PD3..............................................................................................7-76
Figure 7-35 Slot configuration for the 1:1 TPS protection of the PD3..............................................................7-77
Figure 7-37 Functional block diagram of the PQ3.............................................................................................7-81
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Figure 7-41 Slot configuration for the two 1:1 TPS protection groups of the PQ3...........................................7-86
Figure 7-42 Networking and application of the DDN service processing boards..............................................7-89
Figure 7-43 Functional block diagram of the DX1............................................................................................7-90
Figure 7-44 Front panel of the DX1...................................................................................................................7-92
Figure 7-45 TPS protection provided by the DX1.............................................................................................7-94
Figure 7-46 Slot configuration for the 1:4 TPS protection of the DX1.............................................................7-95
Figure 7-47 Networking and application of the DDN service processing boards............................................7-101
Figure 7-48 Functional block diagram of the DXA.........................................................................................7-102
Figure 7-49 Front panel of the DXA................................................................................................................7-103
Figure 7-50 Networking and application of the PDH processing boards.........................................................7-106
Figure 7-51 Functional block diagram of the SPQ4.........................................................................................7-108
Figure 7-52 Functional block diagram of the mapping/demapping module....................................................7-108
Figure 7-53 Functional block diagram of the SDH overhead processing module...........................................7-109
Figure 7-54 Front panel of the SPQ4...............................................................................................................7-112
Figure 7-55 TPS protection provided by the SPQ4..........................................................................................7-114
Figure 7-56 Slot configuration for the two 1:1 TPS protection groups of the SPQ4.......................................7-115
Figure 7-57 Functional block diagram of the D12B........................................................................................7-122
Figure 7-58 Front panel of the D12B...............................................................................................................7-123
Figure 7-59 Functional block diagram of the D12S.........................................................................................7-127
Figure 7-60 Front panel of the D12S................................................................................................................7-129
Figure 7-65 Functional block diagram of the C34S.........................................................................................7-142
Figure 7-66 Front panel of the C34S................................................................................................................7-143
Figure 7-67 Functional block diagram of the MU04.......................................................................................7-146
Figure 7-68 Front panel of the MU04..............................................................................................................7-148
Figure 7-69 Functional block diagram of the DM12.......................................................................................7-151
Figure 7-70 Front panel of the DM12..............................................................................................................7-152
Figure 7-71 Functional block diagram of the TSB4.........................................................................................7-157
Figure 7-72 Front panel of the TSB4...............................................................................................................7-158
Figure 7-74 Front panel of the TSB8...............................................................................................................7-162
Figure 8-1 Networking and application of the Ethernet transparent transmission board.....................................8-4
Figure 8-2 Functional block diagram of the functions of the EFT4.....................................................................8-7
Figure 8-3 Front panel of the EFT4......................................................................................................................8-9
Figure 8-4 Connection for testing the throughput specifications, packet loss ratio in the case of overloading, and
latency specifications..........................................................................................................................................8-17
Figure 8-5 Connection for testing the back-to-back specifications....................................................................8-17
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Figure 8-6 Networking and application of the Ethernet transparent transmission board...................................8-23
Figure 8-7 Functional block diagram of the EFT8.............................................................................................8-26
Figure 8-8 Front panel of the EFT8....................................................................................................................8-28
Figure 8-10 Connection for testing the back-to-back specifications..................................................................8-39
Figure 8-11 Networking and application of the Ethernet transparent transmission board.................................8-45
Figure 8-12 Functional block diagram of the EFT8A........................................................................................8-48
Figure 8-13 Front panel of the EFT8A...............................................................................................................8-50
Figure 8-17 Functional block diagram of the EGT2..........................................................................................8-70
Figure 8-18 Front panel of the N1EGT2/N2EGT2 that is installed with the GE optical interface....................8-72
Figure 8-19 Front panel of the N2EGT2 that is installed with the GE electrical interface................................8-73
latency specifications of the N1EGT2.................................................................................................................8-85
Figure 8-21 Connection for testing the back-to-back specifications of the N1EGT2........................................8-85
Figure 8-22 Connection for testing the throughput specifications, packet loss ratio in the case of overloading,
latency specifications, and back-to-back specifications of the N2EGT2............................................................8-88
Figure 8-23 Networking and application of the Ethernet switching board........................................................8-95
Figure 8-24 Functional block diagram of the EFS0.........................................................................................8-100
Figure 8-25 Front panel of the EFS0................................................................................................................8-102
Figure 8-26 Slot configuration for the 1:1 TPS protection for the EFS0.........................................................8-104
latency specifications, and back-to-back specifications of the N4EFS0...........................................................8-118
Figure 8-29 Networking and application of the Ethernet switching board......................................................8-128
Figure 8-30 Functional block diagram of the EFS0A......................................................................................8-132
Figure 8-31 Front panel of the EFS0A.............................................................................................................8-135
Figure 8-32 Slot configuration for the 1:1 TPS protection for the EFS0A......................................................8-137
latency specifications, and back-to-back specifications....................................................................................8-144
Figure 8-39 Networking diagram of EoPDH convergence services................................................................8-180
Figure 8-40 Networking diagram of private-line services...............................................................................8-180
Figure 8-41 Functional block diagram of the EFP0.........................................................................................8-184
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Figure 8-42 Front panel of the EFP0................................................................................................................8-186

Figure 8-43 Connection for testing the throughput specifications, packet loss ratio in the case of overloading, delay
specifications, and back-to-back specifications................................................................................................8-195
Figure 8-45 Functional block diagram of the EGS2........................................................................................8-205
Figure 8-46 Front panel of the N2EGS2/N3EGS2 that is installed with the GE optical interface..................8-207
Figure 8-47 Front panel of the N3EGS2 that is installed with the GE electrical interface..............................8-208
latency specifications, and back-to-back specifications of the N2EGS2..........................................................8-220
Figure 8-51 Functional block diagram of the EMS2........................................................................................8-234
Figure 8-52 Front panel of the EMS2 that is installed with the GE optical interface......................................8-237
Figure 8-53 Front panel of the EMS2 that is installed with the GE electrical interface..................................8-238
Figure 8-57 Front panel of the EMS4 that is installed with the GE optical interface......................................8-265
Figure 8-58 Front panel of the EMS4 that is installed with the GE electrical interface..................................8-266
Figure 8-59 Normal working of the EMS4......................................................................................................8-270
Figure 8-60 Principle of the BPS protection for the EMS4.............................................................................8-271
Figure 8-61 Principle of the PPS protection for the EMS4..............................................................................8-272
Figure 8-62 Principle of the DLAG protection for the EMS4..........................................................................8-273
Figure 8-65 Functional block diagram of the EGS4........................................................................................8-296
Figure 8-66 Front panel of the N1EGS4/N3EGS4/N4EGS4 that is installed with the optical interface.........8-298
Figure 8-67 front panel of the N1EGS4/N4EGS4 that is installed with the GE electrical interface...............8-299
Figure 8-68 Normal working of the EGS4.......................................................................................................8-303
Figure 8-69 Principle of the BPS protection for the EGS4..............................................................................8-304
Figure 8-70 Principle of the PPS protection for the EGS4...............................................................................8-305
Figure 8-71 Principle of the DLAG protection for the EGS4..........................................................................8-306
Figure 8-74 Functional block diagram of the EFF8.........................................................................................8-328
Figure 8-75 Front panel of the EFF8................................................................................................................8-330
Figure 8-76 Functional block diagram of the EFF8A......................................................................................8-334
Figure 8-77 Front panel of the EFF8A.............................................................................................................8-335
Figure 8-78 Functional block diagram of the ETF8.........................................................................................8-338
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Figure 8-79 Front panel of the ETF8................................................................................................................8-339

Figure 8-80 Functional block diagram of the ETF8A......................................................................................8-343
Figure 8-81 Front panel of the ETF8A.............................................................................................................8-344
Figure 8-82 Functional block diagram of the ETS8.........................................................................................8-347
Figure 8-83 Front panel of the ETS8................................................................................................................8-348
Figure 9-1 Networking and application of the ATM services that occupy bandwidths exclusively...................9-3
Figure 9-2 Networking and application of the ATM services that share bandwidths..........................................9-4
Figure 9-3 Functional block diagram of the ADL4..............................................................................................9-6
Figure 9-4 Front panel of the ADL4....................................................................................................................9-8
Figure 9-5 Networking and application of the ATM services that occupy bandwidths exclusively.................9-17
Figure 9-6 Networking and application of the ATM services that share bandwidths........................................9-18
Figure 9-7 Functional block diagram of the ADQ1...........................................................................................9-20
Figure 9-8 Front panel of the ADQ1..................................................................................................................9-22
Figure 9-9 Networking and application of the IMA services.............................................................................9-31
Figure 9-10 Functional block diagram of the IDL4...........................................................................................9-33
Figure 9-11 Front panel of the IDL4..................................................................................................................9-35
Figure 9-12 Networking and application of the IMA services...........................................................................9-45
Figure 9-13 Functional block diagram of the IDL4A........................................................................................9-47
Figure 9-14 Front panel of the IDL4A...............................................................................................................9-49
Figure 9-16 Functional block diagram of the IDQ1...........................................................................................9-56
Figure 9-17 Front panel of the IDQ1..................................................................................................................9-58
Figure 9-19 Functional block diagram of the IDQ1A........................................................................................9-71
Figure 9-20 Front panel of the IDQ1A...............................................................................................................9-73
Figure 10-1 Networking and application of the RPR board...............................................................................10-4
Figure 10-2 Functional block diagram of the EGR2..........................................................................................10-8
Figure 10-3 Front panel of the EGR2...............................................................................................................10-11
Figure 10-5 Networking and application of the RPR board.............................................................................10-28
Figure 10-6 Functional block diagram of the EMR0.......................................................................................10-32
Figure 10-7 Front panel of the EMR0..............................................................................................................10-35
Figure 11-1 Networking and application of the SAN services...........................................................................11-3
Figure 11-2 Functional block diagram of the MST4..........................................................................................11-5
Figure 11-3 Front panel of the MST4................................................................................................................11-8
Figure 12-1 Position of the OptiX OSN equipment that is configured with the IFSD1 in the network............12-3
Figure 12-2 Functional block diagram of the IFSD1.........................................................................................12-5
Figure 12-3 Front panel of the IFSD1................................................................................................................12-7
Figure 12-4 Position of the OptiX OSN equipment that is configured with the RPWR in the network..........12-17
Figure 12-5 Functional block diagram of the RPWR.......................................................................................12-19
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Figure 12-6 Front panel of the RPWR.............................................................................................................12-20

Figure 13-1 Application of the CMR2 in the CWDM system...........................................................................13-4
Figure 13-2 Functional block diagram of the CMR2.........................................................................................13-5
Figure 13-3 Front panel of the CMR2................................................................................................................13-6
Figure 13-4 Application of the CMR4 in the CWDM system.........................................................................13-10
Figure 13-5 Functional block diagram of the CMR4.......................................................................................13-11
Figure 13-6 Front panel of the CMR4..............................................................................................................13-12
Figure 13-7 Application of the MR2 in the DWDM system............................................................................13-16
Figure 13-8 Functional block diagram of the MR2..........................................................................................13-17
Figure 13-9 Front panel of the MR2................................................................................................................13-19
Figure 13-10 Application of the MR2A in the DWDM system.......................................................................13-23
Figure 13-11 One MR2A board working as a two-channel add/drop OTM station........................................13-24
Figure 13-12 Two MR2A boards being cascaded to work as a four-channel add/drop OTM station.............13-24
Figure 13-13 MR2A and LWX working as a two-channel add/drop OADM station......................................13-24
Figure 13-14 Functional block diagram of the MR2A.....................................................................................13-25
Figure 13-15 Front panel of the MR2A............................................................................................................13-26
Figure 13-16 Application of the MR2B in the DWDM system.......................................................................13-29
Figure 13-17 One MR2B board working as a two-channel add/drop OTM station.........................................13-30
Figure 13-18 Two MR2B boards being cascaded to work as a four-channel add/drop OTM station.............13-30
Figure 13-19 MR2B and LWX working as a two-channel add/drop OADM station......................................13-30
Figure 13-20 Functional block diagram of the MR2B.....................................................................................13-31
Figure 13-21 Front panel of the MR2B............................................................................................................13-32
Figure 13-22 Application of the MR2C in the DWDM system.......................................................................13-34
Figure 13-23 One MR2C board working as a two-channel add/drop OTM station.........................................13-35
Figure 13-24 Two MR2C boards being cascaded to work as a four-channel add/drop OTM station.............13-35
Figure 13-25 MR2C and LWX working as a two-channel add/drop OADM station......................................13-36
Figure 13-26 Functional block diagram of the MR2C.....................................................................................13-36
Figure 13-27 Front panel of the MR2C............................................................................................................13-37
Figure 13-28 Application of the MR4 in the DWDM system..........................................................................13-40
Figure 13-29 Functional block diagram of the MR4........................................................................................13-41
Figure 13-30 Front panel of the MR4..............................................................................................................13-42
Figure 13-31 Application of the LWX in the DWDM system.........................................................................13-46
Figure 13-32 Functional block diagram of the LWX.......................................................................................13-48
Figure 13-33 Front panel of the LWX..............................................................................................................13-50
Figure 13-34 Position of the FIB in an optical transmission system................................................................13-55
Figure 13-35 Functional block diagram of the FIB..........................................................................................13-56
Figure 13-36 Front panel of the FIB................................................................................................................13-57
Figure 14-1 Functional block diagram of the SAP.............................................................................................14-4
Figure 14-2 Jumpers on the SAP........................................................................................................................14-6
Figure 14-3 Front panel of the Q1SAP..............................................................................................................14-7
Figure 14-5 Functional block diagram of the SEI............................................................................................14-12
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Figure 14-6 Front panel of the SEI...................................................................................................................14-12

Figure 14-7 Connections for alarm input, alarm cascading, and alarm output................................................14-18
Figure 14-8 Connection of cabinet alarm indicators........................................................................................14-19
Figure 14-9 Functional block diagram of the XE1FAN...................................................................................14-21
Figure 14-10 Modular fan tray assembly.........................................................................................................14-22
Figure 15-1 Position of the BA in an optical transmission system....................................................................15-2
Figure 15-2 Functional block diagram of the BA2............................................................................................15-4
Figure 15-3 Front panel of the one-interface BA2.............................................................................................15-6
Figure 15-4 Front panel of the two-interface BA2.............................................................................................15-7
Figure 15-5 Position of the BA and PA in an optical transmission system.....................................................15-11
Figure 15-6 Functional block diagram of the N1BPA.....................................................................................15-13
Figure 15-8 Front panel of the BPA.................................................................................................................15-14
Figure 15-9 Appearance of the 61COA/N1COA (PA)....................................................................................15-19
Figure 15-10 Appearance of the 62COA..........................................................................................................15-20
Figure 15-11 Application of the 62COA..........................................................................................................15-21
Figure 15-12 Functional block diagram of the 61COA/N1COA.....................................................................15-22
Figure 15-13 Front panel of the 61COA/N1COA............................................................................................15-23
Figure 15-14 Front panel of the 62COA..........................................................................................................15-24
Figure 15-15 SC/PC fiber connector................................................................................................................15-24
Figure 15-16 LSH flange and fiber connector..................................................................................................15-25
Figure 15-17 Position of the 61COA in the ETSI cabinet...............................................................................15-27
Figure 15-18 Position of the RPC01 in an optical transmission system..........................................................15-30
Figure 15-19 Functional block diagram of the RPC01 (forward pump)..........................................................15-32
Figure 15-20 Front panel of the RPC01...........................................................................................................15-33
Figure 15-21 Jumpers of the RPC01................................................................................................................15-35
Figure 15-23 Functional block diagram of the RPC02 (backward pump).......................................................15-39
Figure 15-26 Position of the OBU1 in an optical transmission system...........................................................15-45
Figure 15-27 Functional block diagram of the OBU1.....................................................................................15-46
Figure 15-28 Front panel of the OBU1............................................................................................................15-48
Figure 16-1 Application of the UPM on the OptiX OSN equipment series.......................................................16-3
Figure 16-2 Appearance of the EPS75-4815AF power system..........................................................................16-3
Figure 16-3 Front panel of the EPS75-4815AF power system..........................................................................16-5
Figure 16-4 Application of the PIU on the OptiX OSN equipment series.........................................................16-9
Figure 16-5 Functional block diagram of the PIU...........................................................................................16-10
Figure 16-6 Front panel of the PIU..................................................................................................................16-11
Figure 16-7 Application of the PIUA on the OptiX OSN equipment series....................................................16-14
Figure 16-8 Functional block diagram of the PIUA.........................................................................................16-15
Figure 16-9 Front panel of the PIUA...............................................................................................................16-15
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Figure 17-1 SFP/eSFP optical module...............................................................................................................17-2

Figure 17-2 XFP optical module........................................................................................................................17-2
Figure 17-3 SFP electrical module.....................................................................................................................17-3
Figure 17-4 Label of a pluggable optical module..............................................................................................17-3
Figure 18-1 Appearance of the LC/PC fiber connector......................................................................................18-3
Figure 18-2 Appearance of the SC/PC fiber connector......................................................................................18-4
Figure 18-3 Appearance of the FC/PC fiber connector......................................................................................18-4
Figure 18-4 Appearance of the LSH/APC fiber connector................................................................................18-4
Figure 18-5 Structure of the –48 V/BGND power cable of the cabinet ............................................................18-6
Figure 18-6 Structure of the PGND power cable of the cabinet (JG2)..............................................................18-6
Figure 18-7 Structure of the PGND power cable of the cabinet (OT)...............................................................18-6
Figure 18-8 Structure of the grounding cable of the cabinet door.....................................................................18-8
Figure 18-9 Structure of the power cable for the...............................................................................................18-9
Figure 18-10 Structure of the COA power cable..............................................................................................18-10
Figure 18-11 Structure of the UPM power cable.............................................................................................18-11
Figure 18-12 Structure of the RPC power cable..............................................................................................18-13
Figure 18-13 Structure of the cabinet indicator cable......................................................................................18-15
Figure 18-14 Structure of the indicator cascading cable between subracks or the alarm cascading cable between
the OptiX OSN equipment................................................................................................................................18-16
Figure 18-15 Structure of the alarm cascading cable between the OptiX OSN equipment and the other Huawei
transmission equipment.....................................................................................................................................18-18
Figure 18-16 Structure of the alarm input/output cable...................................................................................18-19
Figure 18-17 Structure of the OAM serial port cable.......................................................................................18-21
Figure 18-18 Structure of the serial 1–4/F1/F&f serial port cable...................................................................18-23
Figure 18-19 Structure of the RS-232/RS-422 serial port cable......................................................................18-24
Figure 18-20 Structure of the ordinary telephone line.....................................................................................18-25
Figure 18-21 Structure of the COA cascading cable........................................................................................18-27
Figure 18-22 Structure of the straight through cable........................................................................................18-28
Figure 18-23 Structure of the crossover cable..................................................................................................18-29
Figure 18-24 Structure of the 75-ohm 8xE1 cable...........................................................................................18-31
Figure 18-25 Structure of the 120-ohm 8xE1 cable.........................................................................................18-34
Figure 18-26 Structure of the E3/T3/STM-1 cable..........................................................................................18-36
Figure 18-27 Structure of the V.35 DCE cable................................................................................................18-39
Figure 18-28 Structure of the V.35 DTE cable................................................................................................18-40
Figure 18-29 Structure of the V.24 DCE cable................................................................................................18-42
Figure 18-30 Structure of the V.24 DTE cable................................................................................................18-44
Figure 18-31 Structure of the X.21 DCE cable................................................................................................18-45
Figure 18-32 Structure of the X.21 DTE cable................................................................................................18-47
Figure 18-33 Structure of the RS-449 DCE cable............................................................................................18-48
Figure 18-34 Structure of the RS-449 DTE cable............................................................................................18-50
Figure 18-37 Structure of the 75-ohm clock cable...........................................................................................18-56
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Figure 18-38 Structure of the 120-ohm clock cable.........................................................................................18-56

Figure 18-39 Structure of the one-channel 75-ohm-to-120-ohm clock transit cable.......................................18-58
Figure 18-40 Structure of the two-channel 75-ohm-to-120-ohm clock transit cable.......................................18-58
Figure 20-1 Positions of the labels affixed to the OptiX OSN 2500 subrack....................................................20-4
Figure 20-2 Positions of the labels affixed to the board.....................................................................................20-5
Figure 23-1 Configuring the F&f debugging serial port and OAM NM port....................................................23-6
Figure 23-2 Connection for testing the frequency accuracy of the free-run clock.............................................23-7
Figure 23-3 Connection for testing the clock holdover accuracy.......................................................................23-8
Figure 23-4 Connection for testing the loopback function when the FC flow control function is disabled
...........................................................................................................................................................................23-13
Figure 23-5 Connection for testing the connection to the FC switch when the FC flow control function is disabled
...........................................................................................................................................................................23-14
Figures
Figure 1-1 Appearance of the OptiX OSN 2500 that is installed in the 300 mm ETSI cabinet...........................1-2
Figure 1-2 Appearance of the OptiX OSN 2500 subrack.....................................................................................1-3
Figure 2-1 Appearances of the T63 cabinet and N63E cabinet............................................................................2-3
Figure 2-2 Locations of the cable holes at the top of the T63 cabinet.................................................................2-4
Figure 2-3 Locations of the cable holes at the bottom of the T63 cabinet...........................................................2-5
Figure 2-4 Locations of the cable holes at the top of the N63E cabinet..............................................................2-5
Figure 2-5 Locations of the cable holes at the bottom of the N63E cabinet........................................................2-6
Figure 2-6 Picture and dimensions of the enclosure frame..................................................................................2-6
Figure 2-7 Appearance of the N66T cabinet........................................................................................................2-8
Figure 2-8 Locations of the cable holes at the top of the N66T cabinet..............................................................2-9
Figure 2-9 Locations of the cable holes at the bottom of the N66T cabinet......................................................2-10
Figure 2-10 ETSI cabinet...................................................................................................................................2-10
Figure 2-11 Front panel of the N1PDU..............................................................................................................2-12
Figure 3-1 Structure of the OptiX OSN 2500 subrack.........................................................................................3-2
Figure 3-2 Slot layout of the OptiX OSN 2500 subrack (before the division of slots)........................................3-3
Figure 3-3 Slot layout of the OptiX OSN 2500 subrack (after the division of slots)...........................................3-4
Figure 3-4 Access capacity of each slot before slot division when slots 9 and 10 house the Q2CXL and Q3CXL
boards....................................................................................................................................................................3-6
Figure 3-5 Access capacity of each slot after slot division when slots 9 and 10 house the Q2CXL and Q3CXL
boards....................................................................................................................................................................3-7
Figure 3-6 Access capacity of each slot before slot division when slots 9 and 10 house the Q5CXL board
...............................................................................................................................................................................3-7
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Figure 3-7 Access capacity of each slot after slot division when slots 9 and 10 house the Q5CXL board
...............................................................................................................................................................................3-8
Figure 3-8 Ventilation mode of the OptiX OSN 2500.........................................................................................3-9
Figure 3-9 Appearance of a fiber spool box.......................................................................................................3-10
Figure 4-1 Bar code of a board.............................................................................................................................4-4
Figure 5-1 Position of the CXL in the system......................................................................................................5-4
Figure 5-8 Position of the CXL in the system....................................................................................................5-32
Figure 5-9 Functional block diagram of the Q2CXL4.......................................................................................5-36
Figure 5-10 Functional block diagram of the Q3CXL4.....................................................................................5-37
Figure 5-11 Front panel of the Q2CXL4............................................................................................................5-40
Figure 5-12 Front panel the Q3CXL4................................................................................................................5-41
Figure 5-18 Front panel of the Q2CXL16..........................................................................................................5-68
Figure 5-19 Front panel the Q3CXL16..............................................................................................................5-69
Figure 5-23 Functional block diagram of the Q5CXLLN..................................................................................5-92
Figure 5-24 Front panel of the Q5CXLLN........................................................................................................5-95
Figure 5-25 Positions of the jumpers and DIP switch of the Q5CXLLN..........................................................5-97
Figure 5-26 Position of the CXL in the system................................................................................................5-113
Figure 5-27 Functional block diagram of the Q5CXLQ41..............................................................................5-117
Figure 5-28 Functional block diagram of the Q5CXLQ41/Q6CXLQ41.........................................................5-118
Figure 5-29 Front panel of the Q5CXLQ41.....................................................................................................5-121
Figure 5-30 Positions of the jumpers and DIP switch of the Q5CXLQ41.......................................................5-123
Figure 6-1 Networking and application of the SDH processing boards...............................................................6-5
Figure 6-2 Functional block diagram of the SL1.................................................................................................6-7
Figure 6-3 Front panel of the N1SL1/N2SL1......................................................................................................6-9
Figure 6-4 Front panel of the R1SL1.................................................................................................................6-10
Figure 6-6 Functional block diagram of the SL1A............................................................................................6-24
Figure 6-7 Front panel of the SL1A...................................................................................................................6-26
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Figure 6-9 Functional block diagram of the SLQ1............................................................................................6-33

Figure 6-10 Front panel of the N1SLQ1/N2SLQ1.............................................................................................6-35
Figure 6-11 Front panel of the R1SLQ1............................................................................................................6-36
Figure 6-13 Functional block diagram of the SLQ1A.......................................................................................6-42
Figure 6-14 Front panel of the SLQ1A..............................................................................................................6-45
Figure 6-16 Functional block diagram of the SLO1..........................................................................................6-52
Figure 6-17 Front panel of the SLO1.................................................................................................................6-54
Figure 6-19 Functional block diagram of the SLT1...........................................................................................6-61
Figure 6-20 Front panel of the SLT1..................................................................................................................6-63
Figure 6-22 Functional block diagram of the SEP1...........................................................................................6-70
Figure 6-23 Functional block diagram of the SEP when the SEP works with the EU08..................................6-71
Figure 6-24 Functional block diagram of the SEP when the SEP works with the OU08..................................6-72
Figure 6-25 Front panel of the SEP1..................................................................................................................6-74
Figure 6-26 TPS protection provided by the SEP..............................................................................................6-76
Figure 6-27 Slot configuration for the two 1:1 TPS protection groups of the SEP...........................................6-77
Figure 6-29 Functional block diagram of the SL4.............................................................................................6-87
Figure 6-30 Front panel of the N1SL4/N2SL4..................................................................................................6-89
Figure 6-31 Front panel of the R1SL4...............................................................................................................6-90
Figure 6-33 Functional block diagram of the SL4A..........................................................................................6-96
Figure 6-34 Front panel of the SL4A.................................................................................................................6-98
Figure 6-36 Functional block diagram of the SLD4........................................................................................6-105
Figure 6-37 Front panel of the N1SLD4/N2SLD4...........................................................................................6-107
Figure 6-38 Front panel of the R1SLD4..........................................................................................................6-108
Figure 6-40 Functional block diagram of the SLD4A.....................................................................................6-115
Figure 6-41 Front panel of the SLD4A............................................................................................................6-117
Figure 6-43 Functional block diagram of the SLQ4........................................................................................6-124
Figure 6-44 Front panel of the SLQ4...............................................................................................................6-126
Figure 6-46 Functional block diagram of the SLQ4A.....................................................................................6-133
Figure 6-47 Front panel of the SLQ4A............................................................................................................6-135
Figure 6-49 Functional block diagram of the SL16.........................................................................................6-142
Figure 6-50 Front panel of the SL16................................................................................................................6-145
xc Huawei Proprietary and Confidential Issue 06 (2011-01-20)


Figure 6-52 Functional block diagram of the N1SL16A/N2SL16A/N3SL16A..............................................6-154
Figure 6-53 Front panel of the SL16A.............................................................................................................6-156
Figure 6-55 Functional block diagram of the SF16.........................................................................................6-171
Figure 6-56 Front panel of the SF16................................................................................................................6-174
Figure 6-58 Functional block diagram of the SLQ41......................................................................................6-182
Figure 6-59 Front panel of the SLQ41.............................................................................................................6-184
Figure 6-64 Functional block diagram of the OU08........................................................................................6-204
Figure 6-65 Front panel of the N1OU08 with optical interfaces......................................................................6-205
Figure 6-66 Front panel of the N2OU08..........................................................................................................6-206
Figure 7-1 Networking and application of the PDH processing boards...............................................................7-4
Figure 7-2 Functional block diagram of the PD1.................................................................................................7-6
Figure 7-3 Functional block diagram of the E1 mapping/demapping module.....................................................7-6
Figure 7-4 Front panel of the PD1........................................................................................................................7-8
Figure 7-5 Front panel of the R3PD1...................................................................................................................7-9
Figure 7-6 TPS protection provided by the PD1................................................................................................7-11
Figure 7-7 Slot configuration for the 1:2 TPS protection of the PD1................................................................ 7-12
Figure 7-8 Networking and application of the PDH processing boards.............................................................7-15
Figure 7-9 Functional block diagram of the PQ1...............................................................................................7-17
Figure 7-10 Functional block diagram of the mapping/demapping module...................................................... 7-17
Figure 7-13 Slot configuration for the 1:4 TPS protection of the PQ1.............................................................. 7-22
Figure 7-15 Functional block diagram of the PQM........................................................................................... 7-31
Figure 7-17 Front panel of the PQM..................................................................................................................7-33
Figure 7-18 TPS protection provided by the PQM (E1 services are provided as an example)..........................7-35
Figure 7-19 Slot configuration for the 1:4 TPS protection of the PQM.............................................................7-36
Figure 7-21 Functional block diagram of the PL3............................................................................................. 7-44
Figure 7-23 Front panel of the PL3....................................................................................................................7-47
Figure 7-24 TPS protection provided by the PL3 in the OptiX OSN 1500B subrack....................................... 7-49
Figure 7-25 Slot configuration for the two 1:1 TPS protection groups of the PL3............................................7-50
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Figure 7-27 Functional block diagram of the PL3A.......................................................................................... 7-59

Figure 7-29 Front panel of the PL3A.................................................................................................................7-62
Figure 7-31 Functional block diagram of the PD3.............................................................................................7-72
Figure 7-33 Front panel of the PD3....................................................................................................................7-74
Figure 7-34 TPS protection provided by the PD3..............................................................................................7-76
Figure 7-35 Slot configuration for the 1:1 TPS protection of the PD3..............................................................7-77
Figure 7-37 Functional block diagram of the PQ3.............................................................................................7-81
Figure 7-41 Slot configuration for the two 1:1 TPS protection groups of the PQ3...........................................7-86
Figure 7-42 Networking and application of the DDN service processing boards..............................................7-89
Figure 7-43 Functional block diagram of the DX1............................................................................................7-90
Figure 7-44 Front panel of the DX1...................................................................................................................7-92
Figure 7-45 TPS protection provided by the DX1.............................................................................................7-94
Figure 7-46 Slot configuration for the 1:4 TPS protection of the DX1.............................................................7-95
Figure 7-47 Networking and application of the DDN service processing boards............................................7-101
Figure 7-48 Functional block diagram of the DXA.........................................................................................7-102
Figure 7-49 Front panel of the DXA................................................................................................................7-103
Figure 7-50 Networking and application of the PDH processing boards.........................................................7-106
Figure 7-51 Functional block diagram of the SPQ4.........................................................................................7-108
Figure 7-52 Functional block diagram of the mapping/demapping module....................................................7-108
Figure 7-53 Functional block diagram of the SDH overhead processing module...........................................7-109
Figure 7-54 Front panel of the SPQ4...............................................................................................................7-112
Figure 7-55 TPS protection provided by the SPQ4..........................................................................................7-114
Figure 7-56 Slot configuration for the two 1:1 TPS protection groups of the SPQ4.......................................7-115
Figure 7-57 Functional block diagram of the D12B........................................................................................7-122
Figure 7-58 Front panel of the D12B...............................................................................................................7-123
Figure 7-65 Functional block diagram of the C34S.........................................................................................7-142
Figure 7-66 Front panel of the C34S................................................................................................................7-143
Figure 7-67 Functional block diagram of the MU04.......................................................................................7-146
Figure 7-68 Front panel of the MU04..............................................................................................................7-148
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Figure 7-69 Functional block diagram of the DM12.......................................................................................7-151

Figure 7-70 Front panel of the DM12..............................................................................................................7-152
Figure 7-72 Front panel of the TSB4............................................................................................................... 7-158
Figure 7-74 Front panel of the TSB8............................................................................................................... 7-162
Figure 8-1 Networking and application of the Ethernet transparent transmission board.....................................8-4
Figure 8-2 Functional block diagram of the functions of the EFT4.....................................................................8-7
Figure 8-3 Front panel of the EFT4......................................................................................................................8-9
Figure 8-5 Connection for testing the back-to-back specifications....................................................................8-17
Figure 8-6 Networking and application of the Ethernet transparent transmission board...................................8-23
Figure 8-7 Functional block diagram of the EFT8.............................................................................................8-26
Figure 8-8 Front panel of the EFT8....................................................................................................................8-28
Figure 8-12 Functional block diagram of the EFT8A........................................................................................8-48
Figure 8-13 Front panel of the EFT8A...............................................................................................................8-50
Figure 8-17 Functional block diagram of the EGT2..........................................................................................8-70
Figure 8-18 Front panel of the N1EGT2/N2EGT2 that is installed with the GE optical interface....................8-72
Figure 8-19 Front panel of the N2EGT2 that is installed with the GE electrical interface................................8-73
latency specifications of the N1EGT2.................................................................................................................8-85
Figure 8-21 Connection for testing the back-to-back specifications of the N1EGT2........................................8-85
latency specifications, and back-to-back specifications of the N2EGT2............................................................8-88
Figure 8-23 Networking and application of the Ethernet switching board........................................................8-95
Figure 8-26 Slot configuration for the 1:1 TPS protection for the EFS0.........................................................8-104
Figure 8-30 Functional block diagram of the EFS0A......................................................................................8-132
Figure 8-31 Front panel of the EFS0A.............................................................................................................8-135
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Figure 8-32 Slot configuration for the 1:1 TPS protection for the EFS0A...................................................... 8-137
Figure 8-34 Networking and application of the Ethernet switching board...................................................... 8-150
Figure 8-39 Networking diagram of EoPDH convergence services................................................................ 8-180
Figure 8-40 Networking diagram of private-line services............................................................................... 8-180
Figure 8-41 Functional block diagram of the EFP0.........................................................................................8-184
Figure 8-42 Front panel of the EFP0................................................................................................................8-186
Figure 8-43 Connection for testing the throughput specifications, packet loss ratio in the case of overloading, delay
specifications, and back-to-back specifications................................................................................................ 8-195
Figure 8-45 Functional block diagram of the EGS2........................................................................................ 8-205
Figure 8-46 Front panel of the N2EGS2/N3EGS2 that is installed with the GE optical interface.................. 8-207
Figure 8-47 Front panel of the N3EGS2 that is installed with the GE electrical interface.............................. 8-208
latency specifications, and back-to-back specifications of the N2EGS2.......................................................... 8-220
latency specifications, and back-to-back specifications of the N3EGS2.......................................................... 8-224
Figure 8-52 Front panel of the EMS2 that is installed with the GE optical interface...................................... 8-237
Figure 8-53 Front panel of the EMS2 that is installed with the GE electrical interface.................................. 8-238
Figure 8-57 Front panel of the EMS4 that is installed with the GE optical interface...................................... 8-265
Figure 8-58 Front panel of the EMS4 that is installed with the GE electrical interface.................................. 8-266
Figure 8-59 Normal working of the EMS4...................................................................................................... 8-270
Figure 8-60 Principle of the BPS protection for the EMS4............................................................................. 8-271
Figure 8-61 Principle of the PPS protection for the EMS4..............................................................................8-272
Figure 8-62 Principle of the DLAG protection for the EMS4..........................................................................8-273
Figure 8-65 Functional block diagram of the EGS4........................................................................................ 8-296
Figure 8-66 Front panel of the N1EGS4/N3EGS4/N4EGS4 that is installed with the optical interface......... 8-298
Figure 8-67 front panel of the N1EGS4/N4EGS4 that is installed with the GE electrical interface............... 8-299
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Figure 8-68 Normal working of the EGS4.......................................................................................................8-303

Figure 8-69 Principle of the BPS protection for the EGS4..............................................................................8-304
Figure 8-70 Principle of the PPS protection for the EGS4...............................................................................8-305
Figure 8-71 Principle of the DLAG protection for the EGS4..........................................................................8-306
Figure 8-74 Functional block diagram of the EFF8.........................................................................................8-328
Figure 8-75 Front panel of the EFF8................................................................................................................8-330
Figure 8-76 Functional block diagram of the EFF8A......................................................................................8-334
Figure 8-77 Front panel of the EFF8A.............................................................................................................8-335
Figure 8-78 Functional block diagram of the ETF8.........................................................................................8-338
Figure 8-79 Front panel of the ETF8................................................................................................................8-339
Figure 8-80 Functional block diagram of the ETF8A......................................................................................8-343
Figure 8-81 Front panel of the ETF8A.............................................................................................................8-344
Figure 8-82 Functional block diagram of the ETS8.........................................................................................8-347
Figure 8-83 Front panel of the ETS8................................................................................................................8-348
Figure 9-1 Networking and application of the ATM services that occupy bandwidths exclusively...................9-3
Figure 9-2 Networking and application of the ATM services that share bandwidths..........................................9-4
Figure 9-3 Functional block diagram of the ADL4..............................................................................................9-6
Figure 9-4 Front panel of the ADL4....................................................................................................................9-8
Figure 9-5 Networking and application of the ATM services that occupy bandwidths exclusively.................9-17
Figure 9-6 Networking and application of the ATM services that share bandwidths........................................9-18
Figure 9-7 Functional block diagram of the ADQ1...........................................................................................9-20
Figure 9-8 Front panel of the ADQ1..................................................................................................................9-22
Figure 9-9 Networking and application of the IMA services.............................................................................9-31
Figure 9-10 Functional block diagram of the IDL4...........................................................................................9-33
Figure 9-11 Front panel of the IDL4..................................................................................................................9-35
Figure 9-13 Functional block diagram of the IDL4A........................................................................................9-47
Figure 9-14 Front panel of the IDL4A...............................................................................................................9-49
Figure 9-16 Functional block diagram of the IDQ1...........................................................................................9-56
Figure 9-17 Front panel of the IDQ1..................................................................................................................9-58
Figure 9-19 Functional block diagram of the IDQ1A........................................................................................9-71
Figure 9-20 Front panel of the IDQ1A...............................................................................................................9-73
Figure 10-1 Networking and application of the RPR board...............................................................................10-4
Figure 10-2 Functional block diagram of the EGR2..........................................................................................10-8
Figure 10-3 Front panel of the EGR2...............................................................................................................10-11
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Figure 10-5 Networking and application of the RPR board.............................................................................10-28

Figure 10-6 Functional block diagram of the EMR0....................................................................................... 10-32
Figure 10-7 Front panel of the EMR0..............................................................................................................10-35
Figure 11-1 Networking and application of the SAN services...........................................................................11-3
Figure 11-2 Functional block diagram of the MST4..........................................................................................11-5
Figure 11-3 Front panel of the MST4................................................................................................................11-8
Figure 12-1 Position of the OptiX OSN equipment that is configured with the IFSD1 in the network............12-3
Figure 12-2 Functional block diagram of the IFSD1.........................................................................................12-5
Figure 12-3 Front panel of the IFSD1................................................................................................................12-7
Figure 12-4 Position of the OptiX OSN equipment that is configured with the RPWR in the network..........12-17
Figure 12-5 Functional block diagram of the RPWR.......................................................................................12-19
Figure 12-6 Front panel of the RPWR............................................................................................................. 12-20
Figure 13-1 Application of the CMR2 in the CWDM system...........................................................................13-4
Figure 13-2 Functional block diagram of the CMR2.........................................................................................13-5
Figure 13-3 Front panel of the CMR2................................................................................................................13-6
Figure 13-4 Application of the CMR4 in the CWDM system......................................................................... 13-10
Figure 13-5 Functional block diagram of the CMR4.......................................................................................13-11
Figure 13-6 Front panel of the CMR4..............................................................................................................13-12
Figure 13-7 Application of the MR2 in the DWDM system............................................................................13-16
Figure 13-8 Functional block diagram of the MR2..........................................................................................13-17
Figure 13-9 Front panel of the MR2................................................................................................................ 13-19
Figure 13-10 Application of the MR2A in the DWDM system.......................................................................13-23
Figure 13-11 One MR2A board working as a two-channel add/drop OTM station........................................ 13-24
Figure 13-12 Two MR2A boards being cascaded to work as a four-channel add/drop OTM station............. 13-24
Figure 13-13 MR2A and LWX working as a two-channel add/drop OADM station......................................13-24
Figure 13-14 Functional block diagram of the MR2A.....................................................................................13-25
Figure 13-15 Front panel of the MR2A............................................................................................................13-26
Figure 13-16 Application of the MR2B in the DWDM system.......................................................................13-29
Figure 13-17 One MR2B board working as a two-channel add/drop OTM station.........................................13-30
Figure 13-18 Two MR2B boards being cascaded to work as a four-channel add/drop OTM station............. 13-30
Figure 13-19 MR2B and LWX working as a two-channel add/drop OADM station...................................... 13-30
Figure 13-20 Functional block diagram of the MR2B.....................................................................................13-31
Figure 13-21 Front panel of the MR2B............................................................................................................13-32
Figure 13-22 Application of the MR2C in the DWDM system.......................................................................13-34
Figure 13-23 One MR2C board working as a two-channel add/drop OTM station.........................................13-35
Figure 13-24 Two MR2C boards being cascaded to work as a four-channel add/drop OTM station............. 13-35
Figure 13-25 MR2C and LWX working as a two-channel add/drop OADM station...................................... 13-36
Figure 13-26 Functional block diagram of the MR2C.....................................................................................13-36
Figure 13-27 Front panel of the MR2C............................................................................................................13-37
Figure 13-28 Application of the MR4 in the DWDM system..........................................................................13-40
Figure 13-29 Functional block diagram of the MR4........................................................................................13-41
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Figure 13-30 Front panel of the MR4..............................................................................................................13-42

Figure 13-31 Application of the LWX in the DWDM system.........................................................................13-46
Figure 13-32 Functional block diagram of the LWX.......................................................................................13-48
Figure 13-33 Front panel of the LWX..............................................................................................................13-50
Figure 13-34 Position of the FIB in an optical transmission system................................................................13-55
Figure 13-35 Functional block diagram of the FIB..........................................................................................13-56
Figure 13-36 Front panel of the FIB................................................................................................................13-57
Figure 14-1 Functional block diagram of the SAP.............................................................................................14-4
Figure 14-2 Jumpers on the SAP........................................................................................................................14-6
Figure 14-5 Functional block diagram of the SEI............................................................................................14-12
Figure 14-6 Front panel of the SEI...................................................................................................................14-12
Figure 14-7 Connections for alarm input, alarm cascading, and alarm output................................................14-18
Figure 14-8 Connection of cabinet alarm indicators........................................................................................14-19
Figure 14-9 Functional block diagram of the XE1FAN...................................................................................14-21
Figure 14-10 Modular fan tray assembly.........................................................................................................14-22
Figure 15-1 Position of the BA in an optical transmission system....................................................................15-2
Figure 15-2 Functional block diagram of the BA2............................................................................................15-4
Figure 15-3 Front panel of the one-interface BA2.............................................................................................15-6
Figure 15-4 Front panel of the two-interface BA2.............................................................................................15-7
Figure 15-5 Position of the BA and PA in an optical transmission system.....................................................15-11
Figure 15-8 Front panel of the BPA.................................................................................................................15-14
Figure 15-9 Appearance of the 61COA/N1COA (PA)....................................................................................15-19
Figure 15-10 Appearance of the 62COA..........................................................................................................15-20
Figure 15-11 Application of the 62COA..........................................................................................................15-21
Figure 15-12 Functional block diagram of the 61COA/N1COA.....................................................................15-22
Figure 15-13 Front panel of the 61COA/N1COA............................................................................................15-23
Figure 15-14 Front panel of the 62COA..........................................................................................................15-24
Figure 15-15 SC/PC fiber connector................................................................................................................15-24
Figure 15-16 LSH flange and fiber connector..................................................................................................15-25
Figure 15-17 Position of the 61COA in the ETSI cabinet...............................................................................15-27
Figure 15-19 Functional block diagram of the RPC01 (forward pump)..........................................................15-32
Figure 15-23 Functional block diagram of the RPC02 (backward pump).......................................................15-39
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xcvii

Figure 15-26 Position of the OBU1 in an optical transmission system...........................................................15-45

Figure 15-27 Functional block diagram of the OBU1.....................................................................................15-46
Figure 15-28 Front panel of the OBU1............................................................................................................15-48
Figure 16-1 Application of the UPM on the OptiX OSN equipment series.......................................................16-3
Figure 16-2 Appearance of the EPS75-4815AF power system..........................................................................16-3
Figure 16-3 Front panel of the EPS75-4815AF power system..........................................................................16-5
Figure 16-4 Application of the PIU on the OptiX OSN equipment series.........................................................16-9
Figure 16-5 Functional block diagram of the PIU...........................................................................................16-10
Figure 16-6 Front panel of the PIU..................................................................................................................16-11
Figure 16-7 Application of the PIUA on the OptiX OSN equipment series....................................................16-14
Figure 16-8 Functional block diagram of the PIUA.........................................................................................16-15
Figure 16-9 Front panel of the PIUA...............................................................................................................16-15
Figure 17-1 SFP/eSFP optical module...............................................................................................................17-2
Figure 17-2 XFP optical module........................................................................................................................17-2
Figure 17-3 SFP electrical module.....................................................................................................................17-3
Figure 17-4 Label of a pluggable optical module..............................................................................................17-3
Figure 18-1 Appearance of the LC/PC fiber connector......................................................................................18-3
Figure 18-2 Appearance of the SC/PC fiber connector......................................................................................18-4
Figure 18-3 Appearance of the FC/PC fiber connector......................................................................................18-4
Figure 18-4 Appearance of the LSH/APC fiber connector................................................................................18-4
Figure 18-5 Structure of the –48 V/BGND power cable of the cabinet ............................................................18-6
Figure 18-6 Structure of the PGND power cable of the cabinet (JG2)..............................................................18-6
Figure 18-7 Structure of the PGND power cable of the cabinet (OT)...............................................................18-6
Figure 18-8 Structure of the grounding cable of the cabinet door.....................................................................18-8
Figure 18-9 Structure of the power cable for the...............................................................................................18-9
Figure 18-10 Structure of the COA power cable..............................................................................................18-10
Figure 18-11 Structure of the UPM power cable.............................................................................................18-11
Figure 18-12 Structure of the RPC power cable..............................................................................................18-13
Figure 18-13 Structure of the cabinet indicator cable......................................................................................18-15
Figure 18-14 Structure of the indicator cascading cable between subracks or the alarm cascading cable between
the OptiX OSN equipment................................................................................................................................18-16
Figure 18-15 Structure of the alarm cascading cable between the OptiX OSN equipment and the other Huawei
Figure 18-16 Structure of the alarm input/output cable...................................................................................18-19
Figure 18-17 Structure of the OAM serial port cable.......................................................................................18-21
Figure 18-18 Structure of the serial 1–4/F1/F&f serial port cable...................................................................18-23
Figure 18-19 Structure of the RS-232/RS-422 serial port cable......................................................................18-24
Figure 18-20 Structure of the ordinary telephone line.....................................................................................18-25
Figure 18-21 Structure of the COA cascading cable........................................................................................18-27
Figure 18-22 Structure of the straight through cable........................................................................................18-28
Figure 18-23 Structure of the crossover cable..................................................................................................18-29
Figure 18-24 Structure of the 75-ohm 8xE1 cable...........................................................................................18-31
Figure 18-25 Structure of the 120-ohm 8xE1 cable.........................................................................................18-34
xcviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Figure 18-26 Structure of the E3/T3/STM-1 cable.......................................................................................... 18-36

Figure 18-27 Structure of the V.35 DCE cable................................................................................................ 18-39
Figure 18-28 Structure of the V.35 DTE cable................................................................................................ 18-40
Figure 18-29 Structure of the V.24 DCE cable................................................................................................ 18-42
Figure 18-30 Structure of the V.24 DTE cable................................................................................................ 18-44
Figure 18-31 Structure of the X.21 DCE cable................................................................................................ 18-45
Figure 18-32 Structure of the X.21 DTE cable................................................................................................ 18-47
Figure 18-37 Structure of the 75-ohm clock cable...........................................................................................18-56
Figure 18-38 Structure of the 120-ohm clock cable.........................................................................................18-56
Figure 18-39 Structure of the one-channel 75-ohm-to-120-ohm clock transit cable....................................... 18-58
Figure 18-40 Structure of the two-channel 75-ohm-to-120-ohm clock transit cable.......................................18-58
Figure 20-1 Positions of the labels affixed to the OptiX OSN 2500 subrack....................................................20-4
Figure 20-2 Positions of the labels affixed to the board.....................................................................................20-5
Figure 23-1 Configuring the F&f debugging serial port and OAM NM port....................................................23-6
Figure 23-2 Connection for testing the frequency accuracy of the free-run clock.............................................23-7
Figure 23-3 Connection for testing the clock holdover accuracy.......................................................................23-8
Figure 23-4 Connection for testing the loopback function when the FC flow control function is disabled
...........................................................................................................................................................................23-13
Figure 23-5 Connection for testing the connection to the FC switch when the FC flow control function is disabled
...........................................................................................................................................................................23-14
Issue 06 (2011-01-20) Huawei Proprietary and Confidential xcix

Hardware Description Tables
Tables
Table 2-1 Comparison between the specifications of the T63 cabinet and the specifications of the N63E cabinet
...............................................................................................................................................................................2-4
Table 2-2 Specifications of the N66T cabinet......................................................................................................2-9
Table 2-3 Meanings of the status of the indicators.............................................................................................2-11
Table 2-4 Connections of the output terminal blocks on side A and side B......................................................2-12
Table 2-5 Technical specifications of the ETSI cabinet.....................................................................................2-13
Table 2-6 Technical specifications of the PDU..................................................................................................2-14
Table 3-1 Mapping relation between slots for interface boards and slots for processing boards for the OptiX OSN
2500.......................................................................................................................................................................3-5
Table 3-2 Paired slots........................................................................................................................................... 3-5
Table 3-3 Mapping policies of power consumption on the OptiX OSN 2500...................................................3-11
Table 3-4 Dimensions and weight of the OptiX OSN 2500 subrack.................................................................3-11
Table 3-5 Maximum power consumption of the OptiX OSN 2500 subrack......................................................3-12
Table 4-1 Appearances and dimensions of boards used on the OptiX OSN 2500...............................................4-2
Table 4-2 SDH boards that the OptiX OSN 2500 supports..................................................................................4-5
Table 4-3 PDH boards that the OptiX OSN 2500 supports..................................................................................4-6
Table 4-4 EoS/EoP Boards that the OptiX OSN 2500 supports...........................................................................4-6
Table 4-5 ATM boards that the OptiX OSN 2500 supports.................................................................................4-7
Table 4-6 RPR Boards that the OptiX OSN 2500 supports................................................................................. 4-8
Table 4-7 SCC unit, cross-connect unit, and line unit integrated boards that the OptiX OSN 2500 supports
...............................................................................................................................................................................4-8
Table 4-8 Auxiliary boards that the OptiX OSN 2500 supports.......................................................................... 4-8
Table 4-9 WDM boards the OptiX OSN 2500 supports...................................................................................... 4-9
Table 4-10 Microwave boards that the OptiX OSN 2500 supports..................................................................... 4-9
Table 4-11 Optical amplifier boards that the OptiX OSN 2500 supports..........................................................4-10
Table 4-12 Power boards that the OptiX OSN 2500 supports...........................................................................4-10
Table 5-1 Versions of the CXL1.......................................................................................................................... 5-3
Table 5-2 Functions and features of the SDH processing unit of the CXL1........................................................5-4
Table 5-3 Functions and features of the SCC unit of the CXL1.......................................................................... 5-5
Table 5-4 Functions and features of the cross-connect unit of the CXL1............................................................5-6
Table 5-5 Functions and features of the clock unit of the CXL1......................................................................... 5-7
Table 5-6 Optical interface and switches of the CXL1......................................................................................5-14
Table 5-7 Jumper J3 of the Q2CXL1 and jumper J7 of the Q3CXL1................................................................5-16
Table 5-8 DIP switch SW1 of the Q2CXL1 and DIP switch SW2 of the Q3CXL1..........................................5-16
Issue 06 (2011-01-20) Huawei Proprietary and Confidential ci

Tables Hardware Description
Table 5-9 DIP switch SW1/SW2........................................................................................................................5-17

Table 5-10 Relationship between the feature code of the CXL1 and the type of optical interface....................5-17
Table 5-11 Logical slots displayed on the U2000 for the CXL1........................................................................5-20
Table 5-12 Methods used to troubleshoot the faults that occur on the CXL1 frequently..................................5-21
Table 5-13 Parameters specified for the optical interfaces of the CXL1...........................................................5-28
Table 5-14 Versions of the CXL4......................................................................................................................5-31
Table 5-15 Functions and features of the SDH processing unit of the CXL4....................................................5-32
Table 5-16 Functions and features of the SCC unit of the CXL4......................................................................5-33
Table 5-17 Functions and features of the cross-connect unit of the CXL4........................................................5-34
Table 5-18 Functions and features of the clock unit of the CXL4.....................................................................5-35
Table 5-19 Optical interface and switches of the CXL4....................................................................................5-42
Table 5-20 Jumper J3 of the Q2CXL4 and jumper J7 of the Q3CXL4..............................................................5-44
Table 5-21 DIP switch SW1 of the Q2CXL4 and DIP switch SW2 of the Q3CXL4........................................5-44
Table 5-22 DIP switch SW1/SW2......................................................................................................................5-45
Table 5-27 Versions of the CXL16....................................................................................................................5-59
Table 5-28 Functions and features of the SDH processing unit of the CXL16..................................................5-60
Table 5-29 Functions and features of the SCC unit of the CXL16....................................................................5-61
Table 5-30 Functions and features of the cross-connect unit of the CXL16......................................................5-62
Table 5-31 Functions and features of the clock unit of the CXL16...................................................................5-63
Table 5-32 Optical interface and switches of the CXL16..................................................................................5-70
Table 5-33 Jumper J3 of the Q2CXL16 and jumper J7 of the Q3CXL16..........................................................5-72
Table 5-34 DIP switch SW1 of the Q2CXL16 and DIP switch SW2 of the Q3CXL16....................................5-72
Table 5-36 Relationship between the feature code of the CXL16 and the type of optical interface..................5-73
Table 5-37 Logical slots displayed on the U2000 for the CXL16......................................................................5-76
Table 5-38 Methods used to troubleshoot the faults that occur on the CXL16 frequently................................5-77
Table 5-39 Parameters specified for the optical interfaces of the CXL16.........................................................5-84
Table 5-40 Parameters specified for the colored optical interfaces of the Q2CXL16........................................5-84
Table 5-41 Functions and features of the SDH processing unit of the CXLLN................................................5-88
Table 5-42 Functions and features of the SCC unit of the CXLLN...................................................................5-89
Table 5-43 Functions and features of the cross-connect unit of the CXLLN.....................................................5-90
Table 5-44 Functions and features of the clock unit of the CXLLN..................................................................5-91
Table 5-45 Optical interface and switches of the CXLLN.................................................................................5-96
Table 5-46 Jumpers of the Q5CXLLN...............................................................................................................5-97
Table 5-47 DIP switch of the CXLLN...............................................................................................................5-98
Table 5-48 DIP switch SW1...............................................................................................................................5-98
Table 5-49 Logical slots displayed on the U2000 for the Q5CXLLN (when the old backplane is used)........5-101
cii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 5-51 Methods used to troubleshoot the faults that occur on the CXLLN frequently.............................5-102
Table 5-52 Parameters specified for the optical interfaces of the CXLLN when the STM-1 optical module is used
...........................................................................................................................................................................5-108
...........................................................................................................................................................................5-109
...........................................................................................................................................................................5-109
Table 5-55 Parameters specified for the optical interfaces of the CXLLN when the STM-16 colored optical module
is used................................................................................................................................................................5-110
Table 5-56 Functions and features of the SDH processing unit of the CXLQ41.............................................5-114
Table 5-57 Functions and features of the SCC unit of the CXLQ41...............................................................5-115
Table 5-58 Functions and features of the cross-connect unit of the CXLQ41.................................................5-116
Table 5-59 Functions and features of the clock unit of the CXLQ41..............................................................5-116
Table 5-60 Optical interfaces and switches of the CXLQ41............................................................................5-122
Table 5-61 Jumpers of the Q5CXLQ41...........................................................................................................5-123
Table 5-62 DIP switch of the CXLQ41............................................................................................................5-124
Table 5-63 DIP switch SW1.............................................................................................................................5-124
Table 5-64 Logical slots displayed on the U2000 for the Q5CXLQ41 (when the new backplane is used).....5-127
Table 5-65 Logical slots displayed on the U2000 for the Q5CXLQ41 (when the old backplane is used)......5-128
Table 5-66 Methods used to troubleshoot the faults that occur on the CXLQ41 frequently............................5-128
Table 5-67 Parameters specified for the optical interfaces of the CXLQ41 when the STM-1 optical module is used
...........................................................................................................................................................................5-134
...........................................................................................................................................................................5-135
Table 6-1 Versions of the SL1..............................................................................................................................6-4
Table 6-2 Functions and features of the SL1........................................................................................................6-5
Table 6-3 Optical interfaces of the SL1..............................................................................................................6-10
Table 6-4 Relationship between the feature code of the SL1 and the type of optical interface.........................6-11
Table 6-5 Methods used to troubleshoot the faults that occur on the SL1 frequently........................................6-14
Table 6-6 Parameters specified for the optical interfaces of the SL1.................................................................6-20
Table 6-7 Functions and features of the SL1A...................................................................................................6-22
Table 6-8 Optical interfaces of the SL1A...........................................................................................................6-27
Table 6-9 Relationship between the feature code of the SL1A and the type of optical interface......................6-27
Table 6-10 Parameters specified for the optical interfaces of the SL1A............................................................6-28
Table 6-11 Versions of the SLQ1.......................................................................................................................6-30
Table 6-12 Functions and features of the SLQ1.................................................................................................6-31
Table 6-13 Optical interfaces of the SLQ1.........................................................................................................6-36
Table 6-14 Relationship between the feature code of the SLQ1 and the type of optical interface....................6-37
Table 6-15 Parameters specified for the optical interfaces of the SLQ1............................................................6-38
Table 6-16 Functions and features of the SLQ1A..............................................................................................6-41
Table 6-17 Optical interfaces of the SLQ1A......................................................................................................6-46
Table 6-18 Relationship between the feature code of the SLQ1A and the type of optical interface................. 6-46
Table 6-19 Parameters specified for the optical interfaces of the SLQ1A.........................................................6-47
Table 6-20 Versions of the SLO1.......................................................................................................................6-49
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Table 6-21 Functions and features of the SLO1 board.......................................................................................6-50

Table 6-22 Optical interfaces of the SLO1.........................................................................................................6-55
Table 6-23 Relationship between the feature code of the SLO1 and the type of optical interface.................... 6-55
Table 6-24 Parameters specified for the optical interfaces of the SLO1............................................................6-56
Table 6-25 Functions and features of the SLT1................................................................................................. 6-59
Table 6-26 Optical interfaces of the SLT1......................................................................................................... 6-64
Table 6-27 Relationship between the feature code of the SLT1 and the type of optical interface.....................6-64
Table 6-28 Parameters specified for the optical interfaces of the SLT1............................................................ 6-65
Table 6-29 Functions and features of the SEP1................................................................................................. 6-68
Table 6-30 Access capabilities of the SEP1 when the SEP1 works with different interface boards and electrical
interface switching boards...................................................................................................................................6-69
Table 6-31 Electrical interfaces of the SEP1......................................................................................................6-75
Table 6-32 Slots for the SEP, EU08, and TSB8.................................................................................................6-77
Table 6-33 Methods used to troubleshoot the faults that occur on the SEP1 frequently....................................6-80
Table 6-34 Parameters specified for the interfaces of the SEP1........................................................................ 6-83
Table 6-35 Versions of the SL4..........................................................................................................................6-84
Table 6-36 Functions and features of the SL4....................................................................................................6-85
Table 6-37 Optical interfaces of the SL4............................................................................................................6-90
Table 6-38 Relationship between the feature code of the SL4 and the type of optical interface....................... 6-91
Table 6-39 Parameters specified for the optical interfaces of the SL4...............................................................6-92
Table 6-40 Functions and features of the SL4A.................................................................................................6-94
Table 6-41 Optical interfaces of the SL4A.........................................................................................................6-99
Table 6-42 Relationship between the feature code of the SL4A and the type of optical interface.................... 6-99
Table 6-43 Parameters specified for the optical interfaces of the SL4A..........................................................6-100
Table 6-44 Versions of the SLD4.....................................................................................................................6-102
Table 6-45 Functions and features of the SLD4...............................................................................................6-103
Table 6-46 Optical interfaces of the SLD4.......................................................................................................6-108
Table 6-47 Relationship between the feature code of the SLD4 and the type of optical interface..................6-109
Table 6-48 Parameters specified for the optical interfaces of the SLD4..........................................................6-110
Table 6-49 Functions and features of the SLD4A............................................................................................6-113
Table 6-50 Optical interfaces of the SLD4A....................................................................................................6-118
Table 6-51 Relationship between the feature code of the SLD4A and the type of optical interface...............6-118
Table 6-52 Parameters specified for the optical interfaces of the SLD4A.......................................................6-119
Table 6-53 Versions of the SLQ4.....................................................................................................................6-121
Table 6-54 Functions and features of the SLQ4...............................................................................................6-122
Table 6-55 Optical interfaces of the SLQ4.......................................................................................................6-127
Table 6-56 Relationship between the feature code of the SLQ4 and the type of optical interface..................6-128
Table 6-57 Parameters specified for the optical interfaces of the SLQ4..........................................................6-128
Table 6-58 Functions and features of the SLQ4A............................................................................................6-131
Table 6-59 Optical interfaces of the SLQ4A....................................................................................................6-136
Table 6-60 Relationship between the feature code of the SLQ4A and the type of optical interface...............6-136
Table 6-61 Parameters specified for the optical interfaces of the SLQ4A.......................................................6-137
Table 6-62 Versions of the SL16......................................................................................................................6-139
civ Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 6-63 Functions and features of the SL16................................................................................................6-140

Table 6-64 Optical interfaces of the SL16........................................................................................................6-146
Table 6-65 Relationship between the feature code of the SL16 and the type of optical interface...................6-146
Table 6-66 Parameters specified for the optical interfaces of the SL16...........................................................6-147
Table 6-67 Parameters specified for the colored optical interfaces of the N3SL16.........................................6-148
Table 6-69 Functions and features of the SL16A.............................................................................................6-152
Table 6-70 Optical interfaces of the SL16A.....................................................................................................6-157
Table 6-71 Relationship between the feature code of the SL16A and the type of optical interface................6-157
Table 6-72 Methods used to troubleshoot the faults that occur on the SL16A frequently...............................6-160
Table 6-73 Parameters specified for the optical interfaces of the SL16A........................................................6-167
Table 6-74 Functions and features of the SF16................................................................................................6-169
Table 6-75 Optical interfaces of the SF16........................................................................................................6-175
Table 6-76 Relationship between the feature code of the SF16 and the type of optical interface...................6-175
Table 6-77 Parameters specified for the optical interfaces of the SF16...........................................................6-176
Table 6-78 Parameters specified for the colored optical interfaces of the SF16..............................................6-177
Table 6-79 Functions and features of the SLQ41.............................................................................................6-180
Table 6-80 Optical interfaces of the SLQ41.....................................................................................................6-185
Table 6-81 Relationship between the feature code of the SLQ41 and the type of optical interface................6-186
Table 6-82 Methods used to troubleshoot the faults that occur on the SLQ41 frequently...............................6-188
Table 6-83 Parameters specified for the optical interfaces of the SLQ41 when the STM-1 optical module is used
...........................................................................................................................................................................6-192
...........................................................................................................................................................................6-192
Table 6-85 Interfaces of the EU04...................................................................................................................6-196
Table 6-86 Slots valid for the SEP and the corresponding slots for the EU04.................................................6-197
Table 6-87 Parameters specified for the electrical interfaces of the EU04......................................................6-197
Table 6-91 Versions of the OU08.....................................................................................................................6-203
Table 6-92 Interfaces of the N1OU08..............................................................................................................6-206
Table 6-94 Slots valid for the SEP1 and the corresponding slots for the OU08..............................................6-207
Table 6-95 Parameters specified for the optical interfaces of the OU08..........................................................6-208
Table 6-96 Parameters specified for the electrical interfaces of the N1OU08.................................................6-208
Table 7-1 Versions of the PD1.............................................................................................................................7-4
Table 7-2 Functions and features of the PD1.......................................................................................................7-5
Table 7-3 Slots valid for the PD1 and the corresponding slots for the D75S, D12S, and D12B.........................7-9
Table 7-4 Relationship between the feature code of the PD1 and the type of interface impedance..................7-10
Table 7-5 Slot configuration for the 1:2 TPS protection of the PD1..................................................................7-12
Table 7-6 Versions of the PQ1...........................................................................................................................7-14
Table 7-7 Functions and features of the PQ1.....................................................................................................7-16
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Table 7-8 Slots valid for the PQ1 and the corresponding slots for the D75S, D12S, and D12B....................... 7-20
Table 7-9 Relationship between the feature code of the PQ1 and the type of interface impedance.................. 7-21
Table 7-10 Slot configuration for the 1:4 TPS protection of the PQ1................................................................7-22
Table 7-11 Methods used to troubleshoot the faults that occur on the PQ1 frequently..................................... 7-24
Table 7-12 Functions and features of the PQM..................................................................................................7-29
Table 7-13 Slots valid for the PQM and the corresponding slots for the D12S and D12B................................7-34
Table 7-14 Slot configuration for the 1:4 TPS protection of the PQM.............................................................. 7-35
Table 7-15 Methods used to troubleshoot the faults that occur on the PQM frequently....................................7-38
Table 7-16 Versions of the PL3..........................................................................................................................7-42
Table 7-17 Functions and features of the PL3....................................................................................................7-43
Table 7-18 Slots valid for the PL3 and the corresponding slots for the C34S................................................... 7-48
Table 7-19 Slot configuration for the 1:1 TPS protection of the PL3................................................................ 7-49
Table 7-20 Slots for the PL3, C34S, and TSB8/TSB4....................................................................................... 7-50
Table 7-21 Methods used to troubleshoot the faults that occur on the PL3 frequently......................................7-52
Table 7-22 Versions of the PL3A.......................................................................................................................7-57
Table 7-23 Functions and features of the PL3A.................................................................................................7-58
Table 7-24 Methods used to troubleshoot the faults that occur on the PL3A frequently...................................7-65
Table 7-25 Parameters specified for the electrical interfaces of the PL3A........................................................ 7-68
Table 7-26 Versions of the PD3......................................................................................................................... 7-70
Table 7-27 Functions and features of the PD3................................................................................................... 7-71
Table 7-28 Slots valid for the PD3 and the corresponding slots for the D34S...................................................7-75
Table 7-29 Slot configuration for the 1:1 TPS protection of the PD3................................................................7-76
Table 7-30 Slots for the PD3, D34S, and TSB8.................................................................................................7-77
Table 7-31 Functions and features of the PQ3................................................................................................... 7-80
Table 7-32 Slots valid for the PQ3 and the corresponding slots for the D34S...................................................7-84
Table 7-34 Slots for the PQ3, D34S, and TSB8.................................................................................................7-86
Table 7-35 Functions and features of the DX1...................................................................................................7-89
Table 7-36 Slots valid for the DX1 and the corresponding slots for the DM12.................................................7-93
Table 7-37 Relationship between the feature code of the DX1 and the type of interface impedance................7-93
Table 7-38 Slots for the DX1 and DM12........................................................................................................... 7-95
Table 7-39 Methods used to troubleshoot the faults that occur on the DX1 frequently.....................................7-97
Table 7-40 Functions and features of the DXA................................................................................................7-101
Table 7-41 Versions of the SPQ4.....................................................................................................................7-106
Table 7-42 Functions and features of the SPQ4...............................................................................................7-107
Table 7-43 Slots valid for the SPQ4 and the corresponding slots for the MU04.............................................7-113
Table 7-44 Slots for the SPQ4, MU04, and TSB8/TSB4.................................................................................7-115
Table 7-45 Methods used to troubleshoot the faults that occur on the SPQ4 frequently.................................7-117
Table 7-46 Interfaces of the D12B...................................................................................................................7-124
Table 7-47 Pin assignments of the DB44 interface..........................................................................................7-124
Table 7-48 Slots valid for the PQ1/PQM/PD1 and the corresponding slots for the D12B..............................7-125
Table 7-49 Parameters specified for the electrical interfaces of the D12B......................................................7-125
cvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 7-50 Interfaces of the D12S....................................................................................................................7-129

Table 7-52 Slots valid for the PQ1/PD1/PQM and the corresponding slots for the D12S...............................7-131
Table 7-53 Parameters specified for the electrical interfaces of the D12S.......................................................7-131
Table 7-56 Slots valid for the PQ1 and the corresponding slots for the D75S.................................................7-136
Table 7-60 Interfaces of the C34S....................................................................................................................7-144
Table 7-61 Slots valid for the PL3 and the corresponding slots for the C34S.................................................7-144
Table 7-62 Parameters specified for the electrical interfaces of the C34S.......................................................7-144
Table 7-63 Interfaces of the MU04..................................................................................................................7-148
Table 7-65 Parameters specified for the electrical interfaces of the MU04.....................................................7-149
Table 7-66 Interfaces of the DM12..................................................................................................................7-153
Table 7-69 Slots valid for the DX1 and the corresponding slots for the DM12...............................................7-155
Table 7-70 Parameters specified for the electrical interfaces of the DM12.....................................................7-155
Table 7-71 Slots valid for the TSB4 and the corresponding slots for the SPQ4 and MU04............................7-158
Table 7-72 Slots valid for the TSB4 and the corresponding slots for the SEP1 and EU04.............................7-159
Table 7-73 Slots valid for the TSB4 and the corresponding slots for the PL3 and C34S................................7-159
Table 7-76 Slots valid for the TSB8 and the corresponding slots for the PD3 and D34S...............................7-163
Table 7-77 Slots valid for the TSB8 and the corresponding slots for the PQ3 and D34S...............................7-163
Table 7-80 Slots valid for the TSB8 and the corresponding slots for the EFS0 and ETS8..............................7-164
Table 8-1 Functions and features of the EFT4.....................................................................................................8-5
Table 8-2 Interfaces of the EFT4..........................................................................................................................8-9
Table 8-3 Pins of the RJ-45 connector...............................................................................................................8-10
Table 8-4 Methods used to troubleshoot the faults that occur on the EFT4 frequently.....................................8-13
Table 8-5 SDH....................................................................................................................................................8-15
Table 8-6 SDH....................................................................................................................................................8-15
Table 8-7 Statistics of RMON basic performance..............................................................................................8-15
Table 8-8 Statistics of RMON extended performance.......................................................................................8-15
Table 8-9 Parameters specified for the optical interfaces of the EFT4..............................................................8-17
Table 8-10 Throughput specifications of the EFT4............................................................................................8-18
Table 8-11 Packet loss ratio in the case of overloading of the EFT4.................................................................8-19
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cvii

Table 8-12 Latency specifications of the EFT4..................................................................................................8-19

Table 8-13 Back-to-back specifications of the EFT4.........................................................................................8-20
Table 8-14 Versions of the EFT8.......................................................................................................................8-22
Table 8-15 Functions and features of the EFT8.................................................................................................8-23
Table 8-16 Interfaces of the EFT8......................................................................................................................8-29
Table 8-17 Pins of the RJ-45 connector ............................................................................................................8-29
Table 8-18 Methods used to troubleshoot the faults that occur on the EFT8 frequently...................................8-33
Table 8-19 SDH..................................................................................................................................................8-35
Table 8-20 RMON alarm....................................................................................................................................8-36
Table 8-21 Statistics of RMON basic performance............................................................................................8-36
Table 8-22 Statistics of RMON extended performance.....................................................................................8-36
Table 8-23 SDH..................................................................................................................................................8-37
Table 8-24 RMON alarm....................................................................................................................................8-37
Table 8-27 Statistics of specific events of RMON performance........................................................................8-37
Table 8-28 Parameters specified for the optical interfaces of the EFT8............................................................8-38
Table 8-33 Versions of the EFT8A....................................................................................................................8-44
Table 8-34 Functions and features of the EFT8A..............................................................................................8-45
Table 8-35 Interfaces of the EFT8A...................................................................................................................8-51
Table 8-36 Pins of the RJ-45 connector.............................................................................................................8-51
Table 8-37 Methods used to troubleshoot the faults that occur on the EFT8A frequently................................8-54
Table 8-38 SDH..................................................................................................................................................8-57
Table 8-39 SDH..................................................................................................................................................8-57
Table 8-42 SDH..................................................................................................................................................8-58
Table 8-43 RMON alarm....................................................................................................................................8-59
Table 8-47 Parameters specified for the optical interfaces of the EFT8A.........................................................8-60
Table 8-48 Throughput specifications of the EFT8A.........................................................................................8-62
Table 8-49 Packet loss ratio in the case of overloading of the EFT8A..............................................................8-63
Table 8-50 Latency specifications of the EFT8A...............................................................................................8-63
Table 8-51 Back-to-back specifications of the EFT8A......................................................................................8-64
Table 8-52 Versions of the EGT2.......................................................................................................................8-66
Table 8-53 Functions and features of the EGT2.................................................................................................8-67
cviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 8-54 Optical interfaces of the N1EGT2/N2EGT2....................................................................................8-74

Table 8-55 Electrical interfaces of the N2EGT2................................................................................................ 8-74
Table 8-56 Pin assignments of the RJ-45 interface of the N2EGT2.................................................................. 8-74
Table 8-57 Relationship between the feature code of the EGT2 and the type of interface................................8-75
Table 8-58 Methods used to troubleshoot the faults that occur on the EGT2 frequently...................................8-78
Table 8-59 SDH..................................................................................................................................................8-80
Table 8-60 RMON alarm....................................................................................................................................8-80
Table 8-62 Statistics of RMON extended performance..................................................................................... 8-81
Table 8-63 SDH..................................................................................................................................................8-81
Table 8-64 RMON alarm....................................................................................................................................8-82
Table 8-66 Statistics of RMON extended performance..................................................................................... 8-82
Table 8-67 Parameters specified for the optical interfaces of the EGT2............................................................8-83
Table 8-68 Parameters specified for the electrical interfaces of the EGT2........................................................8-84
Table 8-69 Throughput specifications of the N1EGT2......................................................................................8-86
Table 8-70 Packet loss ratio in the case of overloading of the N1EGT2........................................................... 8-87
Table 8-71 Latency specifications of the N1EGT2............................................................................................ 8-87
Table 8-72 Back-to-back specifications of the N1EGT2................................................................................... 8-88
Table 8-74 Packet loss ratio in the case of overloading of the N2EGT2........................................................... 8-90
Table 8-75 Latency specifications of the N2EGT2............................................................................................ 8-91
Table 8-76 Back-to-back specifications of the N2EGT2................................................................................... 8-92
Table 8-77 Versions of the EFS0....................................................................................................................... 8-94
Table 8-78 Functions and features of the EFS0................................................................................................. 8-95
Table 8-79 Slots valid for the EFS0 and the corresponding slots for the ETF8 and EFF8..............................8-104
Table 8-80 Slots for the EFS0, ETS8, and TSB8.............................................................................................8-105
Table 8-81 Methods used to troubleshoot the faults that occur on the EFS0 frequently..................................8-107
Table 8-82 SDH................................................................................................................................................8-111
Table 8-83 RMON alarm..................................................................................................................................8-112
Table 8-84 Statistics of RMON basic performance..........................................................................................8-112
Table 8-85 Statistics of RMON extended performance...................................................................................8-112
Table 8-86 SDH................................................................................................................................................8-113
Table 8-87 RMON alarm..................................................................................................................................8-113
Table 8-90 SDH................................................................................................................................................8-114
Table 8-91 RMON alarm..................................................................................................................................8-114
Table 8-94 SDH................................................................................................................................................8-116
Table 8-95 RMON alarm..................................................................................................................................8-116
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cix


Table 8-98 Statistics of RMON VCG performance.........................................................................................8-117
Table 8-99 Throughput specifications of the N4EFS0.....................................................................................8-119
Table 8-100 Packet loss ratio in the case of overloading of the N4EFS0........................................................8-119
Table 8-101 Latency specifications of the N4EFS0.........................................................................................8-120
Table 8-102 Back-to-back specifications of the N4EFS0................................................................................8-121
Table 8-103 Throughput specifications of the N5EFS0...................................................................................8-123
Table 8-107 Functions and features of the EFS0A...........................................................................................8-128
Table 8-108 Slots valid for the EFS0A and the corresponding slots for the ETF8 and EFF8.........................8-136
Table 8-109 Slots for the EFS0A, ETS8, and TSB8........................................................................................8-137
Table 8-110 Methods used to troubleshoot the faults that occur on the EFS0A frequently.............................8-140
Table 8-111 SDH..............................................................................................................................................8-142
Table 8-112 RMON alarm................................................................................................................................8-142
Table 8-113 Statistics of RMON basic performance........................................................................................8-143
Table 8-114 Statistics of RMON extended performance.................................................................................8-143
Table 8-115 Statistics of RMON VCG performance.......................................................................................8-143
Table 8-116 Throughput specifications of the EFS0A.....................................................................................8-145
Table 8-117 Packet loss ratio in the case of overloading of the EFS0A..........................................................8-146
Table 8-118 Latency specifications of the EFS0A...........................................................................................8-147
Table 8-119 Back-to-back specifications of the EFS0A..................................................................................8-147
Table 8-120 Versions of the EFS4...................................................................................................................8-149
Table 8-121 Functions and features of the EFS4.............................................................................................8-151
Table 8-122 Interfaces of the EFS4..................................................................................................................8-158
Table 8-123 Pins of the RJ-45 connector.........................................................................................................8-158
Table 8-124 Methods used to troubleshoot the faults that occur on the EFS4 frequently................................8-162
Table 8-125 SDH..............................................................................................................................................8-165
Table 8-126 RMON alarm................................................................................................................................8-165
Table 8-129 SDH..............................................................................................................................................8-166
Table 8-130 RMON alarm................................................................................................................................8-166
Table 8-133 SDH..............................................................................................................................................8-168
Table 8-134 RMON alarm................................................................................................................................8-168
cx Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 8-138 Parameters specified for the optical interfaces of the EFS4.........................................................8-170
Table 8-147 Functions and features of the EFP0 board ..................................................................................8-181
Table 8-148 Slots valid for the EFP0 and the corresponding slots for the ETF8 and EFF8............................8-187
Table 8-149 Methods used to rectify the faults that occur on the EFP0 frequently.........................................8-190
Table 8-150 SDH..............................................................................................................................................8-192
Table 8-151 RMON alarm................................................................................................................................8-192
Table 8-155 Parameters specified for the optical interfaces of the EFP0.........................................................8-194
Table 8-156 Parameters specified for the electrical interfaces of the EFP0.....................................................8-194
Table 8-157 Throughput specifications of the EFP0........................................................................................8-196
Table 8-158 Packet loss ratio in the case of overloading of the EFP0.............................................................8-196
Table 8-159 Delay specifications of the EFP0.................................................................................................8-197
Table 8-160 Back-to-back specifications of the EFP0.....................................................................................8-198
Table 8-161 Versions of the EGS2...................................................................................................................8-200
Table 8-162 Functions and features of the EGS2.............................................................................................8-201
Table 8-163 Optical interfaces of the N2EGS2/N3EGS2................................................................................8-209
Table 8-164 Electrical interfaces of the N3EGS2............................................................................................8-209
Table 8-165 Pin assignments of the RJ-45 interface of the N3EGS2..............................................................8-209
Table 8-166 Relationship between the feature code of the EGS2 and the type of interface............................8-210
Table 8-167 Methods used to troubleshoot the faults that occur on the EGS2 frequently...............................8-213
Table 8-168 SDH..............................................................................................................................................8-216
Table 8-169 RMON alarm................................................................................................................................8-216
Table 8-172 SDH..............................................................................................................................................8-217
Table 8-173 RMON alarm................................................................................................................................8-217
Table 8-177 Parameters specified for the optical interfaces of the EGS2........................................................8-219
Table 8-178 Parameters specified for the electrical interfaces of the EGS2....................................................8-220
Table 8-179 Throughput specifications of the N2EGS2..................................................................................8-221
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxi

Table 8-180 Packet loss ratio in the case of overloading of the N2EGS2........................................................8-222
Table 8-181 Latency specifications of the N2EGS2........................................................................................8-223
Table 8-182 Back-to-back specifications of the N2EGS2................................................................................8-223
Table 8-187 Functions and features of the EMS2............................................................................................8-230
Table 8-188 Optical interfaces of the EMS2....................................................................................................8-239
Table 8-189 Electrical interfaces of the EMS2.................................................................................................8-239
Table 8-190 Pin assignments of the RJ-45 interface of the EMS2...................................................................8-239
Table 8-191 Slots valid for the EMS2 and the corresponding slots for the ETF8 and EFF8...........................8-240
Table 8-192 Relationship between the feature code of the EMS2 and the type of interface...........................8-241
Table 8-193 Methods used to troubleshoot the faults that occur on the EMS2 frequently..............................8-243
Table 8-194 SDH..............................................................................................................................................8-246
Table 8-195 RMON alarm................................................................................................................................8-246
Table 8-199 Parameters specified for the optical interfaces of the EMS2.......................................................8-248
Table 8-200 Parameters specified for the electrical interfaces of the EMS2...................................................8-248
Table 8-201 Throughput specifications of the EMS2 (three VC-3s is bound on the FE port).........................8-250
Table 8-202 Throughput specifications of the EMS2 (48 VC-12s are bound on the GE port)........................8-250
Table 8-203 Packet loss ratio in the case of overloading of the EMS2 (three VC-3s is bound on the FE port)
...........................................................................................................................................................................8-251
Table 8-204 Packet loss ratio in the case of overloading of the EMS2 (48 VC-12s are bound on the GE port)
...........................................................................................................................................................................8-252
Table 8-205 Latency specifications of the EMS2 (three VC-3s is bound on the FE port)...............................8-253
Table 8-206 Latency specifications of the EMS2 (48 VC-12s are bound on the GE port)..............................8-254
Table 8-207 Back-to-back specifications of the EMS2 (three VC-3s is bound on the FE port)......................8-254
Table 8-208 Back-to-back specifications of the EMS2 (48 VC-12s are bound on the GE port).....................8-255
Table 8-216 SDH..............................................................................................................................................8-278
Table 8-217 RMON alarm................................................................................................................................8-279
cxii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 8-222 Parameters specified for the electrical interfaces of the EMS4................................................... 8-280
Table 8-223 Throughput specifications of the EMS4 (one VC-4 is bound on the FE port)............................ 8-282
Table 8-224 Throughput specifications of the EMS4 (24 VC-3s are bound on the GE port)..........................8-282
Table 8-225 Packet loss ratio in the case of overloading of the EMS4 (one VC-4 is bound on the FE port)
...........................................................................................................................................................................8-283
...........................................................................................................................................................................8-284
Table 8-227 Latency specifications of the EMS4 (one VC-4 is bound on the FE port)...................................8-285
Table 8-228 Latency specifications of the EMS4 (24 VC-3s are bound on the GE port)................................8-286
Table 8-229 Back-to-back specifications of the EMS4 (one VC-4 is bound on the FE port)..........................8-287
Table 8-230 Back-to-back specifications of the EMS4 (24 VC-3s are bound on the GE port).......................8-287
Table 8-233 Optical interfaces of the N1EGS4/N3EGS4/N4EGS4.................................................................8-300
Table 8-234 Electrical interfaces of the N1EGS4/N4EGS4.............................................................................8-300
Table 8-235 Pin assignments of the RJ-45 interface of the N1EGS4/N4EGS4...............................................8-300
Table 8-238 SDH..............................................................................................................................................8-313
Table 8-239 RMON alarm................................................................................................................................8-314
Table 8-241 Statistics of RMON extended performance................................................................................. 8-314
Table 8-242 Statistics of RMON VCG performance....................................................................................... 8-314
Table 8-243 SDH..............................................................................................................................................8-315
Table 8-244 RMON alarm................................................................................................................................8-315
Table 8-248 SDH..............................................................................................................................................8-316
Table 8-249 RMON alarm................................................................................................................................8-317
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxiii


Table 8-263 Interfaces of the EFF8..................................................................................................................8-331
Table 8-264 Slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots for the EFF8.............8-331
Table 8-265 Slots valid for the EMS4 and the corresponding slots for the EFF8............................................8-331
Table 8-266 Parameters specified for the optical interfaces of the EFF8.........................................................8-332
Table 8-267 Interfaces of the EFF8A...............................................................................................................8-336
Table 8-268 Slots valid for the N5EFS0 and the corresponding slots for the EFF8A..................................... 8-336
Table 8-269 Parameters specified for the optical interfaces of the EFF8A......................................................8-336
Table 8-270 Interfaces of the ETF8..................................................................................................................8-340
Table 8-271 Pin assignments of the RJ-45 connector of the ETF8..................................................................8-340
Table 8-272 Slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots for the ETF8.............8-341
Table 8-273 Slots valid for the EMS4 and the corresponding slots for the ETF8........................................... 8-341
Table 8-274 Parameters specified for the optical interfaces of the ETF8........................................................ 8-341
Table 8-275 Interfaces of the ETF8A...............................................................................................................8-344
Table 8-276 Pin assignments of the RJ-45 connector of the ETF8A............................................................... 8-345
Table 8-277 Slots valid for the N5EFS0 and the corresponding slots for the ETF8A.....................................8-345
Table 8-278 Parameters specified for the optical interfaces of the ETF8A..................................................... 8-346
Table 8-279 Interfaces of the ETS8..................................................................................................................8-349
Table 8-280 Pin assignments of the RJ-45 connector of the ETS8..................................................................8-349
Table 8-281 Slots valid for the EFS0 and the corresponding slots for the ETS8.............................................8-349
Table 8-282 Slots valid for the EFS0A and the corresponding slots for the ETS8..........................................8-350
Table 8-283 Parameters specified for the optical interfaces of the ETS8........................................................ 8-350
Table 9-1 Functions and features of the ADL4....................................................................................................9-4
Table 9-2 Optical interface of the ADL4 .............................................................................................................9-9
Table 9-3 Relationship between the feature code of the ADL4 and the type of optical interface........................9-9
Table 9-4 Methods used to troubleshoot the faults that occur on the ADL4 frequently....................................9-12
Table 9-5 SDH....................................................................................................................................................9-13
Table 9-6 ATM...................................................................................................................................................9-14
Table 9-7 Parameters specified for the optical interfaces of the ADL4.............................................................9-14
Table 9-8 Functions and features of the ADQ1..................................................................................................9-18
Table 9-9 Optical interfaces of the ADQ1..........................................................................................................9-23
Table 9-10 Relationship between the feature code of the ADQ1 and the type of optical interface...................9-23
Table 9-11 Methods used to troubleshoot the faults that occur on the ADQ1 frequently..................................9-26
Table 9-12 SDH..................................................................................................................................................9-27
Table 9-13 ATM.................................................................................................................................................9-28
Table 9-14 Parameters specified for the optical interfaces of the ADQ1...........................................................9-28
Table 9-15 Functions and features of the IDL4..................................................................................................9-31
Table 9-16 Optical interface of the IDL4...........................................................................................................9-36
Table 9-17 Relationship between the feature code of the IDL4 and the type of optical interface.....................9-37
Table 9-18 Methods used to troubleshoot the faults that occur on the IDL4 frequently....................................9-39
Table 9-19 SDH..................................................................................................................................................9-41
Table 9-20 ATM.................................................................................................................................................9-42
cxiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 9-21 Parameters specified for the optical interfaces of the IDL4.............................................................9-43
Table 9-22 Functions and features of the IDL4A...............................................................................................9-45
Table 9-23 Optical interface of the IDL4A........................................................................................................9-50
Table 9-24 Relationship between the feature code of the IDL4A and the type of optical interface..................9-51
Table 9-25 Parameters specified for the optical interfaces of the IDL4A..........................................................9-51
Table 9-26 Functions and features of the IDQ1.................................................................................................9-54
Table 9-27 Optical interfaces of the IDQ1.........................................................................................................9-59
Table 9-28 Relationship between the feature code of the IDQ1 and the type of optical interface.....................9-60
Table 9-29 Methods used to troubleshoot the faults that occur on the IDQ1 frequently...................................9-63
Table 9-30 SDH..................................................................................................................................................9-65
Table 9-31 ATM.................................................................................................................................................9-65
Table 9-32 Parameters specified for the optical interfaces of the IDQ1............................................................9-66
Table 9-33 Functions and features of the IDQ1A..............................................................................................9-68
Table 9-34 Optical interfaces of the IDQ1A .....................................................................................................9-74
Table 9-35 Relationship between the feature code of the IDQ1A and the type of optical interface..................9-74
Table 9-36 Parameters specified for the optical interfaces of the IDQ1A.........................................................9-75
Table 10-1 Functions and features of the EGR2................................................................................................10-4
Table 10-2 Optical interfaces of the EGR2 .....................................................................................................10-12
Table 10-3 Relationship between the feature code of the EGR2 and the type of optical interface..................10-13
Table 10-4 Methods used to troubleshoot the faults that occur on the EGR2 frequently................................10-15
Table 10-5 SDH................................................................................................................................................10-17
Table 10-6 RMON alarm..................................................................................................................................10-17
Table 10-9 Statistics of RMON VCG performance (receive frame count at Span side)..................................10-18
Table 10-10 Statistics of RMON VCG performance (transmit frame count at Span side)..............................10-19
Table 10-11 Statistics of RMON VCG performance (count of control layer frames).....................................10-19
Table 10-12 Statistics of RMON VCG performance (frames received by Client)...........................................10-19
Table 10-13 Statistics of RMON VCG performance (frames transmitted by client).......................................10-20
Table 10-14 Statistics of RMON VCG performance (count of error frames)..................................................10-20
Table 10-15 Parameters specified for the optical interfaces of the EGR2.......................................................10-21
Table 10-16 Throughput specifications of the EGR2.......................................................................................10-23
Table 10-17 Packet loss ratio in the case of overloading of the EGR2............................................................10-23
Table 10-18 Latency specifications of the EGR2.............................................................................................10-24
Table 10-19 Back-to-back specifications of the EGR2....................................................................................10-25
Table 10-20 Functions and features of the EMR0............................................................................................10-28
Table 10-21 Interfaces of the EMR0................................................................................................................10-36
Table 10-22 Slots valid for the EMR0 and the corresponding slots for the ETF8 and EFF8..........................10-37
Table 10-23 Relationship between the feature code of the EMR0 and the type of optical interface...............10-37
Table 10-24 Methods used to troubleshoot the faults that occur on the EMR0 frequently..............................10-40
Table 10-25 SDH..............................................................................................................................................10-41
Table 10-26 RMON alarm................................................................................................................................10-41
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxv


Table 10-29 Statistics of RMON VCG performance (receive frame count at Span side)................................10-43
Table 10-30 Statistics of RMON VCG performance (transmit frame count at Span side).............................. 10-43
Table 10-31 Statistics of RMON VCG performance (count of control layer frames)..................................... 10-43
Table 10-35 Parameters specified for the optical interfaces of the EMR0.......................................................10-45
Table 10-36 Throughput specifications of the EMR0 (eight VC-4s are bound on the FE port)...................... 10-47
Table 10-37 Throughput specifications of the EMR0 (eight VC-4s are bound on the GE port)..................... 10-48
Table 10-38 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound on the FE port)
...........................................................................................................................................................................10-49
Table 10-39 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound on the GE port)
...........................................................................................................................................................................10-49
Table 10-40 Latency specifications of the EMR0 (eight VC-4s are bound on the FE port)............................ 10-50
Table 10-41 Latency specifications of the EMR0 (eight VC-4s are bound on the GE port)........................... 10-51
Table 10-42 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the FE port)................... 10-52
Table 10-43 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the GE port)...................10-52
Table 11-1 Functions and features of the MST4................................................................................................11-3
Table 11-2 Service types service rates supported by the MST4.........................................................................11-4
Table 11-3 Optical interfaces of the MST4........................................................................................................11-9
Table 11-4 Relationship between the feature code of the MST4, the type of supported services, type of optical
interface, and transmission distance....................................................................................................................11-9
Table 11-5 Methods used to troubleshoot the faults that occur on the MST4 frequently................................ 11-12
Table 11-6 Parameters specified for the optical interfaces of the MST4......................................................... 11-13
Table 12-1 Functions and features of the IFSD1................................................................................................12-4
Table 12-2 Interfaces of the IFSD1....................................................................................................................12-8
Table 12-3 Radio work modes..........................................................................................................................12-11
Table 12-4 IF performance...............................................................................................................................12-15
Table 12-5 Baseband signal processing performance of the modem............................................................... 12-15
Table 12-6 Functions and features of the RPWR.............................................................................................12-18
Table 12-7 Interfaces of the RPWR................................................................................................................. 12-21
Table 13-1 Functions and features of the CMR2...............................................................................................13-4
Table 13-2 Optical interfaces of the CMR2.......................................................................................................13-7
Table 13-3 Feature code of the CMR2...............................................................................................................13-7
Table 13-4 Parameters specified for the optical interfaces of the CMR2...........................................................13-8
Table 13-5 Functions and features of the CMR4............................................................................................. 13-10
Table 13-6 Optical interfaces of the CMR4..................................................................................................... 13-13
Table 13-7 Feature code of the CMR4............................................................................................................. 13-13
Table 13-8 Parameters specified for the optical interfaces of the CMR4.........................................................13-14
Table 13-9 Functions and features of the MR2................................................................................................ 13-17
Table 13-10 Optical interfaces of the MR2......................................................................................................13-20
cxvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 13-11 Feature code of the MR2..............................................................................................................13-20

Table 13-12 Parameters specified for the optical interfaces of the MR2.........................................................13-21
Table 13-13 Functions and features of the MR2A...........................................................................................13-23
Table 13-14 Optical interfaces of the MR2A...................................................................................................13-26
Table 13-15 Parameters specified for the optical interfaces of the MR2A......................................................13-27
Table 13-16 Functions and features of the MR2B...........................................................................................13-29
Table 13-17 Optical interfaces of the MR2B...................................................................................................13-32
Table 13-18 Parameters specified for the optical interfaces of the MR2B.......................................................13-33
Table 13-19 Functions and features of the MR2C...........................................................................................13-35
Table 13-20 Optical interfaces of the MR2C...................................................................................................13-38
Table 13-21 Parameters specified for the optical interfaces of the MR2C.......................................................13-38
Table 13-22 Functions and features of the MR4..............................................................................................13-40
Table 13-26 Functions and features of the LWX.............................................................................................13-47
Table 13-27 Optical interfaces of the LWX.....................................................................................................13-51
Table 13-28 Relationship between the feature code of the LWX and the signal receive/transmit scheme
...........................................................................................................................................................................13-51
Table 13-29 Parameters specified for the client-side optical interfaces of the LWX.......................................13-52
Table 13-30 Parameters specified for the WDM-side optical interfaces of the LWX.....................................13-53
Table 13-31 Functions and features of the FIB................................................................................................13-56
Table 13-32 Optical interfaces of the FIB .......................................................................................................13-57
Table 13-33 Parameters specified for the optical interfaces of the FIB...........................................................13-58
Table 14-1 Versions of the SAP.........................................................................................................................14-2
Table 14-2 Functions and features of the SAP...................................................................................................14-3
Table 14-3 Jumpers on the SAP.........................................................................................................................14-6
Table 14-4 Interfaces of the SAP.......................................................................................................................14-9
Table 14-5 Pins of the ETH and COM interfaces..............................................................................................14-9
Table 14-6 Functions and features of the SEI..................................................................................................14-11
Table 14-7 Interfaces of the SEI.......................................................................................................................14-13
Table 14-8 Pins of the CLK1 and CLK2 interfaces.........................................................................................14-14
Table 14-9 Pins of the F1 interface..................................................................................................................14-14
Table 14-10 Pins of the F&f interface..............................................................................................................14-14
Table 14-11 Pins of the PHONE, V1, and V2 interfaces.................................................................................14-15
Table 14-12 Pins of the LAMP1 and LAMP2 interfaces.................................................................................14-15
Table 14-13 Pins of the ALM01 and ALM02 interfaces..................................................................................14-16
Table 14-14 Pins of the OAM interface...........................................................................................................14-16
Table 14-15 Pins of the S1, S2, S3, and S4 interfaces.....................................................................................14-17
Table 14-16 Pins of the ALMI1 interface........................................................................................................14-17
Table 14-18 Functions and features of the FAN..............................................................................................14-20
Table 15-1 Functions and features of the BA2...................................................................................................15-3
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxvii

Table 15-2 Optical interface of the one-interface BA2......................................................................................15-8

Table 15-3 Optical interfaces of the two-interface BA2....................................................................................15-8
Table 15-4 Relationship between the feature code of the BA2 and the output optical power...........................15-9
Table 15-5 Parameters specified for the optical interfaces of the BA2..............................................................15-9
Table 15-6 Versions of the BPA.......................................................................................................................15-11
Table 15-7 Functions and features of the BPA.................................................................................................15-12
Table 15-8 Optical interfaces of the BPA........................................................................................................15-15
Table 15-9 Relationship between the feature code of the BPA and the output optical power.........................15-16
Table 15-10 Parameters specified for the optical interfaces of the BPA..........................................................15-16
Table 15-11 Versions of the COA....................................................................................................................15-18
Table 15-12 Functions and features of the 61COA/N1COA...........................................................................15-19
Table 15-13 Functions and features of the 62COA..........................................................................................15-21
Table 15-14 Pin assignments of the RS-232 serial port...................................................................................15-25
Table 15-15 Pin assignments of the MONITOR interfaces.............................................................................15-26
Table 15-16 Pin assignments of the RJ-45 connector of the 62COA...............................................................15-26
Table 15-17 Relationship between the feature code of the 61COA and the output optical power..................15-28
Table 15-18 Parameters specified for the optical interfaces of the COA.........................................................15-28
Table 15-19 Functions and features of the RPC01...........................................................................................15-31
Table 15-20 Interfaces of the RPC01...............................................................................................................15-34
Table 15-21 Feature code of the RPC01..........................................................................................................15-35
Table 15-22 Serial numbers of the optical interfaces on the front panel of the RPC01 on the NMS..............15-36
Table 15-23 Parameters specified for the optical interfaces of the RPC01......................................................15-36
Table 15-29 Functions and features of the OBU1............................................................................................15-45
Table 15-30 Optical interfaces of the OBU1....................................................................................................15-49
Table 15-31 Feature code of the OBU1............................................................................................................15-49
Table 15-32 Parameters specified for the optical interfaces of the OBU1.......................................................15-50
Table 16-1 Mapping policies of UPM on the OptiX OSN 2500........................................................................16-3
Table 16-2 Functions and features of the EPS75-4815AF power system..........................................................16-4
Table 16-3 Interfaces of the EPS75-4815AF power system..............................................................................16-6
Table 16-4 Power parameters of the UPM.........................................................................................................16-7
Table 16-5 Functions and features of the PIU..................................................................................................16-10
Table 16-6 Interfaces of the PIU......................................................................................................................16-11
Table 16-7 Pin assignments of the PWS interface of the PIU..........................................................................16-12
Table 16-8 Functions and features of the PIUA...............................................................................................16-14
Table 16-9 Interfaces of the PIUA...................................................................................................................16-16
Table 17-1 Mapping table of the BOM numbers and the types of the SFP/eSFP optical modules ..................17-4
Table 17-2 Mapping table of the BOM numbers and the types of the single-fiber bidirectional eSFP optical modules
.............................................................................................................................................................................17-9
cxviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 17-3 Mapping table of the BOM numbers and the types of the XFP optical modules.......................... 17-11
Table 17-4 Mapping table of the BOM numbers and the types of the 2.5 Gbit/s CWDM eSFP optical modules
...........................................................................................................................................................................17-12
Table 17-5 Mapping table of the BOM numbers and the types of the 10 Gbit/s DWDM XFP optical modules
...........................................................................................................................................................................17-13
Table 17-6 Mapping table of the BOM numbers and the types of the 2.5 Gbit/s DWDM eSFP optical modules
...........................................................................................................................................................................17-18
Table 18-1 Categories of the fiber jumpers that the OptiX OSN equipment uses.............................................18-2
Table 18-2 Types of fiber connectors.................................................................................................................18-3
Table 18-3 Technical specifications of the cabinet power cable........................................................................18-7
Table 18-4 Pin assignments of the power cable for the .....................................................................................18-9
Table 18-5 Technical specifications of the power cable for the.........................................................................18-9
Table 18-6 Pin assignments of the COA power cable......................................................................................18-11
Table 18-7 Pin assignments of the UPM power cable......................................................................................18-12
Table 18-8 Technical specifications of the UPM power cable.........................................................................18-12
Table 18-9 Pin assignments of the RPC power cable.......................................................................................18-13
Table 18-10 Technical specifications of the RPC power cable........................................................................18-13
Table 18-11 Pin assignments of the cabinet indicator cable.............................................................................18-15
Table 18-12 Pin assignments of the indicator cascading cable between subracks or the alarm cascading cable
between the OptiX OSN equipment..................................................................................................................18-16
Table 18-13 Pin assignments of the alarm cascading cable between the OptiX OSN equipment and the other Huawei
Table 18-14 Pin assignments of the alarm input/output cable..........................................................................18-20
Table 18-15 Pin assignments of the OAM serial port cable.............................................................................18-22
Table 18-16 Pin assignments of the serial 1–4/F1/F&f serial port cable......................................................... 18-23
Table 18-17 Pin assignments of the RS-232/RS-422 serial port cable.............................................................18-24
Table 18-18 Pin assignments of the ordinary telephone line............................................................................18-26
Table 18-19 Pin assignments of the COA cascading cable..............................................................................18-27
Table 18-20 Pin assignments of the straight through cable..............................................................................18-28
Table 18-21 Pin assignments of the crossover cable........................................................................................18-29
Table 18-22 Pin assignments of the 75-ohm 8xE1 cable................................................................................. 18-31
Table 18-23 Specifications of the 75-ohm E1 cable with the external braid shield layer................................18-32
Table 18-24 Specifications of the 75-ohm E1 cable without the external braid shield layer...........................18-33
Table 18-25 Pin assignments of the 120-ohm 8xE1 cable............................................................................... 18-34
Table 18-26 Pin assignments of the DB28 connector of the DM12.................................................................18-37
Table 18-27 Pin assignments of the V.35 DCE cable...................................................................................... 18-39
Table 18-28 Pin assignments of the V.35 DTE cable.......................................................................................18-41
Table 18-29 Pin assignments of the V.24 DCE cable...................................................................................... 18-42
Table 18-30 Technical specifications of the V.24 DCE cable..........................................................................18-43
Table 18-32 Technical specifications of the V.24 DTE cable..........................................................................18-45
Table 18-33 Pin assignments of the X.21 DCE cable...................................................................................... 18-45
Table 18-34 Technical specifications of the X.21 DCE cable..........................................................................18-46
Table 18-35 Pin assignments of the X.21 DTE cable.......................................................................................18-47
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxix

Table 18-36 Technical specifications of the X.12 DTE cable..........................................................................18-48

Table 18-37 Pin assignments of the RS-449 DCE cable..................................................................................18-48
Table 18-38 Technical specifications of the RS-449 DCE cable.....................................................................18-49
Table 18-39 Pin assignments of the RS-449 DTE cable..................................................................................18-50
Table 18-40 Technical specifications of the RS-449 DTE cable.....................................................................18-51
Table 18-45 Pin assignments of the 120-ohm clock cable...............................................................................18-56
Table 18-47 Pin assignments of the two-channel 75-ohm-to-120-ohm clock transit cable.............................18-59
Table 20-1 Labels on the equipment..................................................................................................................20-2
Table 20-2 Huawei specifications for the engineering labels.............................................................................20-6
Table 21-1 Information on whether a board of a specific version is supported by the OptiX OSN products
.............................................................................................................................................................................21-2
Table 21-2 Basic functions of SDH boards......................................................................................................21-10
Table 21-3 Basic functions of PDH boards......................................................................................................21-15
Table 21-4 Basic functions of data boards.......................................................................................................21-16
Table 21-5 Loopback capability of the SDH boards........................................................................................21-18
Table 21-6 Information on whether each SDH board of the OptiX OSN equipment supports the insertion of the
AU_AIS when the board is looped back...........................................................................................................21-21
Table 21-7 Loopback capability of the PDH boards........................................................................................21-23
Table 21-8 Loopback capability of the data boards of the OptiX OSN equipment.........................................21-24
Table 21-9 Loopback capability of the ATM/IMA boards of the OptiX OSN equipment..............................21-26
Table 21-10 Protection schemes that the SDH boards of the OptiX OSN equipment support........................21-27
Table 21-11 Protection schemes that the PDH boards of the OptiX OSN equipment support........................21-30
Table 21-12 Protection schemes that the data boards of the OptiX OSN equipment support..........................21-31
Table 21-13 Protection schemes that the microwave boards of the OptiX OSN equipment support..............21-33
Table 21-14 Power consumption and weight of each board............................................................................21-33
Table 22-1 Relation between the service type and the value of the V5 byte......................................................22-3
Table 22-2 Parameters for configuring the basic attributes of an Ethernet port.................................................22-4
Table 22-3 Parameters for configuring flow control of an Ethernet port...........................................................22-6
Table 22-4 Parameters for configuring network attributes of an Ethernet port..................................................22-7
Table 22-5 Parameters for configuring the advanced attributes of an Ethernet port..........................................22-8
Table 22-6 Parameters for configuring the tag attributes of an Ethernet port..................................................22-11
Table 22-7 Parameters for configuring the encapsulation and mapping of an Ethernet port...........................22-12
Table 22-8 Parameters for binding paths..........................................................................................................22-14
Table 22-9 Relation between the service type and the value of the C2 byte....................................................22-16
Table 22-10 Relation between the service type and the value of the C2 byte..................................................22-17
Table 22-11 Relation between the service type and the value of the V5 byte..................................................22-17
Table 22-12 Parameters that need to be set for the cross-connect and timing units.........................................22-26
Table 23-1 SDH board parameters.....................................................................................................................23-8
cxx Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 23-2 PDH board parameters.....................................................................................................................23-9

Table 23-3 RTN board parameters................................................................................................................... 23-10
Table 23-4 Data board parameters....................................................................................................................23-11
Tables
Table 2-1 Comparison between the specifications of the T63 cabinet and the specifications of the N63E cabinet
...............................................................................................................................................................................2-4
Table 2-2 Specifications of the N66T cabinet......................................................................................................2-9
Table 2-3 Meanings of the status of the indicators.............................................................................................2-11
Table 2-4 Connections of the output terminal blocks on side A and side B......................................................2-12
Table 2-5 Technical specifications of the ETSI cabinet.....................................................................................2-13
Table 2-6 Technical specifications of the PDU..................................................................................................2-14
Table 3-1 Mapping relation between slots for interface boards and slots for processing boards for the OptiX OSN
2500.......................................................................................................................................................................3-5
Table 3-2 Paired slots...........................................................................................................................................3-5
Table 3-3 Mapping policies of power consumption on the OptiX OSN 2500...................................................3-11
Table 3-4 Dimensions and weight of the OptiX OSN 2500 subrack.................................................................3-11
Table 3-5 Maximum power consumption of the OptiX OSN 2500 subrack......................................................3-12
Table 4-1 Appearances and dimensions of boards used on the OptiX OSN 2500...............................................4-2
Table 4-2 SDH boards that the OptiX OSN 2500 supports..................................................................................4-5
Table 4-3 PDH boards that the OptiX OSN 2500 supports..................................................................................4-6
Table 4-4 EoS/EoP Boards that the OptiX OSN 2500 supports...........................................................................4-6
Table 4-5 ATM boards that the OptiX OSN 2500 supports.................................................................................4-7
Table 4-6 RPR Boards that the OptiX OSN 2500 supports.................................................................................4-8
Table 4-7 SCC unit, cross-connect unit, and line unit integrated boards that the OptiX OSN 2500 supports
...............................................................................................................................................................................4-8
Table 4-8 Auxiliary boards that the OptiX OSN 2500 supports..........................................................................4-8
Table 4-9 WDM boards the OptiX OSN 2500 supports......................................................................................4-9
Table 4-10 Microwave boards that the OptiX OSN 2500 supports.....................................................................4-9
Table 4-11 Optical amplifier boards that the OptiX OSN 2500 supports..........................................................4-10
Table 4-12 Power boards that the OptiX OSN 2500 supports...........................................................................4-10
Table 5-1 Versions of the CXL1..........................................................................................................................5-3
Table 5-2 Functions and features of the SDH processing unit of the CXL1........................................................5-4
Table 5-3 Functions and features of the SCC unit of the CXL1..........................................................................5-5
Table 5-4 Functions and features of the cross-connect unit of the CXL1............................................................5-6
Table 5-5 Functions and features of the clock unit of the CXL1.........................................................................5-7
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxxi

Table 5-6 Optical interface and switches of the CXL1......................................................................................5-14

Table 5-7 Jumper J3 of the Q2CXL1 and jumper J7 of the Q3CXL1................................................................5-16
Table 5-8 DIP switch SW1 of the Q2CXL1 and DIP switch SW2 of the Q3CXL1..........................................5-16
Table 5-9 DIP switch SW1/SW2........................................................................................................................5-17
Table 5-14 Versions of the CXL4......................................................................................................................5-31
Table 5-15 Functions and features of the SDH processing unit of the CXL4....................................................5-32
Table 5-16 Functions and features of the SCC unit of the CXL4......................................................................5-33
Table 5-17 Functions and features of the cross-connect unit of the CXL4........................................................5-34
Table 5-18 Functions and features of the clock unit of the CXL4.....................................................................5-35
Table 5-19 Optical interface and switches of the CXL4....................................................................................5-42
Table 5-20 Jumper J3 of the Q2CXL4 and jumper J7 of the Q3CXL4..............................................................5-44
Table 5-21 DIP switch SW1 of the Q2CXL4 and DIP switch SW2 of the Q3CXL4........................................5-44
Table 5-27 Versions of the CXL16....................................................................................................................5-59
Table 5-28 Functions and features of the SDH processing unit of the CXL16..................................................5-60
Table 5-29 Functions and features of the SCC unit of the CXL16....................................................................5-61
Table 5-30 Functions and features of the cross-connect unit of the CXL16......................................................5-62
Table 5-31 Functions and features of the clock unit of the CXL16...................................................................5-63
Table 5-32 Optical interface and switches of the CXL16..................................................................................5-70
Table 5-33 Jumper J3 of the Q2CXL16 and jumper J7 of the Q3CXL16..........................................................5-72
Table 5-34 DIP switch SW1 of the Q2CXL16 and DIP switch SW2 of the Q3CXL16....................................5-72
Table 5-36 Relationship between the feature code of the CXL16 and the type of optical interface..................5-73
Table 5-37 Logical slots displayed on the U2000 for the CXL16......................................................................5-76
Table 5-38 Methods used to troubleshoot the faults that occur on the CXL16 frequently................................5-77
Table 5-39 Parameters specified for the optical interfaces of the CXL16.........................................................5-84
Table 5-40 Parameters specified for the colored optical interfaces of the Q2CXL16........................................5-84
Table 5-41 Functions and features of the SDH processing unit of the CXLLN................................................5-88
Table 5-42 Functions and features of the SCC unit of the CXLLN...................................................................5-89
Table 5-43 Functions and features of the cross-connect unit of the CXLLN.....................................................5-90
Table 5-44 Functions and features of the clock unit of the CXLLN..................................................................5-91
Table 5-45 Optical interface and switches of the CXLLN.................................................................................5-96
Table 5-46 Jumpers of the Q5CXLLN...............................................................................................................5-97
Table 5-47 DIP switch of the CXLLN...............................................................................................................5-98
cxxii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 5-48 DIP switch SW1...............................................................................................................................5-98

Table 5-51 Methods used to troubleshoot the faults that occur on the CXLLN frequently.............................5-102
...........................................................................................................................................................................5-108
...........................................................................................................................................................................5-109
...........................................................................................................................................................................5-109
Table 5-55 Parameters specified for the optical interfaces of the CXLLN when the STM-16 colored optical module
is used................................................................................................................................................................5-110
Table 5-56 Functions and features of the SDH processing unit of the CXLQ41.............................................5-114
Table 5-57 Functions and features of the SCC unit of the CXLQ41...............................................................5-115
Table 5-58 Functions and features of the cross-connect unit of the CXLQ41.................................................5-116
Table 5-59 Functions and features of the clock unit of the CXLQ41..............................................................5-116
Table 5-60 Optical interfaces and switches of the CXLQ41............................................................................5-122
Table 5-61 Jumpers of the Q5CXLQ41...........................................................................................................5-123
Table 5-62 DIP switch of the CXLQ41............................................................................................................5-124
Table 5-63 DIP switch SW1.............................................................................................................................5-124
Table 5-64 Logical slots displayed on the U2000 for the Q5CXLQ41 (when the new backplane is used)
...........................................................................................................................................................................5-127
Table 5-65 Logical slots displayed on the U2000 for the Q5CXLQ41 (when the old backplane is used)
...........................................................................................................................................................................5-128
Table 5-66 Methods used to troubleshoot the faults that occur on the CXLQ41 frequently............................5-128
...........................................................................................................................................................................5-134
...........................................................................................................................................................................5-135
Table 6-1 Versions of the SL1..............................................................................................................................6-4
Table 6-2 Functions and features of the SL1........................................................................................................6-5
Table 6-3 Optical interfaces of the SL1..............................................................................................................6-10
Table 6-4 Relationship between the feature code of the SL1 and the type of optical interface.........................6-11
Table 6-5 Methods used to troubleshoot the faults that occur on the SL1 frequently........................................6-14
Table 6-6 Parameters specified for the optical interfaces of the SL1.................................................................6-20
Table 6-7 Functions and features of the SL1A...................................................................................................6-22
Table 6-8 Optical interfaces of the SL1A...........................................................................................................6-27
Table 6-9 Relationship between the feature code of the SL1A and the type of optical interface......................6-27
Table 6-10 Parameters specified for the optical interfaces of the SL1A............................................................6-28
Table 6-11 Versions of the SLQ1.......................................................................................................................6-30
Table 6-12 Functions and features of the SLQ1.................................................................................................6-31
Table 6-13 Optical interfaces of the SLQ1.........................................................................................................6-36
Table 6-14 Relationship between the feature code of the SLQ1 and the type of optical interface....................6-37
Table 6-15 Parameters specified for the optical interfaces of the SLQ1............................................................6-38
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxxiii

Table 6-16 Functions and features of the SLQ1A..............................................................................................6-41

Table 6-17 Optical interfaces of the SLQ1A......................................................................................................6-46
Table 6-18 Relationship between the feature code of the SLQ1A and the type of optical interface.................6-46
Table 6-19 Parameters specified for the optical interfaces of the SLQ1A.........................................................6-47
Table 6-20 Versions of the SLO1.......................................................................................................................6-49
Table 6-21 Functions and features of the SLO1 board.......................................................................................6-50
Table 6-22 Optical interfaces of the SLO1.........................................................................................................6-55
Table 6-23 Relationship between the feature code of the SLO1 and the type of optical interface....................6-55
Table 6-24 Parameters specified for the optical interfaces of the SLO1............................................................6-56
Table 6-25 Functions and features of the SLT1.................................................................................................6-59
Table 6-26 Optical interfaces of the SLT1.........................................................................................................6-64
Table 6-27 Relationship between the feature code of the SLT1 and the type of optical interface.....................6-64
Table 6-28 Parameters specified for the optical interfaces of the SLT1............................................................6-65
Table 6-29 Functions and features of the SEP1.................................................................................................6-68
Table 6-30 Access capabilities of the SEP1 when the SEP1 works with different interface boards and electrical
interface switching boards...................................................................................................................................6-69
Table 6-31 Electrical interfaces of the SEP1......................................................................................................6-75
Table 6-32 Slots for the SEP, EU08, and TSB8.................................................................................................6-77
Table 6-33 Methods used to troubleshoot the faults that occur on the SEP1 frequently....................................6-80
Table 6-34 Parameters specified for the interfaces of the SEP1........................................................................6-83
Table 6-35 Versions of the SL4..........................................................................................................................6-84
Table 6-36 Functions and features of the SL4....................................................................................................6-85
Table 6-37 Optical interfaces of the SL4............................................................................................................6-90
Table 6-38 Relationship between the feature code of the SL4 and the type of optical interface.......................6-91
Table 6-39 Parameters specified for the optical interfaces of the SL4...............................................................6-92
Table 6-40 Functions and features of the SL4A.................................................................................................6-94
Table 6-41 Optical interfaces of the SL4A.........................................................................................................6-99
Table 6-42 Relationship between the feature code of the SL4A and the type of optical interface....................6-99
Table 6-43 Parameters specified for the optical interfaces of the SL4A..........................................................6-100
Table 6-44 Versions of the SLD4.....................................................................................................................6-102
Table 6-45 Functions and features of the SLD4...............................................................................................6-103
Table 6-46 Optical interfaces of the SLD4.......................................................................................................6-108
Table 6-47 Relationship between the feature code of the SLD4 and the type of optical interface..................6-109
Table 6-48 Parameters specified for the optical interfaces of the SLD4..........................................................6-110
Table 6-49 Functions and features of the SLD4A............................................................................................6-113
Table 6-50 Optical interfaces of the SLD4A....................................................................................................6-118
Table 6-51 Relationship between the feature code of the SLD4A and the type of optical interface...............6-118
Table 6-52 Parameters specified for the optical interfaces of the SLD4A.......................................................6-119
Table 6-53 Versions of the SLQ4.....................................................................................................................6-121
Table 6-54 Functions and features of the SLQ4...............................................................................................6-122
Table 6-55 Optical interfaces of the SLQ4.......................................................................................................6-127
Table 6-56 Relationship between the feature code of the SLQ4 and the type of optical interface..................6-128
Table 6-57 Parameters specified for the optical interfaces of the SLQ4..........................................................6-128
cxxiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 6-58 Functions and features of the SLQ4A............................................................................................6-131

Table 6-59 Optical interfaces of the SLQ4A....................................................................................................6-136
Table 6-60 Relationship between the feature code of the SLQ4A and the type of optical interface...............6-136
Table 6-61 Parameters specified for the optical interfaces of the SLQ4A.......................................................6-137
Table 6-63 Functions and features of the SL16................................................................................................6-140
Table 6-64 Optical interfaces of the SL16........................................................................................................6-146
Table 6-65 Relationship between the feature code of the SL16 and the type of optical interface...................6-146
Table 6-66 Parameters specified for the optical interfaces of the SL16...........................................................6-147
Table 6-67 Parameters specified for the colored optical interfaces of the N3SL16.........................................6-148
Table 6-69 Functions and features of the SL16A.............................................................................................6-152
Table 6-70 Optical interfaces of the SL16A.....................................................................................................6-157
Table 6-71 Relationship between the feature code of the SL16A and the type of optical interface................6-157
Table 6-72 Methods used to troubleshoot the faults that occur on the SL16A frequently...............................6-160
Table 6-73 Parameters specified for the optical interfaces of the SL16A........................................................6-167
Table 6-74 Functions and features of the SF16................................................................................................6-169
Table 6-75 Optical interfaces of the SF16........................................................................................................6-175
Table 6-76 Relationship between the feature code of the SF16 and the type of optical interface...................6-175
Table 6-77 Parameters specified for the optical interfaces of the SF16...........................................................6-176
Table 6-78 Parameters specified for the colored optical interfaces of the SF16..............................................6-177
Table 6-79 Functions and features of the SLQ41.............................................................................................6-180
Table 6-80 Optical interfaces of the SLQ41.....................................................................................................6-185
Table 6-81 Relationship between the feature code of the SLQ41 and the type of optical interface................6-186
Table 6-82 Methods used to troubleshoot the faults that occur on the SLQ41 frequently...............................6-188
...........................................................................................................................................................................6-192
...........................................................................................................................................................................6-192
Table 6-91 Versions of the OU08.....................................................................................................................6-203
Table 6-94 Slots valid for the SEP1 and the corresponding slots for the OU08..............................................6-207
Table 6-95 Parameters specified for the optical interfaces of the OU08..........................................................6-208
Table 6-96 Parameters specified for the electrical interfaces of the N1OU08.................................................6-208
Table 7-1 Versions of the PD1.............................................................................................................................7-4
Table 7-2 Functions and features of the PD1.......................................................................................................7-5
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxxv

Table 7-3 Slots valid for the PD1 and the corresponding slots for the D75S, D12S, and D12B.........................7-9
Table 7-4 Relationship between the feature code of the PD1 and the type of interface impedance..................7-10
Table 7-5 Slot configuration for the 1:2 TPS protection of the PD1..................................................................7-12
Table 7-6 Versions of the PQ1...........................................................................................................................7-14
Table 7-7 Functions and features of the PQ1.....................................................................................................7-16
Table 7-8 Slots valid for the PQ1 and the corresponding slots for the D75S, D12S, and D12B.......................7-20
Table 7-9 Relationship between the feature code of the PQ1 and the type of interface impedance..................7-21
Table 7-11 Methods used to troubleshoot the faults that occur on the PQ1 frequently.....................................7-24
Table 7-12 Functions and features of the PQM..................................................................................................7-29
Table 7-13 Slots valid for the PQM and the corresponding slots for the D12S and D12B................................7-34
Table 7-14 Slot configuration for the 1:4 TPS protection of the PQM..............................................................7-35
Table 7-15 Methods used to troubleshoot the faults that occur on the PQM frequently....................................7-38
Table 7-16 Versions of the PL3..........................................................................................................................7-42
Table 7-17 Functions and features of the PL3....................................................................................................7-43
Table 7-18 Slots valid for the PL3 and the corresponding slots for the C34S...................................................7-48
Table 7-19 Slot configuration for the 1:1 TPS protection of the PL3................................................................7-49
Table 7-20 Slots for the PL3, C34S, and TSB8/TSB4.......................................................................................7-50
Table 7-21 Methods used to troubleshoot the faults that occur on the PL3 frequently......................................7-52
Table 7-22 Versions of the PL3A.......................................................................................................................7-57
Table 7-23 Functions and features of the PL3A.................................................................................................7-58
Table 7-24 Methods used to troubleshoot the faults that occur on the PL3A frequently...................................7-65
Table 7-25 Parameters specified for the electrical interfaces of the PL3A........................................................7-68
Table 7-26 Versions of the PD3.........................................................................................................................7-70
Table 7-27 Functions and features of the PD3...................................................................................................7-71
Table 7-28 Slots valid for the PD3 and the corresponding slots for the D34S...................................................7-75
Table 7-29 Slot configuration for the 1:1 TPS protection of the PD3................................................................7-76
Table 7-30 Slots for the PD3, D34S, and TSB8.................................................................................................7-77
Table 7-31 Functions and features of the PQ3...................................................................................................7-80
Table 7-32 Slots valid for the PQ3 and the corresponding slots for the D34S...................................................7-84
Table 7-34 Slots for the PQ3, D34S, and TSB8.................................................................................................7-86
Table 7-35 Functions and features of the DX1...................................................................................................7-89
Table 7-36 Slots valid for the DX1 and the corresponding slots for the DM12.................................................7-93
Table 7-37 Relationship between the feature code of the DX1 and the type of interface impedance................7-93
Table 7-38 Slots for the DX1 and DM12...........................................................................................................7-95
Table 7-39 Methods used to troubleshoot the faults that occur on the DX1 frequently.....................................7-97
Table 7-40 Functions and features of the DXA................................................................................................7-101
Table 7-41 Versions of the SPQ4.....................................................................................................................7-106
Table 7-42 Functions and features of the SPQ4...............................................................................................7-107
Table 7-44 Slots for the SPQ4, MU04, and TSB8/TSB4.................................................................................7-115
cxxvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 7-45 Methods used to troubleshoot the faults that occur on the SPQ4 frequently.................................7-117
Table 7-46 Interfaces of the D12B...................................................................................................................7-124
Table 7-48 Slots valid for the PQ1/PQM/PD1 and the corresponding slots for the D12B..............................7-125
Table 7-49 Parameters specified for the electrical interfaces of the D12B......................................................7-125
Table 7-52 Slots valid for the PQ1/PD1/PQM and the corresponding slots for the D12S...............................7-131
Table 7-56 Slots valid for the PQ1 and the corresponding slots for the D75S.................................................7-136
Table 7-60 Interfaces of the C34S....................................................................................................................7-144
Table 7-61 Slots valid for the PL3 and the corresponding slots for the C34S.................................................7-144
Table 7-62 Parameters specified for the electrical interfaces of the C34S.......................................................7-144
Table 7-63 Interfaces of the MU04..................................................................................................................7-148
Table 7-65 Parameters specified for the electrical interfaces of the MU04.....................................................7-149
Table 7-66 Interfaces of the DM12..................................................................................................................7-153
Table 7-69 Slots valid for the DX1 and the corresponding slots for the DM12...............................................7-155
Table 7-70 Parameters specified for the electrical interfaces of the DM12.....................................................7-155
Table 7-76 Slots valid for the TSB8 and the corresponding slots for the PD3 and D34S...............................7-163
Table 7-77 Slots valid for the TSB8 and the corresponding slots for the PQ3 and D34S...............................7-163
Table 7-80 Slots valid for the TSB8 and the corresponding slots for the EFS0 and ETS8..............................7-164
Table 8-1 Functions and features of the EFT4.....................................................................................................8-5
Table 8-2 Interfaces of the EFT4..........................................................................................................................8-9
Table 8-3 Pins of the RJ-45 connector...............................................................................................................8-10
Table 8-4 Methods used to troubleshoot the faults that occur on the EFT4 frequently.....................................8-13
Table 8-5 SDH....................................................................................................................................................8-15
Table 8-6 SDH....................................................................................................................................................8-15
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Table 8-7 Statistics of RMON basic performance..............................................................................................8-15

Table 8-8 Statistics of RMON extended performance.......................................................................................8-15
Table 8-9 Parameters specified for the optical interfaces of the EFT4..............................................................8-17
Table 8-14 Versions of the EFT8.......................................................................................................................8-22
Table 8-15 Functions and features of the EFT8.................................................................................................8-23
Table 8-16 Interfaces of the EFT8......................................................................................................................8-29
Table 8-17 Pins of the RJ-45 connector ............................................................................................................8-29
Table 8-18 Methods used to troubleshoot the faults that occur on the EFT8 frequently...................................8-33
Table 8-19 SDH..................................................................................................................................................8-35
Table 8-20 RMON alarm....................................................................................................................................8-36
Table 8-23 SDH..................................................................................................................................................8-37
Table 8-24 RMON alarm....................................................................................................................................8-37
Table 8-28 Parameters specified for the optical interfaces of the EFT8............................................................8-38
Table 8-33 Versions of the EFT8A....................................................................................................................8-44
Table 8-34 Functions and features of the EFT8A..............................................................................................8-45
Table 8-35 Interfaces of the EFT8A...................................................................................................................8-51
Table 8-36 Pins of the RJ-45 connector.............................................................................................................8-51
Table 8-37 Methods used to troubleshoot the faults that occur on the EFT8A frequently................................8-54
Table 8-38 SDH..................................................................................................................................................8-57
Table 8-39 SDH..................................................................................................................................................8-57
Table 8-42 SDH..................................................................................................................................................8-58
Table 8-43 RMON alarm....................................................................................................................................8-59
Table 8-47 Parameters specified for the optical interfaces of the EFT8A.........................................................8-60
Table 8-48 Throughput specifications of the EFT8A.........................................................................................8-62
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Table 8-49 Packet loss ratio in the case of overloading of the EFT8A..............................................................8-63
Table 8-50 Latency specifications of the EFT8A...............................................................................................8-63
Table 8-51 Back-to-back specifications of the EFT8A......................................................................................8-64
Table 8-52 Versions of the EGT2.......................................................................................................................8-66
Table 8-53 Functions and features of the EGT2.................................................................................................8-67
Table 8-54 Optical interfaces of the N1EGT2/N2EGT2....................................................................................8-74
Table 8-55 Electrical interfaces of the N2EGT2................................................................................................8-74
Table 8-56 Pin assignments of the RJ-45 interface of the N2EGT2..................................................................8-74
Table 8-57 Relationship between the feature code of the EGT2 and the type of interface................................8-75
Table 8-58 Methods used to troubleshoot the faults that occur on the EGT2 frequently...................................8-78
Table 8-59 SDH..................................................................................................................................................8-80
Table 8-60 RMON alarm....................................................................................................................................8-80
Table 8-63 SDH..................................................................................................................................................8-81
Table 8-64 RMON alarm....................................................................................................................................8-82
Table 8-67 Parameters specified for the optical interfaces of the EGT2............................................................8-83
Table 8-68 Parameters specified for the electrical interfaces of the EGT2........................................................8-84
Table 8-70 Packet loss ratio in the case of overloading of the N1EGT2...........................................................8-87
Table 8-71 Latency specifications of the N1EGT2............................................................................................8-87
Table 8-72 Back-to-back specifications of the N1EGT2...................................................................................8-88
Table 8-74 Packet loss ratio in the case of overloading of the N2EGT2...........................................................8-90
Table 8-75 Latency specifications of the N2EGT2............................................................................................8-91
Table 8-76 Back-to-back specifications of the N2EGT2...................................................................................8-92
Table 8-77 Versions of the EFS0.......................................................................................................................8-94
Table 8-78 Functions and features of the EFS0.................................................................................................8-95
Table 8-79 Slots valid for the EFS0 and the corresponding slots for the ETF8 and EFF8..............................8-104
Table 8-80 Slots for the EFS0, ETS8, and TSB8.............................................................................................8-105
Table 8-81 Methods used to troubleshoot the faults that occur on the EFS0 frequently..................................8-107
Table 8-82 SDH................................................................................................................................................8-111
Table 8-83 RMON alarm..................................................................................................................................8-112
Table 8-86 SDH................................................................................................................................................8-113
Table 8-87 RMON alarm..................................................................................................................................8-113
Table 8-90 SDH................................................................................................................................................8-114
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Table 8-91 RMON alarm..................................................................................................................................8-114

Table 8-94 SDH................................................................................................................................................8-116
Table 8-95 RMON alarm..................................................................................................................................8-116
Table 8-98 Statistics of RMON VCG performance.........................................................................................8-117
Table 8-99 Throughput specifications of the N4EFS0.....................................................................................8-119
Table 8-107 Functions and features of the EFS0A...........................................................................................8-128
Table 8-108 Slots valid for the EFS0A and the corresponding slots for the ETF8 and EFF8.........................8-136
Table 8-109 Slots for the EFS0A, ETS8, and TSB8........................................................................................8-137
Table 8-110 Methods used to troubleshoot the faults that occur on the EFS0A frequently.............................8-140
Table 8-111 SDH..............................................................................................................................................8-142
Table 8-112 RMON alarm................................................................................................................................8-142
Table 8-116 Throughput specifications of the EFS0A.....................................................................................8-145
Table 8-117 Packet loss ratio in the case of overloading of the EFS0A..........................................................8-146
Table 8-118 Latency specifications of the EFS0A...........................................................................................8-147
Table 8-119 Back-to-back specifications of the EFS0A..................................................................................8-147
Table 8-120 Versions of the EFS4...................................................................................................................8-149
Table 8-121 Functions and features of the EFS4.............................................................................................8-151
Table 8-122 Interfaces of the EFS4..................................................................................................................8-158
Table 8-123 Pins of the RJ-45 connector.........................................................................................................8-158
Table 8-124 Methods used to troubleshoot the faults that occur on the EFS4 frequently................................8-162
Table 8-125 SDH..............................................................................................................................................8-165
Table 8-126 RMON alarm................................................................................................................................8-165
Table 8-129 SDH..............................................................................................................................................8-166
Table 8-130 RMON alarm................................................................................................................................8-166
cxxx Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 8-133 SDH..............................................................................................................................................8-168

Table 8-134 RMON alarm................................................................................................................................8-168
Table 8-138 Parameters specified for the optical interfaces of the EFS4.........................................................8-170
Table 8-147 Functions and features of the EFP0 board ..................................................................................8-181
Table 8-148 Slots valid for the EFP0 and the corresponding slots for the ETF8 and EFF8............................8-187
Table 8-149 Methods used to rectify the faults that occur on the EFP0 frequently.........................................8-190
Table 8-150 SDH..............................................................................................................................................8-192
Table 8-151 RMON alarm................................................................................................................................8-192
Table 8-155 Parameters specified for the optical interfaces of the EFP0.........................................................8-194
Table 8-156 Parameters specified for the electrical interfaces of the EFP0.....................................................8-194
Table 8-157 Throughput specifications of the EFP0........................................................................................8-196
Table 8-158 Packet loss ratio in the case of overloading of the EFP0.............................................................8-196
Table 8-159 Delay specifications of the EFP0.................................................................................................8-197
Table 8-160 Back-to-back specifications of the EFP0.....................................................................................8-198
Table 8-163 Optical interfaces of the N2EGS2/N3EGS2................................................................................8-209
Table 8-164 Electrical interfaces of the N3EGS2............................................................................................8-209
Table 8-165 Pin assignments of the RJ-45 interface of the N3EGS2..............................................................8-209
Table 8-168 SDH..............................................................................................................................................8-216
Table 8-169 RMON alarm................................................................................................................................8-216
Table 8-172 SDH..............................................................................................................................................8-217
Table 8-173 RMON alarm................................................................................................................................8-217
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Table 8-194 SDH..............................................................................................................................................8-246
Table 8-195 RMON alarm................................................................................................................................8-246
Table 8-201 Throughput specifications of the EMS2 (three VC-3s is bound on the FE port).........................8-250
Table 8-202 Throughput specifications of the EMS2 (48 VC-12s are bound on the GE port)........................8-250
Table 8-203 Packet loss ratio in the case of overloading of the EMS2 (three VC-3s is bound on the FE port)
...........................................................................................................................................................................8-251
...........................................................................................................................................................................8-252
Table 8-205 Latency specifications of the EMS2 (three VC-3s is bound on the FE port)...............................8-253
Table 8-206 Latency specifications of the EMS2 (48 VC-12s are bound on the GE port)..............................8-254
Table 8-207 Back-to-back specifications of the EMS2 (three VC-3s is bound on the FE port)......................8-254
Table 8-208 Back-to-back specifications of the EMS2 (48 VC-12s are bound on the GE port).....................8-255
cxxxii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 8-216 SDH..............................................................................................................................................8-278

Table 8-217 RMON alarm................................................................................................................................8-279
Table 8-223 Throughput specifications of the EMS4 (one VC-4 is bound on the FE port)............................8-282
Table 8-224 Throughput specifications of the EMS4 (24 VC-3s are bound on the GE port)..........................8-282
Table 8-225 Packet loss ratio in the case of overloading of the EMS4 (one VC-4 is bound on the FE port)
...........................................................................................................................................................................8-283
...........................................................................................................................................................................8-284
Table 8-227 Latency specifications of the EMS4 (one VC-4 is bound on the FE port)...................................8-285
Table 8-228 Latency specifications of the EMS4 (24 VC-3s are bound on the GE port)................................8-286
Table 8-229 Back-to-back specifications of the EMS4 (one VC-4 is bound on the FE port)..........................8-287
Table 8-230 Back-to-back specifications of the EMS4 (24 VC-3s are bound on the GE port).......................8-287
Table 8-233 Optical interfaces of the N1EGS4/N3EGS4/N4EGS4.................................................................8-300
Table 8-234 Electrical interfaces of the N1EGS4/N4EGS4.............................................................................8-300
Table 8-235 Pin assignments of the RJ-45 interface of the N1EGS4/N4EGS4...............................................8-300
Table 8-238 SDH..............................................................................................................................................8-313
Table 8-239 RMON alarm................................................................................................................................8-314
Table 8-243 SDH..............................................................................................................................................8-315
Table 8-244 RMON alarm................................................................................................................................8-315
Table 8-248 SDH..............................................................................................................................................8-316
Table 8-249 RMON alarm................................................................................................................................8-317
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxxxiii


Table 8-263 Interfaces of the EFF8..................................................................................................................8-331
Table 8-264 Slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots for the EFF8.............8-331
Table 8-265 Slots valid for the EMS4 and the corresponding slots for the EFF8............................................8-331
Table 8-266 Parameters specified for the optical interfaces of the EFF8.........................................................8-332
Table 8-267 Interfaces of the EFF8A...............................................................................................................8-336
Table 8-268 Slots valid for the N5EFS0 and the corresponding slots for the EFF8A.....................................8-336
Table 8-269 Parameters specified for the optical interfaces of the EFF8A......................................................8-336
Table 8-270 Interfaces of the ETF8..................................................................................................................8-340
Table 8-271 Pin assignments of the RJ-45 connector of the ETF8..................................................................8-340
Table 8-272 Slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots for the ETF8.............8-341
Table 8-273 Slots valid for the EMS4 and the corresponding slots for the ETF8...........................................8-341
Table 8-274 Parameters specified for the optical interfaces of the ETF8........................................................8-341
Table 8-275 Interfaces of the ETF8A...............................................................................................................8-344
Table 8-276 Pin assignments of the RJ-45 connector of the ETF8A...............................................................8-345
Table 8-277 Slots valid for the N5EFS0 and the corresponding slots for the ETF8A.....................................8-345
Table 8-278 Parameters specified for the optical interfaces of the ETF8A.....................................................8-346
Table 8-279 Interfaces of the ETS8..................................................................................................................8-349
Table 8-280 Pin assignments of the RJ-45 connector of the ETS8..................................................................8-349
Table 8-281 Slots valid for the EFS0 and the corresponding slots for the ETS8.............................................8-349
Table 8-282 Slots valid for the EFS0A and the corresponding slots for the ETS8..........................................8-350
Table 8-283 Parameters specified for the optical interfaces of the ETS8........................................................8-350
Table 9-1 Functions and features of the ADL4....................................................................................................9-4
Table 9-2 Optical interface of the ADL4 .............................................................................................................9-9
Table 9-3 Relationship between the feature code of the ADL4 and the type of optical interface........................9-9
Table 9-4 Methods used to troubleshoot the faults that occur on the ADL4 frequently....................................9-12
Table 9-5 SDH....................................................................................................................................................9-13
Table 9-6 ATM...................................................................................................................................................9-14
Table 9-7 Parameters specified for the optical interfaces of the ADL4.............................................................9-14
Table 9-8 Functions and features of the ADQ1..................................................................................................9-18
Table 9-9 Optical interfaces of the ADQ1..........................................................................................................9-23
Table 9-10 Relationship between the feature code of the ADQ1 and the type of optical interface...................9-23
Table 9-11 Methods used to troubleshoot the faults that occur on the ADQ1 frequently..................................9-26
Table 9-12 SDH..................................................................................................................................................9-27
Table 9-13 ATM.................................................................................................................................................9-28
Table 9-14 Parameters specified for the optical interfaces of the ADQ1...........................................................9-28
Table 9-15 Functions and features of the IDL4..................................................................................................9-31
cxxxiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 9-16 Optical interface of the IDL4...........................................................................................................9-36

Table 9-17 Relationship between the feature code of the IDL4 and the type of optical interface.....................9-37
Table 9-18 Methods used to troubleshoot the faults that occur on the IDL4 frequently....................................9-39
Table 9-19 SDH..................................................................................................................................................9-41
Table 9-20 ATM.................................................................................................................................................9-42
Table 9-21 Parameters specified for the optical interfaces of the IDL4.............................................................9-43
Table 9-22 Functions and features of the IDL4A...............................................................................................9-45
Table 9-23 Optical interface of the IDL4A........................................................................................................9-50
Table 9-24 Relationship between the feature code of the IDL4A and the type of optical interface..................9-51
Table 9-25 Parameters specified for the optical interfaces of the IDL4A..........................................................9-51
Table 9-26 Functions and features of the IDQ1.................................................................................................9-54
Table 9-27 Optical interfaces of the IDQ1.........................................................................................................9-59
Table 9-28 Relationship between the feature code of the IDQ1 and the type of optical interface.....................9-60
Table 9-29 Methods used to troubleshoot the faults that occur on the IDQ1 frequently...................................9-63
Table 9-30 SDH..................................................................................................................................................9-65
Table 9-31 ATM.................................................................................................................................................9-65
Table 9-32 Parameters specified for the optical interfaces of the IDQ1............................................................9-66
Table 9-33 Functions and features of the IDQ1A..............................................................................................9-68
Table 9-34 Optical interfaces of the IDQ1A .....................................................................................................9-74
Table 9-35 Relationship between the feature code of the IDQ1A and the type of optical interface..................9-74
Table 9-36 Parameters specified for the optical interfaces of the IDQ1A.........................................................9-75
Table 10-1 Functions and features of the EGR2................................................................................................10-4
Table 10-2 Optical interfaces of the EGR2 .....................................................................................................10-12
Table 10-3 Relationship between the feature code of the EGR2 and the type of optical interface..................10-13
Table 10-4 Methods used to troubleshoot the faults that occur on the EGR2 frequently................................10-15
Table 10-5 SDH................................................................................................................................................10-17
Table 10-6 RMON alarm..................................................................................................................................10-17
Table 10-9 Statistics of RMON VCG performance (receive frame count at Span side)..................................10-18
Table 10-15 Parameters specified for the optical interfaces of the EGR2.......................................................10-21
Table 10-16 Throughput specifications of the EGR2.......................................................................................10-23
Table 10-17 Packet loss ratio in the case of overloading of the EGR2............................................................10-23
Table 10-18 Latency specifications of the EGR2.............................................................................................10-24
Table 10-19 Back-to-back specifications of the EGR2....................................................................................10-25
Table 10-20 Functions and features of the EMR0............................................................................................10-28
Table 10-21 Interfaces of the EMR0................................................................................................................10-36
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxxxv

Table 10-22 Slots valid for the EMR0 and the corresponding slots for the ETF8 and EFF8..........................10-37
Table 10-23 Relationship between the feature code of the EMR0 and the type of optical interface...............10-37
Table 10-24 Methods used to troubleshoot the faults that occur on the EMR0 frequently..............................10-40
Table 10-25 SDH..............................................................................................................................................10-41
Table 10-26 RMON alarm................................................................................................................................10-41
Table 10-29 Statistics of RMON VCG performance (receive frame count at Span side)................................10-43
Table 10-35 Parameters specified for the optical interfaces of the EMR0.......................................................10-45
Table 10-36 Throughput specifications of the EMR0 (eight VC-4s are bound on the FE port)......................10-47
Table 10-37 Throughput specifications of the EMR0 (eight VC-4s are bound on the GE port).....................10-48
Table 10-38 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound on the FE port)
...........................................................................................................................................................................10-49
Table 10-39 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound on the GE port)
...........................................................................................................................................................................10-49
Table 10-40 Latency specifications of the EMR0 (eight VC-4s are bound on the FE port)............................10-50
Table 10-41 Latency specifications of the EMR0 (eight VC-4s are bound on the GE port)...........................10-51
Table 10-42 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the FE port)...................10-52
Table 10-43 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the GE port)...................10-52
Table 11-1 Functions and features of the MST4................................................................................................11-3
Table 11-2 Service types service rates supported by the MST4.........................................................................11-4
Table 11-3 Optical interfaces of the MST4........................................................................................................11-9
Table 11-4 Relationship between the feature code of the MST4, the type of supported services, type of optical
interface, and transmission distance....................................................................................................................11-9
Table 11-5 Methods used to troubleshoot the faults that occur on the MST4 frequently................................11-12
Table 11-6 Parameters specified for the optical interfaces of the MST4.........................................................11-13
Table 12-1 Functions and features of the IFSD1................................................................................................12-4
Table 12-2 Interfaces of the IFSD1....................................................................................................................12-8
Table 12-3 Radio work modes..........................................................................................................................12-11
Table 12-4 IF performance...............................................................................................................................12-15
Table 12-5 Baseband signal processing performance of the modem...............................................................12-15
Table 12-6 Functions and features of the RPWR.............................................................................................12-18
Table 12-7 Interfaces of the RPWR.................................................................................................................12-21
Table 13-1 Functions and features of the CMR2...............................................................................................13-4
Table 13-2 Optical interfaces of the CMR2.......................................................................................................13-7
Table 13-3 Feature code of the CMR2...............................................................................................................13-7
Table 13-4 Parameters specified for the optical interfaces of the CMR2...........................................................13-8
Table 13-5 Functions and features of the CMR4.............................................................................................13-10
cxxxvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 13-6 Optical interfaces of the CMR4.....................................................................................................13-13

Table 13-7 Feature code of the CMR4.............................................................................................................13-13
Table 13-8 Parameters specified for the optical interfaces of the CMR4.........................................................13-14
Table 13-9 Functions and features of the MR2................................................................................................13-17
Table 13-13 Functions and features of the MR2A...........................................................................................13-23
Table 13-14 Optical interfaces of the MR2A...................................................................................................13-26
Table 13-15 Parameters specified for the optical interfaces of the MR2A......................................................13-27
Table 13-16 Functions and features of the MR2B...........................................................................................13-29
Table 13-17 Optical interfaces of the MR2B...................................................................................................13-32
Table 13-18 Parameters specified for the optical interfaces of the MR2B.......................................................13-33
Table 13-19 Functions and features of the MR2C...........................................................................................13-35
Table 13-20 Optical interfaces of the MR2C...................................................................................................13-38
Table 13-21 Parameters specified for the optical interfaces of the MR2C.......................................................13-38
Table 13-22 Functions and features of the MR4..............................................................................................13-40
Table 13-26 Functions and features of the LWX.............................................................................................13-47
Table 13-27 Optical interfaces of the LWX.....................................................................................................13-51
Table 13-28 Relationship between the feature code of the LWX and the signal receive/transmit scheme
...........................................................................................................................................................................13-51
Table 13-29 Parameters specified for the client-side optical interfaces of the LWX.......................................13-52
Table 13-30 Parameters specified for the WDM-side optical interfaces of the LWX.....................................13-53
Table 13-31 Functions and features of the FIB................................................................................................13-56
Table 13-32 Optical interfaces of the FIB .......................................................................................................13-57
Table 13-33 Parameters specified for the optical interfaces of the FIB...........................................................13-58
Table 14-1 Versions of the SAP.........................................................................................................................14-2
Table 14-2 Functions and features of the SAP...................................................................................................14-3
Table 14-3 Jumpers on the SAP.........................................................................................................................14-6
Table 14-4 Interfaces of the SAP.......................................................................................................................14-9
Table 14-5 Pins of the ETH and COM interfaces..............................................................................................14-9
Table 14-6 Functions and features of the SEI..................................................................................................14-11
Table 14-7 Interfaces of the SEI.......................................................................................................................14-13
Table 14-8 Pins of the CLK1 and CLK2 interfaces.........................................................................................14-14
Table 14-9 Pins of the F1 interface..................................................................................................................14-14
Table 14-10 Pins of the F&f interface..............................................................................................................14-14
Table 14-11 Pins of the PHONE, V1, and V2 interfaces.................................................................................14-15
Table 14-12 Pins of the LAMP1 and LAMP2 interfaces.................................................................................14-15
Table 14-13 Pins of the ALM01 and ALM02 interfaces..................................................................................14-16
Table 14-14 Pins of the OAM interface...........................................................................................................14-16
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Table 14-15 Pins of the S1, S2, S3, and S4 interfaces.....................................................................................14-17

Table 14-18 Functions and features of the FAN..............................................................................................14-20
Table 15-1 Functions and features of the BA2...................................................................................................15-3
Table 15-2 Optical interface of the one-interface BA2......................................................................................15-8
Table 15-3 Optical interfaces of the two-interface BA2....................................................................................15-8
Table 15-4 Relationship between the feature code of the BA2 and the output optical power...........................15-9
Table 15-5 Parameters specified for the optical interfaces of the BA2..............................................................15-9
Table 15-6 Versions of the BPA.......................................................................................................................15-11
Table 15-7 Functions and features of the BPA.................................................................................................15-12
Table 15-8 Optical interfaces of the BPA........................................................................................................15-15
Table 15-9 Relationship between the feature code of the BPA and the output optical power.........................15-16
Table 15-10 Parameters specified for the optical interfaces of the BPA..........................................................15-16
Table 15-11 Versions of the COA....................................................................................................................15-18
Table 15-12 Functions and features of the 61COA/N1COA...........................................................................15-19
Table 15-13 Functions and features of the 62COA..........................................................................................15-21
Table 15-14 Pin assignments of the RS-232 serial port...................................................................................15-25
Table 15-15 Pin assignments of the MONITOR interfaces.............................................................................15-26
Table 15-16 Pin assignments of the RJ-45 connector of the 62COA...............................................................15-26
Table 15-17 Relationship between the feature code of the 61COA and the output optical power..................15-28
Table 15-18 Parameters specified for the optical interfaces of the COA.........................................................15-28
Table 15-29 Functions and features of the OBU1............................................................................................15-45
Table 15-30 Optical interfaces of the OBU1....................................................................................................15-49
Table 15-31 Feature code of the OBU1............................................................................................................15-49
Table 15-32 Parameters specified for the optical interfaces of the OBU1.......................................................15-50
Table 16-1 Mapping policies of UPM on the OptiX OSN 2500........................................................................16-3
Table 16-2 Functions and features of the EPS75-4815AF power system..........................................................16-4
Table 16-3 Interfaces of the EPS75-4815AF power system..............................................................................16-6
Table 16-4 Power parameters of the UPM.........................................................................................................16-7
Table 16-5 Functions and features of the PIU..................................................................................................16-10
Table 16-6 Interfaces of the PIU......................................................................................................................16-11
cxxxviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 16-7 Pin assignments of the PWS interface of the PIU..........................................................................16-12

Table 16-8 Functions and features of the PIUA...............................................................................................16-14
Table 16-9 Interfaces of the PIUA...................................................................................................................16-16
Table 17-1 Mapping table of the BOM numbers and the types of the SFP/eSFP optical modules ..................17-4
Table 17-2 Mapping table of the BOM numbers and the types of the single-fiber bidirectional eSFP optical modules
.............................................................................................................................................................................17-9
Table 17-3 Mapping table of the BOM numbers and the types of the XFP optical modules..........................17-11
Table 17-4 Mapping table of the BOM numbers and the types of the 2.5 Gbit/s CWDM eSFP optical modules
...........................................................................................................................................................................17-12
Table 17-5 Mapping table of the BOM numbers and the types of the 10 Gbit/s DWDM XFP optical modules
...........................................................................................................................................................................17-13
Table 17-6 Mapping table of the BOM numbers and the types of the 2.5 Gbit/s DWDM eSFP optical modules
...........................................................................................................................................................................17-18
Table 18-1 Categories of the fiber jumpers that the OptiX OSN equipment uses.............................................18-2
Table 18-2 Types of fiber connectors.................................................................................................................18-3
Table 18-3 Technical specifications of the cabinet power cable........................................................................18-7
Table 18-4 Pin assignments of the power cable for the .....................................................................................18-9
Table 18-5 Technical specifications of the power cable for the.........................................................................18-9
Table 18-6 Pin assignments of the COA power cable......................................................................................18-11
Table 18-7 Pin assignments of the UPM power cable......................................................................................18-12
Table 18-8 Technical specifications of the UPM power cable.........................................................................18-12
Table 18-9 Pin assignments of the RPC power cable.......................................................................................18-13
Table 18-10 Technical specifications of the RPC power cable........................................................................18-13
Table 18-11 Pin assignments of the cabinet indicator cable.............................................................................18-15
Table 18-12 Pin assignments of the indicator cascading cable between subracks or the alarm cascading cable
between the OptiX OSN equipment..................................................................................................................18-16
Table 18-13 Pin assignments of the alarm cascading cable between the OptiX OSN equipment and the other Huawei
Table 18-14 Pin assignments of the alarm input/output cable..........................................................................18-20
Table 18-15 Pin assignments of the OAM serial port cable.............................................................................18-22
Table 18-16 Pin assignments of the serial 1–4/F1/F&f serial port cable.........................................................18-23
Table 18-17 Pin assignments of the RS-232/RS-422 serial port cable.............................................................18-24
Table 18-18 Pin assignments of the ordinary telephone line............................................................................18-26
Table 18-19 Pin assignments of the COA cascading cable..............................................................................18-27
Table 18-20 Pin assignments of the straight through cable..............................................................................18-28
Table 18-21 Pin assignments of the crossover cable........................................................................................18-29
Table 18-22 Pin assignments of the 75-ohm 8xE1 cable.................................................................................18-31
Table 18-23 Specifications of the 75-ohm E1 cable with the external braid shield layer................................18-32
Table 18-24 Specifications of the 75-ohm E1 cable without the external braid shield layer...........................18-33
Table 18-25 Pin assignments of the 120-ohm 8xE1 cable...............................................................................18-34
Table 18-26 Pin assignments of the DB28 connector of the DM12.................................................................18-37
Table 18-27 Pin assignments of the V.35 DCE cable......................................................................................18-39
Table 18-29 Pin assignments of the V.24 DCE cable......................................................................................18-42
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxxxix

Table 18-30 Technical specifications of the V.24 DCE cable..........................................................................18-43

Table 18-32 Technical specifications of the V.24 DTE cable..........................................................................18-45
Table 18-33 Pin assignments of the X.21 DCE cable......................................................................................18-45
Table 18-34 Technical specifications of the X.21 DCE cable..........................................................................18-46
Table 18-35 Pin assignments of the X.21 DTE cable.......................................................................................18-47
Table 18-36 Technical specifications of the X.12 DTE cable..........................................................................18-48
Table 18-47 Pin assignments of the two-channel 75-ohm-to-120-ohm clock transit cable.............................18-59
Table 20-1 Labels on the equipment.................................................................................................................. 20-2
Table 20-2 Huawei specifications for the engineering labels.............................................................................20-6
Table 21-1 Information on whether a board of a specific version is supported by the OptiX OSN products
.............................................................................................................................................................................21-2
Table 21-2 Basic functions of SDH boards......................................................................................................21-10
Table 21-3 Basic functions of PDH boards......................................................................................................21-15
Table 21-4 Basic functions of data boards.......................................................................................................21-16
Table 21-5 Loopback capability of the SDH boards........................................................................................21-18
Table 21-6 Information on whether each SDH board of the OptiX OSN equipment supports the insertion of the
AU_AIS when the board is looped back...........................................................................................................21-21
Table 21-7 Loopback capability of the PDH boards........................................................................................21-23
Table 21-8 Loopback capability of the data boards of the OptiX OSN equipment.........................................21-24
Table 21-9 Loopback capability of the ATM/IMA boards of the OptiX OSN equipment..............................21-26
Table 21-10 Protection schemes that the SDH boards of the OptiX OSN equipment support........................21-27
Table 21-11 Protection schemes that the PDH boards of the OptiX OSN equipment support........................21-30
Table 21-12 Protection schemes that the data boards of the OptiX OSN equipment support..........................21-31
Table 21-13 Protection schemes that the microwave boards of the OptiX OSN equipment support..............21-33
Table 21-14 Power consumption and weight of each board............................................................................21-33
Table 22-1 Relation between the service type and the value of the V5 byte......................................................22-3
Table 22-2 Parameters for configuring the basic attributes of an Ethernet port.................................................22-4
Table 22-3 Parameters for configuring flow control of an Ethernet port...........................................................22-6
Table 22-4 Parameters for configuring network attributes of an Ethernet port..................................................22-7
Table 22-5 Parameters for configuring the advanced attributes of an Ethernet port..........................................22-8
Table 22-6 Parameters for configuring the tag attributes of an Ethernet port..................................................22-11
Table 22-7 Parameters for configuring the encapsulation and mapping of an Ethernet port...........................22-12
cxl Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Table 22-8 Parameters for binding paths..........................................................................................................22-14

Table 22-9 Relation between the service type and the value of the C2 byte....................................................22-16
Table 22-10 Relation between the service type and the value of the C2 byte..................................................22-17
Table 22-11 Relation between the service type and the value of the V5 byte..................................................22-17
Table 22-12 Parameters that need to be set for the cross-connect and timing units.........................................22-26
Table 23-1 SDH board parameters.....................................................................................................................23-8
Table 23-2 PDH board parameters.....................................................................................................................23-9
Table 23-3 RTN board parameters...................................................................................................................23-10
Table 23-4 Data board parameters....................................................................................................................23-11
Issue 06 (2011-01-20) Huawei Proprietary and Confidential cxli

Hardware Description 1 Equipment Structure
1 Equipment Structure
The OptiX OSN 2500 equipment consists of the cabinet, cabinet doors, DC power distribution
unit (PDU), subracks, orderwire phone fixing frame, boards, and cables. The OptiX OSN 2500
subrack can be installed in a 300 mm ETSI cabinet, 600 mm ETSI cabinet, or 19-inch cabinet.
Figure 1-1 shows the appearance of the OptiX OSN 2500 that is installed in the 300 mm ETSI
cabinet.
Issue 06 (2011-01-20) Huawei Proprietary and Confidential 1-1

1 Equipment Structure Hardware Description
Figure 1-1 Appearance of the OptiX OSN 2500 that is installed in the 300 mm ETSI cabinet
1
5
2
4 7
7
H
D W
1. DC PDU 2. Side panel 3. Cable distribution plate 4. Subrack
5. Orderwire phone fixing frame 6. Fiber management tray 7. Front door
Figure 1-2 shows the appearance of the OptiX OSN 2500 subrack.
1-2 Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Hardware Description 1 Equipment Structure
Figure 1-2 Appearance of the OptiX OSN 2500 subrack
1. Auxiliary interface area 2. Interface board area 3. Processing board area 4. Power supply area 5. Fan area

Hardware Description 2 Cabinet
2 Cabinet
About This Chapter
Subracks are installed in a cabinet. OptiX OSN subracks need to be installed in appropriate
cabinets.
2.1 Types of Cabinets

The OptiX OSN 2500 subrack can be installed in the 300 mm ETSI cabinet, 600 mm ETSI
cabinet, or 19-inch cabinet.
2.2 Configuration of the Cabinet
An ETSI cabinet has indicators and a DC PDU at the top.
2.3 Technical Specifications
The technical specifications of the cabinet include the dimensions, weight, and number of
permitted subracks.

2 Cabinet Hardware Description
2.1 Types of Cabinets

The OptiX OSN 2500 subrack can be installed in the 300 mm ETSI cabinet, 600 mm ETSI
cabinet, or 19-inch cabinet.
NOTE
The cabinets described in this topic are provided by Huawei.
The 300 mm ETSI cabinet is available in two types, namely, T63 cabinet and N63E cabinet.
Figure 2-1 shows the appearances of the T63 cabinet and N63E cabinet.

Figure 2-1 Appearances of the T63 cabinet and N63E cabinet
T63 Cabinet N63E Cabinet
Comparison Between the Specifications of the T63 Cabinet and the Specifications
of the N63E Cabinet
Table 2-1 describes the comparison between the specifications of the T63 cabinet and the
specifications of the N63E cabinet.

Table 2-1 Comparison between the specifications of the T63 cabinet and the specifications of
the N63E cabinet
Cabinet Dimensions (mm) Weight (kg)
300 mm ETSI cabinet (T63) 600 (W) x 300 (D) x 2000 (H) 55
600 (W) x 300 (D) x 2200 (H) 60
600 (W) x 300 (D) x 2600 (H) 70
300 mm ETSI cabinet (N63E) 600 (W) x 300 (D) x 2000 (H) 42
600 (W) x 300 (D) x 2200 (H) 45
T63 Cabinet
The specifications of the T63 cabinet comply with the ETSI standard. The T63 cabinet is 600
mm wide and 300 mm deep.
There are two grounding bolts on the frame at the top of the T63 cabinet. Figure 2-2 shows the
locations of the cable holes at the top of the T63 cabinet. Figure 2-3 shows the locations of the
cable holes at the bottom of the T63 cabinet.
Figure 2-2 Locations of the cable holes at the top of the T63 cabinet
600mm
106mm 200mm 106mm
Cabling hole
200mm
160mm
295mm
15mm
110mm 110mm
Power cable hole Cabniet grounding terminal

Figure 2-3 Locations of the cable holes at the bottom of the T63 cabinet
600mm
106mm 200mm 106mm
Cabling hole
200mm
160mm
295mm
15mm
Cabniet installtion hole 110mm
Power cable hole
N63E Cabinet
The specifications of the N63E cabinet comply with the ETSI standard. The N63E cabinet is
600 mm wide and 300 mm deep.
There are two grounding bolts on the frame at the top of the N63E cabinet. Figure 2-4 shows
the locations of the cable holes at the top of the N63E cabinet. Figure 2-5 shows the locations
of the cable holes at the bottom of the N63E cabinet.
Figure 2-4 Locations of the cable holes at the top of the N63E cabinet
Cable hole Cable hole Cable hole Cable hole
600mm
143mm 155mm 62mm
188mm 81mm
300mm
66mm
251mm
Grounding bolt
Fiber hole Fiber hole
Power cable hole

Figure 2-5 Locations of the cable holes at the bottom of the N63E cabinet
Cable hole Cable hole
184mm
360mm
CAUTION
The difference between the cable routing in the case of the T63 cabinet and the cable routing in
the case of the N63E cabinet is with regard to the cable routing at the top and bottom cable holes.
The cable routing in the T63 cabinet is the same as the cable routing in the N63E cabinet.
The T63 cabinet is approximately 16 mm deeper than the N63E cabinet. When you install the
mounting ears of the components, select proper mounting holes according to the type of cabinet
on site.
Enclosure Frame
Only the 2000 mm and 2200 mm high N63E cabinets are available. If the 2600 mm high N63E
cabinet is required, you need to place a 400 mm high enclosure frame on the top of the 2200
mm high N63E cabinet.
Figure 2-6 shows the picture and dimensions of the enclosure frame.
Figure 2-6 Picture and dimensions of the enclosure frame
m 60
0m 0m
3 0 m
400mm

N66T Cabinet
The 600 mm ETSI cabinet is called the N66T cabinet. The N66T cabinet uses both the front and
rear columns, and it has a single front door and a single rear door. Figure 2-7 shows the
appearance of the N66T cabinet.

Figure 2-7 Appearance of the N66T cabinet
Table 2-2 lists the specifications of the N66T cabinet.

Table 2-2 Specifications of the N66T cabinet

Cabinet Dimensions (mm) Weight (kg)
N66T cabinet 600 (W) x 600 (D) x 2000 (H) 71
600 (W) x 600 (D) x 2200 (H) 76
There are two grounding bolts on the frame at the top of the N66T cabinet. Figure 2-8 shows
the locations of the cable holes at the top of the N66T cabinet. Figure 2-9 shows the locations
of the cable holes at the bottom of the N66T cabinet.
Figure 2-8 Locations of the cable holes at the top of the N66T cabinet
600 mm
224 mm
17.8 mm
95 mm 95 mm 95 mm 95 mm
215 mm
Cabling hole
600 mm
17.8 mm
Power cable hole Cabniet grounding terminal
224 mm

Figure 2-9 Locations of the cable holes at the bottom of the N66T cabinet
Cabling hole Cabling hole
184 mm
360 mm
2.2 Configuration of the Cabinet

An ETSI cabinet has indicators and a DC PDU at the top.
Figure 2-10 shows the positions of the indicators and the DC PDU.
Figure 2-10 ETSI cabinet

1
PowerCritical MajorMinor
Power distribution unit
W D
1. Indicators 2. DC PDU
2.2.1 Indicators
The ETSI cabinet has one power indicator and three alarm severity indicators.

2.2.2 DC Power Distribution Unit

The DC power distribution unit (PDU) is located on the top of a cabinet and is used to supply
power to the equipment.
2.2.3 Other Configurations
In addition to subracks, external case-shaped devices can be installed in a cabinet as required.
2.2.1 Indicators
The ETSI cabinet has one power indicator and three alarm severity indicators.
Table 2-3 describes the meanings of the status of the indicators.
Table 2-3 Meanings of the status of the indicators
Indicator Status Meaning
Power indicator - Power (green) On Power is supplied to the

equipment.
Off Power is not supplied to

the equipment.
Critical alarm indicator - Critical (red) On A critical alarm occurs

on the equipment.
Off No critical alarm

occurs on the
equipment.
Major alarm indicator - Major (orange) On A major alarm occurs

on the equipment.
Off No major alarm occurs

on the equipment.
Minor alarm indicator - Minor (yellow) On A minor alarm occurs

on the equipment.
Off No minor alarm occurs

on the equipment.
CAUTION
The status of the indicators is controlled by the SEI on the subrack. The indicators work only
after the cables of the indicators are correctly connected and the subrack is powered on.
2.2.2 DC Power Distribution Unit

The DC power distribution unit (PDU) is located on the top of a cabinet and is used to supply
power to the equipment.

DC Power Distribution Unit N1PDU

Figure 2-11 shows the front panel of the general cabinet DC PDU, N1PDU.
Figure 2-11 Front panel of the N1PDU

1 7 2 3 4 5 8 6
1 2 3
OUTPUT
4
A B 1 2 3
OUTPUT
4
ON ON
RTN1(+) RTN2(+) NEG1(-) NEG2(-)
OFF OFF
INPUT
32A 32A 20A 20A 32A 32A 20A 20A
1. Terminal block (A) 2. Power grounding cable RTN1(+)

3. Power grounding cable RTN2(+) 4. Power cable NEG1(-)
5. Power cable NEG2(-) 6. Terminal block (B)
7. PGND 8. Power switch
In the case of the OptiX OSN 2500, the output terminal block on side A supplies power to the
power interface board on side A of the subrack, and the output terminal block on side B supplies
power to the power interface board on side B of the subrack. Table 2-4 shows the connections
of the output terminal blocks on side A and side B.
Table 2-4 Connections of the output terminal blocks on side A and side B
Terminal Corresponding Subrack Terminal Corresponding Subrack
Block on and Power Interface Block on and Power Interface
Side A Board Side B Board
1 Power interface board on 1 Power interface board on

side A of the first subrack side B of the first subrack

side A of the second subrack side B of the second subrack

side A of the third subrack side B of the third subrack

side A of the fourth subrack side B of the fourth subrack

NOTE
In the case of an enhanced subrack, the two power inputs work in load-sharing mode (each input carries
10 A). In the telecommunications room, however, the PDU needs to provide power supply of 20 A to an
entire subrack. In the case of a general subrack, the two power inputs work in load-sharing mode (each
input carries 7.5 A). In the telecommunications room, however, the PDU needs to provide power supply
of 15 A to an entire subrack. In this case, power failure will not occur if either of the power inputs fails.
2.2.3 Other Configurations

In addition to subracks, external case-shaped devices can be installed in a cabinet as required.
l Uninterruptible power module (UPM)
l Roman pump amplifiers RPC01 and RPC02
l Orderwire phone
l Dispersion compensation module (DCM)
l Case-shaped optical amplifier (COA)
l Fiber management tray

The technical specifications of the cabinet include the dimensions, weight, and number of
permitted subracks.
Table 2-5 lists the technical specifications of the ETSI cabinet.
Table 2-5 Technical specifications of the ETSI cabinet
Dimensions (mm) Weight (kg) Number of Permitted

Subracks
600 (W) x 300 (D) x 2000 (H) (T63) 58 2
600 (W) x 300 (D) x 2000 (H) 41 2

(N63E)
600 (W) x 600 (D) x 2000 (H) 71 2

(N66T)
600 (W) x 600 (D) x 2000 (H) (T66) 80 2
600 (W) x 300 (D) x 2200 (H) (T63) 63 3
600 (W) x 300 (D) x 2200 (H) 45 3

(N63E)
600 (W) x 600 (D) x 2200 (H) 76 3

(N66T)
600 (W) x 600 (D) x 2200 (H) (T66) 85 3
600 (W) x 300 (D) x 2600 (H) (T63) 73 4
600 (W) x 600 (D) x 2600 (H) (T66) 101 4

NOTE
Both the N63E cabinet and N66T cabinet are available in two heights, namely, 2000 mm and 2200 mm. If
the cabinet that is 2600 mm high is required, add an enclosure frame that is 400 mm high on a cabinet that
is 2200 mm high.
The DC power distribution unit (PDU) is located on the top of a cabinet and is used to provide
power to the equipment. Table 2-6 lists the technical specifications of the PDU.
Table 2-6 Technical specifications of the PDU

Board Dimensions Single- Single- Output Maximum
(mm) Cabinet Cabinet Current (A) Number of
Input Output Allowed
Voltage (V) Voltage (V) Subracks
N1PDU 530 (W) x 97 -48 (DC) -38.4 to -57.6 l 4x20 A 4

(D) x 133 (H) l 4x32 A
-60 (DC) -48 to -72
NOTE
l Two power inputs need to be provided, and they work in 1+1 load-sharing mode.
l In the telecommunications room, it is required that the PDU needs to provide power supply for an
entire subrack. In this case, normal power supply can be guaranteed when either of the power inputs
fails.

Hardware Description 3 Subrack
3 Subrack
About This Chapter
This topic describes the structure, capacity, slot layout, and technical specifications of the
subrack.
3.1 Structure
The OptiX OSN 2500 subrack has a one-layer structure. The subrack consists of the processing
board area, interface board area, auxiliary interface area, power supply area, and fan area.
3.2 Slot Allocation
The OptiX OSN 2500 subrack has only one layer. The left portion and right portion of the
subrack, where 8 slots are present, are slot areas for interface boards. The middle portion of the
subrack, where 10 slots are present, is the slot area for processing boards.
3.3 Slot Access Capacity
When slots 9 and 10 house the Q2CXL and Q3CXL boards, the access capacity of the OptiX
OSN 2500 subrack is different from each other before and after slot division. When slots 9 and
10 house the Q5CXL board, the access capacity of the OptiX OSN 2500 subrack is the same
before and after slot division.
3.4 Ventilation Mode
The subrack of the equipment has many minute air vents and houses fans. The air enters from
the front and exits from the back, and the air flows from the bottom to the top. In this manner,
the equipment has good performance in heat dissipation.
3.5 Cable Management
This topic describes the function of the fiber spool box and the overall scheme for cable routing.
3.6 Mapping Policies of Power Consumption
The increasing features supported by the equipment causes higher power consumption. To
ensure the normal operation of the equipment, the internal power supply system provides
different mapping policies of power consumption according to different power consumption
requirements.
The technical specifications of the subrack include the dimensions, weight, and maximum power
consumption.

3 Subrack Hardware Description
3.1 Structure
The OptiX OSN 2500 subrack has a one-layer structure. The subrack consists of the processing
board area, interface board area, auxiliary interface area, power supply area, and fan area.
Figure 3-1 shows the structure of the OptiX OSN 2500 subrack.
Figure 3-1 Structure of the OptiX OSN 2500 subrack
2 1
W
D
1. Auxiliary interface area 2. Interface board area

3. Processing board area 4. Power supply area
5. Fan area
The functions of the areas are as follows:
l Auxiliary interface area: This area provides the alarm interfaces, orderwire phone interface,
management and maintenance interfaces, and clock interfaces.
l Interface board area: This area houses the tributary interface boards and Ethernet interface
boards of the OptiX OSN 2500.
l Processing board area: These areas house the line signal processing boards, tributary signal
processing boards, Ethernet signal processing boards, auxiliary processing boards, and SCC
unit, cross-connect unit, and line unit integrated boards of the OptiX OSN 2500.
l Fan area: This area houses two fan modules, which dissipate heat generated by the
equipment.
l Power supply area: This area houses two PIUs, which are used to supply power to the
subrack.

NOTE
If a label that contains "Enhanced Subrack" is affixed to the equipment, it indicates that the subrack uses a
backplane of the later version.
NOTE
The interface board is also called the access board or transit board. The interface board provides physical
interfaces for optical signals and electrical signals, and transmits the optical signals or electrical signals to
the corresponding processing board.
3.2 Slot Allocation

The OptiX OSN 2500 subrack has only one layer. The left portion and right portion of the
subrack, where 8 slots are present, are slot areas for interface boards. The middle portion of the
subrack, where 10 slots are present, is the slot area for processing boards.
Figure 3-2 shows the slot layout of the OptiX OSN 2500 subrack.
Slots 5-7 in the OptiX OSN 2500 subrack can be divided into half-height slots.
Figure 3-2 Slot layout of the OptiX OSN 2500 subrack (before the division of slots)
S S S S S S S S S S S S S S S S S S
L L L L L L L L L L L L L L L L L L
O O O O O O O O O O O O O O O O O O
T T T T T T T T T T T T T T T T T T
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
processing board
processing board
processing board
processing board
processing board
processing board
processing board
interface board
interface board
interface board
interface board
interface board
interface board
interface board
interface board
CXL16/4/1
CXL16/4/1
S
A
P
Fiber Routing
PIU FAN FAN PIU

SLOT22 SLOT24 SLOT25 SLOT23
Figure 3-3 shows the slot layout of the OptiX OSN 2500 subrack after the division of slots.

Figure 3-3 Slot layout of the OptiX OSN 2500 subrack (after the division of slots)
1 2 3 4 1 2 2 8 9 1 1 1 1 1 1 1 1 1
9 0 1 0 1 2 3 4 5 6 7 8
processing board
processing board
processing board
processing board
interface board
interface board
interface board
interface board
interface board
interface board
interface board
interface board
CXL16/4/1
CXL16/4/1
S S S
L L L
O O O S
T T T A
5 6 7 P
Fiber Routing
PIU FAN FAN PIU

Slot Area for Interface Boards

Slots for interface boards: slots 1-4 and 15-18
Slot Area for Processing Boards

l Slots for processing boards before the division of slots: slots 5-8 and 11-13
l Slots for processing boards after the division of slots: slots 5-8, 11-13, and 19-21
l Slots for integrated boards of the line, SCC, cross-connect and timing units: slots 9-10
l Slot for the system auxiliary processing board: slot 14
Other Slots
l SEI auxiliary interface board: slot area for auxiliary interface boards
l Slots for PIU boards: slots 22-33
l Slots for fan boards: slots 24-25
Mapping Relation Between Slots for Interface Boards and Slots for Processing
Boards
Table 3-1 lists the mapping relation between slots for interface boards and slots for processing
boards.

Table 3-1 Mapping relation between slots for interface boards and slots for processing boards
for the OptiX OSN 2500
Slots for Slots for Interface Slots for Slots for Interface
Processing Boards Boards Processing Boards Boards
Slot 6 Slots 1 and 2 Slot 12 Slots 15 and 16
Slot 7 Slots 3 and 4 Slot 13 Slots 17 and 18
Slot 6 (half-height Slot 2 Slot 20 (half-height Slot 1

slot) slot)
Slot 7 (half-height Slot 4 Slot 21 (half-height Slot 3

slot) slot)
Paired Slots
If the overhead bytes pass through the backplane bus between two slots, the two slots are paired
slots. When an NE is configured with an orderwire phone, realizes the service protection in DPS
mode, the two boards that form a ring must be inserted in the paired slots. Table 3-2 lists the
paired slots.
Table 3-2 Paired slots

Slot Division Status Paired Slots
Before division of slots (Slot 6, Slot 13)
(Slot 7, Slot 12)
(Slot 8, Slot 11)
(Slot 9, Slot 10)
After division of slots (Slot 5, Slot 19)
(Slot 6, Slot 20)
(Slot 7, Slot 21)
(Slot 8, Slot 11)
(Slot 9, Slot 10)
3.3 Slot Access Capacity

When slots 9 and 10 house the Q2CXL and Q3CXL boards, the access capacity of the OptiX
OSN 2500 subrack is different from each other before and after slot division. When slots 9 and
10 house the Q5CXL board, the access capacity of the OptiX OSN 2500 subrack is the same
before and after slot division.

Slots 5, 6 and 7 in the OptiX OSN 2500 subrack can be divided into half-height slots according
to the requirement. Figure 3-4 shows the access capacity of each slot when the three slots are
not divided. Figure 3-5 shows the access capacity of each slot when the three slots are divided.
When slots 9 and 10 in the OptiX OSN 2500 subrack house the Q5CXL board, the access capacity
is 22.5 Gbit/s. Figure 3-6 shows the access capacity before the slots are divided. Figure 3-7
shows the access capacity after the slots are divided.
Figure 3-4 Access capacity of each slot before slot division when slots 9 and 10 house the
Q2CXL and Q3CXL boards
S S S S S S S S S S
L L L L L L L L L L
O O O O O O O O O O
S S S S T T T T T T T T T T S S S S
L L L L 5 6 7 8 9 1 1 1 1 1 L L L L
O O O O 0 1 2 3 4 O O O O
T T T T T T T T
1 2 3 4 1 1 1 1
5 6 7 8
1.25Gbit/s
622Mbit/s
622Mbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
S
A
P
Cable Routing
PIU FAN FAN PIU


Figure 3-5 Access capacity of each slot after slot division when slots 9 and 10 house the Q2CXL
and Q3CXL boards
S S S
L L L
O O O
T T T
1 2 2
9 0 1
S S S S S S S
622Mbit/s
622Mbit/s
1.25Gbit/s
L L L L L L L
O O O O O O O
S S S S T T T T T T T S S S S
L L L L 8 9 1 1 1 1 1 L L L L
O O O O 0 1 2 3 4 O O O O
T T T T T T T T
1 2 3 4 S S S 1 1 1 1
L L L 5 6 7 8
O O O
1.25Gbit/s
T T T
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
5 6 7
S
A
622Mbit/s
622Mbit/s
1.25Gbit/s
Cable Routing
PIU FAN FAN PIU

Figure 3-6 Access capacity of each slot before slot division when slots 9 and 10 house the
Q5CXL board
S S S S S S S S S S
L L L L L L L L L L
O O O O O O O O O O
S S S S T T T T T T T T T T S S S S
L L L L 5 6 7 8 9 1 1 1 1 1 L L L L
O O O O 0 1 2 3 4 O O O O
T T T T T T T T
1 2 3 4 1 1 1 1
5 6 7 8
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
S
A
P
Cable Routing
PIU FAN FAN PIU


Figure 3-7 Access capacity of each slot after slot division when slots 9 and 10 house the Q5CXL
board
S S S
L L L
O O O
T T T
1 2 2
9 0 1
S S S S S S S
1.25Gbit/s
1.25Gbit/s
1.25Gbit/s
L L L L L L L
O O O O O O O
S S S S T T T T T T T S S S S
L L L L 8 9 1 1 1 1 1 L L L L
O O O O 0 1 2 3 4 O O O O
T T T T T T T T
1 2 3 4 S S S 1 1 1 1
L L L 5 6 7 8
O O O
T T T
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
2.5Gbit/s
5 6 7
S
A
1.25Gbit/s
1.25Gbit/s
1.25Gbit/s
Cable Routing
PIU FAN FAN PIU

3.4 Ventilation Mode

The subrack of the equipment has many minute air vents and houses fans. The air enters from
the front and exits from the back, and the air flows from the bottom to the top. In this manner,
the equipment has good performance in heat dissipation.
NOTE
Make smooth ventilation of the air pipe of the cabinet. Do not block the air inlets and outlets of the subrack.
Do not place any sundries in the upper part of the subrack to ensure that air can flow through the subrack.

Figure 3-8 Ventilation mode of the OptiX OSN 2500
AIR OUT
AIR IN
3.5 Cable Management

This topic describes the function of the fiber spool box and the overall scheme for cable routing.
Fiber Spool Box

The fiber spool box is used to coil the redundant optical fibers inside the cabinet, and is installed
under a subrack by default. Figure 3-9 shows the appearance of a fiber spool box.

Figure 3-9 Appearance of a fiber spool box
Cable-through Fiber spool

hole box
For the installation position of the fiber spool box in the cabinet, see 1 Equipment Structure.
Overall Scheme for Fiber Jumper Routing

l The fiber jumpers of the equipment are routed through the front vertical columns at the two
sides of the cabinet.
l The fiber jumpers of the equipment are led out through the fiber hole of the cabinet.
l The fiber jumpers between the cabinet and the ODF are protected with a protection pipe.
The two ends of the protective pipe should be extended 10 cm into the cabinet and the ODF.
l The fiber jumpers are secured smoothly and interconnected reliably in the ODF. The
redundant fiber jumpers are coiled tidily.
l When the internal fiber jumpers are routed, the redundant fibers are coiled tidily in the fiber
spool box.
l The routing and connection of the fiber jumpers should be consistent with the design. The
optical attenuators are added according to the requirements of the engineering design.
l The bend radius of the fiber jumper must be greater than its minimum curvature radius.
Specifically, the minimum curvature radius for the 2 mm fiber jumper is 40 mm, and that
for the 3 mm fiber jumper is 60 mm.
Overall Scheme for Cable Routing

l The external power cables and grounding cables are arranged separately from the signal
cables, with a space more than 3 cm.
l The power cables of the subrack are bundled under the cable distribution plate. The power
cables of the subrack are routed separately towards the back of the two sides of the cabinet,
and are routed along the back of the side doors to reach the power box.
l The power cables of the IF board connect the IF power board to the IF board and are routed
through the cable-routing channel. If the IF power cable is redundant in the cable-routing
channel, bundle the redundant part of the power cable on the vertical column or at the cable-
routing area on the side of the cabinet.
l The method of routing the IF cables is the same as the method of routing the signal cables.

l In the case of upward cabling, the signal cables of the upper subrack are led out from the
cable-through holes in the top middle of the cabinet, and the signal cables of the lower
subrack are led out from the cable-through holes on the two sides of the top of the cabinet.
l In the case of downward cabling, the signal cables of the upper and lower subracks are led
out from the cable-through holes on the two sides of the bottom of the cabinet.
3.6 Mapping Policies of Power Consumption

The increasing features supported by the equipment causes higher power consumption. To
ensure the normal operation of the equipment, the internal power supply system provides
different mapping policies of power consumption according to different power consumption
requirements.
The internal power supply system consists of PDU and PIU. Table 3-3 shows different mapping
policies of power consumption.
Table 3-3 Mapping policies of power consumption on the OptiX OSN 2500
Type of Label of Subrack Mapping Mapping Maximu Fuse

Subrack PDU PIU m Power Capacity
Consump of Circuit
tion Breakers
in a DC
PDU
Standard - N1PDU Q1PIU, 400 W 15 A

OptiX Q1PIUA
OSN 2500
subrack
Enhanced - N1PDU Q1PIUA 650 W 20 A

OptiX
OSN 2500
subrack

The technical specifications of the subrack include the dimensions, weight, and maximum power
consumption.
Table 3-4 lists the dimensions and weight of the OptiX OSN 2500 subrack.
Table 3-4 Dimensions and weight of the OptiX OSN 2500 subrack
Dimensions (mm) Weight (kg)
447 (W) x 295 (D) x 472 (H) 17 (net weight of the subrack that is not
installed with boards or fans)

Table 3-5 lists the maximum power consumption of the OptiX OSN 2500 subrack.
Table 3-5 Maximum power consumption of the OptiX OSN 2500 subrack
Subrack Maximum Typical Configuration
Type Configuration
Maximum Fuse Typical Typical Configuration

Power Capacity Power
Consumptio Consum
n ption
General 400 W 15 A 222 W l One Q2SAP board

OptiX OSN l Two Q2CXL16 (S-16.1, LC)
2500 subrack boards
l Two N1SL4A (S-4.1, LC)
boards
l One N1SLQ1A (S-1.1, LC)
board
l Two N2PQ1 boards
l One N1EFT8A board
l Two Q1PIU boards
Enhanced 650 W 20 A 313 W l One Q2SAP board

OptiX OSN l Two Q2CXL16 (S-16.1, LC)
2500 subrack boards
l Two N1SL4A (S-4.1, LC)
boards
l Two N2PQ1 boards
l Four N4EGS4 boards
l Two Q1PIUA boards
NOTE
When the cabinet is fully loaded, the maximum power consumption is the sum of the maximum power
consumption of all subracks and the maximum power consumption of other configuration.

Hardware Description 4 Board List and Classification
4 Board List and Classification
About This Chapter
This topic describes the appearances, dimensions, bar codes, and classification of the boards
used on the OptiX OSN systems.
4.1 Appearances and Dimensions of the Boards

Different boards have different appearances and dimensions.
4.2 Bar Codes of the Boards
The bar code on the front panel of a board indicates the version, name, and feature code of the
board.
4.3 Classification of the Boards
The boards are classified into SDH boards, PDH boards, data boards, WDM boards, and auxiliary
boards according to the functions of the boards.

4 Board List and Classification Hardware Description
4.1 Appearances and Dimensions of the Boards

Different boards have different appearances and dimensions.
Table 4-1 provides information about the appearances and dimensions of the boards used on
the OptiX OSN 2500.
Table 4-1 Appearances and dimensions of boards used on the OptiX OSN 2500
Parameter Appearance and Dimensions
Board appearance
Board classification Optical interface board (for Fan board (FAN) System auxiliary interface
example, SL16) board (Q1SAP)
Height (mm) 262.05 50.8 262.05
Depth (mm) 220 120 220
Width (mm) 25.4 120 25.4
Board appearance
Board classification SCC unit, cross-connect Power interface unit

unit, and line unit (Q1PIU)
integrated board at the
STM-1 rate (CXL)
Height (mm) 262.05 262.05
Depth (mm) 220 74
Width (mm) 25.4 44
Note: The figure in the right cell shows the three dimensions. "H" and "W" H
indicate the height and width of the front panel respectively and "D" indicates
the depth of the printed circuit board (PCB). D W
CAUTION
Wear an antistatic wrist strap when holding a board. To prevent the static discharge from
damaging the board, ensure that the antistatic wrist strap is grounded properly.

DANGER
Do not look directly at the optical interface board or optical interface. The laser beams inside
the fiber can damage your eyes.
CAUTION
l A level optical module cannot be directly connected to an optical attenuator. If an optical
attenuator is required, use the attenuator on the optical distribution frame (ODF) side.
l If an optical attenuator is required, insert the attenuator in the IN interface instead of the OUT
interface.
l Add an attenuator when performing a loopback at an optical interface to prevent the optical
module from being damaged.
4.2 Bar Codes of the Boards

The bar code on the front panel of a board indicates the version, name, and feature code of the
board.
Two types of bar codes are used for the boards of the OptiX OSN 2500, which are as follows:
l 16-digit manufacturing code + board version + board name + board feature code
l 20-digit manufacturing code + board version + board name + board feature code
The bar code is affixed to the front panel of a board. Figure 4-1 shows the bar code with a 16-
digit manufacturing code.

Figure 4-1 Bar code of a board
Bar code
0364401055000015 -SSN3SL16A01
① ② ③ ④ 5
① Last six digits of the BOM code

② Internal code
③ Board version
④ Board name
5 Board feature code
NOTE
The positions of bar codes vary according to boards. For details on the feature code of a board, see the
topic that describes the feature code of the board.
4.3 Classification of the Boards

The boards are classified into SDH boards, PDH boards, data boards, WDM boards, and auxiliary
boards according to the functions of the boards.
SDH Boards
NOTE
For details on the board version replacement relation between boards, refer to the table of board version
replacement relations in the Parts Replacement.
The OptiX OSN 2500 supports the SDH boards that operate at the STM-16, STM-4, and STM-1
rates.
Table 4-2 lists the SDH boards that the OptiX OSN 2500 supports.

Table 4-2 SDH boards that the OptiX OSN 2500 supports
Board Description Board Description
N1SL16, 1xSTM-16 optical interface N1SLQ1, 4xSTM-1 optical interface

N2SL16, board N2SLQ1 board
N3SL16
N1SL16A, 1xSTM-16 optical interface N1SLQ1A 4xSTM-1 optical interface

N2SL16A, board board
N3SL16A
N1SF16 1xSTM-16 optical interface R1SLQ1 4xSTM-1 optical interface

board with the out-band board (divided slot)
forward error correction
(FEC) function
N1SL4, 1xSTM-4 optical interface N1SL1, 1xSTM-1 optical interface

N2SL4, board N2SL1 board
N1SL4A
R1SL4 1xSTM-4 optical interface N1SL1A

board (divided slot)
N1SLQ4, 4xSTM-4 optical interface R1SL1 1xSTM-1 optical interface

N2SLQ4, board board (divided slot)
N1SLQ4A
N1SLD4, 2xSTM-4 optical interface N1SEP1 2xSTM-1 line processing

N2SLD4, board board when the interfaces are
N1SLD4A available on the front panel
8xSTM-1 line processing
board when the interfaces are
available on the
corresponding interface
board
R1SLD4 2xSTM-4 optical interface N2SLO1, 8xSTM-1 optical interface

board (divided slot) N3SLO1 board
N1SLT1 12xSTM-1 optical interface N3SLQ41 4xSTM-4/STM-1 optical

board interface board
N1OU08 8xSTM-1 optical/ electrical N2OU08 8xSTM-1 optical interface

interface board (LC) board (SC)
N1EU04 4xSTM-1 electrical interface N1EU08 8xSTM-1 electrical interface

board board
PDH Boards
The OptiX OSN 2500 supports the PDH boards that operate at different rates and have different
impedances.
Table 4-3 lists the PDH boards that the OptiX OSN 2500 supports.

Table 4-3 PDH boards that the OptiX OSN 2500 supports
R1PD1, 32xE1 service processing board N1PD3, 6xE3/T3 service processing

R2PD1 N2PD3 board
N1PQ1, 63xE1 service processing board N2PQ3 12xE3/T3 service processing

N2PQ1 board
N1PQM 63xE1/T1 service processing N1DX1 DDN service accessing and

board converging board
N1PL3, 3xE3/T3 service processing N1DXA DDN service converging and

N2PL3 board processing board
N1PL3A 3xE3/T3 service processing N1SPQ4, 4xE4/STM-1 electrical

board (The interfaces are N2SPQ4 processing board
available on the front panel.)
N2PL3A 3xE3/T3 service processing N1MU04 4xE4/STM-1 electrical

board (The interfaces are interface board
available on the front panel.)
N1D75S 32xE1 switching access board N1D34S 6xE3/T3 switching access

(75 ohms) board
N1C34S 3xE3/T3 switching access N1D12S 32xE1/T1 switching access

board board (120 ohms)
N1D12B 32xE1/T1 access board (120 N1DM12 DDN service interface board
ohms)
N1TSB4 4-channel electrical interface N1TSB8 8-channel electrical interface

protection switching board protection switching board
EoS/EoP Boards
The OptiX OSN 2500 supports EoS boards with the transparent transmission and switching
functions.
Table 4-4 lists the EoS/EoP Boards that the OptiX OSN 2500 supports.
Table 4-4 EoS/EoP Boards that the OptiX OSN 2500 supports
R1EFT4 4xFE transparent N1EMS4 4xGE and 16xFE transparent

transmission board (divided transmission and converging
slot) board
N1EFT8, 8xFE or 16xFE transparent N1EMS2 2xGE and 16xFE transparent

N2EFT8 transmission board transmission and converging
board

N1EFT8A, 8xFE transparent N1EGT2, 2xGE transparent

N2EFT8A transmission board N2EGT2 transmission board
N1EFS0, 8xFE switching and N1EFS0A 16xFE switching and

N2EFS0, processing board processing board
N4EFS0,
N5EFS0
N1EFS4, 4xFE switching and N1EGS4, 4xGE switching and

N2EFS4, processing board N3EGS4, processing board
N3EFS4 N4EGS4
N2EGS2, 2xGE switching and N1MST4 4-port multi-service

N3EGS2 processing board transparent transmission
board
N1EFF8, 8x100M Ethernet optical N1ETF8, 8x100M Ethernet twisted pair

N1EFF8A interface board N1ETF8A interface board
N1ETS8 8x10/100M Ethernet twisted - -

pair interface switching board
N1EFP0 8-port PDH-based Ethernet - -

switching and processing
board
ATM Boards
The OptiX OSN 2500 supports multiple ATM boards.
Table 4-5 lists the ATM boards that the OptiX OSN 2500 supports.
Table 4-5 ATM boards that the OptiX OSN 2500 supports
N1ADQ1 4xSTM-1 ATM service N1ADL4 1xSTM-4 ATM service

processing board processing board
N1IDQ1, 4xSTM-1 ATM service N1IDL4, 1xSTM-4 ATM service

N1IDQ1A processing board N1IDL4A processing board
RPR Boards
The OptiX OSN 2500 supports multiple RPR boards.
Table 4-6 lists the RPR Boards that the OptiX OSN 2500 supports.

Table 4-6 RPR Boards that the OptiX OSN 2500 supports
N2EGR2 2xGE ring processing board N2EMR0 12xFE and 1xGE ring
processing board
Cross-Connect Boards and System Control Boards

The OptiX OSN 2500 supports the SCC unit, cross-connect unit, and line unit integrated boards
that are at different rates.
Table 4-7 lists the SCC unit, cross-connect unit, and line unit integrated boards that the OptiX
OSN 2500 supports.
Table 4-7 SCC unit, cross-connect unit, and line unit integrated boards that the OptiX OSN 2500
supports
Board Description
Q2CXL1, Q3CXL1 1xSTM-1 SCC unit, cross-connect unit, timing unit, and line unit
integrated board
integrated board
integrated board
Q5CXLLN 1xSTM-16/STM-4/STM-1 SCC unit, cross-connect unit, timing

unit, and line unit integrated board
Q5CXLQ41 4xSTM-4/STM-1 SCC unit, cross-connect unit, timing unit, and

line unit integrated board
Auxiliary Boards
The OptiX OSN 2500 supports auxiliary boards such as the system auxiliary interface board and
fan board.
Table 4-8 lists the auxiliary boards that the OptiX OSN 2500 supports.
Table 4-8 Auxiliary boards that the OptiX OSN 2500 supports
Q1SAP, System auxiliary N1FAN Fan board

Q2SAP processing unit
Q1SEI Signal extended - -

interface board

WDM Boards
The OptiX OSN 2500 supports WDM boards such as the optical add/drop multiplexing board
and optical amplifier board.
Table 4-9 lists the WDM boards the OptiX OSN 2500 supports.
Table 4-9 WDM boards the OptiX OSN 2500 supports

TN11CMR2 2-channel optical add/ N1MR2B 2-channel optical add/drop

drop multiplexing board multiplexing board
TN11CMR4 4-channel optical add/ N1MR2C 2-channel optical add/drop

drop multiplexing board multiplexing board
TN11MR2 2-channel optical add/ N1LWX Arbitrary bit rate

drop multiplexing board wavelength conversion
board
TN11MR4 4-channel optical add/ TN11OBU1 Optical booster amplifier

drop multiplexing board board
N1MR2A 2-channel optical add/ N1FIB Filter isolating board

drop multiplexing board
Microwave Boards
The OptiX OSN 2500 supports microwave boards such as the microwave IF board and
microwave power board.
Table 4-10 lists the microwave boards that the OptiX OSN 2500 supports.
Table 4-10 Microwave boards that the OptiX OSN 2500 supports
Board Description
N1IFSD1 Dual-port IF board
N1RPWR 6-channel ODU power board
Optical Amplifier Boards and Dispersion Compensation Boards

The OptiX OSN 2500 supports multiple optical amplifier boards.
Table 4-11 lists the optical amplifier boards that the OptiX OSN 2500 supports.

Table 4-11 Optical amplifier boards that the OptiX OSN 2500 supports
Board Full Name Board Full Name
N1BPA, Optical booster and N1RPC01 Forward Raman

N2BPA pre-amplifier board driving board
(external)
N1BA2 Optical booster N1RPC02 Backward Raman

amplifier board driving board
(external)
N1COA, Case-shaped optical - -

61COA, amplifier
62COA
Power Boards
The OptiX OSN 2500 supports power boards such as the UPM and power interface board.
Table 4-12 lists the power boards that the OptiX OSN 2500 supports.
Table 4-12 Power boards that the OptiX OSN 2500 supports
Board Description
UPM Uninterruptible power module
Q1PIU and Q1PIUA Power interface board

Hardware Description 5 Cross-Connect Boards and System Control Boards
5 Cross-Connect Boards and System Control

Boards
About This Chapter
This topic describes the SCC unit, cross-connect unit, and line unit integrated boards that operate
at different rates.
5.1 CXL1
This topic describes the version, application, functions, working principle, front panel, and
technical specifications of the CXL1 (1xSTM-1 SCC unit, cross-connect unit, timing unit, and
line unit integrated board). This topic also describes how to configure and commission the CXL1.
5.2 CXL4
5.3 CXL16
technical specifications of the CXL16 (1xSTM-16 SCC unit, cross-connect unit, timing unit,
and line unit integrated board). This topic also describes how to configure and commission the
CXL16.
5.4 CXLLN
technical specifications of the CXLLN (1xSTM-16/STM-4/STM-1 SCC unit, cross-connect
unit, timing unit, and line unit integrated board). This topic also describes how to configure and
commission the CXLLN.
5.5 CXLQ41
technical specifications of the CXLQ41 (4xSTM-4/STM-1 SCC unit, cross-connect unit, timing
unit, and line unit integrated board). This topic also describes how to configure and commission
the CXLQ41.

5 Cross-Connect Boards and System Control Boards Hardware Description
5.1 CXL1
5.1.1 Version Description

The CXL1 is available in several functional versions. The functions provided by the functional
versions are different.
5.1.2 Application
The CXL1 provides service processing, service grooming, clock input/output, and
communication control functions in the OptiX OSN system.
5.1.3 Functions and Features
The CXL1 processes SDH signals, controls communication, grooms services, and inputs/outputs
clock signals.
5.1.4 Working Principle and Signal Flow
The CXL1 consists of the synchronous timing module, O/E converting module, MUX/DEMUX
module, SDH overhead processing module, communication and control module, cross-connect
module, power module, and other modules.
5.1.5 Front Panel
The front panel of the Q2CXL1 has indicators, an optical interface, functional button switch, a
bar code, and a laser safety class label. The front panel of the Q3CXL1 has indicators, an optical
interface, a bar code, functional button switch, a laser safety class label, and CF card slot.
5.1.6 Jumpers and DIP Switches
The CXL1 has a jumper, which is used to set the enable state of the battery, and a DIP switch,
which is used to set the running state of the equipment.
5.1.7 Valid Slots
The CXL1 must be installed in a valid slot in the subrack. Otherwise, the CXL1 cannot work
normally.
5.1.8 Feature Code
The number code that follows the board name in the bar code is the feature code of the board.
The feature code of the CXL1 indicates the type of optical interface.
5.1.9 Configuring and Commissioning the Board
After you select a correct board, you need to configure and commission the board. The following
tasks need to be performed: checking the hardware of the board, configuring the board,
commissioning the board, and checking the operation of the board.
5.1.10 Parameter Settings
The physical slot that houses the CXL1 is different from the logical slot displayed on the
U2000. You can set parameters for the CXL1 by using the U2000.
5.1.11 Maintaining the Board
This topic describes the alarms and faults that may occur when the board operates. This topic
also provides the methods and precautions to be taken for rectifying the faults.
5.1.12 List of Alarms
This topic lists the alarms that may occur when the board operates. The alarms are reported
according to the logical board on the U2000.

5.1.13 List of Performance Events

This topic lists the performance events that may occur when the board operates. The performance
events are reported according to the logical board on the U2000.
5.1.14 Technical Specifications
The technical specifications of the CXL1 include the parameters specified for optical interfaces,
cross-connect capacity, clock access capability, laser safety class, mechanical specifications,
and power consumption.

Table 5-1 describes the versions of the CXL1.
Table 5-1 Versions of the CXL1

Item Description
Functional versions The CXL1 is available in two functional versions, namely, Q2 and
Q3. The Q3CXL1 is discontinued.
Differences The differences between the Q3CXL1 and the Q2CXL1 are as
follows:
l The Q3CXL1 supports the transmission of the DCC information
over the two-channel external clock interface.
l The Q3CXL1 hardware supports the CF card.
l The Q3CXL1 supports the transparent transmission of DCC
bytes when the TPS protection group is configured.
Substitution The Q5CXLLN can substitute for the Q2CXL1 that operates at the
same line rate by using the board version replacement function.
5.1.2 Application
The CXL provides the other boards in the system with the timing information, processes the
SDH signals, grooms the services between line boards or tributary boards, communicates with
the other boards in the system, and performs the configuration and management functions for
the other boards in the system.
Figure 5-1 shows the position of the CXL in the system.

Figure 5-1 Position of the CXL in the system
CXL
Line O/E Line
SDH converting
processing unit unit
Auxiliary
Auxiliary interface
SCC unit unit
Cross-connect and -48 V/-60 V

PIU
timing unit
PDH and other

service signals

clock signals.
SDH Processing Unit

Table 5-2 provides the functions and features of the SDH processing unit of the CXL1.
Table 5-2 Functions and features of the SDH processing unit of the CXL1
Function and CXL1

Feature
Basic functions Transmits and receives 1xSTM-1 optical signals.
Specifications of the l Supports different types of standard optical interfaces, namely,

optical interface the I-1, S-1.1, L-1.1, L-1.2, and Ve-1.2.
l The characteristics of the optical interfaces of the I-1, S-1.1,
L-1.1, and L-1.2 types comply with ITU-T G.957.
l The characteristics of the optical interface of the Ve-1.2 type
comply with the standards defined by Huawei.
Specifications of the l Supports the detection and query of the information about the
optical module optical module.
l Provides the ALS function. The optical interface supports the
setting of the on/off state of a laser.
Service processing Supports the VC-12 services, VC-3 services, and VC-4 services.

Function and CXL1

Feature
Overhead processing l Processes the section overheads of the STM-1 signals.

l Supports the transparent transmission and termination of the path
overheads.
l Supports the setting and query of the J0, J1, J2, and C2 bytes.
l Supports one channel of ECC communication.
Alarms and Reports various alarms and performance events, which facilitates the
performance events management and maintenance of the equipment.
Protection schemes Supports the following protection schemes:

l Two-fiber ring MSP
l Four-fiber ring MSP
l Linear MSP
l SNCP
l SNCMP
l SNCTP
Maintenance l Supports inloops and outloops at optical interfaces.

features l Supports warm resets and cold resets. The warm reset does not
affect services.
l Supports the query of the manufacturing information of the board.
l Supports the in-service loading of the FPGA.
l Supports the upgrade of the board software without affecting
services.
SCC Unit
Table 5-3 provides the functions and features of the SCC unit of the CXL1.
Table 5-3 Functions and features of the SCC unit of the CXL1
Function and CXL1
Feature
Basic functions Configures and monitors services, monitors the service performance,
and collects the information about the performance events and
alarms.

Function and CXL1

Feature
Specifications of the l Provides one 10M/100M compatible Ethernet NM interface,

interfaces which is accessed through the SAP.
l Provides one 10M/100M Ethernet port, which is used for
implementing the inter-board communication.
l Provides one 10M Ethernet port, which is accessed through the
SAP and is used for implementing the communication between
the active and standby SCC boards.
l Provides the RS232 OAM interface, which is accessed through
the SEI and is used for connecting a PC or workstation. Supports
the remote maintenance by using the RS232 DCE modem.
l Provides one orderwire interface and two NNI phone interfaces,
which are accessed through the SEI.
l Provides four broadcast data ports (serial1–4), which are accessed
through the SEI.
l The Q3CXL1 supports the receiving of the check result of the NE
ID and provides the interface for querying the check result.
Maintenance The Q3CXL1 supports the CF card, simulation package loading, and
features diffused loading. The CF card is hot swappable. The capacity of a
standard CF card is 512 MB and can be expanded to 1 GB.
DCC processing The Q2CXL1 can process 40 channels of DCC signals. The Q3CXL1
capability can process 80 channels of DCC signals.
Fan alarm Manages fan alarms.

management
PIU management Supports the in-service check function for the PIU and supports the
failure check function for the lightning protection module of the PIU.
Protection schemes Supports the 1+1 Hot Backup for the Cross-Connect, Timing and
SCC Units.
Cross-Connect Unit
Table 5-4 provides the functions and features of the cross-connect unit of the CXL1.
Table 5-4 Functions and features of the cross-connect unit of the CXL1
Function and CXL1
Feature
Basic functions Realizes 20 Gbit/s higher order cross-connection at the VC-4 level,
and 20 Gbit/s lower order cross-connection at the VC-12 or VC-3
level.

Function and CXL1

Feature
Fast emergency Provides two 4 Mbit/s HDLC fast emergency channels, which are
channel used for the MSP switching, SNCP switching, TPS, or other
functions.
Service processing l Dynamically grooms services.

l Adds or deletes services without interrupting other services.
l Supports the SNCP protection at the VC-4, VC-3 and VC-12
levels.
SCC Units (non-revertive, by default).
Clock Unit
Table 5-5 provides the functions and features of the clock unit of the CXL1.
Table 5-5 Functions and features of the clock unit of the CXL1
Function and CXL1
Feature
Basic functions Provides the standard system synchronization clock.
Other functions l Supports the extraction, insertion, and management of the SSM
and clock ID.
l The Q3CXL1 supports the transmission of the DCC overhead
information at two external clock interfaces.
Input and output l Inputs two-channel 2048 kHz or 2048 kbit/s timing signals and
selects the external timing source.
l Outputs two-channel 2048 Hz or 2048 kbit/s timing signals.

Figure 5-2 shows the functional block diagram of the Q2CXL1.

Figure 5-2 Functional block diagram of the Q2CXL1

Synchronous
timing module T1 Line unit
38 MHz (SETS) T2
OSC Tributary unit
SETG T3 SEI
T4
(clock external output) SEI
T0 Frame header
155 MHz Service unit
PLL T0 (reference clock)
Service unit
155 MHz
155 SDH overhead High-speed
Mbit/s processing module bus
O/E Cross-connect Higher order cross- Another CXL
STM-1 DEMUX data unit High-speed
connect unit
155 RST MSTMSA HPT bus
Line unit
E/O Mbit/s High-speed bus
STM-1 data
MUX
O/E K1/K2 Lower order cross-
converting insertion/ connect unit
module extraction
Cross-connect module
Laser Performance
shutdown report High-speed bus Cross-connect
K1/K2 byte DCC unit B
Laser K1/K2 byte DCC DCC

Line unit
control processing processing
Communication over ETH
channels
Other units
Communication between the active
Communication and control module and standby boards Another CXL
ETH port SAP
OAM interface
SEI
Power monitor
F&f interface
RA Phone interface
Boot NVRA SEI
Flash M S1-S4 interface
ROM M
+3.3 V Power Fuse -48 V/-60 V
module -48 V/-60 V
Power
module


Synchronous
38 MHz (SETS) T2
OSC Tributary unit
T3 SEI
SETG
T4
T0 Frame header
Service unit
155 MHz
155 SDH overhead High-speed
Mbit/s processing module bus
O/E Cross-connect Another CXL
STM-1 DEMUX data unit Higher order cross-
connect unit High-speed
155 RST MST MSA HPT
bus
E/O Mbit/s High-speed bus Line unit
STM-1 data
MUX
O/E K1/K2 Lower order cross-
converting insertion/ connect unit
module extraction
Laser Performance Cross-connect module
shutdown report Cross-connect
K1/K2 byte DCC High-speed bus
unit B

Line unit
channels
Communication between the active Other units
Communication and control module and standby boards
Another CXL
ETH port SAP
OAM interface
SEI
Power monitor
F&f interface
CF Boot Phone interface
Flash RAM NVRAM SEI
card ROM S1-S4 interface

module -48 V/-60 V
Power
module
Synchronous Timing Module

The synchronous timing module provides the system clock (T0) for the service board, the control
unit, and the cross-connect unit in centralized timing distribution mode. This module also selects
one from the reference clock sources as the reference clock for synchronous timing. The
reference clock sources are from the line board (T1), the tributary board (T2), or the external
synchronous clock source (T3). The synchronous system clock source (T0) and 2 Mbit/s external
synchronous source (T4) are generated. The boards adopt the 1+1 hot backup. Hence, both the
active and standby boards trace the same reference source.
The synchronous timing module can extract the clock from three types of timing signals:
l Timing signal (T1) from the STM-N line
l Timing signal (T2) from the PDH line
l Reference signal (T3) from the external synchronous clock source (2 MHz or 2 Mbit/s)
The timing module outputs the following timing signals:
l T0, system clock (38 MHz)
l T4, external timing output signal (2 Mbit/s or 2 MHz)

O/E Converting Module

l Converts the received optical signals into electrical signals, in the receive direction.
l Converts the electrical signals into SDH optical signals, and then sends the SDH optical
signals to fibers for transmission, in the transmit direction.
l The SPI detects the R_LOS alarm and provides the laser shut down function.
MUX/DEMUX Module
l In the receive direction, the DEMUX part demultiplexes the high rate electrical signals into
multiple parallel electrical signals, and recovers the clock signal at the same time.
l In the transmit direction, the MUX part multiplexes the parallel electrical signals received
from the SDH overhead processing module into high rate electrical signals.
SDH Overhead Processing Module

this module includes the RST, MST, MSA, and HPT sub-modules. This module provides the
inloop and outloop functions.
l RST sub-module
– In the receive direction, the RST sub-module terminates the regenerator section
overhead (RSOH). That is, the RST sub-module detects the frame alignment bytes (A1
and A2), descrambles all the bytes except the first line of the RSOH, restores and checks
the regenerator section trace byte (J0), and checks the B1 byte.
– In the transmit direction, the RST sub-module generates the RSOH. That is, the RST
sub-module writes bytes such as A1, A2, and J0, calculates and writes the B1 byte, and
scrambles all the bytes except the first line of the RSOH.
l MST sub-module
– In the receive direction, the MST sub-module terminates the multiplex section overhead
(MSOH). That is, the MST sub-module generates the multiplex section-alarm indication
signal (MS_AIS) alarm and detects the multiplex section-remote defect indication
(MS_RDI) alarm after detecting the K2 byte, and detects the multiplex section-remote
error indication (MS_REI) alarm and generates the B2-excessive errors (B2_EXC)
alarm after checking the B2 byte.
– In the transmit direction, the MST sub-module generates the MSOH. That is, the MST
sub-module writes bytes such as E2, D4-D12, K1, K2, S1, and M1, and calculates and
writes the B2 byte.
l MSA sub-module
– In the receive direction, the MSA sub-module de-interleaves the administration unit
group (AUG), divides an AUG into N AU-4s, detects the administration unit-loss of
pointer (AU_LOP) alarm and the administration unit-alarm indication signal (AU_AIS)
alarm, and performs pointer justifications.
– In the transmit direction, the MSA sub-module assembles the AUG and generates the
AU-4. N AU-4s are multiplexed into an AUG through byte interleaving.
l HPT sub-module
– In the receive direction, the HPT sub-module terminates the path overhead (POH). That
is, the HPT sub-module detects the higher order path-remote error indication (HP_REI)
alarm after checking the B3 byte, generates the higher order path-trace identifier
mismatch (HP_TIM) alarm and the higher order path-signal label mismatch (HP_SLM)
alarm and detects the higher order path-remote defect indication (HP_RDI) alarm after

detecting the J1 and C2 bytes, and generates the higher order path-unequipped
(HP_UNEQ) alarm after detecting the C2 byte.
– In the transmit direction, the HPT sub-module generates the POH. That is, the HPT sub-
module writes bytes such as J1 and C2, and calculates and writes the B3 byte.
Communication and Control Module

l Traces the clock signal from the active and standby cross-connect units.
l Implements the laser controlling function.
l Selects the clock signal and frame header signal from the active and standby cross-connect
units.
l Controls the indicators on the board.
l Provides the CPU control unit, which controls and monitors the other functional modules.
The unit also initializes the other functional modules after it is powered on.
l Provides the ETH port, which functions as the 10M/100M Ethernet port for network
management.
l Provides the OAM interface, which functions as the serial port for network management.
This port can be used as the MODEM port and thus can be configured as a serial port for
connecting to the MODEM port that is in the running state.
l Provides the COM interface, which functions as the commissioning port.
l Provides the Ethernet port, namely, a 10 Mbit/s Ethernet port, for inter-board
communication between the active and standby CXL units.
l The Q3CXL1 supports the receiving of the check result of the NE ID and provides the
interface for querying the check result.
Cross-Connect Module
The cross-connect module consists of two parts:
l SNCP module, which tests relative alarms and reports the alarms to the software to trigger
the protection switching such as the SNCP switching and MSP switching.
l Higher order and lower order cross-connect module, which performs the functions of higher
order and lower order cross-connect units.
Power Module
It converts the –48 V/–60 V power supply into the DC voltages that the modules of the board
require.
CF Card
The CF card functions as the storage carrier of the NE, and can store the databases of the NE,
system parameters, software package of the NE, NE logs, and the data in the black box.
NOTE
The Q2CXL1 does not support the CF card.
Other Functions
l Responses to and processes the K bytes.

l Collects the performance data of the optical module and disables the output of the optical
module.
l Collects and processes DCC signal of each board.
l Inserts the DCC signal back into each line board after processing.
l Monitors the power supply of the board.
l Performs the reset of the units.
l Mutes alarms.
5.1.5 Front Panel

The front panel of the Q2CXL1 has indicators, an optical interface, functional button switch, a
bar code, and a laser safety class label. The front panel of the Q3CXL1 has indicators, an optical
interface, a bar code, functional button switch, a laser safety class label, and CF card slot.
Diagram of the Front Panel

Figure 5-4 shows the appearance of the front panel of the Q2CXL1.
Figure 5-4 Front panel of the Q2CXL1
CXL1
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT
IN
RESET
ALM CUT
CXL1

CXL1
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT
IN
RESET
ALM CUT
CF R/W
CF ON/OFF
CXL1
Indicators
The front panel of the board has the following indicators:
l Board hardware status indicator (STAT) – two colors (red and green)
l Active/Standby state indicator of the cross-connect unit (ACTX) – one color (green)
l Active/Standby state indicator of the SCC unit (ACTC) – one color (green)
l Board software status indicator (PROG) – two colors (red and green)
l Service alarm indicator of the cross-connect unit (SRVX) – three colors (red, green, and
yellow)

l Service alarm indicator of the line unit (SRVL) – three colors (red, green, and yellow)
l Synchronization clock status indicator (SYNC) – two colors (red and green)
l Alarm mute indicator (ALMC) – one color (yellow)
For the meanings of the status of the indicators, see 19 Indicators.
Interfaces
The front panel of the CXL1 has one optical interface and three switches. Table 5-6 describes
the type and usage of the optical interface and switches of the CXL1.
Table 5-6 Optical interface and switches of the CXL1

Interface/ Type of Usage
Switch Interface/
Switch
IN LC Receives optical signals.
OUT LC Transmits optical signals.
RESET Warm reset Press the switch to perform a warm reset for the SCC
switch unit.
ALM CUT Alarm cut Press the switch to mute the alarm. Press the switch for
switch five seconds to mute the alarm permanently. Press the
switch again for five seconds to resume the alarm sound.
CF ON/OFF CF card Changes the state of the CF card.

insertion/ l When the CF card is in the read/write state, or when
removal switch data is read from or written to the CF card, the
indicator changes to red and then the CF card changes
to the read/write prohibited state if the switch is
pressed for five seconds. In this case, you can remove
the CF card.
l When the CF card is in the read/write prohibited state,
the indicator changes to green if the switch is pressed
for five seconds. Then, the CF card is restored to the
read/write state.
NOTE
Only the Q3CXL1 supports the CF card. The Q2CXL1 does not support the CF card.


CAUTION
The jumper and DIP switch are used for test and maintenance. Do not change the setting of the
jumper at random. Otherwise, the board may become faulty.
Figure 5-6 shows the jumper and DIP switch of the Q2CXL1.
Figure 5-6 Positions of the jumper and DIP switch of the Q2CXL1
3 2 1
J3
CF
card
SCC unit
1
2
3 SW1
4

J7
1 2 3 SCC unit
4
3
2 SW2
1
CF
card
Table 5-7 describes jumper J3 of the Q2CXL1 and jumper J7 of the Q3CXL1.
Table 5-7 Jumper J3 of the Q2CXL1 and jumper J7 of the Q3CXL1

Jumper Function Description
J3/J7 To enable the 1–2: If jumper bits (positions) 1 and 2 are capped, the
battery battery is enabled.
2–3: If jumper bits (positions) 2 and 3 are capped, the
database and clock are cleared.
Table 5-8 describes DIP switch SW1 of the Q2CXL1 and DIP switch SW2 of the Q3CXL1.
Table 5-8 DIP switch SW1 of the Q2CXL1 and DIP switch SW2 of the Q3CXL1
DIP Switch Function Description
SW1/SW2 To set the running l When a DIP switch bit is at the on position, it
state of the board indicates the binary value 1.
l SW1 is a four-bit DIP switch. The values of the DIP
switch bits are queued in the descending order of the
switch bit numbers. The DIP switch bit numbered 4
is the most significant bit. For details, refer to Table
5-9.

Table 5-9 DIP switch SW1/SW2
Value Description
0b0000 Indicates the running state when the watchdog is started. It is the default
state.
0b0011 Indicates the commissioning state when the watchdog is stopped.
0b0100 Indicates the running state when the watchdog is stopped.
0b1011 Erases the database.
0b1100 Erases the NE software, including the patches.
0b1101 Erases the database and NE software, including the patches.
0b1110 Erases the database, NE software, and NE.ini file.
0b1111 Erases the extended BIOS and system parameter area in the file system
and flash memory.
5.1.7 Valid Slots

normally.
The CXL1 can be installed in slots 9 and 10 in the subrack.
By default, slot 9 houses the active board and slot 10 houses the standby board.
5.1.8 Feature Code

Table 5-10 provides the relationship between the feature code of the CXL1 and the type of
optical interface.
Table 5-10 Relationship between the feature code of the CXL1 and the type of optical interface
Board Feature Code Type of Optical Interface
SSQ3CXL110 and 10 S-1.1

SSQ2CXL110
SSQ3CXL111 and 11 L-1.1

SSQ2CXL111

SSQ2CXL112
SSQ3CXL113 and 13 Ve-1.2

SSQ2CXL113

SSQ3CXL114 and 14 I-1

SSQ2CXL114

Checking the Hardware of the Board

Step 1 Required: Check the hardware of the board.
l The labels on the front panel of the board must be correct and clear.
l The daughter board of the board must be properly installed.
l All the components on both surfaces of the board must be available and intact.
Step 2 Required: Check whether the active board and standby board are installed in the correct slots.
Step 3 Required: Check whether the board is properly installed. The board must be pushed to the
bottom of the subrack along the guide rails, and the front panel of the board must be properly
locked. For the method for installing a board, see Replacing Boards Onsite.
Step 4 Required: Check the status of the indicators of the board when and after the board is powered
on. For the meanings of the status of the indicators, see 19 Indicators.
Step 5 Required: Check whether the version of the board software matches the version of the NE
software and the version of the U2000 software. Ensure that the version of the board software
is correct.
Step 6 Required: Check the micro switch of the board. When the front panels of the active and standby
cross-connect boards are locked, the active/standby switching can be realized if you unlock the
front panel of the active board.
Step 7 Required: Check the status of the ALM switch.

1. Press the switch to mute the current alarm sound.
2. Press the switch for five seconds to mute the alarm sound permanently. In this case, the
alarm mute indicator (ALMC) turns on (in yellow).
3. Press the switch again for five seconds to resume the alarm sound. In this case, the ALMC
indicator turns off.
----End
Configuring the Board

Step 1 Required: Add the logical board. For details, see Adding Boards.
Step 2 Required: Set parameters for the CXL on the U2000. The following parameters need to be set:
l Clock synchronization status

l Clock source priority

l Phase-locked source output by external clock
l Clock source switching
l Clock subnet configuration
For the method for setting the parameters, see Configuring Clocks.
Step 3 Optional: Configure services. For details, see Configuring the SDH Services.
Step 4 Required: Set parameters for the GSCC on the U2000.
If the parameter settings of the GSCC are available on the U2000, download the parameter
settings to the GSCC. Otherwise, perform the following operations:
l Set the NE ID. For details, see Setting the NE ID.

l Set the NE name, date, and time. For details, see Setting the NE Name, Date, and Time.
l Configure the commissioning service. For details, see Configuring Services for the Per-NE
Commissioning.
Step 5 Required: Set parameters for the line board on the U2000.
Set the SDH interface.
l J0 byte: Generally, use the default value. The default value of the J0 to be sent is HuaWei
SBS and the default value of the J0 to be received is Disabled.
l J1 byte: The setting of the J1 byte on the interconnected equipment must be consistent.
Generally, use the default value. The default value of the J1 to be sent is HuaWei SBS and
the default value of the J1 to be received is Disabled.
l C2 byte: The setting of the C2 byte on the interconnected equipment must be consistent. Set
the C2 byte according to the actual service type. Generally, use the default value, which is
TUG structure.
l Laser status: Set this parameter to Open when you configure and commission the board.
For details, see 23.7 Checking Board Parameters.
Step 6 Optional: Configure a protection subnet. For details, see Configuring the Protection Subnet.
----End
Commissioning the Board

Step 1 Required: Commission the CXL.
l Check the setting of the jumper that controls the debugging status of the board. For the
description of the jumper, see "Jumpers and DIP Switches".
l Check and commission the circuit status on the data ports, including the F&f debugging serial
port and OAM NM port. For details, see 23.4 Configuring the F&f Debugging Serial Port
and OAM NM Port.
l Check the configurations of the data ports.
– For the configuration of the broadcast data port, see Configuring the Broadcast Data
Service.
– For the configuration of the F1 codirectional data port, see Configuring the F1 Data
Service.

l Test the 1+1 protection provided by the cross-connect, timing, and SCC board. For details,
see Testing the 1+1 Protection of the Cross-Connect and Timing (SCC) Board.
l Test the frequency accuracy of the free-run clock. For details, see 23.5 Testing the
Frequency Accuracy of the Free-Run Clock.
l Test the clock holdover accuracy. For details, see 23.6 Testing the Clock Holdover
Accuracy.
Step 2 Optional: Commission the line board.

l Test the specifications of the optical interface. For details, see Testing Specifications of
Optical Interfaces.
l Test the network protection switching. For details, see Testing Network Protection
Switching.
l Test the point-to-point BER. For details, see Testing the Point-to-Point BER.
----End
Checking the Operation of the Board

Step 1 Required: Check the status of the indicators on the front panel of the board to ensure that the
board starts to work normally. When all the indicators are on and green, the board operates
normally. For the meanings of the status of the indicators, see 19.2 Alarm Indicators on the
Boards.
Step 2 Required: Query the alarms and performance events of the board. Modify the connections or
configurations of the board according to the alarms and performance events until the alarms are
cleared. For the method for querying the alarms and performance events of a board, see Viewing
the Current Alarms.
----End

Displayed Slots
The CXL1 occupies one slot in the subrack.
The logical boards for the CXL1 are the Q1SL1, EXCL, and GSCC.
Table 5-11 lists the slots for the logical boards displayed on the U2000.
Table 5-11 Logical slots displayed on the U2000 for the CXL1
Board Logical Board Logical Slot
CXL1 Q1SL1 Slot 9 or slot 10
ECXL Slot 80 or slot 81
GSCC Slot 82 or slot 83

Board Parameters
You can set the following main parameters for the CXL1 by using the U2000:
l J0 byte
l J1 byte
l J2 byte
l C2 byte
l Clock parameters
For the description of each parameter, see 22 Parameter Settings.

Troubleshooting
Table 5-12 lists the faults that occur on the CXL1 frequently and the troubleshooting methods.
Table 5-12 Methods used to troubleshoot the faults that occur on the CXL1 frequently
Fault Symptom Common Fault Troubleshooting Method

Cause
Service unavailable l The type of logical See 23.2 Troubleshooting Service

board is not Unavailability.
consistent with the
type of the board
that is installed on
the NE.
l The service
configuration is
incorrect.
l The running status
of the other boards
on the NE is
incorrect.
Clock tracing failure l The clock source See 23.3 Troubleshooting the
priority table is Clock Tracing Failure.
incorrectly
configured.
ECC failure l The running status l Check whether the running

of the board status of the board is correct. See
becomes abnormal. 19.2 Alarm Indicators on the
l The optical fibers Boards to obtain the meanings
are incorrectly of the status of the indicators.
connected. l Check whether the optical fibers
are correctly connected.


Cause
Power supply alarm The jumper that Check whether the jumper that
controls the input controls the input voltage is
voltage is incorrectly correctly set. For information on
set. how to set the jumper, see Jumpers
and DIP Switches.
Failure of the connection l An incorrect l For information on the

between the NMS computer network cable is connection of the network cable,
and the equipment used to connect the see Checking Connection
NMS computer to Between the U2000 Computer
the equipment. and the Equipment.
l The IP address of l Ensure that the IP address of the
the NMS computer NMS computer and the IP
and the IP address address of the equipment are
of the equipment correctly set. For details, see
are not in the same Setting the IP Address of the PC.
network segment.
Replacing the Board

NOTE
See General Precautions to get familiar with the precautions to be taken for replacing a board before you
replace the board.
For information on how to replace the CXL1, see Replacing a CXL Board.

5.1.12.1 Q2CXL1
ECXL
APS_FAIL APS_INDI BD_STATUS
CHIP_FAIL BUS_ERR CHIP_ABN
EXT_SYNC_LOS CLK_NO_TRACE_MODE COMMUN_FAIL
HSC_UNAVAIL FPGA_ABN HARD_BAD
LPS_UNI_BI_M K1_K2_M K2_M
NO_BD_SOFT LTI MS_APS_INDI_EX
OTH_HARD_FAIL OOL OTH_BD_STATUS

SWITCH_DISABLE POWER_ABNORMAL S1_SYN_CHANGE
SYNC_F_M_SWITCH SYN_BAD SYNC_C_LOS
TEST_STATUS SYNC_LOCKOFF TEMP_OVER
W_OFFLINE W_R_FAIL TIME_NOT_SUPPORT
TIME_NO_TRACE_MOD TIME_LOS TIME_FORCE_SWITCH

E
EXT_TIME_LOC NP1_SW_INDI NP1_SW_FAIL
RPS_INDI
GSCC
APS_MANUAL_STOP BD_AT_LOWPOWER BD_NOT_INSTALLED
BD_STATUS BOOTROM_BAD CFCARD_FAILED
CFCARD_OFFLINE CFCARD_W_R_DISABLED COMMUN_FAIL
DBMS_ERROR DBMS_PROTECT_MODE DCC_CHAN_LACK
FPGA_ABN HARD_BAD HSC_UNAVAIL
MSSW_DIFFERENT NE_POWER_OVER NESF_LOST
NESTATE_INSTALL LAN_LOC PATCH_ERR
PATCH_PKGERR PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST
POWER_ABNORMAL POWER_FAIL REG_MM
RINGMAPM_MM RTC_FAIL SECU_ALM
SQUTABM_MM SWDL_ACTIVATED_TIME- SWDL_AUTOMATCH_IN

OUT H
SWDL_INPROCESS SWDL_CHGMNG_NO- SWDL_COMMIT_FAIL

MATCH
SWDL_NEPKGCHECK TEMP_OVER SWDL_ROLLBACK_FAIL
SYNC_FAIL BIOS_STATUS WRG_BD_TYPE
CFCARD_FULL PATCH_DEACT_TIMEOUT NP1_MANUAL_STOP
PATCH_ACT_TIME- STORM_CUR_QUENUM_O LCS_DAYS_OF_GRACE

OUT VER
LCS_EXPIRED LCS_FILE_NOT_EXIST SYSLOG_COMM_FAIL

Q1SL1
ALM_ALS AU_AIS AU_CMM
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
B3_SD BD_STATUS C2_VCAIS
BIP8_ECC C2_PDI FPGA_ABN
CHIP_FAIL COMMUN_FAIL HP_RDI
FSELECT_STG HP_LOM HP_TIM
HP_REI HP_SLM J0_MM
HP_UNEQ IN_PWR_ABN LOOP_ALM
LASER_MOD_ERR LASER_SHUT LSR_WILL_DIE
LSR_COOL_ALM LSR_NO_FITED MS_REI
MS_AIS MS_RDI OH_LOOP
NO_BD_SOFT R_LOF POWER_ABNORMAL
OUT_PWR_ABN SLAVE_WORKING R_LOS
R_LOC TEM_HA SPARE_PATH_ALM
R_OOF TF TEM_LA
T_LOSEX PS TR_LOC
TEST_STATUS W_R_FAIL MOD_TYPE_MISMATCH
5.1.12.2 Q3CXL1
ECXL


E
RPS_INDI
GSCC

OUT H

MATCH

OUT VER

Q1SL1
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
HP_REI HP_SLM J0_MM
R_OOF TF TEM_LA
T_LOSEX PS TR_LOC

5.1.13.1 Q2CXL1
GSCC
XCSTMPMAX XCSTMPMIN XCSTMPCUR
CPUUSAGEMAX CPUUSAGEMIN CPUUSAGECUR
MEMUSAGEMAX MEMUSAGEMIN MEMUSAGECUR

Q1SL1
AUPJCHIGH AUPJCLOW AUPJCNEW
HPBBE HPCSES HPES
HPFEBBE HPFECSES HPFEES
HPFESES HPFEUAS HPSES
HPUAS MSBBE MSCSES
MSES MSFEBBE MSFECSES
MSFEES MSFESES MSFEUAS
MSSES MSUAS OSPICCVCUR
OSPICCVMAX OSPICCVMIN OSPITMPCUR
OSPITMPMAX OSPITMPMIN RPLCUR
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSSES RSUAS TLBCUR
TLBMAX TLBMIN TPLCUR
TPLMAX TPLMIN
5.1.13.2 Q3CXL1
GSCC
Q1SL1
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES

RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSSES RSUAS TLBCUR
TPLMAX TPLMIN

Parameters Specified for Optical Interfaces

Table 5-13 lists the parameters specified for the optical interfaces of the CXL1.
Table 5-13 Parameters specified for the optical interfaces of the CXL1
Parameter Value
Nominal bit rate 155520 kbit/s
Line code pattern NRZ
Application code I-1 S-1.1 L-1.1 L-1.2 Ve-1.2
Transmission 0 to 2 2 to 15 20 to 40 60 to 80 80 to 100
distance (km)
Operating 1260 to 1261 to 1263 to 1480 to 1480 to

wavelength range 1360 1360 1360 1580 1580
(nm)
Type of fiber Single- Single- Single- Single- Single-

mode LC mode LC mode LC mode LC mode LC
Mean launched -15 to -8 -15 to -8 -5 to 0 -5 to 0 -3 to 0

optical power
(dBm)

Parameter Value
Receiver -23 -28 -34 -34 -34

sensitivity (dBm)
Minimum -8 -8 -10 -10 -10

overload (dBm)
Minimum 8.2 8.2 10 10 10

extinction ratio
(dB)
Cross-Connect Capacity
The cross-connect capacity of the CXL1 is as follows:
l Higher order cross-connect capacity: 20 Gbit/s
l Lower order cross-connect capacity: 20 Gbit/s
l Access capacity: 18.75 Gbit/s
Clock Access Capability

The CXL1 can access two channels of 2048 kbit/s clock signals or two channels of 2048 kHz
clock signals.
Laser Safety Class

The safety class of the laser on the board is Class 1. The maximum launched optical power of
the optical interfaces is less than 10 dBm (10 mW).
Mechanical Specifications
The mechanical specifications of the CXL1 are as follows:
l Dimensions (mm): 25.4 (W) x 220 (D) x 111.8 (H)
l Weight of the Q2CXL1 (kg): 1.1
Power Consumption
The maximum power consumption of the Q2CXL1 at room temperature (25°C) is 40 W.
5.2 CXL4

5.2.2 Application
clock signals.
5.2.5 Front Panel
The front panel of the Q2CXL4 has indicators, an optical interface, functional button switches,
a bar code, and a laser safety class label. The front panel of the Q3CXL4 has indicators, an
optical interface, a bar code, functional button switches, and a laser safety class label.
5.2.7 Valid Slots
normally.
5.2.8 Feature Code



Item Description
follows:
l The Q3CXL4 supports the transmission of the DCC information
over the two-channel external clock interface.
Substitution The Q5CXLLN can substitute for the Q2CXL4 that operates at the
same line rate by using the board version replacement function.
5.2.2 Application

CXL
Line O/E Line
SDH converting
Auxiliary
Auxiliary interface
SCC unit unit

PIU
timing unit
PDH and other

service signals

clock signals.
SDH Processing Unit

Function and CXL4
Feature
Specifications of Supports different types of standard optical interfaces, namely, the

optical interfaces I-4, S-4.1, L-4.1, L-4.2, and Ve-4.2.
Service processing Supports the VC-12 services, VC-3 services, VC-4 services, and
VC-4-4c concatenation services.

Function and CXL4

Feature

overheads.

l Linear MSP
l SNCP
l SNCMP
l SNCTP

affect services.
services.
SCC Unit
Table 5-16 provides the functions and features of the SCC unit of the CXL4
Function and CXL4
Feature
alarms.

Function and CXL4

Feature

through the SEI.
l The Q3CXL4 supports the receiving of the check result of the NE
ID and provides the interface for querying the check result.
Maintenance The Q3CXL4 supports the CF card, simulation package loading, and
features diffused loading. The CF card is hot swappable. The capacity of a
standard CF card is 512 MB and can be expanded to 1 GB.
DCC processing The Q2CXL4 can process 40 channels of DCC signals. The Q3CXL4
capability can process 80 channels of DCC signals.

management
SCC Units.
Cross-Connect Unit
Function and CXL4
Feature
level.

Function and CXL4

Feature
functions.

levels.
l Supports VC-4-4c concatenation services.
Clock Unit
Function and CXL4
Feature
and clock ID.



Synchronous
38 MHz (SETS) T2
OSC Tributary unit
SETG T3 SEI
T4
T0 Frame header
T0 (reference clock)
PLL Service unit
155 MHz High-speed
4x155 SDH overhead bus
Another CXL
Mbit/s processing module Cross-connect Higher order cross-
O/E High-speed
STM-4 DEMUX data unit connect unit bus
4x155 RST MST MSA HPT Line unit
STM-4 data
MUX Lower order cross-
O/E
K1/K2 connect unit
converting
insertion/
module
extraction Cross-connect module
Laser Performan
High-speed bus Cross-connect
shutdown ce report K1/K2 byte DCC unit B

Line unit
channels
Another CXL
ETH port SAP
OAM interface
Power monitor F&f interface SEI
Phone
Phoneinterface
interface
Boot SEI
Flash RAM NVRAM S1-S4 interface
ROM
module -48 V/-60 V
Power
module


Synchronous
38 MHz (SETS) T2
OSC Tributary unit
T3 SEI
SETG
T4
T0 Frame header
Service unit
155 MHz High-speed
Another CXL
O/E High-speed
STM-4 DEMUX data unit connect unit bus
RST MST MSA HPT Line unit
4x155
STM-4 data Lower order cross-
MUX
O/E connect unit
K1/K2
converting
insertion/ Cross-connect module
module
extraction
Cross-connect
Laser High-speed bus
Performance unit B
shutdown report
K1/K2 byte DCC
Line unit
channels
Another CXL
ETH port SAP
OAM interface
SEI
Power monitor
F&f interface
CF Phone
Phoneinterface
interface
Boot Flash RAM NVRAM SEI
card ROM S1-S4 interface
module -48 V/-60 V
Power
module



MUX/DEMUX Module

l RST sub-module
l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module


units.
management.
l The Q3CXL4 supports the receiving of the check result of the NE ID and provides the
interface for querying the check result.
Power Module
require.
CF Card
NOTE
Other Functions

module.
l Mutes alarms.
5.2.5 Front Panel


CXL4
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT
IN
RESET
ALM CUT
CXL4

Figure 5-12 Front panel the Q3CXL4
CXL4
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT
IN
RESET
ALM CUT
CF R/W
CF ON/OFF
CXL4
Indicators
yellow)

Interfaces
The front panel of the CXL4 has one optical interface and three switches. Table 5-19 describes
the types and usage of the optical interfaces and switches of the CXL4.

Switch Interface/
Switch
switch unit.

the CF card.
l When the CF card is in the read/write prohibited
state, the indicator changes to green if the switch is
pressed for five seconds. Then, the CF card is
restored to the read/write state.
NOTE


CAUTION
3 2 1
J3
CF
card
SCC unit
1
2
3 SW1
4

J7
1 2 3 SCC unit
4
3
2 SW2
1
CF
card

5-22.

Value Description
state.
and flash memory.
5.2.7 Valid Slots

normally.
5.2.8 Feature Code

optical interface.

SSQ2CXL410

SSQ2CXL411

SSQ2CXL412
SSQ3CXL413 and 13 Ve-4.2

SSQ2CXL413


SSQ2CXL414


is correct.

----End




Commissioning.
TUG structure.
----End

and OAM NM Port.
Service.
Service.

Accuracy.

Optical Interfaces.
Switching.
----End

Boards.
the Current Alarms.
----End

Displayed Slots

Board Parameters
l J0 byte
l J1 byte
l J2 byte
l C2 byte
l Clock parameters

Troubleshooting

Cause

consistent with the
type of the board
the NE.
l The service
configuration is
incorrect.
of the other boards
on the NE is
incorrect.
incorrectly
configured.



Cause
and DIP Switches.

network segment.
Replacing the Board

NOTE
replace the board.

5.2.12.1 Q2CXL4
ECXL


E
RPS_INDI
GSCC

OUT H

MATCH

OUT VER

Q1SL4
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
HP_REI HP_SLM J0_MM
R_OOF TF TEM_LA
T_LOSEX PS TR_LOC
5.2.12.2 Q3CXL4
ECXL


E
RPS_INDI
GSCC

OUT H

MATCH

OUT VER

Q1SL4
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
HP_REI HP_SLM J0_MM
R_OOF TF TEM_LA
T_LOSEX PS TR_LOC

5.2.13.1 Q2CXL4
GSCC

Q1SL4
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSSES RSUAS TLBCUR
TPLMAX TPLMIN
5.2.13.2 Q3CXL4
GSCC
Q1SL4
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES

RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSSES RSUAS TLBCUR
TPLMAX TPLMIN


Parameter Value
distance (km)

(nm)

Mean launched -15 to -8 -15 to -8 -3 to -2 -3 to -2 -3 to -2

optical power
(dBm)

Parameter Value
Receiver -23 -28 -28 -28 -34

sensitivity (dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)

The clock access capability of the CXL4 is as follows:
l External input clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
l External output clock: two channels of 2048 kbit/s or 2048 kHz external clock signals
Laser Safety Class

Power Consumption
5.3 CXL16
technical specifications of the CXL16 (1xSTM-16 SCC unit, cross-connect unit, timing unit,

and line unit integrated board). This topic also describes how to configure and commission the
CXL16.

5.3.2 Application
The CXL16 processes SDH signals, controls communication, grooms services, and inputs/
outputs clock signals.
5.3.5 Front Panel
5.3.7 Valid Slots
normally.
5.3.8 Feature Code




Item Description
follows:
l The Q3CXL16 supports the transmission of the DCC
information over the two-channel external clock interface.
Substitution The Q5CXLLN can substitute for the Q2CXL16 that operates at
the same line rate by using the board version replacement function.
5.3.2 Application

CXL
Line O/E Line
SDH converting
Auxiliary
Auxiliary interface
SCC unit unit

PIU
timing unit
PDH and other

service signals

The CXL16 processes SDH signals, controls communication, grooms services, and inputs/
SDH Processing Unit

Function and CXL16

Feature
Specifications of the Supports different types of standard optical interfaces, namely, the
optical interface I-16, S-16.1, L-16.1, and L-16.2.
The CXL16 also supports the CWDM colored optical interface.
l The Q2CXL16 supports the single-fiber bidirectional optical
module, and the single-fiber bidirectional optical module does not
support loopbacks at the optical interface by using fiber jumpers.

Function and CXL16

Feature
Service processing Supports the VC-12 services, VC-3 services, VC-4 services, VC-4-4c
concatenation services, VC-4-8c concatenation services, and
VC-4-16 concatenation services.

overheads.
l Supports the setting and query of the J0, J1, J2 and C2 bytes.

l Linear MSP
l SNCP
l SNCMP
l SNCTP

affect services.
services.
SCC Unit
Table 5-29 provides the functions and features of the SCC unit of the CXL16
Function and CXL16
Feature
alarms.

Function and CXL16

Feature

through the SEI.
l The Q3CXL16 supports the receiving of the check result of the
NE ID and provides the interface for querying the check result.
Maintenance The Q3CXL16 supports the CF card, simulation package loading,

features and diffused loading. The CF card is hot swappable. The capacity of
a standard CF card is 512 MB and can be expanded to 1 GB.
DCC processing The Q2CXL16 can process 40 channels of DCC signals. The
capability Q3CXL16 can process 80 channels of DCC signals.

management
SCC Units.
Cross-Connect Unit
Function and CXL16
Feature
level.

Function and CXL16

Feature
functions.

levels.
l Supports the VC4-4c, VC4-8c, and VC4-16c concatenation
services.
Clock Unit
Function and CXL16
Feature
and clock ID.



Synchronous
38 MHz (SETS) T2
OSC Tributary unit
T3 SEI
SETG
T4
T0 Frame header
Service unit
155 MHz High-speed
O/E Another CXL
STM-16 DEMUX data High-speed
unit connect unit
RST MST MSA HPT bus
16x155 Line unit
STM-16 data
O/E MUX Lower order cross-
converting K1/K2 connect unit
module insertion/
Laser Performance
shutdown report K1/K2 byte DCC High-speed bus Cross-connect
unit B

processing processing Line unit
control
channels
Another CXL
ETH port SAP
OAM interface
Power monitor
F&f interface SEI
Phone
Phone interface
interface
Boot SEI
ROM
module -48 V/-60 V
Power
module


Synchronous
38 MHz (SETS) T2
OSC Tributary unit
SETG T3 SEI
T4
T0 Frame header
Service unit
155 MHz
16x155 SDH overhead High-speed
O/E Mbit/s processing module Higher order cross- bus
Cross-connect Another CXL
STM-16 DEMUX data unit connect unit High-speed
16x155 RST MST MSAHPT bus
Line unit
STM-16 data
MUX Lower order cross-
O/E K1/K2
connect unit
converting insertion/
module extraction
Cross-connect module
Laser Performance
shutdown report K1/K2 byte DCC High-speed bus Cross-connect
unit B
processing processing Line unit
control
channels
Another CXL
ETH port SAP
OAM interface
Power monitor F&f interface SEI
Phone
Phone interface
interface
CF Boot SEI
card ROM
module -48 V/-60 V
Power
module





MUX/DEMUX Module

l RST sub-module
l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module


units.
management.
Power Module
require.
CF Card
NOTE
Other Functions
module.


l Mutes alarms.
5.3.5 Front Panel


CXL16
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT
IN
RESET
ALM CUT
CXL16

Figure 5-19 Front panel the Q3CXL16
CXL16
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT
IN
RESET
ALM CUT
CF R/W
CF ON/OFF
CXL16
Indicators
yellow)

Interfaces
The front panel of the CXL16 has one optical interface and three switches. Table 5-32 lists
describes the type and usage of the optical interface and switches of the CXL16.

Switch Interface/
Switch
RESET Warm reset Press the switch to perform a warm reset for the SCC unit.
switch

the CF card.
l When the CF card is in the read/write prohibited state,
the indicator changes to green if the switch is pressed
for five seconds. Then, the CF card is restored to the
read/write state.
NOTE

CAUTION

3 2 1
J3
CF
card
SCC unit
1
2
3 SW1
4
J7
1 2 3 SCC unit
4
3
2 SW2
1
CF
card


5-35.

Value Description
state.
and flash memory.

5.3.7 Valid Slots

normally.
5.3.8 Feature Code

optical interface.

SSQ2CXL1601

SSQ2CXL1602

SSQ2CXL1603

SSQ2CXL1604



is correct.
----End

Commissioning.

TUG structure.
----End

and OAM NM Port.
Service.
Service.
Accuracy.

Optical Interfaces.
Switching.
----End

Boards.

the Current Alarms.
----End

Displayed Slots
Board Parameters
l J0 byte
l J1 byte
l J2 byte
l C2 byte
l Clock parameters

Troubleshooting

Cause

consistent with the
type of the board
the NE.
l The service
configuration is
incorrect.
of the other boards
on the NE is
incorrect.
incorrectly
configured.

and DIP Switches.

network segment.

Replacing the Board

NOTE
replace the board.

5.3.12.1 Q2CXL16
ECXL

E
RPS_INDI
GSCC


OUT H

MATCH

OUT VER
Q1SL16
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
HP_REI HP_SLM J0_MM

R_OOF TF TEM_LA
T_LOSEX PS TR_LOC
5.3.12.2 Q3CXL16
ECXL

E
RPS_INDI
GSCC


OUT H

MATCH

OUT VER
Q1SL16
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
HP_REI HP_SLM J0_MM
R_OOF TF TEM_LA

T_LOSEX PS TR_LOC

5.3.13.1 Q2CXL16
GSCC
Q1SL16
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSSES RSUAS TLBCUR
TPLMAX TPLMIN

5.3.13.2 Q3CXL16
GSCC
Q1SL16
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSSES RSUAS TLBCUR
TPLMAX TPLMIN



Parameter Value
Application code I-16 S-16.1 L-16.1 L-16.2
Transmission 0 to 2 2 to 15 25 to 40 50 to 80
distance (km)
Operating 1266 to 1360 1260 to 1360 1280 to 1335 1500 to 1580

wavelength range
(nm)
Type of fiber Single-mode Single-mode Single-mode Single-mode

LC LC LC LC
Mean launched -10 to -3 -5 to 0 -2 to +3 -2 to +3

optical power
(dBm)
Receiver -18 -18 -27 -28

sensitivity (dBm)
Minimum -3 0 -9 -9
overload (dBm)
Dispersion 12 - - 1200 to 1600

tolerance (ps/nm)
Minimum 8.2 8.2 8.2 8.2

extinction ratio
(dB)
Table 5-40 lists the parameters specified for the colored optical interfaces of the Q2CXL16.
Table 5-40 Parameters specified for the colored optical interfaces of the Q2CXL16
Parameter Value
CWDM
Type of fiber Single-mode LC
Transmission distance 80
(km)
Launched optical power 0 to 5

range (dBm)

Parameter Value
CWDM
Operating wavelength 1491 to 1611, in steps of 20

range (nm)
Receiver sensitivity -30

(dBm)
Minimum overload 0
(dBm)
Maximum allowed 1600

dispersion (ps/nm)
Minimum extinction 8.2

ratio (dB)

The clock access capability of the CXL16 is as follows:
Laser Safety Class

Power Consumption

5.4 CXLLN
technical specifications of the CXLLN (1xSTM-16/STM-4/STM-1 SCC unit, cross-connect
unit, timing unit, and line unit integrated board). This topic also describes how to configure and
commission the CXLLN.

The CXLLN is available in one functional version, namely, Q5. The CXLLN supports the
intelligent fan.
5.4.2 Application
The CXLLN provides service processing, service grooming, clock input/output, and
The CXLLN processes SDH signals, controls communication, grooms services, and inputs/
The CXLLN consists of the synchronous timing module, O/E converting module, MUX/
DEMUX module, SDH overhead processing module, communication and control module, cross-
connect module, and power module.
5.4.5 Front Panel
The front panel of the CXLLN board has indicators, an optical interface, a bar code, functional
button switches, a laser safety class label.
The CXLLN has jumpers, which are used to set the enable state of the battery, and a DIP switch,
5.4.7 Valid Slots
The CXLLN must be installed in a valid slot in the subrack. Otherwise, the CXLLN cannot work
normally.
5.4.8 Feature Code
The feature code of the CXLLN indicates the type of optical interface. The CXLLN supports
optical modules of different configurations. Therefore, no specific feature code is provided.
The physical slot that houses the CXLLN is different from the logical slot displayed on the
U2000. You can set the parameters for the CXLLN by using the U2000.

The technical specifications of the CXLLN include the parameters specified for optical
interfaces, cross-connect capacity, clock access capability, laser safety class, mechanical
specifications, and power consumption.

The CXLLN is available in one functional version, namely, Q5. The CXLLN supports the
intelligent fan.
5.4.2 Application
The CXLLN provides service processing, service grooming, clock input/output, and
CXL
Line O/E Line
SDH converting
Auxiliary
Auxiliary interface
SCC unit unit

PIU
timing unit
PDH and other

service signals


The CXLLN processes SDH signals, controls communication, grooms services, and inputs/
SDH Processing Unit

Table 5-41 provides the functions and features of the SDH processing unit of the CXLLN.
Table 5-41 Functions and features of the SDH processing unit of the CXLLN
Function and CXLLN
Feature
Basic functions Transmits and receives 1xSTM-1/STM-4/STM-16 optical signals.
Specifications of the The STM-1/STM-4/STM-16 optical module can be used.

optical interface l At the STM-1 level, the standard I-1, S-1.1, L-1.1, L-1.2, and
Ve-1.2 optical interfaces are supported. The optical interfaces of
I-1, S-1.1, L-1.1, and L-1.2 types comply with ITU-T G.957, and
the optical interface of the Ve-1.2 type complies with the
standards defined by Huawei.
l At the STM-4 level, the standard I-4, S-4.1, L-4.1, L-4.2, and
the I-4, S-4.1, L-4.1, and L-4.2 types comply with ITU-T G.957,
and the optical interface of the Ve-4.2 type complies with the
l At the STM-16 level, the standard I-16, S-16.1, L-16.1, and
L-16.2 optical interfaces are supported. The optical interfaces of
the I-16, S-16.1, L-16.1, and L-16.2 types comply with ITU-T G.
957.
l Supports the swappable optical modules, thus facilitating the
maintenance and upgrade of the optical modules.
Service processing l The STM-1 module supports the VC-12/VC-3/VC-4 services.

l The STM-4 module supports the VC-12/VC-3/VC-4 and
VC-4-4c/VC-4-8c/VC-4-16c concatenation services.
Overhead processing l Processes the section overheads of the STM-1/STM-4/STM-16

signals.
overheads.
l Supports the setting and query of the J0, J1, J2 and C2 bytes.

Function and CXLLN

Feature

l Linear MSP
l SNCP
l SNCMP
l SNCTP

affect services.
services.
SCC Unit
Table 5-42 provides the functions and features of the SCC unit of the CXLLN.
Table 5-42 Functions and features of the SCC unit of the CXLLN
Function and CXLLN
Feature
alarms.

Function and CXLLN

Feature

l Provides one 10M Ethernet port, which is used for implementing
the communication between the active and standby SCC boards.
l Supports the receiving of the check result of the NE ID and
provides the interface for querying the check result.
through the SEI.
DCC processing Processes 40 channels of DCC signals.

capability

management
SCC Units.
Cross-Connect Unit
Table 5-43 provides the functions and features of the cross-connect unit of the CXLLN.
Table 5-43 Functions and features of the cross-connect unit of the CXLLN
Function and CXLLN

Feature
Basic functions l Realizes 60 Gbit/s higher order cross-connection at the VC-4 level
level when the board is installed on the new backplane.
l Realizes 20 Gbit/s higher order cross-connection at the VC-4 level
level when the board is installed on the old backplane.
functions.

Function and CXLLN

Feature

levels.
l Supports a maximum of 1184 SNCP groups.
l The STM-4 optical module supports the VC-4-4c concatenation
services.
l The STM-16 optical module supports the VC-4-4c, VC-4-8c, and
Clock Unit
Table 5-44 provides the functions and features of the clock unit of the CXLLN.
Table 5-44 Functions and features of the clock unit of the CXLLN
Function and CXLLN
Feature
and clock ID.
l Supports the transmission of the DCC overhead information at
two external clock interfaces.

The CXLLN consists of the synchronous timing module, O/E converting module, MUX/
Figure 5-23 shows the functional block diagram of the Q5CXLLN.

Figure 5-23 Functional block diagram of the Q5CXLLN

Synchronous
38 MHz (SETS) T2
OSC Tributary unit
SETG T3 SEI
T4
T0 Frame header
Service unit
155 MHz High-speed
155 Mbit/s/
STM-1/ SDH overhead bus
4x155 Mbit/s/ Another CXL
STM-4/ 16x155 Mbit/s processing module Cross-connect Higher order cross-
O/E
STM-16 DEMUX data unit connect unit High-speed
bus Another cross-
RST MST MSA HPT
STM-1/ connect unit
E/O High-speed bus
STM-4/
STM-16 MUX Lower order
O/E 155 Mbit/s/
4x155 Mbit/s/ K1/K2 cross-connect unit
converting insertion/
16x155 Mbit/s
module extraction
data Cross-connect module
Laser
Performance
shutdown High-speed bus Cross-connect
report K1/K2 byte DCC
unit B
Line unit
channels
Other units
Another CXL
ETH port SAP
OAM interface
SEI
F&f interface
Power monitor
Phone
Phoneinterface
interface
Boot SEI
ROM
module -48 V/-60 V
Power
module



MUX/DEMUX Module

l RST sub-module
l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module


units.
management.
Power Module
require.
Other Functions
module.
l Mutes alarms.

5.4.5 Front Panel

The front panel of the CXLLN board has indicators, an optical interface, a bar code, functional
button switches, a laser safety class label.

Figure 5-24 shows the appearance of the front panel of the Q5CXLLN.
Figure 5-24 Front panel of the Q5CXLLN
CXLLN
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT1
IN1
RESET
ALM CUT
CXLLN
Indicators

yellow)
Interfaces
The front panel of the CXLLN has one optical interface and two switches. Table 5-45 describes
the types and usage of the interfaces and switches of the CXLLN.
Table 5-45 Optical interface and switches of the CXLLN

Switch Interface/
Switch
switch unit.

The CXLLN has jumpers, which are used to set the enable state of the battery, and a DIP switch,
CAUTION
The jumpers and DIP switch are used for test and maintenance. Do not change the setting of the
Figure 5-25 shows the jumpers and DIP switch of the Q5CXLLN.

Figure 5-25 Positions of the jumpers and DIP switch of the Q5CXLLN
Power
module
SW1
123 4
J24
3 21
CPU
CF 1
card 2 J10
3
Table 5-46 lists the jumpers of the Q5CXLLN.
Table 5-46 Jumpers of the Q5CXLLN

J10 To enable the 1–2: If jumper bits (positions) 1 and 2 are capped, the
J24 To use the l 1–2: If jumper bits (positions) 1 and 2 are capped,
maximum DCC the maximum of 40 DCC channels are used.
channels l 2–3: If jumper bits (positions) 2 and 3 are capped,
the maximum of 80 DCC channels are used.
Table 5-47 lists the DIP switch of the CXLLN.

Table 5-47 DIP switch of the CXLLN
SW1 To set the running l When a DIP switch bit is at the on position, it
l The DIP switch is a four-bit DIP switch. The values
of the DIP switch bits are queued in the descending
order of the switch bit numbers. The DIP switch bit
numbered 4 is the most significant bit. For details,
refer to Table 5-48.
Table 5-48 DIP switch SW1
Value Description
state.
and flash memory.
5.4.7 Valid Slots

The CXLLN must be installed in a valid slot in the subrack. Otherwise, the CXLLN cannot work
normally.
The CXLLN can be installed in slots 9 and 10 in the subrack.
5.4.8 Feature Code

The feature code of the CXLLN indicates the type of optical interface. The CXLLN supports
For the types of optical modules that can be installed on the optical interfaces of the CXLLN,
see Optical Module Labels.



is correct.

----End



Commissioning.
TUG structure.
----End

and OAM NM Port.
Service.
Service.
Accuracy.


Optical Interfaces.
Switching.
----End

Boards.
the Current Alarms.
----End

The physical slot that houses the CXLLN is different from the logical slot displayed on the
U2000. You can set the parameters for the CXLLN by using the U2000.
Displayed Slots
The CXLLN occupies one slot in the subrack.
When the Q5CXLLN is installed on the new backplane, the logical boards for the Q5CXLLN
are the Q2SLN, UCXL, and GSCC. Table 5-49 lists the slots for the logical boards displayed
on the U2000.
Table 5-49 Logical slots displayed on the U2000 for the Q5CXLLN (when the old backplane
is used)
CXLLN Q2SLN Slot 9 or slot 10
UCXL Slot 80 or slot 81
When the Q5CXLLN is installed on the old backplane, the logical boards for the Q5CXLLN
are the Q2SLN, ECXL, and GSCC. Table 5-50 lists the slots for the logical boards displayed
on the U2000.

Table 5-50 Logical slots displayed on the U2000 for the Q5CXLLN (when the old backplane
is used)
CXLLN Q2SLN Slot 9 or slot 10
Board Parameters
You can set the following main parameters for the CXLLN by using the U2000:
l J0 byte
l J1 byte
l J2 byte
l C2 byte
l Clock parameters

Troubleshooting
Table 5-51 lists the faults that occur on the CXLLN frequently and the troubleshooting methods.
Table 5-51 Methods used to troubleshoot the faults that occur on the CXLLN frequently

Cause

consistent with the
type of the board
the NE.
l The service
configuration is
incorrect.
of the other boards
on the NE is
incorrect.


Cause
incorrectly
configured.

and DIP Switches.

network segment.
Replacing the Board

NOTE
replace the board.
For information on how to replace the CXLLN, see Replacing a CXL Board.


5.4.12.1 Q5CXLLN
ECXL (a backplane of the previous version)


E
RPS_INDI
UCXL (a backplane of the later version)

HARD_BAD EXT_TIME_LOC FPGA_ABN
K2_M HSC_UNAVAIL K1_K2_M
MS_APS_INDI_EX LPS_UNI_BI_M LTI
NP1_SW_INDI NO_BD_SOFT NP1_SW_FAIL
PATCH_NOT_CONFIRM OOL PATCH_ERR
PRBS_TEST PATCHFILE_NOTEXIST POWER_ABNORMAL
SYN_BAD RPS_INDI S1_SYN_CHANGE
SYNC_LOCKOFF SYNC_C_LOS SYNC_F_M_SWITCH

TIME_FORCE_SWITCH TEMP_OVER TEST_STATUS
W_OFFLINE TIME_LOS TIME_NO_TRACE_MOD

E
TIME_NOT_SUPPORT
GSCC

OUT H

MATCH

OUT VER
Q2SLN
R_LOS R_LOF R_LOF
R_LOC B1_EXC B1_SD
J0_MM B2_EXC B2_SD

MS_AIS MS_RDI MS_REI TF
IN_PWR_ABN OUT_PWR_ABN LSR_WILL_DIE
LSR_COOL_ALM TEM_HA TEM_LA
LASER_MOD_ERR LASER_SHUT LSR_NO_FITED
TEST_STATUS ALM_ALS TC_DEG
FSELECT_STG OH_LOOP TC_EXC
TC_LTC NO_BD_SOFT TC_INCAIS
TC_RDI TC_ODI TC_OEI
TC_UNEQ TC_REI TC_TIM
TR_LOC ALM_AU3AIS ALM_AU3B3OVER
BD_STATUS T_LOSEX COMMUN_FAIL
ALM_AU3RDI ALM_AU3B3SD POWER_ABNORMAL
ALM_AU3TIM ALM_AU3REI ALM_AU3LOP
AU_LOP ALM_AU3UNEQ ALM_AU3SLM
HP_UNEQ HP_TIM AU_AIS
B3_EXC HP_RDI HP_SLM
C2_PDI B3_SD HP_REI
HP_LOM FPGA_ABN C2_VCAIS
LP_REI_VC12 LOOP_ALM SLAVE_WORKING
LP_UNEQ_VC12 LP_SLM_VC12 LP_RDI_VC12
BIP_SD TU_AIS_VC12 LP_TIM_VC12
LP_RDI_VC3 BIP_EXC TU_LOP_VC12
LP_TIM_VC3 LP_REI_VC3 TEMP_OVER
TU_LOP_VC3 LP_UNEQ_VC3 LP_SLM_VC3
PS B3_EXC_VC3 TU_AIS_VC3
R_OOF MOD_TYPE_MISMATCH B3_SD_VC3
BIP8_ECC AU_CMM LSR_INVALID
SPARE_PATH_ALM W_R_FAIL CHIP_FAIL
TIME_NOT_SUPPORT


5.4.13.1 Q5CXLLN
GSCC
Q2SLN
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS
TCBBE TCFEBBE TCOBBE
TLBCUR TLBMAX TLBMIN
TPLCUR TPLMAX TPLMIN


The technical specifications of the CXLLN include the parameters specified for optical

The CXLLN supports the STM-1, STM-4, and STM-16 optical modules.
Table 5-52 lists the parameters specified for the optical interfaces of the CXLLN when the
STM-1 optical module is used.
Table 5-52 Parameters specified for the optical interfaces of the CXLLN when the STM-1
optical module is used
Parameter Value
distance (km)

(nm)


optical power
(dBm)
Receiver -23 -28 -34 -34 -34

sensitivity (dBm)
Minimum -8 -8 -10 -10 -10

overload (dBm)
Minimum 8.2 8.2 10 10 10

extinction ratio
(dB)

Parameter Value
distance (km)

(nm)


optical power
(dBm)
Receiver -23 -28 -28 -28 -34

sensitivity (dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Parameter Value
Application code I-16 S-16.1 L-16.1 L-16.2
distance (km)
Operating 1266 to 1260 to 1360 1280 to 1335 1500 to 1580

wavelength range 1360
(nm)

Parameter Value
Type of fiber Single- Single-mode LC Single-mode Single-mode LC

mode LC LC
Mean launched -10 to -3 -5 to 0 -2 to +3 -2 to +3

optical power
(dBm)
Receiver -18 -18 -27 -28

sensitivity (dBm)
Minimum -3 0 -9 -9
overload (dBm)

tolerance (ps/nm)
Minimum 8.2 8.2 8.2 8.2

extinction ratio
(dB)
STM-16 colored optical module is used.
colored optical module is used
Parameter Value
CWDM
Transmission distance 80
(km)
Launched optical power 0 to 5

range (dBm)
Operating wavelength 1491 to 1611, in steps of 20

range (nm)

(dBm)
Minimum overload 0
(dBm)
Maximum allowed 1600

dispersion (ps/nm)

Parameter Value
CWDM
Minimum extinction 8.2

ratio (dB)
The cross-connect capacity of the Q5CXLLN is as follows:
l Higher order cross-connect capacity:
– In the case of the new backplane: 60 Gbit/s
– In the case of the old backplane: 20 Gbit/s
l Access capacity:
– In the case of the new backplane: 22.5 Gbit/s
– In the case of the old backplane: 18.75 Gbit/s
NOTE
If a label that contains "Enhanced Subrack" is affixed to the equipment, it indicates that the subrack uses the
new backplane.

The clock access capability of the CXLLN is as follows:
Laser Safety Class

The mechanical specifications of the CXLLN are as follows:
l Weight of the Q5CXLLN (kg): 1.0
Power Consumption
The maximum power consumption of the Q5CXLLN at room temperature (25°C) is 32 W.
5.5 CXLQ41
technical specifications of the CXLQ41 (4xSTM-4/STM-1 SCC unit, cross-connect unit, timing

unit, and line unit integrated board). This topic also describes how to configure and commission
the CXLQ41.

The CXLQ41 is available in one functional versions, namely, Q5..
5.5.2 Application
The CXLQ41 provides service processing, service grooming, clock input/output, and
The CXLQ41 processes SDH signals, controls communication, grooms services, and inputs/
The CXLQ41 consists of the synchronous timing module, O/E converting module, MUX/
5.5.5 Front Panel
The front panel of the CXLQ41 has indicators, interfaces, a bar code, functional button switches,
and a laser safety class label.
The CXLQ41 has jumpers, which are used to set the enable state of the battery, and a DIP switch,
5.5.7 Valid Slots
The CXLQ41 must be installed in a valid slot in the subrack. Otherwise, the CXLQ41 cannot
work normally.
5.5.8 Feature Code
The feature code of the CXLQ41 indicates the type of optical interface. The CXLQ41 supports
The physical slot that houses the CXLQ41 is different from the logical slot displayed on the
U2000. You can set the parameters for the CXLQ41 by using the U2000.

The technical specifications of the CXLQ41 include the parameters specified for optical

The CXLQ41 is available in one functional versions, namely, Q5..
5.5.2 Application
The CXLQ41 provides service processing, service grooming, clock input/output, and
CXL
Line O/E Line
SDH converting
Auxiliary
Auxiliary interface
SCC unit unit

PIU
timing unit
PDH and other

service signals

The CXLQ41 processes SDH signals, controls communication, grooms services, and inputs/
SDH Processing Unit

Table 5-56 provides the functions and features of the SDH processing unit of the CXLQ41.

Table 5-56 Functions and features of the SDH processing unit of the CXLQ41
Function and CXLQ41
Feature
Basic functions Transmits and receives 4xSTM-1/STM-4 optical signals.
Specifications of the The STM-1/STM-4 optical module can be used.

optical interface l At the STM-1 level, the standard I-1, S-1.1, L-1.1, L-1.2, and
I-1, S-1.1, L-1.1, and L-1.2 types comply with ITU-T G.957, and
the optical interface of the Ve-1.2 type complies with the
l At the STM-4 level, the standard I-4, S-4.1, L-4.1, L-4.2, and
the I-4, S-4.1, L-4.1, and L-4.2 types comply with ITU-T G.957,
and the optical interface of the Ve-4.2 type complies with the
l Supports the swappable optical modules, thus facilitating the
maintenance and upgrade of the optical modules.
l Supports the installation of four optical modules with different
port rates.
Service processing l The STM-1 module supports the VC-12/VC-3/VC-4 services.

Overhead processing l Processes the section overheads of the STM-1/STM-4 signals.

overheads.
l Supports one to four channels of ECC communication.

l Linear MSP
l SNCP
l SNCMP
l SNCTP

Function and CXLQ41

Feature

affect services.
services.
SCC Unit
Table 5-57 provides the functions and features of the SCC unit of the CXLQ41.
Table 5-57 Functions and features of the SCC unit of the CXLQ41
Function and CXLQ41
Feature
alarms.

l Provides one 10M Ethernet port, which is used for implementing
the communication between the active and standby SCC boards.
l Supports the receiving of the check result of the NE ID and
provides the interface for querying the check result.
through the SEI.
DCC processing Processes 40 channels of DCC signals.

capability

management

Function and CXLQ41

Feature
SCC Units.
Cross-Connect Unit
Table 5-58 provides the functions and features of the cross-connect unit of the CXLQ41.
Table 5-58 Functions and features of the cross-connect unit of the CXLQ41
Function and CXLQ41

Feature
Basic functions l Realizes 60 Gbit/s higher order cross-connection at the VC-4

level, and 20 Gbit/s lower order cross-connection at the VC-3 or
VC-12 level when the board is installed on the new backplane.
l Realizes 20 Gbit/s higher order cross-connection at the VC-4 level
level when the board is installed on the old backplane.
functions.

levels.
l Supports a maximum of 1184 SNCP groups.
l The STM-4 optical module supports the VC-4-4c concatenation
services.
Clock Unit
Table 5-59 provides the functions and features of the clock unit of the CXLQ41.
Table 5-59 Functions and features of the clock unit of the CXLQ41
Function and CXLQ41

Feature

Function and CXLQ41

Feature
and clock ID.
l Supports the transmission of the DCC overhead information at
two external clock interfaces.
Input and output l Inputs two-channel 2048 kHz or 2048 kbit/s timing signals, and
l Outputs two-channel 2048 kHz or 2048 kbit/s timing signals.

The CXLQ41 consists of the synchronous timing module, O/E converting module, MUX/
Figure 5-27 shows the functional block diagram of the Q5CXLQ41.
Figure 5-27 Functional block diagram of the Q5CXLQ41

Synchronous
38 MHz (SETS) T2
OSC Tributary unit
T3 SEI
SETG
T4
SEI
(clock external output)
T0 Frame header
Service unit
155 MHz
155 Mbit/s/ SDH overhead High-speed
STM-1/ O/E 4x155 Mbit/s processing module Higher order cross- bus
Cross-connect Another CXL
STM-4 DEMUX data
unit connect unit
RST MST MSA HPT
E/O High-speed
STM-1/ High-speed bus
bus Another cross-
STM-4 MUX Lower order cross- connect unit
O/E 155 Mbit/s/ K1/K2 connect unit
converting 4x155 Mbit/s insertion/
module data
Laser Performance Cross-connect
shutdown report High-speed bus unit B
K1/K2 byte DCC
K1/K2 byte DCC DCC
Laser Line unit
processing processing
control
channels
Other units
Another CXL
ETH port SAP
OAM interface
F&f interface SEI
Power monitor
Phone interface
SEI
S1-S4 interface
Boot RA NVRA
Flash
ROM M M
module -48 V/-60 V
Power
module
Figure 5-28 shows the functional block diagram of the Q5CXLQ41/Q6CXLQ41.

Figure 5-28 Functional block diagram of the Q5CXLQ41/Q6CXLQ41

Synchronous
38 MHz (SETS) T2
OSC Tributary unit
T3 AUX/SEI
SETG T4
(clock external output) AUX/SEI
T0 Frame header
Service unit
155 MHz High-speed
155 Mbit/s/ SDH overhead bus
4x155 Mbit/s processing module Higher order cross- Another CXL
STM-1/ O/E Cross-connect High-speed
STM-4 DEMUX data connect unit
unit bus Another cross-
RS MS
MST HPT connect unit
T A
STM-1/ E/O High-speed bus
STM-4 MUX Lower order cross-
O/E 155 Mbit/s/ K1/K2 connect unit
converting 4x155 Mbit/s insertion/
module data
Laser Performance High-speed bus Cross-connect
shutdown report K1/K2 byte DCC unit B

Line unit
channels
Other units
Communication and control module and standby boards Another CXL
ETH port AUX
OAM interface
F&f interface SEI
Power monitor
Phone interface
EOW
S1-S4 interface
Boot Flash RAM NVRAM
ROM
module -48 V/-60 V
Power
module





MUX/DEMUX Module

l RST sub-module
l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module


units.
management.
Power Module
require.
Other Functions
module.
l Mutes alarms.

5.5.5 Front Panel

The front panel of the CXLQ41 has indicators, interfaces, a bar code, functional button switches,
and a laser safety class label.

Figure 5-29 shows the appearance of the front panel of the Q5CXLQ41.
Figure 5-29 Front panel of the Q5CXLQ41
CXLQ41
STAT
ACTX
ACTC
PROG
SRVX
SRVL
SYNC
ALMC
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
RESET
ALM CUT
CXLQ41
Indicators

yellow)
Interfaces
The front panel of the CXLQ41 has four optical interfaces and two switches. Table 5-60
describes the types and usage of the interfaces and switches of the CXLQ41.
Table 5-60 Optical interfaces and switches of the CXLQ41

Switch Interface/
Switch
IN1/OUT1 LC Transmits and receives the first channel of optical signal.
IN2/OUT2 LC Transmits and receives the second channel of optical

signal.
IN3/OUT3 LC Transmits and receives the third channel of optical

signal.
IN4/OUT4 LC Transmits and receives the fourth channel of optical

signal.
switch unit.

The CXLQ41 has jumpers, which are used to set the enable state of the battery, and a DIP switch,
CAUTION
The jumpers and DIP switch are used for test and maintenance. Do not change the setting of the
Figure 5-30 shows the jumpers and DIP switch of the Q5CXLQ41.

Figure 5-30 Positions of the jumpers and DIP switch of the Q5CXLQ41
Power
module
SW1
123 4
J24
3 21
CPU
CF 1
card 2 J10
3
Table 5-61 lists the jumpers of the Q5CXLQ41.
Table 5-61 Jumpers of the Q5CXLQ41

J10 To enable the 1–2: If jumper bits (positions) 1 and 2 are capped, the
J24 To use the l 1–2: If jumper bits (positions) 1 and 2 are capped,
maximum DCC the maximum of 40 DCC channels are used.
channels l 2–3: If jumper bits (positions) 2 and 3 are capped,
the maximum of 160 DCC channels are used.
Table 5-62 lists the DIP switch of the CXLQ41.

Table 5-62 DIP switch of the CXLQ41
SW1 To set the running l When a DIP switch bit is at the on position, it
l The DIP switch is a four-bit DIP switch. The values
of the DIP switch bits are queued in the descending
order of the switch bit numbers. The DIP switch bit
numbered 4 is the most significant bit. For details,
refer to Table 5-63.
Table 5-63 DIP switch SW1
Value Description
state.
and flash memory.
5.5.7 Valid Slots

The CXLQ41 must be installed in a valid slot in the subrack. Otherwise, the CXLQ41 cannot
work normally.
The CXLQ41 can be installed in slots 9 and 10 in the subrack.
5.5.8 Feature Code

The feature code of the CXLQ41 indicates the type of optical interface. The CXLQ41 supports
For the types of optical modules that can be installed on the optical interfaces of the CXLQ41,
see Optical Module Labels



is correct.

----End



Commissioning.
TUG structure.
----End

and OAM NM Port.
Service.
Service.
Accuracy.


Optical Interfaces.
Switching.
----End

Boards.
the Current Alarms.
----End

The physical slot that houses the CXLQ41 is different from the logical slot displayed on the
U2000. You can set the parameters for the CXLQ41 by using the U2000.
Displayed Slots
The CXLQ41 occupies one slot in the subrack.
When the Q5CXLQ41 is installed on the new backplane, the logical boards for the Q5CXLQ41
are the Q2SLQ41, UCXL, and GSCC. Table 5-64 lists the slots for the logical boards displayed
on the U2000.
Table 5-64 Logical slots displayed on the U2000 for the Q5CXLQ41 (when the new backplane
is used)
CXLQ41 Q2SLQ41 Slot 9 or slot 10
UCXL Slot 80 or slot 81
When the Q5CXLQ41 is installed on the old backplane, the logical boards for the Q5CXLQ41
are the Q2SLQ41, ECXL, and GSCC. Table 5-65 lists the slots for the logical boards displayed
on the U2000.

Table 5-65 Logical slots displayed on the U2000 for the Q5CXLQ41 (when the old backplane
is used)
CXLQ41 Q2SLQ41 Slot 9 or slot 10
Board Parameters
You can set the following main parameters for the CXLQ41 by using the U2000:
l J0 byte
l J1 byte
l J2 byte
l C2 byte
l Clock parameters

Troubleshooting
Table 5-66 lists the faults that occur on the CXLQ41 frequently and the troubleshooting methods.
Table 5-66 Methods used to troubleshoot the faults that occur on the CXLQ41 frequently

Cause

consistent with the
type of the board
the NE.
l The service
configuration is
incorrect.
of the other boards
on the NE is
incorrect.


Cause
incorrectly
configured.

and DIP Switches.

network segment.
Replacing the Board

NOTE
replace the board.
For information on how to replace the CXLQ41, see Replacing a CXL Board.


5.5.12.1 Q5CXLQ41
ECXL (a backplane of the previous version)


E
RPS_INDI
UCXL (a backplane of the later version)

HARD_BAD EXT_TIME_LOC FPGA_ABN
K2_M HSC_UNAVAIL K1_K2_M
MS_APS_INDI_EX LPS_UNI_BI_M LTI
NP1_SW_INDI NO_BD_SOFT NP1_SW_FAIL
PATCH_NOT_CONFIRM OOL PATCH_ERR
PRBS_TEST PATCHFILE_NOTEXIST POWER_ABNORMAL
SYN_BAD RPS_INDI S1_SYN_CHANGE
SYNC_LOCKOFF SYNC_C_LOS SYNC_F_M_SWITCH

TIME_FORCE_SWITCH TEMP_OVER TEST_STATUS
W_OFFLINE TIME_LOS TIME_NO_TRACE_MOD

E
TIME_NOT_SUPPORT
GSCC

OUT H

MATCH

OUT VER
Q2SLQ41
R_LOS R_LOF R_LOF
R_LOC B1_EXC B1_SD
J0_MM B2_EXC B2_SD

MS_AIS MS_RDI MS_REI TF
IN_PWR_ABN OUT_PWR_ABN LSR_WILL_DIE
LSR_COOL_ALM TEM_HA TEM_LA
LASER_MOD_ERR LASER_SHUT LSR_NO_FITED
TEST_STATUS ALM_ALS TC_DEG
FSELECT_STG OH_LOOP TC_EXC
TC_LTC NO_BD_SOFT TC_INCAIS
TC_RDI TC_ODI TC_OEI
TC_UNEQ TC_REI TC_TIM
TR_LOC ALM_AU3AIS ALM_AU3B3OVER
BD_STATUS T_LOSEX COMMUN_FAIL
ALM_AU3RDI ALM_AU3B3SD POWER_ABNORMAL
ALM_AU3TIM ALM_AU3REI ALM_AU3LOP
AU_LOP ALM_AU3UNEQ ALM_AU3SLM
HP_UNEQ HP_TIM AU_AIS
B3_EXC HP_RDI HP_SLM
C2_PDI B3_SD HP_REI
HP_LOM FPGA_ABN C2_VCAIS
LP_REI_VC12 LOOP_ALM SLAVE_WORKING
LP_UNEQ_VC12 LP_SLM_VC12 LP_RDI_VC12
BIP_SD TU_AIS_VC12 LP_TIM_VC12
LP_RDI_VC3 BIP_EXC TU_LOP_VC12
LP_TIM_VC3 LP_REI_VC3 TEMP_OVER
TU_LOP_VC3 LP_UNEQ_VC3 LP_SLM_VC3
PS B3_EXC_VC3 TU_AIS_VC3
R_OOF MOD_TYPE_MISMATCH B3_SD_VC3
BIP8_ECC AU_CMM LSR_INVALID
SPARE_PATH_ALM W_R_FAIL CHIP_FAIL
TIME_NOT_SUPPORT


5.5.13.1 Q5CXLQ41
GSCC
Q2SLQ41
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS


The technical specifications of the CXLQ41 include the parameters specified for optical

The CXLQ41 supports the STM-1 and STM-4 optical modules.
Table 5-67 lists the parameters specified for the optical interfaces of the CXLQ41 when the
Table 5-67 Parameters specified for the optical interfaces of the CXLQ41 when the STM-1
Parameter Value
distance (km)

(nm)


optical power
(dBm)
Receiver -23 -28 -34 -34 -34

sensitivity (dBm)
Minimum -8 -8 -10 -10 -10

overload (dBm)
Minimum 8.2 8.2 10 10 10

extinction ratio
(dB)
Table 5-68 lists the parameters specified for the optical interfaces of the CXLQ41 when the

Table 5-68 Parameters specified for the optical interfaces of the CXLQ41 when the STM-4
Parameter Value
distance (km)

(nm)


optical power
(dBm)
Receiver -23 -28 -28 -28 -34

sensitivity (dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
The cross-connect capacity of the Q5CXLQ41 is as follows:
l Higher order cross-connect capacity:
– In the case of the new backplane: 60 Gbit/s
– In the case of the old backplane: 20 Gbit/s
l Access capacity:
– In the case of the new backplane: 22.5 Gbit/s
– In the case of the old backplane: 18.75 Gbit/s
NOTE
If a label that contains "Enhanced Subrack" is affixed to the equipment, it indicates that the subrack uses the
new backplane.

The clock access capability of the CXLQ41 is described as follows:

Laser Safety Class

The mechanical specifications of the CXLQ41 are as follows:
l Weight of the Q5CXLQ41 (kg): 1.0
Power Consumption
The maximum power consumption of the Q5CXLQ41 at room temperature (25°C) is 32 W.

Hardware Description 6 SDH Boards
6 SDH Boards
About This Chapter
This topic describes the SDH boards that operate at the STM-16, STM-4, and STM-1 rates.
6.1 SL1
technical specifications of the SL1 (1xSTM-1 optical interface board). This topic also describes
how to configure and commission the SL1.
6.2 SL1A
This topic describes the version, functions, working principle, front panel, valid slots, and
technical specifications of the SL1A (1xSTM-1 optical interface board).
6.3 SLQ1
technical specifications of the SLQ1 (4xSTM-1 optical interface board).
6.4 SLQ1A
technical specifications of the SLQ1A (4xSTM-1 optical interface board).
6.5 SLO1
technical specifications of the SLO1 (8xSTM-1 optical interface board).
6.6 SLT1
technical specifications of the SLT1 (12xSTM-1 optical interface board).
6.7 SEP1
technical specifications of the SEP1 (2xSTM-1 line processing board). This topic also describes
how to configure and commission the SEP1.
6.8 SL4
technical specifications of the SL4 (1xSTM-4 optical interface board).
6.9 SL4A

6 SDH Boards Hardware Description
6.10 SLD4
technical specifications of the SLD4 (2xSTM-4 optical interface board).
6.11 SLD4A
technical specifications of the SLD4A (2xSTM-4 optical interface board).
6.12 SLQ4
6.13 SLQ4A
6.14 SL16
6.15 SL16A
technical specifications of the SL16A (1xSTM-16 optical interface board). This topic also
describes how to configure and commission the SL16A.
6.16 SF16
technical specifications of the SF16 (1xSTM-16 optical interface board with the out-band FEC
function).
6.17 SLQ41
technical specifications of the SLQ41 (4xSTM-4/STM-1 optical interface board). This topic also
describes how to configure and commission the SLQ41.
6.18 EU04
technical specifications of the EU04 (4xSTM-1 electrical interface board).
6.19 EU08
6.20 OU08
technical specifications of the OU08 (8xSTM-1 optical/electrical interface board).

6.1 SL1
technical specifications of the SL1 (1xSTM-1 optical interface board). This topic also describes
how to configure and commission the SL1.

The SL1 is available in several functional versions. The functions provided by the functional
6.1.2 Application
The SL1 is a line board. The SL1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical signals. The SL1 converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SL1 converts
the electrical signals sent from the cross-connect side into optical signals and transmits the optical
signals.
The SL1 transmits and receives STM-1 optical signals, performs O/E conversion for the STM-1
optical signals, extracts and inserts overhead bytes, and generates alarm signals on the line.
The SL1 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, and power module.
6.1.5 Front Panel
The front panel of the SL1 has indicators, interfaces, and a bar code.
The SL1 does not have any jumpers or DIP switches that are used for board settings.
6.1.7 Valid Slots
The SL1 must be installed in a valid slot in the subrack. Otherwise, the SL1 cannot work
normally.
6.1.8 Feature Code
The feature code of the SL1 indicates the type of optical interface.
You can set parameters for the SL1 by using the U2000.

The technical specifications of the SL1 include the parameters specified for optical interfaces,
laser safety class, mechanical specifications, and power consumption.

The SL1 is available in several functional versions. The functions provided by the functional
The SL1 is available in the following functional versions: R1, N1, and N2. The difference
between the functional versions is with regard to whether they support the tandem connection
monitoring (TCM) function and AU-3 services. The R1SL1 is a 1xSTM-1 optical interface
board, which is installed in a divided slot in a subrack.
The N1SL1 is no longer manufactured.
Table 6-1 describes the versions of the SL1.
Table 6-1 Versions of the SL1

Item Description
Functional versions The SL1 is available in the following functional versions: R1, N1 and
N2.
Differences l The N2SL1 supports the TCM function and AU-3 services, but
the TCM function and AU-3 services cannot be available at the
same time.
l The N1SL1/R1SL1 does not support the TCM function or AU-3
services.
l The R1SL1 is installed in a divided slot.
Substitution Through the board version replacement function, the N1SL1A can
substitute for the N1SL1.
NOTE
When you configure the multiplex section protection (MSP) or sub-network connection protection (SNCP),
you cannot configure the R1SL1 or N1SL1 as the protection board if the working board is the N2SL1 on
which the TCM function is enabled or AU-3 services are configured. Otherwise, the services are interrupted
when a switching operation is performed.
6.1.2 Application
signals.
Figure 6-1 shows the application of the SDH processing boards. The SDH processing boards
can form a ring network or a chain network in the system.

Figure 6-1 Networking and application of the SDH processing boards
NE1
NE2 NE4
NE3
Service flow
Line board
Cross-connect and timing board
NOTE
The SL1 does not support the two-fiber bidirectional ring MSP.

The SL1 transmits and receives STM-1 optical signals, performs O/E conversion for the STM-1
Table 6-2 provides the functions and features of the SL1.
Table 6-2 Functions and features of the SL1

Function and SL1
Feature
Specifications of l Supports different types of standard optical interfaces, namely, the I-1,
the optical S-1.1, L-1.1, L-1.2, and Ve-1.2.
interface l The characteristics of the optical interfaces of the I-1, S-1.1, L-1.1, and
L-1.2 types comply with ITU-T G.957.
l The characteristics of the optical interface of the Ve-1.2 type comply
with the standards defined by Huawei.

Function and SL1

Feature
Specifications of l Supports the detection and query of the information about the optical
the optical module.
module l Supports the usage and detection of the small form-factor pluggable
(SFP) optical module, which facilitates the maintenance of the optical
module.
l Provides the automatic laser shutdown (ALS) function. The optical
interface supports the setting of the on/off state of a laser.
l The N1SL1 supports the single-fiber bidirectional optical module, and
the single-fiber bidirectional optical module does not support
loopbacks at the optical interface by using fiber jumpers.
Service l Supports the VC-12 services, VC-3 services, and VC-4 services.
processing l The N2SL1 supports the AU-3 services.
Overhead l Processes the section overheads of the STM-1 signals.

processing l Supports the transparent transmission and termination of the path
overheads.
Alarms and Provides various alarms and performance events, which facilitates the
performance management and maintenance of the equipment.
events
Protection l Supports the Two-fiber ring MSP.

schemes l Supports the Four-fiber ring MSP.
l Supports the Linear MSP.
l Supports the SNCP.
l Supports the SNCMP.
l Supports the SNCTP.

features l The N1SL1/R1SL1 supports inloops on VC-4 paths.
l Supports warm resets and cold resets. The warm reset does not affect
services.
l Supports the upgrade of the board software without affecting services.
l The N2SL1 supports the TCM function.
l Supports the press-to-collect function in fault data collection.


Figure 6-2 shows the functional block diagram of the SL1.
Figure 6-2 Functional block diagram of the SL1

Backplane
155 MHz 155 MHz Reference clock Cross-connect
PLL unit
155 155
Mbit/s CDR Mbit/s K1 and K2
O/E insertion/extraction K1 and K2 Cross-connect
155 Mbit/s SPI unit
E/O 155 Mbit/s High-speed
bus Cross-connect
....
....
RST MST MSA HPT High-speed unit A
O/E CDR bus Cross-connect

155 Mbit/s SPI unit B
155 Mbit/s DCC
E/O SCC unit
SDH overhead
O/E converting processing module
module
IIC Frame header Cross-connect

LOS Logic and unit
control module Communication SCC unit
Laser shutdown
Power module -48 V/-60 V
module Fuse +3.3 V
+3.3 V backup power
PLL: phase-locked loop SPI: SDH physical interface SDH: synchronous digital hierarchy
RST: regenerator section MST: multiplex section termination MSA: multiplex section adaptation
termination
HPT: higher order path termination CDR: clock data restoration -

CDR Module
This module restores the clock signal.

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module
Logic and Control Module

l Manages and configures the other modules of the board.
l Performs inter-board communication through the internal Ethernet interface.
l Controls the laser.
l Passes the orderwire and embedded control channel (ECC) bytes through an add/drop
multiplexer (ADM) that consists of two paired slots when the CXL is not in position.
units.
Power Module
require.

6.1.5 Front Panel

The front panel of the SL1 has indicators, interfaces, and a bar code.

Figure 6-3 shows the appearance of the front panel of the N1SL1/N2SL1.
Figure 6-3 Front panel of the N1SL1/N2SL1
SL1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL1
Figure 6-4 shows the appearance of the front panel of the R1SL1.

Figure 6-4 Front panel of the R1SL1
SL1
STAT
ACT
PROG
SRV
OUT1 IN1
SL1
Indicators
l Service activation status indicator (ACT) – one color (green)
l Service alarm indicator (SRV) – three colors (red, green, and yellow)
Interfaces
The front panel of the SL1 has one optical interface. Table 6-3 describes the types and usage of
the optical interfaces of the SL1.
Table 6-3 Optical interfaces of the SL1
Interface Type of Interface Usage

The SL1 does not have any jumpers or DIP switches that are used for board settings.

6.1.7 Valid Slots

The SL1 must be installed in a valid slot in the subrack. Otherwise, the SL1 cannot work
normally.
NOTE
The slots valid for a board are determined by the following factors:
l Slot bandwidth
l Cross-connect capacity
l Board version
The slots valid for the SL1 vary with the version of the board and the cross-connect capacity of
the subrack. The slots valid for the board are as follows:
l When the cross-connect capacity is 20 Gbit/s:
– The R1SL1 can be installed in divided slots 5–7 and 19–21.
– The N1SL1 and N2SL1 can be installed in slots 5–8 and 11–13.
– The R1SL1 can be installed in slots 5–7 and 19–21.
– The N1SL1 and N2SL1 can be installed in slots 5–8 and 11–13.
6.1.8 Feature Code

Table 6-4 provides the relationship between the feature code of the SL1 and the type of optical
interface.
Table 6-4 Relationship between the feature code of the SL1 and the type of optical interface
SSR1SL110, SSN1SL110 10 S-1.1

and SSN2SL110
SSR1SL111, SSN1SL111 11 L-1.1

and SSN2SL111
SSR1SL112, SSN1SL112 12 L-1.2

and SSN2SL112
SSR1SL113, SSN1SL113 13 Ve-1.2

and SSN2SL113
SSR1SL114, SSN1SL114 14 I-1

and SSN2SL114



is correct.
----End

Step 2 Required: Set the SDH interface.
TUG structure.
NOTE
For the other parameters to be set, see 22.2 SDH Processing Boards.
Step 3 Required: Configure a protection subnet. For details, see Configuring the Protection Subnet.
Step 4 Required: Configure services. For details, see Configuring the SDH Services.
----End

Step 1 Required: Test the specifications of the optical interface. For details, see Testing Specifications
of Optical Interfaces.

Step 2 Required: Test the network protection switching. For details, see Testing Network Protection
Switching.
Step 3 Required: Test the point-to-point BER. For details, see Testing the Point-to-Point BER.
----End

Boards.
the Current Alarms and Browsing the Current SDH Performance Events.
----End

You can set parameters for the SL1 by using the U2000.
You can set the following parameters for the SL1 by using the U2000:
l J0
l J1
l J2
l C2

Troubleshooting
Table 6-5 lists the faults that occur on the SL1 frequently and the troubleshooting methods.
NOTE
The SL1 uses the SFP optical module. When the SL1 operates and an abnormal alarm occurs on the optical
interface, check whether the optical module is properly installed. To check whether the optical module is
properly installed, you can re-seat the optical module.

Table 6-5 Methods used to troubleshoot the faults that occur on the SL1 frequently
Fault Common Fault Cause Troubleshooting Method

Symptom
Service l The optical fiber or connector See Troubleshooting Service

interruption becomes abnormal. Interruptions.
l An incorrect operation is
performed.
l The types or settings of the
boards are inconsistent.
Bit error l The optical power becomes See Troubleshooting Bit Errors.
abnormal.
l The equipment becomes faulty.
Pointer l The clock configuration is See Troubleshooting Pointer

justification incorrect. Justification.
l The precision of the external
clock source is very low.
Protection l The MSP switching fails. See Troubleshooting Protection

switching l The SNCP switching fails. Switching Faults.
failure
l The clock protection switching
fails.
NEs being l A single NE becomes See Troubleshooting the NEs Being

unreachable to unreachable to the U2000. Unreachable.
the U2000 l All the NEs in a subnet become
unreachable to the U2000.
l An NE becomes unreachable to
the U2000 frequently.
Equipment An SDH overhead interconnection See Troubleshooting Device

interconnection fault occurs. Interconnection Faults.
fault
Replacing the Board

NOTE
replace the board.
For information on how to replace the SL1, see Replacing an SDH Board.


6.1.12.1 N1SL1
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
B3_EXC_VC3 B3_SD B3_SD_VC3
BD_STATUS BIP8_ECC BIP_EXC
BIP_SD CHIP_FAIL C2_PDI
C2_VCAIS FSELECT_STG COMMUN_FAIL
FPGA_ABN HP_REI HP_LOM
HP_RDI HP_UNEQ HP_SLM
HP_TIM LASER_MOD_ERR IN_PWR_ABN
J0_MM LP_RDI_VC12 LASER_SHUT
LOOP_ALM LP_REI_VC3 LP_RDI_VC3
LP_REI_VC12 LP_TIM_VC12 LP_SLM_VC12
LP_SLM_VC3 LP_UNEQ_VC3 LP_TIM_VC3
LP_UNEQ_VC12 LSR_WILL_DIE LSR_COOL_ALM
LSR_NO_FITED MS_REI MS_AIS
MS_RDI OH_LOOP NO_BD_SOFT
R_LOF POWER_ABNORMAL OUT_PWR_ABN
SLAVE_WORKING R_LOS R_LOC
TEM_HA SPARE_PATH_ALM R_OOF
TF TEM_LA T_LOSEX
TU_AIS_VC3 TR_LOC TEST_STATUS
W_R_FAIL TU_LOP_VC12 TU_AIS_VC12
PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST TU_LOP_VC3
TIME_NOT_SUPPORT PS PATCH_ERR
SWDL_PKG_NOBDSOFT
6.1.12.2 N2SL1
ALM_ALS ALM_AU3AIS ALM_AU3B3OVER

ALM_AU3B3SD ALM_AU3LOP ALM_AU3RDI
ALM_AU3REI ALM_AU3SLM ALM_AU3TIM
ALM_AU3UNEQ AU_AIS AU_CMM
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
TC_DEG SPARE_PATH_ALM R_OOF
TC_LTC TC_EXC T_LOSEX
TC_RDI TC_ODI TC_INCAIS
TC_UNEQ TC_REI TC_OEI
TEST_STATUS TEM_HA TC_TIM
TU_AIS_VC12 TF TEM_LA
TU_LOP_VC3 TU_AIS_VC3 TR_LOC
PATCH_ERR W_R_FAIL TU_LOP_VC12
SWDL_PKG_NOBDSOFT PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST
PS

6.1.12.3 R1SL1
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC
B3_SD BD_STATUS BDID_ERROR
BIP8_ECC B3_EXC_VC3 B3_SD_VC3
BIP_EXC BIP_SD C2_PDI
C2_VCAIS CHIP_FAIL COMMUN_FAIL
FPGA_ABN FSELECT_STG HP_LOM
HP_RDI HP_REI HP_SLM
HP_TIM HP_UNEQ IN_PWR_ABN
J0_MM LASER_MOD_ERR LASER_SHUT
LOOP_ALM LP_RDI_VC12 LP_REI_VC12
LP_REI_VC3 LP_SLM_VC12 LP_SLM_VC3
LP_TIM_VC12 LP_TIM_VC3 LP_UNEQ_VC12
LP_UNEQ_VC3 LSR_COOL_ALM LSR_NO_FITED
LSR_WILL_DIE MS_AIS MS_RDI
MS_REI NO_BD_SOFT NO_LSR_PARA_FILE
OH_LOOP OUT_PWR_ABN PATCH_ERR
PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST PLL_FAIL
POWER_ABNORMAL R_LOC R_LOF
R_LOS R_OOF SLAVE_WORKING
SPARE_PATH_ALM T_LOSEX TEM_HA
TEM_LA TEST_STATUS TF
TR_LOC TU_AIS_VC12 TU_AIS_VC3
TU_LOP_VC12 TU_LOP_VC3 W_R_FAIL
LP_RDI_VC3 PS SWDL_PKG_NOBDSOFT
MOD_TYPE_MIS-
MATCH


6.1.13.1 N1SL1
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS
INVOLTMAX INVOLTMIN INVOLTCUR
6.1.13.2 N2SL1
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES

RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS
6.1.13.3 R1SL1
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSSES RSUAS TLBCUR
TPLMAX TPLMIN



Table 6-6 lists the parameters specified for the optical interfaces of the SL1.
Table 6-6 Parameters specified for the optical interfaces of the SL1
Parameter Value
Line code Non-return to zero (NRZ)

pattern
Application I-1 S-1.1 L-1.1 L-1.2 Ve-1.2

code
distance (km)
Type of fiber Single-mode LC Single-mode LC Single-mode Single-mode LC Single-mode LC

LC
Operating 1260 to 1360 1261 to 1360 1263 to 1360 1480 to 1580 1480 to 1580
wavelength
range (nm)
Launched -15 to -8 -15 to -8 -5 to 0 -5 to 0 -3 to 0

optical power
range (dBm)
Receiver -23 -28 -34 -34 -34

sensitivity
(dBm)
Minimum -8 -8 -10 -10 -10

overload (dBm)
Minimum 8.2 8.2 10 10 10

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the N1SL1 and N2SL1 are as follows:
l Weight of the N1SL1 (kg): 0.6
The mechanical specifications of the R1SL1 are as follows:


l Weight (kg): 0.3
Power Consumption
The maximum power consumption of the N1SL1 at room temperature (25°C) is 17 W.
The maximum power consumption of the R1SL1 at room temperature (25°C) is 10 W.
6.2 SL1A

The SL1A is available in one functional version, namely, N1.
6.2.2 Application
The SL1A is a line board. The SL1A can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical signals. The SL1A converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SL1A converts
signals.
The SL1A transmits and receives STM-1 optical signals, performs O/E conversion for the
STM-1 optical signals, extracts and inserts overhead bytes, and generates alarm signals on the
line.
The SL1A consists of the O/E converting module, CDR module, SDH overhead processing
6.2.5 Front Panel
The front panel of the SL1A has indicators, interfaces, a bar code, and a laser safety class label.
6.2.6 Valid Slots
The SL1A can be installed in slots 5–8 and 11–13 in the subrack.
6.2.7 Feature Code
The feature code of the SL1A indicates the type of optical interface.
You can set the parameters for the SL1A by using the U2000.
The technical specifications of the SL1A include the parameters specified for optical interfaces,
laster safety class, mechanical specifications, and power consumption.


6.2.2 Application
signals.
NE1
NE2 NE4
NE3
Service flow
Line board

The SL1A transmits and receives STM-1 optical signals, performs O/E conversion for the
line.
Table 6-7 provides the functions and features of the SL1A.
Table 6-7 Functions and features of the SL1A
Function and SL1A

Feature

Function and SL1A

Feature
the optical module.
module l Supports the usage and detection of the SFP optical module, which
facilitates the maintenance and upgrading of the optical module.
l Provides the ALS function. The optical interface supports the setting
of the on/off state of a laser.
l Supports the single-fiber bidirectional optical module, and the single-
fiber bidirectional optical module does not support loopbacks as the
optical interface by using fiber jumpers.
Service Supports the VC-12 services, VC-3 services, and VC-4 services.
processing

overheads.
events
Protection Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP, SNCP,
schemes SNCTP, and SNCMP.

features l Supports inloops and outloops on VC-4 paths.
services.

Figure 6-6 shows the functional block diagram of the SL1A.

Figure 6-6 Functional block diagram of the SL1A

Backplane
PLL unit
155 155
155 Mbit/s SPI unit
bus Cross-connect
....
....

155 Mbit/s DCC
E/O SCC unit
SDH overhead
module

LOS Logic and unit
control module Communication
SCC unit
Laser shutdown
module Fuse +3.3 V
+3.3 V backup power
termination
HPT: higher order path termination IIC: inter-integrated circuit CDR: clock and data recovery

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.
6.2.5 Front Panel



Figure 6-7 shows the appearance of the front panel of the SL1A.
Figure 6-7 Front panel of the SL1A
SL1A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL1A
Indicators

Interfaces
The front panel of the SL1A has one optical interface. Table 6-8 describes the types and usage
of the optical interfaces of the SL1A.
Table 6-8 Optical interfaces of the SL1A
Interface Type of Usage

Interface
6.2.6 Valid Slots

6.2.7 Feature Code

Table 6-9 provides the relationship between the feature code of the SL1A and the type of optical
interface.
Table 6-9 Relationship between the feature code of the SL1A and the type of optical interface
SSN1SL1A10 10 S-1.1
SSN1SL1A11 11 L-1.1
SSN1SL1A12 12 L-1.2
SSN1SL1A13 13 Ve-1.2
SSN1SL1A14 14 I-1

You can set the following parameters for the SL1A by using the U2000:
l J0
l J1
l J2
l C2


laster safety class, mechanical specifications, and power consumption.

Table 6-10 lists the parameters specified for the optical interfaces of the SL1A.
Table 6-10 Parameters specified for the optical interfaces of the SL1A
Parameter Value
Nominal bit 155520 kbit/s

rate
Line code NRZ

pattern

code
Transmissio 0 to 2 2 to 15 20 to 40 60 to 80 80 to 100
n distance
(km)
Type of fiber Single-mode Single-mode Single-mode Single-mode Single-mode

LC LC LC LC LC
wavelength
range (nm)

optical
power range
(dBm)
Receiver -23 -28 -34 -34 -34

sensitivity
(dBm)
Minimum -8 -8 -10 -10 -10

overload
(dBm)
Minimum 8.2 8.2 10 10 10

extinction
ratio (dB)

Laser Safety Class

The mechanical specifications of the SL1A are as follows:

l Weight (kg): 0.6
Power Consumption
The maximum power consumption of the SL1A at room temperature (25°C) is 17 W.
6.3 SLQ1

The SLQ1 is available in three functional versions, namely, R1, N1, and N2. The difference
between the three versions is with regard to whether they support the TCM function and AU-3
services. The R1SLQ1 is a 4xSTM-1 optical interface board, which is installed in a divided slot
in a subrack. The N1SLQ1 is no longer manufactured.
6.3.2 Application
The SLQ1 is a line board. The SLQ1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical signals. The SLQ1 converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SLQ1 converts
signals.
The SLQ1 transmits and receives 4xSTM-1 optical signals, performs O/E conversion for the
line.
The SLQ1 consists of the O/E converting module, CDR module, SDH overhead processing
6.3.5 Front Panel
The front panel of the N1SLQ1/N2SLQ1 has indicators, interfaces, a bar code, and a laser safety
class label. The front panel of the R1SLQ1 has indicators, interfaces, and a bar code.
6.3.6 Valid Slots
The slots valid for the SLQ1 vary with the version of the board and the cross-connect capacity
of the subrack.
6.3.7 Feature Code
The feature code of the SLQ1 indicates the type of optical interface.


You can set the parameters for the SLQ1 by using the U2000.
The technical specifications of the SLQ1 include the parameters specified for optical interfaces,

The SLQ1 is available in three functional versions, namely, R1, N1, and N2. The difference
services. The R1SLQ1 is a 4xSTM-1 optical interface board, which is installed in a divided slot
in a subrack. The N1SLQ1 is no longer manufactured.
Table 6-11 Versions of the SLQ1

Item Description
Functional The SLQ1 is available in three functional versions, namely, R1, N1, and
versions N2.
Differences l The N2SLQ1 supports the TCM function and AU-3 services, but the
TCM function and AU-3 services cannot be available at the same
time.
l The R1SLQ1 and N1SLQ1 do not support the TCM function or AU-3
services.
l The R1SLQ1 is installed in a divided slot.
Substitution Through the board version replacement function, the N3SLQ41 can
substitute for the N1SLQ1 and N2SLQ1 at the same line rate.
6.3.2 Application
signals.

NE1
NE2 NE4
NE3
Service flow
Line board

The SLQ1 transmits and receives 4xSTM-1 optical signals, performs O/E conversion for the
line.
Table 6-12 provides the functions and features of the SLQ1.
Table 6-12 Functions and features of the SLQ1
Function and SLQ1

Feature
the optical S-1.1, L-1.1, L-1.2, Ie-1, and Ve-1.2.
l The characteristics of the optical interfaces of the Ie-1 and Ve-1.2 types
l The N1SLQ1 supports the single-fiber bidirectional optical module,
and the single-fiber bidirectional optical module does not support
the optical module.
module l Provides the ALS function. The optical interface supports the setting
l Supports the usage and detection of the SFP optical module, which
facilitates the maintenance of the optical module.

Function and SLQ1

Feature
Service l Supports the VC-12 services, VC-3 services, and VC-4 services.
processing l The N2SLQ1 supports the AU-3 services.

overheads.
events

features l The N1SLQ1 and R1SLQ1 support inloops on VC-4 paths.
services.
l The N2SLQ1 supports the TCM function.

Figure 6-9 shows the functional block diagram of the SLQ1.

Figure 6-9 Functional block diagram of the SLQ1

Backplane
PLL unit
155 155
155 Mbit/s SPI unit
bus Cross-connect
....
....

155 Mbit/s DCC
E/O SCC unit
SDH overhead
module

LOS Logic and unit
SCC unit
Laser shutdown
module Fuse +3.3 V
+3.3 V backup power
termination
The functional modules of the STM-1 units are described as follows:

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.

6.3.5 Front Panel

The front panel of the N1SLQ1/N2SLQ1 has indicators, interfaces, a bar code, and a laser safety
class label. The front panel of the R1SLQ1 has indicators, interfaces, and a bar code.

Figure 6-10 shows the appearance of the front panel of the N1SLQ1/N2SLQ1.
Figure 6-10 Front panel of the N1SLQ1/N2SLQ1
SLQ1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ1
Figure 6-11 shows the appearance of the front panel of the R1SLQ1.

Figure 6-11 Front panel of the R1SLQ1
SLQ1
STAT
ACT
PROG
SRV
OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4
SLQ1
Indicators
Interfaces
The front panel of the SLQ1 has four optical interfaces. Table 6-13 describes the types and usage
of the optical interfaces of the SLQ1.
Table 6-13 Optical interfaces of the SLQ1

Interface
IN1-IN4 LC Receives optical signals.
OUT1-OUT4 LC Transmits optical signals.
6.3.6 Valid Slots

The slots valid for the SLQ1 vary with the version of the board and the cross-connect capacity
of the subrack.

NOTE
l Slot bandwidth
l Board version
The slots valid for the SLQ1 are as follows:
When the cross-connect capacity is 20 Gbit/s:
l The R1SLQ1 can be installed in slots 5–7 and 19–21 in the subrack.
l The N1SLQ1 and N2SLQ1 can be installed in slots 5–8 and 11–13 in the subrack.
When the cross-connect capacity is 60 Gbit/s:
l The R1SLQ1 can be installed in slots 5–7 and 19–21 in the subrack.
l The N1SLQ1 and N2SLQ1 can be installed in slots 5–8 and 11–13 in the subrack.
6.3.7 Feature Code

Table 6-14 provides the relationship between the feature code of the SLQ1 and the type of optical
interface.
Table 6-14 Relationship between the feature code of the SLQ1 and the type of optical interface
SSR1SLQ110, 10 S-1.1
SSN1SLQ110 and
SSN2SLQ110
SSR1SLQ111, 11 L-1.1
SSN1SLQ111 and
SSN2SLQ111
SSR1SLQ112, 12 L-1.2
SSN1SLQ112 and
SSN2SLQ112
SSR1SLQ113, 13 Ve-1.2
SSN1SLQ113 and
SSN2SLQ113
SSR1SLQ114, 14 I-1
SSN1SLQ114 and
SSN2SLQ114
SSN1SLQ115 15 Ie-1


You can set the following parameters for the SLQ1 by using the U2000:
l J0
l J1
l J2
l C2


Table 6-15 lists the parameters specified for the optical interfaces of the SLQ1.
Table 6-15 Parameters specified for the optical interfaces of the SLQ1
Parameter Value
Line code NRZ

pattern
Application I-1 S-1.1 L-1.1 L-1.2 Ve-1.2 Ie-1

code
Transmission 0 to 2 2 to 15 20 to 40 60 to 80 80 to 100 0 to 2
distance (km)
Type of fiber Single- Single- Single- Single- Single-mode Multi-mode LC

mode LC mode LC mode LC mode LC LC
Operating 1260 to 1261 to 1360 1263 to 1480 to 1480 to 1580 1270 to 1380
wavelength 1360 1360 1580
range (nm)
Launched -15 to -8 -15 to -8 -5 to 0 -5 to 0 -3 to 0 -19 to -14

optical power
range (dBm)
Receiver -23 -28 -34 -34 -34 -30

sensitivity
(dBm)
Minimum -8 -8 -10 -10 -10 -14

overload (dBm)

Parameter Value
Minimum 8.2 8.2 10 10 10 10

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the N1SLQ1 and N2SLQ1 are as follows:
l Weight (kg): 1.0
The mechanical specifications of the R1SLQ1 are as follows:
l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the N1SLQ1 at room temperature (25°C) is 15 W.
The maximum power consumption of the R1SLQ1 at room temperature (25°C) is 12 W.
6.4 SLQ1A

The SLQ1A is available in one functional version, namely, N1.
6.4.2 Application
The SLQ1A is a line board. The SLQ1A can be used on the OptiX OSN equipment series to
transmit and receive STM-1 optical signals. The SLQ1A converts the received optical signals
into electrical signals and sends the electrical signals to the cross-connect side. In addition, the
SLQ1A converts the electrical signals sent from the cross-connect side into optical signals and
transmits the optical signals.
The SLQ1A transmits and receives STM-1 optical signals, performs O/E conversion for the
line.

The SLQ1A consists of the O/E converting module, CDR module, SDH overhead processing
6.4.5 Front Panel
The front panel of the SLQ1A has indicators, interfaces, a bar code, and a laser safety class label.
6.4.6 Valid Slots
The SLQ1A can be installed in slots 5–8 and 11–13 in the subrack.
6.4.7 Feature Code
The feature code of the SLQ1A indicates the type of optical interface.
You can set the parameters for the SLQ1A by using the U2000.
The technical specifications of the SLQ1A include the parameters specified for optical
interfaces, laser safety class, mechanical specifications, and power consumption.

Through the board version replacement function, the N1SLQ1 can substitute for the N1SLQ1A.
6.4.2 Application
NE1
NE2 NE4
NE3
Service flow
Line board


line.
Table 6-16 provides the functions and features of the SLQ1A.
Table 6-16 Functions and features of the SLQ1A

Function and SLQ1A
Feature
the optical S-1.1, L-1.1, L-1.2, Ie-1, and Ve-1.2.
l The characteristics of the optical interfaces of the Ie-1 and Ve-1.2 types
the optical module.
processing

overheads.
events

Function and SLQ1A

Feature

services.

Figure 6-13 shows the functional block diagram of the SLQ1A.
Figure 6-13 Functional block diagram of the SLQ1A
155 MHz 155 MHz Reference clock

Cross-connect unit
PLL
155 155
155 Mbit/s Mbit/s Mbit/s K1 and K2
O/E S CDR
K1 and K2 insertion/extraction Cross-connect unit
P 155
155 Mbit/s I Mbit/s
E/O
High-speed
bus
Cross-connect unit A
....
....
MS MS
RST HPT High-speed
155 155 T A
155 Mbit/s Mbit/s Mbit/s bus Cross-connect unit B
O/E S CDR
P 155
155 Mbit/s I Mbit/s DCC
E/O SCC unit
SDH overhead processing module
IIC Frame header

Logic and Cross-connect unit
LOS
control Communication
Laser shutdown SCC unit
module
+3.3 V DC/DC Fuse -48 V/ -60 V

converter -48 V/ -60 V
DC/DC
converter Fuse +3.3 V
+3.3 V backup power
termination


CDR Module

l RST sub-module
l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module


units.
Power Module
require.
6.4.5 Front Panel


Figure 6-14 shows the appearance of the front panel of the SLQ1A.

Figure 6-14 Front panel of the SLQ1A
SLQ1A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ1A
Indicators
Interfaces
The front panel of the SLQ1A has four optical interfaces. Table 6-17 describes the types and
usage of the optical interfaces of the SLQ1A.

Table 6-17 Optical interfaces of the SLQ1A

Interface
IN1–IN4 LC Receives optical signals.
OUT1–OUT4 LC Transmits optical signals.
6.4.6 Valid Slots

6.4.7 Feature Code

Table 6-18 provides the relationship between the feature code of the SLQ1A and the type of
optical interface.
Table 6-18 Relationship between the feature code of the SLQ1A and the type of optical interface
SSN1SLQ1A10 10 S-1.1
SSN1SLQ1A11 11 L-1.1
SSN1SLQ1A13 13 Ve-1.2
SSN1SLQ1A14 14 I-1
SSN1SLQ1A15 15 Ie-1

You can set the following parameters for the SLQ1A by using the U2000:
l J0
l J1
l J2
l C2



Table 6-19 lists the parameters specified for the optical interfaces of the SLQ1A.
Table 6-19 Parameters specified for the optical interfaces of the SLQ1A
Parameter Value

rate
Line code NRZ

pattern
Application I-1 S-1.1 L-1.1 L-1.2 Ve-1.2 Ie-1

code
Transmissio 0 to 2 2 to 15 20 to 40 60 to 80 80 to 100 0 to 2
n distance
(km)
Type of fiber Single- Single- Single- Single- Single- Multi-mode

mode LC mode LC mode LC mode LC mode LC LC
Operating 1260 to 1261 to 1263 to 1480 to 1480 to 1270 to

wavelength 1360 1360 1360 1580 1580 1380
range (nm)
Launched -15 to -8 -15 to -8 -5 to 0 -5 to 0 -3 to 0 -19 to -14

optical
power range
(dBm)
Receiver -23 -28 -34 -34 -34 -30

sensitivity
(dBm)
Minimum -8 -8 -10 -10 -10 -14

overload
(dBm)
Minimum 8.2 8.2 10 10 10 10

extinction
ratio (dB)
Laser Safety Class


The mechanical specifications of the SLQ1A are as follows:

l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the SLQ1A at room temperature (25°C) is 15 W.
6.5 SLO1
technical specifications of the SLO1 (8xSTM-1 optical interface board).

The SLO1 is available in two functional versions, namely, N2 and N3. The difference between
the two versions is with regard to whether they support the TCM function or AU-3 services. The
N3SLO1 is discontinued.
6.5.2 Application
The SLO1 is a line board. The SLO1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical signals. The SLO1 converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SLO1 converts
signals.
The SLO1 transmits and receives 8xSTM-1 optical signals, performs O/E conversion for the
line.
The SLO1 consists of the O/E converting module, CDR module, SDH overhead processing
6.5.5 Front Panel
The front panel of the SLO1 has indicators, interfaces, a bar code, and a laser safety class label.
6.5.6 Valid Slots
The slots valid for the SLO1 vary with the cross-connect capacity of the subrack.
6.5.7 Feature Code
The feature code of the SLO1 indicates the type of optical interface.
You can set the parameters for the SLO1 by using the U2000.
The technical specifications of the SLO1 include the parameters specified for optical interfaces,


The SLO1 is available in two functional versions, namely, N2 and N3. The difference between
the two versions is with regard to whether they support the TCM function or AU-3 services. The
N3SLO1 is discontinued.
Table 6-20 describes the versions of the SLO1.
Table 6-20 Versions of the SLO1

Item Description
Functional versions The SLO1 is available in two functional versions, namely, N2 and N3.
Differences l The N2SLO1 supports the TCM function and AU-3 services, but
same time.
l The N3SLO1 does not support the TCM function and AU-3
services.
Substitution When the N2SLO1 is not configured with the TCM function and AU-3
services, the N3SLO1 can substitute for the N2SLO1.
NOTE
When you configure the MSP or SNCP, you cannot configure the N3SLO1 as the protection board if the
working board is the N2SLO1 on which the TCM function or AU-3 services are configured. Otherwise,
the services are interrupted when a switching operation is performed.
6.5.2 Application
The SLO1 is a line board. The SLO1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical signals. The SLO1 converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SLO1 converts
signals.

NE1
NE2 NE4
NE3
Service flow
Line board

The SLO1 transmits and receives 8xSTM-1 optical signals, performs O/E conversion for the
line.
Table 6-21 provides the functions and features of the SLO1.
Table 6-21 Functions and features of the SLO1 board
Function and SLO1

Feature
Basic functions Receives and transmits 8xSTM-1 optical signals.
Specifications of l Supports different types of standard optical interfaces, namely, the

the optical interface I-1, S-1.1, L-1.1, L-1.2, and Ve-1.2.
l The characteristics of the optical interfaces of the I-1, S-1.1, L-1.1,
and L-1.2 types comply with ITU-T G.957.
l The characteristics of the optical interface of the Ve-1.2 type
Specifications of l Supports the detection and query of the information about the
the optical module optical module.
Service processing l Supports the VC-12 services, VC-3 services, and VC-4 services.
l The N2SLO1 supports the AU-3 services.

Function and SLO1

Feature

processing l Processes the path overheads.
l Supports one to eight channels of ECC communication.
Protection schemes Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
SNCP, SNCTP, and SNCMP.

features l The N3SLO1 supports inloops and outloops on VC-4 paths.
l Supports warm resets and cold resets. The warm reset does not
affect services.
services.
l The N2SLO1 supports the TCM function.
l The N3SLO1 supports the PRBS function.

The SLO1 consists of the O/E converting module, CDR module, SDH overhead processing
Figure 6-16 shows the functional block diagram of the SLO1.

Figure 6-16 Functional block diagram of the SLO1

Backplane
PLL unit
155 155
155 Mbit/s SPI unit
bus Cross-connect
....
....

155 Mbit/s DCC
E/O SCC unit
SDH overhead
module

LOS Logic and unit
SCC unit
Laser shutdown
module Fuse +3.3 V
+3.3 V backup power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.
6.5.5 Front Panel

The front panel of the SLO1 has indicators, interfaces, a bar code, and a laser safety class label.


Figure 6-17 shows the appearance of the front panel of the SLO1.
Figure 6-17 Front panel of the SLO1
SLO1
STAT
ACT
PROG
SRV
OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 OUT5 IN5 OUT6 IN6 OUT7 IN7 OUT8 IN8
CLASS 1
LASER
PRODUCT
SLO1
Indicators

Interfaces
The front panel of the SLO1 has eight optical interfaces. Table 6-22 describes the types and
usage of the optical interfaces of the SLO1.
Table 6-22 Optical interfaces of the SLO1

Interface
CAUTION
The optical interfaces of the SLO1 are level optical interfaces. Hence, use an optical attenuator
only on the ODF side.
6.5.6 Valid Slots

The slots valid for the SLO1 vary with the cross-connect capacity of the subrack.
NOTE
l Slot bandwidth
l Board version
l When the cross-connect capacity is 20 Gbit/s, the SLO1 can be installed in slots 5–8 and
11–13. When the SLO1 is installed in slots 5 and 6, one to four optical interfaces can be
configured. When the SLO1 is installed in slots 7, 8, and 11–13, one to eight optical
interfaces can be configured.
l When the cross-connect capacity is 60 Gbit/s, the SLO1 can be installed in slots 5–8 and
11–13. In this case, one to eight optical interfaces can be configured.
6.5.7 Feature Code

The feature code of the SLO1 indicates the type of optical interface.
Table 6-23 provides the relationship between the feature code of the SLO1 and the type of optical
interface.
Table 6-23 Relationship between the feature code of the SLO1 and the type of optical interface
Board Feature Code Type of Optical interface
SSN2SLO110 and 10 S-1.1

SSN3SLO110

SSN2SLO111 and 11 L-1.1

SSN3SLO111
SSN2SLO112 and 12 L-1.2

SSN3SLO112
SSN2SLO113 and 13 Ve-1.2

SSN3SLO113
SSN2SLO114 and 14 I-1

SSN3SLO114

You can set the parameters for the SLO1 by using the U2000.
You can set the following parameters for the SLO1 by using the U2000:
l J0
l J1
l J2
l C2

The technical specifications of the SLO1 include the parameters specified for optical interfaces,

Table 6-24 lists the parameters specified for the optical interfaces of the SLO1.
Table 6-24 Parameters specified for the optical interfaces of the SLO1
Parameter Value
Application code I-1.1 S-1.1 L-1.1 L-1.2 Ve-1.2
distance (km)


Parameter Value

(nm)
Launched optical -15 to -8 -15 to -8 -5 to 0 -5 to 0 -3 to 0

power range (dBm)
Receiver sensitivity -23 -28 -34 -34 -34

(dBm)
Minimum overload -8 -8 -10 -10 -10

(dBm)
Minimum extinction 8.2 8.2 10 10 10

ratio (dB)
Laser Safety Class

The mechanical specifications of the N2SLO1 are as follows:
l Weight (kg): 1.1
The mechanical specifications of the N3SLO1 are as follows:
l Weight (kg): 1.2
Power Consumption
The maximum power consumption of the N2SLO1 at room temperature (25°C) is 26 W.
The maximum power consumption of the N3SLO1 at room temperature (25°C) is 20 W.
6.6 SLT1
technical specifications of the SLT1 (12xSTM-1 optical interface board).

The SLT1 is available in one functional version, namely, N1.
6.6.2 Application
The SLT1 is a line board. The SLT1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical signals. The SLT1 converts the received optical signals into electrical

signals and sends the electrical signals to the cross-connect side. In addition, the SLT1 converts
signals.
The SLT1 transmits and receives STM-1 optical signals, performs O/E conversion for the STM-1
The SLT1 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, and power module. The external services are accessed by the
external interface boards EU08 and OU08. The EU08 is an electrical interface board and the
OU08 is an optical interface board.
6.6.5 Front Panel
The front panel of the SLT1 has indicators, interfaces, a bar code, and a laser safety class label.
6.6.6 Valid Slots
The slots valid for the SLT1 vary with the cross-connect capacity of the subrack.
6.6.7 Feature Code
The feature code of the SLT1 indicates the type of optical interface.
You can set the parameters for the SLT1 by using the U2000.
The technical specifications of the SLT1 include the parameters specified for optical interfaces,
dimensions, weight, and power consumption.

The SLT1 is available in one functional version, namely, N1.
6.6.2 Application
The SLT1 is a line board. The SLT1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical signals. The SLT1 converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SLT1 converts
signals.

NE1
NE2 NE4
NE3
Service flow
Line board

The SLT1 transmits and receives STM-1 optical signals, performs O/E conversion for the STM-1
Table 6-25 provides the functions and features of the SLT1.
Table 6-25 Functions and features of the SLT1

Function and SLT1
Feature
Specifications of Supports S-1.1, L-1.1 and L-1.2 standard optical interfaces whose
the optical characteristics comply with ITU-T G.957.
interface
the optical module.
facilitates the maintenance of the optical module.
fiber bidirectional optical module does not support loopbacks at the
processing

Function and SLT1

Feature

overheads.
l Supports one to twelve channels of ECC communication. Port 1 to port
8 support the ECC communication by using bytes D1–D12. Port 9 to
port 12 support the ECC communication by using bytes D1–D3.
events

services.
l Supports the PRBS function.

The SLT1 consists of the O/E converting module, CDR module, SDH overhead processing
module, logic and control module, and power module. The external services are accessed by the
external interface boards EU08 and OU08. The EU08 is an electrical interface board and the
OU08 is an optical interface board.
Figure 6-19 shows the functional block diagram of the SLT1.

Figure 6-19 Functional block diagram of the SLT1

Backplane
PLL unit
155 155
155 Mbit/s SPI unit
bus Cross-connect
....
....

155 Mbit/s DCC
E/O SCC unit
SDH overhead
module

LOS Logic and unit
SCC unit
Laser shutdown
module Fuse +3.3 V
+3.3 V backup power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.
6.6.5 Front Panel

The front panel of the SLT1 has indicators, interfaces, a bar code, and a laser safety class label.


Figure 6-20 shows the appearance of the front panel of the SLT1.
Figure 6-20 Front panel of the SLT1
SLT1
STAT
ACT
PROG
SRV
OUT1 IN1 OUT2 IN2 OUT3 IN3 OUT4 IN4 OUT5 IN5 OUT6 IN6 OUT7 IN7 OUT8 IN8 OUT9 IN9 OUT10IN10OUT11IN11OUT12IN12
CLASS 1
LASER
PRODUCT
SLT1
Indicators

Interfaces
The front panel of the SLT1 has 12 optical interfaces. Table 6-26 describes the types and usage
of the optical interfaces of the SLT1.
Table 6-26 Optical interfaces of the SLT1

Interface
CAUTION
The optical interfaces of the SLT1 are level optical interfaces. Hence, use an optical attenuator
only on the ODF side.
6.6.6 Valid Slots

The slots valid for the SLT1 vary with the cross-connect capacity of the subrack.
NOTE
l Slot bandwidth
l Board version
l When the cross-connect capacity is 20 Gbit/s, the SLT1 can be installed in slots 5–8 and
11–13. When the SLT1 is installed in slots 5 and 6, one to four optical interfaces can be
configured. When the SLT1 is installed in slots 7, 8, 11, and 12, one to twelve optical
interfaces can be configured. When the SLT1 is installed in slot 13, one to eight optical
l When the cross-connect capacity is 60 Gbit/s, the SLT1 can be installed in slots 5–8 and
11–13.
6.6.7 Feature Code

The feature code of the SLT1 indicates the type of optical interface.
Table 6-27 provides the relationship between the feature code of the SLT1 and the type of optical
interface.
Table 6-27 Relationship between the feature code of the SLT1 and the type of optical interface
SSN1SLT123 23 S-1.1

SSN1SLT124 24 L-1.1
SSN1SLT125 25 L-1.2

You can set the parameters for the SLT1 by using the U2000.
You can set the following parameters for the SLT1 by using the U2000:
l J0
l J1
l J2
l C2

The technical specifications of the SLT1 include the parameters specified for optical interfaces,
dimensions, weight, and power consumption.

Table 6-28 lists the parameters specified for the optical interfaces of the SLT1.
Table 6-28 Parameters specified for the optical interfaces of the SLT1
Parameter Value
Application code S-1.1 L-1.1 L-1.2
Transmission distance (km) 2 to 15 20 to 40 60 to 80
Type of fiber Single-mode LC Single-mode LC Single-mode LC
Operating wavelength range 1261 to 1360 1263 to 1360 1480 to 1580

(nm)
Launched optical power -15 to -8 -5 to 0 -5 to 0

range (dBm)
Receiver sensitivity (dBm) -28 -34 -34
Minimum overload (dBm) -8 -10 -10
Minimum extinction ratio 8.2 10 10

(dB)

Laser Safety Class

The mechanical specifications of the SLT1 are as follows:
l Weight (kg): 1.3
Power Consumption
The maximum power consumption of the SLT1 at room temperature (25°C) is 22 W.
6.7 SEP1
technical specifications of the SEP1 (2xSTM-1 line processing board). This topic also describes
how to configure and commission the SEP1.

The SEP1 is available in one functional version, namely, N1.
6.7.2 Application
The SEP1 is a line board. The SEP1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical/electrical signals. The SEP1 converts the received optical signals
into electrical signals and sends the electrical signals to the cross-connect side, or directly sends
the received electrical signals to the cross-connect side. In addition, the SEP1 converts the
electrical signals sent from the cross-connect side into optical signals and transmits the optical
signals.
The SEP1 processes STM-1 signals. When the interfaces are available on the front panel of the
SEP1 (the logical board of the SEP1 is displayed as SEP1 on the U2000), the SEP1 processes
2xSTM-1 electrical signals. In this case, the SEP1 is a 2xSTM-1 signal processing board. When
the SEP1 is used with the interface board (the logical board of the SEP1 is displayed as SEP on
the U2000), the SEP1 processes 8xSTM-1 optical signals or 8xSTM-1 electrical signals. In this
case, the SEP1 is an 8xSTM-1 signal processing board. The physical boards of the two types of
logical boards (SEP1 and SEP) are the same and are the SEP1. When the logical boards need
not be differentiated, both the SEP1 and SEP are defined as SEP1.
The SEP1 consists of the line interface module, CDR module, SDH overhead processing module,
logic and control module, and power module. The external services are accessed by the external
interface boards EU04//EU08/OU08. The EU04/EU08 is an electrical interface board and the
OU08 is an optical/electrical interface board.
6.7.5 Front Panel
The front panel of the SEP1 has indicators, interfaces, and a bar code.


The SEP1 does not have any jumpers or DIP switches that are used for board settings.
6.7.7 Valid Slots
The SEP1 must be installed in a valid slot in the subrack. Otherwise, the SEP1 cannot work
normally.
6.7.8 Board Protection
The TPS protection is equipment-level protection. When the working board fails, the accessed
services are switched to the protection board. Hence, complex network-level protection
operations such as the MSP and SNCP are not triggered. In addition, the reliability of the
equipment is enhanced.
6.7.9 Feature Code
The IFSD1 does not have a feature code.
You can set the parameters for the SEP1 by using the U2000.
The technical specifications of the SEP1 include the parameters specified for interfaces,
mechanical specifications, and power consumption.

The SEP1 is available in one functional version, namely, N1.
6.7.2 Application
The SEP1 is a line board. The SEP1 can be used on the OptiX OSN equipment series to transmit
and receive STM-1 optical/electrical signals. The SEP1 converts the received optical signals
into electrical signals and sends the electrical signals to the cross-connect side, or directly sends
the received electrical signals to the cross-connect side. In addition, the SEP1 converts the
electrical signals sent from the cross-connect side into optical signals and transmits the optical
signals.

NE1
NE2 NE4
NE3
Service flow
Line board

The SEP1 processes STM-1 signals. When the interfaces are available on the front panel of the
SEP1 (the logical board of the SEP1 is displayed as SEP1 on the U2000), the SEP1 processes
2xSTM-1 electrical signals. In this case, the SEP1 is a 2xSTM-1 signal processing board. When
the SEP1 is used with the interface board (the logical board of the SEP1 is displayed as SEP on
the U2000), the SEP1 processes 8xSTM-1 optical signals or 8xSTM-1 electrical signals. In this
case, the SEP1 is an 8xSTM-1 signal processing board. The physical boards of the two types of
logical boards (SEP1 and SEP) are the same and are the SEP1. When the logical boards need
not be differentiated, both the SEP1 and SEP are defined as SEP1.
Table 6-29 provides the functions and features of the SEP1.
Table 6-29 Functions and features of the SEP1
Function and SEP1

Feature
Basic functions l Processes 2xSTM-1 signals when the interfaces are available on the
front panel.
l Processes 8xSTM-1 signals when the SEP1 works with an interface
board.
the optical module.
l Supports the usage and monitoring of the SFP optical module, which
processing

Function and SEP1

Feature

overheads.
l Supports one or two channels of ECC communication.
events
Protection l Supports the Two-fiber ring MSP.

schemes l Supports the Four-fiber ring MSP.
l Supports the TPS protection when used with the interface board and
the switching and bridging board.

features l Supports inloops on VC-4 paths.
services.
When the SEP1 works with different interface boards and electrical interface switching boards,
the access capabilities for the STM-1 signals are different. For details, refer to Table 6-30.
Table 6-30 Access capabilities of the SEP1 when the SEP1 works with different interface boards
and electrical interface switching boards
Interface Board SEP1
None Accesses and processes 2xSTM-1 electrical signals, but does not
support the TPS protection.
EU04 Accesses and processes 4xSTM-1 electrical signals. One SEP1 can be
configured with a maximum of two EUO4 interface boards at the same
time.
EU08 Accesses and processes 8xSTM-1 electrical signals.

Interface Board SEP1
OU08 Accesses and processes 8xSTM-1 optical/electrical signals.
EU08 + OU08 Cannot work with the EU08 and OU08 at the same time.
EU04 + TSB4 Accesses and processes 4xSTM-1 electrical signals, and supports the
TPS protection.
EU08 + TSB8 Accesses and processes 8xSTM-1 electrical signals, and supports the
TPS protection.
CAUTION
When the SEP1 works with an interface board, the two interfaces on the front panel of the SEP1
are invalid. The SEP1 cannot work with the EU08 and OU08 at the same time.

The SEP1 consists of the line interface module, CDR module, SDH overhead processing module,
logic and control module, and power module. The external services are accessed by the external
interface boards EU04//EU08/OU08. The EU04/EU08 is an electrical interface board and the
OU08 is an optical/electrical interface board.
Figure 6-22 shows the functional block diagram of the SEP1.
Figure 6-22 Functional block diagram of the SEP1

Backplane
PLL unit
155
SPI NRZ Mbit/s K1 and K2
CDR K1 and K2 Cross-connect
insertion/extraction
155 Mbit/s CMI Encode/ unit
Port 1 155 Mbit/s High-speed
Transformer Decode
155 Mbit/s bus Cross-connect
....
RST MST MSA HPT unit A

155 High-speed
CMI NRZ CDR Mbit/s bus Cross-connect
155 Mbit/s Encode/
Port 2 unit B
Transformer Decode DCC
155 Mbit/s 155 Mbit/s SCC unit
SDH overhead
processing module
LOS Frame header Cross-connect

Logic and unit
SCC unit

module Fuse
+3.3 V backup power
termination

Figure 6-23 shows the functional block diagram of the SEP when the SEP works with the EU08.
When the SEP works with the EU04, the function block diagram is the same except that the
number of signals accessed and processed by the SEP is different.
Figure 6-23 Functional block diagram of the SEP when the SEP works with the EU08
Backplane
Reference clock
155 MHz Cross-connect
PLL unit
K1 and K2
insertion/extraction K1 and K2 Cross-connect
EU08 unit
SPI
155 Mbit/s CMI 155 Mbit/s
Port 1 Encode/ CDR High-speed
Transformer
155 Mbit/s Decode 155 Mbit/s bus Cross-connect
unit A
155 Mbit/s CMI 155 Mbit/s RST MST MSA HPT High-speed
Port 8 Encode/ CDR
bus Cross-connect
155 Mbit/s Transformer Decode 155 Mbit/s
unit B
DCC
SCC unit
SDH overhead
processing module
Frame header Cross-connect

LOS Logic and unit
SCC unit

module Fuse
+3.3 V backup power
termination
Figure 6-24 shows the functional block diagram of the SEP when the SEP works with the OU08.

Figure 6-24 Functional block diagram of the SEP when the SEP works with the OU08
Backplane
155 MHz Reference clock

Cross-connect
PLL unit
K1 and K2
155 OU08 unit
155
Mbit/s
O/E NRZ Mbit/s High-speed
155 CDR
Port 1 Mbit/s SP bus
E/O 155 Mbit/s Cross-connect
155 I unit A
155
Mbit/s O/E RST MST MSA HPT High-speed
NRZ Mbit/s
CDR bus
Port 8 155 Cross-connect
Mbit/s E/O 155 Mbit/s unit B
DCC
SCC unit
SDH overhead
processing module
Frame header Cross-connect

LOS Logic and unit

module Fuse
+3.3 V backup power
termination
NOTE
If the SEP works with the OU08 that uses electrical modules, it works in the same way as it does when it
works with the EU08.
Line Interface Module and CDR Module

l In the receive direction, the received electrical signals (CMI codes) are isolated through
the converter and then transmitted to the decoding unit. The CDR module restores the clock
signals after decoding.
l In the transmit direction, the SDH signals, which are processed by the SDH overhead
processing module, are transmitted to the encoding unit. The converter isolates the 155
Mbit/s electrical signals (CMI codes) and sends the signals. The encoding and decoding
units monitor R_LOS alarms.

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.

6.7.5 Front Panel

The front panel of the SEP1 has indicators, interfaces, and a bar code.

Figure 6-25 shows the appearance of the front panel of the SEP1.
Figure 6-25 Front panel of the SEP1
SEP1
STAT
ACT
PROG
SRV
AOUT
AIN
BOUT
BIN
SEP1
Indicators

Interfaces
The front panel of the SEP1 has two pairs of electrical interfaces. Table 6-31 describes the types
and usage of the electrical interfaces of the SEP1.
Table 6-31 Electrical interfaces of the SEP1
AIN–BIN 75-ohm SMB Receives the STM-1 signals.
AOUT–BOUT 75-ohm SMB Transmits the STM-1 signals.
Note: The SEP1 can be used with the interface board EU04, EU08, or OU08. In this case, the
SEP1 is defined as SEP. When the SEP1 is used with the interface board, the two interfaces
on the front panel are invalid.

The SEP1 does not have any jumpers or DIP switches that are used for board settings.
6.7.7 Valid Slots

The SEP1 must be installed in a valid slot in the subrack. Otherwise, the SEP1 cannot work
normally.
NOTE
When the SEP1 is used with the interface board, the logical board of the SEP1 is displayed as SEP on the
U2000.
The slots valid for the SEP1 are as follows:
l When the SEP1 is connected to cables by using the interfaces on its front panel, the SEP1
can be installed in slots 5–8 and 11–13 in the subrack.
l When the SEP1 is used with the interface board, the SEP1 can be installed in slots 6, 7, 12,
and 13 in the subrack.
NOTE
When the SEP1 is installed in slot 6, the SEP1 provides only four electrical interfaces even when the
interface board is configured.

The TPS protection is equipment-level protection. When the working board fails, the accessed
services are switched to the protection board. Hence, complex network-level protection
operations such as the MSP and SNCP are not triggered. In addition, the reliability of the
equipment is enhanced.

NOTE
When the SEP1 is used with the interface board, the logical board of the SEP1 is displayed as SEP on the
U2000.
Protection Principle
The SEP can work with the EU08 and TSB8 to provide two 1:1 TPS protection groups for
8xSTM-1 electrical signals.
The SEP can also work with the EU04 and TSB4 to provide two 1:1 TPS protection groups for
4xSTM-1 electrical signals.
When the SEP works with the EU08 and TSB8 to realize the TPS protection, the protection
principle and valid slots of the involved boards are the same as the protection principle and valid
slots of the involved boards when the SEP works with the EU04 and TSB4 to realize the TPS
protection. Figure 6-26 shows the TPS protection provided by the SEP.
Figure 6-26 TPS protection provided by the SEP

Service signal Service signal
Switching
control bus
Interface board N
Interface board 1
switching board
Interface board
Protection
N 1 1 2 1 2
timing board
connect and
Cross-
Working board N
Protection board
Working board 1
Working board
Failed
l Normal state
When each working board functions normally, the traffic signal is directly transmitted to
the corresponding working board through position 1 of the control switch on the interface
board.
l Switching state
When a working board detects a failure and requires the switching operation, the control
switch of the corresponding interface board switches from position 1 to position 2. At the
same time, the control switch of the protection switching board switches to the
corresponding position so that the protection board can protect the failed working board.
NOTE
TPS trigger conditions on the OptiX OSN equipment are detected by the cross-connect and timing board.
Therefore, TPS is successful even though the system control board is not in position or is faulty.

Hardware Configuration
Figure 6-27 shows the slot configuration for the two 1:1 TPS protection groups of the SEP.
Figure 6-27 Slot configuration for the two 1:1 TPS protection groups of the SEP
1 2 3 4 1 2 2 8 9 1 1 1 1 1 1 1 1 1
9 0 1 0 1 2 3 4 5 6 7 8
Protection 1
Protection 2
Working 2
Working 1
S
TSB8
EU08
EU08
TSB8
A
CXL
CXL
Fiber routing area
PIU FAN FAN PIU

In Figure 6-27, the board in slot 6 protects the board in slots 7. The board in slot 13 protects the
board in slot 12.
Table 6-32 lists the slots for the SEP, EU08, and TSB8.
Table 6-32 Slots for the SEP, EU08, and TSB8
Board Protection Group 1 Protection Group 2
SEP (working board) Slot 6 Slot 13
TSB8 Slot 1 Slot 17
SEP (working board) Slot 7 Slot 12
EU08 Slot 3 Slot 15
6.7.9 Feature Code



CAUTION
When the SEP1 works with the EU08, ensure that the EU08 is installed before the SEP1.
Otherwise, the opposite end may receive the R_LOF alarm.

is correct.
----End


TUG structure.
NOTE

----End

Switching.
----End

Boards.
----End

You can set the parameters for the SEP1 by using the U2000.
You can set the following parameters for the SEP1 by using the U2000:
l J0
l J1
l J2
l C2

Troubleshooting
Table 6-33 lists the faults that occur on the SEP1 frequently and the troubleshooting methods.

Table 6-33 Methods used to troubleshoot the faults that occur on the SEP1 frequently
Cause
Service interruption l The optical fiber, See Troubleshooting Service Interruptions.

cable, or
connector
becomes
abnormal.
l An incorrect
operation is
performed.
l The types or
settings of the
boards are
inconsistent.
Bit error l The optical power See Troubleshooting Bit Errors.

becomes
abnormal.
l The equipment
becomes faulty.
Pointer justification l The clock See Troubleshooting Pointer Justification.

configuration is
incorrect.
l The precision of
the external clock
source is very
low.
Protection switching l The MSP See Troubleshooting Protection Switching

failure switching fails. Faults.
l The SNCP
switching fails.
l The clock
protection
switching fails.
NEs being l A single NE See Troubleshooting the NEs Being

unreachable to the becomes Unreachable.
U2000 unreachable to
the U2000.
l All the NEs in a
subnet become
unreachable to
the U2000.
l An NE becomes
unreachable to
the U2000
frequently.


Cause
Equipment An SDH overhead See Troubleshooting Device Interconnection

interconnection fault interconnection fault Faults.
occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the SEP1, see Replacing an SDH Board.

6.7.13.1 N1SEP1
AU_AIS AU_CMM AU_LOP
B1_EXC B1_SD B2_EXC
B2_SD B3_EXC B3_EXC_VC3
B3_SD B3_SD_VC3 BD_STATUS
BIP8_ECC BIP_EXC BIP_SD
CHIP_FAIL C2_PDI C2_VCAIS
FSELECT_STG COMMUN_FAIL FPGA_ABN
HP_REI HP_LOM HP_RDI
HP_UNEQ HP_SLM HP_TIM
LP_RDI_VC12 J0_MM LOOP_ALM
LP_REI_VC3 LP_RDI_VC3 LP_REI_VC12
LP_TIM_VC12 LP_SLM_VC12 LP_SLM_VC3
LP_UNEQ_VC3 LP_TIM_VC3 LP_UNEQ_VC12
MS_REI MS_AIS MS_RDI
OH_LOOP NO_BD_SOFT POWER_ABNORMAL
R_LOC R_LOF R_LOS
R_OOF SLAVE_WORKING SPARE_PATH_ALM

T_LOSEX TEST_STATUS TR_LOC
TU_AIS_VC12 TU_AIS_VC3 TU_LOP_VC12
TU_LOP_VC3 W_R_FAIL PATCHFILE_NOTEXIST
PATCH_ERR PATCH_NOT_CONFIRM PS
SWDL_PKG_NOBD- MOD_TYPE_MISMATCH TIME_NOT_SUPPORT

SOFT

6.7.14.1 N1SEP1
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
MSSES MSUAS RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS

The technical specifications of the SEP1 include the parameters specified for interfaces,
Parameters Specified for Interfaces

Table 6-34 lists the parameters specified for the interfaces of the SEP1.

Table 6-34 Parameters specified for the interfaces of the SEP1

Parameter Value
Line code pattern CMI and NRZ
Connector SMB
The mechanical specifications of the SEP1 are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the SEP1 at room temperature (25°C) is 17 W.
6.8 SL4

The SL4 is available in three functional versions, namely, R1, N1, and N2. The difference
services. The R1SL4 is a STM-4 optical interface board, which is installed in a divided slot in
a subrack. The N1SL4 is no longer manufactured.
6.8.2 Application
signals.
The SL4 transmits and receives 1xSTM-4 optical signals, performs O/E conversion for the
line.
6.8.5 Front Panel
The front panel of the N1SL4/N2SL4 has indicators, interfaces, a bar code, and a laser safety
class label.The front panel of the R1SL4 has indicators, interfaces, and a bar code.
6.8.6 Valid Slots

The slots valid for the SL4 vary with the version of the board.
6.8.7 Feature Code
You can set the parameters for the SL4 by using the U2000.

The SL4 is available in three functional versions, namely, R1, N1, and N2. The difference
services. The R1SL4 is a STM-4 optical interface board, which is installed in a divided slot in
a subrack. The N1SL4 is no longer manufactured.

Item Description
Functional versions The SL4 is available in three functional versions, namely, R1, N1,
and N2.
Differences l The N2SL4 supports the TCM function and AU-3 services, but
same time.
l The R1SL4 and N1SL4 do not support the TCM function or AU-3
services.
l The R1SL4 is installed in a divided slot.
Substitution Through the board version replacement function, the N1SL4A can
substitute for the N1SL4.
NOTE
When you configure the MSP or SNCP, you cannot configure the R1SL4 or N1SL4 as the protection board
if the working board is the N2SL4 on which the TCM function is enabled or AU-3 services are configured.
Otherwise, the services are interrupted when a switching operation is performed.
6.8.2 Application
signals.

NE1
NE2 NE4
NE3
Service flow
Line board

The SL4 transmits and receives 1xSTM-4 optical signals, performs O/E conversion for the
line.
Function and SL4

Feature
Basic functions Receives and transmits 1xSTM-4 optical signals, and processes
1xSTM-4 standard or concatenation services.

the optical I-4, S-4.1, L-4.1, L-4.2, and Ve-4.2.
interface l The characteristics of the optical interfaces of the I-4, S-4.1, L-4.1,
the optical module module.
l The N1SL4 supports the single-fiber bidirectional optical module,

Function and SL4

Feature
Service l Supports the VC-12 services, VC-3 services, VC-4 services, and
processing VC-4-4c concatenation services.
l The N2SL4 supports the AU-3 services.

overheads. Supports the setting and query of the J0, J1, J2, and C2
bytes.
events
Protection l Supports the two-fiber ring MSP, four-fiber ring MSP, linear MSP,
schemes SNCP, SNCTP, and SNCMP.
l Supports the fiber-shared MSP and SNCP and processes two sets of
K bytes. One SL4 supports a maximum of two MSP protection rings.

features l The N1SL4 and R1SL4 support inloops on VC-4 paths.
services.
services.
l The N2SL4 supports the TCM function.

Figure 6-29 shows the functional block diagram of the .SL4


Cross-connect unit
PLL
622 622
622 Mbit/s Mbit/s Mbit/s
O/E S CDR K1 and K2
P
622 Mbit/s I 622 Mbit/s
E/O
High-speed bus
....
....
622 RST MST MSA HPT High-speed
622 Mbit/s bus
622 Mbit/s Cross-connect unit B
O/E S Mbit/s CDR
P
622 Mbit/s I 622 Mbit/s DCC
E/O SCC unit
IIC Frame header

LOS control Communication
Laser shutdown module SCC unit
+3.3 V DC/DC Fuse -48 V/ -60 V

DC/DC
+3.3 V backup power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.

6.8.5 Front Panel

The front panel of the N1SL4/N2SL4 has indicators, interfaces, a bar code, and a laser safety
class label.The front panel of the R1SL4 has indicators, interfaces, and a bar code.

Figure 6-30 shows the appearance of the front panel of the N1SL4/N2SL4.
Figure 6-30 Front panel of the N1SL4/N2SL4
SL4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL4
Figure 6-31 shows the appearance of the front panel of the R1SL4.

Figure 6-31 Front panel of the R1SL4
SL4
STAT
ACT
PROG
SRV
OUT IN
SL4
Indicators
Interfaces
The front panel of the SL4 has one optical interface. Table 6-37 describes the types and usage
of the optical interfaces of the SL4.

Interface
The SL4 can use the swappable optical modules to facilitate maintenance.
6.8.6 Valid Slots

The slots valid for the SL4 vary with the version of the board.

NOTE
l Slot bandwidth
l Board version
The slots valid for the SL4 are as follows:
l The R1SL4 can be installed in divided slots 5–7 and 19–21.

l The N1SL4 and N2SL4 can be installed in slots 5–8 and 11–13.
6.8.7 Feature Code

Table 6-38 provides the relationship between the feature code of the SL4 and the type of optical
interface.
SSR1SL410, SSN1SL410 10 S-4.1

and SSN2SL410
SSR1SL411, SSN1SL411 11 L-4.1

and SSN2SL411
SSR1SL412, SSN1SL412 12 L-4.2

and SSN2SL412
SSR1SL413, SSN1SL413 13 Ve-4.2

and SSN2SL413
SSR1SL414, SSN1SL414 14 I-4

and SSN2SL414

l J0
l J1
l J2
l C2



Parameter Value
distance (km)
Type of fiber Single-mode Single-mode Single- Single- Single-

LC LC mode LC mode LC mode LC
Operating 1261 to 1360 1274 to 1356 1280 to 1480 to 1480 to

wavelength range 1335 1580 1580
(nm)
Launched optical -15 to -8 -15 to -8 -3 to +2 -3 to +2 -3 to +2

power range
(dBm)
Receiver -23 -28 -28 -28 -34

sensitivity (dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the N1SL4 and N2SL4 are as follows:

The mechanical specifications of the R1SL4 are as follows:

l Weight (kg): 0.5
Power Consumption
The maximum power consumption of the R1SL4 at room temperature (25°C) is 10 W.
6.9 SL4A

6.9.2 Application
signals.
The SL4A transmits and receives 1xSTM-4 optical signals, performs O/E conversion for the
line.
module, logic and control module, power module.
6.9.5 Front Panel
6.9.6 Valid Slots
6.9.7 Feature Code


6.9.2 Application
signals.
NE1
NE2 NE4
NE3
Service flow
Line board

The SL4A transmits and receives 1xSTM-4 optical signals, performs O/E conversion for the
line.
Table 6-40 provides the functions and features of the SL4A.
Function and SL4A

Feature

Function and SL4A

Feature
Specifications of Supports different types of standard optical interfaces, namely, the I-4,
the optical S-4.1, L-4.1, L-4.2, and Ve-4.2. The characteristics of the optical
interface interfaces of the I-4, S-4.1, L-4.1, and L-4.2 types comply with ITU-T
G.957. The characteristics of the optical interface of the Ve-4.2 type
Service Supports the VC-12 services, VC-3 services, VC-4 services, and

overheads. Supports the setting and query of the J0, J1, J2, and C2
bytes.
events
l Supports the fiber-shared MSP and SNCP and processes two sets of
K bytes. One SL4A supports a maximum of two MSP protection
rings.

services.
services.

module, logic and control module, power module.

Figure 6-33 shows the functional block diagram of the SL4A.
Figure 6-33 Functional block diagram of the SL4A

Cross-connect unit
PLL
622 622
O/E S CDR K1 and K2
P
E/O
High-speed bus
....
....
622 Mbit/s bus
O/E S Mbit/s CDR
P
E/O SCC unit
IIC Frame header

+3.3 V DC/DC Fuse -48 V/ -60 V

DC/DC
+3.3 V backup power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.

6.9.5 Front Panel


SL4A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
SL4A
Indicators

Interfaces

Interface
The SL4A can use the swappable optical modules to facilitate maintenance.
6.9.6 Valid Slots

6.9.7 Feature Code

Table 6-42 provides the relationship between the feature code of the SL4A and the type of optical
interface.
SSN1SL4A10 10 S-4.1
SSN1SL4A11 11 L-4.1
SSN1SL4A12 12 L-4.2
SSN1SL4A13 13 Ve-4.2
SSN1SL4A14 14 I-4


l J0
l J1
l J2
l C2


Parameter Value
distance (km)
Type of fiber Single-mode Single-mode Single- Single- Single-

LC LC mode LC mode LC mode LC
Operating 1261 to 1360 1274 to 1356 1280 to 1480 to 1480 to

wavelength range 1335 1580 1580
(nm)
Launched optical -15 to -8 -15 to -8 -3 to +2 -3 to +2 -3 to +2

power range
(dBm)
Receiver -23 -28 -28 -28 -34

sensitivity (dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class


l Weight (kg): 0.6
Power Consumption
The maximum power consumption of the SL4A at room temperature (25°C) is 17 W.
6.10 SLD4
technical specifications of the SLD4 (2xSTM-4 optical interface board).

The SLD4 is available in three functional versions, namely, R1, N1, and N2. The difference
services. The R1SLD4 is a 2xSTM-4 optical interface board, which is installed in a divided slot
in a subrack. The N1SLD4 is no longer manufactured.
6.10.2 Application
The SLD4 is a line board. The SLD4 can be used on the OptiX OSN equipment series to transmit
and receive STM-4 optical signals. The SLD4 converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SLD4 converts
signals.
The SLD4 transmits and receives 2xSTM-4 optical signals, performs O/E conversion for the
line.
The SLD4 consists of the O/E converting module, CDR module, SDH overhead processing
6.10.5 Front Panel
The front panel of the N1SLD4/N2SLD4 has indicators, interfaces, a bar code, and a laser safety
class label. The front panel of the R1SLD4 has indicators, interfaces, and a bar code.
6.10.6 Valid Slots
The slots valid for the SLD4 vary with the version of the board.
6.10.7 Feature Code
The feature code of the SLD4 indicates the type of optical interface.
You can set the parameters for the SLD4 by using the U2000.
The technical specifications of the SLD4 include the parameters specified for optical interfaces,


The SLD4 is available in three functional versions, namely, R1, N1, and N2. The difference
services. The R1SLD4 is a 2xSTM-4 optical interface board, which is installed in a divided slot
in a subrack. The N1SLD4 is no longer manufactured.
Table 6-44 describes the versions of the SLD4.
Table 6-44 Versions of the SLD4

Item Description
Functional versions The SLD4 is available in three functional versions, namely, R1, N1,
and N2.
Differences l The N2SLD4 supports the TCM function and AU-3 services, but
same time.
l The R1SL1 and N1SLD4 do not support the TCM function or
AU-3 services.
l The R1SLD4 is installed in a divided slot.
Substitution The versions cannot be substituted with each other.
NOTE
When you configure the MSP or SNCP, you cannot configure the R1SLD4 or N1SLD4 as the protection
board if the working board is the N2SLD4 on which the TCM function is enabled or AU-3 services are
configured. Otherwise, the services are interrupted when a switching operation is performed.
6.10.2 Application
The SLD4 is a line board. The SLD4 can be used on the OptiX OSN equipment series to transmit
and receive STM-4 optical signals. The SLD4 converts the received optical signals into electrical
signals and sends the electrical signals to the cross-connect side. In addition, the SLD4 converts
signals.

NE1
NE2 NE4
NE3
Service flow
Line board

The SLD4 transmits and receives 2xSTM-4 optical signals, performs O/E conversion for the
line.
Table 6-45 provides the functions and features of the SLD4.
Table 6-45 Functions and features of the SLD4
Function and SLD4

Feature

l The N1SLD4 supports the single-fiber bidirectional optical module,

Function and SLD4

Feature
l The N2SLD4 supports the AU-3 services.

overheads.
events
l Supports the fiber-shared MSP and SNCP and processes four sets of
K bytes. A single optical interface supports two MSP protection
rings, and one SLD4 supports a maximum of four MSP protection
rings.

features l The N1SLD4 and R1SLD4 support inloops on VC-4 paths.
services.
services.
l The N2SLD4 supports the TCM function.

The SLD4 consists of the O/E converting module, CDR module, SDH overhead processing
Figure 6-36 shows the functional block diagram of the SLD4.

Figure 6-36 Functional block diagram of the SLD4

Cross-connect unit
PLL
622 622
O/E S CDR K1 and K2
P
E/O
High-speed bus
....
....
622 Mbit/s bus
O/E S Mbit/s CDR
P
E/O SCC unit
IIC Frame header

+3.3 V DC/DC Fuse -48 V/ -60 V

DC/DC
+3.3 V backup power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.

6.10.5 Front Panel

The front panel of the N1SLD4/N2SLD4 has indicators, interfaces, a bar code, and a laser safety
class label. The front panel of the R1SLD4 has indicators, interfaces, and a bar code.

Figure 6-37 shows the appearance of the front panel of the N1SLD4/N2SLD4.
Figure 6-37 Front panel of the N1SLD4/N2SLD4
SLD4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
SLD4
Figure 6-38 shows the appearance of the front panel of the R1SLD4.

Figure 6-38 Front panel of the R1SLD4
SLD4
STAT
ACT
PROG
SRV
OUT1 IN1 OUT2 IN2
SLD4
Indicators
Interfaces
The front panel of the SLD4 has two optical interfaces. Table 6-46 describes the types and usage
of the optical interfaces of the SLD4.
Table 6-46 Optical interfaces of the SLD4

Interface
The SLD4 can use the swappable optical modules to facilitate maintenance.
6.10.6 Valid Slots

The slots valid for the SLD4 vary with the version of the board.

NOTE
l Slot bandwidth
l Board version
The slots valid for the SLD4 are as follows:

– The R1SLD4 can be installed in divided slots 5–7 and 19–21 in the subrack. When the
R1SLD4 is installed in slots 7 and 21, two optical interfaces can be configured. When
the R1SLD4 is installed in slots 5, 6, 19, and 20, one optical interface can be configured.
– The N1SLD4 and N2SLD4 can be installed in slots 5–8 and 11–13 in the subrack. When
the SLD4 is installed in slots 7, 8, and 11–13, two optical interfaces can be configured.
When the SLD4 is installed in slots 5 and 6, one optical interface can be configured.
– The R1SLD4 can be installed in divided slots 5–7 and 19–21 in the subrack.
– The N1SLD4 and N2SLD4 can be installed in slots 5–8 and 11–13 in the subrack.
6.10.7 Feature Code

The feature code of the SLD4 indicates the type of optical interface.
Table 6-47 provides the relationship between the feature code of the SLD4 and the type of optical
interface.
Table 6-47 Relationship between the feature code of the SLD4 and the type of optical interface
SSR1SLD410, 10 S-4.1
SSN1SLD410 and
SSN2SLD410
SSR1SLD411, 11 L-4.1
SSN1SLD411 and
SSN2SLD411
SSR1SLD412, 12 L-4.2
SSN1SLD412 and
SSN2SLD412
SSR1SLD413, 13 Ve-4.2
SSN1SLD413 and
SSN2SLD413
SSR1SLD414, 14 I-4
SSN1SLD414 and
SSN2SLD414


You can set the parameters for the SLD4 by using the U2000.
You can set the following parameters for the SLD4 by using the U2000:
l J0
l J1
l J2
l C2

The technical specifications of the SLD4 include the parameters specified for optical interfaces,

Table 6-48 lists the parameters specified for the optical interfaces of the SLD4.
Table 6-48 Parameters specified for the optical interfaces of the SLD4
Parameter Value
Line code NRZ

pattern

code
distance (km)
Type of fiber Single- Single- Single- Single- Single-mode

Operating 1261 to 1274 to 1280 to 1480 to 1480 to 1580

wavelength 1360 1356 1335 1580
range (nm)
Launched -15 to -8 -15 to -8 -3 to +2 -3 to +2 -3 to +2

optical power
range (dBm)
Receiver -23 -28 -28 -28 -34

sensitivity
(dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)

Parameter Value
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the N1SLD4 and N2SLD4 are as follows:

l Weight of the N1SLD4 (kg): 0.6
l Weight of the N2SLD4 (kg): 1.0
The mechanical specifications of the R1SLD4 are as follows:

l Weight (kg): 0.5
Power Consumption
The maximum power consumption of the N1SLD4 at room temperature (25°C) is 17 W.
The maximum power consumption of the N2SLD4 at room temperature (25°C) is 15 W.
The maximum power consumption of the R1SLD4 at room temperature (25°C) is 11 W.
6.11 SLD4A
technical specifications of the SLD4A (2xSTM-4 optical interface board).

The SLD4A is available in one functional version, namely, N1.
6.11.2 Application
The SLD4A is a line board. The SLD4A can be used on the OptiX OSN equipment series to
transmit and receive STM-4 optical signals. The SLD4A converts the received optical signals
SLD4A converts the electrical signals sent from the cross-connect side into optical signals and
The SLD4A transmits and receives STM-4 optical signals, performs O/E conversion for the
line.


The SLD4A consists of the O/E converting module, CDR module, SDH overhead processing
6.11.5 Front Panel
The front panel of the SLD4A has indicators, interfaces, a bar code, and a laser safety class label.
6.11.6 Valid Slots
The slots valid for the SLD4A vary with the cross-connect capacity of the subrack.
6.11.7 Feature Code
The feature code of the SLD4A indicates the type of optical interface.
You can set the parameters for the SLD4A by using the U2000.
The technical specifications of the SLD4A include the parameters specified for optical

The SLD4A is available in one functional version, namely, N1.
Through the board version replacement function, the N1SLD4 can substitute for the N1SLD4A.
6.11.2 Application
The SLD4A is a line board. The SLD4A can be used on the OptiX OSN equipment series to
transmit and receive STM-4 optical signals. The SLD4A converts the received optical signals
SLD4A converts the electrical signals sent from the cross-connect side into optical signals and
NE1
NE2 NE4
NE3
Service flow
Line board


The SLD4A transmits and receives STM-4 optical signals, performs O/E conversion for the
line.
Table 6-49 provides the functions and features of the SLD4A.
Table 6-49 Functions and features of the SLD4A

Function and SLD4A
Feature

fiber bidirectional optical module does not support loopbacks as the
Service Supports the VC-12 services, VC-3 services, VC-4 services, and

overheads.
events

Function and SLD4A

Feature
l Supports the fiber-shared MSP and SNCP and processes four sets of
K bytes. A single optical interface supports two MSP protection
rings, and one SLD4A supports a maximum of four MSP protection
rings.

services.
services.

The SLD4A consists of the O/E converting module, CDR module, SDH overhead processing
Figure 6-40 shows the functional block diagram of the SLD4A.

Figure 6-40 Functional block diagram of the SLD4A

Cross-connect unit
PLL
622 622
O/E S CDR K1 and K2
P
E/O
High-speed bus
....
....
622 Mbit/s bus
O/E S Mbit/s CDR
P
E/O SCC unit
IIC Frame header

+3.3 V DC/DC Fuse -48 V/ -60 V

DC/DC
+3.3 V backup power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.

6.11.5 Front Panel

The front panel of the SLD4A has indicators, interfaces, a bar code, and a laser safety class label.

Figure 6-41 shows the appearance of the front panel of the SLD4A.
Figure 6-41 Front panel of the SLD4A
SLD4A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
SLD4A
Indicators

Interfaces
The front panel of the SLD4A has two optical interfaces. Table 6-50 describes the types and
usage of the optical interfaces of the SLD4A.
Table 6-50 Optical interfaces of the SLD4A

Interface
The SLD4A can use the swappable optical modules to facilitate maintenance.
6.11.6 Valid Slots

The slots valid for the SLD4A vary with the cross-connect capacity of the subrack.
NOTE
l Slot bandwidth
l Board version
l When the cross-connect capacity is 20 Gbit/s, the SLD4A can be installed in slot 5–8 and
11–13. When the SLD4A is installed in slots 7, 8, and 11–13, two optical interfaces can be
configured. When the SLD4A is installed in slots 5 and 6, one optical interface can be
configured.
l When the cross-connect capacity is 60 Gbit/s, the SLD4A can be installed in slots 5–8 and
11–13 in the subrack.
6.11.7 Feature Code

The feature code of the SLD4A indicates the type of optical interface.
Table 6-51 provides the relationship between the feature code of the SLD4A and the type of
optical interface.
Table 6-51 Relationship between the feature code of the SLD4A and the type of optical interface
SSN1SLD4A10 10 S-4.1
SSN1SLD4A11 11 L-4.1

SSN1SLD4A12 12 L-4.2
SSN1SLD4A13 13 Ve-4.2
SSN1SLD4A14 14 I-4

You can set the parameters for the SLD4A by using the U2000.
You can set the following parameters for the SLD4A by using the U2000:
l J0
l J1
l J2
l C2

The technical specifications of the SLD4A include the parameters specified for optical

Table 6-52 lists the parameters specified for the optical interfaces of the SLD4A.
Table 6-52 Parameters specified for the optical interfaces of the SLD4A
Parameter Value
Line code NRZ

pattern

code
distance (km)


wavelength 1360 1356 1335 1580
range (nm)

Parameter Value

optical power
range (dBm)
Receiver -23 -28 -28 -28 -34

sensitivity
(dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the SLD4A are as follows:

l Weight (kg): 0.6
Power Consumption
The maximum power consumption of the SLD4A at room temperature (25°C) is 17 W.
6.12 SLQ4

The SLQ4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the TCM function and AU-3 services.
The N1SLQ4 is no longer manufactured.
6.12.2 Application
signals.

The SLQ4 transmits and receives STM-4 optical signals, performs O/E conversion for the
line.
6.12.5 Front Panel
The front panel of the SLQ4 has indicators, interfaces, a bar code, and a laser safety class label.
6.12.6 Valid Slots
The SLQ4 can be installed in slots 5–8 and 11–13 in the subrack.
6.12.7 Feature Code

The SLQ4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the TCM function and AU-3 services.
The N1SLQ4 is no longer manufactured.
Table 6-53 describes the versions of the SLQ4.
Table 6-53 Versions of the SLQ4

Item Description
Functional The SLQ4 is available in two functional versions, namely, N1 and N2.
versions
Differences l The N2SLQ4 supports the TCM function and AU-3 services, but the
time.
l The N1SLQ4 does not support the TCM function or AU-3 services.
Substitution Through the board version replacement function, the N3SLQ41 can
substitute for the N1SLQ4 and N2SLQ4 at the same line rate.
NOTE
When you configure the MSP or SNCP, you cannot configure the N1SLQ4 as the protection board if the
working board is the N2SLQ4 on which the TCM function is enabled or AU-3 services are configured.
Otherwise, the services are interrupted when a switching operation is performed.

6.12.2 Application
signals.
NE1
NE2 NE4
NE3
Service flow
Line board

The SLQ4 transmits and receives STM-4 optical signals, performs O/E conversion for the
line.

Function and SLQ4
Feature

Function and SLQ4

Feature
l The N1SLQ4 supports the single-fiber bidirectional optical module,
the optical module.
l The N2SLQ4 supports the AU-3 services.

overheads.
events
l Supports the fiber-shared MSP and SNCP and processes eight sets of
K bytes. A single optical interface supports two MSP protection rings,
and one SLQ4 supports a maximum of eight MSP protection rings.

features l The N1SLQ4 supports inloops on VC-4 paths.
services.
l The N2SLQ4 supports the TCM function.



Cross-connect unit
PLL
622 622
O/E S CDR K1 and K2
P
E/O
High-speed bus
....
....

622 Mbit/s bus
O/E S Mbit/s CDR
P
E/O SCC unit
IIC Frame header

+3.3 V DC/DC Fuse -48 V/ -60 V

DC/DC
+3.3 V backup power
termination

CDR Module


l RST sub-module
l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module


units.
Power Module
require.
6.12.5 Front Panel


Figure 6-44 shows the appearance of the front panel of the SLQ4.
Figure 6-44 Front panel of the SLQ4
SLQ4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ4

Indicators
Interfaces
The front panel of the SLQ4 has four optical interfaces. Table 6-55 describes the types and usage
of the optical interfaces of the SLQ4.

Interface
The SLQ4 can use the swappable optical modules to facilitate maintenance.
6.12.6 Valid Slots

The SLQ4 can be installed in slots 5–8 and 11–13 in the subrack.
NOTE
l Slot bandwidth
l Board version
l When the cross-connect capacity is 20 Gbit/s, the SLQ4 can be installed in slots 5–8 and
11–13. When the SLQ4 is installed in slots 7, 8, 11, and 12, four optical interfaces can be
configured. When the SLQ4 is installed in slots 5 and 6, one optical interface can be
configured. When the SLQ4 is installed in slot 13, two optical interfaces can be configured.
11–13 in the subrack.
6.12.7 Feature Code

Table 6-56 provides the relationship between the feature code of the SLQ4 and the type of optical
interface.

SSN1SLQ410 and 10 S-4.1

SSN2SLQ410
SSN1SLQ411 and 11 L-4.1

SSN2SLQ411
SSN1SLQ412 and 12 L-4.2

SSN2SLQ412
SSN1SLQ413 and 13 Ve-4.2

SSN2SLQ413
SSN1SLQ414 and 14 I-4

SSN2SLQ414

l J0
l J1
l J2
l C2


Table 6-57 lists the parameters specified for the optical interfaces of the SLQ4.
Table 6-57 Parameters specified for the optical interfaces of the SLQ4
Parameter Value
Line code NRZ

pattern

code

Parameter Value
distance (km)


wavelength 1360 1356 1335 1580
range (nm)

optical power
range (dBm)
Receiver -23 -28 -28 -28 -34

sensitivity
(dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the SLQ4 are as follows:
l Weight (kg): 1.0
Power Consumption
6.13 SLQ4A


6.13.2 Application
line.
6.13.5 Front Panel
6.13.6 Valid Slots
6.13.7 Feature Code

Through the board version replacement function, the N1SLQ4 can substitute for the N1SLQ4A.
6.13.2 Application

NE1
NE2 NE4
NE3
Service flow
Line board

line.
Table 6-58 provides the functions and features of the SLQ4A.
Table 6-58 Functions and features of the SLQ4A

Function and SLQ4A
Feature
the optical module.
Service Supports the VC-12 services, VC-3 services, VC-4 services, and VC-4-4c
processing concatenation services.

Function and SLQ4A

Feature

overheads.
events
l Supports the fiber-shared MSP and SNCP and processes eight sets of
K bytes. A single optical interface supports two MSP protection rings,
and one SLQ4A supports a maximum of eight MSP protection rings.

services.

Figure 6-46 shows the functional block diagram of the SLQ4A.

Figure 6-46 Functional block diagram of the SLQ4A

PLL unit
622 622
622 Mbit/s Mbit/s Mbit/s K1 and K2
O/E S CDR Cross-connect
K1 and K2 insertion/extraction
P unit
E/O
High-speed
bus Cross-connect
....
....
unit A
RST MST MSA HPT High-speed
622 622
622 Mbit/s bus Cross-connect
O/E Mbit/s CDR Mbit/s
S unit B
P
E/O SCC unit

Logic and
LOS control Communication unit
+3.3
DC/DC Fuse -48 V/ -60 V
V
DC/DC
+3.3 V backup
power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.

6.13.5 Front Panel


Figure 6-47 shows the appearance of the front panel of the SLQ4A.
Figure 6-47 Front panel of the SLQ4A
SLQ4A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ4A
Indicators

Interfaces
The front panel of the SLQ4A has four optical interfaces. Table 6-59 describes the types and
usage of the optical interfaces of the SLQ4A.
Table 6-59 Optical interfaces of the SLQ4A

Interface
The SLQ4A can use the swappable optical modules to facilitate maintenance.
6.13.6 Valid Slots

NOTE
l Slot bandwidth
l Board version
l When the cross-connect capacity is 20 Gbit/s, the SLQ4A can be installed in slots 5–8 and
11–13. When the SLQ4A is installed in slots 7, 8, 11, and 12, four optical interfaces can
be configured. When the SLQ4A is installed in slots 5 and 6, one optical interface can be
configured. When the SLQ4A is installed in slot 13, two optical interfaces can be
configured.
l When the cross-connect capacity is 60 Gbit/s, the SLQ4A can be installed in slots 5–8 and
11–13. In this case, four optical interfaces can be configured.
6.13.7 Feature Code

Table 6-60 provides the relationship between the feature code of the SLQ4A and the type of
optical interface.
Table 6-60 Relationship between the feature code of the SLQ4A and the type of optical interface
SSN1SLQ4A10 10 S-4.1

SSN1SLQ4A13 13 Ve-4.2
SSN1SLQ4A14 14 I-4

You can set the following parameters for the SLQ4A by using the U2000:
l J0
l J1
l J2
l C2


Table 6-61 lists the parameters specified for the optical interfaces of the SLQ4A.
Table 6-61 Parameters specified for the optical interfaces of the SLQ4A
Parameter Value
Line code NRZ

pattern

code
distance (km)


wavelength 1360 1356 1335 1580
range (nm)

Parameter Value

optical power
range (dBm)
Receiver -23 -28 -28 -28 -34

sensitivity
(dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the SLQ4A are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the SLQ4A at room temperature (25°C) is 17 W.
6.14 SL16

The SL16 is available in three functional versions, namely, N1, N2, and N3. The difference
services. The N1SL16 and N2SL16 are discontinued.
6.14.2 Application
and receive STM-16 optical signals. The SL16 converts the received optical signals into
electrical signals and sends the electrical signals to the cross-connect side. In addition, the SL16
converts the electrical signals sent from the cross-connect side into optical signals and transmits
the optical signals.
The SL16 receives and transmits 1xSTM-16 optical signals and processes overhead bytes.


The SL16 consists of the O/E converting module, MUX/DEMUX module, SDH overhead
processing module, logic and control module, power module.
6.14.5 Front Panel
The front panel of the SL16 has indicators, interfaces, a bar code, a laser safety class label, and
an APD alarm label.
6.14.6 Valid Slots
The slots valid for the SL16 vary with the cross-connect capacity of the subrack.
6.14.7 Feature Code

The SL16 is available in three functional versions, namely, N1, N2, and N3. The difference
services. The N1SL16 and N2SL16 are discontinued.
Item Description
Functional The SL16 is available in three functional versions, namely, N1, N2, and
versions N3.
Differences l The N1SL16 does not support the TCM function or AU-3 services.
l The N2SL16 supports the TCM function and AU-3 services, but the
time.
l The N3SL16 supports the TCM function but does not support AU-3
services.
Substitution The N1SL16 and N2SL16 cannot be substituted with each other.
The N3SL16 supports the board version replacement function.
l The N3SL16 can substitute for the N1SL16.
l When the AU-3 services are not required, the N3SL16 can substitute
for the N2SL16.
After the N3SL16 substitutes for the N1SL16 or N2SL16, the
configuration and service status of the N3SL16 are the same as the
configuration and service status of the N1SL16 or N2SL16.

NOTE
In the case of the board of different versions, adhere to the following principles when configuring the MSP
or SNCP:
l You cannot configure the N1SL16 as the protection board if the working board is the N2SL16 or
N3SL16 on which the TCM function is enabled. Otherwise, the services are interrupted when a
switching operation is performed.
l You cannot configure the N1SL16 or N3SL16 as the protection board if the working board is the
N2SL16 on which the AU-3 services are configured. Otherwise, the services are interrupted when a
switching operation is performed.
6.14.2 Application
and receive STM-16 optical signals. The SL16 converts the received optical signals into
electrical signals and sends the electrical signals to the cross-connect side. In addition, the SL16
NE1
NE2 NE4
NE3
Service flow
Line board

The SL16 receives and transmits 1xSTM-16 optical signals and processes overhead bytes.
Function and SL16

Feature

Function and SL16

Feature
Specifications l Supports different types of standard optical interfaces, namely, the

of the optical L-16.2, L-16.2Je, V-16.2Je (with the booster amplifier (BA)), and
interface U-16.2Je (with the BA and pre-amplifier (PA)). The characteristics of
the optical interface of the L-16.2 type comply with ITU-T G.957 and
ITU-T G.692. The characteristics of the optical interfaces of the
L-16.2Je, V-16.2Je (with the BA), and U-16.2Je (with the BA and PA)
types comply with the standards defined by Huawei.
l Supports the output of the standard wavelengths that comply with ITU-
T G.692. The U-16.2Je optical interface can be directly connected to
the dense wavelength division multiplexing (DWDM) equipment.
Specifications l Supports the detection and query of the information about the optical
of the optical module.
Service l Supports the VC-12 services, VC-3 services, VC-4 services, VC-4-4c
processing concatenation services, VC-4-8c concatenation services, and
l The N2SL16 supports the AU-3 services.

overheads.
events
Specifications The N2SL16/N3SL16 board supports the setting and query of the REG
of the REG working mode.
schemes SNCP, SNCMP, and SNCTP.
l Supports the fiber-shared MSP and SNCP and processes two sets of K
bytes. One SL16 supports a maximum of two MSP protection rings.

Function and SL16

Feature

features l The N1SL16 supports inloops on VC-4 paths. The N3SL16 board
supports inloops and outloops on paths.
services.
l The N2SL16 and N3SL16 support the TCM function.
l The N2SL16/N3SL16 board supports the TCM function.
l The N3SL16 board supports the PRBS function.

The SL16 consists of the O/E converting module, MUX/DEMUX module, SDH overhead
processing module, logic and control module, power module.
Figure 6-49 shows the functional block diagram of the SL16.

Backplane
PLL unit
K1 and K2
O/E
2.488 SPI 2.488 DEMUX 16x155 unit
Gbit/s E/O Gbit/s Mbit/s High-speed
bus Cross-connect
. .
. .

2.488 2.488 MUX 16x155 bus Cross-connect
O/E
Gbit/s SPI Gbit/s Mbit/s unit B
E/O DCC
SCC unit
MUX/ SDH overhead
O/E processing module
converting DEMUX
module
LOS Logic and unit

module Fuse +3.3 V
+3.3 V backup power
termination

HPT: higher order path termination IIC: inter-integrated circuit -

MUX/DEMUX Module

This module includes the RST, MST, MSA, and HPT sub-modules. This module provides the
l RST sub-module
– In the receive direction, the RST sub-module terminates the RSOH. That is, the RST
sub-module detects the frame alignment bytes (A1 and A2), descrambles all the bytes
except the first line of the RSOH, restores and checks the J0 byte, and checks the B1
byte.
l MST sub-module
– In the receive direction, the MST sub-module terminates the MSOH. That is, the MST
sub-module generates the MS_AIS alarm and detects the MS_RDI alarm after detecting
the K2 byte, and detects the MS_REI alarm and generates the B2_EXC alarm after
checking the B2 byte.
writes the B2 byte.
l MSA sub-module
– In the receive direction, the MSA sub-module de-interleaves the AUG, divides an AUG
into N AU-4s, detects the AU_LOP alarm and the AU_AIS alarm, and performs pointer
justifications.
l HPT sub-module
– In the receive direction, the HPT sub-module terminates the POH. That is, the HPT sub-
module detects the HP_REI alarm after checking the B3 byte, generates the HP_TIM

alarm and the HP_SLM alarm and detects the HP_RDI alarm after detecting the J1 and
C2 bytes, and generates the HP_UNEQ alarm after detecting the C2 byte.

l Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when
the CXL is not in position.
units.
Power Module
require.
6.14.5 Front Panel

The front panel of the SL16 has indicators, interfaces, a bar code, a laser safety class label, and
an APD alarm label.

Figure 6-50 shows the appearance of the front panel of the SL16.

Figure 6-50 Front panel of the SL16
SL16
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
! APD
Receiver
MAX:-9dBm
OUT
IN
SL16
Indicators
Interfaces
The front panel of the SL16 has one optical interface. Table 6-64 describes the types and usage
of the optical interfaces of the SL16.


6.14.6 Valid Slots

The slots valid for the SL16 vary with the cross-connect capacity of the subrack.
NOTE
l Slot bandwidth
l Board version
The slots valid for the SL16 are as follows:

l When the cross-connect capacity is 20 Gbit/s, the SL16 can be installed in slots 7, 8, 11,
and 12.
l When the cross-connect capacity is 60 Gbit/s, the SL16 can be installed in slots 5–8 and
11–13.
6.14.7 Feature Code

Table 6-65 describes the relationship between the feature code of the SL16 and the type of
optical interface
Board Feature Code Type of Optical
Interface
SSN1SL1600, SSN3SL1600 00 Fixed-wavelength

optical interface
SSN1SL1601, SSN2SL1601, and SSN3SL1601 01 L-16.2
SSN1SL1602, SSN2SL1602, and SSN3SL1602 02 L-16.2Je
SSN1SL1603, SSN2SL1603, and SSN3SL1603 03 V-16.2Je
SSN1SL1604, SSN2SL1604, and SSN3SL1604 04 U-16.2


l J0
l J1
l J2
l C2


Parameter Value

rate
Line code NRZ

pattern
Application L-16.2 L-16.2Je V-16.2Je (BA) U-16.2Je (BA+PA)

code
Transmissio 50 to 80 80 to 100 105 to 140 145 to 170

n distance
(km)
Type of fiber Single- Single- Single-mode LC Single-mode LC

mode LC mode LC
Operating 1500 to 1530 to 1530 to 1565 1550.12

wavelength 1580 1560
range (nm)
Launched -2 to +3 5 to 7 -2 to +3 13 to 15 -2 to +3 15 to 18
optical (without (with the (without (with the
power range the BA) BA) the BA BA)
(dBm) or PA)
Receiver -28 -28 -28 -28 -32 (with

sensitivity (without the PA)
(dBm) the PA
or BA)

Parameter Value
Minimum -9 -9 -9 -9 -10 (with

overload (without the PA)
(dBm) the PA
or BA)
Dispersion 1200 to 2000 2800 3400

tolerance (ps/ 1600
nm)
Minimum 8.2 8.2 8.2 8.2

extinction
ratio (dB)
Note: The optical interface of the Le-16.2 type is the same as the optical interface of the
L-16.2Je type.
The launched optical power of the optical interface of the V-16.2Je type is measured when
the BA is added. The launched optical power of the optical interface of the U-16.2Je type is
measured when the BA and PA are added. When no amplifier is added, the launched optical
power of the optical interfaces of the V-16.2Je and U-16.2Je types ranges from -2 dBm to 3
dBm.
Table 6-67 lists the parameters specified for the colored optical interfaces of the N3SL16.
Table 6-67 Parameters specified for the colored optical interfaces of the N3SL16
Parameter Value
DWDM
Dispersion-limited distance (km) 170 640
Launched optical power range (dBm) -2 to +3 -5 to -1
Receiver sensitivity (dBm) -28 -28
Minimum overload (dBm) -9 -9
Maximum allowed dispersion (ps/ 3400 10880

nm)
Minimum extinction ratio (dB) 8.2 10
Central frequency deviation (GHz) ±20 ±20
Minimum side mode suppression 30 35

ratio (dB)
Maximum -20 dB spectral width (nm) 0.4 0.2

Parameter Value
DWDM
Maximum optical path penalty (dB) 2 2
Optical signal-to-noise ratio (dB) Without the FEC: 20 Without the FEC: 20
Laser Safety Class

The mechanical specifications of the SL16 are as follows:
l Weight (kg): 1.1
Power Consumption
The maximum power consumption of the N1SL16 and N2SL16 at room temperature (25°C) is
19 W.
6.15 SL16A
technical specifications of the SL16A (1xSTM-16 optical interface board). This topic also
describes how to configure and commission the SL16A.

The SL16A is available in the following functional versions: N3, N2, and N1. The N1SL16A
and N2SL16A are discontinued.
6.15.2 Application
The SL16A is a line board. The SL16A can be used on the OptiX OSN equipment series to
transmit and receive STM-16 optical signals. The SL16A converts the received optical signals
SL16A converts the electrical signals sent from the cross-connect side into optical signals and
The SL16A receives and transmits 1xSTM-16 optical signals, processes overhead bytes, and
performs the MSP.
The N1SL16A/N2SL16A/N3SL16A consists of the O/E converting module, MUX/DEMUX
module, SDH overhead processing module, logic and control module, and power module.
6.15.5 Front Panel

The front panel of the SL16A has indicators, interfaces, a bar code, a laser safety class label,
and an APD alarm label.
The SL16A does not have any jumpers or DIP switches that are used for board settings.
6.15.7 Valid Slots
The SL16A must be installed in a valid slot in the subrack. Otherwise, the SL16A fails to work
normally.
6.15.8 Feature Code
This topic lists the alarms that may occur when the board operates.
This topic lists the performance events that may occur when the board operates.

The SL16A is available in the following functional versions: N3, N2, and N1. The N1SL16A
and N2SL16A are discontinued.
Table 6-68 describes the versions of the SL16A.

Item Description
Functional versions The SL16A is available in the following functional versions: N3, N2,
and N1. The N1SL16A and N2SL16A are discontinued.

Item Description
Differences l The N1SL16A does not support the TCM function or AU-3
services.
l The N2SL16A supports the TCM function and AU-3 services, but
same time.
l The N3SL16A supports the TCM function but does not support
AU-3 services.
Substitution l The N1SL16A and N2SL16A cannot be substituted with each

other.
l The N3SL16A supports the board version replacement function.
– The N3SL16A can substitute for the N1SL16A.
– When the AU-3 services are not configured, the N3SL16A can
substitute for the N2SL16A.
l After the N3SL16A substitutes for the N1SL16A or N2SL16A,
the configuration and service status of the N3SL16A are the same
as the configuration and service status of the N1SL16A or
N2SL16A.
NOTE
In the case of the board of different versions, adhere to the following principles when configuring the MSP
or SNCP:
l You cannot configure the N1SL16A as the protection board if the working board is the N2SL16A or
N3SL16A on which only the TCM function is enabled. Otherwise, the services are interrupted when
a switching operation is performed.
l You cannot configure the N3SL16A or N1SL16A as the protection board if the working board is the
N2SL16A on which only the AU-3 services are configured. Otherwise, the services are interrupted
when a switching operation is performed.
6.15.2 Application
The SL16A is a line board. The SL16A can be used on the OptiX OSN equipment series to
transmit and receive STM-16 optical signals. The SL16A converts the received optical signals
SL16A converts the electrical signals sent from the cross-connect side into optical signals and

NE1
NE2 NE4
NE3
Service flow
Line board

The SL16A receives and transmits 1xSTM-16 optical signals, processes overhead bytes, and
performs the MSP.
Table 6-69 describes the functions and features of the SL16A.

Function and SL16A
Feature
Specifications of the Supports different types of standard optical interfaces, namely, the
optical interface I-16, S-16.1, L-16.1, and L-16.2. The characteristics of the optical
interfaces comply with ITU-T G.957 and ITU-T G.692.
l Supports the usage and monitoring of the SFP optical module,
which facilitates the maintenance and upgrading of the optical
module.
Service processing l Supports the VC-12 services, VC-3 services, VC-4 services,
VC-4-4c concatenation services, VC-4-8c concatenation
services, and VC-4-16c concatenation services.
l The N2SL16A supports the AU-3 services.

Function and SL16A

Feature

overheads.
Specifications of the The N2SL16A/N3SL16A board supports the setting and query of
REG the REG working mode.
Protection schemes l Supports the Two-fiber ring MSP.

l Supports the Four-fiber ring MSP.
l Supports the fiber-shared virtual trail protection.
l Supports the fiber-shared MSP and processes two sets of K bytes.
One SL16A supports a maximum of two MSP rings.
Maintenance features l Supports inloops and outloops at optical interfaces.

l The N1SL16A supports inloops on VC-4 paths. The N3SL16A
board supports inloops and outloops on VC-4 paths.
affect services.
l Supports the query of the manufacturing information of the
board.
l The N2SL16A/N3SL16A board supports the TCM function.
services.
l The N3SL16A board supports the PRBS function.

The N1SL16A/N2SL16A/N3SL16A consists of the O/E converting module, MUX/DEMUX
module, SDH overhead processing module, logic and control module, and power module.
Figure 6-52 shows the functional block diagram of the N1SL16A/N2SL16A/N3SL16A.

Figure 6-52 Functional block diagram of the N1SL16A/N2SL16A/N3SL16A

Backplane
PLL unit
K1 and K2
K1 and K2 Cross-connect
insertion/extraction
2.488 2.488 unit
DEMUX 16x155 High-speed
Gbit/s O/E Gbit/s Mbit/s
bus Cross-connect
SPI unit A
2.488 2.488 16x155 bus Cross-connect
Gbit/s Gbit/s MUX Mbit/s
E/O unit B
DCC
SCC unit
O/E MUX/ SDH overhead
converting DEMUX processing module
module

LOS Logic and unit

module Fuse +3.3 V
+3.3 V backup power
termination
HPT: higher order path termination - -

MUX/DEMUX Module

l RST sub-module
byte.

l MST sub-module
writes the B2 byte.
l MSA sub-module
justifications.
l HPT sub-module

units.
Power Module
require.
6.15.5 Front Panel

The front panel of the SL16A has indicators, interfaces, a bar code, a laser safety class label,
and an APD alarm label.


SL16A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
! APD
Receiver
MAX:-9dBm
OUT
IN
SL16A
Indicators

Interfaces

The SL16A does not have any jumpers or DIP switches that are used for board settings.
6.15.7 Valid Slots

The SL16A must be installed in a valid slot in the subrack. Otherwise, the SL16A fails to work
normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the SL16A vary with the cross-connect capacity of the subrack. The slots
valid for the SL16A are as follows:
l When the cross-connect capacity is 20 Gbit/s, the SL16A can be installed in slots 7, 8, 11,
and 12.
l When the cross-connect capacity is 60 Gbit/s, the SL16A can be installed in slots 5–8 and
11–13.
6.15.8 Feature Code

Table 6-71 describes the relationship between the feature code of the SL16A and the type of
optical interface.
SSN1SL16A01, 01 I-16
SSN2SL16A01,
SSN3SL16A01

SSN1SL16A02, 02 S-16.1
SSN2SL16A02,
SSN3SL16A02
SSN1SL16A03, 03 L-16.1
SSN2SL16A03,
SSN3SL16A03
SSN1SL16A04, 04 L-16.2
SSN2SL16A04,
SSN3SL16A04
SSN3SL16A06 06 I-16
SSN3SL16A07 07 S-16.1
SSN3SL16A08 08 L-16.1
SSN3SL16A09 09 L-16.2


is correct.
----End



TUG structure.
NOTE
----End

Switching.
----End

Boards.
----End

l J0
l J1
l J2
l C2


Troubleshooting
Table 6-72 lists the faults that occur on the SL16A frequently and the troubleshooting methods.
NOTE
The SL16A uses the SFP optical module. When the SL16A operates and an abnormal alarm occurs on the
optical interface, check whether the optical module is properly installed. To check whether the optical
module is properly installed, you can re-seat the optical module.
Table 6-72 Methods used to troubleshoot the faults that occur on the SL16A frequently
Cause
Service interruption l The optical fiber See Troubleshooting Service Interruptions.

or connector
becomes
abnormal.
l An incorrect
operation is
performed.
l The types or
settings of the
boards are
inconsistent.

becomes
abnormal.
l The equipment
becomes faulty.

configuration is
incorrect.
l The precision of
the external clock
source is very
low.


Cause

l The SNCP
switching fails.
l The clock
protection
switching fails.

the U2000.
l All the NEs in a
subnet become
unreachable to
the U2000.
l An NE becomes
unreachable to
the U2000
frequently.

occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the SL16A, see Replacing an SDH Board.

This topic lists the alarms that may occur when the board operates.
6.15.12.1 N1SL16A
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC

TEM_HA SPARE_PATH_ALM R_OOF
TF TEM_LA T_LOSEX
TU_AIS_VC3 TR_LOC TEST_STATUS
W_R_FAIL TU_LOP_VC12 TU_AIS_VC12
PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST TU_LOP_VC3
MOD_TYPE_MISMATCH PS PATCH_ERR
SWDL_PKG_NOBDSOFT
6.15.12.2 N2SL16A
ALM_AU3UNEQ AU_AIS AU_CMM
AU_LOP B1_EXC B1_SD
B2_EXC B2_SD B3_EXC

TC_DEG SPARE_PATH_ALM R_OOF
TC_LTC TC_EXC T_LOSEX
TC_RDI TC_ODI TC_INCAIS
TC_UNEQ TC_REI TC_OEI
TEST_STATUS TEM_HA TC_TIM
TU_AIS_VC12 TF TEM_LA
TU_LOP_VC3 TU_AIS_VC3 TR_LOC
PATCH_ERR W_R_FAIL TU_LOP_VC12
SWDL_PKG_NOBDSOFT PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST
MOD_TYPE_MISMATCH PS
6.15.12.3 N3SL16A

ALM_AU3UNEQ AU_LOP AU_AIS
AU_CMM B2_EXC B1_EXC
B1_SD B3_EXC_VC3 B2_SD
B3_EXC BD_STATUS B3_SD
B3_SD_VC3 BIP_SD BIP8_ECC
BIP_EXC C2_VCAIS CHIP_ABN
C2_PDI COMMUN_FAIL FPGA_ABN
CHIP_FAIL HP_LOM HP_RDI
FSELECT_STG HP_SLM HP_TIM
HP_REI IN_PWR_ABN J0_MM
HP_UNEQ LASER_SHUT LOOP_ALM
LASER_MOD_ERR LP_RDI_VC3 LP_REI_VC12
LP_RDI_VC12 LP_SLM_VC12 LP_SLM_VC3
LP_REI_VC3 LP_TIM_VC3 LP_UNEQ_VC12
LP_TIM_VC12 LSR_COOL_ALM LSR_NO_FITED
LP_UNEQ_VC3 MS_AIS MS_RDI
LSR_WILL_DIE NO_BD_SOFT OH_LOOP
MS_REI R_LOS POWER_ABNORMAL
OUT_PWR_ABN SPARE_PATH_ALM R_LOC
R_LOF TC_EXC T_LOSEX
SLAVE_WORKING TC_ODI TC_INCAIS
TC_DEG TC_REI TC_OEI
TC_LTC TEM_HA TC_TIM
TC_RDI TEST_STATUS TEM_LA
TC_UNEQ TU_AIS_VC12 TF
TEMP_OVER TU_LOP_VC3 TU_AIS_VC3
TR_LOC PATCH_NOT_CONFIRM W_R_FAIL
TU_LOP_VC12 SWDL_PKG_NOBDSOFT PATCHFILE_NOTEXIST
PATCH_ERR TIME_NOT_SUPPORT PS


This topic lists the performance events that may occur when the board operates.
6.15.13.1 N1SL16A
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS
6.15.13.2 N2SL16A
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES

RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS
6.15.13.3 N3SL16A
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS



Parameter Value

rate
Application I-16 S-16.1 L-16.1 L-16.2

code
distance (km)
Type of fiber Single-mode Single-mode Single-mode LC Single-mode LC

LC LC

wavelength
range (nm)
Launched -10 to -3 -5 to 0 -2 to +3 -2 to +3
optical power
range (dBm)
Receiver -18 -18 -27 -28

sensitivity
(dBm)
Minimum -3 0 -9 -9
overload
(dBm)

tolerance (ps/
nm)
Minimum 8.2 8.2 8.2 8.2

extinction
ratio (dB)
Laser Safety Class


l Weight of the N1SL16A (kg): 0.6

Power Consumption
The maximum power consumption of the N1SL16A at room temperature (25°C) is 20 W.
6.16 SF16
technical specifications of the SF16 (1xSTM-16 optical interface board with the out-band FEC
function).

The SF16 is available in one functional version, namely, N1.
6.16.2 Application
The SF16 is a line board. The SF16 can be used on the OptiX OSN equipment series to transmit
and receive STM-16 optical signals. The SF16 converts the received optical signals into
electrical signals and sends the electrical signals to the cross-connect side. In addition, the SF16
The SF16 receives and transmits 1xOTU1 optical signals (2.666 Gbit/s with the FEC function)
and processes overhead bytes.
The SF16 consists of the O/E converting module, MUX/DEMUX module, FEC module, SDH
overhead processing module, logic and control module, and power module.
6.16.5 Front Panel
The front panel of the SF16 has indicators, interfaces, a bar code, and a laser safety class label.
6.16.6 Valid Slots
The slots valid for the SF16 vary with the cross-connect capacity of the subrack.
6.16.7 Feature Code
The feature code of the SF16 indicates the type of optical interface.
You can set the parameters for the SF16 by using the U2000.
The technical specifications of the SF16 include the parameters specified for optical interfaces,

The SF16 is available in one functional version, namely, N1.

6.16.2 Application
The SF16 is a line board. The SF16 can be used on the OptiX OSN equipment series to transmit
and receive STM-16 optical signals. The SF16 converts the received optical signals into
electrical signals and sends the electrical signals to the cross-connect side. In addition, the SF16
NE1
NE2 NE4
NE3
Service flow
Line board

The SF16 receives and transmits 1xOTU1 optical signals (2.666 Gbit/s with the FEC function)
and processes overhead bytes.
Table 6-74 provides the functions and features of the SF16.
Table 6-74 Functions and features of the SF16
Function and SF16

Feature
Basic functions l Receives and transmits 1xOTU1 optical signals (2.666 Gbit/s with the
FEC function).
l Supports the enabling or disabling of the FEC function.
Specifications l Supports different types of standard optical interfaces, namely, the

of the optical Ve-16.2c, Ve-16.2d, and Ve-16.2f. The characteristics of the optical
interface interfaces comply with the standards defined by Huawei.
l Supports the output of the standard wavelengths that comply with ITU-
T G.692 and can be directly connected to the DWDM equipment.

Function and SF16

Feature
Specifications l Supports the detection and query of the information about the optical
of the optical module.
module l Provides the ALS function. The optical interface supports the setting of
the on/off state of a laser.
Service l Supports the VC-12 services, VC-3 services, VC-4 services, VC-4-4c
processing concatenation services, VC-4-8c concatenation services, and VC-4-16c
concatenation services.
l Encapsulates and encodes the signals with the FEC function, and
processes overhead bytes, which comply with ITU-T G.709.
Overhead l Supports the processing of the OTU, ODU, and OPU overhead bytes,
processing performance monitoring, and alarm detection, which comply with ITU-
T G.709.
l Processes the section overheads of the STM-16 signals.
overheads.
Alarms and l Reports various alarms and performance events.

performance l Supports the alarms and performance events that are related to the OTU
events layer, ODU layer, OPU layer, and FEC function.
Specifications Does not support the REG.

of the REG
l Supports the fiber-shared MSP and SNCP and processes two sets of K
bytes. One SF16 supports a maximum of two MSP protection rings.

features l Supports inloops on VC-4 paths.
services.

The SF16 consists of the O/E converting module, MUX/DEMUX module, FEC module, SDH
overhead processing module, logic and control module, and power module.

Figure 6-55 shows the functional block diagram of the SF16.
Figure 6-55 Functional block diagram of the SF16

155 MHz Reference clock Cross-connect
155 MHz PLL 155 MHz PLL
unit
K1 and K2 insertion/
2.666 extraction K1 and K2
2.666 16x166 16x155 Cross-connect
Gbit/s Gbit/s DEMUX Mbit/s Mbit/s unit
O/E
High-speed
S bus Cross-connect
P FEC RST MST MSA HPT
I 2.666 unit
2.666 16x166 16x155 High-speed
Gbit/s Gbit/s Mbit/s Mbit/s bus Cross-connect
E/O MUX unit
DCC
SCC unit
SDH overhead processing
module
166 MHz PLL Frame header Cross-connect

IIC unit
Logic and
LOS Communication
Laser shutdown control module SCC unit
+3.3 V DC/DC Fuse -48 V/-60 V

converter -48 V/-60 V
DC/DC
converter Fuse
+3.3 V backup
power
termination
HPT: higher order path termination IIC: inter-integrated circuit -
The functional modules are described as follows:

MUX/DEMUX Module
FEC Module
l In the downstream direction, the FEC encoding and decoding module receives 2.488 Gbit/
s SDH signals, which are sent by the SDH overhead processing module. After frame
searching, FEC encoding, data packet encapsulation, and scrambling, the 2.488 Gbit/s SDH
signals are converted into 2.666 Gbit/s signals and then transmitted to the MUX module.

l In the upstream direction, the reverse process is performed. The FEC encoding and
decoding module receives the 2.666 Gbit/s signals from the DEMUX module. After frame
searching, FEC encoding, data packets encapsulation, and scrambling in the FEC module,
the 2.488 Gbit/s signals are recovered and then transmitted to the SDH overhead processing
module. The frame format of the 2.666 Gbit/s signals complies with ITU G.709.
l The FEC processing module is connected to the logic and control module through a CPU
bus. The CPU controls the working modes of the FEC module by configuring the internal
register. The working mode can be the regenerator mode, namely, REG mode. The CPU
can monitor the performance through the internal register.

l RST sub-module
byte.
l MST sub-module
writes the B2 byte.
l MSA sub-module
justifications.
l HPT sub-module


units.
Power Module
require.
6.16.5 Front Panel

The front panel of the SF16 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 6-56 shows the appearance of the front panel of the SF16.

Figure 6-56 Front panel of the SF16
SF16
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT
IN
SF16
Indicators
Interfaces
The front panel of the SF16 has one optical interface. Table 6-75 describes the types and usage
of the optical interfaces of the SF16.

NOTE
The SF16 uses the unswappable optical module.
Table 6-75 Optical interfaces of the SF16

Interface
6.16.6 Valid Slots

The slots valid for the SF16 vary with the cross-connect capacity of the subrack.
NOTE
l Slot bandwidth
l Board version
The slots valid for the SF16 are as follows:

l When the cross-connect capacity is 20 Gbit/s, the SF16 can be installed in slots 7, 8, 11,
and 12.
l When the cross-connect capacity is 60 Gbit/s, the SF16 can be installed in slots 5–8 and
11–13.
6.16.7 Feature Code

The feature code of the SF16 indicates the type of optical interface.
Table 6-76 provides the relationship between the feature code of the SF16 and the type of optical
interface.
Table 6-76 Relationship between the feature code of the SF16 and the type of optical interface
SSN1SF1600 00 Colored optical interface
SSN1SF1601 01 Ue-16.2c/Ue-16.2d/Ue-16.2f

You can set the parameters for the SF16 by using the U2000.
You can set the following parameters for the SF16 by using the U2000:

l J0
l J1
l J2
l C2

The technical specifications of the SF16 include the parameters specified for optical interfaces,

Table 6-77 lists the parameters specified for the optical interfaces of the SF16.
Table 6-77 Parameters specified for the optical interfaces of the SF16
Parameter Value
Nominal bit rate 2666057.143 kbit/s
Processing capability 1xSTM-16 standard services or concatenation services
Application codea Ue-16.2c Ue-16.2d Ue-16.2f
FEC + BA (14) + FEC + BA (17) + FEC + BA (17) + RA + PA

PA PA
Operating 1550.12
wavelength range
(nm)
Launched optical -5 to -1 -5 to -1 -5 to -1
power range (dBm)b
Launched optical 13 to 15 13 to 15 15 to 18
power range (dBm)c
Receiver sensitivity -27.5 -27.5 -27.5

(dBm)b
Receiver sensitivity -37 -37 -42

(dBm)d
Minimum overload -10 -10 -10

(dBm)d
Minimum extinction 10 10 10
ratio (dB)b

Parameter Value
a: The numbers in the brackets indicate the corresponding parameter values. For example,
"BA (14)" indicates that the optical power amplified by the BA is 14 dBm. "FEC + BA + PA
+ RA" indicates that the specifications of the optical interface are measured when the FEC,
BA, PA, and Raman amplifier are used.
b: The parameter values are applicable only to the optical modules. The parameter values of
the amplifier are not provided.
c: The parameter values are applicable to the BA.
d: The parameter values are applicable to the PA.
Table 6-78 lists the parameters specified for the colored optical interfaces of the SF16.
Table 6-78 Parameters specified for the colored optical interfaces of the SF16
Parameter Value
DWDM
Nominal bit rate 2666057.143 kbit/s
Dispersion-limited distance (km) 640
Launched optical power range (dBm) -5 to -1
Receiver sensitivity (dBm) -28
Minimum overload (dBm) -9
Maximum allowed dispersion (ps/nm) 10880
Minimum extinction ratio (dB) 10
Central frequency deviation (GHz) ±20
Minimum side mode suppression ratio 35

(dB)
Maximum -20 dB spectral width (nm) 0.2
Maximum optical path penalty (dB) 2
Optical signal-to-noise ratio (dB) With the FEC: 16

Without the FEC: 21
Laser Safety Class


The mechanical specifications of the SF16 are as follows:
l Weight (kg): 1.1
Power Consumption
The maximum power consumption of the SF16 at room temperature (25°C) is 26 W.
6.17 SLQ41
technical specifications of the SLQ41 (4xSTM-4/STM-1 optical interface board). This topic also
describes how to configure and commission the SLQ41.

The SLQ41 is available in one functional version, namely, N3. The SLQ41 supports the auto-
sensing of optical interfaces.
6.17.2 Application
The SLQ41 is a line board. The SLQ41 can be used on the OptiX OSN equipment series to
transmit and receive STM-1/STM-4 optical signals. The SLQ41 converts the received optical
signals into electrical signals and sends the electrical signals to the cross-connect side. In
addition, the SLQ41 converts the electrical signals sent from the cross-connect side into optical
signals and transmits the optical signals.
The SLQ41 transmits and receives STM-1 or STM-4 optical signals, performs O/E conversion
for the STM-1 or STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm
signals on the line.
6.17.5 Front Panel
The SLQ41 does not have any jumpers or DIP switches that are used for board settings.
6.17.7 Valid Slots
The SLQ41 must be installed in a valid slot in the subrack. Otherwise, the SLQ41 cannot work
normally.
6.17.8 Feature Code



The SLQ41 is available in one functional version, namely, N3. The SLQ41 supports the auto-
sensing of optical interfaces.
6.17.2 Application
The SLQ41 is a line board. The SLQ41 can be used on the OptiX OSN equipment series to
transmit and receive STM-1/STM-4 optical signals. The SLQ41 converts the received optical
signals into electrical signals and sends the electrical signals to the cross-connect side. In
addition, the SLQ41 converts the electrical signals sent from the cross-connect side into optical
signals and transmits the optical signals.
NE1
NE2 NE4
NE3
Service flow
Line board


The SLQ41 transmits and receives STM-1 or STM-4 optical signals, performs O/E conversion
for the STM-1 or STM-4 optical signals, extracts and inserts overhead bytes, and generates alarm
signals on the line.

Function and SLQ41
Feature
Basic functions Transmits and receives 4xSTM-1 or 4xSTM-4 optical signals.
Specifications of the The STM-1 optical module or STM-4 optical module can be used.
optical interface l When the STM-1 optical module is used, the SLQ41 supports
different types of standard optical interfaces, namely, the I-1,
S-1.1, L-1.1, L-1.2, and Ve-1.2. The characteristics of the optical
interfaces of the I-1, S-1.1, L-1.1, and L-1.2 types comply with
ITU-T G.957. The characteristics of the optical interface of the
Ve-1.2 type comply with the standards defined by Huawei.
l When the STM-4 optical module is used, the SLQ41 supports
different types of standard optical interfaces, namely, the I-4,
S-4.1, L-4.1, L-4.2, and Ve-4.2. The characteristics of the optical
interfaces of the I-4, S-4.1, L-4.1, and L-4.2 types comply with
ITU-T G.957. The characteristics of the optical interface of the
Ve-4.2 type comply with the standards defined by Huawei.
l Supports the usage and detection of the SFP optical module,
which facilitates the maintenance and upgrading of the optical
module.
l The SLQ41 supports the single-fiber bidirectional optical
Service processing l When the STM-1 optical module is used, the SLQ41 supports the
VC-12 services, VC-3 services, and VC-4 services.
l When the STM-4 optical module is used, the SLQ41 supports the
VC-12 services, VC-3 services, VC-4 services, and VC-4-4c
concatenation services.

Function and SLQ41

Feature
Overhead processing l Processes the section overheads of the STM-1 signals or STM-4
signals.
overheads.
Protection schemes l Supports the Two-fiber ring MSP.

l Supports the Four-fiber ring MSP.

affect services.
services.

This topic describes the working principle and signal flow of the SLQ41 by describing how to
process STM-1/STM-4 signals.


Backplane
155 MHz Reference clock Cross-connect
PLL unit
K1 and K2
O/E CDR insertion/extraction K1 and K2 Cross-connect
STM-1/ SPI unit
STIM-4 E/O High-speed
bus Cross-connect
....
....
unit A
bus Cross-connect
STM-1/ O/E CDR unit B
SPI DCC
STIM-4 E/O SCC unit
SDH overhead
module
LOS Logic and unit
control module Communication SCC unit
Laser shutdown
module Fuse +3.3 V
+3.3 V backup power
termination

CDR Module

l RST sub-module

l MST sub-module
writes the B2 byte.
l MSA sub-module
l HPT sub-module

units.
Power Module
require.
6.17.5 Front Panel



Figure 6-59 shows the appearance of the front panel of the SLQ41.
Figure 6-59 Front panel of the SLQ41
SLQ41
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
SLQ41
Indicators

Interfaces
The front panel of the SLQ41 has four optical interfaces. Table 6-80 describes the types and
usage of the optical interfaces of the SLQ41.

The SLQ41 does not have any jumpers or DIP switches that are used for board settings.
6.17.7 Valid Slots

The SLQ41 must be installed in a valid slot in the subrack. Otherwise, the SLQ41 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
l When the cross-connect capacity is 20 Gbit/s, the slots valid for the SLQ41 are as follows:
– The SLQ41 can be installed in slots 5 and 6. In this case, one optical interface can be
configured.
– The SLQ41 can be installed in slots 7, 8, 11, and 12. In this case, one to four optical
– The SLQ41 can be installed in slot 13. In this case, one or two optical interfaces can be
configured.
11–13. In this case, one to four optical interfaces can be configured.
6.17.8 Feature Code

Table 6-81 provides the relationship between the feature code of the SLQ41 and the type of
optical interface.

SSN3SLQ414 14 I-4
SSN3SLQ410 10 S-4.1
SSN3SLQ411 11 L-4.1
SSN3SLQ412 12 L-4.2
SSN3SLQ413 13 Ve-4.2
SSN3SLQ114 14 I-1
SSN3SLQ110 10 S-1.1
SSN3SLQ111 11 L-1.1
SSN3SLQ112 12 L-1.2
SSN3SLQ113 13 Ve-1.2


is correct.
----End


TUG structure.
NOTE
----End

Switching.
----End

Boards.
----End

l J0
l J1
l J2
l C2


Troubleshooting
Table 6-82 lists the faults that occur on the SLQ41 frequently and the troubleshooting methods.
NOTE
The SLQ41 uses the SFP optical module. When the SLQ41 operates and an abnormal alarm occurs on the
optical interface, check whether the optical module is properly installed. To check whether the optical
module is properly installed, you can re-seat the optical module.
Table 6-82 Methods used to troubleshoot the faults that occur on the SLQ41 frequently
Cause
Service interruption l The optical fiber See Troubleshooting Service Interruptions.

or connector
becomes
abnormal.
l An incorrect
operation is
performed.
l The types or
settings of the
boards are
inconsistent.

becomes
abnormal.
l The equipment
becomes faulty.

configuration is
incorrect.
l The precision of
the external clock
source is very
low.


Cause

l The SNCP
switching fails.
l The clock
protection
switching fails.

the U2000.
l All the NEs in a
subnet become
unreachable to
the U2000.
l An NE becomes
unreachable to
the U2000
frequently.

occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the SLQ41, see Replacing an SDH Board.

6.17.12.1 N3SLQ41
ALM_AU3UNEQ AU_AIS AU_LOP

B1_EXC B1_SD B2_EXC
B2_SD B3_EXC B3_EXC_VC3
B3_SD B3_SD_VC3 BD_STATUS
C2_PDI BIP_EXC BIP_SD
COMMUN_FAIL C2_VCAIS CHIP_ABN
HP_LOM FPGA_ABN FSELECT_STG
HP_SLM HP_RDI HP_REI
IN_PWR_ABN HP_TIM HP_UNEQ
LASER_SHUT J0_MM LASER_MOD_ERR
LP_SLM_VC3 LOOP_ALM LP_SLM_VC12
LP_UNEQ_VC12 LP_TIM_VC12 LP_TIM_VC3
LSR_NO_FITED LP_UNEQ_VC3 LSR_COOL_ALM
MS_RDI LSR_WILL_DIE MS_AIS
PATCH_ERR MS_REI NO_BD_SOFT
R_LOF OH_LOOP OUT_PWR_ABN
T_LOSEX PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST
TC_INCAIS POWER_ABNORMAL PS
TC_OEI R_LOS SLAVE_WORKING
TC_TIM TC_DEG TC_EXC
TEM_LA TC_LTC TC_ODI
TF TC_RDI TC_REI
TU_AIS_VC12 TC_UNEQ TEM_HA
TU_LOP_VC3 TEMP_OVER TEST_STATUS
LP_RDI_VC3 SPARE_PATH_ALM TR_LOC
SWDL_PKG_NOBD- TU_AIS_VC3 TU_LOP_VC12

SOFT
R_OOF R_LOC LP_RDI_VC12
BIP8_ECC LP_REI_VC12 LP_REI_VC3
AU_CMM MOD_TYPE_MISMATCH LSR_INVALID
CHIP_FAIL W_R_FAIL TIME_NOT_SUPPORT


6.17.13.1 N3SLQ41
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
RPLMAX RPLMIN RSBBE
RSCSES RSES RSOFS
RSOOF RSSES RSUAS


The SLQ41 supports the STM-1 and STM-4 optical modules.
Table 6-83 lists the parameters specified for the optical interfaces of the SLQ41 when the STM-1
optical module is used.

Parameter Value
Line code NRZ

pattern

code
distance (km)
Type of fiber Single-mode LC Single-mode LC Single-mode LC Single-mode LC Single-mode LC
wavelength
range (nm)

optical power
range (dBm)
Receiver -23 -28 -34 -34 -34

sensitivity
(dBm)
Minimum -8 -8 -10 -10 -10

overload (dBm)
Minimum 8.2 8.2 10 10 10

extinction ratio
(dB)
Table 6-84 lists the parameters specified for the optical interfaces of the SLQ41 when the STM-4
optical module is used.
Table 6-84 Parameters specified for the optical interfaces of the SLQ41 when the STM-4 optical
module is used
Parameter Value
distance (km)

Parameter Value

(nm)


optical power
(dBm)
Receiver -23 -28 -28 -28 -34

sensitivity (dBm)
Minimum -8 -8 -8 -8 -13
overload (dBm)
Minimum 8.2 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the SLQ41 are as follows:
l Weight (kg): 0.6
Power Consumption
The maximum power consumption of the SLQ41 at room temperature (25°C) is 12 W.
6.18 EU04

The EU04 is available in one functional version, namely, N1.
6.18.2 Application
The EU04 is an STM-1 electrical interface board. The EU04 can be used on the OptiX OSN
equipment series to transmit and receive signals for the STM-1 electrical processing board.

The EU04 receives and transmits 4xSTM-1 electrical signals. The EU04 must work with the
SEP.
The EU04 consists of the interface module, switch matrix module, and power module.
6.18.5 Front Panel
The front panel of the EU04 has interfaces and a bar code.
6.18.6 Valid Slots
The EU04 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the SEP.
The technical specifications of the EU04 include the parameters specified for electrical
interfaces, mechanical specifications, and power consumption.

6.18.2 Application

SEP.

Figure 6-60 shows the functional block diagram of the EU04 by describing how to process
1xSTM-1 signals.
Figure 6-60 Functional block diagram of the EU04

Backplane
Cross-connect board
STM-1 electrical
SEP
signal Interface Switch
TSB4/TSB8
module matrix
module TSB4/TSB8
STM-1 electrical SEP
signal
+3.3 V Power Fuse

+3.3 V power
module

Interface Module
The interface module receives and transmits the STM-1 electrical signals.
Switch Matrix Module

In the receive direction, the switch matrix module receives the signal sent from the interface
module and selects the output direction of the signal according to the TPS protection control
signal sent from the cross-connect board. When the TPS is not performed, the switch matrix
module transmits the signal to the SEP. When the TPS is performed, the switch matrix module
transmits the signal to the TSB4 or TSB8 for bridging.
In the transmit direction, the switch matrix module performs the reverse process.
Power Module
The power module provides all the modules of the EU04 with the required DC voltages.
6.18.5 Front Panel


Figure 6-61 shows the appearance of the front panel of the EU04.

Figure 6-61 Front panel of the EU04
EUO4
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
EUO4
Interfaces
The front panel of the EU04 has four pairs of electrical interfaces.
Table 6-85 describes the types and usage of the interfaces of the EU04.
Table 6-85 Interfaces of the EU04
IN1–IN4 SMB Receives the 1st to the 4th channels of STM-1

electrical signals.
OUT1–OUT4 SMB Transmits the 1st to the 4th channels of STM-1

electrical signals.

6.18.6 Valid Slots

The EU04 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the SEP.
Table 6-86 lists the slots valid for the SEP and the corresponding slots for the EU04.
Table 6-86 Slots valid for the SEP and the corresponding slots for the EU04
Slot Valid for the SEP Corresponding Slot for the EU04
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17

Parameters Specified for Electrical Interfaces

Table 6-87 lists the parameters specified for the electrical interfaces of the EU04.
Table 6-87 Parameters specified for the electrical interfaces of the EU04
Parameter Value
Line code pattern CMI
Signal bit rate at the output interface Complies with ITU-T G.703.
Allowed frequency deviation at the input

interface
Allowed attenuation at the input interface
The mechanical specifications of the EU04 are as follows:

l Weight (kg): 0.4

Power Consumption
The maximum power consumption of the EU04 at room temperature (25°C) is 6 W.
6.19 EU08

6.19.2 Application
SEP1.
6.19.5 Front Panel
6.19.6 Valid Slots
The slots valid for the EU08 vary with the cross-connect capacity of the subrack.

6.19.2 Application

SEP1.

Figure 6-62 shows the functional block diagram of the EU08 by describing how to process
1xSTM-1 signals.

Figure 6-62 Functional block diagram of the EU08

Backplane
Cross-connect board
STM-1 electrical
signal SEP
Interface Switch TSB8
matrix
module
module TSB8
STM-1 electrical SEP
signal
+3.3 V Power Fuse

+3.3 V power
module
Interface Module
The interface module receives and transmits the STM-1 electrical signals.

module transmits the signal to the SEP. When the TPS is performed, the switch matrix module
transmits the signal to the TSB8 for bridging.
Power Module
The power module provides all the modules of the EU08 with the required DC voltages.
6.19.5 Front Panel


Figure 6-63 shows the appearance of the front panel of the EU08.

Figure 6-63 Front panel of the EU08
EUO8
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
OUT5
IN5
OUT6
IN6
OUT7
IN7
OUT8
IN8
EUO8
Interfaces
The front panel of the EU08 has eight pairs of electrical interfaces.
Table 6-88 describes the types and usage of the interfaces of the EU08.
Table 6-88 Interfaces of the EU08

Interface
IN1–IN8 SMB Receives the 1st to the 8th channels of STM-1

electrical signals.
OUT1–OUT8 SMB Transmits the 1st to the 8th channels of STM-1

electrical signals.

6.19.6 Valid Slots

The slots valid for the EU08 vary with the cross-connect capacity of the subrack.
NOTE
l Slot bandwidth
l Board version
The slots valid for the EU08 are as follows:
l When the cross-connect capacity is 20 Gbit/s, the EU08 can be installed in slots 3, 15, and
17.
l When the cross-connect capacity is 60 Gbit/s, the EU08 can be installed in slots 1, 3, 15,
and 17.
Table 6-89 lists the slots valid for the SEP and the corresponding slots for the EU08.
Table 6-89 Slots valid for the SEP and the corresponding slots for the EU08
Slot Valid for the SEP Corresponding Slot for the EU08
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17


Table 6-90 lists the parameters specified for the electrical interfaces of the EU08.
Table 6-90 Parameters specified for the electrical interfaces of the EU08
Parameter Value
Signal bit rate at the Complies with ITU-T G.703.

output interface

Parameter Value
Allowed frequency
deviation at the input
interface
Allowed attenuation at
the input interface
Input jitter tolerance
The mechanical specifications of the EU08 are as follows:
l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the EU08 at room temperature (25°C) is 11 W.
6.20 OU08
technical specifications of the OU08 (8xSTM-1 optical/electrical interface board).

The OU08 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether the board supports the coexistence of optical modules
with electrical modules, the connector type for the optical interfaces and whether the optical
module is swappable.
6.20.2 Application
The OU08 is an STM-1 optical/electrical interface board. The OU08 can be used on the OptiX
OSN equipment series to transmit and receive signals for the STM-1 optical/electrical processing
board.
The OU08 receives and transmits 8xSTM-1 optical/electrical signals. The OU08 must work with
the SEP1.
The OU08 consists of the interface module and power module.
6.20.5 Front Panel
The front panel of the OU08 has interfaces and a bar code.
6.20.6 Valid Slots
The slots valid for the OU08 vary with the cross-connect capacity of the subrack. The OU08
works as the interface board of the SEP1.

The technical specifications of the OU08 include the parameters specified for optical interfaces,

The OU08 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether the board supports the coexistence of optical modules
with electrical modules, the connector type for the optical interfaces and whether the optical
module is swappable.
Table 6-91 describes the versions of the OU08.
Table 6-91 Versions of the OU08
Item Description
Functional The OU08 is available in two functional versions, namely, N1 and

versions N2.
Common points The working principle of the N1OU08 is the same as the working
principle of the N2OU08.
Differences The N1OU08 supports the coexistence of optical modules with

electrical modules, whereas the N2OU08 does not.
The optical interface of the N1OU08 uses the LC connector, whereas
the optical interface of the N2OU08 uses the SC connector.
The N1OU08 uses the swappable optical/electrical module, whereas
the N2OU08 does not use the swappable optical module.
Substitution None
6.20.2 Application
The OU08 is an STM-1 optical/electrical interface board. The OU08 can be used on the OptiX
OSN equipment series to transmit and receive signals for the STM-1 optical/electrical processing
board.

The OU08 receives and transmits 8xSTM-1 optical/electrical signals. The OU08 must work with
the SEP1.

The OU08 consists of the interface module and power module.
Figure 6-64 shows the functional block diagram of the OU08 by describing how to process
1xSTM-1 signals.

Figure 6-64 Functional block diagram of the OU08
Backplane
STM-1 optical/
electrical signal SEP
Interface
module
STM-1 optical/
SEP
electrical signal
+3.3 V Power Fuse

module +3.3 V power
Interface Module
In the receive direction, the interface module performs O/E conversion for the STM-1 signals
and transmits the signals to the SEP.
In the transmit direction, the interface module performs E/O conversion for the STM-1 signals
and transmits the signals to the optical/electrical interface.
NOTE
If the interface module uses electrical modules, no O/E conversion is performed in both the receive and
transmit directions.
Power Module
The power module provides all the modules of the OU08 with the required DC voltages.
6.20.5 Front Panel

The front panel of the OU08 has interfaces and a bar code.

Figure 6-65 shows the appearance of the front panel of the N1OU08.Figure 6-66 shows the
appearance of the front panel of the N2OU08.

Figure 6-65 Front panel of the N1OU08 with optical interfaces
OU08
OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
OUT5 IN5
OUT6 IN6
OUT7 IN7
OUT8 IN8
CLASS 1
LASER
PRODUCT
OU08

Figure 6-66 Front panel of the N2OU08
OU08
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
OUT5
IN5
OUT6
IN6
OUT7
IN7
OUT8
IN8
OU08
Interfaces
The front panel of the N1OU08 has eight optical/electrical interfaces. The front panel of the
N2OU08 has eight optical interfaces.
Table 6-92 describes the types and usage of the interfaces of the N1OU08. Table 6-93 describes
the types and usage of the interfaces of the N2OU08.
Table 6-92 Interfaces of the N1OU08

Interface
IN1–IN8 LC/SAA Receives the 1st to the 8th channels of STM-1

optical/electrical signals.


Interface
OUT1–OUT8 LC/SAA Transmits the 1st to the 8th channels of STM-1

optical/electrical signals.
Table 6-93 Interfaces of the N2OU08

Interface
IN1–IN8 SC Receives the 1st to the 8th channels of STM-1

optical signals.
OUT1–OUT8 SC Transmits the 1st to the 8th channels of STM-1

optical signals.
6.20.6 Valid Slots

The slots valid for the OU08 vary with the cross-connect capacity of the subrack. The OU08
works as the interface board of the SEP1.
NOTE
l Slot bandwidth
l Board version
l When the cross-connect capacity is 20 Gbit/s, the OU08 can be installed in slots 3, 15, and
17.
l When the cross-connect capacity is 60 Gbit/s, the OU08 can be installed in slots 1, 3, 15,
and 17.
Table 6-94 lists the slots valid for the SEP1 and the corresponding slots for the OU08.
Table 6-94 Slots valid for the SEP1 and the corresponding slots for the OU08
Slot Valid for the SEP1 Corresponding Slot for the OU08
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17


The technical specifications of the OU08 include the parameters specified for optical interfaces,

Table 6-95 lists the parameters specified for the optical interfaces of the OU08.
Table 6-95 Parameters specified for the optical interfaces of the OU08
Parameter Value
Application code S-1.1
Operating wavelength N1OU08: 1260-1360

range (nm) N2OU08: 1261-1360
Mean launched optical -15 to -8

power (dBm)

(dBm)

Table 6-96 lists the parameters specified for the electrical interfaces of the N1OU08.
Table 6-96 Parameters specified for the electrical interfaces of the N1OU08
Parameter Value
Type of interface SAA
Signal bit rate at the Complies with ITU-T G.703.

output port
Allowed frequency
deviation at the input
interface
Allowed attenuation at
the input interface

Parameter Value
Laser Safety Class

The mechanical specifications of the OU08 are as follows:
l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the OU08 at room temperature (25°C) is 6 W.

Hardware Description 7 PDH Boards
7 PDH Boards
About This Chapter
The PDH boards include the PDH service interface boards and PDH service processing boards,
to access and process E1/T1 signals, E3/T3 signals, E4/STM-1 electrical signals, and DDN
signals.
7.1 PD1
technical specifications of the PD1 (32xE1 service processing board).
7.2 PQ1
technical specifications of the PQ1 (63xE1 service processing board). This topic also describes
how to configure and commission the PQ1.
7.3 PQM
technical specifications of the PQM (63xE1/T1 service processing board). This topic also
describes how to configure and commission the PQM.
7.4 PL3
technical specifications of the PL3 (3xE3/T3 service processing board). This topic also describes
how to configure and commission the PL3.
7.5 PL3A
technical specifications of the PL3A (3xE3/T3 service processing board with the interfaces on
the front panel). This topic also describes how to configure and commission the PL3A.
7.6 PD3
technical specifications of the PD3 (6xE3/T3 service processing board).
7.7 PQ3
technical specifications of the PQ3 (12xE3/T3 service processing board).
7.8 DX1

7 PDH Boards Hardware Description
technical specifications of the DX1 (DDN service accessing and converging board). This topic
also describes how to configure and commission the DX1.
7.9 DXA
technical specifications of the DXA (DDN service converging and processing board).
7.10 SPQ4
technical specifications of the SPQ4 (4xE4/STM-1 electrical processing board). This topic also
describes how to configure and commission the SPQ4.
7.11 D12B
technical specifications of the D12B (32xE1/T1 access board).
7.12 D12S
technical specifications of the D12S (32xE1/T1 switching access board).
7.13 D75S
technical specifications of the D75S (32xE1 switching access board).
7.14 D34S
7.15 C34S
technical specifications of the C34S (3xE3/T3 switching access board).
7.16 MU04
technical specifications of the MU04 (4xE4/STM-1 electrical interface board).
7.17 DM12
technical specifications of the DM12 (DDN service interface board).
7.18 TSB4
technical specifications of the TSB4 (4-channel electrical interface protection switching board).
7.19 TSB8

7.1 PD1
technical specifications of the PD1 (32xE1 service processing board).

The PD1 is available in two functional versions, namely, R1 and R2. The difference between
the two versions is with regard to their functions. The R1PD1 is no longer manufactured.
7.1.2 Application
The PD1 is a PDH processing board. The PD1 can be used on the OptiX OSN equipment series
to add and drop PDH signals. To access and process 32xE1 signals, the PD1 must be used with
the interface board.
The PD1 processes E1 signals, processes overhead bytes, reports alarms and performance events,
provides maintenance features, and supports the TPS protection.
The PD1 consists of the PPI module, E1 mapping/demapping module, interface converting
module, logic and control module, DC/DC converter, and other modules.
7.1.5 Front Panel
The front panel of the PD1 has indicators.
7.1.6 Valid Slots
The PD1 can be installed in divided slots 5–7 and 19–21. The PD1 must be used with the D75S,
D12S, or D12B.
7.1.7 Feature Code
The feature code of the PD1 indicates the type of interface impedance.
The PD1 supports the 1:N TPS protection.
You can set the parameters for the PD1 by using the U2000.
The technical specifications of the PD1 include the parameters specified for electrical interfaces,

The PD1 is available in two functional versions, namely, R1 and R2. The difference between
the two versions is with regard to their functions. The R1PD1 is no longer manufactured.
Table 7-1 describes the versions of the PD1.

Table 7-1 Versions of the PD1

Item Description
Functional The PD1 is available in two functional versions, namely, R1 and R2.
versions
Differences l The R1PD1 does not support the E13 function.

l The R2PD1 supports the E13 function and the board version
replacement function.
Substitution l The R1PD1A can be replaced with the R2PD1A when the required
conditions are met.
l The R1PD1B can be replaced with the R2PD1B when the required
conditions are met.
7.1.2 Application
to add and drop PDH signals. To access and process 32xE1 signals, the PD1 must be used with
Figure 7-1 shows the application of the PDH processing boards. The PDH processing boards
add tributary signals to line signals and drops tributary signals to line signals.
Figure 7-1 Networking and application of the PDH processing boards
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The PD1 processes E1 signals, processes overhead bytes, reports alarms and performance events,

Table 7-2 provides the functions and features of the PD1.
Table 7-2 Functions and features of the PD1

Function PD1
and
Feature R1PD1 R2PD1
Basic Processes 32xE1 Processes 32xE1 signals.

functions signals.
Service l Accesses and l Accesses and processes 32xE1 electrical signals when
processing processes working with the interface board.
32xE1 l Supports the E13 function, which is used to converge
electrical E1 services into E3 services.
signals when
working with l Supports the extraction of the reference clock.
the interface
board.
l Supports the
extraction of
the reference
clock.
Overhead Supports the transparent transmission and termination of the path overheads at
processing the VC-12 level, such as the J2 byte.
performanc management and maintenance of the equipment.
e events
Maintenanc l Supports inloops and outloops at electrical interfaces.

e features l Supports warm resets and cold resets. The warm reset does not affect
services.
l Supports the query of the manufacturing information of the board
l The R1PD1 does not support the CRC function, but the R2PD1 supports
the CRC function.
Protection Supports the TPS protection when working with the electrical switching and
schemes bridging board. The protection relationship between the boards is as follows:
l When the working board is the R1PD1, the protection board can be the
R1PD1 or R2PD1.
l When the working board is the R2PD1, the protection board can be the
R2PD1.


The PD1 consists of the PPI module, E1 mapping/demapping module, interface converting
Figure 7-2 shows the functional block diagram of the PD1.
Figure 7-2 Functional block diagram of the PD1
2 MHz 155 MHz Reference Cross-connect unit

OSC PLL clock
E1 LIU 32x2 Mbit/s E1 155 Mbit/s High-

P Interface Cross-connect unit A
P mapping/ speed bus
converting
I demapping module
E1 32x2 Mbit/s module 155 Mbit/s High-
LIU Cross-connect unit B
speed bus
LOS Logic and Frame header Cross-connect unit

Outloop/Inloop control module Communication SCC Unit
control
+3.3 V
DC/DC Fuse -48 V/-60 V
DC/DC converter -48 V/-60 V
converter Fuse
+3.3 V backup power
Figure 7-3 shows the functional block diagram of the E1 mapping/demapping module.
Figure 7-3 Functional block diagram of the E1 mapping/demapping module

E1 mapping/demapping module
E1 STM-1
LPA LPT HPA HPT
LPOH(V5/J2/N2/
K4) insertion
PDH AIS TU-AIS/TU-LOP
detector detector
LPOH(V5/J2/N2/
K4) extraction
E1 STM-1
LPA LPT HPA HPT

PPI Module
The PPI module consists of LIUs and provides the inloop and outloop functions. The PPI module
performs the following functions:
l Encodes and decodes signals.

l Restores the data signal and the clock signal.
l Processes the PDH LOS signals.
E1 Mapping/Demapping Module
l LPA sub-module
l The 2 Mbit/s plesiochronous stream is inserted in a VC-12 container to be adapted so that
the stream can be transported to the synchronous network for check of the PDH AIS.
l LPT sub-module
l The virtual container (VC-12) is formatted. The VC-12 is structured so that its octets are
distributed within a 125 us interval (for example, one STM–1 period), and consists of the
VC-12 container and POH. The POH contains nine octets equally distributed within the
frame bytes for VC-12, namely, V5, J2, N2, and K4.
l HPA sub-module
l The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, the signals are split into VC-12s, which are located and isolated in TU-12s. The
TU-PTR is processed. TU-AIS and TU-LOP alarms are monitored. In the transmit
direction, VC-12s are located precisely and added with the TU-PTR. Sixty-three TUG-3s
are multiplexed into a VC-4 by bytes interleaving. The sequence is as follows: TUG2-
>TUG3->VC-4
l HPT sub-module
C4 container and POH.
l MST sub-module and RST sub-module
l These sub-modules are required to create a proprietary STM–1 signal so that the E1
mapping/demapping module can interface with the multiplex unit.
Interface Converting Module

The interface converting module converts the 622 Mbit/s LVDS bus of the SDH system into the
parallel bus. The high-rate backplane interface is connected to the low-rate interface chip of the
transmit system through the interface converting module.


units.
l Control the indicators on the board.
DC/DC Converter
It converts the –48/–60 V power supply into the DC voltages that the modules of the board
require.
7.1.5 Front Panel


Figure 7-4 shows the appearance of the front panel of the PD1.
Figure 7-4 Front panel of the PD1
PD1
STAT
ACT
PROG
SRV
PD1
Figure 7-5 shows the appearance of the front panel of the R3PD1.

Figure 7-5 Front panel of the R3PD1
PD1C
STAT
ACT
PROG
SRV
PD1C
Indicators
Interfaces
The front panel of the PD1 does not have an interface.
In the case of the OptiX OSN 2500 subrack, the PD1 is used with the D75S, D12S, or D12B,
which provides 75-ohm or 120-ohm E1 interfaces. For details, see the topics that describe the
D75S, D12S and D12B.
7.1.6 Valid Slots

The PD1 can be installed in divided slots 5–7 and 19–21. The PD1 must be used with the D75S,
D12S, or D12B.
Table 7-3 lists the slots valid for the PD1 and the corresponding slots for the D75S, D12S, and
D12B.
Table 7-3 Slots valid for the PD1 and the corresponding slots for the D75S, D12S, and D12B
Slot Valid for the PD1 Corresponding Slots for the D75S,
D12S, and D12B
Slot 5 Without the interface board

Slot Valid for the PD1 Corresponding Slots for the D75S,
D12S, and D12B
Slot 6 Slot 2
Slot 7 Slot 4
Slot 19 Without the interface board
Slot 20 Slot 1
Slot 21 Slot 3
NOTE
l Slot 5 can house a board for the TPS protection. The board in slot 5 protects the boards in slots 6 and
7.
l Slot 19 can house a board for the TPS protection. The board in slot 19 protects the boards in slots 20
and 21.
l The PD1 does not support TPS protection when it works with the D12B.
7.1.7 Feature Code

The feature code of the PD1 indicates the type of interface impedance.
Table 7-4 provides the relationship between the feature code of the PD1 and the type of interface
impedance.
Table 7-4 Relationship between the feature code of the PD1 and the type of interface impedance
Board Feature Code Type of Interface Impedance
SSR1PD1A01 and SSR2PD1A01 A01 75-ohm
SSR1PD1B01 and SSR2PD1B01 B01 120-ohm

The PD1 boards work with the D75S or D12S boards to realize 1:N (N≤2) TPS protection.
Figure 7-6 shows the TPS protection provided by the PD1.

Figure 7-6 TPS protection provided by the PD1
E1 protection bus
D75S
D75S
E1
service bus
Failed
Protection Working Working

PD1 PD1 PD1
Detecting a
board fault
TPS control bus
Cross-connect and
timing board
When the cross-connect and timing board detects that a working PD1 is faulty, the cross-connect
and timing board issues a service switching command to control the access board to switch the
services from the faulty PD1 to the protection PD1, which realizes the protection of the services.
NOTE
After the slots are divided, the OptiX OSN 2500 realizes the 1:2 TPS protection on the PD1
boards. Figure 7-7 shows the slot configuration for the 1:2 TPS protection of the PD1.

Figure 7-7 Slot configuration for the 1:2 TPS protection of the PD1
1 2 3 4 1 2 2 8 9 1 1 1 1 1 1 1 1 1
9 0 1 0 1 2 3 4 5 6 7 8
W2
W2
P2
S S S
L L L
O O O
T T T
CXL16
CXL16
5 6 7
SAP
D75S
D75S
D75S
D75S
W1
W1
P1
Fiber routing area
PIU FAN FAN PIU

Table 7-5 shows the slot configuration for the 1:2 TPS protection of the PD1.
Table 7-5 Slot configuration for the 1:2 TPS protection of the PD1
PD1 (protection board) Slot 5 Slot 19
PD1 (working board) Slots 6 and 7 Slots 20 and 21
D75S/D12S Slots 2 and 4 Slots 1 and 3

You can set the following parameters for the PD1 by using the U2000:
l J2 byte
l V5 byte
l Tributary loopback
l Service loading indication



The L12S, L75S, D12S, or D75S provides electrical interfaces for the PD1. For the parameters
specified for the electrical interfaces, see Technical Specifications of the L12S, Technical
Specifications of the L75S, Technical Specifications of the D12S and Technical Specifications
of the D75S.
The mechanical specifications of the PD1 are as follows:
l Weight of the R1PD1 (kg): 0.6
l Weight of the R2PD1 (kg): 0.6
Power Consumption
The maximum power consumption of the R1PD1 at room temperature (25°C) is 15 W.
The maximum power consumption of the R2PD1 at room temperature (25°C) is 15 W.
7.2 PQ1
technical specifications of the PQ1 (63xE1 service processing board). This topic also describes
how to configure and commission the PQ1.

The PQ1 is available in the following functional versions: N1 and N2. The functions provided
by the two functional versions are different. The N1PQ1 is discontinued.
7.2.2 Application
The PQ1 is a PDH processing board. The PQ1 can be used on the OptiX OSN equipment series
to add and drop PDH signals. To access and process 63xE1 signals, the PQ1 must be used with
The PQ1 processes E1 signals, processes overhead bytes, reports alarms and performance events,
The PQ1 consists of the interface module, mapping/demapping module, interface converting
7.2.5 Front Panel
The front panel of the PQ1 has indicators.
The PQ1 does not have any jumpers or DIP switches that are used for board settings.

7.2.7 Valid Slots

The PQ1 must be installed in a valid slot in the subrack. Otherwise, the PQ1 fails to work
normally.
7.2.8 Feature Code
The feature code of the PQ1 indicates the type of interface impedance.
The PQ1 supports the 1:N (N≤2) TPS protection.
You can set parameters for the PQ1 by using the U2000.
7.2.15 Known Restrictions on the Board
This topic describes the restrictions on the board when the board is used, commissioned, or
configured with services.
The technical specifications of the PQ1 include the parameters specified for electrical interfaces,

The PQ1 is available in the following functional versions: N1 and N2. The functions provided
by the two functional versions are different. The N1PQ1 is discontinued.
NOTE
Depending on the port impedance, the PQ1 is available in PQ1A (75 ohms) and PQ1B (120 ohms). Except
this, the two boards are the same in function and feature. When the port impedance need not be present,
the PQ1A and PQ1B are referred to as the PQ1.
Table 7-6 describes the versions of the PQ1.
Table 7-6 Versions of the PQ1
Item Description
Functional versions The PQ1 is available in the following functional versions: N1 and N2.

Item Description
Differences The N2PQ1 supports the E13 function and the board version
replacement function.
The N2PQ1 does not perform the tributary re-timing function.
Substitution When the tributary re-timing function is not required, the N1PQ1A
can be replaced with the N2PQ1A.
When the tributary re-timing function is not required, the N1PQ1B
can be replaced with the N2PQ1B.
Note: The PQ1 boards are classified into the PQ1A boards (75 ohms) and PQ1B boards (120
ohms) according to the interface impedance. When the interface impedance is not considered,
the PQ1A and PQ1B are called PQ1 hereafter.
7.2.2 Application
to add and drop PDH signals. To access and process 63xE1 signals, the PQ1 must be used with
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The PQ1 processes E1 signals, processes overhead bytes, reports alarms and performance events,

Table 7-7 provides the functions and features of the PQ1.
Table 7-7 Functions and features of the PQ1

Function PQ1
and
Feature N1PQ1 N2PQ1
Basic Processes 63xE1 Processes 63xE1 signals.

functions signals.
Service Processes 63xE1 l Processes 63xE1 electrical signals when working

processing electrical signals with the interface board.
when working with l Supports the E13 function, which is used to
the interface board. converge E1 services into E3 services.
Overhead Supports the processing of the path overheads at the VC-12 level, such as the
processing J2 byte.
performanc management and maintenance of the equipment.
e events
Maintenan l Supports inloops and outloops at electrical interfaces.

ce features l Supports warm resets and cold resets. The warm reset does not affect
services.
l The N1PQ1 does not support the CRC function, but the N2PQ1 supports
the CRC function.
Protection Supports the TPS protection when working with the interface board.
schemes l The N1PQ1 supports hybrid protection. When the working board is the
N1PQ1, the protection board can be the N1PQ1, N2PQ1, or N1PQM.
l The N2PQ1 does not support hybrid protection. When the working board
is the N2PQ1, the protection board can only be the N2PQ1.

The PQ1 consists of the interface module, mapping/demapping module, interface converting
Figure 7-9 shows the functional block diagram of the PQ1.

Figure 7-9 Functional block diagram of the PQ1

Backplane
Reference
2 MHz 155 MHz clock Cross-connect
OSC PLL unit
High-speed
E1 LIU 63x2 Mbit/s 155 Mbit/s bus Cross-connect
Mapping/ Interface unit A
PPI converting
Demapping
E1 63x2 Mbit/s module 155 Mbit/s module High-speed Cross-connect
LIU bus
unit B
Interface
module

Logic and unit
Outloop/Inloop SCC unit
control +3.3 V
Power Fuse -48 V/-60 V
Power module -48V/-60V
module Fuse
+3.3 V backup power
LIU: logic interface unit PPI: PDH physical interface

OSC: oscillator -
Figure 7-10 shows the functional block diagram of the mapping/demapping module.
Figure 7-10 Functional block diagram of the mapping/demapping module

Mapping/demapping module
E1 STM-1
LPA LPT HPA HPT
LPOH(V5/J2/N2/
K4) insertion
PDH AIS TU-AIS/TU-
detector LOP detector
LPOH(V5/J2/N2/
K4) extraction
E1 STM-1
LPA LPT HPA HPT
Interface Module
The interface module consists of LIUs and provides the inloop and outloop functions. The
interface module performs the following functions:


Mapping/Demapping Module
l LPA sub-module
The 2 Mbit/s (1.5 Mbit/s) plesiochronous stream is inserted in a VC-12 container to be
adapted so that the stream can be transported to the synchronous network for check of the
PDH AIS.
l LPT sub-module
The virtual container (VC-12) is formatted. The VC-12 is structured so that its octets are
C-12 container and POH. The POH contains nine octets equally distributed within the frame
bytes for VC-12, namely, V5, J2, N2, and K4.
l HPA sub-module
The HPA sub-module generates and processes the channel-level TU-PTR. In the receive
direction, VC-12s are located precisely and added with the TU-PTR. Sixty-three TU-12s
>TUG3->VC-4
l HPT sub-module
These sub-modules are required to create a proprietary STM–1 signal so that the E1


units.
Power Module
require.

7.2.5 Front Panel


Figure 7-11 shows the appearance of the front panel of the PQ1.
Figure 7-11 Front panel of the PQ1
PQ1
STAT
ACT
PROG
SRV
PQ1
Indicators

Interfaces
The front panel of the PQ1 does not have an interface.
The D75S, D12S, and D12B provide 75-ohm or 120-ohm E1 interfaces for the PQ1. For details,
see the topics that describe the D75S, D12S, and D12B.

The PQ1 does not have any jumpers or DIP switches that are used for board settings.
7.2.7 Valid Slots

The PQ1 must be installed in a valid slot in the subrack. Otherwise, the PQ1 fails to work
normally.
The PQ1 can be installed in slots 5–7, 12, and 13 in the subrack. The PQ1 must be used with the
D75S, D12S, or D12B.
Table 7-8 lists the slots valid for the PQ1 and the corresponding slots for the D75S, D12S, and
D12B.
Table 7-8 Slots valid for the PQ1 and the corresponding slots for the D75S, D12S, and D12B
Slot Valid for the PQ1 Corresponding Slots for the D75S, D12S,
and D12B
Slot 5 Without an interface board
Slot 6 Slot 1 (1–32 channels of services)

Slot 2 (33–63 channels of services)



NOTE
l Slot 5 can house a protection board for the TPS protection. The board in slot 5 protects the boards in
slots 6, 7, 12, and 13.
l If the interface board for the boards in slots 6, 7, 12, and 13 is the D12B, the boards in slots 6, 7, 12,
and 13 cannot be protected by the TPS protection scheme.

7.2.8 Feature Code

The feature code of the PQ1 indicates the type of interface impedance.
Table 7-9 provides the relationship between the feature code of the PQ1 and the type of interface
impedance.
Table 7-9 Relationship between the feature code of the PQ1 and the type of interface impedance
SSN1PQ1A01 and SSN2PQ1A01 A01 75-ohm
SSN1PQ1B01 and SSN2PQ1B01 B01 120-ohm

The PQ1 supports the 1:N (N≤2) TPS protection.
The PQ1 boards work with the D75S or D12S boards to realize one 1:N (N≤4) TPS protection
group.
Figure 7-12 shows the TPS protection provided by the PQ1. When the cross-connect and timing
board detects that a working PQ1 is faulty, the cross-connect and timing board issues a service
switching command to control the interface board to switch the services from the faulty PQ1 to
the protection PQ1, which realizes the protection of the services.
Figure 7-12 TPS protection provided by the PQ1

Switching
control bus
Interface board
Interface board
Interface board
Interface board
Interface board
Interface board
2 1 2 1 2 1 2 1
timing board
connect and
Cross-
Protection bus
Protection bus
Working board N
Protection board
Working board 1
Working board
Failed

NOTE
Table 7-10 shows the slot configuration for the 1:4 TPS protection of the PQ1.
Table 7-10 Slot configuration for the 1:4 TPS protection of the PQ1
Working Board Protection Board Slot Configuration
PQ1A (75-ohm) PQ1A (75-ohm) Slot 5 can house a protection board. The
board in slot 5 protects the boards in slots
PQ1B (120-ohm) PQ1B (120-ohm) or PQM 6, 7, 12, and 13. Figure 7-13 shows the
slot configuration for the 1:4 TPS
protection of the PQ1.
Figure 7-13 Slot configuration for the 1:4 TPS protection of the PQ1
1 2 3 4 1 2 2 8 9 1 1 1 1 1 1 1 1 1
9 0 1 0 1 2 3 4 5 6 7 8
Protection
CXL 16
CXL 16
Working
Working
Working
Working
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
SAP
Fiber routing area
PIU FAN FAN PIU




Step 2 Required: Check whether the interface board and cable match the board. Ensure that the
impedance of the cable matches the impedance of the board.
is correct.
----End

Step 2 Required: Set the PDH interface.
l V5 byte: The setting of the V5 byte on the interconnected equipment must be consistent.
Generally, use the default value. The default value of the V5 byte is Asynchronous.
l Service load indication: When a service channel does not process its carried services, select
Non-Loaded. When the service channel processes its carried services, select Load.
Step 3 Optional: Create the protection. For details, see Creating a TPS Protection Group for Boards.
NOTE
Before you configure services, learn the type of protection subnet configured for the ring network. For the
method for querying the protection subnet, see 23.1 Querying the Protection Subnet.
Step 5 Set parameters on the U2000. For the parameters to be set, see 22.3 PDH Boards.
----End

Step 1 Required: Test the connection between the cable and the service interface. For details, see
Testing Connection Between the Cables and the Service Interfaces.
Step 2 Optional: Test the TPS of the electrical interface. For details, see Testing the TPS of the
Electrical Interfaces.

----End

Boards.
----End

You can set parameters for the PQ1 by using the U2000.
You can set the following parameters for the PQ1 by using the U2000:
l J2 byte
l V5 byte

Troubleshooting
Table 7-11 lists the faults that occur on the PQ1 frequently and the troubleshooting methods.
Table 7-11 Methods used to troubleshoot the faults that occur on the PQ1 frequently

Symptom
Service l The cable or connector See Troubleshooting Service Interruptions.

interruption becomes abnormal.
performed.
l The types or settings of
the boards are
inconsistent.


Symptom
Bit error The equipment becomes See Troubleshooting Bit Errors.

faulty.
Pointer l The clock configuration See Troubleshooting Pointer Justification.

justification is incorrect.
l The precision of the
external clock source is
very low.
Protection The TPS fails. See Troubleshooting Protection Switching

switching Faults.
failure
Replacing the Board

NOTE
replace the board.
For information on how to replace the PQ1, see Replacing a PDH Board.

7.2.13.1 N1PQ1
BD_STATUS BIP_EXC BIP_SD
CHIP_FAIL COMMUN_FAIL DOWN_E1_AIS
E1_LOC LOOP_ALM LP_RDI
LP_REI LP_RFI LP_SIZE_ERR
LP_SLM LP_TIM LP_UNEQ
NO_BD_SOFT SWDL_PKG_NOBDSOFT POWER_ABNORMAL
SLAVE_WORKING SPARE_PATH_ALM SUBCARD_ABN
T_ALOS T_LOSEX TEST_STATUS
TPS_ALM TR_LOC TU_AIS
TU_LOP UP_E1_AIS V5_VCAIS
PATCHFILE_NOTEXIST PATCH_ERR PATCH_NOT_CONFIRM

7.2.13.2 N2PQ1
B3_EXC B3_SD BD_STATUS
BIP_EXC BIP_SD C2_VCAIS
CHIP_ABN CHIP_FAIL COMMUN_FAIL
CRC4_ERR_OVER DOWN_E1_AIS LFA
LMFA LOOP_ALM LP_RDI
LP_REI LP_RFI LP_SLM
LP_UNEQ NO_BD_SOFT P_AIS
P_LOF P_RAI LP_TIM
POWER_ABNORMAL SLAVE_WORKING SUBCARD_ABN
T_ALOS T_LOSEX TEMP_OVER
TEST_STATUS TPS_ALM TR_LOC
TU_AIS TU_LOP UP_E1_AIS
V5_VCAIS PATCH_ERR SWDL_PKG_NOBDSOFT
PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST

7.2.14.1 N1PQ1
LPBBE LPCSES LPES
LPFEBBE LPFECSES LPFEES
LPFESES LPFEUAS LPSES
LPUAS TUPJCHIGH TUPJCLOW
7.2.14.2 N2PQ1
CRC4_ERR E1_LCV_SDH E1_LES_SDH
E1_LLOSS_SDH E1_LSES_SDH LPBBE
LPCSES LPES LPFEBBE

LPFECSES LPFEES LPFESES
LPFEUAS LPSES LPUAS
TUPJCHIGH TUPJCLOW VC3BBE
VC3CSES VC3ES VC3FEBBE
VC3FECSES VC3FEES VC3FESES
VC3FEUAS VC3SES VC3UAS

When the PQ1 uses the tributary retiming function, each channel of the N1PQ1 uses the clock
signal extracted by the upstream LIU of the channel as the retiming clock signal.
The N2PQ1 does not support the tributary retiming function.


The D75S, D12S, or D12B provides electrical interfaces for the PQ1. For the parameters
specified for the electrical interfaces, see Technical Specifications of the D75S, Technical
Specifications of the D12S and Technical Specifications of the D12B.
The mechanical specifications of the PQ1 are as follows:

l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the N1PQ1 at room temperature (25°C) is 19 W.
The maximum power consumption of the N2PQ1 at room temperature (25°C) is 13 W.
7.3 PQM
technical specifications of the PQM (63xE1/T1 service processing board). This topic also
describes how to configure and commission the PQM.


The PQM is available in one functional version, namely, N1.
7.3.2 Application
The PQM is a PDH processing board. The PQM can be used on the OptiX OSN equipment series
to add and drop PDH signals. To access and process 63xE1/T1 signals, the PQM must be used
with the interface board.
The PQM processes E1/T1 signals, processes overhead bytes, reports alarms and performance
events, provides maintenance features, and supports the TPS protection.
The PQM consists of the interface module, mapping/demapping module, interface converting
7.3.5 Front Panel
The front panel of the PQM has indicators.
The PQM does not have any jumpers or DIP switches that are used for board settings.
7.3.7 Valid Slots
The PQM must be used with the D12S or D12B. In addition, the PQM must be installed in a
valid slot in the subrack. Otherwise, the PQM fails to work normally.
7.3.8 Feature Code
The PQM does not have a feature code.
The PQM supports the 1:N TPS protection.
You can set the parameters for the PQM by using the U2000.
The technical specifications of the PQM include the parameters specified for electrical


The PQM is available in one functional version, namely, N1.
7.3.2 Application
The PQM is a PDH processing board. The PQM can be used on the OptiX OSN equipment series
to add and drop PDH signals. To access and process 63xE1/T1 signals, the PQM must be used
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The PQM processes E1/T1 signals, processes overhead bytes, reports alarms and performance
Table 7-12 provides the functions and features of the PQM.
Table 7-12 Functions and features of the PQM
Function PQM
and Feature
Basic Processes 63xE1/T1 signals.

functions
Service Accesses and processes 63xE1/T1 electrical signals when working with the
processing interface board. Each channel can be configured as E1 or T1.

Function PQM
and Feature
Overhead Supports the processing of the path overheads at the VC-12 level, such as
processing the J2 byte.
events
Maintenance l Supports inloops and outloops at electrical interfaces.

features l Supports warm resets and cold resets. The warm reset does not affect
services.
l Supports the CRC function.
Protection Supports the TPS Protection when working with the interface board.
schemes l When the working board is the N1PQ1, the protection board can be the
N1PQ1, N2PQ1 or N1PQM. In this case, the hybrid protection is
provided.
l When the working board is the N1PQM, the protection board can only
be the N1PQM.

The PQM consists of the interface module, mapping/demapping module, interface converting
Figure 7-15 shows the functional block diagram of the PQM.

Figure 7-15 Functional block diagram of the PQM

Backplane
Reference
155 MHz clock Cross-connect
1.5 MHz/2 MHz
OSC PLL unit
63x1.5 Mbit/s High-speed

E1/T1 63x2 Mbit/s 155 Mbit/s bus Cross-connect
LIU Interface
Mapping/ unit A
PPI Demapping converting
E1/T1
63x1.5 Mbit/s
module 155 Mbit/s module High-speed Cross-connect
LIU 63x2 Mbit/s bus
unit B
Interface
module

Logic and unit
Communication
Outloop/Inloop control module SCC unit
control +3.3 V
module Fuse
+3.3 V backup power

OSC: oscillator -

E1/T1 STM-1
LPA LPT HPA HPT
LPOH(V5/J2/N2/
K4) insertion
PDH AIS TU-AIS/TU-
LPOH(V5/J2/N2/
K4) extraction
E1/T1 STM-1
LPA LPT HPA HPT
Interface Module


l LPA sub-module
The 2 Mbit/s (1.5 Mbit/s) plesiochronous stream is inserted in a VC-12 container to be
adapted so that the stream can be transported to the synchronous network for check of the
PDH AIS.
l LPT sub-module
bytes for VC-12, namely, V5, J2, N2, and K4.
l HPA sub-module
direction, VC-12s are located precisely and added with the TU-PTR. Sixty-three TU-12s
>TUG3->VC-4
l HPT sub-module
These sub-modules are required to create a proprietary STM–1 signal so that the E1


units.
Power Module
require.

7.3.5 Front Panel

The front panel of the PQM has indicators.

Figure 7-17 shows the appearance of the front panel of the PQM.
Figure 7-17 Front panel of the PQM
PQM
STAT
ACT
PROG
SRV
PQM
Indicators

Interfaces
The front panel of the PQM does not have an interface. The D12S and D12B provide 120-ohm
E1 interfaces or 100-ohm T1 interfaces for the PQM. For details, see the topics that describe the
D12S and D12B.

The PQM does not have any jumpers or DIP switches that are used for board settings.
7.3.7 Valid Slots

The PQM must be used with the D12S or D12B. In addition, the PQM must be installed in a
valid slot in the subrack. Otherwise, the PQM fails to work normally.
The PQM can be installed in slots 5–7, 12, and 13.
Table 7-13 lists the slots valid for the PQM and the corresponding slots for the D12S and D12B.
Table 7-13 Slots valid for the PQM and the corresponding slots for the D12S and D12B
Slot Valid for the PQM Corresponding Slots for the D12S and
D12B




NOTE
slots 6, 7, 12, and 13.
l If the interface board for the boards in slots 6, 7, 12, and 13 is the D12B, the boards in slots 6, 7, 12,
and 13 cannot be protected by the TPS protection scheme.
7.3.8 Feature Code

The PQM does not have a feature code.


The PQM supports the 1:N TPS protection.
The PQM boards can work with the D12S boards to realize one 1:N (N≤4) TPS protection group.
Figure 7-18 shows the TPS protection provided by the PQM.
Figure 7-18 TPS protection provided by the PQM (E1 services are provided as an example)
Switching
control bus
Interface board
Interface board
Interface board
Interface board
Interface board
Interface board
2 1 2 1 2 1 2 1
timing board
connect and
Cross-
Protection bus
Protection bus
Working board N
Protection board
Working board 1
Working board
Failed
When the cross-connect and timing board detects that a working PQM is faulty, the cross-connect
and timing board issues a service switching command. Then, the interface board switches the
services from the faulty PQM to the protection PQM, which realizes the protection of the
services.
NOTE
Table 7-14 shows the slot configuration for the 1:4 TPS protection of the PQM.
Table 7-14 Slot configuration for the 1:4 TPS protection of the PQM
Working Protection Board Slot Configuration
Board
PQM (E1) PQM (E1) Slot 5 can house a protection board. The board in
slot 5 protects the boards in slots 6, 7, 12, and 13.


Board
PQM (T1) PQM (T1) Figure 7-19 shows the slot configuration for the
1:4 TPS protection of the PQM.
Figure 7-19 Slot configuration for the 1:4 TPS protection of the PQM
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
Protection
Working
Working
Working
Working
CXL 16
CXL 16
D12S
D12S
D12S
D12S
D12S
D12S
D12S
D12S
SAP
Fiber routing area
PIU FAN FAN PIU




is correct.
----End


NOTE
----End

----End


Boards.
----End

You can set the parameters for the PQM by using the U2000.
You can set the following parameters for the PQM by using the U2000:
l J2 byte
l V5 byte

Troubleshooting
Table 7-15 lists the faults that occur on the PQM frequently and the troubleshooting methods.
Table 7-15 Methods used to troubleshoot the faults that occur on the PQM frequently

Symptom

performed.
the boards are
inconsistent.

faulty.

very low.


Symptom

switching Faults.
failure
Replacing the Board

NOTE
replace the board.
For information on how to replace the PQM, see Replacing a PDH Board.

7.3.13.1 N1PQM
BIP_EXC BD_STATUS BIP_SD
CHIP_FAIL COMMUN_FAIL CRC4_ERR_OVER
CRC6_ERR_OVER DOWN_E1_AIS DOWN_T1_AIS
E1_LOC LFA LMFA
LOOP_ALM LP_RDI LP_REI
LP_SIZE_ERR LP_SLM LP_RFI
LP_TIM LP_UNEQ NO_BD_SOFT
PATCH_ERR PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST
RMFA SLAVE_WORKING SPARE_PATH_ALM
SUBCARD_ABN T_ALOS T_LOSEX
TEST_STATUS TPS_ALM TR_LOC
TS16_AIS TU_AIS TU_LOP
UP_E1_AIS UP_T1AIS V5_VCAIS
RFA SWDL_PKG_NOBDSOFT POWER_ABNORMAL


7.3.14.1 N1PQM
CRC4_ERR CRC6_ERR E1_LCV_SDH
E1_LES_SDH E1_LSES_SDH LPBBE
LPCSES LPES LPFEBBE
LPFECSES LPFEES LPFESES
LPFEUAS LPSES LPUAS
T1_LCV_SDH T1_LES_SDH T1_LSES_SDH
TUPJCHIGH TUPJCLOW

The N1PQM does not support the PRBS test in the lower order direction for the T1 service.

The technical specifications of the PQM include the parameters specified for electrical

The D12S or D12B provides electrical interfaces for the PQM. For the parameters specified for
the electrical interfaces, see Technical Specifications of the D12S and Technical Specifications
of the D12B.
The mechanical specifications of the PQM are as follows:

l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the PQM at room temperature (25°C) is 22 W.

7.4 PL3
technical specifications of the PL3 (3xE3/T3 service processing board). This topic also describes
how to configure and commission the PL3.

The PL3 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to their functions. The N1PL3 is discontinued.
7.4.2 Application
The PL3 is a PDH processing board. The PL3 can be used on the OptiX OSN equipment series
to add and drop PDH signals. To access and process 3xE3/T3 signals, the PL3 must be used with
The PL3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
The PL3 consists of the interface module, mapping/demapping module, interface converting
7.4.5 Front Panel
The front panel of the PL3 has indicators.
The PL3 does not have any jumpers or DIP switches that are used for board settings.
7.4.7 Valid Slots
The PL3 must be used with the C34S. In addition, the PL3 must be installed in a valid slot in
the subrack. Otherwise, the PL3 cannot work normally.
7.4.8 Feature Code
The PL3 supports the 1:N TPS protection.
You can set the parameters for the PL3 by using the U2000.

The technical specifications of the PL3 include the parameters specified for electrical interfaces,

The PL3 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to their functions. The N1PL3 is discontinued.
Table 7-16 describes the versions of the PL3.
Table 7-16 Versions of the PL3

Item Description
Functional versions The PL3 is available in two functional versions, namely, N1 and N2.
Differences The N1PL3 does not support the E13/M13 function.

The N2PL3 supports the E13/M13 function.
The N2PL3 supports the board version replacement function and can
replace the N1PL3. After the N2PL3 replaces the N1PL3, the
configuration and service status of the N2PL3 are the same as the
configuration and service status of the N1PL3.
Substitution The N2PL3 can replace the N1PL3.
7.4.2 Application
The PL3 is a PDH processing board. The PL3 can be used on the OptiX OSN equipment series
to add and drop PDH signals. To access and process 3xE3/T3 signals, the PL3 must be used with

NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The PL3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
Table 7-17 provides the functions and features of the PL3.
Table 7-17 Functions and features of the PL3

Function and PL3
Feature
Basic functions Processes 3xE3/T3 signals.
Service processing Accesses and processes 3xE3/T3 electrical signals.
Overhead Supports the setting and query of all the path overhead bytes at the VC-3
processing level.
events

Function and PL3

Feature

services.
services.
l The N2PL3 supports the PRBS function.
l The N1PL3 does not support the CRC function, but the N2PL3
supports the CRC function.
Protection Supports the TPS protection when working with the interface board
schemes and the switching and bridging board.

The PL3 consists of the interface module, mapping/demapping module, interface converting
Figure 7-21 shows the functional block diagram of the PL3.
Figure 7-21 Functional block diagram of the PL3

Backplane
Reference
34 MHz/45 MHz 155 MHz clock Cross-connect
OSC PLL unit
3x34 Mbit/s High-speed

E3/T3 3x45 Mbit/s 2x155 Mbit/s bus Cross-connect
LIU Interface
Mapping/ unit A
E3/T3
3x34 Mbit/s
module 2x155 Mbit/s module High-speed Cross-connect
LIU 3x45 Mbit/s bus
unit B
Interface
module

Logic and unit
Communication
control module SCC unit
Outloop/Inloop
control +3.3 V
module Fuse
+3.3 V backup power

OSC: oscillator -


E3/T3 STM-1
LPA LPT HPA HPT
LPOH (J1/C2/
B3) insertion
PDH AIS TU-AIS/TU-
LPOH (J1/C2/
B3) extraction
E3/T3 STM-1
LPA LPT HPA HPT
LPA: low order path adaptation LPT: low order path termination
HPA: high order path adaptation HPT: high order path termination
Interface Module

l Processes the P_LOS alarm.
l LPA sub-module
The 45 Mbit/s (34 Mbit/s) plesiochronous stream is inserted in a C3 container to be adapted
so that the stream can be transported to the synchronous network.
l LPT sub-module
bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
l HPA sub-module
TU-PTR is processed. In the transmit direction, VC-3s are located precisely and added with
the TU-PTR. Three TUG-3s are multiplexed into a VC-4 by bytes interleaving. The
sequence is as follows: TU-3->TUG3->VC-4

l HPT sub-module
These sub-modules are required to create a proprietary STM–1 signal so that the interface
converting module can be connected.


units.
Power Module
require.
7.4.5 Front Panel

The front panel of the PL3 has indicators.

Figure 7-23 shows the appearance of the front panel of the PL3.

Figure 7-23 Front panel of the PL3
PL3
STAT
ACT
PROG
SRV
PL3
Indicators
Interfaces
The front panel of the PL3 does not have an interface.
The C34S provides E3/T3 interfaces for the PL3. For details, see the topic that describes the
C34S.


The PL3 does not have any jumpers or DIP switches that are used for board settings.
7.4.7 Valid Slots

The PL3 must be used with the C34S. In addition, the PL3 must be installed in a valid slot in
the subrack. Otherwise, the PL3 cannot work normally.
The PL3 can be installed in slots 6, 7, 12, and 13.
Table 7-18 lists the slots valid for the PL3 and the corresponding slots for the C34S.
Table 7-18 Slots valid for the PL3 and the corresponding slots for the C34S
Slot Valid for the PL3 Corresponding Slot for the C34S
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17
7.4.8 Feature Code


The PL3 supports the 1:N TPS protection.
The PL3 can be configured into two 1:1 TPS protection groups when the PL3 works with the
C34S and TSB8/TSB4.
Figure 7-24 shows the TPS protection provided by the PL3.

Figure 7-24 TPS protection provided by the PL3 in the OptiX OSN 1500B subrack
Switching
control bus
Interface board N
Interface board 1
switching board
Interface board
N 1 Protection 1 2 1 2
timing board
connect and
Cross-
Working board N
Protection board
Working board 1
Working board
Failed
l Normal state
the corresponding working board through position 1 of the control switch on the interface
board.
l Switching state
NOTE
Table 7-19 shows the slot configuration for the 1:1 TPS protection of the PL3.
Table 7-19 Slot configuration for the 1:1 TPS protection of the PL3

Board
PL3 (E3) PL3 (E3)/PD3 (E3) If the working board is the PL3, the PD3
can be the protection board. Figure 7-25
PL3 (T3) PL3 (T3)/PD3 (T3) shows the slot configuration for the 1:1
TPS protection of the PL3.

Figure 7-25 Slot configuration for the two 1:1 TPS protection groups of the PL3
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
TSB8/TSB4
TSB8/TSB4
Protection 2
Protection 1
Working 2
Working 1
CXL 16
CXL 16
C34S
C34S
SAP
Fiber routing area
PIU FAN FAN PIU

In Figure 7-25, the board in slot 6 protects the board in slot 7, and the board in slot 13 protects
the board in slot 12.
Table 7-20 lists the slots for the PL3, C34S, and TSB8/TSB4.
Table 7-20 Slots for the PL3, C34S, and TSB8/TSB4

PL3 (working board) Slot 7 Slot 12
PL3/PD3 (protection board) Slot 6 Slot 13
TSB8/TSB4 Slot 1 Slot 17
C34S Slot 3 Slot 15



is correct.
----End

NOTE
----End


----End

Boards.
----End

You can set the parameters for the PL3 by using the U2000.
You can set the following parameters for the PL3 by using the U2000:
l J1 byte
l C2 byte
l Path service type

Troubleshooting
Table 7-21 lists the faults that occur on the PL3 frequently and the troubleshooting methods.
Table 7-21 Methods used to troubleshoot the faults that occur on the PL3 frequently
Symptom

performed.
the boards are
inconsistent.


Symptom

faulty.

very low.

switching Faults.
failure
Replacing the Board

NOTE
replace the board.
For information on how to replace the PL3, see Replacing a PDH Board.

7.4.13.1 N1PL3
A_LOC B3_EXC B3_SD
BD_STATUS BDID_ERROR C2_VCAIS
CHIP_FAIL COMMUN_FAIL FPGA_ABN
LOOP_ALM LP_R_FIFO LP_RDI
LP_REI LP_SLM LP_T_FIFO
P_AIS P_LOS PLL_FAIL
POWER_ABNORMAL SLAVE_WORKING SPARE_PATH_ALM
SUBCARD_ABN T_LOSEX TEST_STATUS
TPS_ALM TR_LOC TU_AIS
TU_LOP W_R_FAIL PATCHFILE_NOTEXIST
PATCH_ERR PATCH_NOT_CONFIRM SWDL_PKG_NOBDSOFT

7.4.13.2 N2PL3
BIP_EXC BIP_SD C2_VCAIS
CHIP_ABN CHIP_FAIL COMMUN_FAIL
CRC6_ERR_OVER DOWN_E1_AIS DOWN_T1_AIS
DS3_IDLE CRC4_ERR_OVER LFA
LMFA LOOP_ALM LP_RFI
LP_RDI LP_REI LP_TIM
LP_SLM NO_BD_SOFT P_AIS
LP_UNEQ P_LOF P_LOS
P_RAI SUBCARD_ABN POWER_ABNORMAL
SLAVE_WORKING TEST_STATUS T_LOSEX
TEMP_OVER TU_AIS TPS_ALM
TR_LOC UP_T1AIS TU_LOP
UP_E1_AIS PATCH_NOT_CONFIRM V5_VCAIS
PATCH_ERR SWDL_PKG_NOBD- PATCHFILE_NOTEXIST

SOFT
P_FFM

7.4.14.1 N1PL3
E3_LCV_SDH E3_LES_SDH E3_LSES_SDH

7.4.14.2 N2PL3
LPES LPFEBBE LPFEES
LPUAS T3_LCV_SDH T3_LES_SDH
T3_LSES_SDH TUPJCHIGH TUPJCLOW
TUPJCNEW VC3BBE VC3CSES
VC3ES VC3FEBBE VC3FEES
VC3FESES VC3FEUAS VC3SES
VC3UAS VC3FECSES LPCSES
LPFECSES

The N1PL3 does not support the PRBS test.

The technical specifications of the PL3 include the parameters specified for electrical interfaces,

The C34S provides electrical interfaces for the PL3. For the parameters specified for the
electrical interfaces, see Technical Specifications of the C34S.
The mechanical specifications of the PL3 are as follows:
l Weight of the N1PL3 (kg): 1.0
l Weight of the N2PL3 (kg): 0.9
Power Consumption
The maximum power consumption of the N1PL3 at room temperature (25°C) is 15 W.
The maximum power consumption of the N2PL3 at room temperature (25°C) is 12 W.

7.5 PL3A
technical specifications of the PL3A (3xE3/T3 service processing board with the interfaces on
the front panel). This topic also describes how to configure and commission the PL3A.

The PL3A is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the E13/M13 function. The N1PL3A is
discontinued.
7.5.2 Application
The PL3A is a PDH processing board. The PL3A can be used on the OptiX OSN equipment
series to add and drop PDH signals. To access and process 3xE3/T3 signals, the PL3A uses the
interfaces on its front panel.
The PL3A processes E3/T3 signals, processes overhead bytes, reports alarms and performance
The PL3A consists of the interface module, mapping/demapping module, interface converting
7.5.5 Front Panel
The front panel of the PL3A has indicators and interfaces.
The PL3A does not have any jumpers or DIP switches that are used for board settings.
7.5.7 Valid Slots
The PL3A must be installed in a valid slot in the subrack. Otherwise, the PL3A cannot work
normally.
7.5.8 Feature Code
You can set the parameters for the PL3A by using the U2000.


The technical specifications of the PL3A include the parameters specified for electrical

The PL3A is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the E13/M13 function. The N1PL3A is
discontinued.
Table 7-22 describes the versions of the PL3A.
Table 7-22 Versions of the PL3A

Item Description
Functional versions The PL3A is available in two functional versions, namely, N1 and
N2.
Differences The N1PL3A does not support the E13/M13 function.

The N2PL3A supports the E13/M13 function.
The N2PL3A supports the board version replacement function and
can replace the N1PL3A. After the N2PL3A replaces the N1PL3A,
the configuration and service status of the N2PL3A are the same as
the configuration and service status of the N1PL3A.
Substitution The N2PL3A can replace the N1PL3A.
7.5.2 Application
The PL3A is a PDH processing board. The PL3A can be used on the OptiX OSN equipment
series to add and drop PDH signals. To access and process 3xE3/T3 signals, the PL3A uses the
interfaces on its front panel.

NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The PL3A processes E3/T3 signals, processes overhead bytes, reports alarms and performance
Table 7-23 provides the functions and features of the PL3A.
Table 7-23 Functions and features of the PL3A

Function and PL3A
Feature
Basic functions l Processes 3xE3/T3 signals.

l The N2PL3A supports the E13 function, which is used to
converge E1 services into E3 services.
l The N2PL3A supports the M13 function, which is used to
converge T1 services into T3 services.
Service processing Accesses and processes 3xE3/T3 electrical signals.
Overhead Supports the setting and query of all the path overhead bytes at the
processing VC-3 level.

Function and PL3A

Feature

affect services.
services.
l The N2PL3A supports the PRBS function.
l The N1PLS3A does not support the CRC function, but the
N2PL3A supports the CRC function.

The PL3A consists of the interface module, mapping/demapping module, interface converting
Figure 7-27 shows the functional block diagram of the PL3A.
Figure 7-27 Functional block diagram of the PL3A

Backplane
Reference
34 MHz/45 MHz 155 MHz clock Cross-connect
OSC PLL unit
3x34 Mbit/s High-speed

E3/T3 3x45 Mbit/s 2x155 Mbit/s bus Cross-connect
LIU Interface
Mapping/ unit A
E3/T3
3x34 Mbit/s
module 2x155 Mbit/s module High-speed Cross-connect
LIU 3x45 Mbit/s bus
unit B
Interface
module

Logic and unit
Communication
Outloop/Inloop
control +3.3 V
module Fuse
+3.3 V backup power

OSC: oscillator -


E3/T3 STM-1
LPA LPT HPA HPT
LPOH (J1/C2/
B3) insertion
PDH AIS TU-AIS/TU-
LPOH (J1/C2/
B3) extraction
E3/T3 STM-1
LPA LPT HPA HPT
LPA: low order path adaptation LPT: low order path termination
HPA: high order path adaptation HPT: high order path termination
Interface Module

l LPA sub-module
The 45 Mbit/s (34 Mbit/s) plesiochronous stream is inserted in a C3 container to be adapted
l LPT sub-module
bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
l HPA sub-module
l HPT sub-module



units.
Power Module
require.
7.5.5 Front Panel

The front panel of the PL3A has indicators and interfaces.

Figure 7-29 shows the appearance of the front panel of the PL3A.

Figure 7-29 Front panel of the PL3A
PL3A
STAT
ACT
PROG
SRV
OUT1
IN1
OUT2
IN2
OUT3
IN3
PL3A
Indicators
Interfaces
The front panel of the PL3A has three pairs of 75-ohm unbalanced interfaces, which are of the
SMB type.


The PL3A does not have any jumpers or DIP switches that are used for board settings.
7.5.7 Valid Slots

The PL3A must be installed in a valid slot in the subrack. Otherwise, the PL3A cannot work
normally.
The PL3A can be installed in slots 5–8 and 11–13 in the subrack.
7.5.8 Feature Code



is correct.
----End



NOTE
----End

----End

Boards.
----End

You can set the parameters for the PL3A by using the U2000.
You can set the following parameters for the PL3A by using the U2000:
l J1 byte
l C2 byte
l Path service type


Troubleshooting
Table 7-24 lists the faults that occur on the PL3A frequently and the troubleshooting methods.
Table 7-24 Methods used to troubleshoot the faults that occur on the PL3A frequently
Symptom

performed.
the boards are
inconsistent.

faulty.

very low.

switching Faults.
failure
Replacing the Board

NOTE
replace the board.
For information on how to replace the PL3A, see Replacing a PDH Board.


7.5.12.1 N1PL3A
A_LOC B3_EXC B3_SD
BD_STATUS BDID_ERROR C2_VCAIS
CHIP_FAIL COMMUN_FAIL FPGA_ABN
LOOP_ALM LP_R_FIFO LP_RDI
LP_REI LP_SLM LP_T_FIFO
P_AIS P_LOS PLL_FAIL
POWER_ABNORMAL SLAVE_WORKING T_LOSEX
TEST_STATUS TR_LOC TU_AIS
TU_LOP W_R_FAIL PATCH_ERR
PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST SWDL_PKG_NOBD-

SOFT
7.5.12.2 N2PL3A
BD_STATUS B3_EXC B3_SD
BIP_SD C2_VCAIS BIP_EXC
CHIP_FAIL COMMUN_FAIL CHIP_ABN
CRC6_ERR_OVER DOWN_E1_AIS CRC4_ERR_OVER
DS3_IDLE LOOP_ALM DOWN_T1_AIS
LMFA LP_REI LFA
LP_RDI NO_BD_SOFT LP_RFI
LP_SLM P_LOF LP_TIM
LP_UNEQ P_AIS P_FFM
P_RAI TPS_ALM UP_E1_AIS
SLAVE_WORKING SUBCARD_ABN P_LOS
TEMP_OVER TEST_STATUS POWER_ABNORMAL
TU_AIS TU_LOP T_LOSEX
V5_VCAIS PATCH_ERR TR_LOC
PATCHFILE_NOTEXIST SWDL_PKG_NOBDSOFT UP_T1AIS
PATCH_NOT_CONFIRM


7.5.13.1 N1PL3A
E3_LCV_SDH E3_LES_SDH E3_LSES_SDH
TUPJCNEW
7.5.13.2 N2PL3A
LPES LPFEBBE LPFEES
LPUAS T3_LCV_SDH T3_LES_SDH
T3_LSES_SDH TUPJCHIGH TUPJCLOW
TUPJCNEW VC3BBE VC3CSES
VC3ES VC3FEBBE VC3FEES
VC3FESES VC3FEUAS VC3SES
VC3UAS VC3FECSES LPCSES
LPFECSES

The N1PL3A does not support the PRBS test.


The technical specifications of the PL3A include the parameters specified for electrical

Table 7-25 lists the parameters specified for the electrical interfaces of the PL3A.
Table 7-25 Parameters specified for the electrical interfaces of the PL3A
Nominal bit rate 34368 kbit/s 44736 kbit/s
Line code pattern HDB3 B3ZS
Waveform at the output Complies with ITU-T G.703.

interface
Signal bit rate at the output

interface
Allowed attenuation at the input

interface
Allowed frequency deviation at Complies with ITU-T G.823.

the input interface
Input jitter tolerance Complies with ITU-T G. Complies with ITU-T G.

823. 824.
Anti-interference capability at Complies with ITU-T G. -

the input interface 703.
Reflection attenuation at the

input/output interface
Output jitter Complies with ITU-T G.823 and G.824.
Mapping jitter Complies with ITU-T G.783.
Combined jitter
Jitter transfer function Complies with ITU-T G. -

751.
The mechanical specifications of the PL3A are as follows:

l Weight of the N1PL3A (kg): 1.0
l Weight of the N2PL3A (kg): 0.9

Power Consumption
The maximum power consumption of the N1PL3A at room temperature (25°C) is 15 W.
The maximum power consumption of the N2PL3A at room temperature (25°C) is 12 W.
7.6 PD3
technical specifications of the PD3 (6xE3/T3 service processing board).

The PD3 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the E13/M13 function. The N1PD3 is
no longer manufactured.
7.6.2 Application
to add and drop PDH signals. To access and process 6xE3/T3 signals, the PD3 must be used
The PD3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
The PD3 consists of the PPI module, E3/T3 mapping/demapping module, interface converting
7.6.5 Front Panel
7.6.6 Valid Slots
The PD3 can be installed in slots 6, 7, 12, and 13, and must be used with the D34S.

The PD3 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to whether they support the E13/M13 function. The N1PD3 is
no longer manufactured.
Table 7-26 describes the versions of the PD3.

Table 7-26 Versions of the PD3

Item Description
Functional versions The PD3 is available in two functional versions, namely, N1 and N2.
Differences l The N1PD3 does not support the E13/M13 function.

l The N2PD3 supports the E13/M13 function.
l The N2PD3 supports the board version replacement function and
can replace the N1PD3. After the N2PD3 replaces the N1PD3, the
configuration and service status of the N2PD3 are the same as the
configuration and service status of the N1PD3.
Substitution The N2PD3 can replace the N1PD3.
7.6.2 Application
to add and drop PDH signals. To access and process 6xE3/T3 signals, the PD3 must be used
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The PD3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
Table 7-27 provides the functions and features of the PD3.

Table 7-27 Functions and features of the PD3

Function PD3
and Feature
Basic Processes 6xE3/T3 signals.

functions
Service l Accesses and processes 6xE3/T3 electrical signals.

processing l The N2PD3 supports the E13 function, which is used to converge E1
services into E3 services.
l The N2PD3 supports the M13 function, which is used to converge T1
services into T3 services.
processing level.
events

services.
l The N1PD3 does not support the CRC function, but the N2PD3 supports
the CRC function.
Protection Supports the TPS protection when working with the interface board and the
schemes switching and bridging board.

The PD3 consists of the PPI module, E3/T3 mapping/demapping module, interface converting
Figure 7-31 shows the functional block diagram of the PD3.

Figure 7-31 Functional block diagram of the PD3
34 MHz/ 155 MHz Reference

45 MHz Cross-connect unit
PLL clock
OSC
6x34 Mbit/s/
E3/T3 LIU 6x45 Mbit/s 2x155 Mbit/s High-
P E3/T3 Interface Cross-connect unit A
mapping/ speed bus
converting
P 6x34 Mbit/s/
demapping module
E3/T3 I 6x45 Mbit/s 2x155 Mbit/s High-
LIU module Cross-connect unit B
speed bus
LOS Frame header Cross-connect unit

Logic and
Outloop/Inloop Communication SCC Unit
control module
control
+3.3 V
converter Fuse
+3.3 V backup power
OSC: Oscillator PPI: PDH physical interface
Figure 7-32 shows the functional block diagram of the E3/T3 mapping/demapping module.
Figure 7-32 Functional block diagram of the E3/T3 mapping/demapping module

E3/T3 STM-1
LPA LPT HPA HPT
LPOH (J1/C2/
B3) insertion
PDH AIS TU-AIS/TU-
LPOH (J1/C2/
B3) extraction
E3/T3 STM-1
LPA LPT HPA HPT
LPA: Low order path adaptation LPT: Low order path termination
HPA: High order path adaptation HPT: High order path termination

PPI Module

E3/T3 Mapping/Demapping Module

l LPA sub-module
l The 45 Mbit/s (34 Mbit/s) plesiochronous stream is inserted in a C3 container to be adapted
l LPT sub-module
frame bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
l HPA sub-module
l HPT sub-module
l These sub-modules are required to create a proprietary STM–1 signal so that the interface


units.

DC/DC Converter
require.
7.6.5 Front Panel


Figure 7-33 shows the appearance of the front panel of the PD3.
Figure 7-33 Front panel of the PD3
PD3
STAT
ACT
PROG
SRV
PD3
Indicators

Interfaces
The front panel of the PD3 does not have an interface.
The D34S provides E3/T3 interfaces for the PD3. For details, see the topic that describes the
D34S.
7.6.6 Valid Slots

The PD3 can be installed in slots 6, 7, 12, and 13, and must be used with the D34S.
Table 7-28 lists the slots valid for the PD3 and the corresponding slots for the D34S.
Table 7-28 Slots valid for the PD3 and the corresponding slots for the D34S
Slot Valid for the PD3 Corresponding Slot for the D34S
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17

The PD3 can be configured into two 1:1 TPS protection groups when the PD3 works with the
D34S and TSB8. Figure 7-34 shows the TPS protection provided by the PD3.

Figure 7-34 TPS protection provided by the PD3

6xE3/T3
Sw itching
control
TSB8 D34S signal
1 2
3 2 1
Cross-
connect
and timing
board
Slot 9/10
Protection Working
PD3 PD3
Failed
Slot 6 Slot 7
l Normal state
the PD3 through position 1 of the control switch on the D34S.
l Switching state
switch of the corresponding D34S switches from position 1 to position 2. At the same time,
the control switch of the TSB8 switches to the corresponding position so that the protection
board can protect the failed working board.
NOTE
Table 7-29 shows the slot configuration for the TPS protection of the PD3.
Table 7-29 Slot configuration for the 1:1 TPS protection of the PD3
Board
PD3 (E3) PD3 (E3) Figure 7-35 shows the slot configuration for
the 1:1 TPS protection of the PD3.
PD3 (T3) PD3 (T3)

Figure 7-35 Slot configuration for the 1:1 TPS protection of the PD3
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
Protection 1
Protection 2
Working 2
Working 1
CXL 16
CXL 16
TSB8
D34S
TSB8
D34S
SAP
Fiber routing area
PIU FAN FAN PIU

Table 7-30 lists the slots for the PD3, D34S, and TSB8 .
Table 7-30 Slots for the PD3, D34S, and TSB8
PD3 (working board) Slot 7 Slot 12
PD3 (protection board) Slot 6 Slot 13
TSB8 Slot 1 Slot 17
D34S Slot 3 Slot 15

You can set the following parameters for the PD3 by using the U2000:
l J1 byte
l C2 byte

l Path service type


The C34S provides electrical interfaces for the PD3. For the parameters specified for the
electrical interfaces, see Technical Specifications of the D34S.
The mechanical specifications of the PD3 are as follows:
l Weight (kg): 1.1
Power Consumption
The maximum power consumption of the N1PD3 at room temperature (25°C) is 19 W.
The maximum power consumption of the N2PD3 at room temperature (25°C) is 12 W.
7.7 PQ3
technical specifications of the PQ3 (12xE3/T3 service processing board).

The PQ3 is available in one functional version, namely, N2.
7.7.2 Application
to add and drop PDH signals. To access and process 12xE3/T3 signals, the PQ3 must be used
The PQ3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
The PQ3 consists of the PPI module, E3/T3 mapping/demapping module, interface converting
7.7.5 Front Panel
7.7.6 Valid Slots

The PQ3 can be installed in slots 6, 7, 12, and 13, and must be used with the D34S.
The PQ3 supports the 1:N TPS protection.
You can set the parameters for the PQ3 by using the U2000.

The PQ3 is available in one functional version, namely, N2.
7.7.2 Application
to add and drop PDH signals. To access and process 12xE3/T3 signals, the PQ3 must be used
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The PQ3 processes E3/T3 signals, processes overhead bytes, reports alarms and performance
Table 7-31 provides the functions and features of the PQ3.

Table 7-31 Functions and features of the PQ3

Function and PQ3
Feature
Basic functions Processes 12xE3/T3 signals.
Service l Accesses and processes 12xE3/T3 electrical signals.

processing l Supports the E13 function, which is used to converge E1 services into
E3 services.
l Supports the M13 function, which is used to converge T1 services into
T3 services.
processing level.
events

services.
Protection Supports the TPS protection when working with the interface board and the
schemes switching and bridging board.

The PQ3 consists of the PPI module, E3/T3 mapping/demapping module, interface converting
Figure 7-37 shows the functional block diagram of the PQ3.

Figure 7-37 Functional block diagram of the PQ3
34 MHz/ 155 MHz Reference

45 MHz Cross-connect unit
OSC PLL clock
12x34 Mbit/s/
E3/T3 LIU 12x45 Mbit/s 2x155 Mbit/s High-
P E3/T3 Interface Cross-connect unit A
mapping/ speed bus
converting
P 12x34 Mbit/s/
demapping module
E3/T3 I 12x45 Mbit/s 2x155 Mbit/s High-
LIU module Cross-connect unit B
speed bus
LOS Frame header Cross-connect unit

Logic and
Outloop/Inloop Communication SCC Unit
control module
control
+3.3 V
converter Fuse
+3.3 V backup power
OSC: Oscillator PPI: PDH physical interface
Figure 7-38 shows the functional block diagram of the E3/T3 mapping/demapping module.
Figure 7-38 Functional block diagram of the E3/T3 mapping/demapping module

E3/T3 STM-1
LPA LPT HPA HPT
LPOH (J1/C2/
B3) insertion
PDH AIS TU-AIS/TU-
LPOH (J1/C2/
B3) extraction
E3/T3 STM-1
LPA LPT HPA HPT
LPA: Low order path adaptation LPT: Low order path termination
HPA: High order path adaptation HPT: High order path termination

PPI Module

E3/T3 Mapping/Demapping Module

l LPA sub-module
l The 45 Mbit/s (34 Mbit/s) plesiochronous stream is inserted in a C3 container to be adapted
l LPT sub-module
frame bytes for VC-3, namely, J1, B3, C2, G1, F2, H4, F3, K3, and N1.
l HPA sub-module
l HPT sub-module
l These sub-modules are required to create a proprietary STM–1 signal so that the interface


units.

DC/DC Converter
require.
7.7.5 Front Panel


Figure 7-39 shows the appearance of the front panel of the PQ3.
Figure 7-39 Front panel of the PQ3
PQ3
STAT
ACT
PROG
SRV
PQ3
Indicators

Interfaces
The front panel of the PQ3 does not have an interface.
The D34S provides E3/T3 interfaces for the PQ3. For details, see the topic that describes the
D34S.
7.7.6 Valid Slots

The PQ3 can be installed in slots 6, 7, 12, and 13, and must be used with the D34S.
Table 7-32 lists the slots valid for the PQ3 and the corresponding slots for the D34S.
Table 7-32 Slots valid for the PQ3 and the corresponding slots for the D34S
Slot Valid for the PQ3 Corresponding Slot for the D34S
Slot 6 Slots 1 and 2

The PQ3 supports the 1:N TPS protection.
The PQ3 boards can be configured into two 1:1 TPS protection groups when the PQ3 boards
work with two D34S boards and two TSB8 boards. Figure 7-40 shows the TPS protection
provided by the PQ3.

Figure 7-40 TPS protection provided by the PQ3
12xE3/T3 12xE3/T3
Sw itching
control
TSB8 TSB8 D34S signal
D34S
1 2 1 2 1 2 1 2
Cross-
connect
and timing
board
Slot 9/10
Protection Working
PQ3 PQ3
Failed
Slot 6 Slot 7
l Normal state
the PQ3 through position 1 of the control switch on the D34S.
l Switching state
switch of the corresponding D34S switches from position 1 to position 2. At the same time,
the control switch of the TSB8 switches to the corresponding position so that the protection
board can protect the failed working board.
NOTE
NOTE
When you configure the N2PQ3 as the TPS protection board, two TSB8 boards are required.
Table 7-33 shows the slot configuration for the 1:1 TPS protection of the PQ3.
Table 7-33 Slot configuration for the 1:1 TPS protection of the PQ3

Board
PQ3 (E3) PQ3 (E3) Figure 7-41 shows the slot configuration for
the 1:1 TPS protection of the PQ3.
PQ3 (T3) PQ3 (T3)

Figure 7-41 Slot configuration for the two 1:1 TPS protection groups of the PQ3
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
Protection 1
Protection 2
Working 2
Working 1
CXL 16
CXL 16
TSB8
TSB8
TSB8
TSB8
D34S
D34S
D34S
D34S
SAP
Fiber routing area
PIU FAN FAN PIU

Table 7-34 lists the slots for the PQ3, D34S, and TSB8.
Table 7-34 Slots for the PQ3, D34S, and TSB8
PQ3 (working board) Slot 7 Slot 12
PQ3 (protection board) Slot 6 Slot 13
TSB8 Slots 1 and 2 Slots 17 and 18
D34S Slots 3 and 4 Slots 15 and 16

You can set the parameters for the PQ3 by using the U2000.
You can set the following parameters for the PQ3 by using the U2000:
l J1 byte
l C2 byte

l Path service type


The D34S provides electrical interfaces for the PQ3. For the parameters specified for the
electrical interfaces, see Technical Specifications of the D34S.
The mechanical specifications of the PQ3 are as follows:
l Weight (kg): 0.9
Power Consumption
The maximum power consumption of the PQ3 at room temperature (25°C) is 13 W.
7.8 DX1
technical specifications of the DX1 (DDN service accessing and converging board). This topic
also describes how to configure and commission the DX1.
The DX1 is available in one functional version, namely, N1.
7.8.2 Application
The DX1 is a DDN service processing board. The DX1 can be used on the OptiX OSN equipment
series to add and converge the DDN services. To access eight channels of Nx64 kbit/s signals
and eight channels of framed E1 services and to cross-connect the 48 channels of Nx64 kbit/s
signals on the system side, the DX1 must be used with the interface board.
The DX1 cross-connects 48xE1 signals at the 64 kbit/s level on the system side.
The DX1 consists of the interface and frame processing module, encoding/decoding module,
timeslot cross-connect module, framing/deframing module, mapping/demapping module, logic
and control module, and power module.
7.8.5 Front Panel
The front panel of the DX1 has indicators.

The DX1 does not have any jumpers or DIP switches that are used for board settings.
7.8.7 Valid Slots
The DX1 must be used with the DM12. In addition, the DX1 must be installed in a valid slot in
the subrack. Otherwise, the DX1 cannot work normally.
7.8.8 Feature Code
The feature code of the DX1 indicates the type of interface impedance.
The DX1 supports the 1:N TPS protection.
You can set the parameters for the DX1 by using the U2000.
The technical specifications of the DX1 include the parameters specified for electrical interfaces,

The DX1 is available in one functional version, namely, N1.
7.8.2 Application
The DX1 is a DDN service processing board. The DX1 can be used on the OptiX OSN equipment
series to add and converge the DDN services. To access eight channels of Nx64 kbit/s signals
and eight channels of framed E1 services and to cross-connect the 48 channels of Nx64 kbit/s
signals on the system side, the DX1 must be used with the interface board.
Figure 7-42 shows the application of the DDN service processing boards. The DDN service
processing boards add DDN service signals to line signals and drops line signals to DDN service
signals.

Figure 7-42 Networking and application of the DDN service processing boards
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The DX1 cross-connects 48xE1 signals at the 64 kbit/s level on the system side.
Table 7-35 provides the functions and features of the DX1.
Table 7-35 Functions and features of the DX1

Function DX1
and
Feature
Basic l Processes eight channels of Nx64 kbit/s services and eight channels of
functions framed E1 services.
l Cross-connects 48 channels of Nx64 kbit/s signals on the system side.
Service l Accesses eight channels of Nx64 kbit/s and eight channels of framed E1
processing services and realizes the 1:N TPS protection when working with the
DM12.
l One DX1 board needs to work with two DM12 boards.
events

features l Supports the PRBS function.

Function DX1
and
Feature
Connectors The DB28 connectors and DB44 connectors are present on the front panel of
the DM12. The DB28 connector is used for the Nx64 kbit/s signals, and the
DB44 connector is used for the framed E1 signals.
Protection Supports the TPS protection when working with the interface board.
schemes

The DX1 consists of the interface and frame processing module, encoding/decoding module,
timeslot cross-connect module, framing/deframing module, mapping/demapping module, logic
and control module, and power module.
Figure 7-43 shows the functional block diagram of the DX1.
Figure 7-43 Functional block diagram of the DX1

Backplane Backplane
DM12
Framed E1 DX1 Framed E1
encoding/
8xFrame E1 interface
decoding and
module
frame processing 64 kbit/s Mapping/
Framing/
Nx64 kbit/s module timeslot Demapping Cross-connect
Deframing
4xNx64 kbit/s interface cross-connect module for unit
module
module module 48 channels
Nx64 kbit/s
of signals
Power interface
and frame
DM12 processing
4xNx64 kbit/s Nx64 kbit/s module
interface
module
Power Logic and SCC unit
control module
Framed E1
interface
module +3.3 V Power Fuse -48 V/-60 V
module Fuse
+3.3 V backup power
In the Transmit Direction

The mapping/demapping module demaps the VC-4 signals sent from the SDH cross-connect
unit and sends the demapped signals to the framing/deframing module. Then, the framing/
deframing module converts the signals into the framed E1 signals and sends the framed E1
signals to the timeslot cross-connect module. Finally, the timeslot cross-connect module cross-
connects and grooms the signals at the 64 kbit/s granularity, and transmits the signals that need
to be dropped on the local NE to the interface module.

In the Receive Direction

The DX1 accesses eight channels of framed E1 signals from the framed E1 interface module of
the DM12 and eight channels of Nx64 kbit/s signals from the Nx64 kbit/s interface module of
the DM12. In addition, the DX1 restores the data signal and clock signal.
In the case of the framed E1 signals, the DX1 decodes the signals and processes the frames. In
the case of the Nx64 kbit/s signals, the DX1 converts the signals and processes the frames. Then,
the DX1 transmits the signals to the 64 kbit/s timeslot cross-connect module. The timeslot cross-
connect module cross-connects and grooms the signals at the 64 kbit/s granularity, and transmits
the signals to the framing/deframing module. Finally, the framing/deframing module maps the
signals into VC-4s and transmits the signals to the SDH cross-connect unit.

The logic and control module performs the board communication, board control, and service
configuration functions. In addition, the logic and control module traces and selects the clock
signals and frame header signals sent from the active and standby cross-connect boards.
Power Module
The power module provides all the modules of the DX1 with the required DC voltages.
7.8.5 Front Panel

The front panel of the DX1 has indicators.

Figure 7-44 shows the appearance of the front panel of the DX1.

Figure 7-44 Front panel of the DX1
DX1
STAT
ACT
PROG
SRV
DX1
Indicators
Interfaces
The front panel of the DX1 does not have an interface.
One DX1 board needs to work with two DM12 boards to receive and transmit the framed E1
signals and Nx64 kbit/s signals. For details, see the topic that describes the DM12.


The DX1 does not have any jumpers or DIP switches that are used for board settings.
7.8.7 Valid Slots

The DX1 must be used with the DM12. In addition, the DX1 must be installed in a valid slot in
the subrack. Otherwise, the DX1 cannot work normally.
The DX1 can be installed in slots 5–7, 12, and 13.
Table 7-36 lists the slots valid for the DX1 and the corresponding slots for the DM12.
Table 7-36 Slots valid for the DX1 and the corresponding slots for the DM12
Slot Valid for the DX1 Corresponding Slot for the DM12
NOTE
slots 6, 7, 12, and 13.
l One DX1 needs to work with two DM12 boards to access eight channels of Nx64 kbit/s signals. The
DM12 in the slot with a smaller slot number is used to access eight channels of framed E1 signals and
four channels of Nx64 kbit/s signals. The DM12 in the slot with a larger slot number is used to access
four channels of Nx64 kbit/s signals.
7.8.8 Feature Code

The feature code of the DX1 indicates the type of interface impedance.
Table 7-37 provides the relationship between the feature code of the DX1 and the type of
interface impedance.
Table 7-37 Relationship between the feature code of the DX1 and the type of interface
impedance
SSN1DX1A01 A01 75-ohm
SSN1DX1B01 B01 120-ohm


The DX1 supports the 1:N TPS protection.
The DX1 can be configured into one 1:N (N≤4) TPS protection group when the DX1 works with
the DM12.
Figure 7-45 shows the TPS protection provided by the DX1.
Figure 7-45 TPS protection provided by the DX1

Switching
control bus
Interface board
Interface board
Interface board
Interface board
Interface board
Interface board
2 1 2 1 2 1 2 1
timing board
connect and
Cross-
Protection bus
Protection bus
Working board N
Protection board
Working board 1
Working board
Failed
When the cross-connect and timing board detects that a working DX1 is faulty, the cross-connect
and timing board issues a service switching command to control the interface board to switch
the services from the faulty board to the protection board, which realizes the protection of the
services.
Figure 7-46 shows the slot configuration for the TPS protection of the DX1.

Figure 7-46 Slot configuration for the 1:4 TPS protection of the DX1
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
Protection 0 1 2 3 4 5 6 7 8
Working
Working
Working
Working
CXL 16
CXL 16
DM12
DM12
DM12
DM12
DM12
DM12
DM12
DM12
SAP
Fiber routing area
PIU FAN FAN PIU

In Figure 7-46, the board in slot 5 protects the boards in slots 6, 7, 12, and 13.
Table 7-38 lists the slots for the DX1 and DM12.
Table 7-38 Slots for the DX1 and DM12
Board Protection Group
PD3 (working board) Slots 6, 7, 12, and 13
PD3 (protection board) Slot 5
DM12 Slots 1–4 and 15–18




is correct.
----End


NOTE
----End

----End


Boards.
----End

You can set the parameters for the DX1 by using the U2000.
You can set the following parameters for the DX1 by using the U2000:
l J2 byte
l Protocol mode of serial ports
l DDN clock source management

Troubleshooting
Table 7-39 lists the faults that occur on the DX1 frequently and the troubleshooting methods.
Table 7-39 Methods used to troubleshoot the faults that occur on the DX1 frequently

Symptom

performed.
the boards are
inconsistent.

faulty.


Symptom

very low.

switching Faults.
failure
Replacing the Board

NOTE
replace the board.
For information on how to replace the DX1, see Replacing a PDH Board.

7.8.13.1 N1DX1
BD_STATUS BDID_ERROR BIP_EXC
BIP_SD CHIP_ABN CHIP_FAIL
COMMUN_FAIL CRC4_ERR_OVER CTS
DCD DDN_AIS DDN_ALOS
DDN_CRC4_ERR_OVER DDN_LFA DDN_LMFA
DDN_LOOP_ALM DDN_RFA DDN_RMFA
DOWN_E1_AIS DSR DTR
E1_LOC FPGA_ABN LFA
LMFA LOOP_ALM LP_R_FIFO
LP_RDI LP_REI LP_RFI
LP_SLM LP_T_FIFO LP_TIM
LP_UNEQ NO_BD_SOFT PLL_FAIL
POWER_ABNORMAL R_FIFO_E RFA

RMFA RTS SLAVE_WORKING
SPARE_PATH_ALM SUBCARD_ABN TEMP_OVER
T_FIFO_E T_LOSEX TR_LOC
TEST_STATUS TPS_ALM UP_E1_AIS
TU_AIS TU_LOP PATCH_NOT_CONFIRM
V5_VCAIS PATCH_ERR PATCHFILE_NOTEXIST
SWDL_PKG_NOBDSOFT SYNC_C_LOS

7.8.14.1 N1DX1
LPBBE LPCSES LPFECSES
LPFEUAS LPES LPSES
LPUAS LPFEBBE LPFEES
LPFESES TUPJCHIGH TUPJCLOW
CRC4_ERR DDN_CRC4_ERR

The technical specifications of the DX1 include the parameters specified for electrical interfaces,

The DM12 provides electrical interfaces for the DX1. For the parameters specified for the
electrical interfaces, see Technical Specifications of the DM12.
The mechanical specifications of the DX1 are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the DX1 at room temperature (25°C) is 15 W.

7.9 DXA
technical specifications of the DXA (DDN service converging and processing board).

The DXA is available in one functional version, namely, N1.
7.9.2 Application
The DXA is a DDN service processing board. The DXA can be used on the OptiX OSN
equipment series to access and converge DDN services. To cross-connect the 63 channels of
Nx64 kbit/s signals and framed E1 signals on the system side.
The DXA cross-connects 63xE1 signals at the 64 kbit/s level on the system side.
The DXA consists of the timeslot cross-connect module, framing/deframing module, mapping/
demapping module, logic and control module, and power module.
7.9.5 Front Panel
The front panel of the DXA has indicators.
7.9.6 Valid Slots
The DXA can be installed in slots 5–8 and 11–13 in the subrack.
You can set the parameters for the DXA by using the U2000.
The technical specifications of the DXA include the mechanical specifications and power
consumption.

The DXA is available in one functional version, namely, N1.
7.9.2 Application
The DXA is a DDN service processing board. The DXA can be used on the OptiX OSN
equipment series to access and converge DDN services. To cross-connect the 63 channels of
Nx64 kbit/s signals and framed E1 signals on the system side.
Figure 7-47 shows the application of the DDN service processing boards. The DDN service
processing boards add DDN service signals to line signals and drops line signals to DDN service
signals.

Figure 7-47 Networking and application of the DDN service processing boards
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The DXA cross-connects 63xE1 signals at the 64 kbit/s level on the system side.
Table 7-40 provides the functions and features of the DXA.
Table 7-40 Functions and features of the DXA

Function and DXA
Feature
Basic functions Cross-connects 63 channels of framed E1 signals.
Maintenance Supports inloops and outloops.

features
Supports the CRC function.

The DXA consists of the timeslot cross-connect module, framing/deframing module, mapping/
demapping module, logic and control module, and power module.
Figure 7-48 shows the functional block diagram of the DXA.

Figure 7-48 Functional block diagram of the DXA

Backplane
64 kbit/s Signal
timeslot Framing/
Deframing mapping/ Cross-
cross- demapping
module connect unit
connect module
module
Logic and

module -48 V/-60 V
Power
module Fuse
+3.3 V
backup power
In the Transmit Direction

The mapping/demapping module demaps the VC-4 signals sent from the SDH cross-connect
unit and sends the demapped signals to the framing/deframing module. Then, the framing/
deframing module converts the signals into the framed E1 signals and sends the framed E1
signals to the timeslot cross-connect module. Finally, the timeslot cross-connect module cross-
connects and grooms the signals at the 64 kbit/s granularity.
In the Receive Direction

The timeslot cross-connect module cross-connects and grooms the signals at the 64 kbit/s
granularity, and transmits the signals to the framing/deframing module. Then, the framing/
deframing module maps the signals into VC-4s and transmits the signals to the SDH cross-
connect unit.

The logic and control module performs the board communication, board control, and service
configuration functions. In addition, the logic and control module traces and selects the clock
signals and frame header signals sent from the active and standby cross-connect boards.
Power Module
The power module provides all the modules of the DX1 with the required DC voltages.
7.9.5 Front Panel

The front panel of the DXA has indicators.


Figure 7-49 shows the appearance of the front panel of the DXA.
Figure 7-49 Front panel of the DXA
DXA
STAT
ACT
PROG
SRV
DXA
Indicators

Interfaces
The front panel of the DXA does not have an interface.
7.9.6 Valid Slots

The DXA can be installed in slots 5–8 and 11–13 in the subrack.

You can set the parameters for the DXA by using the U2000.
You can set the following parameters for the DXA by using the U2000:
l J2 byte
l Protocol mode of serial ports
l DDN clock source management

The technical specifications of the DXA include the mechanical specifications and power
consumption.
The mechanical specifications of the DXA are as follows:
l Weight (kg): 0.8
Power Consumption
The maximum power consumption of the DXA at room temperature (25°C) is 10 W.
7.10 SPQ4
technical specifications of the SPQ4 (4xE4/STM-1 electrical processing board). This topic also
describes how to configure and commission the SPQ4.

The SPQ4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to their functions. The N1SPQ4 is discontinued.
7.10.2 Application
The SPQ4 is a PDH processing board. The SPQ4 can be used on the OptiX OSN equipment
series to transmit and receive E4/STM-1 electrical signals. To access and process 4xE4/STM-1
electrical signals, the SPQ4 must be used with the interface board.


The SPQ4 processes 4xE4/STM-1 electrical signals, processes overhead bytes, reports alarms
and performance events, provides maintenance features, and supports protection schemes.
The SPQ4 consists of the interface module, mapping/demapping module, SDH overhead
processing module, interface converting module, logic and control module, and power module.
7.10.5 Front Panel
The front panel of the SPQ4 has indicators.
The SPQ4 does not have any jumpers or DIP switches that are used for board settings.
7.10.7 Valid Slots
The SPQ4 must be used with the MU04. In addition, the SPQ4 must be installed in a valid slot
in the subrack. Otherwise, the SPQ4 fails to work normally.
7.10.8 Feature Code
The SPQ4 does not have a feature code.
The SPQ4 supports the 1:N TPS protection.
You can set the parameters for the SPQ4 by using the U2000.
The technical specifications of the SPQ4 include the parameters specified for electrical

The SPQ4 is available in two functional versions, namely, N1 and N2. The difference between
the two versions is with regard to their functions. The N1SPQ4 is discontinued.
Table 7-41 describes the versions of the SPQ4.

Table 7-41 Versions of the SPQ4
Item Description
Functional versions The SPQ4 is available in two functional versions, namely, N1 and N2.
Differences The equipment of the V100R001 and V100R002 versions supports

the N1SPQ4. The equipment of the V100R003 and later versions
supports the N2SPQ2.
Substitution The N1SPQ4 can be replaced with the N2SPQ4. When the N1SPQ4
is replaced with the N2SPQ4, the NE software needs to be upgraded.
7.10.2 Application
The SPQ4 is a PDH processing board. The SPQ4 can be used on the OptiX OSN equipment
series to transmit and receive E4/STM-1 electrical signals. To access and process 4xE4/STM-1
electrical signals, the SPQ4 must be used with the interface board.
NE1
NE2 NE4
NE3
Service flow
Line board
Tributary board

The SPQ4 processes 4xE4/STM-1 electrical signals, processes overhead bytes, reports alarms
and performance events, provides maintenance features, and supports protection schemes.
Table 7-42 provides the functions and features of the SPQ4.

Table 7-42 Functions and features of the SPQ4

Function and SPQ4
Feature
Basic functions Processes 4xSTM-1/E4 signals.
Service Accesses and processes 4xE4/STM-1 electrical signals. The E4 signals

processing and STM-1 signals are compatible on each channel. Supports the VC-12
services, VC-3 services, and VC-4 services.
Overhead l Processes the section overheads of the STM-1 signals, such as B1,
processing B2, K1, K2, M1, F1, and D1–D12.
overhead bytes including J1, B3, C2, G1, and H4.
l Supports the setting and query of the J0, J1, and C2 bytes.
events

services.
l Does not support the CRC function.
Protection l Supports the TPS protection when working with the interface board
schemes and the switching and bridging board.
l Supports the Two-fiber ring MSP.

The SPQ4 consists of the interface module, mapping/demapping module, SDH overhead
processing module, interface converting module, logic and control module, and power module.
Figure 7-51 shows the functional block diagram of the SPQ4. Figure 7-52 shows the functional
block diagram of the mapping/demapping module. Figure 7-53 shows the functional block
diagram of the SDH overhead processing module.

Figure 7-51 Functional block diagram of the SPQ4

Backplane
Reference
34 MHz 155 MHz clock Cross-connect
OSC PLL unit
Mapping/ High-speed
4x139 Mbit/s Demapping 4x155 Mbit/s Cross-connect
LIU bus
E4/STM-1 Interface
PPI/SPI
module unit A
converting
4x155 Mbit/s
SDH
4x155 Mbit/s module High-speed
LIU overhead bus Cross-connect
processing unit B
Interface module
module DCC SCC unit
K1 and K2
Cross-connect
unit
EN 140 Mbit/s/155 Mbit/s Frame header Cross-connect

LOS Logic and unit
Outloop/Inloop control SCC unit
+3.3 V
module Fuse
+3.3 V backup power

OSC: oscillator -

139 Mbit/s 155 Mbit/s

LPA HPT PG MST RST
PDH AIS E4 AIS E4 AIS

detector insertion J1/C2/B3 insertion

SIPO LPA HPT MST RST

Figure 7-53 Functional block diagram of the SDH overhead processing module
K1 and K2 insertion/
extraction Cross-connect unit
155 Mbit/s
155 Mbit/s
RST MST MSA HPT

155 Mbit/s
155 Mbit/s
DCC SCC unit
Interface Module

The SPI module consists of LIUs and provides the inloop and outloop functions. The SPI module

l Processes the R_LOS signals.
SDH Overhead Processing Module (155 Mbit/s SDH Signals)

The SDH overhead processing module performs the functions that are required to manage 155
Mbit/s SDH signals.
l RST Sub-Module
– In the receive direction, the RST sub-module detects the frame alignment bytes (A1 and
A2), restores the regenerator section trace byte (J0), detects a J0 mismatch, and counts
BIP-8 errored blocks.
– In the transmit direction, the RST sub-module inserts the frame alignment bytes, inserts
the J0 byte, and performs BIP-8 calculation and byte insertion.
l MST Sub-Module
– In the receive direction, the MST sub-module counts BIP-24 errored blocks, restores
the MS_REI, and detects the MS_RDI and MS_AIS.

– In the transmit direction, the MST sub-module performs BIP-24 calculation and
insertion and inserts the MS_REI, MS_RDI, and MS_AIS.
– The MST sub-module extracts or inserts the K1 byte and K2 byte.
l MSA Sub-Module
– In the receive direction, the MSA sub-module interprets the AU-4 pointer, detects the
LOP and AIS, and performs pointer justifications.
AU-4 pointer and the AU_AIS.
l HPT Sub-Module
– Terminates the overheads.
– Restores the J1 path trace message.
– Restores the REI information.
– Detects the HP_RDI (monitors the status of the path).
– Detects the UNEQ and AIS (monitors the signal label).
– Counts the VC-4 BIP-8 errored blocks.
Mapping/Demapping Module (140 Mbit/s PDH Signals)

The mapping/demapping module performs the functions that are required to manage 140 Mbit/
s PDH signals.
l LPA Sub-Module
The 140 Mbit/s plesiochronous stream is inserted in a C4 container to be adapted so that
the stream can be transported to the synchronous network. The PDH AIS is monitored and
the E4 AIS in inserted.
l HPT Sub-Module
C4 container and POH. The POH contains nine octets equally distributed within the frame.
The following overhead bytes can be extracted: J1, B3. C2, G1, F2, H4, F3, K3, and N1.
The E4 AIS can be inserted in the downstream direction.
l Pointer generator (PG)
A fixed pointer value is inserted into the SOH to structure the AU-4 signal.
l MST Sub-Module and RST Sub-Module
converting module can be connected. In the receive direction, these sub-modules detect the
frame alignment bytes (A1 and A2).




the GSCC is not in position.
units.
Power Module
require.
7.10.5 Front Panel

The front panel of the SPQ4 has indicators.

Figure 7-54 shows the appearance of the front panel of the SPQ4.

Figure 7-54 Front panel of the SPQ4
SPQ4
STAT
ACT
PROG
SRV
SPQ4
Indicators
Interfaces
The front panel of the SPQ4 does not have an interface. Hence, the SPQ4 needs to work with
the MU04 to receive and transmit the E4/STM-1 signals. For details, see the topic that describes
the MU04.


The SPQ4 does not have any jumpers or DIP switches that are used for board settings.
7.10.7 Valid Slots

The SPQ4 must be used with the MU04. In addition, the SPQ4 must be installed in a valid slot
in the subrack. Otherwise, the SPQ4 fails to work normally.
The SPQ4 can be installed in slots 6, 7, 12, and 13.
Table 7-43 lists the slots valid for the SPQ4 and the corresponding slots for the MU04.
Table 7-43 Slots valid for the SPQ4 and the corresponding slots for the MU04
Slot Valid for the SPQ4 Corresponding Slot for the MU04
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17
7.10.8 Feature Code

The SPQ4 does not have a feature code.

The SPQ4 supports the 1:N TPS protection.
The SPQ4 can be configured into two 1:1 TPS protection groups when the SPQ4 works with
the MU04 and TSB8/TSB4.
Figure 7-55 shows the TPS protection provided by the SPQ4.

Figure 7-55 TPS protection provided by the SPQ4

Switching
control bus
Interface board N
Interface board 1
switching board
Interface board
N 1 Protection 1 2 1 2
timing board
connect and
Cross-
Working board N
Protection board
Working board 1
Working board
Failed
l Normal state
the working board through position 1 of the control switch on the interface board.
l Switching state
NOTE
Figure 7-56 shows the slot configuration for the 1:1 TPS protection of the SPQ4.

Figure 7-56 Slot configuration for the two 1:1 TPS protection groups of the SPQ4
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
TSB8/TSB4
TSB8/TSB4
Protection 1
Protection 2
Working 1
Working 2
CXL 16
CXL 16
MU04
MU04
SAP
Fiber routing area
PIU FAN FAN PIU

Table 7-44 lists the slots for the SPQ4, MU04, and TSB8/TSB4.
Table 7-44 Slots for the SPQ4, MU04, and TSB8/TSB4
SPQ4 (working Slot 7 Slot 12

board)
SPQ4 (protection Slot 6 Slot 13

board)
MU04 Slot 3 Slot 15
TSB8/TSB4 Slot 1 Slot 17



is correct.
----End

NOTE
----End


----End

Boards.
----End

You can set the parameters for the SPQ4 by using the U2000.
You can set the following parameters for the SPQ4 by using the U2000:
l J1 byte
l C2 byte

Troubleshooting
Table 7-45 lists the faults that occur on the SPQ4 frequently and the troubleshooting methods.
Table 7-45 Methods used to troubleshoot the faults that occur on the SPQ4 frequently

Symptom

performed.
the boards are
inconsistent.

faulty.


Symptom

very low.

switching Faults.
failure
Replacing the Board

NOTE
replace the board.
For information on how to replace the SPQ4, see Replacing a PDH Board.

7.10.13.1 N1SPQ4
AU_AIS AU_LOP B1_EXC
B1_SD B2_EXC B2_SD
B3_EXC B3_EXC_VC3 B3_SD
B3_SD_VC3 BD_STATUS BDID_ERROR
BIP_EXC BIP_SD BIP8_ECC
C4_R_LAISD C4_T_LAISD CHIP_FAIL
COMMUN_FAIL EXT_LOS FPGA_ABN
FSELECT_STG HP_LOM HP_RDI
HP_REI HP_SLM HP_TIM
HP_UNEQ J0_MM LOOP_ALM
LP_RDI_VC12 LP_RDI_VC3 LP_REI_VC12

MS_REI NO_BD_SOFT OH_LOOP
PLL_FAIL POWER_ABNORMAL R_LOC
R_LOF R_LOS R_OOF
RELAY_FAIL SLAVE_WORKING SPARE_PATH_ALM
TPS_ALM TR_LOC TU_AIS_VC12
TU_AIS_VC3 TU_LOP_VC12 TU_LOP_VC3
W_R_FAIL PATCHFILE_NOTEXIST PATCH_ERR
PATCH_NOT_CONFIRM SWDL_PKG_NOBDSOFT
7.10.13.2 N2SPQ4
B1_SD B2_EXC B2_SD
BIP_EXC BIP_SD BIP8_ECC
C4_R_LAISD C4_T_LAISD CHIP_FAIL
COMMUN_FAIL EXT_LOS FPGA_ABN
FSELECT_STG HP_LOM HP_RDI
HP_UNEQ J0_MM LOOP_ALM
MS_REI NO_BD_SOFT OH_LOOP
PLL_FAIL POWER_ABNORMAL R_LOC
R_LOF R_LOS R_OOF
RELAY_FAIL SLAVE_WORKING SPARE_PATH_ALM

PATCH_NOT_CONFIRM PS SWDL_PKG_NOBDSOFT

7.10.14.1 N1SPQ4
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES
MSSES MSUAS RSBBE
RSCSES RSES RSOFS
RSSES RSUAS
7.10.14.2 N2SPQ4
HPBBE HPCSES HPES
HPUAS MSBBE MSCSES

MSSES MSUAS RSBBE
RSCSES RSES RSOFS
RSSES RSUAS

The technical specifications of the SPQ4 include the parameters specified for electrical

The MU04 provides electrical interfaces for the SPQ4. For the parameters specified for the
electrical interfaces, see Technical Specifications of the MU04.
The mechanical specifications of the SPQ4 are as follows:

l Weight (kg): 0.9
Power Consumption
The maximum power consumption of the SPQ4 at room temperature (25°C) is 24 W.
7.11 D12B
technical specifications of the D12B (32xE1/T1 access board).

The D12B is available in one functional version, namely, N1.
7.11.2 Application
The D12B is a PDH interface board. The D12B can be used on the OptiX OSN equipment series
to transmit and receive signals for the PDH processing board. To access and process signals, the
interface board must be used with its corresponding processing board.
The D12B receives and transmits 32xE1/T1 electrical signals. The D12B must work with the
PD1, PQ1, or PQM.
The D12B has the interface module.
7.11.5 Front Panel
The front panel of the D12B has interfaces and a bar code.
7.11.6 Valid Slots

The D12B can be installed in slots 1–4 and 15–18 in the subrack and works as the interface board
of the PQ1, PQM, PD1.
The technical specifications of the D12B include the parameters specified for the electrical
interfaces, mechanical specifications and power consumption.

The D12B is available in one functional version, namely, N1.
7.11.2 Application
The D12B is a PDH interface board. The D12B can be used on the OptiX OSN equipment series
to transmit and receive signals for the PDH processing board. To access and process signals, the
interface board must be used with its corresponding processing board.

The D12B receives and transmits 32xE1/T1 electrical signals. The D12B must work with the
PD1, PQ1, or PQM.

The D12B has the interface module.
Figure 7-57 shows the functional block diagram of the D12B by describing how to process
1xE1/T1 signals.
Figure 7-57 Functional block diagram of the D12B

Backplane
E1/T1 electrical signal PQ1/PQM/PO1

Interface
module
E1/T1 electrical signal PQ1/PQM/PO1
Interface Module
The interface module receives and transmits the E1/T1 electrical signals.
7.11.5 Front Panel

The front panel of the D12B has interfaces and a bar code.


Figure 7-58 shows the appearance of the front panel of the D12B.
Figure 7-58 Front panel of the D12B
D12B
1~8
9~16
17~24
25~32
D12B
Interfaces
The front panel of the D12B has four DB44 interfaces. Table 7-46 describes the types and usage
of the interfaces of the D12B.

Table 7-46 Interfaces of the D12B

Interface
1–8 DB44 Receives the 1st to the 8th channels of E1/T1

signals.
9–16 DB44 Receives the 9th to the 16th channels of E1/T1

signals.

signals.
25–32 DB44 Receives the 25th to the 32nd channels of E1/T1

signals.
Table 7-47 provides the pin assignments of the DB44 interface.
Table 7-47 Pin assignments of the DB44 interface

Front View Pin Usage Pin Usage
30
15
38 Receives the 1st 34 Receives the 5th
channel of signals channel of signals
44 23 19
(R1). (R5).
37 Receives the 2nd 33 Receives the 6th

22 (R2). 18 (R6).
36 Receives the 3rd 32 Receives the 7th

21 (R3). 17 (R7).
35 Receives the 4th 31 Receives the 8th

31 channel of signals channel of signals
16 1 20 (R4). 16 (R8).
15 Transmits the 1st 11 Transmits the 5th

30 (T1). 26 (T5).
14 Transmits the 2nd 10 Transmits the 6th

29 (T2). 25 (T6).
13 Transmits the 3rd 9 Transmits the 7th

28 (T3). 24 (T7).
12 Transmits the 4th 8 Transmits the 8th

27 (T4). 7 (T8).

7.11.6 Valid Slots

The D12B can be installed in slots 1–4 and 15–18 in the subrack and works as the interface board
of the PQ1, PQM, PD1.
Table 7-48 lists the slots valid for the PQ1/PQM/PD1 and the corresponding slots for the D12B.
The D12B installed in the slot with a smaller number accesses the 1st to the 32nd channels of
E1/T1 electrical signals. The D12B installed in the slot with a larger number accesses the 33rd
to the 63rd channels of E1/T1 electrical signals.
Table 7-48 Slots valid for the PQ1/PQM/PD1 and the corresponding slots for the D12B
Slot Valid for the PQ1/PQM/PD1 Corresponding Slot for the D12B

The technical specifications of the D12B include the parameters specified for the electrical
Table 7-49 Parameters specified for the electrical interfaces of the D12B
Line code pattern B8ZS and AMI HDB3

interface

interface

interface

the input interface

824. 823.
Anti-interference capability at - Complies with ITU-T G.



Combined jitter
Jitter transfer function - Complies with ITU-T G.

742.
The mechanical specifications of the D12B are as follows:
l Weight (kg): 0.3
Power Consumption
The maximum power consumption of the D12B at room temperature (25°C) is 0 W.
7.12 D12S

The D12S is available in one functional version, namely, N1.
7.12.2 Application
The D12S is a PDH interface switching board. The D12S can be used on the OptiX OSN
equipment series to transmit and receive signals for the PDH processing board. In addition, when
the corresponding PDH processing board is configured with the TPS protection, the interface
switching board is required to perform the TPS protection.
The D12S receives and transmits 32xE1/T1 electrical signals. The D12S must work with the
PQ1, PD1, or PQM.
The D12S consists of the interface module, switch matrix module, and power access circuit.
7.12.5 Front Panel
The front panel of the D12S has interfaces and a bar code.
7.12.6 Valid Slots
The D12S can be installed in slots 1–4 and 15–18 in the subrack and works as the interface board
of the PQ1, PD1, or PQM.

The technical specifications of the D12S include the parameters specified for the electrical

7.12.2 Application

The D12S receives and transmits 32xE1/T1 electrical signals. The D12S must work with the
PQ1, PD1, or PQM.

Figure 7-59 shows the functional block diagram of the D12S by describing how to process 1xE1/
T1 signals.
Figure 7-59 Functional block diagram of the D12S

Backplane
Cross-connect board
E1/T1 electrical
signal Switch PQ1/PD1/PQM
Interface
matrix
module
module
E1/T1 electrical PQ1/PD1/PQM
signal
+3.3 V Fuse
+3.3 V power
Interface Module


module transmits the signal to the PQ1/PD1 or PQM. When the TPS is performed, the switch
matrix module transmits the signal to the protection board for bridging.
Power Access Circuit

The power access circuit provides all the modules of the D12S with the required DC voltages.
7.12.5 Front Panel


Figure 7-60 shows the appearance of the front panel of the D12S.

Figure 7-60 Front panel of the D12S
D12S
1~8
9~16
17~24
25~32
D12S
Interfaces
The front panel of the D12S has four DB44 interfaces. Table 7-50 describes the types and usage
of the interfaces of the D12S.
Table 7-50 Interfaces of the D12S

Interface
1–8 DB44 Receives the 1st to the 8th channels of E1/T1

signals.

signals.


Interface

signals.
25–32 DB44 Receives the 25th to the 32nd channels of E1/T1

signals.
30
15
44 23 19
(R1). (R5).

22 (R2). 18 (R6).

21 (R3). 17 (R7).

16 1 20 (R4). 16 (R8).

30 (T1). 26 (T5).

29 (T2). 25 (T6).

28 (T3). 24 (T7).

27 (T4). 7 (T8).
7.12.6 Valid Slots

of the PQ1, PD1, or PQM.

Table 7-52 lists the slots valid for the PQ1/PD1/PQM and the corresponding slots for the D12S.
The D12S installed in the slot with a smaller number accesses the 1st to the 32nd channels of
E1/T1 electrical signals. The D12S installed in the slot with a larger number accesses the 33rd
to the 63rd channels of E1/T1 electrical signals.
Table 7-52 Slots valid for the PQ1/PD1/PQM and the corresponding slots for the D12S
Slot Valid for the PQ1/PD1/PQM Corresponding Slot for the D12S

Table 7-53 Parameters specified for the electrical interfaces of the D12S
Line code pattern B8ZS and AMI HDB3

interface

interface

interface

the input interface

824. 823.
Anti-interference capability at - Complies with ITU-T G.



Combined jitter
Jitter transfer function - Complies with ITU-T G.

742.
The mechanical specifications of the D12S are as follows:
l Weight (kg): 0.4
Power Consumption
At room temperature (25°C), the maximum power consumption of the D12S is 0 W.
7.13 D75S
technical specifications of the D75S (32xE1 switching access board).

7.13.2 Application
The D75S receives and transmits 32xE1 electrical signals. The D75S must work with the PQ1/
PD1.
7.13.5 Front Panel
7.13.6 Valid Slots
of the PQ1.


7.13.2 Application

The D75S receives and transmits 32xE1 electrical signals. The D75S must work with the PQ1/
PD1.

Figure 7-61 shows the functional block diagram of the D75S by describing how to process 1xE1
signals.
Backplane
Cross-connect board
E1 electrical signal PQ1/PD1

Switch
Interface
matrix
module module
E1 electrical signal PQ1/PD1
+3.3 V Fuse
+3.3 V power
Interface Module
The interface module receives and transmits the E1 electrical signals.

module transmits the signal to the PQ1/PD1. When the TPS is performed, the switch matrix
module transmits the signal to the protection board for bridging.


7.13.5 Front Panel


D75S
1~8
9~16
17~24
25~32
D75S
Interfaces
The front panel of the D75S has four DB44 interfaces. Table 7-54 describes the types and usage
of the interfaces of the D75S.


Interface
1–8 DB44 Receives the 1st to the 8th channels of E1 signals.
9–16 DB44 Receives the 9th to the 16th channels of E1

signals.
17–24 DB44 Receives the 17th to the 24th channels of E1

signals.
25–32 DB44 Receives the 25th to the 32nd channels of E1

signals.
30
15
44 23 19
(R1). (R5).

22 (R2). 18 (R6).

21 (R3). 17 (R7).

16 1 20 (R4). 16 (R8).

30 (T1). 26 (T5).

29 (T2). 25 (T6).

28 (T3). 24 (T7).

27 (T4). 7 (T8).

7.13.6 Valid Slots

of the PQ1.
Table 7-56 lists the slots valid for the PQ1 and the corresponding slots for the D75S. The D75S
installed in the slot with a smaller number accesses the 1st to the 32nd channels of E1 electrical
signals. The D75S installed in the slot with a larger number accesses the 33rd to the 63rd channels
of E1 electrical signals.
Table 7-56 Slots valid for the PQ1 and the corresponding slots for the D75S
Slot Valid for the PQ1 Corresponding Slot for the D75S

Line code pattern HDB3
Waveform at the output interface Complies with ITU-T G.703.
Signal bit rate at the output interface

interface
Allowed frequency deviation at the Complies with ITU-T G.823.

input interface
Anti-interference capability at the Complies with ITU-T G.703.

input interface
Reflection attenuation at the input/

output interface

Output jitter Complies with ITU-T G.823 and G.

824.
Combined jitter
Jitter transfer function Complies with ITU-T G.742.

l Weight (kg): 0.4
Power Consumption
7.14 D34S

7.14.2 Application
The D34S receives and transmits 6xE3/T3 electrical signals. The D34S must work with the PD3
or PQ3.
7.14.5 Front Panel
7.14.6 Valid Slots
The D34S can be installed in slots 1–4 and 15–18 in the subrack.
The technical specifications of the D34S include the parameters specified for electrical


7.14.2 Application

The D34S receives and transmits 6xE3/T3 electrical signals. The D34S must work with the PD3
or PQ3.

Figure 7-63 shows the functional block diagram of the D34S by describing how to process 1xE3/
T3 signals.

Backplane
Cross-connect board
E3/T3 electrical
signal Switch PD3/PQ3
Interface TSB8
matrix
module
module TSB8
E3/T3 electrical PD3/PQ3
signal
+3.3 V Fuse
+3.3 V power
Interface Module


module transmits the signal to the PD3 or PQ3. When the TPS is performed, the switch matrix
module transmits the signal to the TSB8 for bridging.

7.14.5 Front Panel


D34S
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
OUT5
IN5
OUT6
IN6
D34S

Interfaces
The front panel of the D34S has six pairs of electrical interfaces.
Table 7-58 describes the types and usage of the interfaces of the D34S.

Interface
IN1–IN6 SMB Receives the 1st to the 6th channels of E3/T3

electrical signals.
OUT1–OUT6 SMB Transmits the 1st to the 6th channels of E3/T3

electrical signals.
7.14.6 Valid Slots

The D34S can be installed in slots 1–4 and 15–18 in the subrack.

The technical specifications of the D34S include the parameters specified for electrical

Table 7-59 lists the parameters specified for the electrical interfaces of the D34S.

interface

interface

interface

the input interface
Input jitter tolerance Complies with ITU-T G. Complies with ITU-T G.824.
823.



Combined jitter

751.

l Weight (kg): 0.4
Power Consumption
7.15 C34S
technical specifications of the C34S (3xE3/T3 switching access board).

The C34S is available in one functional version, namely, N1.
7.15.2 Application
The C34S is a PDH interface switching board. The C34S can be used on the OptiX OSN
The C34S receives and transmits 3xE3/T3 electrical signals. The C34S must work with the PL3.
The C34S consists of the interface module, switch matrix module, and power access circuit.
7.15.5 Front Panel
The front panel of the C34S has interfaces and a bar code.
7.15.6 Valid Slots
The C34S can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the PL3.

The technical specifications of the C34S include the parameters specified for electrical

The C34S is available in one functional version, namely, N1.
7.15.2 Application
The C34S is a PDH interface switching board. The C34S can be used on the OptiX OSN

The C34S receives and transmits 3xE3/T3 electrical signals. The C34S must work with the PL3.

The C34S consists of the interface module, switch matrix module, and power access circuit.
Figure 7-65 shows the functional block diagram of the C34S by describing how to process 1xE3/
T3 signals.
Figure 7-65 Functional block diagram of the C34S

Backplane
Cross-connect board
E3/T3 electrical
signal Switch PL3
Interface TSB4/TSB8
module matrix
module TSB4/TSB8
E3/T3 electrical PL3
signal
+3.3 V Fuse
+3.3 V power
Interface Module


module transmits the signal to the PL3. When the TPS is performed, the switch matrix module

The power access circuit provides all the modules of the C34S with the required DC voltages.
7.15.5 Front Panel

The front panel of the C34S has interfaces and a bar code.

Figure 7-66 shows the appearance of the front panel of the C34S.
Figure 7-66 Front panel of the C34S
C34S
OUT1
IN1
OUT2
IN2
OUT3
IN3
C34S

Interfaces
The front panel of the C34S has three pairs of electrical interfaces.
Table 7-60 describes the type and usage of the interface of the C34S.
Table 7-60 Interfaces of the C34S
IN1–IN3 SMB Receives the 1st to the 3rd channels of E3/T3

electrical signals.
OUT1–OUT3 SMB Transmits the 1st to the 3rd channels of E3/T3

electrical signals.
7.15.6 Valid Slots

The C34S can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the PL3.
Table 7-61 lists the slots valid for the PL3 and the corresponding slots for the C34S.
Table 7-61 Slots valid for the PL3 and the corresponding slots for the C34S
Slot Valid for the PL3 Corresponding Slot for the C34S
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17

The technical specifications of the C34S include the parameters specified for electrical

Table 7-62 lists the parameters specified for the electrical interfaces of the C34S.
Table 7-62 Parameters specified for the electrical interfaces of the C34S


interface

interface

interface

the input interface
823.


Combined jitter

751.
The mechanical specifications of the C34S are as follows:
l Weight (kg): 0.3
Power Consumption
At room temperature (25°C), the maximum power consumption of the C34S is 0 W.
7.16 MU04
technical specifications of the MU04 (4xE4/STM-1 electrical interface board).

The MU04 is available in one functional version, namely, N1.
7.16.2 Application
The MU04 is an E4/STM-1 electrical interface board. The MU04 can be used on the OptiX OSN
equipment series to transmit and receive signals for the E4/STM-1 electrical processing board.


The MU04 receives and transmits 4xE4/STM-1 electrical signals. The MU04 must work with
the SPQ4.
The MU04 consists of the interface module, switch matrix module, and power module.
7.16.5 Front Panel
The front panel of the MU04 has interfaces and a bar code.
7.16.6 Valid Slots
The MU04 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the SPQ4.
The technical specifications of the MU04 include the parameters specified for electrical

The MU04 is available in one functional version, namely, N1.
7.16.2 Application
The MU04 is an E4/STM-1 electrical interface board. The MU04 can be used on the OptiX OSN
equipment series to transmit and receive signals for the E4/STM-1 electrical processing board.

The MU04 receives and transmits 4xE4/STM-1 electrical signals. The MU04 must work with
the SPQ4.

The MU04 consists of the interface module, switch matrix module, and power module.
Figure 7-67 shows the functional block diagram of the MU04 by describing how to process
1xE4/STM-1 signals.
Figure 7-67 Functional block diagram of the MU04

Backplane
Cross-connect board
E4/STM-1 electrical
signal SPQ4
Interface Switch TSB4/TSB8
module matrix
module TSB4/TSB8
E4/STM-1 electrical SPQ4
signal
+3.3 V Power Fuse

module +3.3 V power

Interface Module
The interface module receives and transmits the E4/STM-1 electrical signals.

module transmits the signal to the SPQ4. When the TPS is performed, the switch matrix module
Power Module
The power module provides all the modules of the MU04 with the required DC voltages.
7.16.5 Front Panel

The front panel of the MU04 has interfaces and a bar code.

Figure 7-68 shows the appearance of the front panel of the MU04.

Figure 7-68 Front panel of the MU04
MUO4
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
MUO4
Interfaces
The front panel of the MU04 has four pairs of electrical interfaces.
Table 7-63 describes the types and usage of the interfaces of the MU04.
Table 7-63 Interfaces of the MU04

Interface
IN1–IN4 SMB Receives the 1st to the 4th channels of E4/STM-1

electrical signals.
OUT1–OUT4 SMB Transmits the 1st to the 4th channels of E4/STM-1

electrical signals.

7.16.6 Valid Slots

The MU04 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the SPQ4.
Table 7-64 lists the slots valid for the SPQ4 and the corresponding slots for the MU04.
Table 7-64 Slots valid for the SPQ4 and the corresponding slots for the MU04
Slot Valid for the SPQ4 Corresponding Slot for the MU04
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17

The technical specifications of the MU04 include the parameters specified for electrical

Table 7-65 lists the parameters specified for the electrical interfaces of the MU04.
Table 7-65 Parameters specified for the electrical interfaces of the MU04
Line code pattern CMI CMI

interface

interface
Allowed attenuation at the

input interface
Allowed frequency deviation Complies with ITU-T G.823.

at the input interface
823.
Anti-interference capability at - -
the input interface
Reflection attenuation at the Complies with ITU-T G.703.


Mapping jitter Complies with ITU-T G. -

783.
Combined jitter

751.
The mechanical specifications of the MU04 are as follows:

l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the MU04 at room temperature (25°C) is 2 W.
7.17 DM12
technical specifications of the DM12 (DDN service interface board).

The DM12 is available in one functional version, namely, N1.
7.17.2 Application
The DM12 is a DDN service interface board. The DM12 can be used on the OptiX OSN
equipment series to transmit and receive electrical signals of the DDN service.
The DM12 receives and transmits four channels of Nx64 kbit/s signals and eight channels of
framed E1 electrical signals. The DM12 must work with the DX1.
The DM12 consists of the interface module, switch matrix module, and power module.
7.17.5 Front Panel
The front panel of the DM12 has interfaces and a bar code.
7.17.6 Valid Slots
The DM12 can be installed in slots 1–4 and 15–18 in the subrack and works as the interface
board of the DX1.
The technical specifications of the DM12 include the parameters specified for electrical


The DM12 is available in one functional version, namely, N1.
7.17.2 Application
The DM12 is a DDN service interface board. The DM12 can be used on the OptiX OSN
equipment series to transmit and receive electrical signals of the DDN service.

The DM12 receives and transmits four channels of Nx64 kbit/s signals and eight channels of
framed E1 electrical signals. The DM12 must work with the DX1.

The DM12 consists of the interface module, switch matrix module, and power module.
Figure 7-69 shows the functional block diagram of the DM12 by describing how to process one
channel of Nx64 kbit/s or framed E1 electrical signals.
Figure 7-69 Functional block diagram of the DM12

Backplane
Cross-connect board
Nx64 kbit/s/
Framed E1 DX1
electrical signal Interface Switch
module matrix
Nx64 kbit/s/ module
DX1
Framed E1
electrical signal
+3.3 V Power Fuse

+3.3 V backup power
module
Interface Module
The interface module receives and transmits the Nx64 kbit/s or framed E1 electrical signals.

module transmits the signal to the DX1. When the TPS is performed, the switch matrix module
transmits the signal to the protection DX1 for bridging.

Power Module
The power module provides all the modules of the DM12 with the required DC voltages.
7.17.5 Front Panel

The front panel of the DM12 has interfaces and a bar code.

Figure 7-70 shows the appearance of the front panel of the DM12.
Figure 7-70 Front panel of the DM12
DM12
E1(1-8)
DDN1
DDN2
DDN3
DDN4
DM12

Interfaces
The front panel of the DM12 has DB44 and DB28 interfaces. Table 7-66 describes the types
and usage of the interfaces of the DM12.
Table 7-66 Interfaces of the DM12

Interface
E1 (1–8) DB44 Accesses eight channels of framed E1 signals.
DDN1–DDN4 DB28 Accesses the 1st to the 4th channels of Nx64

kbit/s signals.

30 30 Transmits the 8 Transmits the 8th

15
1st channel of channel of signals
44 15 signals (T1). 7 (T8).
29 Transmits the 36 Receives the 3rd

2nd channel of channel of signals
14 signals (T2). 21 (R3).
28 Transmits the 35 Receives the 4th

3rd channel of channel of signals
13 signals (T3). 20 (R4).

31 4th channel of channel of signals
16 1 12 signals (T4). 19 (R5).

5th channel of channel of signals
11 signals (T5). 18 (R6).

10 signals (T6). 17 (R7).

9 signals (T7). 16 (R8).
38 Receives the 1st 44–39 and Grounding

channel of 6–1
23 signals (R1).

37 Receives the
2nd channel of
22 signals (R2).
1 Transmits data 19 Receives data

28
signals. signals.
2 20
3 Transmits 21 Grounding
clock signals.
4 22 Receives the
loopback control
signal.
11 Detects the 23 Permits the

carrier. transmission.
12 24
1 13 Requests for 25 Receives the DCE
transmission. ready signal.
14 26
15 Receives the 27 Transmits the DTE

clock to be ready signal.
16 used in the 28
transmit
direction from
the external
equipment.
17 Receives clock - -
signals.
18
7.17.6 Valid Slots

The DM12 can be installed in slots 1–4 and 15–18 in the subrack and works as the interface
board of the DX1.
Table 7-69 lists the slots valid for the DX1 and the corresponding slots for the DM12. The DM12
installed in the slot with a smaller number accesses eight channels of framed E1 signals and four
channels of Nx64 kbit/s signals. The DM12 installed in the slot with a larger number accesses
only four channels of Nx64 kbit/s signals.

Table 7-69 Slots valid for the DX1 and the corresponding slots for the DM12
Slot Valid for the DX1 Corresponding Slot for the DM12

The technical specifications of the DM12 include the parameters specified for electrical

Table 7-70 lists the parameters specified for the electrical interfaces of the DM12.
Table 7-70 Parameters specified for the electrical interfaces of the DM12
Interface Type Description of the Interface Specification of the Interface
Framed E1 Framed E1 signals The physical and electrical

interface (DB44) characteristics of the interface
comply with ITU-T G.703. The
frame structure of the interface
complies with ITU-T G.704.
NX64 kbit/s V.35 interface Complies with ITU-T V.35.

interface (DB28)
V.24 interface Complies with ITU-T V.24.
X.21 interface Complies with ITU-T X.21.
RS-449 interface Complies with EIA RS-449

(RS-423A and RS-422A).
RS-530 interface Complies with EIA RS-530.
RS-530A interface Complies with EIA RS-530A.
The mechanical specifications of the DM12 are as follows:

l Weight (kg): 0.4

Power Consumption
At room temperature (25°C), the maximum power consumption of the DM12 is 0 W.
7.18 TSB4

The TSB4 is available in one functional version, namely, N1.
7.18.2 Application
The TSB4 is a PDH electrical interface protection switching board. The TSB4 can be used on
the OptiX OSN equipment series to realize the TPS protection on the PDH board.
The TSB4 is used to provide the TPS protection.
The TSB4 consists of the switch matrix module and power module.
7.18.5 Front Panel
The front panel of the TSB4 has a bar code.
7.18.6 Valid Slots
When the TSB4 works with different processing boards and interface boards to realize the TPS
protection, the TSB4 can be installed in different slots.
The technical specifications of the TSB4 include the mechanical specifications and power
consumption.

7.18.2 Application

The TSB4 can work with the MU04, C34S, or EU04 to realize the TPS protection on different
processing boards.
l The TSB4 can work with the MU04 to realize the TPS protection on the SPQ4.
l The TSB4 can work with the C34S to realize the TPS protection on the PL3.
l The TSB4 can work with the EU04 to realize the TPS protection on the SEP.


Figure 7-71 shows the functional block diagram of the TSB4.
Figure 7-71 Functional block diagram of the TSB4

Backplane Backplane
Cross-connect board
Interface board 1
Interface board 2 Standby processing board
Interface board 3
Switch matrix
module
+3.3 V Power Fuse

+3.3 V backup power
module

In the receive direction, the switch matrix module selects signals from one of the three interface
boards according to the TPS protection control signal sent from the cross-connect board, and
transmits the signals to the standby processing board.
Power Module
The power module provides all the modules of the TSB4 with the required DC voltages.
7.18.5 Front Panel


Figure 7-72 shows the appearance of the front panel of the TSB4.

Figure 7-72 Front panel of the TSB4
TSB4
TSB4
7.18.6 Valid Slots

Table 7-71 lists the slots valid for the TSB4 and the corresponding slots for the SPQ4 and MU04.
Table 7-71 Slots valid for the TSB4 and the corresponding slots for the SPQ4 and MU04
Slot Valid for the TSB4 Slot Valid for the SPQ4 Corresponding Slot for
the MU04
Slot 1 Slot 7 Slot 3

Table 7-72 lists the slots valid for the TSB4 and the corresponding slots for the SEP1 and EU04.
Table 7-72 Slots valid for the TSB4 and the corresponding slots for the SEP1 and EU04
Slot Valid for the TSB4 Slot Valid for the SEP1 Corresponding Slot for
the EU04
NOTE
The SEP1 is displayed as SEP or SEP1 on the U2000. When the interfaces are available on the front panel
of the SEP1, the SEP1 is displayed as SEP1 on the U2000. When the SEP1 works with the interface board
to realize the TPS protection, the SEP1 is displayed as SEP on the U2000.
Table 7-73 lists the slots valid for the TSB4 and the corresponding slots for the PL3 and C34S.
Table 7-73 Slots valid for the TSB4 and the corresponding slots for the PL3 and C34S
Slot Valid for the TSB4 Slot Valid for the PL3 Corresponding Slot for
the C34S

consumption.
The mechanical specifications of the TSB4 are as follows:
l Weight (kg): 0.3
Power Consumption
The maximum power consumption of the TSB4 at room temperature (25°C) is 3 W.
7.19 TSB8


7.19.2 Application
7.19.5 Front Panel
7.19.6 Valid Slots
consumption.

7.19.2 Application

The TSB8 can work with the C34S, , EU04, EU08, ETS8, MU04 and D34S to realize the TPS
protection on different processing boards.
l The TSB8 can work with the MU04 to realize the TPS protection on the SPQ4.
l The TSB8 can work with the C34S to realize the TPS protection on the PL3.
l The TSB8 can work with the D34S to realize the TPS protection on the PD3.
l The TSB8 can work with the D34S to realize the TPS protection on the PQ3.
l The TSB8 can work with the EU04 to realize the TPS protection on the SEP1.
l The TSB8 can work with the EU08 to realize the TPS protection on the SEP1.
l The TSB8 can work with the ETS8 to realize the TPS protection on the EFS0.

Figure 7-73 shows the functional block diagram of the TSB8 by describing how to process one
channel of signals.

Figure 7-73 Functional block diagram of the TSB8

Backplane Backplane
Cross-connect board
Interface board 1
Interface board 2 Standby processing board
Interface board 3
Switch matrix
module
+3.3 V Power Fuse

+3.3 V backup power
module

In the receive direction, the switch matrix module selects signals from one of the three interface
boards according to the TPS protection control signal sent from the cross-connect board, and
transmits the signals to the standby processing board.
Power Module
The power module provides all the modules of the TSB8 with the required DC voltages.
7.19.5 Front Panel


Figure 7-74 shows the appearance of the front panel of the TSB8.

Figure 7-74 Front panel of the TSB8
TSB8
TSB8
7.19.6 Valid Slots

Table 7-74 lists the slots valid for the TSB8 and the corresponding slots for the SPQ4 and MU04.
Table 7-74 Slots valid for the TSB8 and the corresponding slots for the SPQ4 and MU04
Slot Valid for the TSB8 Slot Valid for the SPQ4 Corresponding Slot for
the MU04

Table 7-75 lists the slots valid for the TSB8 and the corresponding slots for the PL3 and C34S.
Table 7-75 Slots valid for the TSB8 and the corresponding slots for the PL3 and C34S
Slot Valid for the TSB8 Slot Valid for the PL3 Corresponding Slot for
the C34S
Table 7-76 lists the slots valid for the TSB8 and the corresponding slots for the PD3 and D34S.
Table 7-76 Slots valid for the TSB8 and the corresponding slots for the PD3 and D34S
Slot Valid for the TSB8 Slot Valid for the PD3 Corresponding Slot for
the D34S
Table 7-77 lists the slots valid for the TSB8 and the corresponding slots for the PQ3 and D34S.
Table 7-77 Slots valid for the TSB8 and the corresponding slots for the PQ3 and D34S
Slot Valid for the TSB8 Slot Valid for the PQ3 Corresponding Slot for the
D34S
Slots 1 and 2 Slots 6 and 7 Slots 3 and 4
Slots 17 and 18 Slots 12 and 13 Slots 15 and 16
the EU04

the EU08
NOTE
The SEP1 is displayed as SEP or SEP1 on the U2000. When the interfaces are available on the front panel
of the SEP1, the SEP1 is displayed as SEP1 on the U2000. When the SEP1 works with the interface board
to realize the TPS protection, the SEP1 is displayed as SEP on the U2000.
Table 7-80 lists the slots valid for the TSB8 and the corresponding slots for the EFS0 and ETS8.
Table 7-80 Slots valid for the TSB8 and the corresponding slots for the EFS0 and ETS8
Slot Valid for the TSB8 Slot Valid for the EFS0 Corresponding Slot for
the ETS8

consumption.
The mechanical specifications of the TSB8 are as follows:
l Weight (kg): 0.3
Power Consumption
At room temperature (25°C), the maximum power consumption of the TSB8 is 0 W.

Hardware Description 8 EoS/EoP Boards
8 EoS/EoP Boards
About This Chapter
The EoS/EoP boards include the interface boards and processing boards for FE and GE services.
8.1 EFT4
technical specifications of the EFT4 (4xFE transparent transmission board). This topic also
describes how to configure and commission the EFT4.
8.2 EFT8
technical specifications of the EFT8 (8xFE/16xFE transparent transmission board). This topic
also describes how to configure and commission the EFT8.
8.3 EFT8A
technical specifications of the EFT8A (8xFE transparent transmission board). This topic also
describes how to configure and commission the EFT8A.
8.4 EGT2
technical specifications of the EGT2 (2xGE transparent transmission board). This topic also
describes how to configure and commission the EGT2.
8.5 EFS0
technical specifications of the EFS0 (8xFE switching and processing board). This topic also
describes how to configure and commission the EFS0.
8.6 EFS0A
technical specifications of the EFS0A (16xFE switching and processing board). This topic also
describes how to configure and commission the EFS0A.
8.7 EFS4

8 EoS/EoP Boards Hardware Description
8.8 EFP0
technical specifications of the EFP0 (fast Ethernet switching processing board based on PDH).
This topic also describes how to configure and commission the EFP0.
8.9 EGS2
technical specifications of the EGS2 (2xGE switching and processing board). This topic also
describes how to configure and commission the EGS2.
8.10 EMS2
technical specifications of the EMS2 (2xGE and 16xFE switching and processing board). This
topic also describes how to configure and commission the EMS2.
8.11 EMS4
8.12 EGS4
8.13 EFF8
technical specifications of the EFF8 (8x100M Ethernet optical interface board).
8.14 EFF8A
technical specifications of the EFF8A (8x100M Ethernet optical interface board).
8.15 ETF8
technical specifications of the ETF8 (8x100M Ethernet twisted pair interface board).
8.16 ETF8A
technical specifications of the ETF8A (8x100M Ethernet twisted pair interface board).
8.17 ETS8
technical specifications of the ETS8 (8x10/100M Ethernet twisted pair interface switching
board).

8.1 EFT4
technical specifications of the EFT4 (4xFE transparent transmission board). This topic also
describes how to configure and commission the EFT4.

The EFT4 is available in one functional version, namely, R1.
8.1.2 Application
The EFT4 is used to access Ethernet services, manage bandwidths, and converge Ethernet
services.
The EFT4 supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
The EFT4 consists of the Ethernet access module, mapping module, interface converting
module, logic and control module, clock module, and power module.
8.1.5 Front Panel
The front panel of the EFT4 has indicators, interfaces, and a bar code.
The EFT4 does not have any jumpers or DIP switches that are used for board settings.
8.1.7 Valid Slots
The EFT4 must be installed in a valid slot in the subrack. Otherwise, the EFT4 cannot work
normally.
8.1.8 Feature Code
The EFT4 does not have the feature code.
8.1.10 Configuring the Board Functions
The EFT4 supports multiple Ethernet functions and features such as LCAS and LPT. Configure
the functions according to actual requirements.
You can set parameters for the EFT4 by using the U2000.

The technical specifications of the EFT4 include the Ethernet performance specifications,

The EFT4 is available in one functional version, namely, R1.
8.1.2 Application
services.
Figure 8-1 shows the typical networking and application of the Ethernet transparent transmission
board. The Ethernet transparent transmission board realizes point-to-point transparent
transmission of Ethernet services. The Ethernet transparent transmission board provides the
following functions by using the interfaces on the board: data receipt, data transmission, data
mapping, and traffic control. In addition, the Ethernet transparent transmission board performs
port-based point-to-point transparent transmission, encapsulation/decapsulation, overhead bytes
and pointers processing, virtual concatenation, SDH mapping/demapping, and LCAS function.
Figure 8-1 Networking and application of the Ethernet transparent transmission board
NMS
User A2
NE1
PORT 1
NE2 MSP ring NE4
PORT 2
NE3
User B2
Service flow
Line board PORT 1 PORT 2
Data board
Cross-connect and
timing board
User B1 User A1


frames.
Table 8-1 provides the functions and features of the EFT4.
Table 8-1 Functions and features of the EFT4

Function and EFT4
Feature
Basic functions Transmits 4xFE services.
Functions when being Accesses 4xFE signals by providing interfaces on the front panel.
used with the
interface board
Specifications of the Supports 10BASE-T/100BASE-TX signals.

optical interface The optical interfaces comply with IEEE 802.3u.
Format of service l Supports Ethernet II, IEEE 802.3, and IEEE 802.1q TAG formats.
frames l Supports the frame with a length ranging from 64 bytes to 9600
bytes.
l Supports the Jumbo frame with a length less than 9600 bytes.
Maximum uplink 622 Mbit/s

bandwidth
Bound bandwidth 12xVC-3, or 63xVC-12 + 9xVC-3
VCTRUNKs Number of supported VCTRUNKs: 4

Configuration principles are as follows:
l VC-4 numbered 4 supports the binding of VC-3 and VC-12 paths.
The other VC-4s support the binding of VC-3 paths only.
l A VCTRUNK can be bound with a maximum of three VC-3s or
63 VC-12s.
l A VCTRUNK can be bound with the VC-12 path or VC-3 path
at one time. A VCTRUNK should not be bound with VC-12 and
VC-3 paths at the same time.
l A VCTRUNK cannot be bound with VC-12s numbered 1–63 and
VC-3s numbered 10–12 at the same time.
Mapping Supports VC-12, VC-3, VC-12-Xv (X≤63), and VC-3-Xv (X≤3)

granularities granularities.
Encapsulation format Supports the HDLC, LAPS, and GFP-F protocols.
EPL services Supports the PORT-based transparent transmission.

Function and EFT4

Feature
MTU Supports the setting of the packet length, which ranges from 1518
bytes to 1535 bytes. After the setting becomes valid, the length of the
packets that enter or exit the IP ports is restricted by the pre-set MTU.
MPLS Does not support the MPLS.
VLAN Supports VLAN transparent transmission.
Link aggregation Does not support the link aggregation function.

function
ETH-OAM function Does not support the ETH-OAM function.
QoS function Does not support the QoS function.
LCAS function Dynamically increases or decreases the bandwidth and protects the
bandwidth in compliance with ITU-T G.7042.
LPT function Supports the P2P LPT in GFP bearer mode.
Flow control function Supports the FE interface-based flow control function that complies
with IEEE 802.3x.
High-precision time Does not support the high-precision time.

(IEEE 1588 V2)
Test frames Receives and transmits GFP test frames.
Port mirroring Does not support the port mirroring function.
Loopback function l Supports inloops at the PHY layer on Ethernet ports.

l Supports inloops and outloops at the MAC layer on Ethernet ports.
l Supports inloops and outloops at the VC-3 level.
Protection schemes Supports the following protection schemes at the Ethernet network
level:
l LCAS
l LPT
Ethernet performance Supports Ethernet performance monitoring at the port level.

monitoring

Figure 8-2 shows the functional block diagram of the EFT4 by describing how to process 1xFE
signals.

Figure 8-2 Functional block diagram of the functions of the EFT4
Backplane
ENCP Cross-connect unit

Ethernet Interface
FE
access VCP converting
module DENCP module Cross-connect unit
Mapping module
LOS
Logic and Communication

SCC unit
control module Reference clock and frame header
SCC unit

Clock module -48 V/-60 V
module Power
module +3.3 V
+3.3 V backup power
Fuse
50 77 125 155
MHz MHz MHz MHz
ENCP: data encapsulation module DENCP: decapsulation module

VCP: virtual concatenation processing module
Ethernet Access Module

In the receive direction, the Ethernet access module accesses the Ethernet electrical signals from
Ethernet equipment such as switches or routers. At the PHY layer, the electrical signals are
decoded and the ETH_LOS alarm is detected. The electrical signals are converted from serial
signals into parallel signals and then sent to the network processor module.
In the transmit direction, the parallel signals are converted into serial signals. At the PHY layer,
signals are encoded.
Mapping Module
The mapping module performs encapsulation and mapping functions.
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, HDLC, or
GFP format. The concatenation is performed. Then, the Ethernet signals are converted into SDH
signals.
In the downstream direction, SDH signals are demapped. The delay of virtual concatenation is
compensated. After aligning, packets are decapsulated according to the encapsulation format.
The decapsulated data is finally transmitted to the network processor module in packets.



The logic and control module consists of the CPU, register, oscillator, Ethernet port, and HDLC
controller. This module is connected to external circuits through the bus. The logic and control
module performs the following functions:
l Manages and configures other modules of the board.
l Implements inter-board communication through the internal Ethernet interface.
The control module also contains basic logic units. This module performs the following
functions:
l Writes and reads the register.
l Provides interfaces for the CPU.
l Checks and selects the clock.
l Performs phase discrimination and frequency division on the clock.
l Checks the in-service state of the cross-connect, SCC, and line boards.
l Implements communication.
l Controls indicators.
Clock Module
The clock module traces the system reference clock and generates the required working clock
for each chip. The frequency of the clock can be 50 MHz, 77 MHz, 125 MHz, or 155 MHz.
Power Module
require.
8.1.5 Front Panel


Figure 8-3 shows the appearance of the front panel of the EFT4.

Figure 8-3 Front panel of the EFT4
EFT4
STAT
ACT
PROG
SRV
FE1
FE2
FE3
FE4
EFT4
Indicators
l Connection status indicator (LINK) – one color (green)
l Data receiving and transmission indicator (ACT) – one color (orange)
Interfaces
The front panel of the EFT4 has four FE interfaces. Table 8-2 describes the types and usage of
the interfaces of the EFT4. For information about the cables connected to the interfaces, see
18.4.6 Straight Through Cable and 18.4.7 Crossover Cable.
Table 8-2 Interfaces of the EFT4

Interface
FE1 RJ-45 Transmits and receives 10BASE-T/100BASE-TX

signals.

signals.

signals.


Interface

signals.
Table 8-3 describes the pins of the RJ-45 connector.
Table 8-3 Pins of the RJ-45 connector

Pin Description
1 Positive data transmit end
2 Negative data transmit end
3 Positive data receive end
4 Grounding
5 Grounding
6 Negative data receive end
7 Grounding
8 Grounding

NOTE
The daughter board of the EFT4 has only one push-button switch, which is used for resetting the board.
When the EFT4 operates normally, do not push the switch. Otherwise, a cold reset is performed on the
board and the services may be lost.
8.1.7 Valid Slots

normally.
The EFT4 can be installed in divided slots 5–7 and 19–21 in the subrack.
8.1.8 Feature Code




Step 2 Required: Check and record the bandwidth and slot information of the board.
Step 3 Required: Check whether the interface board and cable match the board. Ensure that the cable
matches the board.
is correct.
----End

Step 2 Required: Configure services. For details, see Configuring EPL Services on Ethernet
Transparent Transmission Board.
Step 3 Required: Set the Ethernet interface.

l Set the overhead byte as follows:
– J1/J2 byte: The setting of the J1/J2 byte on the interconnected equipment must be
consistent. Generally, use the default value. In the case of product version R003 or R006,
the default mode of the J1/J2 is Single-Byte Mode and the default value of the J1/J2 is
0x00. In the case of product version R007 or R008, the default mode of the J1/J2 to be
sent is 16-Byte CRC Mode and the default value of the J1/J2 to be sent is HuaWei
SBS ; the default mode of the J1/J2 to be received is Single-Byte Mode and the default
value of the J1/J2 to be received is 0x00.
l Set the Ethernet interface as follows:
– Port enabled/disabled: When you configure services on a port of the Ethernet board, the
port must be set to Enabled.
– Working mode: Generally, the Ethernet interfaces of the interconnected equipment are
required to work in the same working mode. If the working modes on two sides do not
match, packets may be lost or the bit rate may decrease. In the case of large volume of
traffic, services may be completely interrupted.

NOTE
For more information about the parameters of the board, see 22.1.2 Ethernet Parameters.
Step 4 Optional: Configure the test frame. For details, see Configuring Test Frames.
----End

Step 1 Required: Test the Ethernet service channel. For details, see Testing Ethernet Service
Channels.
----End

Boards.
the Current Alarms and Browsing the Current Performance Events at the Ethernet Port.
----End

You can configure the following Ethernet functions for the EFT4 by using the U2000:
l LCAS
l LPT
l Test Frame

You can set the following main parameters for the EFT4 by using the U2000:
l Working mode
l LCAS
l Maximum frame length
l Mapping protocol
For information about more parameters and the description of each parameter, see 22 Parameter
Settings.


Troubleshooting
Table 8-4 lists the faults that occur on the EFT4 frequently and the troubleshooting methods.
Table 8-4 Methods used to troubleshoot the faults that occur on the EFT4 frequently
Fault Symptom Common Fault Cause Troubleshooting Method
Service l The services on a VCTRUNK See Troubleshooting Service

interruption port are interrupted. Interruptions.
l The services on a single
Ethernet port are interrupted.
l The services on all the Ethernet
ports are interrupted.
Transient service l The services on a VCTRUNK See Troubleshooting Transient

interruption port are transiently interrupted. Service Interruptions.
Ethernet port are transiently
interrupted.
l The protocol becomes
abnormal.
Packet loss l The negotiated working mode See Troubleshooting Service

of the Ethernet ports is the half- Packet Loss.
duplex mode.
l Bit errors occur on the line side.
Interconnection l The interconnection fault See Troubleshooting Device

fault occurs on a single Ethernet port. Interconnection Faults.
l The interconnection fault
occurs on the VCG port.
l The LCAS interconnection
fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EFT4, see Replacing an Ethernet Board.


8.1.13.1 R1EFT4
ALM_GFP_dLFD B3_EXC_VC3 B3_SD_VC3
BIP_SD BOOTROM_BAD COMMUN_FAIL
ETH_LOS EX_ETHOAM_CC_LO EX_ETHOAM_MPID_CNF

S LCT
FCS_ERR FPGA_ABN HARD_BAD
HP_LOM LCAS_BAND_DE- LCAS_FOPR

CREASED
LCAS_FOPT LCAS_PLCR LCAS_PLCT
LCAS_TLCR LCAS_TLCT LOOP_ALM
LP_UNEQ_VC3 LPT_INEFFECT LPT_RFI
PATCH_ERR PATCH_NOT_CON- PATCHFILE_NOTEXIST

FIRM
MSSW_DIFFERENT NO_BD_SOFT SLAVE_WORKING
TEST_STATUS TU_AIS_VC12 TU_AIS_VC3
TU_LOP_VC12 TU_LOP_VC3 T_LOSEX
TR_LOC VCAT_LOA VCAT_LOM_VC12
VCAT_LOM_VC3 VCAT_SQM_VC12 VCAT_SQM_VC3
W_R_FAIL ETH_NO_FLOW SWDL_PKG_NOBDSOFT


8.1.14.1 R1EFT4
Table 8-5 SDH
LPBBE LPES LPUAS
LPCSES LPSES LPFEBBE
LPFEES LPFESES LPFECSES
HPBBE HPES HPSES
HPUAS HPCSES HPFEBBE
HPFEES HPFESES HPFECSES
Table 8-6 SDH
HPBBE HPCSES HPES
HPFESES HPSES HPUAS
LPBBE LPCSES LPES
LPFESES LPSES LPUAS
Table 8-7 Statistics of RMON basic performance
Broadcast Packets Received Multicast Packets Received Undersize Packets

(packets) (packets) Received(packets)
Packets Received and

Oversize Packets Received Transmitted(64 Octets in
(packets) Fragments(packets) Length)(packets)
Packets Received(65~127 Packets Received(128~255 Packets Received(256~511

Octets in Length)(packets) Octets in Length)(packets) Octets in Length)(packets)
Packets Received
(512~1023 Octets in Packets Received(1024~1518
Length)(packets) Octets in Length)(packets)
Table 8-8 Statistics of RMON extended performance
Packets Transmitted
Packets Transmitted(64 Packets Transmitted(65~127 (128~255 Octets in Length)
Octets in Length)(packets) Octets in Length)(packets) (packets)

Packets Transmitted Packets Transmitted Packets Transmitted

(256~511 Octets in Length) (512~1023 Octets in Length) (1024~1518 Octets in
(packets) (packets) Length)(packets)
Packets Received and Packets Received and Packets Received and

Transmitted(64 Octets in Transmitted(65~127 Octets in Transmitted(128~255
Length)(packets) Length)(packets) Octets in Length)(packets)

Transmitted(256~511 Transmitted(512~1023 Octets Transmitted(1024~1518
Octets in Length)(packets) in Length)(packets) Octets in Length)(packets)
Unicast Packets Received Unicast Packets Transmitted Pause Frames Received

(packets) (packets) (frames)
Pause Frames Transmitted Multicast Packets Transmitted Broadcast Packets

(frames) (packets) Transmitted(packets)
Good Octets Received Good Octets Transmitted

(Byte) (Byte) Bad Octets Received(Byte)
Bad Octets Transmitted

(Byte) FCS Errors(frames)

The known restrictions on the board are as follows:
l A VCTRUNK can be bound with a maximum of three VC-3s or a maximum of 63 VC-12s.
In addition, a VCTRUNK can be bound with the VC-12 timeslot or VC-3 timeslot at one
time. A VCTRUNK should not be bound with VC-12 and VC-3 timeslots at the same time.
Different VCTRUNKs, however, can be bound with timeslots at different levels.
l A VCTRUNK cannot be bound with VC-12s numbered 1–63 and VC-3s numbered 10–12
at the same time.
l In the case of the configuration of cross-connection, VC-12s numbered 1–63 should be
configured into the fourth VC-4.


Table 8-9 lists the parameters specified for the electrical interfaces of the EFT4.

Table 8-9 Parameters specified for the optical interfaces of the EFT4
Parameter Value
Nominal bit rate 10 Mbit/s or 100 Mbit/s
Line code pattern Manchester encoding signal (10M) or MLT-3

encoding signal (100M)
Specifications of the Complies with IEEE 802.3u.

interface
Ethernet Performance Specifications

NOTE
The following part lists the throughput specifications, packet loss ratio in the case of overloading, delay
specifications, and back-to-back specifications of the EFT4 board of the R1 version.
Figure 8-4 shows the connection for testing the throughput specifications, packet loss ratio in
the case of overloading, and latency specifications of the EFT4.
Figure 8-4 Connection for testing the throughput specifications, packet loss ratio in the case of
overloading, and latency specifications
Port 1
Tested Tested
equipment 1 equipment 2
Port 2
Port 1 Port 2
Data network
performance
analyzer
Figure 8-5 shows the connection for testing the back-to-back specifications of the EFT4.
Figure 8-5 Connection for testing the back-to-back specifications
Tested
equipment 1
Port 1 Port 2
Data network
performance
analyzer

Table 8-10 lists the throughput specifications of the EFT4. Table 8-11 lists the packet loss ratio
in the case of overloading of the EFT4. Table 8-12 lists the latency specifications of the EFT4.
Table 8-13 lists the back-to-back specifications of the EFT4.
NOTE
l The specifications vary according to the configuration and networking of the test environment and
the VC services bound on the VCG side. The specifications that are obtained in the actual environment
are used.
l The specifications in the following tables are obtained in the following scenario: EPL services are
configured and 63 VC-12s are bound on the FE port.
l The data network performance is measured by using the SmartBits. The specification values in the
following tables are obtained by using the SmartApplication software of the SmartBits analyzer.
l The specific test results depend on the settings on the SmartApplication. The values listed in the
following tables are the values displayed on the SmartBits analyzer.
l In the following tables, the value such as (01,01,01) indicates the equipment No., slot No., and port
No. "(01,01,01) to (01,01,02)" and "(01,01,02) to (01,01,01)", however, indicate the forward and
reverse tests values, respectively. For details about the parameters, see SmartApplications Help.
Table 8-10 lists the throughput specifications of the EFT4. The values are obtained when the
SmartApplication is set as follows:
l The specifications in the table are obtained in the scenario wherein point-to-point
transparent transmission services are configured and the flow control function is disabled.
l The permitted packet loss ratio is set to 0% and the resolution rate is set to 0.1%.
l The test duration is set to 60 seconds.
Table 8-10 Throughput specifications of the EFT4

Frame Size Passed Rate (01,01,01) to (01,01,02) to Total (pks/
(Byte) (%) (01,01,02) (pks/ (01,01,01) (pks/ sec)
sec) sec)
64 100.00 148810 148810 297620
128 100.00 84459 84459 168918
256 100.00 45290 45290 90580
512 100.00 23496 23496 46992
1024 100.00 11973 11973 23946
1280 100.00 9615 9615 19230
1518 100.00 8127 8127 16254
Table 8-11 lists the packet loss ratio in the case of overloading of the EFT4. The values are
obtained when the SmartApplication is set as follows:
l The tested traffic starts from the throughput and increases to 100% in 10% steps.

Table 8-11 Packet loss ratio in the case of overloading of the EFT4
Frame Size Rate Tested (01,01,01) to (01,01,02) to Average (%)

(Byte) (%) (01,01,02) (%) (01,01,01) (%)
64 100.00 0.000 0.000 0.000
128 100.00 0.000 0.000 0.000
256 100.00 0.000 0.000 0.000
512 100.00 0.000 0.000 0.000
1024 100.00 0.000 0.000 0.000
1280 100.00 0.000 0.000 0.000
1518 100.00 0.000 0.000 0.000
Table 8-12 lists the latency specifications of the EFT4. The values are obtained when the
l The latency modes are classified into two modes, namely, cut through mode and store
forward mode. In cut through mode, the analyzer calculates the difference between the time
when the first bit of the transmitted frame reaches the output port of the tested equipment
and the time when the first bit of the transmitted frame reaches the input port of the tested
equipment. In store forward mode, the analyzer calculates the difference between the time
and the time when the last bit of the transmitted frame reaches the input port of the tested
equipment. In the table, the CT values are obtained in cut through mode and the S&F values
are obtained in store forward mode.
Table 8-12 Latency specifications of the EFT4
Frame Rate (01,01,01) to Average (01,01,01) to Average

Size Tested (01,01,02) (us)- (CT) (us) (01,01,02) (S&F) (us)
(Byte) (%) CT (us) (us)-S&F (us)
64 100.00 506.4 506.4 501.2 501.2
128 100.00 518.8 518.8 508.5 508.5
256 100.00 536.2 536.2 515.8 515.8
512 100.00 578.9 578.9 538.0 538.0
1024 100.00 653.4 653.4 571.4 571.4
1280 100.00 688.1 688.1 585.6 585.6


1518 100.00 720.6 720.6 599.1 599.1
Table 8-13 lists the back-to-back specifications of the EFT4. The values are obtained when the
l The frame size is set to the range from 64 bytes to 1518 bytes, the packet transmission rate
is set to 100%, the test duration is set to 2 seconds, and the number of repetitions is set to
a value more than 50 on the Smart Application.
l The tested traffic is set to the wire speed.
Table 8-13 Back-to-back specifications of the EFT4
Frame Size Rate Tested (01,01,01) to (01,01,02) to Total

(Byte) (%) (01,01,02) Burst (01,01,01) (Number of
Size (Number of (Number of Frames)
Frames) Frames)
64 100.00 297620 297620 595240
128 100.00 168918 168918 337836
256 100.00 90580 90580 181160
512 100.00 46992 46992 93984
1024 100.00 23946 23946 47892
1280 100.00 19230 19230 38460
1518 100.00 16254 16254 32508
The mechanical specifications of the EFT4 are as follows:

l Weight (kg): 0.5
Power Consumption
The maximum power consumption of the EFT4 at room temperature (25°C) is 14 W.

8.2 EFT8
technical specifications of the EFT8 (8xFE/16xFE transparent transmission board). This topic
also describes how to configure and commission the EFT8.

The EFT8 is available in the following functional versions: N1 and N2.
8.2.2 Application
services.
frames.
8.2.5 Front Panel
8.2.7 Valid Slots
normally.
8.2.8 Feature Code


The EFT8 is available in the following functional versions: N1 and N2.
Table 8-14 describes the versions of the EFT8.
Table 8-14 Versions of the EFT8

Item Description
Functional The EFT8 is available in the following functional versions: N1 and N2.
versions
Differences l The N2EFT8 supports the IEEE 802.3ah OAM and IEEE 802.1ag
OAM functions.
l The N2EFT8 supports the alarm indicating that the traffic crosses the
associated threshold.
l The N2EFT8 supports the command for loading MAC addresses in
a unified manner.
l The N2EFT8 supports the board version replacement function.
Substitution The N2EFT8 can substitute for the N1EFT8.
8.2.2 Application
services.
Figure 8-6 shows the typical networking and application of the Ethernet transparent transmission
board. The Ethernet transparent transmission board realizes point-to-point transparent
transmission of Ethernet services. The Ethernet transparent transmission board provides the
following functions by using the interfaces on the board: data receipt, data transmission, data
mapping, and traffic control. In addition, the Ethernet transparent transmission board performs
port-based point-to-point transparent transmission, encapsulation/decapsulation, overhead bytes
and pointers processing, virtual concatenation, SDH mapping/demapping, and LCAS function.

NMS
User A2
NE1
PORT 1
NE2 MSP ring NE4
PORT 2
NE3
User B2
Service flow
Data board
Cross-connect and
timing board
User B1 User A1

frames.
Table 8-15 provides the functions and features of the EFT8.
Table 8-15 Functions and features of the EFT8

Function and EFT8
Feature
Basic functions Transmits 16xFE services.
Functions when l Accesses 8 Ethernet signals through the electrical interface

being used with the independently.
interface board l Accesses 16 Ethernet signals through the electrical interface when
the EFT8 is used with the ETF8.
l Accesses 8 Ethernet optical signals and 8 Ethernet electrical
signals when the EFT8 is used with the EFF8.

Function and EFT8

Feature
Specifications of the l Supports 10BASE-T/100BASE-TX signals when the EFT8 is used

optical interface with the ETF8.
l Supports 100BASE-FX/100BASE-TX signals when the EFT8 is
used with the EFF8. The optical interfaces comply with IEEE
802.3u.
frames l Ports 1-4 and 9-12 on the N1EFT8 support the frame with a length
ranging from 64 bytes to 1535 bytes, whereas ports 5-8 and 13-16
support the frame with a length ranging from 64 bytes to 9600
bytes. The N1EFT8 supports the Jumbo frame with a length not
more than 9600 bytes.
l The N2EFT8 supports the frame with a length ranging from 64
bytes to 9600 bytes.
Maximum uplink The maximum uplink bandwidth is 1.25 Gbit/s. The EFT8 can adapt
bandwidth to the bandwidth of the slot.

l A VCTRUNK can be bound with a maximum of three VC-3s or a
maximum of 63 VC-12s.
l A VCTRUNK can be bound with the VC-12 path or VC-3 path at
one time. A VCTRUNK should not be bound with VC-12 and
l Different VCTRUNKs can be bound with paths at different levels.
l VCTRUNK 1-VCTRUNK 8 can be bound with VC-3s 1-12 or
VC-12s 1-63.
l VCTRUNK 9-VCTRUNK 16 can be bound with VC-3s 13-24 or
VC-12s 64-126.
l A VCTRUNK cannot be bound with VC-12s numbered 1-63 and
VC-3s numbered 10-12 at the same time. In addition, a
VCTRUNK cannot be bound with VC-12s numbered 64-126 and
VC-3s numbered 22-24 at the same time.
l VC-4s numbered 4 and 8 support the binding of VC-3 and VC-12
paths. The other VC-4s support the binding of VC-3 paths only.

Encapsulation Supports the HDLC, LAPS, and GFP-F protocols.

format

Function and EFT8

Feature

function
ETH-OAM function (N1EFT8) Does not support the ETH-OAM function.

The N2EFT8 supports continuity check (CC) for the multicast service,
loopback (LB) test for the unicast service, link trace (LT) test, loop
detection (LD), auto-negotiation, fault diagnosis, and link
performance detection. The ETH-OAM function complies with IEEE
802.1ag and IEEE 802.3ah.
LPT function l The N1EFT8 supports the P2P LPT in GFP bearer mode.
l The N2EFT8 supports the P2P LPT in GFP/Ethernet bearer mode.
Flow control Supports the FE port-based flow control function that complies with
function IEEE 802.3x.

(IEEE 1588 V2)

l The N1EFT8 supports inloops and outloops at the MAC layer on
Ethernet ports.
l The N2EFT8 supports only inloops at the MAC layer on Ethernet
ports.
level:
l LCAS
l LPT
Ethernet Supports Ethernet performance monitoring at the port level.

performance
monitoring

Function and EFT8

Feature

Figure 8-7 shows the functional block diagram of the EFT8 by describing how to process 1xFE
signals.
Figure 8-7 Functional block diagram of the EFT8
Backplane
Cross-connect unit
ENCP
Ethernet Interface
FE
module module
DENCP Cross-connect unit
Mapping module
Laser
LOS
shutdown
Communication
Logic and SCC unit
SCC unit

module -48 V/-60 V
Clock module Power
module +3.3 V +3.3 V backup power
50 77 125 155 Fuse
MHz MHz MHz MHz


In the receive direction, the optical signals from Ethernet equipment such as switches or routers
are converted into electrical signals. If the signals are accessed through electrical interfaces, O/
E conversion is not required. At the PHY layer, the electrical signals are decoded and the
ETH_LOS alarm is detected. The electrical signals are converted from serial signals into parallel
signals and then sent to the network processor module.

signals are encoded and converted from electrical signals to optical signals.
Mapping Module
signals.



functions:

l Controls the shutting down of the optical module.
Clock Module
Power Module
require.

8.2.5 Front Panel


Figure 8-8 shows the appearance of the front panel of the EFT8.
Figure 8-8 Front panel of the EFT8
EFT8
STAT
ACT
PROG
SRV
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
EFT8
Indicators

Interfaces
The front panel of the EFT8 has eight FE interfaces. Table 8-16 describes the types and usage
of the interfaces of the EFT8. For information about the cables connected to the interfaces, see
Table 8-16 Interfaces of the EFT8

Interface

signals.

signals.

signals.

signals.

signals.

signals.

signals.

signals.
Pin Description
4 Grounding

Pin Description
5 Grounding
7 Grounding
8 Grounding

NOTE
The daughter board of the N1EFT8 has only one push-button switch, which is used for resetting the
N1EFT8. When the N1EFT8 operates normally, do not push the switch. Otherwise, a cold reset is performed
on the N1EFT8 and the services may be lost.
8.2.7 Valid Slots

normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the EFT8 vary with the cross-connect capacity of the subrack and whether
the EFT8 works with an interface board.
The slots valid for the EFT8 are as follows:
l When the EFT8 does not work with an interface board, the EFT8 can be installed in slots
5–8 and 11–13. In this case, the bandwidth is 622 Mbit/s.
l When the EFT8 works with an interface board, the EFT8 can be installed in slots 7, 12, and
13. In this case, the bandwidth is 1.25 Gbit/s.
8.2.8 Feature Code




matches the board.
is correct.
----End


NOTE
----End


Channels.
----End

Boards.
----End

You can configure the following Ethernet functions for the EFT8 by using the U2000:
l LCAS
l LPT
l Test Frame

You can set the following main parameters for the EFT8 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 8-18 lists the faults that occur on the EFT8 frequently and the troubleshooting methods.

Table 8-18 Methods used to troubleshoot the faults that occur on the EFT8 frequently


interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EFT8, see Replacing an Ethernet Board.

8.2.13.1 N1EFT8

ETH_LOS EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNF

LCT
HP_LOM LCAS_BAND_DE- LASER_MOD_ERR

CREASED
LCAS_PLCR LCAS_FOPR LCAS_FOPT
LCAS_TLCT LCAS_PLCT LCAS_TLCR
LP_RDI_VC3 LOOP_ALM LP_RDI_VC12
LP_SLM_VC12 LP_REI_VC12 LP_REI_VC3
LP_TIM_VC3 LP_SLM_VC3 LP_TIM_VC12
LP_UNEQ_VC12 LP_UNEQ_VC3 LPT_INEFFECT
LPT_RFI LSR_NO_FITED MSSW_DIFFERENT
NO_BD_SOFT SLAVE_WORKING SUBCARD_ABN
TU_LOP_VC12 TU_LOP_VC3 VCAT_LOA
VCAT_LOM_VC12 VCAT_LOM_VC3 VCAT_SQM_VC12
VCAT_SQM_VC3 W_R_FAIL TR_LOC
T_LOSEX PATCH_ERR PATCH_NOT_CONFIRM
PATCHFILE_NOTEXIST ETH_NO_FLOW SWDL_PKG_NOBDSOFT
8.2.13.2 N2EFT8
ETH_LOS EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNF

LCT
HP_LOM ETH_NO_FLOW LASER_MOD_ERR
LCAS_PLCR LCAS_FOPR LCAS_FOPT
LCAS_TLCT LCAS_PLCT LCAS_TLCR
LP_RDI_VC3 LOOP_ALM LP_RDI_VC12

LP_SLM_VC12 LP_REI_VC12 LP_REI_VC3
LP_TIM_VC3 LP_SLM_VC3 LP_TIM_VC12
LP_UNEQ_VC12 LP_UNEQ_VC3 LPT_INEFFECT
LPT_RFI LSR_NO_FITED MSSW_DIFFERENT
NO_BD_SOFT SLAVE_WORKING SUBCARD_ABN
VCAT_SQM_VC3 W_R_FAIL TR_LOC
T_LOSEX PATCH_ERR PATCH_NOT_CONFIRM
PATCHFILE_NOTEXIST FLOW_OVER ETH_CFM_MISMERGE
ETH_CFM_RDI ETH_CFM_UNEXPERI ETHOAM_RMT_LOOP
ETHOAM_RMT_SD ETHOAM_SELF_LOOP EX_ETHOAM_CC_LOS
EX_ETHOAM_MPID_CNF VCTRUNK_NO_FLOW ETH_CFM_LOC

LCT

8.2.14.1 N1EFT8
Table 8-19 SDH

HPBBE HPCSES HPES
HPFESES HPSES HPUAS
LPBBE LPCSES LPES
LPFESES LPSES LPUAS

Table 8-20 RMON alarm
DropEvent UndersizePkts OversizePkts
Fragments Jabbers Collisions
AlignmentErrors FCSErrors



Packets Received
Packets Transmitted








8.2.14.2 N2EFT8
Table 8-23 SDH
LPBBE LPES LPUAS
LPCSES LPSES LPFEBBE
HPBBE HPES HPSES
UndersizePkts OversizePkts Fragments
RXBRDCAST RXMULCAST ETHUNDER
ETHOVER ETHFRG RXPKT64
RXPKT65 RXPKT128 RXPKT256
RXPKT512 RXPKT1024
TXBRDCAST TXMULCAST TXPKT64
TXPKT65 TXPKT128 TXPKT256
TXPKT512 TXPKT1024
Table 8-27 Statistics of specific events of RMON performance
RXUNICAST TXUNICAST RXPAUSE
TXPAUSE ETHFCS PKT64
PKT65 PKT128 PKT256

PKT512 PKT1024 RXBGOOD
RXBBAD TXBGOOD TXBBAD

l VCTRUNK 1–VCTRUNK 8 can be bound with VC-3s numbered 1–12 or VC-12s
numbered 1–63. VCTRUNK 9–VCTRUNK 16 can be bound with VC-3s numbered 13–
24 or VC-12s numbered 64–126.
at the same time. In addition, a VCTRUNK cannot be bound with VC-12s numbered 64–
126 and VC-3s numbered 22–24 at the same time.
configured into the fourth VC-4, and VC-12s numbered 64–126 should be configured into
the eighth VC-4.


Table 8-28 lists the parameters specified for the electrical interfaces of the EFT8.
Table 8-28 Parameters specified for the optical interfaces of the EFT8
Parameter Value


interface


NOTE
specifications, and back-to-back specifications of the EFT8 board of the N1 version.
the case of overloading, and latency specifications of the EFT8.
Figure 8-9 Connection for testing the throughput specifications, packet loss ratio in the case of
overloading, and latency specifications
Port 1
Tested Tested
Port 2
Port 1 Port 2
Data network
performance
analyzer
Figure 8-10 shows the connection for testing the back-to-back specifications of the EFT8.
Tested
equipment 1
Port 1 Port 2
Data network
performance
analyzer
Table 8-29 lists the throughput specifications of the EFT8. Table 8-30 lists the packet loss ratio
in the case of overloading of the EFT8. Table 8-31 lists the latency specifications of the EFT8.
Table 8-32 lists the back-to-back specifications of the EFT8.

NOTE
are used.
Table 8-29 lists the throughput specifications of the EFT8. The values are obtained when the
Table 8-29 Throughput specifications of the EFT8

(Byte) (%) (01,01,02) (pks/ (01,01,01) (pks/ sec)
sec) sec)
64 100.00 148810 148810 297620
128 100.00 84459 84459 168918
256 100.00 45290 45290 90580
512 100.00 23496 23496 46992
1024 100.00 11973 11973 23946
1280 100.00 9615 9615 19230
1518 100.00 8127 8127 16254
Table 8-30 lists the packet loss ratio in the case of overloading of the EFT8. The values are

Table 8-30 Packet loss ratio in the case of overloading of the EFT8
(Byte) (%) (01,01,02) (%) (01,01,01) (%)
64 100.00 0.000 0.000 0.000
128 100.00 0.000 0.000 0.000
256 100.00 0.000 0.000 0.000
512 100.00 0.000 0.000 0.000
1024 100.00 0.000 0.000 0.000
1280 100.00 0.000 0.000 0.000
1518 100.00 0.000 0.000 0.000
Table 8-31 lists the latency specifications of the EFT8. The values are obtained when the
Table 8-31 Latency specifications of the EFT8

64 100.00 506.4 506.4 501.2 501.2
128 100.00 518.8 518.8 508.5 508.5
256 100.00 536.2 536.2 515.8 515.8
512 100.00 578.9 578.9 538.0 538.0
1024 100.00 653.4 653.4 571.4 571.4
1280 100.00 688.1 688.1 585.6 585.6
1518 100.00 720.6 720.6 599.1 599.1

Table 8-32 lists the back-to-back specifications of the EFT8. The values are obtained when the
Table 8-32 Back-to-back specifications of the EFT8

Frames) Frames)
64 100.00 297620 297620 595240
128 100.00 168918 168918 337836
256 100.00 90580 90580 181160
512 100.00 46992 46992 93984
1024 100.00 23946 23946 47892
1280 100.00 19230 19230 38460
1518 100.00 16254 16254 32508
The mechanical specifications of the EFT8 are as follows:

l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the EFT8 at room temperature (25°C) is 26 W.
8.3 EFT8A
technical specifications of the EFT8A (8xFE transparent transmission board). This topic also
describes how to configure and commission the EFT8A.

The EFT8A is available in the following functional versions: N1 and N2.

8.3.2 Application
The EFT8A is used to access Ethernet services, manage bandwidths, and converge Ethernet
services.
The EFT8A supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
The EFT8A consists of the Ethernet access module, mapping module, interface converting
8.3.5 Front Panel
The front panel of the EFT8A has indicators, interfaces, and a bar code.
The EFT8A does not have any jumpers or DIP switches that are used for board settings.
8.3.7 Valid Slots
The EFT8A must be installed in a valid slot in the subrack. Otherwise, the EFT8A cannot work
normally.
8.3.8 Feature Code
The EFT8A does not have the feature code.
The EFT8A supports multiple Ethernet functions and features such as LCAS and LPT. Configure
You can set parameters for the EFT8A by using the U2000.
The technical specifications of the EFT8A include the Ethernet performance specifications,


The EFT8A is available in the following functional versions: N1 and N2.
Table 8-33 describes the versions of the EFT8A.
Table 8-33 Versions of the EFT8A

Item Description
Functional The EFT8A is available in the following functional versions: N1 and

versions N2.
Differences l The N2EFT8A supports the IEEE 802.3ah OAM and IEEE 802.1ag
OAM functions.
l The N2EFT8A supports the alarm indicating that the traffic crosses
the associated threshold.
l The N2EFT8A supports the command for loading MAC addresses
in a unified manner.
l The N2EFT8A supports the board version replacement function.
Substitution The N2EFT8A can substitute for the N1EFT8A.
8.3.2 Application
The EFT8A is used to access Ethernet services, manage bandwidths, and converge Ethernet
services.
Figure 8-11 shows the typical networking and application of the Ethernet transparent
transmission board. The Ethernet transparent transmission board realizes point-to-point
transparent transmission of Ethernet services. The Ethernet transparent transmission board
provides the following functions by using the interfaces on the board: data receipt, data
transmission, data mapping, and traffic control. In addition, the Ethernet transparent
transmission board performs port-based point-to-point transparent transmission, encapsulation/
decapsulation, overhead bytes and pointers processing, virtual concatenation, SDH mapping/
demapping, and LCAS function.

NMS
User A2
NE1
PORT 1
NE2 MSP ring NE4
PORT 2
NE3
User B2
Service flow
Data board
Cross-connect and
timing board
User B1 User A1

The EFT8A supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
Table 8-34 provides the functions and features of the EFT8A.
Table 8-34 Functions and features of the EFT8A

Function and EFT8A
Feature
Basic functions Transparently transmits 8xFE services.
Functions when Accesses 8xFE signals by providing interfaces on the front panel.
being used with the
interface board
Specifications of the l Supports 10BASE-T/100BASE-TX signals.

optical interface l The optical interfaces comply with IEEE 802.3u.

Function and EFT8A

Feature
frames l The first four ports on the N1EFT8A support the frame with a
length ranging from 64 bytes to 1535 bytes and the last four ports
support the frame with a length ranging from 64 bytes to 9600
bytes. The N1EFT8A supports the Jumbo frame with a length not
more than 9600 bytes.
l The N2EFT8A supports the frame with a length ranging from 64
bytes to 9600 bytes.
Maximum uplink 622 Mbit/s

bandwidth

l A VCTRUNK can be bound with a maximum of three VC-3s or
a maximum of 63 VC-12s.
l A VCTRUNK can be bound with the VC-12 path or VC-3 path at
one time. A VCTRUNK should not be bound with VC-12 and
l Different VCTRUNKs can be bound with paths at different levels.
l A VCTRUNK cannot be bound with VC-12s numbered 1–63 and
VC-3s numbered 10–12 at the same time.
l VC-4 numbered 4 supports the binding of VC-3 and VC-12 paths.
The other VC-4s support the binding of VC-3 paths only.

Encapsulation Supports the HDLC, LAPS, and GFP-F protocols.

format

function

Function and EFT8A

Feature
ETH-OAM function (N1EFT8A) Does not support the ETH-OAM function.

The N2EFT8A supports continuity check (CC) for the multicast
service, loopback (LB) test for the unicast service, link trace (LT) test,
loop detection (LD), auto-negotiation, fault diagnosis, and link
performance detection. The ETH-OAM function complies with IEEE
802.1ag and IEEE 802.3ah.
LPT function l The N1EFT8A supports the P2P LPT in GFP bearer mode.
l The N2EFT8A supports the P2P LPT in GFP/Ethernet bearer
mode.
Flow control Supports the FE interface-based flow control function that complies
function with IEEE 802.3x.

(IEEE 1588 V2)

l The N1EFT8A supports inloops and outloops at the MAC layer
on Ethernet ports.
l The N2EFT8A supports only inloops at the MAC layer on Ethernet
ports.
level:
l LCAS
l LPT

performance
monitoring

The EFT8A consists of the Ethernet access module, mapping module, interface converting

Figure 8-12 shows the functional block diagram of the EFT8A by describing how to process
1xFE signals.
Figure 8-12 Functional block diagram of the EFT8A
Backplane

Ethernet Interface
FE
Mapping module
LOS

SCC unit
SCC unit

module Power
module +3.3 V
+3.3 V backup power
Fuse
50 77 125 155
MHz MHz MHz MHz


Mapping Module
signals.



functions:
Clock Module
Power Module
require.
8.3.5 Front Panel

The front panel of the EFT8A has indicators, interfaces, and a bar code.

Figure 8-13 shows the appearance of the front panel of the EFT8A.

Figure 8-13 Front panel of the EFT8A
EFT8A
STAT
ACT
PROG
SRV
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
EFT8A
Indicators

Interfaces
The front panel of the EFT8A has eight FE interfaces. Table 8-35 describes the types and usage
of the interfaces of the EFT8A. For information about the cables connected to the interfaces, see
Table 8-35 Interfaces of the EFT8A

Interface

signals.

signals.

signals.

signals.

signals.

signals.

signals.

signals.
Pin Description
4 Grounding
5 Grounding
7 Grounding

Pin Description
8 Grounding

The EFT8A does not have any jumpers or DIP switches that are used for board settings.
NOTE
The daughter board of the N1EFT8A has only one push-button switch, which is used for resetting the
N1EFT8A. When the N1EFT8A operates normally, do not push the switch. Otherwise, a cold reset is
performed on the N1EFT8A and the services may be lost.
8.3.7 Valid Slots

The EFT8A must be installed in a valid slot in the subrack. Otherwise, the EFT8A cannot work
normally.
The EFT8A can be installed in slots 5–8 and 11–13 in the subrack. In this case, the bandwidth
is 622 Mbit/s.
8.3.8 Feature Code

The EFT8A does not have the feature code.


matches the board.
is correct.
----End



consistent. Generally, use the default value. In the case of product version R006, the
default mode of the J1/J2 is Single-Byte Mode and the default value of the J1/J2 is
NOTE
----End

Channels.
----End

Boards.
----End


The EFT8A supports multiple Ethernet functions and features such as LCAS and LPT. Configure
You can configure the following Ethernet functions for the EFT8A by using the U2000:
l LCAS
l LPT
l Test Frame

You can set parameters for the EFT8A by using the U2000.
You can set the following main parameters for the EFT8A by using the U2000:
l Working mode
l LCAS
l Mapping protocol
l Byte packet
l CRC error frame
Settings.

Troubleshooting
Table 8-37 lists the faults that occur on the EFT8A frequently and the troubleshooting methods.
Table 8-37 Methods used to troubleshoot the faults that occur on the EFT8A frequently



interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EFT8A, see Replacing an Ethernet Board.

8.3.13.1 N1EFT8A
ETH_LOS EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNFL

CT
HP_LOM LCAS_BAND_DE- LCAS_FOPR

CREASED

LP_UNEQ_VC3 LPT_INEFFECT LPT_RFI
NO_BD_SOFT SLAVE_WORKING TEST_STATUS
TU_AIS_VC12 TU_AIS_VC3 TU_LOP_VC12
TU_LOP_VC3 VCAT_LOA VCAT_LOM_VC12
W_R_FAIL TR_LOC T_LOSEX
ETH_NO_FLOW SWDL_PKG_NOBDSOFT
8.3.13.2 N2EFT8A
LP_RDI_VC12 LP_RDI_VC3 LP_REI_VC12 C3
LP_UNEQ_VC3 TU_AIS_VC12 TU_AIS_VC3
TU_LOP_VC12 TU_LOP_VC3 B3_EXC_VC3
B3_SD_VC3 BIP_EXC BIP_SD
VCAT_SQM_VC12 VCAT_SQM_VC3 VCAT_LOM_VC12
VCAT_LOM_VC3 LOOP_ALM FLOW_OVER
ETH_LOS FCS_ERR VCAT_LOA
W_R_FAIL HARD_BAD BDID_ERROR
FPGA_ABN TEST_STATUS BD_STATUS
NO_BD_SOFT BOOTROM_BAD COMMUN_FAIL
SLAVE_WORKING ALM_GFP_dLFD LCAS_PLCT
LCAS_TLCT LCAS_PLCR LCAS_TLCR
LCAS_FOPT LCAS_FOPR HP_LOM

LPT_INEFFECT LPT_RFI EX_ETHOAM_CC_LOS
EX_ETHOAM_MPID_CNF TR_LOC T_LOSEX

LCT
ETH_NO_FLOW VCTRUNK_NO_FLOW ETH_CFM_MISMERGE
ETH_CFM_UNEXPERI ETH_CFM_LOC ETH_CFM_RDI
ETHOAM_RMT_LOOP ETHOAM_RMT_SD ETHOAM_RMT_CRIT_FA

ULT
ETHOAM_DISCOVER_FAI ETHOAM_SELF_LOOP
L

8.3.14.1 N1EFT8A
Table 8-38 SDH

HPBBE HPCSES HPES
HPFESES HPSES HPUAS
LPBBE LPCSES LPES
LPFESES LPSES LPUAS
Table 8-39 SDH

HPBBE HPCSES HPES
HPFESES HPSES HPUAS
LPBBE LPCSES LPES
LPFESES LPSES LPUAS




Packets Received
Packets Transmitted







8.3.14.2 N2EFT8A
Table 8-42 SDH
HPBBE HPES HPSES

LPBBE LPES LPSES
LPUAS LPCSES LPFEBBE

UndersizePkts OversizePkts Fragments

RXBRDCAST RXMULCAST ETHUNDER
ETHOVER ETHFRG RXPKT64
RXPKT65 RXPKT128 RXPKT256
RXPKT512 RXPKT1024

TXBRDCAST TXMULCAST TXPKT64
TXPKT65 TXPKT128 TXPKT256
TXPKT512 TXPKT1024
Table 8-46 Statistics of specific events of RMON performance

RXUNICAST TXUNICAST RXPAUSE
TXPAUSE ETHFCS PKT64
PKT65 PKT128 PKT256
PKT512 PKT1024 RXBGOOD
RXBBAD TXBGOOD TXBBAD


numbered 1–63.
at the same time.
configured into the fourth VC-4.

The technical specifications of the EFT8A include the Ethernet performance specifications,

Table 8-47 lists the parameters specified for the electrical interfaces of the EFT8A.
Table 8-47 Parameters specified for the optical interfaces of the EFT8A
Parameter Value


interface

NOTE
specifications, and back-to-back specifications of the EFT8A board of the N1 version.
the case of overloading, and latency specifications of the EFTA.

Figure 8-14 Connection for testing the throughput specifications, packet loss ratio in the case
of overloading, and latency specifications
Port 1
Tested Tested
Port 2
Port 1 Port 2
Data network
performance
analyzer
Figure 8-15 shows the connection for testing the back-to-back specifications of the EFT8A.
Tested
equipment 1
Port 1 Port 2
Data network
performance
analyzer
Table 8-48 lists the throughput specifications of the EFT8A. Table 8-49 lists the packet loss
ratio in the case of overloading of the EFT8A. Table 8-50 lists the latency specifications of the
EFT8A. Table 8-51 lists the back-to-back specifications of the EFT8A.

NOTE
are used.
Table 8-48 lists the throughput specifications of the EFT8A. The values are obtained when the
Table 8-48 Throughput specifications of the EFT8A

(Byte) (%) (01,01,02) (pks/ (01,01,01) (pks/ sec)
sec) sec)
64 100.00 148810 148810 297620
128 100.00 84459 84459 168918
256 100.00 45290 45290 90580
512 100.00 23496 23496 46992
1024 100.00 11973 11973 23946
1280 100.00 9615 9615 19230
1518 100.00 8127 8127 16254
Table 8-49 lists the packet loss ratio in the case of overloading of the EFT8A. The values are

Table 8-49 Packet loss ratio in the case of overloading of the EFT8A
(Byte) (%) (01,01,02) (%) (01,01,01) (%)
64 100.00 0.000 0.000 0.000
128 100.00 0.000 0.000 0.000
256 100.00 0.000 0.000 0.000
512 100.00 0.000 0.000 0.000
1024 100.00 0.000 0.000 0.000
1280 100.00 0.000 0.000 0.000
1518 100.00 0.000 0.000 0.000
Table 8-50 lists the latency specifications of the EFT8A. The values are obtained when the
Table 8-50 Latency specifications of the EFT8A

64 100.00 506.4 506.4 501.2 501.2
128 100.00 518.8 518.8 508.5 508.5
256 100.00 536.2 536.2 515.8 515.8
512 100.00 578.9 578.9 538.0 538.0
1024 100.00 653.4 653.4 571.4 571.4
1280 100.00 688.1 688.1 585.6 585.6
1518 100.00 720.6 720.6 599.1 599.1

Table 8-51 lists the back-to-back specifications of the EFT8A. The values are obtained when
the SmartApplication is set as follows:
Table 8-51 Back-to-back specifications of the EFT8A

Frames) Frames)
64 100.00 297620 297620 595240
128 100.00 168918 168918 337836
256 100.00 90580 90580 181160
512 100.00 46992 46992 93984
1024 100.00 23946 23946 47892
1280 100.00 19230 19230 38460
1518 100.00 16254 16254 32508
The mechanical specifications of the EFT8A are as follows:

l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the EFT8A at room temperature (25°C) is 26 W.
8.4 EGT2
technical specifications of the EGT2 (2xGE transparent transmission board). This topic also
describes how to configure and commission the EGT2.

The EGT2 is available in two functional versions, namely, N1 and N2.

8.4.2 Application
The EGT2 is used to access Ethernet services, manage bandwidths, and converge Ethernet
services.
The EGT2 supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
The EGT2 consists of the Ethernet access module, mapping module, interface converting
8.4.5 Front Panel
The front panel of the EGT2 has indicators, interfaces, a bar code, and a laser safety class label.
The EGT2 does not have any jumpers or DIP switches that are used for board settings.
8.4.7 Valid Slots
The EGT2 must be installed in a valid slot in the subrack. Otherwise, the EGT2 cannot work
normally.
8.4.8 Feature Code
The feature code of the EGT2 indicates the type of interface.
The EGT2 supports multiple Ethernet functions and features such as LCAS and LPT. Configure
You can set parameters for the EGT2 by using the U2000.
The technical specifications of the EGT2 include the parameters specified for optical interfaces,
laser safety class, Ethernet performance specifications, mechanical specifications, and power
consumption.


The EGT2 is available in two functional versions, namely, N1 and N2.
Table 8-52 describes the versions of the EGT2.
Table 8-52 Versions of the EGT2

Item Description
Functional versions The EGT2 is available in two functional versions, namely, N1 and
N2.
Differences None
Substitution The N2EGT2 can substitute for the N1EGT2.
8.4.2 Application
The EGT2 is used to access Ethernet services, manage bandwidths, and converge Ethernet
services.
Figure 8-16 shows the typical networking and application of the Ethernet transparent
transmission board. The Ethernet transparent transmission board realizes point-to-point
transparent transmission of Ethernet services. The Ethernet transparent transmission board
provides the following functions by using the interfaces on the board: data receipt, data
transmission, data mapping, and traffic control. In addition, the Ethernet transparent
transmission board performs port-based point-to-point transparent transmission, encapsulation/
decapsulation, overhead bytes and pointers processing, virtual concatenation, SDH mapping/
demapping, and LCAS function.

NMS
User A2
NE1
PORT 1
NE2 MSP ring NE4
PORT 2
NE3
User B2
Service flow
Data board
Cross-connect and
timing board
User B1 User A1

The EGT2 supports the transparent transmission of Ethernet services, LCAS function, and test
frames.
Table 8-53 provides the functions and features of the EGT2.
Table 8-53 Functions and features of the EGT2

Function and EGT2
Feature
Basic functions Transparently transmits 2xGE services.
Functions when Accesses 2xGE signals by providing interfaces on the front panel.
being used with the
interface board

Function and EGT2

Feature
Specifications of the l Supports the 1000BASE-SX/LX/ZX/VX Ethernet optical

optical interface interfaces. The optical interfaces support the auto-negotiation
function in compliance with IEEE 802.3z. The optical interfaces
use the SFP optical module and support hot swapping. When the
multi-mode optical fiber is used, the maximum transmission
distance is 550 m. When the single-mode optical fiber is used, the
maximum transmission distance is 10 km. The optical modules
that can meet different requirements for the transmission distance
such as 40 km and 80 km can also be used.
l The N2EGT2 also supports the 1000BASE-T RJ-45 Ethernet
electrical interface. The electrical interface supports the 1000M
full-duplex working mode. The N2EGT2 uses the SFP electrical
interface and supports hot swapping. The maximum transmission
distance is 100 m.
l The N2EGT2 supports the single-fiber bidirectional optical
bytes.
Maximum uplink The maximum uplink bandwidth is 2.5 Gbit/s. The EGT2 can adapt
bandwidth to the bandwidth of the slot.
Bound bandwidth 16xVC-4, or 48xVC-3

l N1EGT2: A VCTRUNK can be bound with a maximum of eight
VC-4s or a maximum of 24 VC-3s. A VCTRUNK can be bound
with VC-4s numbered 1-16 or VC-3s numbered 1-48.
l N2EGT2: A VCTRUNK can be bound with a maximum of 16
VC-4s or a maximum of 48 VC-3s. A VCTRUNK can be bound
with VC-4s numbered 1-16 or VC-3s numbered 1-48.
l The virtual concatenation modes of the two VCTRUNKs of the
board should be the same. That is, the two VCTRUNKs should
be of the VC-4 virtual concatenation or of the VC-3 virtual
concatenation.
Mapping Supports VC-3, VC-4, VC-3-Xv (X ≤ 24 (N1EGT2); X ≤ 48

granularities (N2EGT2)), and VC-4-Xv (X ≤ 8 (N1EGT2); X ≤ 16 (N2EGT2))
granularities.
Encapsulation format Supports the HDLC, LAPS, and GFP-F protocols.

Function and EGT2

Feature
MTU l The N1EGT2 supports the setting of the packet length, which
ranges from 1518 bytes to 9600 bytes. After the setting becomes
valid, the length of the packets that enter or exit the IP ports is
restricted by the pre-set MTU.
l The N2EGT2 supports the setting of the packet length, which
ranges from 1518 bytes to 9600 bytes. After the setting becomes
valid, the length of the packets that enter the IP ports is restricted
by the pre-set MTU.
VLAN Supports the VLAN transparent transmission.

function
ETH-OAM function l The N1EGT2 does not support the ETH-OAM function.
l The N2EGT2 supports CC for the multicast service, LB test for
the unicast service, and LT test. The ETH-OAM function
complies with IEEE 802.1ag.
LPT function Supports the P2P LPT in GFP bearer mode.
Flow control function Supports the GE port-based flow control function that complies with
IEEE 802.3x.

(IEEE 1588 V2)
Loopback function Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
level:
l LCAS
l LPT

performance
monitoring


The EGT2 consists of the Ethernet access module, mapping module, interface converting
Figure 8-17 shows the functional block diagram of the EGT2 by describing how to process
1xGE signals.
Figure 8-17 Functional block diagram of the EGT2

Backplane

GE Ethernet Interface
Mapping module
Laser LOS
shutdown

SCC unit
SCC unit

module -48 V/-60 V
Clock module Power
module +3.3 V +3.3 V backup power
Fuse
50 77 125 155
MHz MHz MHz MHz


Mapping Module
signals.




functions:

Clock Module
Power Module
require.
8.4.5 Front Panel

The front panel of the EGT2 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 8-18 shows the appearance of the front panel of the N1EGT2/N2EGT2 that is installed
with the GE optical interface.

Figure 8-18 Front panel of the N1EGT2/N2EGT2 that is installed with the GE optical interface
EGT2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EGT2
The N2EGT2 can also be installed with the GE electrical interface. Figure 8-19 shows the
appearance of the front panel of the N2EGT2 that is installed with the GE electrical interface.

Figure 8-19 Front panel of the N2EGT2 that is installed with the GE electrical interface
EGT2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
OUT1
IN1
OUT2
IN2
EGT2
Indicators

Interfaces
The front panel of the N1EGT2/N2EGT2 has two GE optical interfaces. Table 8-54 describes
the types and usage of the optical interfaces of the N1EGT2/N2EGT2.
Table 8-54 Optical interfaces of the N1EGT2/N2EGT2
IN1/OUT1 LC (swappable) Transmits and receives 1000BASE-SX/LX/ZX

signals.
IN2/OUT2 LC (swappable) Transmits and receives 1000BASE-SX/LX/ZX

signals.
The two GE electrical interfaces of the N2EGT2 are of the same type and have the same usage.
Table 8-55 describes the types and usage of the electrical interfaces of the N2EGT2.
Table 8-55 Electrical interfaces of the N2EGT2
GE RJ-45 (swappable) Transmits and receives 1000BASE-T signals.
Table 8-56 provides the pin assignments of the RJ-45 interface of the N2EGT2.
Table 8-56 Pin assignments of the RJ-45 interface of the N2EGT2
Pin Description
1 BI_DA+
2 BI_DA–
3 BI_DB+
4 BI_DC+
5 BI_DC–
6 BI_DB–
7 BI_DD+
8 BI_DD–

The EGT2 does not have any jumpers or DIP switches that are used for board settings.

8.4.7 Valid Slots

The EGT2 must be installed in a valid slot in the subrack. Otherwise, the EGT2 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The EGT2 can be installed in slots 5–8 and 11–13 in the subrack.
l When the cross-connect capacity is 20 Gbit/s, the EGT2 can be installed in slots 5–8 and
11–13. When the EGT2 is installed in slots 5 and 6, the bandwidth is 600 Mbit/s. When the
EGT2 is installed in slots 7, 8, 11, and 12, the bandwidth is 2.5 Gbit/s. When the EGT2 is
installed in slot 13, the bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the EGT2 can be installed in slots 5–8 and
11–13. In this case, the bandwidth is 2.5 Gbit/s.
8.4.8 Feature Code

The feature code of the EGT2 indicates the type of interface.
Table 8-57 provides the relationship between the feature code of the EGT2 and the type of
interface.
Table 8-57 Relationship between the feature code of the EGT2 and the type of interface
Board Feature Code Type of Interface
SSN1EGT210 and 10 1000BASE-SX (0.5 km)

SSN2EGT210
SSN1EGT211 and 11 1000BASE-LX (10 km)

SSN2EGT211
SSN1EGT212 and 12 1000BASE-VX (40 km)

SSN2EGT212
SSN1EGT213 and 13 1000BASE-ZX (80 km)

SSN2EGT213
SSN2EGT214 14 1000BASE-T (100 m)



matches the board.
is correct.
----End


NOTE
----End


Channels.
----End

Boards.
----End

The EGT2 supports multiple Ethernet functions and features such as LCAS and LPT. Configure
You can configure the following Ethernet functions for the EGT2 by using the U2000:
l LCAS
l LPT
l Test Frame

You can set parameters for the EGT2 by using the U2000.
You can set the following main parameters for the EGT2 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 8-58 lists the faults that occur on the EGT2 frequently and the troubleshooting methods.

Table 8-58 Methods used to troubleshoot the faults that occur on the EGT2 frequently


interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EGT2, see Replacing an Ethernet Board.

8.4.13.1 N1EGT2
ALM_GFP_dLFD AU_AIS AU_LOP
B3_EXC_VC3 B3_EXC_VC4 B3_SD_VC3

COMMUN_FAIL ETH_LOS FPGA_ABN
HARD_BAD HP_RDI HP_SLM
HP_TIM HP_UNEQ LASER_MOD_ERR
LCAS_BAND_DE- LCAS_FOPR LCAS_FOPT

CREASED
LCAS_PLCR LCAS_PLCT LCAS_TLCR
LCAS_TLCT LINK_ERR LOOP_ALM
LP_RDI_VC3 LP_SLM_VC3 LP_TIM_VC3
LP_UNEQ_VC3 LPT_RFI LSR_NO_FITED
NO_BD_SOFT TEST_STATUS TU_AIS_VC3
TU_LOP_VC3 W_R_FAIL PATCHFILE_NOTEXIST
PATCH_ERR PATCH_NOT_CONFIRM T_LOSEX
TR_LOC ETH_NO_FLOW SWDL_PKG_NOBD-

SOFT
8.4.13.2 N2EGT2
ALM_GFP_dLFD AU_AIS AU_LOP
B3_SD_VC3 B3_EXC_VC3 B3_EXC_VC4
B3_SD_VC4 BD_STATUS COMMUN_FAIL
ETH_CFM_RDI ETH_CFM_LOC ETH_CFM_MISMERGE
ETH_CFM_UNEXPERI ETH_LOS ETH_NO_FLOW
EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNF FCS_ERR

LCT
FLOW_OVER FPGA_ABN HARD_BAD
HP_RDI HP_SLM HP_TIM
HP_UNEQ LASER_MOD_ERR LCAS_FOPR
LCAS_TLCR LCAS_TLCT LINK_ERR
LOOP_ALM LP_RDI_VC3 LP_SLM_VC3
LP_TIM_VC3 LP_UNEQ_VC3 LPT_RFI
LSR_NO_FITED LSR_WILL_DIE LTEMP_OVER

MOD_TYPE_MIS- NO_BD_SOFT PORT_MODULE_OFFLINE

MATCH
IN_PWR_HIGH IN_PWR_LOW OUT_PWR_HIGH
OUT_PWR_LOW T_LOSEX TD
TEMP_OVER TF TR_LOC
TU_AIS_VC3 TU_LOP_VC3 VCAT_LOA
VCAT_SQM_VC4 VCTRUNK_NO_FLOW SWDL_PKG_NOBDSOFT

8.4.14.1 N1EGT2
Table 8-59 SDH
HPBBE HPCSES HPES
HPFESES HPSES HPUAS
LPBBE LPCSES LPES
LPFEBBE LPFECSES LPFECSES
LPFEES LPFESES LPSES
LPUAS
Fragments Jabbers FCSErrors
Packets Received(64 Packets Received(65~127

Octets in Length) Octets in Length)(packets/ Packets Received(128~255 Octets
(packets/s) s) in Length)(packets/s)

Packets Received Packets Received

(256~511 Octets in (512~1023 Octets in Packets Received(1024~1518
Length)(packets/s) Length)(packets/s) Octets in Length)(packets/s)
Multicast Packets Broadcast Packets

Received(packets/s) Received(packets/s) Drop Events(times/s)
Undersize Packets Oversize Packets Received

Received(packets/s) (packets/s) Fragments(packets/s)
Jabbers(packets/s) Octets Received(Byte/s) Packets Received(packets/s)

Packets Transmitted
Packets Transmitted(64 (65~127 Octets in Length) Packets Transmitted(128~255
Octets in Length)(packets/s) (packets/s) Octets in Length)(packets/s)

(256~511 Octets in Length) (512~1023 Octets in (1024~1518 Octets in Length)
(packets/s) Length)(packets/s) (packets/s)
Unicast Packets Received Unicast Packets Multicast Packets Transmitted

(packets/s) Transmitted(packets/s) (packets/s)
Broadcast Packets Pause Frames Received Pause Frames Transmitted

Transmitted(packets/s) (frames/s) (frames/s)
Packets Received and Packets Received and

Transmitted(64 Octets in Transmitted(65~127 Octets in
FCS Errors(frames/s) Length)(packets/s) Length)(packets/s)

Packets Received and Transmitted(256~511 Packets Received and
Transmitted(128~255 Octets Octets in Length)(packets/ Transmitted(512~1023 Octets
in Length)(packets/s) s) in Length)(packets/s)

Transmitted(1024~1518
Octets in Length)(packets/s)
8.4.14.2 N2EGT2
Table 8-63 SDH

HPBBE HPCSES HPES

HPUAS OSPITMPCUR OSPITMPMAX
OSPITMPMIN RPLCUR RPLMAX
RPLMIN TLBCUR TLBMAX
TLBMIN TPLCUR TPLMAX
TPLMIN VC3BBE VC3CSES
VC3ES VC3FEBBE VC3FECSES
VC3FEES VC3FESES VC3FEUAS
VC3SES VC3UAS XCSTMPCUR
XCSTMPMAX XCSTMPMIN
Fragments Jabbers FCSErrors
Packets Received(64 Packets Received(65~127

Octets in Length) Octets in Length)(packets/ Packets Received(128~255 Octets
(packets/s) s) in Length)(packets/s)
Packets Received Packets Received

(256~511 Octets in (512~1023 Octets in Packets Received(1024~1518
Length)(packets/s) Length)(packets/s) Octets in Length)(packets/s)
Multicast Packets Broadcast Packets

Received(packets/s) Received(packets/s) Drop Events(times/s)

Packets Transmitted
Octets in Length)(packets/s) (packets/s) Octets in Length)(packets/s)




Transmitted(packets/s) (frames/s) (frames/s)

Transmitted(64 Octets in Transmitted(65~127 Octets in
FCS Errors(frames/s) Length)(packets/s) Length)(packets/s)

Packets Received and Transmitted(256~511 Packets Received and
Transmitted(128~255 Octets Octets in Length)(packets/ Transmitted(512~1023 Octets
in Length)(packets/s) s) in Length)(packets/s)

Transmitted(1024~1518
Octets in Length)(packets/s)

l The board supports two VCTRUNKS. The two VCTRUNKs can be bound with VC-4 paths
or VC-3 paths, but the levels of the paths with which the two VCTRUNKs are bound must
be the same.
l The bandwidth of the bus is 2.5 Gbit/s and is shared by the two VCTRUNKs. One
VCTRUNK can be bound with a maximum of eight VC-4s (or 24 VC-3s). The timeslots
with which a VCTRUNK can be bound can be selected from VC-4s numbered 1–16 (or
VC-3s numbered 1–48).

The technical specifications of the EGT2 include the parameters specified for optical interfaces,
consumption.

Table 8-67 lists the parameters specified for the optical interfaces of the EGT2.
Table 8-67 Parameters specified for the optical interfaces of the EGT2
Parameter Value
Type of optical 1000BASE- 1000BASE-VX 1000BASE- 1000BASE-SX

interface ZX (80 km) (40 km) LX (10 km) (0.5 km)

Parameter Value
Type of fiber Single-mode Single-mode Single-mode Multi-mode LC

LC LC LC
Launched -2 to 5 -5 to 0 -9 to -3 -9.5 to -2.5

optical power
range (dBm)

wavelength
range (nm)
Minimum -3 -3 -3 0
overload (dBm)
Receiver -23 -23 20 -17

sensitivity
(dBm)
Minimum 9 9 9 9
extinction ratio
(dB)
Ethernet Electrical Interfaces

Table 8-68 lists the parameters specified for the electrical interfaces of the EGT2.
Table 8-68 Parameters specified for the electrical interfaces of the EGT2
Type of Interface Code Type
1000BASE-T, RJ-45 4D-PAM5
NOTE
Only the EGT2 boards of the N2 version supports the GE electrical interfaces.

NOTE
specifications, and back-to-back specifications of the EGT2 board of the N1 version.
the case of overloading, and latency specifications of the N1EGT2.

of overloading, and latency specifications of the N1EGT2
Port 1
Tested Tested
Port 2
Port 1 Port 2
Data network
performance
analyzer
Figure 8-21 shows the connection for testing the back-to-back specifications of the N1EGT2.
Figure 8-21 Connection for testing the back-to-back specifications of the N1EGT2
Tested
equipment 1
Port 1 Port 2
Data network
performance
analyzer
Table 8-69 lists the throughput specifications of the N1EGT2. Table 8-70 lists the packet loss
ratio in the case of overloading of the N1EGT2. Table 8-71 lists the latency specifications of
the N1EGT2. Table 8-72 lists the back-to-back specifications of the N1EGT2.

NOTE
are used.
configured and 24 VC-3s are bound on the GE port.
Table 8-69 lists the throughput specifications of the N1EGT2. The values are obtained when
Table 8-69 Throughput specifications of the N1EGT2

(Byte) (%) (01,02,02) (pks/ (01,02,01) (pks/ sec)
sec) sec)
64 100.00 1488095 1488095 2976190
128 100.00 844595 844595 1689190
256 100.00 452899 452899 905798
512 100.00 234962 234962 469924
1024 100.00 119732 119732 239464
1280 100.00 96154 96154 192308
1518 100.00 81274 81274 162548
Table 8-70 lists the packet loss ratio in the case of overloading of the N1EGT2. The values are

Table 8-70 Packet loss ratio in the case of overloading of the N1EGT2
(Byte) (%) (01,02,02) (%) (01,02,01) (%)
64 100.00 0.000 0.000 0.000
128 100.00 0.000 0.000 0.000
256 100.00 0.000 0.000 0.000
512 100.00 0.000 0.000 0.000
1024 100.00 0.000 0.000 0.000
1280 100.00 0.000 0.000 0.000
1518 100.00 0.000 0.000 0.000
Table 8-71 lists the latency specifications of the N1EGT2. The values are obtained when the
Table 8-71 Latency specifications of the N1EGT2

64 100.00 35.7 35.7 35.2 35.2
128 100.00 37.1 37.1 36.1 36.1
256 100.00 39.5 39.5 37.4 37.4
512 100.00 44.1 44.1 40.1 40.1
1024 100.00 53.2 53.2 45.1 45.1
1280 100.00 57.6 57.6 47.4 47.4
1518 100.00 61.9 61.9 49.7 49.7

Table 8-72 lists the back-to-back specifications of the N1EGT2. The values are obtained when
Table 8-72 Back-to-back specifications of the N1EGT2

Frames) Frames)
64 100.00 2976190 2976190 5952380
128 100.00 1689190 1689190 3378380
256 100.00 905798 905798 1811596
512 100.00 469924 469924 939848
1024 100.00 239464 239464 478928
1280 100.00 192308 192308 384616
1518 100.00 162548 162548 325096
NOTE
specifications, and back-to-back specifications of the EGT2 board of the N2 version.
the case of overloading, latency specifications, and back-to-back specifications of the N2EGT2.
of overloading, latency specifications, and back-to-back specifications of the N2EGT2
Tested Tested
Port 1 Port 2
Data network
performance
analyzer

Table 8-73 lists the throughput specifications of the N2EGT2. Table 8-74 lists the packet loss
ratio in the case of overloading of the N2EGT2. Table 8-75 lists the latency specifications of
the N2EGT2. Table 8-76 lists the back-to-back specifications of the N2EGT2.
NOTE
are used.
configured and two VC-3s are bound on the GE port.
Table 8-73 lists the throughput specifications of the N2EGT2. The values are obtained when
l Minimum frame size (byte): 64
l Maximum frame size (byte): 1518
l Step frame size (byte): Custom
l Number of pairs: 1
l Initial rate (%): 15
l Maximum rate (%): 15
l Mode: Uni-directional
Table 8-73 Throughput specifications of the N2EGT2
Frame Size Passed Rate (%) (01,05,02) to (01,05,01) Total (pks/sec)

(byte) (pks/sec)
64 11.23 167112 334224
128 10.48 88527 177054
256 9.75 44138 88276
512 9.74 22894 45788
1024 9.75 11674 23348
1280 9.75 9373 18746
1518 9.75 7922 15844

Table 8-74 lists the packet loss ratio in the case of overloading of the N2EGT2. The values are
l Initial rate (%): 11.23
l Maximum rate (%): 10.00
l Resolution rate (%): None
Table 8-74 Packet loss ratio in the case of overloading of the N2EGT2
Frame Size Rate Tested (%) (01,05,02) to (01,05,01) Average (%)
(byte) (%)
64 11.23 0.000 0.000
128 10.48 0.000 0.000
256 9.75 0.000 0.000
512 9.74 0.000 0.000
1024 9.75 0.000 0.000
1280 9.75 0.000 0.000
1518 9.75 0.000 0.000
Table 8-75 lists the latency specifications of the N2EGT2. The values are obtained when the

l Measure on one receiving card only
Table 8-75 Latency specifications of the N2EGT2

(byte) (%) CT (us) (us)-S&F (us)
64 11.23 92.7 92.7 92.1 92.1
128 10.48 97.7 97.7 96.6 96.6
256 9.75 109.5 109.5 107.5 107.5
512 9.74 133.1 133.1 129.0 129.0
1024 9.75 178.8 178.8 170.6 170.6
1280 9.75 204.1 204.1 193.9 193.9
1518 9.75 224.0 224.0 211.9 211.9
Table 8-76 lists the back-to-back specifications of the N2EGT2. The values are obtained when
a value more than 1 on the SmartApplication.


Table 8-76 Back-to-back specifications of the N2EGT2

Frame Size Rate Tested (%) (01,05,02) to (01,05,01) Total (frames)
(byte) Burst Size (frames)
64 11.23 334224 668448
128 10.48 177054 354108
256 9.75 88276 176552
512 9.74 45754 91508
1024 9.75 23348 46696
1280 9.75 18752 37504
1518 9.75 15848 31696
Laser Safety Class

The mechanical specifications of the EGT2 are as follows:
l Weight (kg): 0.9
Power Consumption
The maximum power consumption of the N1EGT2 at room temperature (25°C) is 29 W.
The maximum power consumption of the N2EGT2 at room temperature (25°C) is 15 W.
8.5 EFS0

The EFS0 is available in several functional versions. Select a functional board according to
actual requirements.
8.5.2 Application
The EFS0 is used to access Ethernet services, manage bandwidths, and realize Layer 2 switching
of Ethernet services.


The EFS0 supports the Layer 2 switching, MPLS, and broadcast functions.
The EFS0 consists of the Ethernet access module, network processor module, mapping module,
interface converting module, logic and control module, clock module, and power module.
8.5.5 Front Panel
The front panel of the EFS0 has indicators and a bar code.
The EFS0 does not have any jumpers or DIP switches that are used for board settings.
8.5.7 Valid Slots
The EFS0 must be installed in a valid slot in the subrack. Otherwise, the EFS0 cannot work
normally.
8.5.8 Feature Code
The EFS0 does not have the feature code.
The EFS0 supports the 1:1 TPS protection.
The EFS0 supports multiple Ethernet functions and features such as Layer 2 switching, LCAS,
and QoS. Configure the functions according to actual requirements.
You can set parameters for the EFS0 by using the U2000.
The technical specifications of the EFS0 include the dimensions, weight, and power
consumption.

The EFS0 is available in several functional versions. Select a functional board according to
actual requirements.

The EFS0 is available in the following functional versions: N1, N2, N4, and N5. The
N2EFS0/N1EFS0 is discontinued.
Table 8-77 describes the versions of the EFS0.
Table 8-77 Versions of the EFS0

Item Description
Functional The EFS0 is available in the following functional versions: N1, N2, N4,
versions and N5.
Differences l The maximum uplink bandwidth of the N1EFS0 is 622 Mbit/s.

l The maximum uplink bandwidth of the N2EFS0/N4EFS0/N5EFS0 is
1.25 Gbit/s.
l Supports flow classification based on PORT, PORT+VLAN ID, and
PORT+VLAN ID+VLAN PRI.
l The number of VCTRUNKs supported by the N1EFS0 is 12.
l The number of VCTRUNKs supported by the N5EFS0, N4EFS0 and
N2EFS0 is 24.
Substitution The N2EFS0 supports the board version replacement function and can
replace the N1EFS0.
The N4EFS0 supports the board version replacement function and can
replace the N2EFS0/N1EFS0.
The N5EFS0 supports the board version replacement function and can
replace the N4EFS0/N2EFS0/N1EFS0.
8.5.2 Application
Figure 8-23 shows the typical networking and application of the Ethernet switching board. the
Ethernet switching board accesses and converges Ethernet services, and provides the Ethernet
data with the following data features: Layer 2 switching, port isolation, flow classification, traffic
control, VLAN management, and priority configuration. In addition, the Ethernet switching
board performs encapsulation/decapsulation, virtual concatenation, and SDH mapping/
demapping for data. The Ethernet switching board can be interconnected with the bandwidth
access equipment and the data communication equipment at the same time, thus to provide a
network-level solution.

Figure 8-23 Networking and application of the Ethernet switching board
NMS
User A2 NE1
PORT 1
VLAN 100 NE2 MSP ring NE4
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100
Service flow PORT 1 VLAN 100 User B1

Line board
Data board
Cross-connect and
timing board User A1

Table 8-78 provides the functions and features of the EFS0.
Table 8-78 Functions and features of the EFS0
Function and Feature EFS0
Basic functions Processes 8xFE services and supports the convergence of 60x10
Mbit/s or 6x100 Mbit/s services.
Functions when being l Accesses 8xFE signals through the electrical interface when
used with the interface the EFS0 is used with the ETF8.
board l Accesses 8xFE signals through the optical interface when the
EFS0 is used with the EFF8.
l Provides the TPS protection for the 8xFE signals through the
electrical interface when the EFS0 is used with the ETS8 and
TSB8.
l The N5EFS0 can access 8xFE signals through the electrical
interface when it is used with the ETF8A.
l The N5EFS0 can access 8xFE signals through the optical
interface when it is used with the EFF8A.

Specifications of the l Supports 10BASE-T/100BASE-TX signals when the EFS0 is

optical interface used with the ETF8.
l Supports 100BASE-FX signals when the EFS0 is used with
the EFF8. The optical interfaces comply with IEEE 802.3u.
l The N5EFS0 supports 10BASE-T/100BASE-TX signals
when it is used with the ETF8A.
l The N5EFS0 supports 100BASE-FX signals when it is used
with the EFF8A. The optical interfaces comply with IEEE
802.3u.
Format of service frames l Supports Ethernet II, IEEE 802.3, and IEEE 802.1 q/p
formats.
l Supports the frame with a length ranging from 64 bytes to
9600 bytes.
Maximum uplink l The maximum uplink bandwidth of the N1EFS0 is 622 Mbit/
bandwidth s.
l The maximum uplink bandwidth of the N2EFS0/N4EFS0/
N5EFS0 is 1.25 Gbit/s.
l The EFS0 can adapt to the bandwidth of the slot.
Bound bandwidth N1EFS0: 12xVC-3, or 63xVC-12 + 9xVC-3

N2EFS0/N4EFS0/N5EFS0: 24xVC-3, or 126xVC-12 +
18xVC-3
VCTRUNKs The number of supported VCTRUNKs is as follows:

l The number of VCTRUNKs supported by the N1EFS0 is 12.
l The number of VCTRUNKs supported by the N2EFS0/
N4EFS0/N5EFS0 is 24.
l In the case of the N1EFS0/N2EFS0/N4EFS0, VCTRUNK 1–
VCTRUNK 12 can be bound with VC-4s numbered 1–4 only,
and VCTRUNK 13–VCTRUNK 24 can be bound with VC-4s
numbered 5–8 only.
l VC-4s numbered 4 and 8 support the binding of VC-3 and
VC-12 paths. The other VC-4s support the binding of VC-3
paths only.
l A VC-4 cannot be bound with VC-3 and VC-12 paths at the
same time.
Mapping granularities Supports VC-12, VC-3, VC-12-Xv (X≤63), and VC-3-Xv

(X≤12) granularities.
Encapsulation format Supports the GFP-F encapsulation.

EVPL services Supports PORT+VLAN-based EVPL services that use the frame
encapsulation formats of MartinioE and stack VLAN.
EPLAN services l Supports the point-to-multipoint (P2MP) converging service

that is based on Layer 2.
l Supports the Layer 2 forwarding function.
l Supports switching on the client and SDH sides.
l Supports the blacklist that can contain 2K records and also the
static MAC address table that can contain 2K records. The
sum of the number of records in the blacklist and the number
of addresses in the static MAC address table must not exceed
2K. The blacklist function of the N5EFS0 supports
verification of destination MAC addresses only.
l Supports the self-learning of the source MAC address. The
capacity of the MAC address table is 16K. The aging time of
the MAC address can be set and queried.
l Supports the configuration of the static MAC route.
l The N1EFS0/N2EFS0 does not support the query of the
dynamic MAC address. The N4EFS0/N5EFS0 supports the
query of the dynamic MAC address.
l Supports the creation, deletion, and query of the VB. The
maximum number of supported VBs is 16. The maximum
number of logical ports for each VB is 30.
l Queries the number of actually learnt MAC addresses based
on VB+VLAN or VB+LP.
l Supports the EPLAN services that are based on the IEEE
802.1d MAC bridge.
EVPLAN services l Supports EVPLAN virtual bridges.

l Supports data isolation based on VB+VLAN.
l Supports the setting of a maximum of 4096 VLAN services.
l Supports the EVPLAN services that are based on the IEEE
802.1q virtual bridge.
MTU l The N1EFS0/N2EFS0/N4EFS0 supports the setting of the

packet length, which ranges from 1518 bytes to 9600 bytes.
After the setting becomes valid, the length of the packets that
exit the IP ports is restricted by the pre-set MTU.
l The N5EFS0 supports the setting of the packet length, which
ranges from 1518 bytes to 9600 bytes. After the setting
becomes valid, the length of the packets that enter the IP ports
is restricted by the pre-set MTU.
MPLS Supports the MPLS.
VLAN Supports 4k VLANs. The VLAN technology complies with IEEE

802.1q/p.

Rapid spanning tree Supports the broadcast packet suppression function and RSTP
protocol (RSTP) that comply with IEEE 802.1w.
Link aggregation The N1EFS0 does not support the link aggregation function. The
function N2EFS0, N4EFS0, and N5EFS0 support manual link
aggregation.
IGMP snooping) Supports the IGMP snooping function.
ETH-OAM function l The N1EFS0 and N2EFS0 do not support the ETH-OAM
function.
l The N4EFS0 and N5EFS0 support continuity check (CC) for
the multicast service, loopback (LB) test for the unicast
service, link trace (LT) test, loop detection (LD), auto-
negotiation, fault diagnosis, and link performance detection.
The ETH-OAM function complies with IEEE 802.1ag and
IEEE 802.3ah.
QoS function l Supports the CAR. The granularity is 64 kbit/s.

l The N1EFS0 supports the service classification based on
PORT, PORT+VLAN ID, or PORT+VLAN PRI.
l The N2EFS0, N4EFS0, and N5EFS0 support the flow
classification based on PORT, PORT++VLAN ID, or PORT
+VLAN ID+VLAN PRI.
LCAS function Dynamically increases or decreases the bandwidth and protects

the bandwidth in compliance with ITU-T G.7042.
LPT function l The N1EFS0/N2EFS0 supports the point-to-point (P2P) LPT.

l The N4EFS0/N5EFS0 supports the P2P LPT and P2MP LPT.
Flow control function Supports the port-based flow control function that complies with
IEEE 802.3x.

(IEEE 1588 V2)
Test frames l The N1EFS0/N2EFS0 receives and transmits Ethernet test

frames.
l The N4EFS0/N5EFS0 receives and transmits Ethernet test
frames or GFP test frames.
Loopback function l Supports inloops on Ethernet ports (at the PHY layer or MAC
layer).
l The N1EFS0, N2EFS0 and N4EFS0 support inloops and
outloops at the VC-3 level. The N5EFS0 does not support
inloops and outloops at the VC-3 level.

Protection schemes Supports the following protection schemes at the Ethernet

equipment level and network level:
l The N2EFS0/N4EFS0/N5EFS0 supports TPS.
l STP/RSTP
l LCAS
l LPT
l LAG

monitoring The N5EFS0 supports VCG-based Ethernet performance
monitoring.
Alarms and performance Reports various alarms and performance events, which facilitates
events the management and maintenance of the equipment.
Response to the ping Supports the setting and query of the board IP address (supported
command by the N5EFS0 only).

Figure 8-24 shows the functional block diagram of the EFS0 by describing how to process 1xFE
signals.

Figure 8-24 Functional block diagram of the EFS0

Backplane
ENCP
Cross-connect unit
Ethernet Control Interface
VCP
FE Network Switch
access processor converting
fabric
module module
DENCP
Data
Cross-connect unit
Network processor module Mapping module
Laser
shutdown LOS

SCC unit
SCC unit

Clock module
module
+3.3 V backup power
50 77 125 155 Fuse
MHz MHz MHz MHz


Network Processor Module

The network processor module consists of the network processor and switch fabric. The network
processor first performs MAC functions, which include code conversion, framing of Ethernet
packets, CRC check, and Ethernet performance statistics.
After the striped Ethernet frames enter the core of network processor, the flow is classified
according to the service type and configuration requirement. The frames are encapsulated or
decapsulated. The following formats are supported:
l Multi-protocol label switching (MPLS)

l L2 MPLS VPN
l Ethernet/VLAN

In the receive direction, services are mapped and forwarded after the Tunnel and VC tags are
added according to the service configuration. In the transmit direction, the Tunnel or VC tag is
extracted based on the level (P or PE) of the equipment. Services are then routed or forwarded.
The network processor module supports the following functions:
l Flow sense and flow classification

l Unicast, multicast, and broadcast of the flow
l Setting of data priorities
l Weighted fair queuing (WFQ)
l Four classes of service (CoSs)
Mapping Module
In the upstream direction, this module first encapsulates Ethernet signals in GFP format. The
concatenation is performed. Then, the Ethernet signals are converted into SDH signals.



functions:


Clock Module
Power Module
require.
8.5.5 Front Panel

The front panel of the EFS0 has indicators and a bar code.

Figure 8-25 shows the appearance of the front panel of the EFS0.
Figure 8-25 Front panel of the EFS0
EFS0
STAT
ACT
PROG
SRV
EFS0

Indicators
Interfaces
The front panel of the EFS0 has no interfaces. The interfaces are available on the ETF8 or on
the EFF8. When the N5EFS0 is used with the ETF8A or EFF8A, the interfaces are available on
the ETF8A or on the EFF8A.

8.5.7 Valid Slots

normally.
NOTE
l Slot bandwidth
l Board version
The EFS0 must be used with the ETF8, EFF8, and ETS8. When the ETS8 is used as the interface
board, the TSB8 must be used as the bridging board. For the slots valid for the EFS0, ETS8, and
TSB8 when the EFS0 works with the ETS8 and TSB8, see 8.5.9 Board Protection.
The N5EFS0 can be used with the ETF8A and EFF8A. When the N5EFS0 works with the ETF8A
or EFF8A, the slots valid for the N5EFS0 are the same as the slots valid for the N5EFS0 when
the N5EFS0 works with the ETF8 or EFF8.
The slots valid for the EFS0 vary with the version of the board and the cross-connect capacity
of the subrack. The slots valid for the board are as follows:
l The N1EFS0 can be installed in slots 6, 7, 12, and 13. In this case, the bandwidth is 622
Mbit/s.
l When the cross-connect capacity is 20 Gbit/s, the N2EFS0, N4EFS0, and N5EFS0 can be
installed in slots 6, 7, 12, and 13. When the N2EFS0, N4EFS0, or N5EFS0 is installed in
slots 7, 12, and 13, the bandwidth is 1.25 Gbit/s. When the N2EFS0, N4EFS0, or N5EFS0
is installed in slot 6, the bandwidth is 622 Mbit/s.

l When the cross-connect capacity is 60 Gbit/s, the N2EFS0, N4EFS0, and N5EFS0 can be
installed in slots 6, 7, 12, and 13. In this case, the bandwidth is 1.25 Gbit/s.
Table 8-79 lists the slots valid for the EFS0 and the corresponding slots for the ETF8 and EFF8.
Table 8-79 Slots valid for the EFS0 and the corresponding slots for the ETF8 and EFF8
Slot Valid for the EFS0 Corresponding Slot for the ETF8 and EFF8
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17
8.5.8 Feature Code


The EFS0 supports the 1:1 TPS protection.
NOTE
Figure 8-26 shows the slot configuration for the 1:1 TPS protection for the EFS0.
Figure 8-26 Slot configuration for the 1:1 TPS protection for the EFS0
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
EFS0(W)
EFS0(P)
CXL 16
CXL 16
ETS8
TSB8
SAP
Fiber routing area
PIU FAN FAN PIU


In Figure 8-26, the board housed in slot 13 protects the board in slot 12. The ETS8 is used with
the working EFS0 and the TSB8 is used with the protection EFS0. Table 8-80 lists the slots for
the EFS0, ETS8, and TSB8.
Table 8-80 Slots for the EFS0, ETS8, and TSB8
Board Protection Group 1
EFS0 (protection) Slot 13
EFS0 (working) Slot 12
TSB8 Slot 17
ETS8 Slot 15


matches the board.
is correct.
----End

Step 2 Required: Configure services. For details, see Configuring Ethernet Services.


– J2 byte: The setting of the J2 byte on the interconnected equipment must be consistent.
Generally, use the default value. The default value of the J2 to be sent is HuaWei SBS
and the default value of the J2 to be received is Disabled.
NOTE
Step 4 Optional: Configure the Layer 2 switching management service, including the following tasks:
l Enabling the IGMP Snooping Protocol
l Configuring the Spanning Tree
l Setting the Aging Time for the Multicast Router Port
Step 5 Optional: Configure the QoS. For details, see Configuring QoS.
Step 6 Optional: Configure the link aggregation function on the Ethernet port. For details, see Creating
a LAG.
----End

Channels.
----End

Boards.
----End


You can configure the following Ethernet functions for the EFS0 by using the U2000:
l LCAS
l QoS
l LPT
l LAG
l ETH-OAM
l Test Frame
l STP/RSTP
l IGMP Snooping

You can set the following main parameters for the EFS0 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 8-81 lists the faults that occur on the EFS0 frequently and the troubleshooting methods.
Table 8-81 Methods used to troubleshoot the faults that occur on the EFS0 frequently



interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EFS0, see Replacing an Ethernet Board.

8.5.14.1 N1EFS0
ALM_GFP_dLFD AU_AIS B3_EXC_VC3
B3_SD_VC3 BD_STATUS BIP_EXC
BIP_SD COMMUN_FAIL ETH_LOS
LCAS_BAND_DECREASED LOOP_ALM LP_RDI_VC12
LP_RDI_VC3 LP_REI_VC12 LP_REI_VC3
LP_RFI LP_SLM_VC12 LP_SLM_VC3

LP_UNEQ_VC3 LSR_NO_FITED NO_BD_SOFT
SUBCARD_ABN TEMP_OVER T_LOS
TU_LOP_VC12 TU_AIS_VC12 TU_AIS_VC3
VCAT_LOM_VC12 TU_LOP_VC3 VCAT_LOA
VCAT_SQM_VC3 VCAT_LOM_VC3 VCAT_SQM_VC12
W_R_FAIL PROTOCOL_MM SWDL_PKG_NOBD-

SOFT
8.5.14.2 N2EFS0
LAG_FAIL LCAS_BAND_DECREASED LCAS_FOPR
SLAVE_WORKING SUBCARD_ABN T_LOS
TPS_ALM TU_AIS_VC12 TU_AIS_VC3
VCAT_LOM_VC12 VCAT_LOM_VC3 PATCHFILE_NOTEXIST
PATCH_ERR PATCH_NOT_CONFIRM SWDL_PKG_NOBDSOFT
8.5.14.3 N4EFS0

ETHOAM_DISCOVER_FAI ETHOAM_RMT_LOOP ETHOAM_RMT_SD

L
ETHOAM_RMT_CRIT_FA ETHOAM_SELF_LOOP ETHOAM_VCG_SELF_LOO

ULT P
FLOW_OVER FPGA_ABN FCS_ERR
HP_LOM LAG_FAIL HARD_BAD
LCAS_PLCR LASER_MOD_ERR LCAS_FOPT
LCAS_TLCT LCAS_FOPR LCAS_TLCR
LP_REI_VC12 LCAS_PLCT LOOP_ALM
LP_SLM_VC3 LP_RDI_VC12 LINK_ERR
LP_UNEQ_VC12 LP_REI_VC3 LP_RDI_VC3
LSR_NO_FITED LP_TIM_VC12 LP_SLM_VC12
NO_BD_SOFT LP_UNEQ_VC3 LP_TIM_VC3
SUM_INPWR_HI LSR_WILL_DIE LPT_RFI
SUM_OUTPWR_LOW SLAVE_WORKING LTEMP_OVER
TF SUM_INPWR_LOW SUBCARD_ABN
TU_AIS_VC3 T_LOS SUM_OUTPWR_HI
VCAT_LOA TPS_ALM TD
VCAT_LOM_VC3 TU_LOP_VC12 TU_AIS_VC12
TR_LOC VCAT_LOM_VC12 TU_LOP_VC3
T_LOSEX EX_ETHOAM_CC_LO EX_ETHOAM_MPID_CNFL

S CT
PATCH_NOT_CONFIRM ALM_GFP_dCSF PATCH_ERR
PATCHFILE_NOTEXIST SWDL_PKG_NOBD-
SOFT
8.5.14.4 N5EFS0
ALM_GFP_dCSF ALM_GFP_dLFD B3_EXC_VC3
BIP_SD COMMUN_FAIL ETH_CFM_LOC
ETH_CFM_MISMERGE ETH_CFM_RDI ETH_CFM_UNEXPERI

ETH_LOS ETH_NO_FLOW ETHOAM_DISCOVER_FA

IL
ETHOAM_RMT_CRIT_FA ETHOAM_RMT_LOOP ETHOAM_RMT_SD

ULT
ETHOAM_SELF_LOOP ETHOAM_VCG_SELF_L EX_ETHOAM_CC_LOS

OOP
EX_ETHOAM_MPID_CNF FCS_ERR FLOW_OVER

LCT
FPGA_ABN HARD_BAD HP_LOM
LASER_MOD_ERR LCAS_FOPR LCAS_FOPT
LSR_WILL_DIE LTEMP_OVER NO_BD_SOFT
SUBCARD_ABN IN_PWR_HIGH IN_PWR_LOW
OUT_PWR_HIGH OUT_PWR_LOW T_LOSEX
TD TEMP_OVER TF
VCAT_LOA VCAT_LOM_VC12 VCAT_LOM_VC3
VCAT_SQM_VC12 VCAT_SQM_VC3 VCTRUNK_NO_FLOW

8.5.15.1 N1EFS0
Table 8-82 SDH
HPBBE HPCSES HPES

HPUAS LPBBE LPCSES
LPES LPFEBBE LPFECSES
LPFEES LPFESES LPFEUAS
LPSES LPUAS


Packets Received(64
Octets in Length) Packets Received(65~127 Packets Received(128~255
(packets) Octets in Length)(packets) Octets in Length)(packets)
Packets Received
(256~511 Octets in Packets Received(512~1023 Packets Received(1024~1518
Length)(packets) Octets in Length)(packets) Octets in Length)(packets)
Multicast Packets Broadcast Packets Received

Received(packets) (packets) Drop Events(times)

Received(packets) (packets) Fragments(packets)
Jabbers(packets) Collisions(times) Octets Received(Byte)
Packets Received
(packets)

Packets Transmitted(64 Packets Transmitted(65~127 Packets Transmitted(128~255

(256~511 Octets in (512~1023 Octets in Length) (1024~1518 Octets in Length)
Length)(packets) (packets) (packets)

Unicast Packets Received Unicast Packets Transmitted Multicast Packets Transmitted

(packets) (packets) (packets)
Broadcast Packets Good Octets Transmitted

Transmitted(packets) (Byte) Alignment Errors(frames)
Good Full Frame Speed Good Full Frame Octets

FCS Errors(frames) Received(Byte/s) Transmitted(Byte)
Good Full Frame Octets Good Full Frame Speed

Received(Byte) Transmitted(Byte/s)
8.5.15.2 N2EFS0
Table 8-86 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS
Packets Received(64
Packets Received



Packets Received
(packets)






8.5.15.3 N4EFS0
Table 8-90 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS


Packets Received(64
Packets Received


Packets Received
(packets)







8.5.15.4 N5EFS0
Table 8-94 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS OSPITMPCUR
RPLMAX RPLMIN TLBCUR
TPLMAX TPLMIN XCSTMPCUR
XCSTMPMAX XCSTMPMIN
Packets Received(64 Packets Received(65~127 Packets Received(128~255


Multicast Packets Received Broadcast Packets Received

(packets) (packets) Drop Events(times)

Packets Received(packets)


Packets Transmitted
Octets in Length)(packets) (packets) Octets in Length)(packets)

(packets) Length)(packets) (packets)

(packets) Transmitted(packets) (packets)

Good Full Frame Speed Good Full Frame Speed

FCS Errors(frames) Received(Byte/s) Transmitted(Byte/s)
Good Full Frame Octets Good Full Frame Octets

Received(Byte) Transmitted(Byte)
Table 8-98 Statistics of RMON VCG performance

VCG_TXGOODPACKETS VCG_TXPACKETS VCG_TXOCTETS
VCG_RXGOODPACKETS VCG_RXPACKETS VCG_RXOCTETS
VCG_TXSPEED VCG_RXSPEED

l VC-4s numbered 4 and 8 support the binding of VC-3 and VC-12 paths. The other VC-4s
support the binding of VC-3 paths only.
l A VC-4 cannot be bound with VC-3 and VC-12 paths at the same time.
l VCTRUNK 1–VCTRUNK 12 can be bound with VC-4s numbered 1–4 only. VCTRUNK
13–VCTRUNK 24 can be bound with VC-4s numbered 5–8 only.

consumption.


NOTE
specifications, and back-to-back specifications of the EFS0 board of the N4 version.
the case of overloading, latency specifications, and back-to-back specifications of the N4EFS0.
of overloading, latency specifications, and back-to-back specifications of the N4EFS0
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 8-99 lists the throughput specifications of the N4EFS0. Table 8-100 lists the packet loss
ratio in the case of overloading of the N4EFS0. Table 8-101 lists the latency specifications of
the N4EFS0. Table 8-102 lists the back-to-back specifications of the N4EFS0.
NOTE
l The specifications vary according to the configuration and networking of the test environment, port
rate, and VC services bound on the VCG side. The specifications that are obtained in the actual
environment are used.
configured and five VC-12s are bound on the FE port.
Table 8-99 lists the throughput specifications of the N4EFS0. The values are obtained when the

l Step frame size (byte): custom

l Mode: bidirectional
Table 8-99 Throughput specifications of the N4EFS0

(Byte) (%) (01,02,05) (pks/ (01,02,03) (pks/ sec)
sec) sec)
64 11.48 17088 17088 34176
128 11.25 9502 9502 19004
256 11.13 5042 5042 10084
512 11.12 2613 2613 5226
1024 11.07 1326 1326 2652
1280 11.10 1067 1067 2134
1518 11.12 904 904 1808
Table 8-100 lists the packet loss ratio in the case of overloading of the N4EFS0. The values are
l Resolution rate (%): none
Table 8-100 Packet loss ratio in the case of overloading of the N4EFS0

(Byte) (%) (01,02,05) (%) (01,02,03) (%)
64 100.00 88.507 88.507 88.507


(Byte) (%) (01,02,05) (%) (01,02,03) (%)
128 100.00 88.730 88.745 88.737
256 100.00 88.851 88.831 88.841
512 100.00 88.876 88.846 88.861
1024 100.00 88.901 88.890 88.895
1280 100.00 88.878 88.878 88.878
1518 100.00 88.850 88.844 88.847
Table 8-101 lists the latency specifications of the N4EFS0. The values are obtained when the
l CT: cut through or FIFO; S&F: store forward or LIFO
l Measure on one receiving card only. Mode: SmartMetrics Comp. Mode
Table 8-101 Latency specifications of the N4EFS0

64 10.00 561.4 561.4 556.2 556.2


128 10.00 644.4 644.4 634.2 634.2
256 10.00 738.4 738.4 718.0 718.0
512 10.00 948.8 948.8 907.9 907.9
1024 10.00 1371.5 1371.5 1289.6 1289.6
1280 10.00 1604.1 1604.1 1501.7 1501.7
1518 10.00 1790.4 1790.4 1669.0 1669.0
Table 8-102 lists the back-to-back specifications of the N4EFS0. The values are obtained when
Table 8-102 Back-to-back specifications of the N4EFS0

Frames) Frames)
64 100.00 1333 1335 2668
128 100.00 848 850 1698
256 100.00 586 587 1173
512 100.00 445 447 892


Frames) Frames)
1024 100.00 224 224 448
1280 100.00 211 212 423
1518 100.00 201 201 402
NOTE
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
NOTE
are used.
configured 3 VC-3s are bound on the FE port.

Table 8-103 lists the throughput specifications of the N5EFS0. The values are obtained when
l The permitted packet loss ratio is set to 0% and the resolution rate is set to 1%.
l Maximum rate (%): None

(byte) (pks/sec)
64 100.00 148810 148810
128 100.00 84459 84459
256 100.00 45290 45290
512 100.00 23496 23496
1024 100.00 11973 11973
1280 100.00 9615 9615
1518 100.00 8127 8127

(byte) (%)
64 100.00 0.000 0.000
128 100.00 0.000 0.000
256 100.00 0.000 0.000
512 100.00 0.000 0.000
1024 100.00 0.000 0.000
1280 100.00 0.000 0.000
1518 100.00 0.000 0.000
l CT: Cut Through (or FIFO),S&F: Store & Forward (or LIFO)
l Measure on one receiving card only, Mode: SmartMetrics Comp. Mode


64 100.00 124.3 124.3 119.2 119.2
128 100.00 137.4 137.4 127.2 127.2
256 100.00 169.6 169.6 149.2 149.2
512 100.00 211.5 211.5 170.6 170.6
1024 100.00 294.4 294.4 212.4 212.4
1280 100.00 334.5 334.5 232.1 232.1
1518 100.00 368.7 368.7 247.3 247.3

64 100.00 297620 297620
128 100.00 168918 168918
256 100.00 90580 90580
512 100.00 46992 46992


1024 100.00 23946 23946
1280 100.00 19230 19230
1518 100.00 16254 16254
The mechanical specifications of the EFS0 are as follows:
l Weight of the N1EFS0 (kg): 1.0
Power Consumption
The maximum power consumption of the N1EFS0 at room temperature (25°C) is 35 W.
8.6 EFS0A
technical specifications of the EFS0A (16xFE switching and processing board). This topic also
describes how to configure and commission the EFS0A.

The EFS0A is available in one functional version, namely, N1.
8.6.2 Application
The EFS0A is used to access Ethernet services, manage bandwidths, and realize Layer 2
switching of Ethernet services.
The EFS0A supports the Layer 2 switching, MPLS, and broadcast functions.
The EFS0A consists of the Ethernet access module, network processor module, mapping
module, interface converting module, logic and control module, clock module, and power
module.
8.6.5 Front Panel
The front panel of the EFS0A has indicators and a bar code.


The EFS0A does not have any jumpers or DIP switches that are used for board settings.
8.6.7 Valid Slots
The EFS0A must be installed in a valid slot in the subrack. Otherwise, the EFS0A cannot work
normally.
8.6.8 Feature Code
The EFS0A does not have the feature code.
The EFS0A supports the 1:1 TPS protection.
The EFS0A supports multiple Ethernet functions and features such as Layer 2 switching, LCAS,
You can set parameters for the EFS0A by using the U2000.
The technical specifications of the EFS0A include the dimensions, weight, and power
consumption.

The EFS0A is available in one functional version, namely, N1.
8.6.2 Application
The EFS0A is used to access Ethernet services, manage bandwidths, and realize Layer 2


NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and

The EFS0A supports the Layer 2 switching, MPLS, and broadcast functions.
Table 8-107 provides the functions and features of the EFS0A.
Table 8-107 Functions and features of the EFS0A

Function and EFS0A
Feature
Basic functions Processes 16xFE services.

Function and EFS0A

Feature
Functions when being l Accesses 16xFE signals through the electrical interface when the
used with the interface EFS0A is used with the ETF8.
EFS0A is used with the EFF8.
l Accesses 8xFE signals through the electrical interface and 8xFE
signals through the optical interface when the EFS0A is used with
the ETF8 and EFF8.
l Provides the TPS protection for the 16xFE signals through the
electrical interface when the EFS0A is used with the ETS8 and
TSB8.
Specifications of the l Supports 10BASE-T/100BASE-TX signals when the EFS0A is

optical interface used with the ETF8.
l Supports 100BASE-FX signals when the EFS0A is used with the
EFF8. The optical interfaces comply with IEEE 802.3u.
Format of service l Supports Ethernet II, IEEE 802.3, and IEEE 802.1 q/p formats.
bytes.
Maximum uplink The maximum uplink bandwidth is 2.5 Gbit/s.

bandwidth The EFS0A can adapt to the bandwidth of the slot.

l VC-4s numbered 4, 8, 12, and 16 support the binding of VC-3
and VC-12 paths. The other VC-4s support the binding of VC-3
paths only.
l A VC-4 cannot be bound with VC-3 and VC-12 paths at the same
time.
Mapping granularities Supports VC-12, VC-3, VC-12-Xv (X≤63), and VC-3-Xv (X≤12)
granularities.
Encapsulation format Supports the GFP-F protocol.

Function and EFS0A

Feature
EPLAN services l Supports the P2MP converging service that is based on Layer 2.
static MAC address table that can contain 2K records. The sum
of the number of records in the blacklist and the number of
addresses in the static MAC address table must not exceed 2K.
The blacklist function supports verification of destination MAC
addresses only.
capacity of the MAC address table is 16K. The aging time of the
MAC address can be set and queried.
l The N1EFS0, N2EFS0, and N5EFS0 support the query of the
dynamic MAC address.
l Support the query of the dynamic MAC address.
maximum number of supported VBs is 16. The maximum
number of logical ports for each VB is 48.
l Queries the number of actually learnt MAC addresses based on
VB+VLAN or VB+LP.
l Supports the EPLAN services that are based on the IEEE 802.1d
MAC bridge.

l Supports the EVPLAN services that are based on the IEEE 802.1q
virtual bridge.
802.1ad virtual bridge.
bytes to 9600 bytes. After the setting becomes valid, the length of
the packets that enter the IP ports is restricted by the pre-set MTU.

802.1q/p.
RSTP Supports the broadcast packet suppression function and RSTP that
comply with IEEE 802.1w.
Link aggregation Supports manual link aggregation.

function

Function and EFS0A

Feature
IGMP snooping Supports the IGMP snooping function.
ETH-OAM function Supports CC for the multicast service, LB test for the unicast service,
LT test, LD, auto-negotiation, fault diagnosis, and link performance
detection.

l The N1EFS0A supports the flow classification based on PORT,
PORT+VLAN ID, PORT+SVLAN, or PORT+VLAN ID
+VLAN PRI.
l The N2EFS0A supports the flow classification based on PORT,
PORT+VLAN ID, or PORT+VLAN ID+VLAN PRI.
LPT function Supports the P2P LPT and P2MP LPT.
IEEE 802.3x.

(IEEE 1588 V2)
Test frames Receives and transmits Ethernet test frames.
Port mirroring Supports ingress mirroring.
level:
l STP/RSTP
l LCAS
l LPT
l LAG
Ethernet performance Supports port-based and VCG-based Ethernet performance

monitoring monitoring.
Response to the ping Supports the setting and query of the board IP address.
command


The EFS0A consists of the Ethernet access module, network processor module, mapping
module, interface converting module, logic and control module, clock module, and power
module.
Figure 8-30 shows the functional block diagram of the EFS0A by describing how to process
1xFE signals.
Figure 8-30 Functional block diagram of the EFS0A

Backplane
ENCP
Cross-connect unit
VCP
FE Network Switch
fabric
module module
DENCP
Data
Cross-connect unit
Laser
shutdown LOS

SCC unit
SCC unit

Clock module
module
+3.3 V backup power
50 77 125 155 Fuse
MHz MHz MHz MHz




l MPLS
l L2 MPLS VPN
l Ethernet/VLAN
l WFQ
l Four CoSs
Mapping Module
In the upstream direction, this module first encapsulates Ethernet signals in LAPS or GFP format.
The concatenation is performed. Then, the Ethernet signals are converted into SDH signals.


functions:

Clock Module
Power Module
require.
8.6.5 Front Panel

The front panel of the EFS0A has indicators and a bar code.

Figure 8-31 shows the appearance of the front panel of the EFS0A.

Figure 8-31 Front panel of the EFS0A
EFS0A
STAT
ACT
PROG
SRV
EFS0A
Indicators
Interfaces
The front panel of the EFS0A has no interfaces. The interfaces are available on the ETF8 board
or on the EFF8 board.


The EFS0A does not have any jumpers or DIP switches that are used for board settings.
8.6.7 Valid Slots

The EFS0A must be installed in a valid slot in the subrack. Otherwise, the EFS0A cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The EFS0A can be used with the ETF8, EFF8, and ETS8. When the ETS8 is used as the interface
board, the TSB8 must be used as the bridging board. For the slots valid for the EFS0A, ETS8,
and TSB8 when the EFS0A works with the ETS8 and TSB8, see 8.6.9 Board Protection.
The slots valid for the EFS0A vary with the cross-connect capacity of the subrack. The slots
valid for the EFS0A are as follows:
l When the cross-connect capacity is 20 Gbit/s, the EFS0A can be installed in slots 6, 7, 12,
and 13. When the EFS0A is installed in slots 7 and 12, the bandwidth is 1.25 Gbit/s. When
the EFS0A is installed in slot 13, the bandwidth is 1.25 Gbit/s. When the EFS0A is installed
in slot 6, the bandwidth is 622 Mbit/s.
l When the cross-connect capacity is 60 Gbit/s, the EFS0A can be installed in slots 6, 7, 12,
and 13. In this case, the bandwidth is 2.5 Gbit/s.
Table 8-108 lists the slots valid for the EFS0A and the corresponding slots for the ETF8 and
EFF8.
Table 8-108 Slots valid for the EFS0A and the corresponding slots for the ETF8 and EFF8
Slot Valid for the EFS0A Corresponding Slot for the ETF8 and EFF8
8.6.8 Feature Code

The EFS0A does not have the feature code.

The EFS0A supports the 1:1 TPS protection.

NOTE
Figure 8-32 shows the slot configuration for the 1:1 TPS protection for the EFS0A.
Figure 8-32 Slot configuration for the 1:1 TPS protection for the EFS0A
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1
0 1 2 3 4 5 6 7 8
EFS0(W)
EFS0(P)
CXL 16
CXL 16
ETS8
ETS8
TSB8
TSB8
SAP
Fiber routing area
PIU FAN FAN PIU

The board in slot 13 protects the board in slot 12. The ETS8 is used with the working EFS0A
and the TSB8 is used with the protection EFS0A. Table 8-109 lists the slots for the EFS0A,
ETS8, and TSB8.
Table 8-109 Slots for the EFS0A, ETS8, and TSB8

Board Protection Group 1
EFS0A (protection) Slot 13
EFS0A (working) Slot 12
TSB8 Slots 17 and 18
ETS8 Slots 15 and 16



matches the board.
is correct.
----End

NOTE


a LAG.
----End

Channels.
----End

Boards.
----End

The EFS0A supports multiple Ethernet functions and features such as Layer 2 switching, LCAS,
You can configure the following Ethernet functions for the EFS0A by using the U2000:
l LCAS
l QoS
l LPT
l LAG
l ETH-OAM
l Test Frame
l STP/RSTP
l IGMP Snooping

You can set parameters for the EFS0A by using the U2000.
You can set the following main parameters for the EFS0A by using the U2000:

l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 8-110 lists the faults that occur on the EFS0A frequently and the troubleshooting methods.
Table 8-110 Methods used to troubleshoot the faults that occur on the EFS0A frequently


interrupted.
abnormal.

duplex mode.

fault occurs.

Replacing the Board

NOTE
replace the board.
For information on how to replace the EFS0A, see Replacing an Ethernet Board.

8.6.14.1 N1EFS0A
ALM_GFP_dLFD ALM_GFP_dCSF B3_EXC_VC3
HP_LOM LOOP_ALM LP_RDI_VC12
LPT_RFI LP_SLM_VC12 LP_SLM_VC3
TEMP_OVER TD T_LOSEX
TU_LOP_VC12 TU_AIS_VC12 TU_AIS_VC3
VCAT_LOM_VC12 TU_LOP_VC3 VCAT_LOA
VCAT_SQM_VC3 VCAT_LOM_VC3 VCAT_SQM_VC12
VCTRUNK_NO_FLOW ETH_CFM_LOC ETH_CFM_MISMERGE
ETH_CFM_RDI ETH_CFM_UNEXPERI ETH_NO_FLOW
ETHOAM_DISCOVER_FA ETHOAM_RMT_CRIT_FA ETHOAM_RMT_LOOP

IL ULT
ETHOAM_RMT_SD ETHOAM_SELF_LOOP ETHOAM_VCG_SELF_L

OOP
EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNF FLOW_OVER

LCT

LCAS_TLCT LINK_ERR LSR_WILL_DIE
LTEMP_OVER IN_PWR_HIGH IN_PWR_LOW
OUT_PWR_HIGH OUT_PWR_LOW SUBCARD_ABN
TF TPS_ALM TR_LOC

8.6.15.1 N1EFS0A
Table 8-111 SDH

HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
XCSTMPMAX XCSTMPMIN







Packets Transmitted









l The VC label and tunnel label of the LSP service can be set to a value only in the range
from 16 to 1023.
l The setting or query of the maximum virtual concatenation delay based on the VCTRUNK
by using a command line is not supported.

The technical specifications of the EFS0A include the dimensions, weight, and power
consumption.

NOTE
specifications, and back-to-back specifications of the EFS0A board of the N1 version.
the case of overloading, latency specifications, and back-to-back specifications of the EFS0A.
of overloading, latency specifications, and back-to-back specifications
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 8-116 lists the throughput specifications of the EFS0A. Table 8-117 lists the packet loss
ratio in the case of overloading of the EFS0A. Table 8-118 lists the latency specifications of the
EFS0A. Table 8-119 lists the back-to-back specifications of the EFS0A.

NOTE
configured, one VC-3 is bound on the FE port, and the MAC port is set to auto-negotiation mode.
Table 8-116 lists the throughput specifications of the EFS0A. The values are obtained when the
l Test duration (sec): 3

l Resolution rate (%): 0.01
Table 8-116 Throughput specifications of the EFS0A

(Byte) (%) (01,11,02) (pks/ (01,11,01) (pks/ sec)
sec) sec)
64 53.50 79618 79618 159236
128 51.21 43253 43253 86506
256 49.95 22624 22624 45248
512 49.31 11585 11585 23170
1024 49.14 5884 5884 11768
1280 49.15 4726 4726 9452
1518 49.19 3998 3998 7996
Table 8-117 lists the packet loss ratio in the case of overloading of the EFS0A. The values are


Table 8-117 Packet loss ratio in the case of overloading of the EFS0A

(Byte) (%) (01,11,02) (%) (01,11,01) (%)
64 100.00 46.497 46.497 46.497
128 100.00 48.820 48.820 48.820
256 100.00 50.127 50.127 50.127
512 100.00 50.804 50.804 50.804
1024 100.00 51.115 51.115 51.115
1280 100.00 51.159 51.159 51.159
1518 100.00 51.176 51.176 51.176
Table 8-118 lists the latency specifications of the EFS0A. The values are obtained when the


Table 8-118 Latency specifications of the EFS0A

64 40.00 164.3 164.3 159.2 159.2
128 40.00 199.0 199.0 188.8 188.8
256 40.00 247.0 247.0 226.6 226.6
512 40.00 357.6 357.6 357.6 357.6
1024 40.00 514.8 514.8 432.9 432.9
1280 40.00 613.1 613.1 510.7 510.7
1518 40.00 699.4 699.4 578.0 578.0
Table 8-119 lists the back-to-back specifications of the EFS0A. The values are obtained when

Table 8-119 Back-to-back specifications of the EFS0A

Frames) Frames)
64 100.00 353 353 706
128 100.00 342 342 684
256 100.00 380 380 761
512 100.00 368 368 736


Frames) Frames)
1024 100.00 282 282 564
1280 100.00 279 279 559
1518 100.00 291 291 582
The mechanical specifications of the EFS0A are as follows:
l Weight (kg): 0.7
Power Consumption
The maximum power consumption of the EFS0A at room temperature (25°C) is 32 W.
8.7 EFS4

The EFS4 is available in three functional versions, namely, N1, N2 and N3. The difference
between the three versions is their different maximum uplink bandwidths. The N1EFS4 is
discontinued.
8.7.2 Application
8.7.5 Front Panel
The front panel of the EFS4 has indicators, interfaces, and a bar code.
8.7.7 Valid Slots
normally.

8.7.8 Feature Code

consumption.

The EFS4 is available in three functional versions, namely, N1, N2 and N3. The difference
between the three versions is their different maximum uplink bandwidths. The N1EFS4 is
discontinued.
Table 8-120 describes the versions of the EFS4.
Table 8-120 Versions of the EFS4
Item Description
Functional versions The EFS4 is available in three functional versions, namely, N1, N2
and N3.
Differences l The maximum uplink bandwidth of the N1EFS4 is 622 Mbit/s.

l The maximum uplink bandwidth of the N2EFS4/N3EFS4 is 1.25
Gbit/s.
l The N2EFS4 and N3EFS4 support the board version replacement
function.

Item Description
Substitution l The N2EFS4 can substitute for the N1EFS4.

l The N3EFS4 can substitute for the N2EFS4 and N1EFS4.
8.7.2 Application
NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and


Table 8-121 provides the functions and features of the EFS4.
Table 8-121 Functions and features of the EFS4

Function and EFS4
Feature
Basic functions Processes 4xFE services.
Functions when Accesses 4xFE signals by providing interfaces on the front panel.
being used with the
interface board
Specifications of Supports 10BASE-T/100BASE-TX signals. The optical interfaces

the optical interface comply with IEEE 802.3u.
Format of service l Supports Ethernet II, IEEE 802.3, and IEEE 802.1 q/p formats.
bytes and supports the Jumbo frame with a length less than 9600
bytes.
Maximum uplink l The maximum uplink bandwidth of the N1EFS4 is 622 Mbit/s.
bandwidth l The maximum uplink bandwidth of the N2EFS4 and N3EFS4 is
1.25 Gbit/s.
l The EFS4 can adapt to the bandwidth of the slot.
Bound bandwidth l N1EFS4: 12xVC-3, or 63xVC-12 + 9xVC-3

l N2EFS4/N3EFS4: 24xVC-3 or 126xVC-12 + 18xVC-3
VCTRUNKs l The number of VCTRUNKs supported by the N1EFS4 is 12.

l The number of VCTRUNKs supported by the N2EFS4 and
N3EFS4 is 24.
l VCTRUNK 1–VCTRUNK 12 of the N1EFS4 and N2EFS4 can be
bound with VC-4s numbered 1–4 only. VCTRUNK 13–
VCTRUNK 24 can be bound with VC-4s numbered 5–8 only.
l VC-4s numbered 4 and 8 support the binding of VC-3 and VC-12
paths. The other VC-4s support the binding of VC-3 paths only.
time.

Encapsulation Supports the GFP-F protocol.

format

Function and EFS4

Feature
l Supports the blacklist that can contain 2K records and also the static
MAC address table that can contain 2K records. The sum of the
number of records in the blacklist and the number of addresses in
the static MAC address table must not exceed 2K. The blacklist
function of the N3EFS4 supports verification of destination MAC
addresses only.
l Supports the self-learning of the source MAC address. The capacity
of the MAC address table is 16K. The aging time of the MAC
address can be set and queried.
l The N2EFS4 and N3EFS4 support the query of the dynamic MAC
address.
l The N1EFS4 does not support the query of the dynamic MAC
address.
l Supports the creation, deletion, and query of the VB. The maximum
number of supported VBs is 16. The maximum number of logical
ports for each VB is 30.
l Queries the number of actually learnt MAC addresses based on VB
+VLAN or VB+LP.
MAC bridge.

virtual bridge.
MTU l The N1EFS4/N2EFS4 supports the setting of the packet length,

which ranges from 1518 bytes to 9600 bytes. After the setting
becomes valid, the length of the packets that exit the IP ports is
restricted by the pre-set MTU.
l The N3EFS4 supports the setting of the packet length, which ranges
from 1518 bytes to 9600 bytes. After the setting becomes valid, the
length of the packets that enter the IP ports is restricted by the pre-
set MTU.

802.1q/p.

Function and EFS4

Feature
ETH-OAM l The N1EFS4 does not support the ETH-OAM function.

function l The N2EFS4 and N3EFS4 support CC for the multicast service, LB
test for the unicast service, LT test, LD, auto-negotiation, fault
diagnosis, and link performance detection. The ETH-OAM
function complies with IEEE 802.1ag and IEEE 802.3ah.

l The N1EFS4 supports the service classification based on PORT,
PORT+VLAN ID, or PORT+VLAN PRI.
l The N2EFS4 and N3EFS4 support the flow classification based on
PORT, PORT++VLAN ID, or PORT+VLAN ID+VLAN PRI.
LPT function l The N1EFS4 supports the P2P LPT.

l The N2EFS4 and N3EFS4 support the P2P LPT and P2MP LPT.
Flow control Supports the port-based flow control function that complies with IEEE
function 802.3x.

(IEEE 1588 V2)
Test frames l The N1EFS4 receives and transmits Ethernet test frames.
l The N2EFS4/N3EFS4 receives and transmits Ethernet test frames
or GFP test frames.
Receives and transmits Ethernet test frames.
Port mirroring The N3EFS4 supports ingress mirroring.
Loopback function l Supports inloops on Ethernet ports (at the PHY layer or MAC
layer).
l The N1EFS4 and N2EFS4 also support inloops and outloops at the
VC-3 level.
level:
l STP/RSTP
l LCAS
l LPT
l LAG

Function and EFS4

Feature

performance The N3EFS4 supports VCG-based Ethernet performance monitoring.
monitoring
Response to the Supports the setting and query of the board IP address (supported by
ping command the N3EFS4 only).

Figure 8-35 shows the functional block diagram of the EFS4 by describing how to process 1xFE
signals.
Figure 8-35 Functional block diagram of the EFS4

Backplane
ENCP
Cross-connect unit
VCP
FE Network Switch
fabric
module module
DENCP
Data
Cross-connect unit
LOS

SCC unit
SCC unit

Clock module
module
+3.3 V backup power
50 77 125 155 Fuse
MHz MHz MHz MHz




l MPLS
l L2 MPLS VPN
l Ethernet/VLAN
l WFQ
l Four CoSs
Mapping Module




functions:
Clock Module
Power Module
require.
8.7.5 Front Panel

The front panel of the EFS4 has indicators, interfaces, and a bar code.

Figure 8-36 shows the appearance of the front panel of the EFS4.

Figure 8-36 Front panel of the EFS4
EFS4
STAT
ACT
PROG
SRV
FE1
FE2
FE3
FE4
EFS4
Indicators

Interfaces
The front panel of the EFS4 has four FE interfaces. Table 8-122 describes the types and usage
of the interfaces of the EFS4. For information about the cables connected to the interfaces, see
Table 8-122 Interfaces of the EFS4

Interface

signals.

signals.

signals.

signals.

Pin Description
4 Grounding
5 Grounding
7 Grounding
8 Grounding


8.7.7 Valid Slots

normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the EFS4 vary with the board version, bandwidth, and cross-connect capacity
of the subrack.
The relation between the slots valid for the EFS4 and the bandwidth is as follows:
l When the N1EFS4 is installed in slots 5–8 and 11–13, the bandwidth is 622 Mbit/s.
l The slots valid for the N2EFS4/N3EFS4 vary with the cross-connect capacity of the subrack
and the bandwidth of the slot. When the cross-connect capacity is 20 Gbit/s, the N2EFS4/
N3EFS4 can be installed in slots 5–8 and 11–13. When the N2EFS4/N3EFS4 is installed
in slots 5 and 6, the bandwidth is 622 Mbit/s. When the N2EFS4/N3EFS4 is installed in
slots 7, 8, and 11–13, the bandwidth is 1.25 Gbit/s. When the cross-connect capacity is 60
Gbit/s, the N2EFS4/N3EFS4 can be installed in slots 5–8 and 11–13. In this case, the
bandwidth is 1.25 Gbit/s.
8.7.8 Feature Code



matches the board.

is correct.
----End

NOTE
Step 4 Optional: Configure the L2 switching management service. Perform the following tasks:
Step 5 Optional: Configure the aggregation function for the Ethernet port. For details, see Creating a
LAG.
----End

Channels.
----End


Boards.
----End

You can configure the following Ethernet functions for the EFS4 by using the U2000:
l LCAS
l QoS
l LPT
l LAG
l ETH-OAM
l Test Frame
l STP/RSTP
l IGMP Snooping

You can set the following main parameters for the EFS4 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 8-124 lists the faults that occur on the EFS4 frequently and the troubleshooting methods.

Table 8-124 Methods used to troubleshoot the faults that occur on the EFS4 frequently


interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EFS4, see Replacing an Ethernet Board.

8.7.13.1 N1EFS4

LCAS_BAND_DECREASED LCAS_FOPR LCAS_FOPT
LCAS_TLCT LOOP_ALM LP_RDI_VC12
LP_RFI LP_SLM_VC12 LP_SLM_VC3
LP_UNEQ_VC3 TU_AIS_VC12 NO_BD_SOFT
TU_LOP_VC12 TU_LOP_VC3 T_LOS
VCAT_LOM_VC12 VCAT_LOM_VC3 TU_AIS_VC3
VCAT_SQM_VC3 W_R_FAIL VCAT_LOA
PATCH_ERR PATCHFILE_NOTEXIST VCAT_SQM_VC12
PATCH_NOT_CONFIRM PROTOCOL_MM SWDL_PKG_NOBD-

SOFT
8.7.13.2 N2EFS4
ETHOAM_DISCOVER_F ETHOAM_RMT_LOOP ETHOAM_RMT_SD

AIL
ETHOAM_RMT_CRIT_F ETHOAM_SELF_LOOP ETHOAM_VCG_SELF_L

AULT OOP
EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNFL FCS_ERR

CT
FLOW_OVER FPGA_ABN HARD_BAD
HP_LOM LAG_FAIL LCAS_FOPT
LCAS_PLCR LCAS_FOPR LCAS_TLCR
LCAS_TLCT LCAS_PLCT LP_RDI_VC12
LP_RDI_VC3 LOOP_ALM LP_REI_VC3
LP_SLM_VC12 LP_REI_VC12 LP_TIM_VC12

LP_TIM_VC3 LP_SLM_VC3 LP_UNEQ_VC3
LPT_RFI LP_UNEQ_VC12 NO_BD_SOFT
SLAVE_WORKING TU_AIS_VC3 T_LOS
TU_AIS_VC12 VCAT_LOA TU_LOP_VC12
TU_LOP_VC3 VCAT_LOM_VC3 VCAT_LOM_VC12
TR_LOC T_LOSEX ALM_GFP_dCSF
SWDL_PKG_NOBD-
SOFT
8.7.13.3 N3EFS4
BIP_SD COMMUN_FAIL ETH_CFM_LOC
ETH_LOS ETH_NO_FLOW ETHOAM_DISCOVER_F

AIL

ULT

OOP

LCT
FPGA_ABN HARD_BAD HP_LOM
LCAS_FOPR LCAS_FOPT LCAS_PLCR
LCAS_PLCT LCAS_TLCR LCAS_TLCT
LOOP_ALM LP_RDI_VC12 LP_RDI_VC3
LP_REI_VC12 LP_REI_VC3 LP_SLM_VC12
LP_SLM_VC3 LP_TIM_VC12 LP_TIM_VC3
LP_UNEQ_VC12 LP_UNEQ_VC3 LPT_RFI
NO_BD_SOFT T_LOSEX TEMP_OVER

VCAT_SQM_VC3 VCTRUNK_NO_FLOW

8.7.14.1 N1EFS4
Table 8-125 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS
Packets Received(64
Packets Received



Packets Received
(packets)






8.7.14.2 N2EFS4
Table 8-129 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS


Packets Received(64
Packets Received


Packets Received
(packets)







8.7.14.3 N3EFS4
Table 8-133 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS XCSTMPCUR
XCSTMPMAX XCSTMPMIN




Packets Transmitted








l VC-4s numbered 4 and 8 support the binding of VC-3 and VC-12 paths. The other VC-4s
l VCTRUNK 1–VCTRUNK 12 can be bound with VC-4s numbered 1–4 only. VCTRUNK
13–VCTRUNK 24 can be bound with VC-4s numbered 5–8 only.

consumption.

Table 8-138 lists the parameters specified for the electrical interfaces of the EFS4.

Table 8-138 Parameters specified for the optical interfaces of the EFS4
Parameter Value


interface

NOTE
Tested Tested
Port 1 Port 2
Data network
performance
analyzer

NOTE
configured and five VC-12s are bound on the FE port.


(Byte) (%) (01,02,05) (pks/ (01,02,03) (pks/ sec)
sec) sec)
64 11.41 16984 16984 33968
128 11.18 9441 9441 18882
256 11.10 5026 5026 10052
512 11.09 2605 2605 5210
1024 11.00 1317 1317 2634
1280 11.09 1066 1066 2132
1518 11.07 900 900 1800



(Byte) (%) (01,02,05) (%) (01,02,03) (%)
64 100.00 88.510 88.513 88.512
128 100.00 88.724 88.729 88.726
256 100.00 88.858 88.859 88.859
512 100.00 88.858 88.861 88.859
1024 100.00 88.888 88.914 88.901
1280 100.00 88.895 88.875 88.885
1518 100.00 88.870 88.871 88.870



64 10.00 586.1 586.1 581.0 581.0
128 10.00 644.4 644.4 634.2 634.2
256 10.00 726.3 726.3 705.9 705.9
512 10.00 969.0 969.0 928.1 928.1
1024 10.00 1382.6 1382.6 1300.6 1300.6
1280 10.00 1609.0 1609.0 1506.6 1506.6
1518 10.00 1804.9 1804.9 1683.4 1683.4


Frames) Frames)
64 100.00 1337 1339 2676
128 100.00 852 852 1704
256 100.00 583 583 1166
512 100.00 441 441 882


Frames) Frames)
1024 100.00 225 228 453
1280 100.00 210 210 420
1518 100.00 200 200 400
NOTE
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
NOTE
are used.
configured and three VC-3s are bound on the FE port.

l Maximum rate (%): None

(byte) (pks/sec)
64 100.00 148810 148810
128 100.00 84459 84459
256 100.00 45290 45290
512 100.00 23496 23496
1024 100.00 11973 11973
1280 100.00 9615 9615
1518 100.00 8127 8127

(byte) (%)
64 100.00 0.000 0.000
128 100.00 0.000 0.000
256 100.00 0.000 0.000
512 100.00 0.000 0.000
1024 100.00 0.000 0.000
1280 100.00 0.000 0.000
1518 100.00 0.000 0.000
l Measure on one receiving card only


64 100.00 129.3 129.3 124.2 124.2
128 100.00 142.6 142.6 132.4 132.4
256 100.00 171.1 171.1 150.6 150.6
512 100.00 215.7 215.7 174.7 174.7
1024 100.00 298.4 298.4 216.5 216.5
1280 100.00 339.8 339.8 237.4 237.4
1518 100.00 374.7 374.7 253.3 253.3

64 100.00 297620 297620
128 100.00 168918 168918
256 100.00 90580 90580
512 100.00 46992 46992


1024 100.00 23946 23946
1280 100.00 19230 19230
1518 100.00 16254 16254
The mechanical specifications of the EFS4 are as follows:
Power Consumption
8.8 EFP0
technical specifications of the EFP0 (fast Ethernet switching processing board based on PDH).
This topic also describes how to configure and commission the EFP0.

The EFP0 is available in one functional version, namely, N1.
8.8.2 Application
The EFP0 is used to transmit Ethernet frames locally over the existing PDH telecommunications
networks, thus meeting the requirements of Ethernet service convergence and VIP privates lines.
The EFP0 performs Layer 2 switching, link aggregation, and multicast functions.
The EFP0 consists of the Ethernet access module, Layer 2 switching module, mapping module,
SDH mapping module, logic control module, clock module, and power module.
8.8.5 Front Panel
The front panel of the EFP0 has indicators and a bar code.
The EFP0 does not have any jumpers or DIP switches that are used for board settings.
8.8.7 Valid Slots

The EFP0 must be installed in a valid slot in the subrack. Otherwise, the EFP0 fails to work
normally.
8.8.8 Feature Code
The EFP0 does not have the feature code.
The EFP0 supports multiple Ethernet functions and features such as Layer 2 switching, LCAS,
and LPT. Configure the functions according to actual requirements.
You can set the parameters for the EFP0 by using the U2000.
This topic describes the faults that may occur when the board operates. This topic also provides
the methods and precautions to be taken for rectifying the faults.
according to the logical board on the NMS.
events are reported according to the logical board on the NMS.
The technical specifications of the EFP0 include the Ethernet performance specifications,

The EFP0 is available in one functional version, namely, N1.
8.8.2 Application
The EFP0 is used to transmit Ethernet frames locally over the existing PDH telecommunications
networks, thus meeting the requirements of Ethernet service convergence and VIP privates lines.
EoPDH Convergence Services

EoPDH convergence services converge multiple Ethernet services to E1 services.
Figure 8-39 shows the networking diagram of EoPDH convergence services. The FE services
from two NodeBs are converged to the NE1 through the EoPDH board. Then, the NE1 converts
the FE services to E1 services and transmits the E1 services to the NE2 over the PDH network.
On the NE2 , the E1 services and the FE services from RNC1 converge and become STM-1
services. The STM-1 services are transmitted to the NE3 over the SDH network, and then to
RNC2 over the FE link.

Figure 8-39 Networking diagram of EoPDH convergence services
PDH E1 STM-1
SDH STM-1 FE
NE2
E1 FE NE3 RNC 2
FE
Node B
NE1 RNC 1
FE OptiX OSN Equipment
Node B
Private-Line Services
By using the EoPDH technology, the E-Line services can be transparently transmitted over the
existing PDH network.
Figure 8-40 shows the networking diagram of the E-Line services. Ethernet services need to be
transmitted between User A1 and User A2, between User B1 and User B2. User A1 and User
B2 are connected to the local NE through different ports on the EoPDH board. The local NE
converts the accessed FE services to E1 services, and transmits the E1 services to the opposite
NE over the PDH network. The opposite NE converts E1 services to FE services and transmits
the FE services to User A2 and User B2.
Figure 8-40 Networking diagram of private-line services

User A1 User A2
FE FE
E1
E1
FE FE
PDH network
User B1 User B2
OptiX OSN equipment

The EFP0 performs Layer 2 switching, link aggregation, and multicast functions.
Table 8-147 provides the functions and features of the EFP0.

Table 8-147 Functions and features of the EFP0 board

Functions and Description
Features
Basic functions Processes 8xFE services so that the FE services can be carried on
the PDH network directly.
Functions when being l Accesses 8xFE services through electrical interfaces with the
used with the interface ETF8.
board l Accesses 8xFE services through optical interfaces with the
EFF8.
Specifications of the l Supports the 10BASE-TX and 100BASE-TX interfaces with the
interface ETF8.
l Supports the 100BASE-FX interface with the EFF8.
Format of service l Ethernet II, IEEE 802.3, IEEE 802.1q/p

frames l Supports a frame of 64 bytes to 2000 bytes. A jumbo frame of
more than 2000 bytes is not supported.
Maximum uplink The maximum uplink bandwidth is 155 Mbit/s.

bandwidth
Bound bandwidth 63 x VC-12
VCTRUNKs Number: 16
Configuration features:
l The bound services are VC-12s.
l A maximum of 16 VC-12s can be bound to one VCTRUNK.
Mapping granularities VC-12
Encapsulation format GFP-F
EPL services Supports transparent transmission based on PORT.
EVPL services l Supports EVPL services based on PORT+VLAN.

l Supports EVPL services based on QinQ. Supports the service
forwarding based on PORT.
l A maximum of 1024 LINK services are supported.
EVPLAN services l Supports data isolation based on VB+VLAN.

802.1q virtual bridge and IEEE 802.1ad provider bridge.


Features
EPLAN services l Supports Layer 2 convergence and point-to-multipoint

convergence.
l Supports the forwarding function of Layer 2 switching.
l Supports the client-side switching and PDH-side switching.
l Supports a maximum of 512 blacklist entries and 512 static MAC
addresses.
l Supports the function of self-learning the source MAC address.
The MAC address table is 16k in size. The aging time of the
l Supports the configuration of static MAC routes.
l Supports the querying of dynamic MAC addresses.
l Supports the creation, deletion, and querying of the VB. The
maximum number of the VBs is 1. The maximum number of
logical ports for each VB is 24.
l Supports the data isolation based on VB+VLAN.
l Supports the Hub-Spoken.
Protection schemes Supports the following equipment-level and network-level Ethernet

protection schemes:
l STP/RSTP
l LCAS
l LPT
l LAG
l DLAG
MTU Supports the packet length setting from 1518 bytes to 2000 bytes.
After the setting takes effect, the maximum packet length at the
ingress port is limited by the setting.
MPLS Not supported
VLAN Supports 4k VLANs.

The VLAN meets the IEEE 802.1q/p requirements.
Rapid spanning tree Supports the broadcast packet suppression and the RSTP in
protocol (RSTP) compliance with IEEE 802.1w.
LAG Supports the manual and static link aggregation at the Ethernet port
and in the VCTRUNK.
DLAG Supported
Multicast Supported


Features
ETH-OAM l Meet the IEEE 802.1ag: the continuity check (CC) test, unicast
loopback (LB) test, link trace (LT) test, network loop detect
(LD), auto-negotiation, fault diagnosis, and link performance
test.
l Meet the IEEE 802.3ah: the network loop detect (LD), continuity
check (CC) test, unicast loopback (LB) test, link trace (LT) test,
network loop detect (LD), auto-negotiation, fault diagnosis, and
link performance test.
CAR Supports the CAR with the granularity of 64 kbit/s.
Service-based/QoS Supports the flow classification based on PORT, PORT+VLAN ID,

flow classification PORT+VLAN ID+VLAN PRI, PORT+SVLAN and PORT
+CVLAN+SVLAN.
LCAS In compliance with ITU-T G.7042, the LCAS function realizes the
dynamic increase/decrease and protection of the bandwidth.
LPT Supports point-point and point-multipoint LPT.
Flow control function Supports the flow control based on ports in compliance with IEEE
802.3x.
Test frames Receives and transmits Ethernet test frames.
Port mirroring Supports the mirroring of ports.
Loopback function Supports PHY layer or MAC layer inloop at the Ethernet port.

monitoring
Alarms and Provides rich alarms and performance events to facilitate

command

The EFP0 consists of the Ethernet access module, Layer 2 switching module, mapping module,
SDH mapping module, logic control module, clock module, and power module.
Figure 8-41 shows the functional block diagram of the EFP0 by describing how to process 1xFE
signals.

Figure 8-41 Functional block diagram of the EFP0

Backplane
ENCP
SDH Cross-connect
mapping unit
Layer 2
VCP
FE Ethernet and
access switching
encapsula
DENCP
module module
tion Cross-connect
module unit
Mapping
module
Shutdown of
LOS
the laser
Communication
Logic control SCC unit
module Reference clock and header
SCC unit
+3.3 V
Power
module
module
Fuse +3.3 V +3.3 V backup
25 33 100 125
MHz MHz MHz MHz power supply

l In the receive direction, the Ethernet access module converts the optical signals from the
Ethernet equipment (such as a switch or a router) into electrical signals. If the signals are
accessed through electrical interfaces, O/E conversion is not required. At the PHY layer,
the Ethernet access module decodes the electrical signals and checks for the ETH_LOS
alarm. Then, the electrical signals are converted from serial signals into parallel signals and
then sent to the network processor module.
l In the transmit direction, the Ethernet access module converts parallel signals into serial
signals. At the PHY layer, the Ethernet access module encodes the signals and converts the
electrical signals into optical signals.
Layer 2 Switching Module

The Layer 2 switching module performs operations, such as Layer 2 switching, port isolation,
traffic classification, data traffic control, VLAN management, and priority configuration, on the
received and transmitted Ethernet services.
Mapping Module
In the upstream direction, the mapping module encapsulates Ethernet signals into frames in GFP-
F format and then concatenates the signals. This module supports the LCAS and E1 framing
functions.

In the downstream direction, the mapping module demaps E1 signals and compensates the delay
of virtual concatenation. After aligning, packets are decapsulated based on the encapsulation
format. The decapsulated data is finally transmitted to the Layer 2 switching module.
SDH Mapping Module

The SDH mapping module maps and demaps 63xE1 signals. In addition, this module processes
AU pointers, TU pointers, higher order path overheads, and lower order path overheads.
Logic Control Module

The logic control module is connected to external circuits through the bus. The logic control
l Manages and configures the other modules on the local board.

l Realizes inter-board communication through the internal Ethernet interface.
functions:

l Provides interfaces for connection to the CPU.
l Checks and selects a clock.
l Performs phase discrimination and frequency division for the clock.
l Checks for the in-service state of the cross-connect board, system control board, and line
board.
l Controls the shutdown of the optical module.
Clock Module
Power Module
The power module converts the -48 V/-60 V power supply into the DC voltages that the modules
of the board require.
8.8.5 Front Panel

The front panel of the EFP0 has indicators and a bar code.

Figure 8-42 shows the appearance of the front panel of the EFP0.

Figure 8-42 Front panel of the EFP0
EFP0
STAT
ACT
PROG
SRV
EFP0
Indicators
Interfaces
The front panel of the EFP0 has no interfaces. The interfaces are available on the 8.13 EFF8 or
8.15 ETF8.


The EFP0 does not have any jumpers or DIP switches that are used for board settings.
8.8.7 Valid Slots

The EFP0 must be installed in a valid slot in the subrack. Otherwise, the EFP0 fails to work
normally.
The EFP0 must be used with the ETF8 or EFF8.
The EFP0 can be installed in slots 6, 7, 12, and 13. In this case, the bandwidth is 155 Mbit/s.
Table 8-148 lists the slots valid for the EFP0 and the corresponding slots for the ETF8 and EFF8.
Table 8-148 Slots valid for the EFP0 and the corresponding slots for the ETF8 and EFF8
Slot Valid for the EFP0 Corresponding Slot for the ETF8 and EFF8
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17
8.8.8 Feature Code

The EFP0 does not have the feature code.


matches the board.

is correct.
----End


NOTE
a LAG.
----End

Channels.
----End


Boards.
----End

The EFP0 supports multiple Ethernet functions and features such as Layer 2 switching, LCAS,
You can configure the following Ethernet functions for the EFP0 by using the U2000:
l LCAS
l LPT
l LAG
l DLAG
l ETH-OAM
l Test Frame
l STP/RSTP
l IGMP Snooping

You can set the parameters for the EFP0 by using the U2000.
You can set the following parameters for the EFP0 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

This topic describes the faults that may occur when the board operates. This topic also provides
the methods and precautions to be taken for rectifying the faults.
Troubleshooting
Table 8-149 lists the faults that occur on the EFP0 frequently and the troubleshooting methods.

Table 8-149 Methods used to rectify the faults that occur on the EFP0 frequently
Service interruption l The services on a VCTRUNK See Troubleshooting Service

port are interrupted. Interruptions.
l The services on all the
Ethernet ports are interrupted.

interruption port are transiently Service Interruptions.
interrupted.
interrupted.
abnormal.

of the Ethernet ports is the Packet Loss.
half-duplex mode.
l Bit errors occur on the line
side.
Equipment l The interconnection fault See Troubleshooting Device

interconnection fault occurs on a single Ethernet Interconnection Faults.
port.
fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EFP0, see Replacing an Ethernet Board.

according to the logical board on the NMS.

8.8.13.1 N1EFP0
ALM_GFP_dCSF ALM_GFP_dLFD BD_STATUS
BIP_SD DLAG_PROTECT_FAIL ETH_CFM_LOC
ETH_CFM_MACSTATUS ETH_CFM_MISMERGE ETH_CFM_RDI
ETH_CFM_UNEXPERI ETH_LOS ETHOAM_DISCOVER_F

AIL

ULT
ETHOAM_SELF_LOOP ETHOAM_VCG_SELF_LO EX_ETHOAM_CC_LOS

OP
EX_ETHOAM_MPID_CNF FCS_ERR HARD_BAD

LCT
LAG_PORT_FAIL LAG_VC_PORT_FAIL LASER_MOD_ERR
LP_SLM_VC12 LP_TIM_VC12 LP_UNEQ_VC12
LPT_RFI LSR_NO_FITED LSR_WILL_DIE
LTEMP_OVER NO_BD_SOFT SUM_INPWR_HI
SUM_INPWR_LOW SUM_OUTPWR_HI SUM_OUTPWR_LOW
TD TEMP_ALARM TF
VCAT_LOM_VC12 VCAT_SQM_VC12 BIOS_STATUS
BIP_EXC COMMUN_FAIL T_LOSEX
TR_LOC LINK_ERR SUBCARD_ABN
DOWN_E1_AIS LFA LMFA
RMFA FLOW_OVER

events are reported according to the logical board on the NMS.

8.8.14.1 N1EFP0
Table 8-150 SDH

LPBBE LPES LPSES
LPUAS LPCSES LPFEUAS
LPFEBBE LPFEES LPFESES
LPFECSES OSPITMPMAX OSPITMPMIN
OSPITMPCUR RPLMAX RPLMIN
RPLCUR TPLMAX TPLMIN
TPLCUR TLBMAX TLBMIN
TLBCUR XCSTMPMAX XCSTMPMIN
XCSTMPCUR

FCSErrors UndersizePkts OversizePkts
Fragments Jabbers AlignmentErrors

Packets Received(64
Packets Received


Packets Received
(packets)

Packets Transmitted



Transmitted(packets) (frames) (frames)

Transmitted(64 Octets in
Alignment Errors(frames) FCS Errors(frames) Length)(packets)

Transmitted(65~127 Octets Transmitted(128~255 Transmitted(256~511 Octets in
in Length)(packets) Octets in Length)(packets) Length)(packets)

Transmitted(512~1023 Transmitted(1024~1518 Good Full Frame Speed
Octets in Length)(packets) Octets in Length)(packets) Received(Byte/s)
Good Full Frame Speed Good Full Frame Octets Good Full Frame Octets
Transmitted(Byte/s) Received(Byte) Transmitted(Byte)
Oversize Packets Packets Transmitted

Transmitted(packets) (packets) Octets Transmitted(Byte)
Octets Received(Byte) Octets Transmitted(Byte) Packets Received(packets)
Packets Transmitted Good Packets Received Good Packets Transmitted

Full Frame Speed Received Full Frame Speed

(Byte/s) Transmitted(Byte/s)

The technical specifications of the EFP0 include the Ethernet performance specifications,

Table 8-155 lists the parameters specified for the optical interfaces of the EFP0.

Table 8-155 Parameters specified for the optical interfaces of the EFP0
Parameter Value
Type of optical interface 100BASE-FX 100BASE-FX
Transmission distance (km) 15 2
Type of fiber Single-mode LC Multi-mode LC
Operating wavelength range 1261 to 1360 1270 to 1380

(nm)
Launched optical power range -15 to -8 -19 to -14

(dBm)
Receiver sensitivity (dBm) -8 -14
Minimum overload (dBm) -28 -30
Minimum extinction ratio 8.2 10

(dB)

Table 8-156 lists the parameters specified for the electrical interfaces of the EFP0.
Table 8-156 Parameters specified for the electrical interfaces of the EFP0
Type of Interface Code Pattern
100BASE-T, RJ-45 MLT-3
10BASE-T, RJ-45 Manchester
Laser Safety Class


NOTE
specifications, and back-to-back specifications of the EFP0 board of the N1 version.
the case of overloading, delay specifications, and back-to-back specifications of the EFP0.

of overloading, delay specifications, and back-to-back specifications
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 8-157 lists the throughput specifications of the EFP0. Table 8-158 lists the packet loss
ratio in the case of overloading of the EFP0. Table 8-159 lists the delay specifications of the
EFP0. Table 8-160 lists the back-to-back specifications of the EFP0.
NOTE
l The specification values vary according to the configuration and networking of the test environment
and the VC services bound on the VCG side. Thus, the specification values depend on the actual
environment.
l The specification values in the following tables are obtained in the scenario wherein EPL services
are configured and 16 VC-12 services are bound on the FE port.
Table 8-157 lists the throughput specifications of the EFP0. The values are obtained when the
l Mode: Bi-directional

Table 8-157 Throughput specifications of the EFP0

(byte) (%) (01,09,05) (pks/ (01,09,01) (pks/ sec)
sec) sec)
64 35.00 52083 52083 104166
128 33.18 28027 28027 56054
256 32.51 14723 14723 29446
512 31.89 7492 7492 14984
1024 31.86 3815 3815 7630
1280 31.87 3064 3064 6128
1518 31.87 2590 2590 5180
Table 8-158 lists the packet loss ratio in the case of overloading of the EFP0. The values are

Table 8-158 Packet loss ratio in the case of overloading of the EFP0

(byte) (%) (01,09,05) (%) (01,09,01) (%)
64 20.00 0.00 0.00 0.00
128 20.00 0.00 0.00 0.00
256 20.00 0.00 0.00 0.00
512 20.00 0.00 0.00 0.00
1024 20.00 0.00 0.00 0.00
1280 20.00 0.00 0.00 0.00
1518 20.00 0.00 0.00 0.00

Table 8-159 lists the delay specifications of the EFP0. The values are obtained when the
l Two delay modes are available, namely, cut through mode and store forward mode. In cut
through mode, the analyzer calculates the difference between the time when the first bit of
the transmitted frame arrives at the output port of the equipment and the time when the first
bit of the transmitted frame arrives at the input port of the equipment. In store forward
mode, the analyzer calculates the difference between the time when the first bit of the
transmitted frame arrives at the output port of the equipment and the time when the last bit
of the transmitted frame arrives at the input port of the equipment. In the table, the CT
values are obtained in cut through mode and the S&F values are obtained in store forward
mode.
Table 8-159 Delay specifications of the EFP0

64 20.00 351.3 351.3 346.2 346.2
128 20.00 359.4 359.4 349.1 349.1
256 20.00 420.6 420.6 400.2 400.2
512 20.00 573.7 573.7 532.8 532.8
1024 20.00 806.5 806.5 724.5 724.5
1280 20.00 952.8 952.8 850.3 850.3
1518 20.00 1044.6 1044.6 923.2 923.2
Table 8-160 lists the back-to-back specifications of the EFP0. The values are obtained when the



Table 8-160 Back-to-back specifications of the EFP0

(byte) (%) (01,09,05) Burst (01,09,01) (frames)
Size (frames) (frames)
64 20.00 297620 297620 595240
128 20.00 168920 168920 337840
256 20.00 90580 90580 181160
512 20.00 46990 46990 93980
1024 20.00 23940 23940 47880
1280 20.00 19230 19230 38460
1518 20.00 16250 16250 32500
The mechanical specifications of the EFP0 are as follows:
l Weight: 0.6 kg
Power Consumption
The maximum power consumption of the N1EFP0 at room temperature (25°C) is 22 W.
8.9 EGS2

The EGS2 is available in two functional versions, namely, N2 and N3.
8.9.2 Application
The EGS2 is used to access Ethernet services, manage bandwidths, and realize Layer 2 switching


The EGS2 supports the Layer 2 switching, MPLS, and broadcast functions.
The EGS2 consists of the Ethernet access module, network processor module, mapping module,
8.9.5 Front Panel
The front panel of the EGS2 has indicators, interfaces, a bar code, and a laser safety class label.
The EGS2 does not have any jumpers or DIP switches that are used for board settings.
8.9.7 Valid Slots
The EGS2 must be installed in a valid slot in the subrack. Otherwise, the EGS2 cannot work
normally.
8.9.8 Feature Code
The feature code of the EGS2 indicates the type of interface.
The EGS2 supports multiple Ethernet functions and features such as Layer 2 switching, LCAS,
You can set parameters for the EGS2 by using the U2000.
The technical specifications of the EGS2 include the parameters specified for optical interfaces,
consumption.

The EGS2 is available in two functional versions, namely, N2 and N3.
Table 8-161 describes the versions of the EGS2.

Table 8-161 Versions of the EGS2

Item Description
Functional version The EGS2 is available in two functional versions, namely, N2 and N3.
Difference l The N2EGS2 supports the point-to-point LPT function.

l The N3EGS2 supports the point-to-point LPT function and the
point-to-multipoint LPT function.
l The N3EGS2 supports the board version replacement function.
Substitution The N3EGS2 can substitute for the N2EGS2.
8.9.2 Application
NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and

NOTE
When the service converging FE services into GE services is configured, the GE switching board can be
set to the 1000M full-duplex mode or auto-negotiation mode, the VLAN of the convergence service is
variable, and the binding granularity can be at the VC-3 or VC-12 level.

The EGS2 supports the Layer 2 switching, MPLS, and broadcast functions.
Table 8-162 provides the functions and features of the EGS2.
Table 8-162 Functions and features of the EGS2

Function and EGS2
Feature
Basic functions Processes 2xGE services.
being used with
the interface board
Specifications of l Supports the 1000BASE-SX/LX/ZX/VX Ethernet optical interfaces.

the optical The optical interfaces support the auto-negotiation function in
interface compliance with IEEE 802.3z. The optical interfaces use the SFP
optical module and support hot swapping. When the multi-mode
optical fiber is used, the maximum transmission distance is 550 m.
When the single-mode optical fiber is used, the maximum
transmission distance is 10 km. The optical modules that can meet
different requirements for the transmission distance such as 40 km
and 80 km can also be used.
l The N3EGS2 also supports the 1000BASE-T RJ-45 Ethernet
electrical interface. The electrical interface supports the auto-
negotiation function. The negotiated rate can be 10 Mbit/s, 100 Mbit/
s, or 1000 Mbit/s. The N3EGS2 uses the SFP electrical interface and
supports hot swapping. The maximum transmission distance is 100
m.
Format of service l Supports Ethernet II, IEEE 802.3, and IEEE 802.1q/p formats.
frames l Supports the frame with a length ranging from 64 bytes to 9600 bytes.
Maximum uplink The maximum uplink bandwidth is 2.5 Gbit/s. The EGS2 can adapt to
bandwidth the bandwidth of the slot.

Function and EGS2

Feature

l In the case of the N2EGS2, VCTRUNK 1–VCTRUNK 12 can be
bound with VC-4s numbered 1–4 only, VCTRUNK13–VCTRUNK
24 can be bound with VC-4s numbered 5–8 only, VCTRUNK 25–
VCTRUNK 36 can be bound with VC-4s numbered 9–12 only, and
VCTRUNK 37–VCTRUNK 48 can be bound with VC-4s numbered
13–16 only.
l In the case of the N3EGS2, there is no requirement regarding
VCTRUNK binding. One VCTRUNK can be bound with up to 24
VC-3s.
l VC-4s numbered 4, 8, 12, and 16 support the binding of VC-3 and
VC-12 paths. The other VC-4s support the binding of VC-3 paths
only.
time.
Mapping Supports VC-12, VC-3, VC12-Xv (X≤63), and VC3-Xv (X≤24)

Encapsulation Supports the GFP-F protocol.

format
l Supports the blacklist that can contain 2K records and also the static
MAC address table that can contain 2K records. The sum of the
number of records in the blacklist and the number of addresses in the
static MAC address table must not exceed 2K. The blacklist function
of the N3EGS2 supports verification of destination MAC addresses
only.
l Supports the self-learning of the source MAC address. The capacity
of the MAC address table is 16K. The aging time of the MAC address
can be set and queried.
l Supports the creation, deletion, and query of the VB. The maximum
number of supported VBs is 2. The maximum number of logical ports
for each VB is 30.
MAC bridge.

Function and EGS2

Feature

virtual bridge.
MTU Supports the setting of the packet length, which ranges from 1518 bytes
to 9600 bytes. After the setting becomes valid, the length of the packets
that enter the IP ports is restricted by the pre-set MTU.

802.1q/p.

function
IGMP snooping Supports the IGMP snooping function. In addition, the N3EGS2
function supports the IGMP snooping fast-leave function, unknown multicast
packet discarding function, and static multicast function.
NOTE
The N3EGS2 supports the IGMP snooping fast-leave function when it substitutes
for the N2EGS2 through the board version replacement function.
ETH-OAM l The N2EGS2 does not support the ETH-OAM function.

function l The N3EGS2 supports CC for the multicast service, LB test for the
unicast service, LT test, LD, auto-negotiation, fault diagnosis, and
link performance detection. The ETH-OAM function complies with
IEEE 802.1ag and IEEE 802.3ah.

l The N3EGS2 supports the traffic shaping function.
l Supports the flow classification based on PORT, PORT+VLAN ID,
or PORT+VLAN ID+VLAN PRI.
l The N3EGS2 supports the flow classification based on PORT+DSCP
or PORT+ToS.
LPT function l The N2EGS2 supports the P2P LPT.

l The N3EGS2 supports the P2P LPT and P2MP LPT.
Flow control Supports the port-based flow control function that complies with IEEE
function 802.3x.

Function and EGS2

Feature
High-precision Does not support the high-precision time.

time (IEEE 1588
V2)
Test frames The N2EGS2 receives and transmits Ethernet test frames, whereas the
N3EGS2 receives and transmits Ethernet test frames and GFP test
frames.
Port mirroring The N3EGS2 supports ingress mirroring.
Loopback l Supports inloops on Ethernet ports (at the PHY layer or MAC layer).
function l The N2EGS2 supports inloops and outloops at the VC-3 level, but
the N3EGS2 does not support inloops and outloops at the VC-3 level.
Protection Supports the following protection schemes at the Ethernet network level:
schemes l The N3EGS2 supports BPS
l STP/RSTP
l LCAS
l LPT
l LAG

performance
monitoring
events
Response to the Supports the setting and query of the board IP address (supported by the
ping command N3EGS2 only).

Figure 8-45 shows the functional block diagram of the EGS2 by describing how to process
1xGE signals.

Figure 8-45 Functional block diagram of the EGS2

Backplane
ENCP
Cross-connect unit
Network Control Switch Interface
VCP
GE Ethernet
access processor fabric converting
DENCP
module Data module
Cross-connect unit
Laser
shutdown LOS
Communication
Logic and SCC unit
SCC unit
+3.3 V Fuse
Power -48 V/-60 V
Clock module Power module -48 V/-60 V
module Fuse
+3.3 V backup power
50 77 125 155
MHz MHz MHz MHz



l MPLS
l L2 MPLS VPN

l Ethernet/VLAN

l WFQ
l Four CoSs
Mapping Module



functions:


Clock Module
Power Module
require.
8.9.5 Front Panel


Figure 8-46 shows the appearance of the front panel of the N2EGS2/N3EGS2 that is installed
with the GE optical interface.
Figure 8-46 Front panel of the N2EGS2/N3EGS2 that is installed with the GE optical interface
EGS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EGS2

The N3EGS2 can also be installed with the GE electrical interface. Figure 8-47 shows the
appearance of the front panel of the N3EGS2 that is installed with the GE electrical interface.
Figure 8-47 Front panel of the N3EGS2 that is installed with the GE electrical interface
EGS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
OUT1
IN1
OUT2
IN2
EGS2
Indicators


Interfaces
The front panel of the N2EGS2/N3EGS2 has two GE optical interfaces. Table 8-163 describes
the types and usage of the optical interfaces of the N2EGS2/N3EGS2.
Table 8-163 Optical interfaces of the N2EGS2/N3EGS2

Interface
OUT1/IN1 LC (swappable) Transmits and receives 1000BASE-SX/LX/ZX

signals.

signals.
When the N3EGS2 is installed with the electrical interfaces, the two GE electrical interfaces are
of the same type and have the same usage. Table 8-164 describes the types and usage of the
electrical interfaces of the N3EGS2.
Table 8-164 Electrical interfaces of the N3EGS2

Interface
GE RJ-45 (swappable) Transmits and receives 1000BASE-T signals.
Table 8-165 provides the pin assignments of the RJ-45 interface of the N3EGS2.
Table 8-165 Pin assignments of the RJ-45 interface of the N3EGS2
Pin Description
1 BI_DA+
2 BI_DA–
3 BI_DB+
4 BI_DC+
5 BI_DC–
6 BI_DB–
7 BI_DD+
8 BI_DD–


8.9.7 Valid Slots

normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the EGS2 and the bandwidth of the EGS2 vary with the cross-connect capacity
of the subrack and the version of the board. The slots valid for the EGS2 are as follows:
l When the cross-connect capacity is 20 Gbit/s, the N2EGS2 and N3EGS2 can be installed
in slots 5–8 and 11–13. When the N2EGS2/N3EGS2 is installed in slots 5 and 6, the
bandwidth is 622 Mbit/s. When the N2EGS2/N3EGS2 is installed in slots 7, 8, 11, and 12,
the bandwidth is 2.5 Gbit/s. When the N2EGS2/N3EGS2 is installed in slot 13, the
bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the N2EGS2 and N3EGS2 can be installed
in slots 5–8 and 11–13. In this case, the bandwidth is 2.5 Gbit/s.
8.9.8 Feature Code

Table 8-166 provides the relationship between the feature code of the EGS2 and the type of
interface.
Table 8-166 Relationship between the feature code of the EGS2 and the type of interface
SSN2EGS210 and 10 1000BASE-SX (0.5 km)

SSN2EGS310
SSN2EGS211 and 11 1000BASE-LX (10 km)

SSN2EGS311
SSN2EGS212 and 12 1000BASE-VX (40 km)

SSN2EGS312
SSN2EGS213 and 13 1000BASE-ZX (80 km)

SSN2EGS213
SSN3EGS214 14 1000BASE-T (100 m)



matches the board.
is correct.
----End

NOTE


a LAG.
----End

Channels.
----End

Boards.
----End

You can configure the following Ethernet functions for the EGS2 by using the U2000:
l LCAS
l QoS
l LPT
l LAG
l ETH-OAM
l Test Frame
l STP/RSTP
l IGMP Snooping

You can set the following main parameters for the EGS2 by using the U2000:

l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 8-167 lists the faults that occur on the EGS2 frequently and the troubleshooting methods.
Table 8-167 Methods used to troubleshoot the faults that occur on the EGS2 frequently


interrupted.
abnormal.

duplex mode.

fault occurs.

Replacing the Board

NOTE
replace the board.
For information on how to replace the EGS2, see Replacing an Ethernet Board.

8.9.13.1 N2EGS2
HP_LOM LAG_FAIL LASER_MOD_ERR
LCAS_FOPR LCAS_PLCT LCAS_FOPT
LCAS_PLCR LCAS_TLCR LCAS_TLCT
LP_RDI_VC12 LP_SLM_VC12 LP_SLM_VC3
LP_REI_VC3 LP_TIM_VC3 LP_UNEQ_VC12
LP_TIM_VC12 LSR_NO_FITED NO_BD_SOFT
LP_UNEQ_VC3 SUBCARD_ABN T_LOS
SLAVE_WORKING TU_AIS_VC12 TU_AIS_VC3
TPS_ALM TU_LOP_VC3 VCAT_LOA
TU_LOP_VC12 VCAT_LOM_VC3 PATCHFILE_NOTEXIST
VCAT_LOM_VC12 PATCH_NOT_CON- TR_LOC

FIRM
PATCH_ERR T_LOSEX ETH_NO_FLOW
SWDL_PKG_NOBD-
SOFT

8.9.13.2 N3EGS2
COMMUN_FAIL ETH_CFM_LOC ETH_CFM_MISMERGE
ETH_CFM_RDI ETH_CFM_UNEXPERI ETH_LOS
ETH_NO_FLOW ETHOAM_DISCOVER_F ETHOAM_RMT_CRIT_FA

AIL ULT
ETHOAM_RMT_LOOP ETHOAM_RMT_SD ETHOAM_SELF_LOOP
ETHOAM_VCG_SELF_L EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNF

OOP LCT
FCS_ERR FLOW_OVER FPGA_ABN
HARD_BAD HP_LOM LASER_MOD_ERR
LINK_ERR LOOP_ALM LP_RDI_VC12
LP_SLM_VC12 LP_SLM_VC3 LP_TIM_VC12
LP_TIM_VC3 LP_UNEQ_VC12 LP_UNEQ_VC3
LPT_RFI LSR_NO_FITED LSR_WILL_DIE
LTEMP_OVER MOD_TYPE_MISMATCH NO_BD_SOFT
PORT_MODULE_OFF- IN_PWR_HIGH IN_PWR_LOW

LINE
OUT_PWR_HIGH OUT_PWR_LOW T_LOSEX
TD TEMP_OVER TF
VCAT_SQM_VC3 VCTRUNK_NO_FLOW


8.9.14.1 N2EGS2
Table 8-168 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS
Fragments Jabbers AlignmentErrors FCSErrors
AlignmentErrors
Packets Received(65~127
Packets Received(64 Octets Octets in Length)(packets/ Packets Received(128~255
in Length)(packets/s) s) Octets in Length)(packets/s)
Packets Received(256~511 Packets Received

Octets in Length)(packets/ (512~1023 Octets in Packets Received(1024~1518
s) Length)(packets/s) Octets in Length)(packets/s)
Multicast Packets Received Broadcast Packets

(packets/s) Received(packets/s) Drop Events(times/s)

Packets Transmitted(64 Packets Transmitted

Octets in Length)(packets/ (65~127 Octets in Length) Packets Transmitted(128~255
s) (packets/s) Octets in Length)(packets/s)




Transmitted(packets/s) (Byte/s) Alignment Errors(frames/s)
FCS Errors(frames/s)
8.9.14.2 N3EGS2
Table 8-172 SDH

HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS OSPITMPMAX
OSPITMPMIN OSPITMPCUR RPLMAX
RPLMIN RPLCUR TPLMAX
TPLMIN TPLCUR TLBMAX
TLBMIN TLBCUR XCSTMPMAX
XCSTMPMIN XCSTMPCUR

Fragments Jabbers AlignmentErrors
FCSErrors

Packets Received(65~127
Packets Received(64 Octets Octets in Length)(packets/ Packets Received(128~255
in Length)(packets/s) s) Octets in Length)(packets/s)
Packets Received(256~511 Packets Received

Octets in Length)(packets/ (512~1023 Octets in Packets Received(1024~1518
s) Length)(packets/s) Octets in Length)(packets/s)
Multicast Packets Received Broadcast Packets

(packets/s) Received(packets/s) Drop Events(times/s)

Packets Transmitted(64 Packets Transmitted

Octets in Length)(packets/ (65~127 Octets in Length) Packets Transmitted(128~255
s) (packets/s) Octets in Length)(packets/s)



Transmitted(packets/s) (Byte/s) Alignment Errors(frames/s)


l VC-4s numbered 4, 8, 12, and 16 support the binding of VC-3 and VC-12 paths. The other
VC-4s support the binding of VC-3 paths only.
l The mapping relationship between VCTRUNKs and timeslots is as follows:
– VCTRUNK numbered 1–12: VC-12s numbered 1–63 and VC-3s numbered 1–12
– VCTRUNK numbered 13–24: VC-12s numbered 64–126 and VC-3s numbered 13–24
– VCTRUNK numbered 25–36: VC-12s numbered 127–189 and VC-3s numbered 25–
36
– VCTRUNK numbered 37–48: VC-12s numbered 190–252 and VC-3s numbered 37–
48

consumption.
Parameter Specified for Optical Interfaces

Table 8-177 lists the parameters specified for the optical interfaces of the EGS2.
Table 8-177 Parameters specified for the optical interfaces of the EGS2
Parameter Value
Type of optical 1000BASE-ZX 1000BASE- 1000BASE- 1000BASE-SX

interface (80 km) VX (40 km) LX (10 km) (0.5 km)
Type of fiber Single-mode LC Single-mode Single-mode Multi-mode LC

LC LC
Launched optical -2 to 5 -5 to 0 -9 to -3 -9.5 to -2.5

power range
(dBm)

wavelength range
(nm)
Minimum -3 -3 -3 0
overload (dBm)
Receiver -23 -23 -20 -17

sensitivity (dBm)
Minimum 9 9 9 9
extinction ratio
(dB)

Table 8-178 lists the parameters specified for the electrical interfaces of the EGS2.

Table 8-178 Parameters specified for the electrical interfaces of the EGS2
NOTE
Only the EGS2 boards of the N3 version supports the GE electrical interfaces.
Laser Safety Class


NOTE
specifications, and back-to-back specifications of the EGS2 board of the N2 version.
the case of overloading, latency specifications, and back-to-back specifications of the N2EGS2.
of overloading, latency specifications, and back-to-back specifications of the N2EGS2
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 8-179 lists the throughput specifications of the N2EGS2. Table 8-180 lists the packet loss
ratio in the case of overloading of the N2EGS2. Table 8-181 lists the latency specifications of
the N2EGS2. Table 8-182 lists the back-to-back specifications of the N2EGS2.

NOTE
are used.
configured and five VC-12s are bound on the GE port.
Table 8-179 lists the throughput specifications of the N2EGS2. The values are obtained when

Table 8-179 Throughput specifications of the N2EGS2

(Byte) (%) (01,01,02) (pks/ (01,01,01) (pks/ sec)
sec) sec)
64 1.15 17086 17086 34172
128 1.12 9501 9501 19002
256 1.12 5094 5094 10188
512 1.13 2660 2660 5320
1024 1.12 1346 1346 2692
1280 1.13 1088 1088 2176
1518 1.14 925 925 1850
Table 8-180 lists the packet loss ratio in the case of overloading of the N2EGS2. The values are


Table 8-180 Packet loss ratio in the case of overloading of the N2EGS2

(Byte) (%) (01,01,02) (%) (01,01,01) (%)
64 100.00 98.846 98.846 98.846
128 100.00 98.869 98.868 98.868
256 100.00 98.874 98.875 98.874
512 100.00 98.866 98.863 98.865
1024 100.00 98.870 98.870 98.870
1280 100.00 98.863 98.861 98.862
1518 100.00 98.855 98.855 98.855
Table 8-181 lists the latency specifications of the N2EGS2. The values are obtained when the


Table 8-181 Latency specifications of the N2EGS2

64 1.00 555.8 555.8 555.3 555.3
128 1.00 615.2 615.2 614.2 614.2
256 1.00 734.6 734.6 732.6 732.6
512 1.00 914.0 914.0 909.9 909.9
1024 1.00 1313.7 1313.7 1305.6 1305.6
1280 1.00 1523.1 1523.1 1512.9 1512.9
1518 1.00 1706.6 1706.6 1694.4 1694.4
Table 8-182 lists the back-to-back specifications of the N2EGS2. The values are obtained when

Table 8-182 Back-to-back specifications of the N2EGS2

Frames) Frames)
64 100.00 1236 1236 2472
128 100.00 1321 1323 2644
256 100.00 1070 1070 2140
512 100.00 934 934 1868


Frames) Frames)
1024 100.00 468 468 936
1280 100.00 458 458 916
1518 100.00 450 453 903
NOTE
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
NOTE
are used.
configured and 12 VC-3s are bound on the GE port.

l Maximum rate (%): 65

(byte) (pks/sec)
64 60.00 892857 892857
128 58.73 496032 496032
256 57.98 262605 262605
512 58.08 136463 136463
1024 58.00 69444 69444
1280 58.04 55804 55804
1518 58.04 47170 47170


(byte) (%)
64 100.00 39.033 39.033
128 100.00 40.323 40.323
256 100.00 41.081 41.081
512 100.00 41.492 41.492
1024 100.00 41.703 41.703
1280 100.00 41.744 41.744
1518 100.00 41.769 41.769
l Step rate (%): 10.00


64 60.00 89.9 89.9 89.4 89.4
128 58.73 94.8 94.8 93.8 93.8
256 57.98 97.4 97.4 95.3 95.3
512 58.08 108.9 108.9 104.9 104.9
1024 58.00 123.4 123.4 115.3 115.3
1280 58.04 129.2 129.2 119.0 119.0
1518 58.04 138.0 138.0 125.8 125.8

64 60.00 1785714 1785714
128 58.73 992064 992064
256 57.98 525210 525210
512 58.08 272926 272926


1024 58.00 138888 138888
1280 58.04 111608 111608
1518 58.04 94340 94340
The mechanical specifications of the EGS2 are as follows:
l Weight of the N2EGS2 (kg): 1.0
Power Consumption
The maximum power consumption of the N2EGS2 at room temperature (25°C) is 43 W.
8.10 EMS2

The EMS2 is available in one functional version, namely, N1.
8.10.2 Application
The EMS2 is used to access Ethernet services, manage bandwidths, and realize Layer 2 switching
The EMS2 supports the Layer 2 switching, link convergence, and multicast functions.
The EMS2 consists of the Ethernet access module, network processor module, mapping module,
8.10.5 Front Panel
The front panel of the EMS2 has indicators, interfaces, a bar code, and a laser safety class label.
The EMS2 does not have any jumpers or DIP switches that are used for board settings.
8.10.7 Valid Slots
The EMS2 must be installed in a valid slot in the subrack. Otherwise, the EMS2 cannot work
normally.
8.10.8 Feature Code

The feature code of the EMS2 indicates the type of interface.
The EMS2 supports multiple Ethernet functions and features such as Layer 2 switching, LCAS,
You can set parameters for the EMS2 by using the U2000.
The technical specifications of the EMS2 include the parameters specified for optical interfaces,
laser safety class, dimensions, weight, and power consumption.

8.10.2 Application

NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and
NOTE
set only to the 1000M full-duplex mode, the VLAN of the convergence service is variable, and the binding
granularity can be at the VC-3 or VC-12 level.

Table 8-187 provides the functions and features of the EMS2.
Table 8-187 Functions and features of the EMS2

Function and EMS2
Feature
Basic functions Accesses and processes 2xGE services.

Processes 16xFE services.
Support point-to-multipoint convergence services.

Function and EMS2

Feature
Functions when being l Accesses 16xFE signals through the electrical interface when the
used with the interface EMS2 is used with the ETF8.
EMS2 is used with the EFF8.
l Accesses 8xFE signals through the electrical interface and 8xFE
signals through the optical interface when the EMS2 is used with
the ETF8 and EFF8.

distance is 550 m. When the single-mode optical fiber is used,
the maximum transmission distance is 10 km. The optical
modules that can meet different requirements for the transmission
distance such as 40 km and 80 km can also be used.
l Supports the 1000BASE-T RJ-45 Ethernet electrical interface.
The electrical interface supports the auto-negotiation function.
The negotiated rate can be 10 Mbit/s, 100 Mbit/s, or 1000 Mbit/
s. The board uses the SFP electrical interface and supports hot
swapping. The maximum transmission distance is 100 m.
l Supports 10BASE-T/100BASE-TX signals when the EMS2 is
used with the ETF8 and supports 100BASE-FX signals when the
l The optical interfaces comply with IEEE 802.3u.
Format of service l Supports Ethernet II, IEEE 802.3, IEEE 802.1q/p formats.
bytes.
Maximum uplink 2.5 Gbit/s

bandwidth
Bound bandwidth 8xVC-4, 24xVC-3 or 63xVC-12

l VC-4s numbered 4, 8, 12, and 16 support the binding of VC-3
and VC-12 paths. The other VC-4s support the binding of VC-3
paths only.
time.

Function and EMS2

Feature
Mapping granularities Supports the following virtual concatenation granularities: VC-12,

VC-3, VC-4, VC12-Xv (X≤63), VC-4-Xv (X≤8), and VC3-Xv
(X≤24).
Encapsulation format Supports the GFP-F protocol.
EPL services Supports PORT-based transparent transmission.

– Supports a maximum of 2048 services that are accessed
through IP ports.
through VCTRUNKs.
– Supports a maximum of 4096 links.
l Supports QinQ-based EVPL services.
l Supports PORT-based service forwarding.
EPLAN l Supports the Layer 2 forwarding function.

static MAC address table that can contain 2K records. The sum
of the number of records in the blacklist and the number of
addresses in the static MAC address table must not exceed 2K.
The blacklist function supports verification of destination MAC
addresses only.
maximum number of supported VBs is 16.
MAC bridge.
EVPLAN l Support EVPLAN virtual bridges.

l Supports the configuration of up to 4096 VLAN services.
802.1q virtual bridge and the IEEE 802.1ad virtual bridge.
MPLS Support the MPLS.

Function and EMS2

Feature
VLAN l Supports VLAN and QinQ, and supports the addition, deletion,
and exchanging of VLAN tags. The function complies with IEEE
802.1q/p.
l Supports 4096 S-VLANs (0-4095) and 4096 C-VLANs (0-4095)
in the case of QinQ services.
l Supports 4095 VLANs (1-4095) in the case of EVPL services.
RSTP Supports the RSTP, which complies with IEEE 802.1w.
Link aggregation Supports manual link aggregation and load sharing link aggregation.
function
ETH-OAM function Supports CC for the multicast service, LB test for the unicast service,
LT test, LD, auto-negotiation, fault diagnosis, and link performance
detection. The ETH-OAM function complies with IEEE 802.1ag and
IEEE 802.3ah.

l Supports the flow classification based on PORT, PORT+VLAN,
PORT+SVLAN, and PORT+VLAN+PRI.
IEEE 802.3x.

(IEEE 1588 V2)
Test frames Supports test frames.
Port mirroring Supports ingress mirroring.
Loopback function Supports inloops on Ethernet ports (on the PHY layer or MAC layer).
level:
l STP/RSTP
l LCAS
l LPT
l LAG
Ethernet performance Supports RMON of the Ethernet performance of Ethernet ports and
monitoring VCTRUNKs.

Function and EMS2

Feature
command

Figure 8-51 shows the functional block diagram of the EMS2 by describing how to process
1xGE/FE signals.
Figure 8-51 Functional block diagram of the EMS2

Backplane
ENCP
Cross-connect unit
VCP
GE/FE Ethernet
DENCP
module Data module

Cross-connect unit
Laser
shutdown LOS
Communication
Logic and SCC unit
SCC unit
+3.3 V Fuse
Power -48 V/-60 V
module
50 77 125 155
MHz MHz MHz MHz




decapsulated. The Ethernet/VLAN format is supported.

l WFQ
l Four CoSs
Mapping Module
In the upstream direction, this module first encapsulates Ethernet signals in LAPS, GFP-F, or
HDLC format. The concatenation is performed. The LCAS function is supported. Then, the
Ethernet signals are converted into SDH signals.



functions:



Clock Module
Power Module
require.
8.10.5 Front Panel


Figure 8-52 shows the appearance of the front panel of the EMS2 that is installed with the GE
optical interface.

Figure 8-52 Front panel of the EMS2 that is installed with the GE optical interface
EMS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EMS2
electrical interface.

Figure 8-53 Front panel of the EMS2 that is installed with the GE electrical interface
EMS2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2 OUT1
IN1
OUT2
IN2
EMS2
Indicators

Interfaces
The front panel of the EMS2 has two interfaces. Table 8-188 describes the types and usage of
the interfaces of the EMS2 when the EMS2 is installed with the optical interfaces. When the
EMS2 is installed with the electrical interfaces, the two GE electrical interfaces are of the same
type and have the same usage. Table 8-189 describes the types and usage of the electrical
interfaces of the EMS2.
Table 8-188 Optical interfaces of the EMS2

Interface

signals.

signals.
Table 8-189 Electrical interfaces of the EMS2

Interface
GE RJ-45 Transmits and receives 1000BASE-T signals.

(swappable)
Table 8-190 provides the pin assignments of the RJ-45 interface of the EMS2.
Table 8-190 Pin assignments of the RJ-45 interface of the EMS2

Pin Description
1 BI_DA+
2 BI_DA–
3 BI_DB+
4 BI_DC+
5 BI_DC–
6 BI_DB–
7 BI_DD+
8 BI_DD–


8.10.7 Valid Slots

normally.
NOTE
l Slot bandwidth
l Board version
The EMS2 can be used with the ETF8 and EFF8.
The EMS2 can be installed in slots 5–8 and 11–13 in the subrack. The slots valid for the EMS2
vary with the bandwidth and the cross-connect capacity of the subrack.
l When the cross-connect capacity is 60 Gbit/s, the EMS2 can be installed in slots 5–8 and
11–13. When the EMS2 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When
the EMS2 is installed in slots 7, 8, 11, and 12, the bandwidth is 2.5 Gbit/s. When the EMS2
is installed in slot 13, the bandwidth is 1.25 Gbit/s.
Table 8-191 lists the slots valid for the EMS2 and the corresponding slots for the ETF8 and
EFF8.
Table 8-191 Slots valid for the EMS2 and the corresponding slots for the ETF8 and EFF8
Valid Slot for the EMS2 Corresponding Slots for the ETF8 and EFF8
8.10.8 Feature Code


Table 8-192 provides the relationship between the feature code of the EMS2 and the type of
interface.
Table 8-192 Relationship between the feature code of the EMS2 and the type of interface
SSN1EMS210 10 1000BASE-ZX (80 km)
SSN1EMS211 11 1000BASE-SX (0.5 km)
SSN1EMS212 12 1000BASE-LX (10 km)
SSN1EMS213 13 1000BASE-VX (40 km)
SSN1EMS214 14 1000BASE-T (100 m)


matches the board.
is correct.
----End



NOTE
a LAG.
----End

Channels.
----End

Boards.
----End


You can configure the following Ethernet functions for the EMS2 by using the U2000:
l LCAS
l LPT
l LAG
l ETH-OAM
l Test Frame
l STP/RSTP
l IGMP Snooping

You can use set the following main parameters for the EMS2 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 8-193 lists the faults that occur on the EMS2 frequently and the troubleshooting methods.
Table 8-193 Methods used to troubleshoot the faults that occur on the EMS2 frequently



interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EMS2, see Replacing an Ethernet Board.

8.10.13.1 N1EMS2
ETH_NO_FLOW ETH_CFM_LOC ETH_CFM_MISMERGE
ETH_CFM_RDI ETH_CFM_UNEXPERI ETHOAM_RMT_LOOP
ETHOAM_DISCOVER_FA ETHOAM_RMT_CRIT_FA EX_ETHOAM_CC_LOS

IL ULT

EX_ETHOAM_MPID_CNF ETHOAM_RMT_SD FPGA_ABN

LCT
HARD_BAD FLOW_OVER HP_LOM
LTEMP_OVER MOD_TYPE_MISMATCH NO_BD_SOFT
PORT_MODULE_OFF- SUBCARD_ABN IN_PWR_HIGH

LINE
IN_PWR_LOW OUT_PWR_HIGH OUT_PWR_LOW
T_LOSEX TD TEMP_OVER
TF TR_LOC TU_AIS_VC12
LSR_WILL_DIE VCAT_LOM_VC12 VCAT_LOM_VC3
VCAT_LOA VCAT_SQM_VC12 VCAT_SQM_VC3
VCTRUNK_NO_FLOW FCS_ERR ETHOAM_SELF_LOOP
ETHOAM_VCG_SELF_LO AU_AIS AU_LOP

OP
B3_EXC_VC4 B3_SD_VC4 HP_RDI
HP_UNEQ VCAT_LOM_VC4 VCAT_SQM_VC4


8.10.14.1 N1EMS2
Table 8-194 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
XCSTMPMAX XCSTMPMIN





Packets Transmitted






l VC-4s numbered 4, 8, 12, and 16 support the binding of VC-3 and VC-12 paths. The other
VC-4s support the binding of VC-3 paths only.


Table 8-199 lists the parameters specified for the optical interfaces of the EMS2.

Table 8-199 Parameters specified for the optical interfaces of the EMS2
Parameter Value


LC LC

power range
(dBm)

wavelength range
(nm)
Minimum -3 -3 -3 0
overload (dBm)
Receiver -23 -23 -20 -17

sensitivity (dBm)
Minimum 9 9 9 9
extinction ratio
(dB)

Table 8-200 lists the parameters specified for the electrical interfaces of the EMS2.
Table 8-200 Parameters specified for the electrical interfaces of the EMS2

NOTE
specifications, and back-to-back specifications of the EMS2 board of the N1 version.
the case of overloading, latency specifications, and back-to-back specifications of the EMS2.

Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 8-201 and Table 8-202 list the throughput specifications of the EMS2. Table 8-203 and
Table 8-204 list the packet loss ratio in the case of overloading of the EMS2. Table 8-205 and
Table 8-206 list the latency specifications of the EMS2. Table 8-207 and Table 8-208 list the
back-to-back specifications of the EMS2.
NOTE
are used.
configured and three VC-3s is bound on the FE port, or EPL services are configured and 48 VC-12s
are bound on the GE port.
Table 8-201 lists the throughput specifications of the EMS2 (three VC-3s is bound on the FE
port). The values are obtained when the SmartApplication is set as follows:
l Maximum rate (%): none

Table 8-201 Throughput specifications of the EMS2 (three VC-3s is bound on the FE port)

(byte) (pks/sec)
64 100.00 148810 148810
128 100.00 84459 84459
256 100.00 45290 45290
512 100.00 23496 23496
1024 100.00 11973 11973
1280 100.00 9615 9615
1518 100.00 8127 8127
Table 8-202 lists the throughput specifications of the EMS2 (48 VC-12s are bound on the GE
Table 8-202 Throughput specifications of the EMS2 (48 VC-12s are bound on the GE port)

(byte) (pks/sec)
64 11.41 169837 339674
128 10.82 91374 182748
256 10.19 46160 92320
512 10.20 23965 47930
1024 10.20 12212 24424
1280 10.20 9809 19618


(byte) (pks/sec)
1518 10.20 8288 16576
Table 8-203 lists the packet loss ratio in the case of overloading of the EMS2 (three VC-3s is
bound on the FE port). The values are obtained when the SmartApplication is set as follows:
Table 8-203 Packet loss ratio in the case of overloading of the EMS2 (three VC-3s is bound on
the FE port)

(byte) (%)
64 100.00 0.000 0.000
128 100.00 0.000 0.000
256 100.00 0.000 0.000
512 100.00 0.000 0.000
1024 100.00 0.000 0.000
1280 100.00 0.000 0.000
1518 100.00 0.000 0.000
Table 8-204 lists the packet loss ratio in the case of overloading of the EMS2 (48 VC-12s are
bound on the GE port). The values are obtained when the SmartApplication is set as follows:


Table 8-204 Packet loss ratio in the case of overloading of the EMS2 (48 VC-12s are bound on
the GE port)
(byte) (%)
64 11.41 0.000 0.000
128 10.82 0.000 0.000
256 10.19 0.000 0.000
512 10.20 0.000 0.000
1024 10.20 0.000 0.000
1280 10.20 0.000 0.000
1518 10.20 0.000 0.000
Table 8-205 lists the latency specifications of the EMS2 (three VC-3s is bound on the FE port).
The values are obtained when the SmartApplication is set as follows:


Table 8-205 Latency specifications of the EMS2 (three VC-3s is bound on the FE port)
64 100.00 127.1 127.1 121.9 121.9
128 100.00 144.1 144.1 133.9 133.9
256 100.00 172.2 172.2 151.8 151.8
512 100.00 215.3 215.3 174.4 174.4
1024 100.00 299.8 299.8 217.8 217.8
1280 100.00 341.7 341.7 239.3 239.3
1518 100.00 377.1 377.1 255.7 255.7
Table 8-206 lists the latency specifications of the EMS2 (48 VC-12s are bound on the GE port).


Table 8-206 Latency specifications of the EMS2 (48 VC-12s are bound on the GE port)

64 11.41 657.9 657.9 657.4 657.4
128 10.82 663.9 663.9 662.8 662.8
256 10.19 683.6 683.6 681.6 681.6
512 10.20 717.3 717.3 713.3 713.3
1024 10.20 789.6 789.6 781.5 781.5
1280 10.20 822.1 822.1 811.9 811.9
1518 10.20 846.9 846.9 834.8 834.8
Table 8-207 lists the back-to-back specifications of the EMS2 (three VC-3s is bound on the FE
Table 8-207 Back-to-back specifications of the EMS2 (three VC-3s is bound on the FE port)

64 100.00 297620 297620


128 100.00 168918 168918
256 100.00 90580 90580
512 100.00 46992 46992
1024 100.00 23946 23946
1280 100.00 19230 19230
1518 100.00 16254 16254
Table 8-208 lists the back-to-back specifications of the EMS2 (48 VC-12s are bound on the GE
Table 8-208 Back-to-back specifications of the EMS2 (48 VC-12s are bound on the GE port)
64 11.41 339674 679348
128 10.82 182748 365496
256 10.19 92320 184640
512 10.20 47930 95860
1024 10.20 24424 48848
1280 10.20 19610 39220
1518 10.20 16576 33152

Laser Safety Class

The mechanical specifications of the EMS2 are as follows:

l Weight (kg): 0.8
Power Consumption
The maximum power consumption of the EMS2 at room temperature (25°C) is 40 W.
8.11 EMS4

8.11.2 Application
8.11.5 Front Panel
8.11.7 Valid Slots
normally.
8.11.8 Feature Code
The EMS4 supports the BPS, PPS, and distributed link aggregation group (DLAG) protection.

consumption.

8.11.2 Application

NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and
NOTE

Table 8-209 provides the functions and features of the EMS4.
Table 8-209 Functions and features of the EMS4

Function and Feature EMS4
Basic functions Accesses and processes 4xGE services

Processes 16xFE services.
Supports point-to-multipoint convergence services.

Functions when being l Accesses 16xFE signals through the electrical interface when
used with the interface the EMS4 is used with the ETF8.
l Accesses 8xFE signals through the electrical interface and
8xFE signals through the optical interface when the EMS4 is
used with the ETF8 and EFF8.

function in compliance with IEEE 802.3z. The optical
interfaces use the SFP optical module and support hot
swapping. When the multi-mode optical fiber is used, the
maximum transmission distance is 550 m. When the single-
mode optical fiber is used, the maximum transmission distance
is 10 km. The optical modules that can meet different
requirements for the transmission distance such as 40 km and
80 km can also be used.
l Supports the 1000BASE-T RJ-45 Ethernet electrical interface.
The electrical interface supports the auto-negotiation function.
The negotiated rate can be 10 Mbit/s, 100 Mbit/s, or. 1000
Mbit/s. The EMS4 uses the SFP electrical interface and
supports hot swapping. The maximum transmission distance
is 100 m.
l Supports 10BASE-T/100BASE-TX signals when the EMS4
is used with the ETF8 and supports 100BASE-FX signals
when the EMS4 is used with the EFF8.
l The optical interfaces comply with IEEE 802.3u.
Format of service frames l Supports Ethernet II, IEEE 802.3, IEEE 802.1q/p formats.
l Supports the frame with a length ranging from 64 bytes to 9216
bytes.
Maximum uplink 2.5 Gbit/s.

bandwidth
Bound bandwidth 16xVC-4, or 48xVC-3, or 1008xVC-12
Number of supported 64
VCTRUNKs
Mapping granularities Supports the following virtual concatenation granularities:

VC-12, VC-3, VC-4, VC12-Xv (X≤64), VC3-Xv (X≤24), and
VC4-Xv (X≤8).
Encapsulation format Supports the GFP-F, LAPS, and HDLG protocols.


through IP ports.
through VCTRUNKs.
EPLAN services l Supports the Layer 2 forwarding function.

l Supports the blacklist that can contain 512 records and also
the static MAC address table that can contain 512 records. The
blacklist function supports verification of destination MAC
addresses only.
capacity of the MAC address table is 128K. The aging time of
the MAC address can be set and queried.
maximum number of supported VBs is 2.
l Supports the EPLAN services that are based on the IEEE
802.1d MAC bridge.

802.1q virtual bridge and IEEE 802.1ad provider bridge.
VLAN l Supports VLAN and QinQ, and supports the addition,

deletion, and exchanging of VLAN tags. The function
complies with IEEE 802.1q/p.
l Supports 4096 S-VLANs (0–4095) and 4096 C-VLANs (0–
4095) in the case of QinQ services.
l Supports 4095 VLANs (1–4095) in the case of EVPL services.
Multiple Spanning Tree Supports the MSTP.

Protocol (MSTP)

Link aggregation Supports manual link aggregation and static link aggregation.
function
Inter-board link Supports inter-board link aggregation.

aggregation
IGMP snooping function Supports the IGMP snooping function and the IGMP snooping
fast-leave function.
ETH-OAM function Supports CC for the multicast service, LB test for the unicast
service, remote loopback, auto-negotiation, LD, fault diagnosis,
and link performance detection. The ETH-OAM function
complies with IEEE 802.1ag and IEEE 802.3ah.

l Supports the flow classification based on PORT, PORT
+VLAN, or PORT+SVLAN.
LCAS function Dynamically increases or decreases the bandwidth and protects

the bandwidth in compliance with ITU-T G.7042.
IEEE 802.3x.

(IEEE 1588 V2)
Loopback function Supports inloops on Ethernet ports (at the PHY layer).
Protection schemes Supports the following protection schemes at the Ethernet

network level:
l BPS/PPS/DLAG
l STP/RSTP
l LCAS
l LPT
l LAG
l MSTP
Ethernet performance Supports RMON of the Ethernet performance of Ethernet ports

monitoring and VCTRUNKs.
Alarms and performance Reports various alarms and performance events, which facilitates
events management and maintenance of the equipment.


Figure 8-56 shows the functional block diagram of the EMS4 by describing how to process
1xGE/FE signals.
Figure 8-56 Functional block diagram of the EMS4

Backplane
ENCP
Cross-connect unit
VCP
GE/FE Ethernet
DENCP
module Data module
Cross-connect unit
Laser
shutdown LOS
Communication
Logic and SCC unit
SCC unit
+3.3 V Fuse
Power -48 V/-60 V
module
50 77 125 155
MHz MHz MHz MHz




l WFQ
l Four CoSs
Mapping Module
HDLC format. The concatenation is performed. The LCAS function is supported. Then, the


functions:


Clock Module
Power Module
require.
8.11.5 Front Panel


optical interface.

Figure 8-57 Front panel of the EMS4 that is installed with the GE optical interface
EMS4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EMS4
electrical interface.

Figure 8-58 Front panel of the EMS4 that is installed with the GE electrical interface
EMS4
STAT
ACT
PROG
SRV
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EMS4
Indicators

Interfaces
The front panel of the EMS4 has four interfaces. Table 8-210 describes the types and usage of
the optical interfaces of the EMS4. When the EMS4 is installed with the electrical interfaces,
the four GE electrical interfaces are of the same type and have the same usage. Table 8-211
describes the types and usage of the electrical interfaces of the EMS4.
Table 8-210 Optical interfaces of the EMS4

Interface

signals.

signals.

signals.

signals.
Table 8-211 Electrical interfaces of the EMS4

Interface

(swappable)
Table 8-212 provides the pin assignments of the RJ-45 interface of the EMS4.
Table 8-212 Pin assignments of the RJ-45 interface of the EMS4

Pin Description
1 BI_DA+
2 BI_DA–
3 BI_DB+
4 BI_DC+
5 BI_DC–
6 BI_DB–
7 BI_DD+
8 BI_DD–


8.11.7 Valid Slots

normally.
NOTE
l Slot bandwidth
l Board version
The EMS4 can be used with the ETF8 and EFF8.

The EMS4 can be installed in slots 5–8 and 11–13 in the subrack. The slots valid for the EMS4
vary with the bandwidth and cross-connect capacity of the subrack.
11–13. When the EMS4 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When
the EMS4 is installed in slots 7, 8, 11, and 12, the bandwidth is 2.5 Gbit/s. When the EMS4
Table 8-213 lists the slots valid for the EMS4 and the corresponding slots for the ETF8 and
EFF8.
Table 8-213 Slots valid for the EMS4 and the corresponding slots for the ETF8 and EFF8
Slot Valid for the EMS4 Corresponding Slots for the ETF8 and EFF8

8.11.8 Feature Code

Table 8-214 provides the relationship between the feature code of the EMS4 and the type of
interface.
Table 8-214 Relationship between the feature code of the EMS4 and the type of interface
SSN1EMS410 10 1000BASE-LX (0.5 km)
SSN1EMS411 11 1000BASE-SX (10 km)
SSN1EMS412 12 1000BASE-VX (40 km)
SSN1EMS413 13 1000BASE-ZX (80 km)
SSN1EMS414 14 1000BASE-T (100 m)

The EMS4 supports the BPS, PPS, and distributed link aggregation group (DLAG) protection.
When the BPS protection is provided for the EMS4, the GE and FE ports are protected by using
the single-fed and selective-receiving scheme. The EMS4 has four GE ports and 16 FE ports
and hence may be connected to many sets of communication equipment. Normally, the active
board is working and services are transmitted in two directions of the active link. On the standby
link, the EMS4 disables the transmission of all ports. In this case, the ports of the opposite board
are in the link-down state. In addition, the opposite board enables the transmission but does not
transmit services. In this manner, the receive ports of the standby EMS4 are not in the link-down
state. The solid lines in Figure 8-59 show how the EMS4 normally works.

Figure 8-59 Normal working of the EMS4
Active
communication
No.1 equipment
A
Active
Standby
EMS4 communication
No.2 equipment
No.3
Active
communication
equipment
XCS
B
Standby
No.1 communication
equipment
No.2
Standby Active
EMS4 No.3 communication
equipment
C
Standby
communication
equipment
l BPS Protection
When the BPS protection is provided, if the active board detects the link-down state of any link,
any fault in the board, or the offline state of any board, the cross-connect board switches all the
services to the standby board. In this manner, services are protected. The solid lines in Figure
8-60 show how the BPS protection functions. The services numbered 1, 2 and 3 are all switched
to the standby EMS4 and the corresponding communication equipment.

Figure 8-60 Principle of the BPS protection for the EMS4
Active
communication
No.1 equipment
A
Active
Standby
EMS4 communication
No.2 equipment
No.3
Active
communication
equipment
XCS
B
Standby
No.1 communication
equipment
No.2
Standby Active
equipment
C
Standby
communication
equipment
l PPS Protection
When the PPS protection is provided, if the active board detects the link-down state of any link,
the cross-connect board switches all the services to the standby board. In this manner, services
are protected. The solid lines in Figure 8-61 show how the PPS protection functions. Only the
service numbered 1 is switched to the standby EMS4 and the standby communication equipment.

Figure 8-61 Principle of the PPS protection for the EMS4
Active
communication
No.1 equipment
A
Active
Standby
EMS4 communication
No.2 equipment
No.3
Active
communication
equipment
XCS
B
Standby
No.1 communication
equipment
No.2
Standby Active
equipment
C
Standby
communication
equipment
NOTE
In the case of the PPS, when a link failure occurs on a port, only the link services on the port are switched
generally. If the services of two ports are associated, for example, the services of port IP1 and port IP2 are
converged into the same VCTRUNK, port IP1 and port IP2 are defined as associated ports. When one port
of the associated ports is faulty, the services of the entire associated port group are switched.
l DLAG Protection
The DLAG is a group where the two mapping ports on two identical boards are aggregated to
from a protection group, thus providing 1+1 protection for the ports. By default, the port on the
active board is working, and the port on the standby board is protecting the working port.
When the DLAG is configured, the cross-connect board switches all services from the active
board to the standby board if the active board detects a link failure on a port, a board offline
event, or a board hardware failure. As shown in Figure 8-62, the services carried on port 1 are
switched to port 1 of the standby EMS4 and the associated equipment.

Figure 8-62 Principle of the DLAG protection for the EMS4
PORT1 1#
Active
communication
Active PORT2 equipment
EMS4 PORT3 A
Standby
communication
2# equipment
VCG
3#
Active
XCS
communication
equipment
1#
B
Standby
communication
VCG equipment
2#
PORT1
Standby PORT2
EMS4
PORT3 Active
communication
3#
C equipment
Standby
communication
equipment
WARNING
When the board-level BPS/PPS protection is performed, the FE ports support only the 100M
full-duplex mode and the GE optical ports support the auto-negotiation and 1000M full-duplex
mode.
Board Configuration
Two EMS4 boards should be configured on an NE to provide the board-level protection. One
EMS4 is the active board and the other is the standby board. When you configure the EMS4
board protection, ensure that the access capacity of the slot that houses the standby board must
not be less than the access capacity of the slot that houses the active board.



matches the board.
is correct.
----End

NOTE
a LAG.
----End


Channels.
----End

Boards.
----End

You can configure the following Ethernet functions for the EMS4 by using the U2000:
l LCAS
l LPT
l LAG
l ETH-OAM
l Test Frame
l STP/RSTP
l MSTP
l IGMP Snooping

You can set the following main parameters for the EMS4 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.


Troubleshooting
Table 8-215 lists the faults that occur on the EMS4 frequently and the troubleshooting methods.
Table 8-215 Methods used to troubleshoot the faults that occur on the EMS4 frequently


interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EMS4, see Replacing an Ethernet Board.


8.11.14.1 N1EMS4
B3_SD_VC4 ALM_GFP_dCSF ALM_GFP_dLFD
AU_AIS AU_LOP B3_EXC_VC3
B3_EXC_VC4 B3_SD_VC3 BD_STATUS
BIP_EXC BIP_SD BOOTROM_BAD
COMMUN_FAIL ETH_LOS ETHOAM_RMT_LOOP
ETHOAM_DISCOVER_FA ETHOAM_RMT_CRIT_FA EX_ETHOAM_CC_LOS

IL ULT
EX_ETHOAM_MPID_CNF ETHOAM_RMT_SD FPGA_ABN

LCT
HARD_BAD FLOW_OVER HP_LOM
HP_RDI HP_CROSSTR HP_SLM
HP_TIM HP_REI LASER_MOD_ERR
LCAS_PLCR HP_UNEQ LCAS_TLCR
LCAS_TLCT LCAS_PLCT LOOP_ALM
LP_CROSSTR LINK_ERR LP_RDI_VC3
LP_REI LP_RDI LP_SLM
LP_SLM_VC3 LP_REI_VC3 LP_TIM_VC3
LP_UNEQ LP_TIM LPT_RFI
LSR_NO_FITED LP_UNEQ_VC3 LTEMP_OVER
NO_BD_SOFT LSR_WILL_DIE SUBCARD_ABN
LAG_PORT_FAIL PATCH_ERR PATCH_NOT_CONFIRM
PATCHFILE_NOTEXIST TD TEMP_OVER
TF TU_AIS TU_AIS_VC3
TU_LOP TU_LOP_VC3 VC3_CROSSTR
VCAT_SQM_VC4 ETH_NO_FLOW VCTRUNK_NO_FLOW

W_R_FAIL TR_LOC T_LOSEX
PORTMODE_MISMATCH ETHOAM_VCG_SELF_LO DLAG_PROTECT_FAIL

OP
ETHOAM_SELF_LOOP MOD_TYPE_MISMATCH PORT_MODULE_OFF-

LINE
IN_PWR_HIGH IN_PWR_LOW OUT_PWR_HIGH
OUT_PWR_LOW SWDL_PKG_NOBDSOFT ETH_CFM_MISMERGE
ETH_CFM_UNEXPERI ETH_CFM_LOC ETH_CFM_RDI

8.11.15.1 N1EMS4
Table 8-216 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS TLBMAX
TLBMIN TLBCUR TPLMAX
TPLMIN TPLCUR RPLMAX
RPLMIN RPLCUR OSPITMPMAX
OSPITMPMIN OSPITMPCUR VC3BBE
XCSTMPCUR XCSTMPMAX XCSTMPMIN

UndersizePkts OversizePkts FCSErrors
LateCollisions DeferredTransmissions
Broadcast Packets Multicast Packets Received Undersize Packets Received

Received(packets) (packets) (packets)
Oversize Packets Received

(packets)
Unicast Packets Received Unicast Packets

(packets) Transmitted(packets) Pause Frames Received(frames)
Pause Frames Transmitted Multicast Packets Broadcast Packets Transmitted

(frames) Transmitted(packets) (packets)

(Byte) (Byte) FCS Errors(frames)

Received(Byte/s) Transmitted(Byte/s)

Full Frame Speed Full Frame Speed


consumption.

Table 8-221 lists the parameters specified for the optical interfaces of the EMS4.

Table 8-221 Parameters specified for the optical interfaces of the EMS4
Parameter Value


LC LC

power range
(dBm)

wavelength range
(nm)
Minimum -3 -3 -3 0
overload (dBm)
Receiver -23 -23 -20 -17

sensitivity (dBm)
Minimum 9 9 9 9
extinction ratio
(dB)

Table 8-222 lists the parameters specified for the electrical interfaces of the EMS4.
Table 8-222 Parameters specified for the electrical interfaces of the EMS4
Laser Safety Class


NOTE
specifications, and back-to-back specifications of the EMS4 board of the N1 version.
the case of overloading, latency specifications, and back-to-back specifications of the EMS4.

Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 8-223 and Table 8-224 list the throughput specifications of the EMS4. Table 8-225 and
Table 8-226 list the packet loss ratio in the case of overloading of the EMS4. Table 8-227 and
Table 8-228 list the latency specifications of the EMS4. Table 8-229 and Table 8-230 list the
back-to-back specifications of the EMS4.
NOTE
are used.
configured and one VC-4 is bound on the FE port, or EPL services are configured and 24 VC-3s are
bound on the GE port.
Table 8-223 lists the throughput specifications of the EMS4 (one VC-4 is bound on the FE port).
l Maximum rate (%): none

Table 8-223 Throughput specifications of the EMS4 (one VC-4 is bound on the FE port)

(Byte) (pks/sec)
64 100.00 148810 148810
128 100.00 84459 84459
256 100.00 45290 45290
512 100.00 23496 23496
1024 100.00 11973 11973
1280 100.00 9615 9615
1518 100.00 8127 8127
Table 8-224 lists the throughput specifications of the EMS4 (24 VC-3s are bound on the GE
Table 8-224 Throughput specifications of the EMS4 (24 VC-3s are bound on the GE port)

(Byte) (pks/sec)
64 100.00 1488095 1488095
128 100.00 844595 844595
256 100.00 452899 452899
512 100.00 234962 234962
1024 100.00 119732 119732
1280 100.00 96154 96154


(Byte) (pks/sec)
1518 100.00 81274 81274
Table 8-225 lists the packet loss ratio in the case of overloading of the EMS4 (one VC-4 is
Table 8-225 Packet loss ratio in the case of overloading of the EMS4 (one VC-4 is bound on
the FE port)

(Byte) (%)
64 100.00 0.000 0.000
128 100.00 0.000 0.000
256 100.00 0.000 0.000
512 100.00 0.000 0.000
1024 100.00 0.000 0.000
1280 100.00 0.000 0.000
1518 100.00 0.000 0.000
Table 8-226 lists the packet loss ratio in the case of overloading of the EMS4 (24 VC-3s are


Table 8-226 Packet loss ratio in the case of overloading of the EMS4 (24 VC-3s are bound on
the GE port)
(Byte) (%)
64 100.00 0.000 0.000
128 100.00 0.000 0.000
256 100.00 0.000 0.000
512 100.00 0.000 0.000
1024 100.00 0.000 0.000
1280 100.00 0.000 0.000
1518 100.00 0.000 0.000
Table 8-227 lists the latency specifications of the EMS4 (one VC-4 is bound on the FE port).


Table 8-227 Latency specifications of the EMS4 (one VC-4 is bound on the FE port)
64 100.00 110.6 110.6 105.5 105.5
128 100.00 123.8 123.8 113.6 113.6
256 100.00 149.2 149.2 128.8 128.8
512 100.00 195.5 195.5 154.6 154.6
1024 100.00 285.6 285.6 203.7 203.7
1280 100.00 344.6 344.6 240.5 240.5
1518 100.00 373.1 373.1 251.7 251.7
Table 8-228 lists the latency specifications of the EMS4 (24 VC-3s are bound on the GE port).


Table 8-228 Latency specifications of the EMS4 (24 VC-3s are bound on the GE port)
64 100.00 80.9 80.9 80.4 80.4
128 100.00 83.0 83.0 82.0 82.0
256 100.00 86.9 86.9 84.9 84.9
512 100.00 94.9 94.9 90.9 90.9
1024 100.00 108.8 108.8 100.7 100.7
1280 100.00 115.2 115.2 105.0 105.0
1518 100.00 120.7 120.7 108.6 108.6
Table 8-229 lists the back-to-back specifications of the EMS4 (one VC-4 is bound on the FE

Table 8-229 Back-to-back specifications of the EMS4 (one VC-4 is bound on the FE port)
Frame Size Rate Tested (%) (01,01,03) to (01,01,06) Total (Number of

(Byte) Burst Size (Number of Frames)
Frames)
64 100.00 1488100 1488100
128 100.00 844590 844590
256 100.00 452900 452900
512 100.00 234960 234960
1024 100.00 119730 119730
1280 100.00 96150 96150
1518 100.00 81270 81270
Table 8-230 lists the back-to-back specifications of the EMS4 (24 VC-3s are bound on the GE
Table 8-230 Back-to-back specifications of the EMS4 (24 VC-3s are bound on the GE port)

Frames)
64 100.00 2976190 2976190
128 100.00 1689190 1689190
256 100.00 905798 905798


Frames)
512 100.00 469924 469924
1024 100.00 239464 239464
1280 100.00 192308 192308
1518 100.00 162548 162548
The mechanical specifications of the EMS4 are as follows:
l Weight (kg): 1.1
Power Consumption
The maximum power consumption of the EMS4 at room temperature (25°C) is 65 W.
8.12 EGS4

The EGS4 is available in three functional versions, namely, N1, N3 and N4. The N1EGS4 and
N3EGS4 are discontinued.
8.12.2 Application
The EGS4 supports the Layer 2 switching, link aggregation, and multicast functions.
8.12.5 Front Panel
8.12.7 Valid Slots
normally.

8.12.8 Feature Code

The EGS4 supports the BPS, PPS, and DLAG protection.
consumption.

The EGS4 is available in three functional versions, namely, N1, N3 and N4. The N1EGS4 and
N3EGS4 are discontinued.
Table 8-231 describes the versions of the EGS4.
Table 8-231 Versions of the EGS4

Item Description
Functional versions The EGS4 is available in three functional versions, namely, N1, N3
and N4.

Item Description
Differences The N1EGS4 supports the binding of a maximum of 1008 VC-12s.

The N3EGS4 and N4EGS4 support the binding of a maximum of 504
VC-12s. The restrictions that exist in the case of the VC-4/VC-3
binding and VC-12 binding are as follows:
l VC-4/VC-3 binding: VC-4s are divided into two areas, namely,
VC-4-1 to VC-4-8 and VC-4-9 to VC-4-16. The VC-4s/VC-3s in
these two areas cannot be bound at one time.
l VC-12 binding: VC-4s are divided into two areas, namely, VC-4-1
to VC-4-4 and VC-4-9 to VC-4-12. The VC-12s in these two areas
cannot be bound at one time.
Substitution The N4EGS4 can substitute for the N3EGS4.
8.12.2 Application

NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and
NOTE

The EGS4 supports the Layer 2 switching, link aggregation, and multicast functions.
Table 8-232 provides the functions and features of the EGS4.
Table 8-232 Functions and features of the EGS4

Function and EGS4
Feature

Supports point-to-multipoint convergence services.
being used with the
interface board

Function and EGS4

Feature

distance is 550 m. When the single-mode optical fiber is used, the
maximum transmission distance is 10 km. The optical modules
that can meet different requirements for the transmission distance
such as 40 km and 80 km can also be used.
l The N1EGS4 and N4EGS4 also support the 1000BASE-T RJ-45
Ethernet electrical interface. The electrical interface supports the
auto-negotiation function. The N1EGS4 supports the negotiated
rate of 1000 Mbit/s and the N4EGS4 supports the negotiated rate
of 10 Mbit/s, 100 Mbit/s, or 1000 Mbit/s. The N1EGS4 and
N4EGS4 use the SFP electrical interface and support hot
swapping. The maximum transmission distance is 100 m.
Format of service l Supports Ethernet II, IEEE 802.3, and IEEE 802.1q/p formats.
bytes.

bandwidth
Bound bandwidth l N1EGS4: 16xVC-4, or 48xVC-3, or 1008xVC-12

l N3EGS4/N4EGS4: 16xVC-4, or 48xVC-3, or 504xVC-12
VCTRUNKs
VC-4s numbered 1-4 and 9-12 of the N3EGS4/N4EGS4 support the
binding of VC-3 and VC-12 paths. The other VC-4s support the
binding of VC-3 paths only.
Mapping Supports the following virtual concatenation granularities: VC-12,

granularities VC-3, VC-4, VC12-Xv (X≤64), VC3-Xv (X≤24), and VC4-Xv
(X≤8).
Encapsulation format Supports the GFP-F, LAPS, and HDLG protocols.

Function and EGS4

Feature

through IP ports.
through VCTRUNKs.
EPLAN services l Supports the Layer 2 forwarding function.

l Supports the blacklist that can contain 512 records and also the
static MAC address table that can contain 512 records. The
blacklist function supports verification of destination MAC
addresses only.
l Supports the creation, deletion, and query of the VB. The EGS4
supports a maximum of two VBs.
MAC bridge.

virtual bridge and IEEE 802.1ad provider bridge.
packets that enter the IP ports is restricted by the pre-set MTU.
VLAN l Supports VLAN and QinQ, and supports the addition, deletion,
and exchanging of VLAN tags. The function complies with IEEE
802.1q/p.
l Supports 4096 S-VLANs (0–4095) and 4096 C-VLANs (0–4095)
in the case of QinQ services.
l Supports 4095 VLANs (1–4095) in the case of EVPL services.
MSTP The N1EGS4 Supports the MSTP.

Function and EGS4

Feature
Link aggregation Supports manual link aggregation and static link aggregation.
function
Inter-board link Supports inter-board link aggregation.

aggregation
IGMP snooping Supports the IGMP snooping function. In addition, the N1EGS4
function supports the IGMP snooping fast-leave function, and the N4EGS4
supports the IGMP snooping fast-leave function and unknown
multicast packet discarding function.
ETH-OAM function l Supports CC for the multicast service, LB test for the unicast
service, and LD.
l Supports the initiation of remote loopbacks, auto-negotiation,
status query in the case of a severe fault in the board, and link
performance detection functions, which comply with IEEE
802.3ah.
l The N4EGS4 supports the LT test function.
QoS function l Supports the CAR. The granularity is 64 kbit/s. The N1EGS4
supports 512 rate modes, and the N3EGS4 and N4EGS4 support
60 rate modes.
l Supports the flow classification based on PORT, PORT+VLAN,
PORT+VLAN+PRI, or PORT+SVLAN.
l The N4EGS4 supports the setting of modes and weights for
scheduling queues.
LPT function Supports the P2P LPT and the P2MP LPT.
Flow control Supports the port-based flow control function that complies with

(IEEE 1588 V2)
Port mirroring The N4EGS4 supports ingress mirroring.
Loopback function Supports inloops on Ethernet ports (at the PHY layer).

Function and EGS4

Feature
Protection schemes Supports the following protection schemes at the Ethernet equipment
level and network level:
l BPS/PPS/DLAG
l STP/RSTP
l MSTP
l LCAS
l LPT
l LAG
l The N4EGS4 supports Data DNI Protection
Ethernet Supports RMON of the Ethernet performance of Ethernet ports and

performance VCTRUNKs.
monitoring
Alarms and Reports various alarms and performance events, which facilitates
Response to the ping Supports the setting and query of the board IP address (supported by
command the N4EGS4 only).

Figure 8-65 shows the functional block diagram of the EGS4 by describing how to process
1xGE signals.

Figure 8-65 Functional block diagram of the EGS4

Backplane
ENCP
Cross-connect unit
VCP
GE Ethernet
DENCP
module Data module
Cross-connect unit
Laser
shutdown LOS
Communication
Logic and SCC unit
SCC unit
+3.3 V Fuse
Power -48 V/-60 V
module
50 77 125 155
MHz MHz MHz MHz





l WFQ
l Three CoSs
Mapping Module
HDLC format. The concatenation is processed. The LCAS function is supported. Then, the


The control module also contains basic logic units. This module has the following functions:
Clock Module
Power Module
require.

8.12.5 Front Panel


Figure 8-66 shows the appearance of the front panel of the N1EGS4/N3EGS4/N4EGS4 that is
installed with the optical interface.
Figure 8-66 Front panel of the N1EGS4/N3EGS4/N4EGS4 that is installed with the optical
interface
EGS4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EGS4
The N1EGS4/N4EGS4 can also be installed with the GE electrical interface. Figure 8-67 shows
the appearance of the front panel of the N1EGS4/N4EGS4 that is installed with the GE electrical
interface.

Figure 8-67 front panel of the N1EGS4/N4EGS4 that is installed with the GE electrical interface
EGS4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
LINK ACT
1
2
3
4
EGS4
Indicators

Interfaces
The front panel of the N1EGS4/N3EGS4/N4EGS4 has four GE optical interfaces. Table
8-233 describes the types and usage of the optical interfaces of the N1EGS4/N3EGS4/N4EGS4.
Table 8-233 Optical interfaces of the N1EGS4/N3EGS4/N4EGS4

Interface

signals.

signals.

signals.

signals.
The four GE electrical interfaces of the N1EGS4/N4EGS4 are of the same type and have the
same usage. Table 8-234 describes the types and usage of the electrical interfaces of the
N1EGS4/N4EGS4.
Table 8-234 Electrical interfaces of the N1EGS4/N4EGS4

Interface

(swappable)
Table 8-235 provides the pin assignments of the RJ-45 interface of the N1EGS4/N4EGS4.
Table 8-235 Pin assignments of the RJ-45 interface of the N1EGS4/N4EGS4
Pin Description
1 BI_DA+
2 BI_DA–
3 BI_DB+
4 BI_DC+
5 BI_DC–
6 BI_DB–

Pin Description
7 BI_DD+
8 BI_DD–

8.12.7 Valid Slots

normally.
NOTE
l Slot bandwidth
l Board version
The EGS4 can be installed in slots 5–8 and 11–13 in the subrack. The relation between the slots
valid for the EGS4 and the bandwidth is as follows:
l When the cross-connect capacity is 20 Gbit/s, the EGS4 can be installed in slots 5–8 and
11–13. When the EGS4 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When the
EGS4 is installed in slots 7, 8, 11, and 12, the bandwidth is 2.5 Gbit/s. When the EGS4 is
installed in slot 13, the bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the EGS4 can be installed in slots 5–8 and
8.12.8 Feature Code

Table 8-236 provides the relationship between the feature code of the EGS4 and the type of
interface.
Table 8-236 Relationship between the feature code of the EGS4 and the type of interface
SSN1EGS410, 10 1000BASE-SX (0.5 km)

SSN3EGS410, and
SSN4EGS10
SSN1EGS411, 11 1000BASE-LX (10 km)

SSN3EGS411, and
SSN4EGS411

SSN1EGS412, 12 1000BASE-VX (40 km)

SSN3EGS412, and
SSN4EGS412
SSN1EGS413, 13 1000BASE-ZX (80 km)

SSN3EGS413, and
SSN4EGS413
SSN1EGS414 and 14 1000BASE-T (100 m)

SSN4EGS414

The EGS4 supports the BPS, PPS, and DLAG protection.
When the BPS protection is provided for the EGS4, the GE and FE ports are protected by using
the single-fed and selective-receiving scheme. The EGS4 may be connected to many sets of
communication equipment. Normally, the active board is working and services are transmitted
in two directions of the active link. On the standby link, the EGS4 disables the transmission of
all ports. In this case, the ports of the opposite board are in the link-down state. In addition, the
opposite board enables the transmission but does not transmit services. In this manner, the
receive ports of the standby EGS4 are not in the link-down state. The solid lines in Figure
8-68 show how the EGS4 normally works.

Figure 8-68 Normal working of the EGS4
Active
communication
No.1 equipment
A
Active Standby
EGS4 communication
No.2 equipment
No.3
Active
communication
equipment
XCS
B
Standby
No.1 communication
equipment
No.2
Standby
Active
EGS4 No.3 communication
equipment
C
Standby
communication
equipment
l BPS Protection
When the BPS protection is provided, if the active board detects the link-down state of any link,
any fault in the board, or the offline state of any board, the cross-connect board switches all the
services to the standby board. In this manner, services are protected. The solid lines in Figure
8-69 show how the BPS protection functions. The services numbered 1, 2 and 3 are all switched
to the standby EGS4 and the corresponding communication equipment.

Figure 8-69 Principle of the BPS protection for the EGS4
Active
communication
No.1 equipment
A
Active
Standby
EGS4 communication
No.2 equipment
No.3
Active
communication
equipment
XCS
B
Standby
No.1 communication
equipment
No.2
Standby Active
equipment
C
Standby
communication
equipment
l PPS Protection
When the PPS protection is provided, if the active board detects the link-down state of any link,
the cross-connect board switches all the services to the standby board. In this manner, services
are protected. The solid lines in Figure 8-70 show how the PPS protection functions. Only the
service numbered 1 is switched to the standby EGS4 and the standby communication equipment.

Figure 8-70 Principle of the PPS protection for the EGS4
Active
communication
No.1 equipment
A
Active Standby
EGS4 communication
No.2 equipment
No.3
Active
communication
equipment
XCS
B
Standby
No.1 communication
equipment
No.2
Standby Active
equipment
C
Standby
communication
equipment
NOTE
In the case of the PPS, when a link failure occurs on a port, only the link services on the port are switched
generally. If the services of two ports are associated, for example, the services of port IP1 and port IP2 are
converged into the same VCTRUNK, port IP1 and port IP2 are defined as associated ports. When one port
of the associated ports is faulty, the services of the entire associated port group are switched.
l DLAG Protection
The DLAG is a group where the two mapping ports on two identical boards are aggregated to
from a protection group, thus providing 1+1 protection for the ports. By default, the port on the
active board is working, and the port on the standby board is protecting the working port.
When the DLAG is configured, the cross-connect board switches all services from the active
board to the standby board if the active board detects a link failure on a port, a board offline
event, or a board hardware failure. As shown in Figure 8-71, the services carried on port 1 are
switched to port 1 of the standby EGS4 and the associated equipment.

Figure 8-71 Principle of the DLAG protection for the EGS4
PORT1 1#
Active
communication
Active PORT2 equipment
EGS4 PORT3 A
Standby
communication
2# equipment
VCG
3#
Active
XCS communication
equipment
1#
B
Standby
communication
VCG equipment
2#
PORT1
Standby PORT2
EGS4
PORT3 Active
communication
3#
C equipment
Standby
communication
equipment
WARNING
When the board-level protection is performed, the GE optical ports support the auto-negotiation
and 1000M full-duplex mode.
Board Configuration
Two EGS4 boards should be configured on an NE to provide the board-level protection. One
EGS4 is the active board and the other is the standby board. When you configure the EGS4 board
protection, ensure that the access capacity of the slot that houses the standby board must not be
less than the access capacity of the slot that houses the active board.



matches the board.
is correct.
----End


NOTE
a LAG.
----End


Channels.
----End

Boards.
----End

You can configure the following Ethernet functions for the EGS4 by using the U2000:
l LCAS
l LPT
l LAG
l ETH-OAM
l Test Frame
l STP/RSTP
l IGMP Snooping
l MSTP
l Data DNI Protection

You can set the following main parameters for the EGS4 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.


Troubleshooting
Table 8-237 lists the faults that occur on the EGS4 frequently and the troubleshooting methods.
Table 8-237 Methods used to troubleshoot the faults that occur on the EGS4 frequently


interrupted.
abnormal.

duplex mode.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EGS4, see Replacing an Ethernet Board.


8.12.14.1 N1EGS4
ALM_GFP_dCSF ALM_GFP_dLFD ETHOAM_RMT_SD
B3_SD_VC4 B3_EXC_VC4 B3_SD_VC3
BIP_SD BD_STATUS BIP_EXC
ETH_LOS BOOTROM_BAD COMMUN_FAIL
FLOW_OVER EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNF

LCT
HP_CROSSTR FPGA_ABN HARD_BAD
LCAS_PLCT LASER_MOD_ERR LCAS_PLCR
LINK_ERR LCAS_TLCR LCAS_TLCT
LP_RDI LOOP_ALM LP_CROSSTR
LP_REI_VC3 LP_RDI_VC3 LP_REI
LP_TIM LP_SLM LP_SLM_VC3
LP_UNEQ_VC3 LP_TIM_VC3 LP_UNEQ
LSR_WILL_DIE LPT_RFI LSR_NO_FITED
OUT_PWR_HIGH LTEMP_OVER NO_BD_SOFT
IN_PWR_LOW OUT_PWR_LOW IN_PWR_HIGH
TD ETHOAM_DISCOVER_FAIL ETHOAM_RMT_CRIT_FA
ULT
TU_AIS TEMP_OVER TF
TU_LOP_VC3 TU_AIS_VC3 TU_LOP
VCAT_LOM_VC12 VC3_CROSSTR VCAT_LOA
VCAT_SQM_VC12 VCAT_LOM_VC3 VCAT_LOM_VC4
VCAT_SQM_VC3 VCAT_SQM_VC4 ETHOAM_RMT_LOOP
W_R_FAIL ETH_NO_FLOW VCTRUNK_NO_FLOW

TR_LOC T_LOSEX LAG_PORT_FAIL
ETHOAM_SELF_LOOP ETHOAM_VCG_SELF_LOO DLAG_PROTECT_FAIL

P
MOD_TYPE_MIS- PORT_MODULE_OFFLINE SWDL_PKG_NOBDSOFT

MATCH
ETH_CFM_MISMERGE ETH_CFM_UNEXPERI ETH_CFM_LOC
ETH_CFM_RDI
8.12.14.2 N3EGS4
ALM_GFP_dCSF ALM_GFP_dLFD ETHOAM_RMT_SD
B3_SD_VC4 B3_EXC_VC4 B3_SD_VC3
BIP_SD BD_STATUS BIP_EXC
ETH_LOS BOOTROM_BAD COMMUN_FAIL
FLOW_OVER EX_ETHOAM_CC_LOS EX_ETHOAM_MPID_CNFL

CT
HP_CROSSTR FPGA_ABN HARD_BAD
LCAS_PLCT LASER_MOD_ERR LCAS_PLCR
LINK_ERR LCAS_TLCR LCAS_TLCT
LP_RDI LOOP_ALM LP_CROSSTR
LP_REI_VC3 LP_RDI_VC3 LP_REI
LP_TIM LP_SLM LP_SLM_VC3
LP_UNEQ_VC3 LP_TIM_VC3 LP_UNEQ
LSR_WILL_DIE LPT_RFI LSR_NO_FITED
OUT_PWR_HIGH LTEMP_OVER NO_BD_SOFT
IN_PWR_LOW OUT_PWR_LOW IN_PWR_HIGH
TD ETHOAM_DISCOVER_F ETHOAM_RMT_CRIT_FAU
AIL LT
TU_AIS TEMP_OVER TF

TU_LOP_VC3 TU_AIS_VC3 TU_LOP
VCAT_LOM_VC12 VC3_CROSSTR VCAT_LOA
VCAT_SQM_VC12 VCAT_LOM_VC3 VCAT_LOM_VC4
VCAT_SQM_VC3 VCAT_SQM_VC4 ETHOAM_RMT_LOOP
W_R_FAIL DLAG_PROTECT_FAIL VCTRUNK_NO_FLOW
ETHOAM_SELF_LOOP ETHOAM_VCG_SELF_L ETH_NO_FLOW

OOP
LAG_PORT_FAIL T_LOSEX TR_LOC
SWDL_PKG_NOBD-
SOFT
8.12.14.3 N4EGS4
ALM_GFP_dCSF ALM_GFP_dLFD AU_AIS
AU_LOP B3_EXC_VC3 B3_EXC_VC4
B3_SD_VC3 B3_SD_VC4 BD_STATUS
BIP_EXC BIP_SD BOOTROM_BAD
COMMUN_FAIL DLAG_PROTECT_FAIL ETH_CFM_LOC
ETH_LOS ETH_NO_FLOW ETHOAM_DISCOVER_FA

IL

ULT

OOP

LCT
FPGA_ABN HARD_BAD HP_CROSSTR
HP_LOM HP_RDI HP_REI
HP_SLM HP_TIM HP_UNEQ
IN_PWR_HIGH IN_PWR_LOW LAG_PORT_FAIL

LP_CROSSTR LP_RDI LP_RDI_VC3
LP_REI LP_REI_VC3 LP_SLM
LP_SLM_VC3 LP_TIM LP_TIM_VC3
LP_UNEQ LP_UNEQ_VC3 LPT_RFI
LSR_NO_FITED LSR_WILL_DIE LTEMP_OVER
MOD_TYPE_MISMATCH NO_BD_SOFT OUT_PWR_HIGH
OUT_PWR_LOW PORT_MODULE_OFF- T_LOSEX

LINE
TD TEMP_OVER TF
TR_LOC TU_AIS TU_AIS_VC3
TU_LOP TU_LOP_VC3 VC3_CROSSTR
VCAT_SQM_VC4 VCTRUNK_NO_FLOW W_R_FAIL

8.12.15.1 N1EGS4
Table 8-238 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS TLBMAX
TPLMIN RPLMAX RPLMIN
RPLCUR TPLCUR OSPITMPMAX




(packets)








8.12.15.2 N3EGS4
Table 8-243 SDH

HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
LPSES LPUAS TLBMAX
TPLMIN RPLMAX RPLMIN
RPLCUR TPLCUR OSPITMPMAX



(packets)







8.12.15.3 N4EGS4
Table 8-248 SDH
HPBBE HPCSES HPES
HPUAS LPBBE LPCSES
TPLMAX TPLMIN VC3BBE



(packets) Drop Events(times/s)








In the case of the N1EGS4, there is no restriction. In the case of the N3EGS4 and N4EGS4, the
known restrictions are as follows:
l Number of supported VC-12s: 504
l In the case of VC-4/VC-3 binding, VC-4s are divided into two sections, namely, VC-4s
numbered 1–8 and VC-4s numbered 9–16. The VC-4s/VC-3s that are not in the same
section must not be bound with a VCTRUNK.
l In the case of VC-12 binding, VC-12s are divided into two sections, namely, VC-12s
numbered 1–4 and VC-12s numbered 9–12. The VC-12s that are not in the same section
must not be bound with a VCTRUNK.

consumption.

Table 8-253 lists the parameters specified for the optical interfaces of the EGS4.
Table 8-253 Parameters specified for the optical interfaces of the EGS4
Parameter Value


LC LC

power range
(dBm)

wavelength range
(nm)
Minimum -3 -3 -3 0
overload (dBm)
Receiver -23 -23 -20 -17

sensitivity (dBm)
Minimum 9 9 9 9
extinction ratio
(dB)

Table 8-254 lists the parameters specified for the electrical interfaces of the EGS4.

Table 8-254 Parameters specified for the electrical interfaces of the EGS4
Type of Electrical Code Pattern
Interface
WARNING
Only the EGS4 boards of the N1 and N4 versions support the GE electrical interfaces.
Laser Safety Class


NOTE
Tested Tested
Port 1 Port 2
Data network
performance
analyzer

NOTE
are used.
configured 24 VC-3s are bound on the GE port.

(Byte) (pks/sec)
64 100.00 1488095 1488095
128 100.00 844595 844595
256 100.00 452899 452899
512 100.00 234962 234962
1024 100.00 119732 119732
1280 100.00 96154 96154
1518 100.00 81274 81274

(Byte) (%)
64 100.00 0.000 0.000
128 100.00 0.000 0.000
256 100.00 0.000 0.000
512 100.00 0.000 0.000
1024 100.00 0.000 0.000
1280 100.00 0.000 0.000
1518 100.00 0.000 0.000



64 100.00 80.9 80.9 80.4 80.4
128 100.00 83.0 83.0 82.0 82.0
256 100.00 86.9 86.9 84.9 84.9
512 100.00 94.9 94.9 90.9 90.9
1024 100.00 108.8 108.8 100.7 100.7
1280 100.00 115.2 115.2 105.0 105.0
1518 100.00 120.7 120.7 108.6 108.6


Frames)
64 100.00 2976190 2976190
128 100.00 1689190 1689190
256 100.00 905798 905798
512 100.00 469924 469924
1024 100.00 239464 239464
1280 100.00 192308 192308
1518 100.00 162548 162548
NOTE
Tested Tested
Port 1 Port 2
Data network
performance
analyzer

NOTE
are used.
configured and one VC-4 are bound on the GE port.

(byte) (pks/sec)
64 16.54 246063 492126
128 15.81 133547 267094
256 15.40 69754 139508
512 15.20 35714 71428
1024 15.10 18074 36148
1280 15.07 14488 28976
1518 15.06 12238 24476

(byte) (%)
64 16.54 0.000 0.000
128 15.81 0.000 0.000
256 15.40 0.000 0.000
512 15.20 0.000 0.000
1024 15.10 0.000 0.000
1280 15.07 0.000 0.000
1518 15.06 0.000 0.000



64 16.54 103.3 103.3 102.8 102.8
128 15.81 115.2 115.2 114.2 114.2
256 15.40 126.7 126.7 124.7 124.7
512 15.20 154.4 154.4 150.4 150.4
1024 15.10 3721.4 3721.4 3713.3 3713.3
1280 15.07 223.9 223.9 213.7 213.7
1518 15.06 3447.5 3447.5 3435.4 3435.4


64 16.54 7381890 14763780
128 15.81 4006410 8012820
256 15.40 2092620 4185240
512 15.20 1071420 2142840
1024 15.10 542220 1084440
1280 15.07 434640 869280
1518 15.06 367140 734280
The mechanical specifications of the EGS4 are as follows:
l Weight of the N1EGS4 or N3EGS4 (kg): 1.1
Power Consumption
The maximum power consumption of the N1EGS4 and N3EGS4 at room temperature (25°C) is
70 W.
8.13 EFF8
technical specifications of the EFF8 (8x100M Ethernet optical interface board).

The EFF8 is available in one functional version, namely, N1.
8.13.2 Application
The EFF8 is an Ethernet optical interface board. The EFF8 can be used on the OptiX OSN
equipment series to transmit and receive 100M Ethernet optical signals for the data board.
The EFF8 receives and transmits 8x100M Ethernet optical signals. The EFF8 must work with
the Ethernet processing board.
The EFF8 consists of the interface module and power module.
8.13.5 Front Panel

The front panel of the EFF8 has indicators, interfaces, a bar code, and a laser safety class label.
8.13.6 Valid Slots
The EFF8 can be installed in slots 3, 15 and 17 in the subrack and works as the interface board
of the EFP0, EFT8, EFS0 or EMR0. The EFF8 can be installed in slots 1–4, 15–18 in the subrack
and works as the interface board of the EMS4.
The technical specifications of the EFF8 include the parameters specified for optical interfaces,

The EFF8 is available in one functional version, namely, N1.
8.13.2 Application
The EFF8 is an Ethernet optical interface board. The EFF8 can be used on the OptiX OSN

The EFF8 receives and transmits 8x100M Ethernet optical signals. The EFF8 must work with
NOTE
The EFF8 supports the single-fiber bidirectional optical module, and the single-fiber bidirectional optical
module does not support loopbacks at the optical interface by using fiber jumpers.

The EFF8 consists of the interface module and power module.
Figure 8-74 shows the functional block diagram of the EFF8 by describing how to process 1x100
Mbit/s Ethernet signals.
Figure 8-74 Functional block diagram of the EFF8

Backplane
100 Mbit/s
EFT8/EFS0/EMS4/EMR0
Ethernet signal
Interface
module
100 Mbit/s
Ethernet signal EFT8/EFS0/EMS4/EMR0
+3.3 V Power Fuse

+3.3 V backup power
module

Interface Module
In the receive direction, the interface module performs O/E conversion for the Ethernet signals
and transmits the signals to the EFT8, EFS0, EMS4, or EMR0.
In the transmit direction, the interface module performs E/O conversion for the Ethernet signals
and transmits the signals to the optical interface.
Power Module
The power module provides all the modules of the EFF8 with the required DC voltages.
8.13.5 Front Panel

The front panel of the EFF8 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 8-75 shows the appearance of the front panel of the EFF8.

Figure 8-75 Front panel of the EFF8
EFF8
1
2
3
4
5
6
7
8
LINK ACT OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
OUT5 IN5
OUT6 IN6
OUT7 IN7
OUT8 IN8
CLASS 1
LASER
PRODUCT
EFF8
Indicators
l Eight connection status indicators (LINK) – one color (green)

l Eight data receiving and transmission indicators (ACT) – one color (orange)
Interfaces
The front panel of the EFF8 has eight optical interfaces.
Table 8-263 describes the types and usage of the interfaces of the EFF8.

Table 8-263 Interfaces of the EFF8

Interface
IN1–IN8 LC Receives the 1st to the 8th channels of Ethernet

optical signals.
OUT1–OUT8 LC Transmits the 1st to the 8th channels of Ethernet

optical signals.
8.13.6 Valid Slots

The EFF8 can be installed in slots 3, 15 and 17 in the subrack and works as the interface board
of the EFP0, EFT8, EFS0 or EMR0. The EFF8 can be installed in slots 1–4, 15–18 in the subrack
and works as the interface board of the EMS4.
Table 8-264 lists the slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots
for the EFF8.
Table 8-264 Slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots for the
EFF8
Slot Valid for the EFT8/EFS0/ Corresponding Slot for the EFF8
EMR0/EFP0
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17
Table 8-265 lists the slots valid for the EMS4 and the corresponding slots for the EFF8.
Table 8-265 Slots valid for the EMS4 and the corresponding slots for the EFF8
Slot Valid for the EMS4 Corresponding Slot for the EFF8


The technical specifications of the EFF8 include the parameters specified for optical interfaces,

Table 8-266 lists the parameters specified for the optical interfaces of the EFF8.
Table 8-266 Parameters specified for the optical interfaces of the EFF8
Parameter Value
Line code pattern Manchester encoding signal (10M) or MLT-3 encoding signal
(100M)
Type of optical 100BASE-FX

interface
Operating 100BASE-FX (15 km): 1261 to 1360

wavelength range
(nm) 100BASE-FX (2 km): 1270 to 1380
Type of fiber Single-mode LC (15 km), Multi-mode LC (2 km)
Mean launched 100BASE-FX (15 km): -15 to -8

optical power (dBm)
100BASE-FX (2 km): -19 to -14
Receiver sensitivity 100BASE-FX (15 km): -28

(dBm)
100BASE-FX (2 km): -30
Minimum overload 100BASE-FX (15 km): -8

(dBm)
100BASE-FX (2 km): -14
Minimum extinction 100BASE-FX (15 km): 8.2

ratio (dB)
100BASE-FX (2 km): 10
Laser Safety Class

The mechanical specifications of the EFF8 are as follows:

l Weight (kg): 0.4

Power Consumption
The maximum power consumption of the EFF8 at room temperature (25°C) is 6 W.
8.14 EFF8A
technical specifications of the EFF8A (8x100M Ethernet optical interface board).

The EFF8A is available in one functional version, namely, N1.
8.14.2 Application
The EFF8A is an Ethernet optical interface board. The EFF8A can be used on the OptiX OSN
The EFF8A receives and transmits 8x100M Ethernet optical signals. The EFF8A must work
with the N5EFS0.
The EFF8A consists of the interface module and power module.
8.14.5 Front Panel
The front panel of the EFF8A has indicators, interfaces, a bar code, and a laser safety class label.
8.14.6 Valid Slots
The EFF8A can be installed in slots 1–4 and 15–18 in the subrack and works as the interface
board of the N5EFS0.
The technical specifications of the EFF8A include the parameters specified for optical interfaces,

The EFF8A is available in one functional version, namely, N1.
8.14.2 Application
The EFF8A is an Ethernet optical interface board. The EFF8A can be used on the OptiX OSN

The EFF8A receives and transmits 8x100M Ethernet optical signals. The EFF8A must work
with the N5EFS0.

The EFF8A consists of the interface module and power module.
Figure 8-76 shows the functional block diagram of the EFF8A by describing how to process
1x100 Mbit/s Ethernet signals.

Figure 8-76 Functional block diagram of the EFF8A

Backplane
100 Mbit/s N5EFS0

Ethernet signal
Interface
module
100 Mbit/s
N5EFS0
Ethernet signal
+3.3 V Power Fuse

+3.3 V backup power
module
Interface Module
and transmits the signals to the N5EFS0.
Power Module
The power module provides all the modules of the EFF8A with the required DC voltages.
8.14.5 Front Panel

The front panel of the EFF8A has indicators, interfaces, a bar code, and a laser safety class label.

Figure 8-77 shows the appearance of the front panel of the EFF8A.

Figure 8-77 Front panel of the EFF8A
EFF8
1
2
3
4
5
6
7
8
LINK ACT OUT1 IN1
OUT2 IN2
OUT3 IN3
OUT4 IN4
OUT5 IN5
OUT6 IN6
OUT7 IN7
OUT8 IN8
CLASS 1
LASER
PRODUCT
EFF8
Indicators
l Eight connection status indicators (LINK) – one color (green)

l Eight data receiving and transmission indicators (ACT) – one color (orange)
Interfaces
The front panel of the EFF8A has eight optical interfaces.
Table 8-267 describes the types and usage of the interfaces of the EFF8A.

Table 8-267 Interfaces of the EFF8A

Interface
IN1–IN8 LC Receives the 1st to the 8th channels of Ethernet

optical signals.
OUT1–OUT8 LC Transmits the 1st to the 8th channels of Ethernet

optical signals.
8.14.6 Valid Slots

The EFF8A can be installed in slots 1–4 and 15–18 in the subrack and works as the interface
Table 8-268 lists the slots valid for the N5EFS0 and the corresponding slots for the EFF8A.
Table 8-268 Slots valid for the N5EFS0 and the corresponding slots for the EFF8A
Valid Slot for the N5EFS0 Corresponding Slot for the EFF8A
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17

The technical specifications of the EFF8A include the parameters specified for optical interfaces,

Table 8-269 lists the parameters specified for the optical interfaces of the EFF8A.
Table 8-269 Parameters specified for the optical interfaces of the EFF8A
Parameter Value
Line code pattern Manchester encoding signal (10M) or MLT-3 encoding signal
(100M)
Type of optical 100BASE-FX

interface

Parameter Value
Operating 100BASE-FX (15 km): 1261 to 1360

wavelength range
(nm) 100BASE-FX (2 km): 1270 to 1380
Type of fiber Single-mode LC (15 km), Multi-mode LC (2 km)
Mean launched 100BASE-FX (15 km): -15 to -8

optical power (dBm)
100BASE-FX (2 km): -19 to -14
Receiver sensitivity 100BASE-FX (15 km): -28

(dBm)
100BASE-FX (2 km): -30
Minimum overload 100BASE-FX (15 km): -8

(dBm)
100BASE-FX (2 km): -14
Minimum extinction 100BASE-FX (15 km): 8.2

ratio (dB)
100BASE-FX (2 km): 10
The mechanical specifications of the EFF8A are as follows:
l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the EFF8A at room temperature (25°C) is 15 W.
8.15 ETF8
technical specifications of the ETF8 (8x100M Ethernet twisted pair interface board).

The ETF8 is available in one functional version, namely, N1.
8.15.2 Application
The ETF8 is an Ethernet electrical interface board. The ETF8 can be used on the OptiX OSN
equipment series to transmit and receive 100M Ethernet electrical signals for the data board.
The ETF8 receives and transmits 8x100M Ethernet electrical signals. The ETF8 must work with
The ETF8 consists of the interface module and power module.
8.15.5 Front Panel

The front panel of the ETF8 has interfaces and a bar code.
8.15.6 Valid Slots
The ETF8 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the EFP0, EFT8, EFS0 or EMR0. The ETF8 can be installed in slots 1–4 and 15–18 in
the subrack and works as the interface board of the EMS4.
The technical specifications of the ETF8 include the parameters specified for electrical

The ETF8 is available in one functional version, namely, N1.
8.15.2 Application
The ETF8 is an Ethernet electrical interface board. The ETF8 can be used on the OptiX OSN

The ETF8 receives and transmits 8x100M Ethernet electrical signals. The ETF8 must work with

The ETF8 consists of the interface module and power module.
Figure 8-78 shows the functional block diagram of the ETF8 by describing how to process
Figure 8-78 Functional block diagram of the ETF8

Backplane
100 Mbit/s
EFT8/EFS0/EMS4/EMR0
Ethernet signal
Interface
module
100 Mbit/s
Ethernet signal EFT8/EFS0/EMS4/EMR0
+3.3 V Power Fuse

+3.3 V backup power
module

Interface Module
and transmits the signals to the EFT8, EFS0, EMS4, or EMR0.
Power Module
The power module provides all the modules of the ETF8 with the required DC voltages.
8.15.5 Front Panel

The front panel of the ETF8 has interfaces and a bar code.

Figure 8-79 shows the appearance of the front panel of the ETF8.
Figure 8-79 Front panel of the ETF8
ETF8
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
ETF8

Interfaces
The front panel of the ETF8 has eight electrical interfaces.
Table 8-270 describes the types and usage of the interfaces of the ETF8. For information about
the cables connected to the interfaces, see 18.4.6 Straight Through Cable and 18.4.7 Crossover
Cable.
Table 8-270 Interfaces of the ETF8

Interface
FE1–FE8 RJ-45 Receives the 1st to the 8th channels of Ethernet

electrical signals.
Table 8-271 provides the pin assignments of the RJ-45 connector of the ETF8.
Table 8-271 Pin assignments of the RJ-45 connector of the ETF8

Front View Pin Description
1 Transmitting (+)
2 Transmitting (–)
3 Receiving (+)
4 Grounding
8 7 6 5 4 3 2 1
5 Grounding
6 Receiving (–)
7 Grounding
8 Grounding
8.15.6 Valid Slots

The ETF8 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the EFP0, EFT8, EFS0 or EMR0. The ETF8 can be installed in slots 1–4 and 15–18 in
the subrack and works as the interface board of the EMS4.
Table 8-272 lists the slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots
for the ETF8.

Table 8-272 Slots valid for the EFT8/EFS0/EMR0/EFP0 and the corresponding slots for the
ETF8
Slot Valid for the EFT8/EFS0/ Corresponding Slot for the ETF8
EMR0/EFP0
Slot 6 Slots 1
Slot 7 Slots 3
Slot 12 Slots 15
Slot 13 Slots 17
Table 8-273 lists the slots valid for the EMS4 and the corresponding slots for the ETF8.
Table 8-273 Slots valid for the EMS4 and the corresponding slots for the ETF8
Slot Valid for the EMS4 Corresponding Slot for the ETF8

The technical specifications of the ETF8 include the parameters specified for electrical

Table 8-274 lists the parameters specified for the electrical interfaces of the ETF8.
Table 8-274 Parameters specified for the optical interfaces of the ETF8
Parameter Value


interface

The mechanical specifications of the ETF8 are as follows:
l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the ETF8 at room temperature (25°C) is 2 W.
8.16 ETF8A
technical specifications of the ETF8A (8x100M Ethernet twisted pair interface board).

The ETF8A is available in one functional version, namely, N1.
8.16.2 Application
The ETF8A is an Ethernet electrical interface board. The ETF8A can be used on the OptiX OSN
The ETF8A receives and transmits 8x100M Ethernet electrical signals. The ETF8A must work
with the N5EFS0.
The ETF8A consists of the interface module and power module.
8.16.5 Front Panel
The front panel of the ETF8A has interfaces and a bar code.
8.16.6 Valid Slots
The ETF8A can be installed in slots 1–4 and 15–18 in the subrack and works as the interface
The technical specifications of the ETF8A include the parameters specified for electrical

The ETF8A is available in one functional version, namely, N1.
8.16.2 Application
The ETF8A is an Ethernet electrical interface board. The ETF8A can be used on the OptiX OSN

The ETF8A receives and transmits 8x100M Ethernet electrical signals. The ETF8A must work
with the N5EFS0.


The ETF8A consists of the interface module and power module.
Figure 8-80 shows the functional block diagram of the ETF8A by describing how to process
Figure 8-80 Functional block diagram of the ETF8A

Backplane
100 Mbit/s N5EFS0

Ethernet signal
Interface
module
100 Mbit/s
N5EFS0
Ethernet signal
+3.3 V Power Fuse

+3.3 V backup power
module
Interface Module
and transmits the signals to the N5EFS0.
Power Module
The power module provides all the modules of the ETF8A with the required DC voltages.
8.16.5 Front Panel

The front panel of the ETF8A has interfaces and a bar code.

Figure 8-81 shows the appearance of the front panel of the ETF8A.

Figure 8-81 Front panel of the ETF8A
ETF8A
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
ETF8A
Interfaces
The front panel of the ETF8A has eight electrical interfaces.
Table 8-275 describes the types and usage of the interfaces of the ETF8A. For information about
Cable.
Table 8-275 Interfaces of the ETF8A

Interface

electrical signals.

Table 8-276 provides the pin assignments of the RJ-45 connector of the ETF8A.
Table 8-276 Pin assignments of the RJ-45 connector of the ETF8A

1 Transmitting (+)
3 Receiving (+)
4 Grounding
8 7 6 5 4 3 2 1
5 Grounding
6 Receiving (–)
7 Grounding
8 Grounding
8.16.6 Valid Slots

The ETF8A can be installed in slots 1–4 and 15–18 in the subrack and works as the interface
Table 8-277 lists the slots valid for the N5EFS0 and the corresponding slots for the ETF8A.
Table 8-277 Slots valid for the N5EFS0 and the corresponding slots for the ETF8A
Slot Valid for the N5EFS0 Corresponding Slot for the ETF8A
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17

The technical specifications of the ETF8A include the parameters specified for electrical

Table 8-278 lists the parameters specified for the electrical interfaces of the ETF8A.

Table 8-278 Parameters specified for the optical interfaces of the ETF8A
Parameter Value


interface
The mechanical specifications of the ETF8A are as follows:
l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the ETF8A at room temperature (25°C) is 11 W.
8.17 ETS8
technical specifications of the ETS8 (8x10/100M Ethernet twisted pair interface switching
board).

The ETS8 is available in one functional version, namely, N1.
8.17.2 Application
The ETS8 is an Ethernet electrical interface protection switching board. The ETS8 can be used
on the OptiX OSN equipment series to realize the TPS protection on the data board.
The ETS8 is used to provide the TPS protection for 8xFE signals at the electrical interface. The
ETS8 must work with the EFS0 or EFS0A.
The ETS8 consists of the interface module, switch matrix module, and power module.
8.17.5 Front Panel
The front panel of the ETS8 has interfaces and a bar code.
8.17.6 Valid Slots
The ETS8 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the EFS0. The ETS8 can be installed in slots 1, 3, 15, 16, and 17 in the subrack and
works as the interface board of the EFS0A.
The technical specifications of the ETS8 include the parameters specified for electrical


The ETS8 is available in one functional version, namely, N1.
8.17.2 Application
The ETS8 is an Ethernet electrical interface protection switching board. The ETS8 can be used
on the OptiX OSN equipment series to realize the TPS protection on the data board.

The ETS8 is used to provide the TPS protection for 8xFE signals at the electrical interface. The
ETS8 must work with the EFS0 or EFS0A.

The ETS8 consists of the interface module, switch matrix module, and power module.
Figure 8-82 shows the functional block diagram of the ETS8 by describing how to process
Figure 8-82 Functional block diagram of the ETS8

Backplane
Cross-connect board
100 Mbit/s
Ethernet signal Switch EFS0
Interface TSB8
matrix
module
module TSB8
100 Mbit/s
EFS0
Ethernet signal
+3.3 V Power Fuse

+3.3 V backup power
module
Interface Module
The interface module receives and transmits the Ethernet optical signals.

module transmits the signal to the EFS0. When the TPS is performed, the switch matrix module
transmits the signal to the TSB8 for bridging.

Power Module
The power module provides all the modules of the ETS8 with the required DC voltages.
8.17.5 Front Panel

The front panel of the ETS8 has interfaces and a bar code.

Figure 8-83 shows the appearance of the front panel of the ETS8.
Figure 8-83 Front panel of the ETS8
ETS8
FE1
FE2
FE3
FE4
FE5
FE6
FE7
FE8
ETS8
Interfaces
The front panel of the ETS8 has eight electrical interfaces.

Table 8-279 describes the types and usage of the interfaces of the ETS8. For information about
Cable.
Table 8-279 Interfaces of the ETS8

Interface

electrical signals.
Table 8-280 provides the pin assignments of the RJ-45 connector of the ETS8.
Table 8-280 Pin assignments of the RJ-45 connector of the ETS8
1 Transmitting (+)
3 Receiving (+)
4 Grounding
5 Grounding
8 7 6 5 4 3 2 1 6 Receiving (–)
7 Grounding
8 Grounding
8.17.6 Valid Slots

The ETS8 can be installed in slots 1, 3, 15, and 17 in the subrack and works as the interface
board of the EFS0. The ETS8 can be installed in slots 1, 3, 15, 16, and 17 in the subrack and
works as the interface board of the EFS0A.
Table 8-281 lists the slots valid for the EFS0 and the corresponding slots for the ETS8.
Table 8-281 Slots valid for the EFS0 and the corresponding slots for the ETS8
Slot Valid for the EFS0 Corresponding Slot for the ETS8
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15

Slot Valid for the EFS0 Corresponding Slot for the ETS8
Slot 13 Slot 17
Table 8-282 lists the slots valid for the EFS0A and the corresponding slots for the ETS8.
Table 8-282 Slots valid for the EFS0A and the corresponding slots for the ETS8
Slot Valid for the EFS0A Corresponding Slot for the ETS8
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15 and 16
Slot 13 Slot 17

The technical specifications of the ETS8 include the parameters specified for electrical

Table 8-283 lists the parameters specified for the electrical interfaces of the ETS8.
Table 8-283 Parameters specified for the optical interfaces of the ETS8
Parameter Value


interface
The mechanical specifications of the ETS8 are as follows:
l Weight (kg): 0.4

Power Consumption
At room temperature (25°C), the maximum power consumption of the ETS8 is 0 W.

Hardware Description 9 ATM Boards
9 ATM Boards
About This Chapter
The ATM boards include STM-1 and STM-4 ATM service processing boards.
9.1 ADL4
technical specifications of the ADL4 (1xSTM-4 ATM service processing board). This topic also
describes how to configure and commission the ADL4.
9.2 ADQ1
technical specifications of the ADQ1 (4xSTM-1 ATM service processing board). This topic also
describes how to configure and commission the ADQ1.
9.3 IDL4
technical specifications of the IDL4 (1xSTM-4 ATM service processing board). This topic also
describes how to configure and commission the IDL4.
9.4 IDL4A
technical specifications of the IDL4A (1xSTM-4 ATM service processing board).
9.5 IDQ1
technical specifications of the IDQ1 (4xSTM-1 ATM service processing board). This topic also
describes how to configure and commission the IDQ1.
9.6 IDQ1A
technical specifications of the IDQ1A (4xSTM-1 ATM service processing board).

9 ATM Boards Hardware Description
9.1 ADL4
technical specifications of the ADL4 (1xSTM-4 ATM service processing board). This topic also
describes how to configure and commission the ADL4.

The ADL4 is available in one functional version, namely, N1.
9.1.2 Application
The ATM board is used in the network that is based on ATM switching and transmission. The
ATM board can carry various types of ATM services.
The ADL4 supports the ATM switching and ATM protection.
The ADL4 consists of the O/E converting module, physical layer module, ATM module, E3
module, mapping module, logic and control module, clock module, and power module.
9.1.5 Front Panel
The front panel of the ADL4 has indicators, interfaces, a bar code, and a laser safety class label.
The ADL4 does not have any jumpers or DIP switches that are used for board settings.
9.1.7 Valid Slots
The ADL4 must be installed in a valid slot in the subrack. Otherwise, the ADL4 cannot work
normally.
9.1.8 Feature Code
The feature code of the ADL4 indicates the type of optical interface.
You can set parameters for the ADL4 by using the U2000.

The technical specifications of the ADL4 include the parameters specified for optical interfaces,

The ADL4 is available in one functional version, namely, N1.
9.1.2 Application
The ADL4 provides one standard STM-4 optical interface and can be interconnected with the
switch or DSLAM to transmit the ATM services. In addition, the ADL4 can switch cell headers
to converge and multiplex bandwidths so that the bandwidths are not wasted. The ADL4 supports
the following types of application of the ATM services:
l Application of the ATM services that occupy bandwidths exclusively
l Application of the ATM services that share bandwidths
Application of the ATM Services That Occupy Bandwidths Exclusively

When the ATM services do not share bandwidths, only the ATM service processing boards on
the source NE and sink NE perform ATM layer processing for the ATM services. The
intermediate NEs that the ATM services traverse do not perform ATM layer processing and only
pass through the ATM services on the SDH timeslots. In this case, each ATM service occupies
the VC-3 or VC-4 channel exclusively. The ATM services can be converged at the central node
and then transmitted on the STM-4 optical interface. Figure 9-1 shows the networking and
application of the ATM services that occupy bandwidths exclusively.
Figure 9-1 Networking and application of the ATM services that occupy bandwidths exclusively
DSLAM
34 Mbit/s
ATM traffic
Service
convergence
NE1

ATM traffic 2.5 Gbit/s ATM traffic
SDH ring
NE2 NE4
DSLAM Router
NE3
34 Mbit/s
ATM traffic
DSLAM

Application of the ATM Services That Share Bandwidths

The VP-ring and VC-ring realize bandwidth sharing and statistical multiplexing for the ATM
services. The ATM services on each NE share one VC (VC-3, VC-4, or VC-4-Xv) channel. In
this case, each NE performs ATM layer processing for the ATM services. Figure 9-2 shows the
networking and application of the ATM services that share bandwidths.
Figure 9-2 Networking and application of the ATM services that share bandwidths
The ATM services on NE1 are

dropped on NE2, then converged DSLAM
with the other ATM services, and 34 Mbit/s
finally sent to the VP/VC-ring. NE1 ATM traffic
155 Mbit/s
ATM traffic NE4 Router
VC4-Xv
VP/VC-ring
DSLAM NE2 622 Mbit/s

ATM traffic
NE3
34 Mbit/s
ATM traffic
DSLAM

The ADL4 supports the ATM switching and ATM protection.
Table 9-1 provides the functions and features of the ADL4.
Table 9-1 Functions and features of the ADL4
Function and ADL4

Feature
Basic functions Accesses and processes 1xSTM-4 ATM services.
Type of optical Supports the following types of optical interfaces: S-4.1, L-4.1,
interface L-4.2 and Ve-4.2.
Connector type LC
Type of optical module SFP

Function and ADL4

Feature
E3 ATM interface Supports 12xE3 signals, which are accessed through the PD3, PL3,
or N1PL3A.
IMA function Does not support the IMA function.
Maximum uplink Supports a bandwidth of 8xVC-4s, or a bandwidth of 12xVC-3s

bandwidth and 4xVC-4s.
NOTE
Only VC-4s numbered 5-8 support the binding of VC-3 paths.
ATM switching Unidirectional: 1.2 Gbit/s; bidirectional: 600 Mbit/s

capability
Mapping granularities Supports VC-3, VC-4, and VC4-Xv (X = 1–4) granularities.
Service types Supports the CBR, rt-VBR, nrt-VBR, and UBR.

ATM connections
Statistical multiplexing Supports the statistical multiplexing.
Flow types and QoS Complies with IETF RFC2514 and ATM forum TM4.0.
ATM multicast Supports the spatial multicast and logical multicast.

connection
ATM protection (ITU- Supports the unidirectional/bidirectional 1+1, unidirectional/

T I.630) bidirectional 1:1, VP-Ring, and VC-Ring protection schemes.
OAM functions (ITU-T Supports the AIS, RDI, LB , and CC.

I.610)
Maintenance features Supports inloops at the ATM layer and on optical interfaces.
Supports outloops at the ATM layer.
These features can be used to locate faults quickly.
Alarms and Reports various alarms and performance events, which can be used
performance events to locate faults and maintain the equipment.

The ADL4 consists of the O/E converting module, physical layer module, ATM module, E3
Figure 9-3 shows the functional block diagram of the ADL4 by describing how to process
1xSTM-4 signals.

Figure 9-3 Functional block diagram of the ADL4

Backplane
622 622
Mbit/s Mbit/s High-speed
E/O Cross-connect unit
bus
Physical
ATM Mapping
layer
622 622 module module module
Mbit/s O/E Mbit/s E3 High-speed
module Cross-connect unit
bus
O/E converting
module
LOS Reference clock and frame header

Cross-connect unit
Logic and
Laser shutdown control module Communication
SCC unit
50 MHz
77 MHz Clock
100 MHz module +3.3 V Power Fuse
-48 V/-60 V
module -48 V/-60 V
Fuse
+3.3 V backup power
Power
module

In the receive direction, optical signals are converted into electrical signals. In the transmit
direction, electrical signals are converted into optical signals.
Physical Layer Module

The physical layer module mainly performs the following functions:
l Maps ATM cells into SDH frames.

l Demaps SDH frames to ATM cells.
l Implements the following functions at the ATM service physical layer: cell delimitation,
and test and generation of header error control (HEC) sequence.
ATM Module
The ATM module mainly performs the following ATM layer functions that are specified in
ATM protocols:
l Flow control
l Extraction and generation of cell headers
l ATM switching

E3 Module
The E3 module mainly processes ATM services at the E3 rate. This module performs the
following functions:
l Maps the ATM cells into E3 containers.

l Demaps E3 containers to ATM cells.
l Implements functions at the ATM physical layer for ATM services at the E3 rate.
Mapping Module
The mapping module performs the following functions:
l Maps ATM cells into SDH frame payloads.

l Demaps SDH frame payloads to ATM cells.
l Implements functions at the ATM physical layer.
l Implements the VC4-Xv (X≤4) virtual concatenation.

The logic and control module performs the following functions:
l Controls writing and reading of each chip.

l Communicates with the NE.
l Issues configured services.
l Reports alarms of each functional module.
l Detects R_LOS alarms of optical modules.
l Controls the shutting down of the laser.
Clock Module
This module mainly generates the required working clock for each chip. The frequency of the
clock can be 50 MHz, 77 MHz, or 100 MHz.
Power Module
require.
9.1.5 Front Panel

The front panel of the ADL4 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 9-4 shows the appearance of the front panel of the ADL4.

Figure 9-4 Front panel of the ADL4
ADL4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
ADL4
Indicators
Interfaces
The front panel of the ADL4 has one optical interface. Table 9-2 describes the type and usage
of the optical interface of the ADL4.

Table 9-2 Optical interface of the ADL4

Interface
OUT1/IN1 LC Transmits and receives STM-4 optical signals.

(swappable)

The ADL4 does not have any jumpers or DIP switches that are used for board settings.
9.1.7 Valid Slots

The ADL4 must be installed in a valid slot in the subrack. Otherwise, the ADL4 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the ADL4 vary with the cross-connect capacity of the subrack. The slots valid
for the ADL4 are as follows:
l When the cross-connect capacity is 20 Gbit/s, the ADL4 can be installed in slots 7, 8, and
l When the cross-connect capacity is 60 Gbit/s, the ADL4 can be installed in slots 5–8 and
9.1.8 Feature Code

The feature code of the ADL4 indicates the type of optical interface.
Table 9-3 provides the relationship between the feature code of the ADL4 and the type of optical
interface.
Table 9-3 Relationship between the feature code of the ADL4 and the type of optical interface
SSN1ADL410 10 S-4.1
SSN1ADL411 11 L-4.1
SSN1ADL412 12 L-4.2
SSN1ADL413 13 Ve-4.2



matches the board.
is correct.
----End

Step 2 Required: Configure services. For details, see Configuring ATM and IMA Services.
Step 3 Required: Set the interface.
– C2 byte: Check whether the ATM parameter is set on both ends. The setting of the C2
byte on the interconnected equipment must be consistent.
----End

Step 1 Connect the ATM instrument to the external optical interface of the board.
Step 2 Perform an outloop at the ATM port on the cross-connect side of the board. For the settings, see
23.7 Checking Board Parameters.
Step 3 Configure the basic ATM services on the instrument.
Step 4 Send the ATM services on the instrument.

Step 5 Check whether the services received on the instrument are normal and check whether certain
cells are discarded.
----End

Boards.
the Current Alarms and Browsing the Current Performance Events at the ATM Port.
----End

You can set parameters for the ADL4 by using the U2000.
You can set the following main parameters for the ADL4 by using the U2000:
l Port type
l Flow type
l Service type
l Peak cell rate (PCR)
l Sustainable cell rate (SCR)
l Maximum cell burst size
l Cell delay variation tolerance (CDVT)
Settings.

Troubleshooting
Table 9-4 lists the faults that occur on the ADL4 frequently and the troubleshooting methods.

Table 9-4 Methods used to troubleshoot the faults that occur on the ADL4 frequently

l The services on an ATM port
are interrupted.
l The services on all the ATM
Packet loss Bit errors occur on the line side. See Troubleshooting Service
Packet Loss.

fault occurs on a single ATM port. Interconnection Faults.
occurs on the VCTRUNK port.
Replacing the Board

NOTE
replace the board.
For information on how to replace the ADL4, see Replacing an ATM Board.

9.1.13.1 N1ADL4
B1_SD B2_EXC B2_SD
B3_SD_VC3 BD_STATUS CC_LOC
CHCS COMMUN_FAIL FPGA_ABN
HARD_BAD HP_LOM HP_RDI
HP_UNEQ IN_PWR_ABN J0_MM
LASER_MOD_ERR LASER_SHUT LCD

LP_SLM_VC3 LP_TIM_VC3 LP_UNEQ_VC3
LSR_NO_FITED LSR_WILL_DIE MS_AIS
MS_RDI MS_REI NO_BD_SOFT
OCD OUT_PWR_ABN POWER_ABNORMAL
R_LOF R_LOS R_LOSYNC
R_OOF SLAVE_WORKING TEM_HA
TEM_LA TF TU_AIS_VC3
TU_LOP_VC3 UHCS VC_AIS
VC_RDI VCAT_LOA VCAT_LOM_VC4
VCAT_SQM_VC4 VP_AIS VP_RDI
PATCH_NOT_CONFIRM SWDL_PKG_NOBDSOFT

9.1.14.1 N1ADL4
Table 9-5 SDH
HPBBE HPCSES HPES
HPFESES HPSES HPUAS
MSBBE MSCSES MSES
MSFEBBE MSFECSES MSFEES
MSFESES MSSES MSUAS
RSBBE RSCSES RSES
RSSES RSUAS TUPJCHIGH
TUPJCLOW VC3BBE VC3CSES

VC3FEES VC3FESES VC3SES
VC3UAS
Table 9-6 ATM
ATM_INGCELL ATM_EGCELL ATM_CORRECTED_HC

SERR
ATM_UNCORRECTED_HC ATM_RECV_CELL ATM_RECV_IDLECELL

SERR
ATM_TRAN_CELL

l VC-4s numbered 5–8 support the binding of VC-3 and VC-4 paths. The other VC-4s
l VCTRUNK1–VCTRUNK4 can be bound with VC-4s numbered 1–4 only. VCTRUNK5–
VCTRUNK16 can be bound with VC-4s numbered 5–8 and VC-3s numbered 1–12.

The technical specifications of the ADL4 include the parameters specified for optical interfaces,

Table 9-7 lists the parameters specified for the optical interfaces of the ADL4.
Table 9-7 Parameters specified for the optical interfaces of the ADL4
Parameter Value
Type of optical S-4.1 L-4.1 L-4.2 Ve-4.2

interface
Type of fiber Single-mode LC Single-mode Single-mode Single-mode

LC LC LC

wavelength range
(nm)

Parameter Value
Launched optical -15 to -8 -3 to +2 -3 to +2 -3 to +2

power range
(dBm)
Minimum -8 -8 -8 -13
overload (dBm)
Receiver -28 -28 -28 -34

sensitivity (dBm)
Minimum 8.2 10 10 10.5

extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the ADL4 are as follows:
l Weight (kg): 0.9
Power Consumption
The maximum power consumption of the ADL4 at room temperature (25°C) is 41 W.
9.2 ADQ1
technical specifications of the ADQ1 (4xSTM-1 ATM service processing board). This topic also
describes how to configure and commission the ADQ1.

The ADQ1 is available in one functional version, namely, N1.
9.2.2 Application
The ADQ1 supports the ATM switching and ATM protection.
The ADQ1 consists of the O/E converting module, physical layer module, ATM module, E3
9.2.5 Front Panel

The front panel of the ADQ1 has indicators, interfaces, a bar code, and a laser safety class label.
The ADQ1 does not have any jumpers or DIP switches that are used for board settings.
9.2.7 Valid Slots
The ADQ1 must be installed in a valid slot in the subrack. Otherwise, the ADQ1 cannot work
normally.
9.2.8 Feature Code
The feature code of the ADQ1 indicates the type of optical interface.
You can set parameters for the ADQ1 by using the U2000.
The technical specifications of the ADQ1 include the parameters specified for optical interfaces,

The ADQ1 is available in one functional version, namely, N1.
9.2.2 Application
The ADQ1 provides four standard STM-1 optical interfaces and can be interconnected with the
switch or DSLAM to transmit the ATM services. In addition, the ADQ1 can switch cell headers
to converge and multiplex bandwidths so that the bandwidths are not wasted. The ADQ1 supports
the following types of application of the ATM services:

l Application of the ATM Services That Occupy Bandwidths Exclusively

l Application of the ATM Services That Share Bandwidths
Application of the ATM Services That Occupy Bandwidths Exclusively

When the ATM services do not share bandwidths, only the ATM service processing boards on
the source NE and sink NE perform ATM layer processing for the ATM services. The
intermediate NEs that the ATM services traverse do not perform ATM layer processing and only
pass through the ATM services on the SDH timeslots. In this case, each ATM service occupies
the VC-3 or VC-4 channel exclusively. The ATM services can be converged at the central node
and then transmitted on the STM-4 optical interface. Figure 9-5 shows the networking and
application of the ATM services that occupy bandwidths exclusively.
Figure 9-5 Networking and application of the ATM services that occupy bandwidths exclusively
DSLAM
34 Mbit/s
ATM traffic
Service
convergence
NE1

ATM traffic 2.5 Gbit/s ATM traffic
SDH ring
NE2 NE4
DSLAM Router
NE3
34 Mbit/s
ATM traffic
DSLAM
Application of the ATM Services That Share Bandwidths

The VP-ring and VC-ring realize bandwidth sharing and statistical multiplexing for the ATM
services. The ATM services on each NE share one VC (VC-3, VC-4, or VC-4-Xv) channel. In
this case, each NE performs ATM layer processing for the ATM services. Figure 9-6 shows the
networking and application of the ATM services that share bandwidths.

Figure 9-6 Networking and application of the ATM services that share bandwidths
The ATM services on NE1 are

dropped on NE2, then converged DSLAM
with the other ATM services, and 34 Mbit/s
finally sent to the VP/VC-ring. NE1 ATM traffic
155 Mbit/s
ATM traffic NE4 Router
VC4-Xv
VP/VC-ring
DSLAM NE2 622 Mbit/s

ATM traffic
NE3
34 Mbit/s
ATM traffic
DSLAM

The ADQ1 supports the ATM switching and ATM protection.
Table 9-8 provides the functions and features of the ADQ1.
Table 9-8 Functions and features of the ADQ1
Function and ADQ1

Feature
Type of optical Supports different types of standard optical interfaces, namely, the
interface Ie-1, S-1.1, L-1.1, L-1.2, and Ve-1.2. The characteristics of the
optical interfaces of the I-1, S-1.1, L-1.1, and L-1.2 types comply
with ITU-T G.957. The characteristics of the optical interfaces of
the Ie-1 and Ve-1.2 types comply with the standards defined by
Huawei.
Connector type LC
Optical module type SFP
E3 ATM interface Supports 12xE3 signals, which are accessed through the PD3, PL3,
or N1PL3A.
IMA function Does not support the IMA function.

Function and ADQ1

Feature
Maximum uplink Supports a bandwidth of 8xVC-4s, or a bandwidth of 12xVC-3s and

bandwidth 4xVC-4s.
NOTE

capability
Mapping granularities Supports VC-3, VC-4, and VC4-Xv (X = 1–4) granularities.
Service types Supports the CBR, rt-VBR, nrt-VBR and UBR.

ATM connections
Statistical Supports the statistical multiplexing.

multiplexing

connection
ATM protection (ITU- Supports the unidirectional/bidirectional 1+1, unidirectional/

T I.630) bidirectional 1:1, VP-Ring, and VC-Ring protection schemes.
OAM functions (ITU- Supports the AIS, RDI, LB , and CC.

T I.610)
Maintenance features Supports inloops at the ATM layer and on optical interfaces.
Supports outloops at the ATM layer.

The ADQ1 consists of the O/E converting module, physical layer module, ATM module, E3
Figure 9-7 shows the functional block diagram of the ADQ1.

Figure 9-7 Functional block diagram of the ADQ1

Backplane
4x155 4x155
E/O Cross-connect unit
bus
Physical
ATM Mapping
layer
4x155 4x155 module module module
Mbit/s O/E Mbit/s E3 High-speed
module bus Cross-connect unit
O/E converting
module

Laser shutdown
SCC unit
50 MHz
77 MHz Clock
-48 V/-60 V
module -48 V/-60 V
Fuse
+3.3 V backup power
Power
module



ATM Module
ATM protocols:
l Flow control
l ATM switching

E3 Module
The E3 module mainly processes ATM services at the E3 rate. This module performs the
following functions:
l Maps the ATM cells into E3 containers.

l Demaps E3 containers to ATM cells.
l Implements functions at the ATM physical layer for ATM services at the E3 rate.
Mapping Module



Clock Module
Power Module
require.
9.2.5 Front Panel

The front panel of the ADQ1 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 9-8 shows the appearance of the front panel of the ADQ1.

Figure 9-8 Front panel of the ADQ1
ADQ1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
ADQ1
Indicators
Interfaces
The front panel of the ADQ1 has four optical interfaces. Table 9-9 describes the types and usage
of the optical interfaces of the ADQ1.

Table 9-9 Optical interfaces of the ADQ1

Interface
OUT1/IN1 LC (swappable) Transmits and receives STM-1 optical signals.

The ADQ1 does not have any jumpers or DIP switches that are used for board settings.
9.2.7 Valid Slots

The ADQ1 must be installed in a valid slot in the subrack. Otherwise, the ADQ1 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the ADQ1 vary with the cross-connect capacity of the subrack. The slots valid
for the ADQ1 are as follows:
l When the cross-connect capacity is 20 Gbit/s, the ADQ1 can be installed in slots 7, 8, and
l When the cross-connect capacity is 60 Gbit/s, the ADQ1 can be installed in slots 5–8 and
9.2.8 Feature Code

The feature code of the ADQ1 indicates the type of optical interface.
Table 9-10 provides the relationship between the feature code of the ADQ1 and the type of
optical interface.
Table 9-10 Relationship between the feature code of the ADQ1 and the type of optical interface
SSN1ADQ110 10 S-1.1
SSN1ADQ111 11 L-1.1

SSN1ADQ112 12 L-1.2
SSN1ADQ113 13 Ve-1.2
SSN1ADQ114 14 Ie-1


matches the board.
is correct.
----End


----End


Step 1 Connect the ATM instrument to the external optical interface of the board.
Step 2 Perform an outloop at the ATM port on the cross-connect side of the board. For the settings, see
23.7 Checking Board Parameters.
Step 3 Configure the basic ATM services on the instrument.
Step 4 Send the ATM services on the instrument.
Step 5 Check whether the services received on the instrument are normal and check whether certain
cells are discarded.
----End

Boards.
----End

You can set parameters for the ADQ1 by using the U2000.
You can set the following main parameters for the ADQ1 by using the U2000:
l Port type
l Flow type
l Service type
l PCR
l SCR
l CDVT
Settings.


Troubleshooting
Table 9-11 lists the faults that occur on the ADQ1 frequently and the troubleshooting methods.
Table 9-11 Methods used to troubleshoot the faults that occur on the ADQ1 frequently

are interrupted.
Packet Loss.

Replacing the Board

NOTE
replace the board.
For information on how to replace the ADQ1, see Replacing an ATM Board.

9.2.13.1 N1ADQ1
B1_SD B2_EXC B2_SD
B3_SD_VC3 BD_STATUS CC_LOC
CHCS COMMUN_FAIL FPGA_ABN
HARD_BAD HP_RDI HP_REI

IN_PWR_ABN J0_MM LASER_MOD_ERR
LASER_SHUT LCD LOOP_ALM
LP_RDI_VC3 LP_REI_VC3 LP_SLM_VC3
LP_TIM_VC3 LP_UNEQ_VC3 LSR_NO_FITED
MS_REI NO_BD_SOFT OCD
OUT_PWR_ABN POWER_ABNORMAL R_LOF
R_LOS R_LOSYNC R_OOF
SLAVE_WORKING TEM_HA TEM_LA
TF TU_AIS_VC3 TU_LOP_VC3
UHCS VC_AIS VC_RDI
VCAT_LOA VCAT_LOM_VC4 VCAT_SQM_VC4
VP_AIS VP_RDI W_R_FAIL
SWDL_PKG_NOBDSOFT

9.2.14.1 N1ADQ1
Table 9-12 SDH
HPBBE HPCSES HPES
HPFESES HPSES HPUAS
MSBBE MSCSES MSES
MSFESES MSSES MSUAS
RSBBE RSCSES RSES

RSSES RSUAS TUPJCHIGH
TUPJCLOW VC3BBE VC3CSES
VC3FEES VC3FESES VC3SES
VC3UAS
Table 9-13 ATM

SERR

SERR
ATM_TRAN_CELL

l VC-4s numbered 5–8 support the binding of VC-3 and VC-4 paths. The other VC-4s
l VCTRUNK1–VCTRUNK4 can be bound with VC-4s numbered 1–4 only. VCTRUNK5–
VCTRUNK16 can be bound with VC-4s numbered 5–8 and VC-3s numbered 1–12.

The technical specifications of the ADQ1 include the parameters specified for optical interfaces,

Table 9-14 lists the parameters specified for the optical interfaces of the ADQ1.
Table 9-14 Parameters specified for the optical interfaces of the ADQ1
Parameter Value
Type of optical Ie-1 S-1.1 L-1.1 L-1.2 Ve-1.2

interface

Parameter Value
Type of fiber Multi- Single-mode Single-mode Single- Single-mode

mode LC LC LC mode LC LC
Operating 1270 to 1261 to 1360 1263 to 1360 1480 to 1480 to 1580

wavelength 1380 1580
range (nm)
Transmission 0 to 0.5 2 to 15 15 to 40 40 to 80 80 to 100

distance (km)

optical power
range (dBm)
Receive optical -30 -28 -34 -34 -34

power (dBm)
Minimum -14 -8 -10 -10 -10

overload (dBm)
Minimum 10 8.2 10 10 10
extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the ADQ1 are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the ADQ1 at room temperature (25°C) is 41 W.
9.3 IDL4
technical specifications of the IDL4 (1xSTM-4 ATM service processing board). This topic also
describes how to configure and commission the IDL4.

The IDL4 is available in one functional version, namely, N1.
9.3.2 Application

The IMA technology demultiplexes the assembled ATM cell flow into multiple low-speed links,
and multiplexed the multiple low-speed links on the remote end to restore the original assembled
cell flow. The IMA technology realizes the interconnection between high-speed links and low-
speed links.
The IDL4 supports the ATM switching, IMA, and ATM protection.
The IDL4 consists of the O/E converting module, physical layer module, ATM module, IMA
9.3.5 Front Panel
The front panel of the IDL4 has indicators, interfaces, a bar code, and a laser safety class label.
The IDL4 does not have any jumpers or DIP switches that are used for board settings.
9.3.7 Valid Slots
The IDL4 must be installed in a valid slot in the subrack. Otherwise, the IDL4 cannot work
normally.
9.3.8 Feature Code
The IDL4 supports the 1+1 board-level protection. The working IDL4 and protection IDL4
should be installed in paired slots.
You can set parameters for the IDL4 by using the U2000.
The technical specifications of the IDL4 include the parameters specified for optical interfaces,


The IDL4 is available in one functional version, namely, N1.
9.3.2 Application
speed links.
The IMA board is applicable to the transmission of the ATM cells on the E1 interface or
interfaces at the other rates. The IMA board only provides a channel and does not process the
service type or ATM cells. That is, the IMA board transparently transmits the ATM layer signals
and higher-layer signals. Figure 9-9 shows the networking and application of the IMA services.
Figure 9-9 Networking and application of the IMA services
RNC
NE1
NMS
40 km
25 km
NE2 NE4
NodeB 1 Two-fiber bidirectional
MSP ring
NodeB 4
35 km 30 km
NE3
NodeB 2
NodeB 3

The IDL4 supports the ATM switching, IMA, and ATM protection.
Table 9-15 provides the functions and features of the IDL4.
Table 9-15 Functions and features of the IDL4
Function and IDL4

Feature

Function and IDL4

Feature
Type of optical Supports the following types of optical interfaces: S-4.1, L-4.1, L-4.2
interface and Ve-4.2.
Connector type LC
Optical module type SFP
E3 ATM interface Does not support the E3 ATM interface.
IMA functions l Accesses and processes IMA services when the IDL4 is used with
(ATM Forum IMA the E1 service processing board N1PQ1 or N1PQM.
1.1) l Supports a maximum of 63 IMA E1 services.
l Supports the mapping between ATM ports and a maximum of 16
IMA groups. Each IMA group supports 1–32 E1 signals.
E1 links that belong to non-IMA groups.
l Supports the maximum IMA multichannel delay of 226 ms.

bandwidth 7xVC-4s.
NOTE
Only the first VC-4 supports the binding of VC-12 paths.

capability
Mapping Supports VC-12, VC-4, VC4-Xc (X = 1–4), and VC12-Xv (X = 1–

granularities 32) granularities.
Service types Supports the CBR, rt-VBR, nrt-VBR and UBR.

ATM connections

multiplexing

connection
ATM protection Supports the unidirectional/bidirectional 1+1, unidirectional/

(ITU-T I.630) bidirectional 1:1, VP-Ring, and VC-Ring protection schemes.
Board-level 1+1 Supports the board-level 1+1 protection.

protection
OAM functions Supports the AIS, RDI, LB , and CC.

(ITU-T I.610)

Function and IDL4

Feature
Maintenance Supports inloops at the ATM layer and on optical interfaces.

features Supports outloops at the ATM layer.
Note: The IMA function can encapsulate ATM cells into E1 signals. The IMA group can
coexist with a single E1 signal. The IMA group can dynamically increase or decrease the
bandwidth to improve the bandwidth utilization. The IMA group can also be used to converge
2 Mbit/s services and to interconnect with other IMA equipment.

The IDL4 consists of the O/E converting module, physical layer module, ATM module, IMA
Figure 9-10 shows the functional block diagram of the IDL4 by describing how to process
1xSTM-4 signals.
Figure 9-10 Functional block diagram of the IDL4

Backplane
622 622
E/O Cross-connect unit A
bus
Physical
ATM Mapping
layer
622 module module module
622
Mbit/s O/E Mbit/s IMA High-speed
module bus Cross-connect unit B
O/E converting
module

Laser shutdown
SCC unit
50 MHz
77 MHz Clock
-48 V/-60 V
module -48 V/-60 V
Fuse
+3.3 V backup power
Power
module



ATM Module
ATM protocols:
l Flow control
l ATM switching
IMA Module
This module mainly performs the following functions that are specified in IMA protocols:
l Separation and re-creation of ATM cells
l Frame synchronization
l Insertion and extraction of IMA control protocol (ICP) cells
l Management of IMA groups
Mapping Module


Clock Module
Power Module
require.
9.3.5 Front Panel

The front panel of the IDL4 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 9-11 shows the appearance of the front panel of the IDL4.
Figure 9-11 Front panel of the IDL4
IDL4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
IDL4

Indicators
Interfaces
The front panel of the IDL4 has one optical interface. Table 9-16 describes the type and usage
of the optical interface of the IDL4.
Table 9-16 Optical interface of the IDL4

Interface

(swappable)

The IDL4 does not have any jumpers or DIP switches that are used for board settings.
9.3.7 Valid Slots

The IDL4 must be installed in a valid slot in the subrack. Otherwise, the IDL4 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the IDL4 vary with the cross-connect capacity of the subrack. The slots valid
for the IDL4 are as follows:
l When the cross-connect capacity is 20 Gbit/s, the IDL4 can be installed in slots 5–8 and
11–13. When the IDL4 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When the
IDL4 is installed in slots 7, 8, and 11–13, the bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the IDL4 can be installed in slots 5–8 and

9.3.8 Feature Code

Table 9-17 provides the relationship between the feature code of the IDL4 and the type of optical
interface.
Table 9-17 Relationship between the feature code of the IDL4 and the type of optical interface
SSN1IDL410 10 S-4.1
SSN1IDL411 11 L-4.1
SSN1IDL412 12 L-4.2
SSN1IDL413 13 Ve-4.2

The IDL4 supports the 1+1 board-level protection. The working IDL4 and protection IDL4
should be installed in paired slots.
The paired slots valid for the IDL4 are (slot 8, slot 11) and (slot 7, slot 12).


matches the board.
is correct.
----End



----End

Step 1 Use the ATM instrument (for example, AX4000) to test the ATM services.
1. Connect the ATM instrument to the external optical interface of the board.
2. Perform an outloop at the ATM port on the cross-connect side of the board. For the settings,
see 23.7 Checking Board Parameters.
3. Configure the basic ATM services on the instrument.
4. Send the ATM services on the instrument.
5. Check whether the services received on the instrument are normal and check whether
certain cells are discarded.
Step 2 Use the IMA instrument (for example, AX4000) to test the IMA services.
1. Connect the IMA instrument to the cross-connect side of the board. The connection can be
realized by using the E1 tributary board.
2. Perform an outloop on the optical interface side of the board by using optical fiber pairs.
3. Configure the basic IMA services on the instrument.
4. Send the IMA services on the instrument.
----End

Boards.

----End

You can set parameters for the IDL4 by using the U2000.
You can set the following main parameters for the IDL4 by using the U2000:
l Port type
l Flow type
l Service type
l PCR
l SCR
l CDVT
Settings.

Troubleshooting
Table 9-18 lists the faults that occur on the IDL4 frequently and the troubleshooting methods.
Table 9-18 Methods used to troubleshoot the faults that occur on the IDL4 frequently

are interrupted.

are transiently interrupted.
abnormal.

Packet Loss.

l The IMA interconnection fault
occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the IDL4, see Replacing an ATM Board.

9.3.14.1 N1IDL4
ALM_E1AIS ALM_IMA_LIF ALM_IMA_LINK_LCD
ALM_IMA_LODS ALM_IMA_RE_RX_UNUSA- ALM_IMA_RE_TX_UNUSA-

BLE BLE
ALM_IMA_RFI AU_AIS AU_LOP
B1_EXC B1_SD B2_EXC
B2_SD B3_EXC B3_SD
CC_LOC CHCS COMMUN_FAIL
FPGA_ABN HARD_BAD HP_RDI
LASER_MOD_ER LASER_SHUT LCD

R
LFA LMFA LOOP_ALM

LP_RDI LP_REI LP_SLM
LP_TIM LP_UNEQ LSR_NO_FITED
SLAVE_WORKIN TEM_HA TEM_LA

G
TF TU_AIS TU_LOP
UHCS VC_AIS VC_RDI
VCG_MM VP_AIS VP_RDI
VPG_MM W_R_FAIL WRG_BD_TYPE
SWDL_PKG_NOB
DSOFT

9.3.15.1 N1IDL4
Table 9-19 SDH
HPBBE HPCSES HPES
HPFESES HPSES HPUAS
LPBBE LPCSES LPES
LPFESES LPSES LPUAS
MSBBE MSCSES MSES

MSFESES MSSES MSUAS
OSPITMPCUR OSPITMPMAX OSPITMPMIN
RPLCUR RPLMAX RPLMIN
RSBBE RSCSES RSES
RSSES RSUAS TLBCUR
TPLMAX TPLMIN
Table 9-20 ATM

SERR

SERR
ATM_TRAN_CELL

l Only the first VC-4 supports the binding of VC-12 and VC-4 paths. The other VC-4s
numbered 1–63 only. VCTRUNK 67–VCTRUNK 70 can be bound with VC-4s numbered
5–8.

The technical specifications of the IDL4 include the parameters specified for optical interfaces,

Table 9-21 lists the parameters specified for the optical interfaces of the IDL4.

Table 9-21 Parameters specified for the optical interfaces of the IDL4
Parameter Value

interface

LC LC LC LC

wavelength range
(nm)

power range (dBm)
Receiver sensitivity -28 -28 -28 -34

(dBm)
Minimum overload -8 -8 -8 -13

(dBm)
Minimum extinction 8.2 10 10 10.5

ratio (dB)
Laser Safety Class

The mechanical specifications of the IDL4 are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the IDL4 at room temperature (25°C) is 41 W.
9.4 IDL4A
technical specifications of the IDL4A (1xSTM-4 ATM service processing board).

The IDL4A is available in one functional version, namely, N1.
9.4.2 Application

speed links.
The IDL4A supports the ATM switching, IMA, and ATM protection.
The IDL4A consists of the O/E converting module, physical layer module, ATM module, IMA
9.4.5 Front Panel
The front panel of the IDL4A has indicators, interfaces, a bar code, and a laser safety class label.
9.4.6 Valid Slots
The IDL4A must be installed in a valid slot in the subrack. Otherwise, the IDL4A cannot work
normally.
9.4.7 Feature Code
The feature code of the IDL4A indicates the type of optical interface.
The IDL4A supports the intra-board PPS protection and inter-board PPS protection. The inter-
board PPS protection does not have specific restrictions on the available paired slots for the
IDL4A.
You can set the parameters for the IDL4A by using the U2000.
The technical specifications of the IDL4A include the parameters specified for optical interfaces,

The IDL4A is available in one functional version, namely, N1.
9.4.2 Application
speed links.

RNC
NE1
NMS
40 km
25 km
NE2 NE4
MSP ring
NodeB 4
35 km 30 km
NE3
NodeB 2
NodeB 3

The IDL4A supports the ATM switching, IMA, and ATM protection.
Table 9-22 provides the functions and features of the IDL4A.
Table 9-22 Functions and features of the IDL4A

Function and IDL4A
Feature
Type of optical Supports the following types of optical interfaces: S-4.1, L-4.1, L-4.2
interface and Ve-4.2.
Connector type LC/PC, which is applicable to the long-distance and short-distance

lasers.
Optical module SFP and ESFP

type

Function and IDL4A

Feature
IMA functions l Accesses and processes IMA services when the IDL4A is used with
(ATM Forum the E1 service processing board N1PQ1 or N1PQM.
IMA 1.1) l Supports a maximum of 189 IMA E1 services.
l Supports the IMA multichannel delay ranging from 25 ms to 226
ms.
Maximum uplink l Supports a bandwidth of 8xVC-4s, or a bandwidth of 189xVC-12s

bandwidth and 5xVC-4s.
l Supports an SDH bandwidth of 8xVC-4s on the TDM cross-connect
side and thus ensures the access bandwidth of 4xVC-4s of the 622
Mbit/s slot.
l The IDL4A can adapt to the bandwidth of the slot.
NOTE
ATM switching Bidirectional: 900 Mbit/s

capability Unidirectional: 1.8 Gbit/s
Capacity of the 600 Mbit/s

ATM ring
Mapping Supports VC-12, VC-4, and VC4-Xv (X = 1–4) granularities.

granularities
Service types Supports the CBR, rt-VBR, nrt-VBR, UBR, and UBR+.
Number of 8192
supported ATM
connections

multiplexing
Flow types and Complies with IETF RFC2514 and ATM forum TM4.0.
QoS
ATM multicast Does not support the ATM multicast connection.

connection
ATM protection Supports the unidirectional/bidirectional 1:1, VP-Ring, and VC-Ring

(ITU-T I.630) protection schemes.
PPS protection Supports the intra-board PPS protection and inter-board PPS
protection.

(ITU-T I.610)

Function and IDL4A

Feature
Clock tracing When the optical interface is connected to the RNC, the optical interface
supports the input and output of the clock source.

Alarms and Reports various alarms and performance events, which can be used to
performance locate faults and maintain the equipment.
events

The IDL4A consists of the O/E converting module, physical layer module, ATM module, IMA
Figure 9-13 shows the functional block diagram of the IDL4A by describing how to process
1xSTM-4 signals.
Figure 9-13 Functional block diagram of the IDL4A

622 High-rate
622 Mbit/s Mbit/s bus Cross-connect
E/O unit A
PHY ATM Mapping

module module module
622 High-rate
622 Mbit/s Mbit/s IMA bus Cross-connect
O/E module
unit B
Reference clock and

LOS frame header
Cross-connect unit
Laser shutdown Logic and control
module Communication
SCC unit
50 MHz
77 MHz Clock
100 MHz module +3.3 V Fuse -48 V/ -60 V
Power
module -48 V/ -60 V
Fuse
+3.3 V backup power
Power
module




ATM Module
ATM protocols:
l Flow control
l ATM switching
IMA Module

Mapping Module





Clock Module
Power Module
require.
9.4.5 Front Panel

The front panel of the IDL4A has indicators, interfaces, a bar code, and a laser safety class label.

Figure 9-14 shows the appearance of the front panel of the IDL4A.
Figure 9-14 Front panel of the IDL4A
IDL4A
STA
AC
T
T
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1 IN1
IDL4A

Indicators
Interfaces
The front panel of the IDL4A has one optical interface. Table 9-23 describes the type and usage
of the optical interface of the IDL4A.
Table 9-23 Optical interface of the IDL4A

Interface

(swappable)
9.4.6 Valid Slots

The IDL4A must be installed in a valid slot in the subrack. Otherwise, the IDL4A cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the IDL4A vary with the cross-connect capacity of the subrack.
l When the cross-connect capacity is 20 Gbit/s, the IDL4A can be installed in slots 5–8 and
11–13. When the IDL4A is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When
the IDL4A is installed in slots 7, 8, and 11–13, the bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the IDL4A can be installed in slots 5–8 and
9.4.7 Feature Code

The feature code of the IDL4A indicates the type of optical interface.
Table 9-24 provides the relationship between the feature code of the IDL4A and the type of
optical interface.

Table 9-24 Relationship between the feature code of the IDL4A and the type of optical interface
SSN1IDL4A10 10 S-4.1
SSN1IDL4A11 11 L-4.1
SSN1IDL4A12 12 L-4.2
SSN1IDL4A13 13 Ve-4.2

The IDL4A supports the intra-board PPS protection and inter-board PPS protection. The inter-
IDL4A.

You can set the parameters for the IDL4A by using the U2000.
You can set the following parameters for the IDL4A by using the U2000:
l Port type
l Flow type
l Service type
l PCR
l SCR
l CDVT
l MCR

The technical specifications of the IDL4A include the parameters specified for optical interfaces,

Table 9-25 lists the parameters specified for the optical interfaces of the IDL4A.
Table 9-25 Parameters specified for the optical interfaces of the IDL4A
Parameter Value

interface

Parameter Value

LC LC LC LC

wavelength range
(nm)

power range (dBm)
Receiver sensitivity -28 -28 -28 -34

(dBm)
Minimum overload -8 -8 -8 -13

(dBm)
Minimum extinction 8.2 10 10 10.5

ratio (dB)
Laser Safety Class

The mechanical specifications of the IDL4A are as follows:
l Weight (kg): 1.5
Power Consumption
The maximum power consumption of the IDL4A at room temperature (25°C) is 60 W.
9.5 IDQ1
technical specifications of the IDQ1 (4xSTM-1 ATM service processing board). This topic also
describes how to configure and commission the IDQ1.

The IDQ1 is available in one functional version, namely, N1.
9.5.2 Application
speed links.

The IDQ1 supports the ATM switching, IMA, and ATM protection.
The IDQ1 consists of the O/E converting module, physical layer module, ATM module, IMA
9.5.5 Front Panel
The front panel of the IDQ1 has indicators, interfaces, a bar code, and a laser safety class label.
The IDQ1 does not have any jumpers or DIP switches that are used for board settings.
9.5.7 Valid Slots
The IDQ1 must be installed in a valid slot in the subrack. Otherwise, the IDQ1 cannot work
normally.
9.5.8 Feature Code
The feature code of the IDQ1 indicates the type of optical interface.
The IDQ1 supports the 1+1 board-level protection. The active and standby IDQ1 should be
housed in paired slots.
You can set parameters for the IDQ1 by using the U2000.
The technical specifications of the IDQ1 include the parameters specified for optical interfaces,

The IDQ1 is available in one functional version, namely, N1.

9.5.2 Application
speed links.
RNC
NE1
NMS
40 km
25 km
NE2 NE4
MSP ring
NodeB 4
35 km 30 km
NE3
NodeB 2
NodeB 3

The IDQ1 supports the ATM switching, IMA, and ATM protection.
Table 9-26 provides the functions and features of the IDQ1.
Table 9-26 Functions and features of the IDQ1
Function and IDQ1

Feature
Type of optical Supports different types of standard optical interfaces, namely, the Ie-1,
interface S-1.1, L-1.1, L-1.2, and Ve-1.2. The characteristics of the optical
interfaces of the I-1, S-1.1, L-1.1, and L-1.2 types comply with ITU-T
G.957. The characteristics of the optical interfaces of the Ie-1 and
Ve-1.2 types comply with the standards defined by Huawei.

Function and IDQ1

Feature
Connector type LC
Optical module SFP

type
IMA functions l Accesses and processes IMA services when the IDQ1 is used with
IMA 1.1) l Supports a maximum of 63 IMA E1 services.
l Supports the maximum IMA multichannel delay of 226 ms.

bandwidth 7xVC-4s. The IDQ1 can adapt to the bandwidth of the slot.
NOTE
Only the first VC-4 supports the binding of VC-12 paths.

capability
Mapping Supports VC-12, VC-4, VC4-Xc (X = 1–4), and VC12-Xv (X = 1–32)

Service types Supports the CBR, rt-VBR, nrt-VBR, and UBR.
Number of 2048
supported ATM
connections

multiplexing
QoS

connection
ATM protection Supports unidirectional/bidirectional 1+1, unidirectional/bidirectional

(ITU-T I.630) 1:1, VP-Ring, and VC-Ring protection schemes.
Board-level 1+1 Supports the board-level 1+1 protection.

protection

(ITU-T I.610)

Function and IDQ1

Feature

Alarm and Reports various alarms and performance events, which can be used to
performance event locate faults and maintain the equipment.

The IDQ1 consists of the O/E converting module, physical layer module, ATM module, IMA
Figure 9-16 shows the functional block diagram of the IDQ1.
Figure 9-16 Functional block diagram of the IDQ1

Backplane
4x155 4x155
E/O Cross-connect unit A
bus
Physical
ATM Mapping
layer
module module
4x155 4x155 module
O/E Mbit/s IMA High-speed
Mbit/s Cross-connect unit B
module bus
O/E converting
module

Laser shutdown
SCC unit
50 MHz
77 MHz Clock
-48 V/-60 V
module -48 V/-60 V
Fuse
+3.3 V backup power
Power
module



ATM Module
ATM protocols:
l Flow control
l ATM switching
IMA Module
Mapping Module


Clock Module
Power Module
require.
9.5.5 Front Panel

The front panel of the IDQ1 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 9-17 shows the appearance of the front panel of the IDQ1.
Figure 9-17 Front panel of the IDQ1
IDQ1
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
IDQ1

Indicators
Interfaces
The front panel of the IDQ1 has four optical interfaces. Table 9-27 describes the types and usage
of the optical interfaces of the IDQ1.
Table 9-27 Optical interfaces of the IDQ1

Interface

The IDQ1 does not have any jumpers or DIP switches that are used for board settings.
9.5.7 Valid Slots

The IDQ1 must be installed in a valid slot in the subrack. Otherwise, the IDQ1 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the IDQ1 vary with the cross-connect capacity of the subrack. The slots valid
for the IDQ1 are as follows:

l When the cross-connect capacity is 20 Gbit/s, the IDQ1 can be installed in slots 5–8 and
11–13. When the IDQ1 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When the
IDQ1 is installed in slots 7, 8, and 11–13, the bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the IDQ1 can be installed in slots 5–8 and
9.5.8 Feature Code

The feature code of the IDQ1 indicates the type of optical interface.
Table 9-28 provides the relationship between the feature code of the IDQ1 and the type of optical
interface.
Table 9-28 Relationship between the feature code of the IDQ1 and the type of optical interface
SSN1IDQ110 10 S-1.1
SSN1IDQ111 11 L-1.1
SSN1IDQ112 12 L-1.2
SSN1IDQ113 13 Ve-1.2
SSN1IDQ114 14 Ie-1

The IDQ1 supports the 1+1 board-level protection. The active and standby IDQ1 should be
housed in paired slots.
The paired slots for the IDQ1 are (slot 8, slot 11) and (slot 7, slot 12).


matches the board.

is correct.
----End


----End

Step 1 Use the ATM instrument (for example, AX4000) to test the ATM services.
1. Connect the ATM instrument to the external optical interface of the board.
2. Perform an outloop at the ATM port on the cross-connect side of the board. For the settings,
see 23.7 Checking Board Parameters.
3. Configure the basic ATM services on the instrument.
4. Send the ATM services on the instrument.
Step 2 Use the IMA instrument (for example, AX4000) to test the IMA services.
1. Connect the IMA instrument to the cross-connect side of the board. The connection can be
realized by using the E1 tributary board.
2. Perform an outloop on the optical interface side of the board by using optical fiber pairs.
3. Configure the basic IMA services on the instrument.
4. Send the IMA services on the instrument.
----End


Boards.
----End

You can set parameters for the IDQ1 by using the U2000.
You can set the following main parameters for the IDQ1 by using the U2000:
l Port type
l Flow type
l Service type
l PCR
l SCR
l CDVT
Settings.

Troubleshooting
Table 9-29 lists the faults that occur on the IDQ1 frequently and the troubleshooting methods.

Table 9-29 Methods used to troubleshoot the faults that occur on the IDQ1 frequently

are interrupted.

are transiently interrupted.
abnormal.
Packet Loss.

l The IMA interconnection fault
occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the IDQ1, see Replacing an ATM Board.

9.5.14.1 N1IDQ1
ALM_E1AIS ALM_IMA_LIF ALM_IMA_LINK_LCD
ALM_IMA_LODS ALM_IMA_RE_RX_UNUSA- ALM_IMA_RE_TX_UNUSA-

BLE BLE
ALM_IMA_RFI AU_AIS AU_LOP
B1_EXC B1_SD B2_EXC

B2_SD B3_EXC B3_SD
CC_LOC CHCS COMMUN_FAIL
FPGA_ABN HARD_BAD HP_RDI
LASER_MOD_ER LASER_SHUT LCD

R
LFA LMFA LOOP_ALM
LP_RDI LP_REI LP_SLM
LP_TIM LP_UNEQ LSR_NO_FITED
SLAVE_WORKIN TEM_HA TEM_LA

G
TF TU_AIS TU_LOP
UHCS VC_AIS VC_RDI
VCG_MM VP_AIS VP_RDI
VPG_MM W_R_FAIL WRG_BD_TYPE
SWDL_PKG_NOB
DSOFT


9.5.15.1 N1IDQ1
Table 9-30 SDH

HPBBE HPCSES HPES
HPFESES HPSES HPUAS
LPBBE LPCSES LPES
LPFESES LPSES LPUAS
MSBBE MSCSES MSES
MSFESES MSSES MSUAS
OSPITMPCUR OSPITMPMAX OSPITMPMIN
RPLCUR RPLMAX RPLMIN
RSBBE RSCSES RSES
RSSES RSUAS TLBCUR
TPLMAX TPLMIN
Table 9-31 ATM

SERR

SERR
ATM_TRAN_CELL


l Only the first VC-4 supports the binding of VC-12 and VC-4 paths. The other VC-4s
numbered 1–63 only. VCTRUNK 67–VCTRUNK 70 can be bound with VC-4s numbered
5–8.

The technical specifications of the IDQ1 include the parameters specified for optical interfaces,

Table 9-32 lists the parameters specified for the optical interfaces of the IDQ1.
Table 9-32 Parameters specified for the optical interfaces of the IDQ1
Parameter Value
Type of optical Ie-1 S-1.1 L-1.2 Ve-1.2 L-1.1

interface
Type of fiber Multi- Single- Single- Single-mode Single-mode

mode LC mode LC mode LC LC LC
Operating 1270 to 1261 to 1480 to 1480 to 1580 1263 to 1360

range (nm)

distance (km)

power range
(dBm)
Receiver -30 -28 -34 -34 -34

sensitivity
(dBm)
Minimum -14 -8 -10 -10 -10

overload (dBm)
Minimum 10 8.2 10 10 10
extinction ratio
(dB)
Laser Safety Class


The mechanical specifications of the IDQ1 are as follows:

l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the IDQ1 at room temperature (25°C) is 41 W.
9.6 IDQ1A
technical specifications of the IDQ1A (4xSTM-1 ATM service processing board).

The IDQ1A is available in one functional version, namely, N1.
9.6.2 Application
speed links.
The IDQ1A supports the ATM switching, IMA, and ATM protection.
The IDQ1A consists of the O/E converting module, physical layer module, ATM module, IMA
9.6.5 Front Panel
The front panel of the IDQ1A has indicators, interfaces, a bar code, and a laser safety class label.
9.6.6 Valid Slots
The IDQ1A must be installed in a valid slot in the subrack. Otherwise, the IDQ1A cannot work
normally.
9.6.7 Feature Code
The feature code of the IDQ1A indicates the type of optical interface.
The IDQ1A supports the intra-board PPS protection and inter-board PPS protection. The inter-
IDL4A.
You can set the parameters for the IDQ1A by using the U2000.
The technical specifications of the IDQ1A include the parameters specified for optical interfaces,


The IDQ1A is available in one functional version, namely, N1.
9.6.2 Application
speed links.
RNC
NE1
NMS
40 km
25 km
NE2 NE4
MSP ring
NodeB 4
35 km 30 km
NE3
NodeB 2
NodeB 3

The IDQ1A supports the ATM switching, IMA, and ATM protection.
Table 9-33 provides the functions and features of the IDQ1A.
Table 9-33 Functions and features of the IDQ1A
Function and IDQ1A

Feature

Function and IDQ1A

Feature
Type of optical Supports different types of standard optical interfaces, namely, the Ie-1,
interface S-1.1, L-1.1, L-1.2, and Ve-1.2. The characteristics of the optical
interfaces of the I-1, S-1.1, L-1.1, and L-1.2 types comply with ITU-T
G.957. l The characteristics of the optical interfaces of the Ie-1 and
Ve-1.2 types comply with the standards defined by Huawei.
Connector type LC/PC, which is applicable to the long-distance and short-distance

lasers.
Optical module SFP and ESFP

type
IMA functions l Accesses and processes IMA services when the IDQ1A is used with
IMA 1.1 standard) l Supports a maximum of 189 IMA E1 services.
l Supports the IMA multichannel delay ranging from 25 ms to 226
ms.

bandwidth 5xVC-4s. The IDQ1A can adapt to the bandwidth of the slot.
NOTE
ATM switching Bidirectional: 900 Mbit/s

capability Unidirectional: 1.8 Gbit/s
Capacity of the 600 Mbit/s

ATM ring
Mapping Supports VC-12, VC-4, and VC4-Xc (X = 1–4) granularities.

granularities
Service types Supports the CBR, rt-VBR, nrt-VBR, UBR, and UBR+.
Number of 8192
supported ATM
connections

multiplexing
QoS
ATM multicast Does not support the ATM multicast connection.

connection

Function and IDQ1A

Feature
ATM protection Supports the unidirectional/bidirectional 1:1, VP-Ring, and VC-Ring

(ITU-T I.630) protection schemes.
PPS protection Supports the inter-board PPS protection and intra-board PPS
protection.

(ITU-T I.610)
Clock tracing When the optical interface is interconnected with the RNC, the optical
function interface supports the input and output of the clock source.

events

The IDQ1A consists of the O/E converting module, physical layer module, ATM module, IMA
Figure 9-19 shows the functional block diagram of the IDQ1A by describing how to process
1xSTM-1 signals.

Figure 9-19 Functional block diagram of the IDQ1A

155 High-rate
155 Mbit/s Mbit/s bus Cross-connect
E/O unit A
PHY ATM Mapping

module module module
155 High-rate
155 Mbit/s Mbit/s IMA bus Cross-connect
O/E module
unit B
Reference clock and

LOS frame header
Cross-connect unit
Laser shutdown Logic and control
module Communication
SCC unit
50 MHz
77 MHz Clock
100 MHz module +3.3 V Fuse -48 V/ -60 V
Power
module -48 V/ -60 V
Fuse
+3.3 V backup power
Power
module



ATM Module
ATM protocols:
l Flow control
l ATM switching

IMA Module

Mapping Module



Clock Module
Power Module
require.
9.6.5 Front Panel

The front panel of the IDQ1A has indicators, interfaces, a bar code, and a laser safety class label.

Figure 9-20 shows the appearance of the front panel of the IDQ1A.

Figure 9-20 Front panel of the IDQ1A
IDQ1A
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
IDQ1A
Indicators
Interfaces
The front panel of the IDQ1A has four optical interfaces. Table 9-34 describes the types and
usage of the optical interfaces of the IDQ1A.

Table 9-34 Optical interfaces of the IDQ1A

Interface
9.6.6 Valid Slots

The IDQ1A must be installed in a valid slot in the subrack. Otherwise, the IDQ1A cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The slots valid for the IDQ1A vary with the cross-connect capacity of the subrack.
l When the cross-connect capacity is 20 Gbit/s, the IDQ1A can be installed in slots 5–8 and
11–13. When the IDQ1A is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When
the IDQ1A is installed in slots 7, 8, and 11–13, the bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the IDQ1A can be installed in slots 5–8 and
9.6.7 Feature Code

The feature code of the IDQ1A indicates the type of optical interface.
Table 9-35 provides the relationship between the feature code of the IDQ1A and the type of
optical interface.
Table 9-35 Relationship between the feature code of the IDQ1A and the type of optical interface
SSN1IDQ1A10 10 S-1.1
SSN1IDQ1A11 11 L-1.1
SSN1IDQ1A12 12 L-1.2
SSN1IDQ1A13 13 Ve-1.2
SSN1IDQ1A14 14 Ie-1


The IDQ1A supports the intra-board PPS protection and inter-board PPS protection. The inter-
IDL4A.

You can set the parameters for the IDQ1A by using the U2000.
You can set the following parameters for the IDQ1A by using the U2000:
l Port type
l Flow type
l Service type
l PCR
l SCR
l CDVT
l MCR

The technical specifications of the IDQ1A include the parameters specified for optical interfaces,

Table 9-36 lists the parameters specified for the optical interfaces of the IDQ1A.
Table 9-36 Parameters specified for the optical interfaces of the IDQ1A
Parameter Value
Type of optical Ie-1 S-1.1 L-1.2 Ve-1.2 L-1.1

interface
Type of fiber Multi- Single- Single- Single-mode Single-mode

mode LC mode LC mode LC LC LC
Operating 1270 to 1261 to 1480 to 1480 to 1580 1280 to 1335

range (nm)

distance (km)

power range
(dBm)

Parameter Value
Receiver -30 -28 -34 -34 -34

sensitivity
(dBm)
Minimum -14 -8 -10 -10 -10

overload (dBm)
Minimum 10 8.2 10 10 10
extinction ratio
(dB)
Laser Safety Class

The mechanical specifications of the IDQ1A are as follows:
l Weight (kg): 1.5
Power Consumption
The maximum power consumption of the IDQ1A at room temperature (25°C) is 46 W.

Hardware Description 10 RPR Boards
10 RPR Boards
About This Chapter
The RPR boards include FE/GE Ethernet ring processing boards.
10.1 EGR2
technical specifications of the EGR2 (2xGE ring processing board). This topic also describes
how to configure and commission the EGR2.
10.2 EMR0
technical specifications of the EMR0 (12xFE and 1xGE ring processing board). This topic also
describes how to configure and commission the EMR0.

10 RPR Boards Hardware Description
10.1 EGR2
technical specifications of the EGR2 (2xGE ring processing board). This topic also describes
how to configure and commission the EGR2.

The EGR2 is available in one functional version, namely, N2.
10.1.2 Application
The EGR2 is used to access Ethernet services, manage bandwidths, and realize Layer 2 switching
The EGR2 supports the Layer 2 switching, port aggregation, and RPR functions.
The EGR2 consists of the Ethernet access module, network processor module, RPR protocol
processing module, mapping module, interface converting module, logic and control module,
clock module, and power module.
10.1.5 Front Panel
The front panel of the EGR2 has indicators, interfaces, a bar code, and a laser safety class label.
The EGR2 does not have any jumpers or DIP switches that are used for board settings.
10.1.7 Valid Slots
The EGR2 must be installed in a valid slot in the subrack. Otherwise, the EGR2 cannot work
normally.
10.1.8 Feature Code
The feature code of the EGR2 indicates the type of optical interface.
The EGR2 supports multiple Ethernet functions and features such as Layer 2 switching and
LCAS. Configure the functions according to actual requirements.
You can set parameters for the EGR2 by using the U2000.

The technical specifications of the EGR2 include the parameters specified for optical interfaces,
consumption.

The EGR2 is available in one functional version, namely, N2.
10.1.2 Application
The EGR2 is used to access Ethernet services, manage bandwidths, and realize Layer 2 switching
Figure 10-1 shows the typical networking and application of the RPR board. The RPR board
accesses and converges Ethernet services, and provides the Ethernet data with the following data
features: Layer 2 switching, port isolation, flow classification, traffic control, VLAN
management, and priority configuration. In addition, the RPR board performs encapsulation/
decapsulation, virtual concatenation, and SDH mapping/demapping for data. The RPR board
can be interconnected with the bandwidth access equipment and the data communication
equipment at the same time, thus to provide a network-level solution.
NOTE
variable, and the binding granularity is at the VC-3 or VC-4 level.

Figure 10-1 Networking and application of the RPR board
NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and

The EGR2 supports the Layer 2 switching, port aggregation, and RPR functions.
Table 10-1 provides the functions and features of the EGR2.
Table 10-1 Functions and features of the EGR2

Function and EGR2
Feature

Supports the RPR feature.
being used with the
interface board

Function and EGR2

Feature
Specifications of the l The optical interfaces are 1000BASE-SX/LX/ZX/VX Ethernet

optical interface optical interfaces.
l The optical interfaces support the auto-negotiation function in
compliance with IEEE 802.3z.
l The optical interfaces use the SFP optical module and support hot
swapping.
– When the multi-mode optical fiber is used, the maximum
transmission distance is 550 m.
– When the single-mode optical fiber is used, the maximum
transmission distance is 10 km.
– The optical modules that can meet different requirements for
the transmission distance such as 40 km and 80 km can also be
used.
bytes.

bandwidth The EGR2 can adapt to the bandwidth of the slot.
Mapping Supports VC-3, VC3-2v, VC-4, and VC4-Xv (X≤8) granularities.

granularities
Encapsulation Supports the GFP-F and LAPS protocols.

format
EVPL services l Supports EVPL services. The frame format can be Ethernet II,
IEEE 802.3, IEEE 802.1q TAG, or MPLS Martini.
l Supports the MPLS encapsulation and forwarding based on PORT
or PORT+VLAN.
l Supports five types of LSPs, including ingress LSP, egress LSP,
transit LSP, RPR ingress LSP, and RPR transit LSP.
l Supports a maximum of 512 LSPs.

Function and EGR2

Feature
EVPLAN services l Supports EVPLAN services that use the stack VLAN
encapsulation.
capacity of the MAC address table in the N2 functional version is
64K. The aging time of the MAC address can be set and queried.
static MAC address table that can contain 4K records. The sum of
the number of records in the blacklist and the number of addresses
in the static MAC address table must not exceed 4K.
l Supports the configuration of the static MAC routes. A maximum
of 4K static MAC routes can be configured.
maximum number of supported VBs is 16. The maximum number
of logical ports for each VB is 32.
MPLS Supports MartinioE.
Stack VLAN Supports the stack VLAN.
VLAN l Supports 4096 VLAN tags, and the addition, deletion, and
exchanging of VLAN tags in compliance with IEEE 802.1q/p.
l Supports the replacement of VLAN tags in Ethernet signal frames.
Link aggregation Supports the aggregation of the links of two GE ports.

function
RPR l Supports the RPR feature that complies with IEEE 802.17.
l Supports a maximum of 255 nodes on the ring network, and
supports stripping at the destination node and weighted fairness
algorithm.
l Supports five priority levels, including A0, A1, B_EIR, B_CIR,
and C, and supports automatic discovery of topologies, which can
display the network status in real time.
l Supports three protection modes, including Steering, Wrapping,
and Wrapping+Steering. Hence, the signal failure time is less than
50 ms.
l Supports the manual configuration of routes for the services on the
RPR ring network.
l Supports the self-learning of routes on the ring, that is, supports
the learning of mapping relationship between MAC addresses and
node numbers.

Function and EGR2

Feature
RSTP Supports the broadcast packet suppression and RSTP, which comply
with IEEE 802.1w.
QoS l Supports the CAR. The granularity is 64 kbit/s.

l Supports the flow classification based on PORT, PORT+VLAN
ID, or PORT+VLAN ID+VLAN PRI.
LPT function Supports the P2MP LPT.
Flow control Supports the port-based flow control function that complies with

(IEEE 1588 V2)
Echo test frames Supports the echo function specified in the RPR OAM function, which
is used to test the connectivity of the link.
Port mirroring Does not support port mirroring.
level:
l STP/RSTP
l LCAS
l LPT
l LAG

performance
monitoring
Weighted fairness Supports the weighted fairness algorithm.

algorithm
Automatic discovery Supports the automatic discovery of topologies.

of topologies
Maximum number of 255

supported nodes
Service priority Supports A0, A1, B_CIR, B_EIR, and C.

levels


The EGR2 consists of the Ethernet access module, network processor module, RPR protocol
Figure 10-2 shows the functional block diagram of the EGR2 by describing how to process
1xGE/FE signals.
Figure 10-2 Functional block diagram of the EGR2

Backplane
ENCP
Control Cross-connect unit
Interface
Network signal Switch RPR RPR
VCP
GE/FE Ethernet converting
access processor MAC MAC
fabric
DENCP
(east) (west) module
module Data
Cross-connect unit
RPR protocol
Network processor module processing module Mapping module
Laser shutdown
Communication
Logic and SCC unit
LOS control module Reference clock and frame header
Cross-connect unit
50 MHz
77 MHz
125 MHz Clock module
100 MHz
+3.3 V
module Fuse
+3.3 V backup power
RPR: resilient package ring



l MPLS
l L2 MPLS VPN
l Ethernet/VLAN
l WFQ
l Four CoSs
RPR Protocol Processing Module

The RPR implements the weighted fairness algorithm and statistical multiplexing for the ring
bandwidth. In addition, the RPR provides protection switching schemes. By using the RPR
protocol and RPR weighted fairness algorithm, the RPR protocol processing module controls
the bandwidth of each node accessed by the ring network. In addition, the RPR ring has the
features of spatial reuse and statistical multiplexing. Hence, the bandwidth utilization is
improved.
Topology auto-discovery ensures the plug-and-play feature of the RPR. The protocol for
topology auto-discovery provides correct and reliable ways of discovering topologies of all
nodes and changes occurring on these topologies.
RPR unicast frames are striped at the destination node and thus the bandwidth on the ring is
reused spatially.
The RPR ring supports a maximum of 255 nodes.
Mapping Module
In the upstream direction, virtual concatenation services support the LCAS function. The
encapsulation formats are LAPS and GFP-F.
The decapsulated data is finally transmitted to the RPR protocol processing module in packets.



functions:
Clock Module
Power Module
require.
10.1.5 Front Panel

The front panel of the EGR2 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 10-3 shows the appearance of the front panel of the EGR2.

Figure 10-3 Front panel of the EGR2
EGR2
STAT
ACT
PROG
SRV
LINK1
ACT1
LINK2
ACT2
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
EGR2
Indicators

Interfaces
The front panel of the EGR2 has two optical interfaces. Table 10-2 describes the types and usage
of the optical interfaces of the EGR2.
Table 10-2 Optical interfaces of the EGR2

signals.

signals.

The EGR2 does not have any jumpers or DIP switches that are used for board settings.
10.1.7 Valid Slots

The EGR2 must be installed in a valid slot in the subrack. Otherwise, the EGR2 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The EGR2 can be installed in slots 5–8 and 11–13 in the subrack. The relation between the slots
valid for the EGR2 and the bandwidth is as follows:
l When the cross-connect capacity is 20 Gbit/s, the EGR2 can be installed in slots 5–8 and
11–13. When the EGR2 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When
the EGR2 is installed in slots 7, 8, 11, and 12, the bandwidth is 2.5 Gbit/s. When the EGR2
l When the cross-connect capacity is 60 Gbit/s, the EGR2 can be installed in slots 5–8 and
10.1.8 Feature Code

The feature code of the EGR2 indicates the type of optical interface.
Table 10-3 provides the relationship between the feature code of the EGR2 and the type of
optical interface.

Table 10-3 Relationship between the feature code of the EGR2 and the type of optical interface
SSN2EGR210 10 1000BASE-SX (0.5 km)
SSN2EGR211 11 1000BASE-LX (10 km)
SSN2EGR212 12 1000BASE-VX (40 km)
SSN2EGR213 13 1000BASE-ZX (80 km)


matches the board.
is correct.
----End



NOTE
LAG.
----End

Channels.
----End

Boards.
----End

The EGR2 supports multiple Ethernet functions and features such as Layer 2 switching and
You can configure the following Ethernet functions for the EGR2 by using the U2000:
l STP/RSTP
l LCAS

l LPT
l LAG
l Test Frame
l IGMP Snooping

You can set parameters for the EGR2 by using the U2000.
You can set the following main parameters for the EGR2 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 10-4 lists the faults that occur on the EGR2 frequently and the troubleshooting methods.
Table 10-4 Methods used to troubleshoot the faults that occur on the EGR2 frequently


interrupted.
abnormal.
Packet Loss.


fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EGR2, see Replacing an Ethernet Board.

10.1.13.1 N2EGR2
B3_EXC_VC4 B3_SD_VC3 B3_SD_VC4
BD_STATUS COMMUN_FAIL ETH_LOS
HP_TIM HP_UNEQ LAG_FAIL

CREASED
LP_REI_VC3 LP_SLM_VC3 LP_TIM_VC3
RPR_DUPLICATE_MAC RPR_ECHO_DLOC RPR_ECHO_LOC
RPR_MISCONFIG RPR_NB_INCONSIS RPR_PM_INCONSIS
RPR_PS_CHANGE RPR_STATIONS_EXCEED RPR_SUM_A0_EXCEED
SLAVE_WORKING T_LOS TU_AIS_VC3

TU_LOP_VC3 VCAT_LOA VCAT_LOM_VC3
VCAT_LOM_VC4 LASER_MOD_ERR PATCH_ERR
PATCH_NOT_CONFIRM PATCHFILE_NOTEXIST LINK_ERR
LPT_RFI SWDL_PKG_NOBDSOFT

10.1.14.1 N2EGR2
Table 10-5 SDH

HPBBE HPCSES HPES
HPFESES HPSES HPUAS

AlignmentErrors FCSErrors rprSpanErrorUnavailableSeconds
rprSpanErrorTtlExp- rprSpanErrorTooLong- rprSpanErrorTooShortFrames

Frames Frames
rprSpanErrorBadHec- rprSpanErrorBadFcs- rprSpanErrorSelfSrcUcastFrames

Frames Frames
rprSpanErrorPmdAbort- rprSpanErrorBadAddr- rprSpanErrorBadParityFrames

Frames Frames
rprSpanErrorContained- rprSpanErrorBadDa- rprSpanErrorBadCtrlFcsFrames

Frames taFcsFrames
rprSpanErrorScffErrors rprSpanErrorErrored- rprSpanErrorSeverelyErroredSec-

Seconds onds


Packets Received(64 Octets Packets Received(65~127 Packets Received(512~1023
in Length)(packets/s) Octets in Length)(packets/s) Octets in Length)(packets/s)
Packets Received(256~511 Packets Received(128~255 Packets Received

Octets in Length)(packets/s) Octets in Length)(packets/s) (1024~1518 Octets in
Length)(packets/s)
Multicast Packets Received Broadcast Packets Received Drop Events(times/s)

(packets/s) (packets/s)
Undersize Packets Received Oversize Packets Received Fragments(packets/s)

Jabbers(packets/s) Collisions(times/s) Octets Received(Byte/s)
Packets Received(packets/
s)

Packets Transmitted(64 Packets Transmitted(65~127 Packets Transmitted
Octets in Length)(packets/s) Octets in Length)(packets/s) (128~255 Octets in Length)
(packets/s)

(256~511 Octets in Length) (512~1023 Octets in Length) (1024~1518 Octets in Length)
(packets/s) (packets/s) (packets/s)
Unicast Packets Received Unicast Packets Transmitted Multicast Packets

(packets/s) (packets/s) Transmitted(packets/s)
Broadcast Packets Good Octets Transmitted Alignment Errors(frames/s)

Transmitted(packets/s) (Byte/s)
Table 10-9 Statistics of RMON VCG performance (receive frame count at Span side)
rprSpanRxUcastClassA- rprSpanRxUcastClassA- rprSpanRxUcastClassBCir-
Frames(frames/s) Bytes(Byte/s) Frames(frames/s)
rprSpanRxUcastClassBCir- rprSpanRxUcastClassBEir- rprSpanRxUcastClassBEir-

Bytes(Byte/s) Frames(frames/s) Bytes(Byte/s)
rprSpanRxUcastClassC- rprSpanRxUcastClassC- rprSpanRxMcastClassA-

rprSpanRxMcastClassA- rprSpanRxMcastClassBCir- rprSpanRxMcastClassBCir-


rprSpanRxMcastClassBEir- rprSpanRxMcastClassBEir- rprSpanRxMcastClassC-

rprSpanRxMcastClassC-
Bytes(Byte/s)
Table 10-10 Statistics of RMON VCG performance (transmit frame count at Span side)
rprSpanTxUcastClassA- rprSpanTxUcastClassA- rprSpanTxUcastClassBCir-

rprSpanTxUcastClassBCir- rprSpanTxUcastClassBEir- rprSpanTxUcastClassBEir-

rprSpanTxUcastClassC- rprSpanTxUcastClassC- rprSpanTxMcastClassA-

rprSpanTxMcastClassA- rprSpanTxMcastClassBCir- rprSpanTxMcastClassBCir-

rprSpanTxMcastClassBEir- rprSpanTxMcastClassBEir- rprSpanTxMcastClassC-

rprSpanTxMcastClassC-
Bytes(Byte/s)
Table 10-11 Statistics of RMON VCG performance (count of control layer frames)
rprSpanTxCtrlFrames rprSpanTxOamEchoFrames rprSpanTxOamFlushFrames

(frames/s) (frames/s) (frames/s)
rprSpanTxOamOrgFrames rprSpanTxTopoAtdFrames rprSpanTxTopoChkSum-

(frames/s) (frames/s) Frames(frames/s)
rprSpanTxTopoTpFrames rprSpanRxCtrlFrames rprSpanRxOamEchoFrames

rprSpanRxOamFlushFrames rprSpanRxOamOrgFrames rprSpanRxTopoAtdFrames

rprSpanRxTopoChkSum- rprSpanRxTopoTpFrames
Frames(frames/s) (frames/s)
Table 10-12 Statistics of RMON VCG performance (frames received by Client)
rprClientTxUcastClassA- rprClientTxUcastClassA- rprClientTxUcastClassBCir-

rprClientTxUcastClassBCir- rprClientTxUcastClass- rprClientTxUcastClassBEir-

Bytes(Byte/s) BEirFrames(frames/s) Bytes(Byte/s)

rprClientTxUcastClassC- rprClientTxUcastClassC- rprClientTxMcastClassA-

rprClientTxMcastClassA- rprClientTxMcastClassB- rprClientTxMcastClassBCir-

Bytes(Byte/s) CirFrames(frames/s) Bytes(Byte/s)
rprClientTxMcastClassBEir- rprClientTxMcastClass- rprClientTxMcastClassC-

Frames(frames/s) BEirBytes(Byte/s) Frames(frames/s)
rprClientTxMcastClassC- rprClientTxBcastFrames
Bytes(Byte/s) (frames/s)
Table 10-13 Statistics of RMON VCG performance (frames transmitted by client)
rprClientRxUcastClassA- rprClientRxUcastClassA- rprClientRxUcastClassBCir-

rprClientRxUcastClassBCir- rprClientRxUcastClass- rprClientRxUcastClassBEir-

rprClientRxUcastClassC- rprClientRxUcastClassC- rprClientRxMcastClassA-

rprClientRxMcastClassA- rprClientRxMcastClassB- rprClientRxMcastClassBCir-

rprClientRxMcastClass- rprClientRxMcastClass- rprClientRxMcastClassC-

BEirFrames(frames/s) BEirBytes(Byte/s) Frames(frames/s)
rprClientRxMcastClassC- rprClientRxBcastFrames
Table 10-14 Statistics of RMON VCG performance (count of error frames)
rprSpanErrorTtlExpFrames rprSpanErrorTooLong- rprSpanErrorTooShort-

(frames/s) Frames(frames/s) Frames(frames/s)
rprSpanErrorBadHecFrames rprSpanErrorBadFcsFrames rprSpanErrorSelfSrcUcast-

rprSpanErrorPmdAbort- rprSpanErrorBadAddr- rprSpanErrorBadParity-

Frames(frames/s) Frames(frames/s) Frames(frames/s)
rprSpanErrorContained- rprSpanErrorBadDataFcs- rprSpanErrorBadCtrlFcs-

rprSpanErrorScffErrors rprSpanErrorErroredSec- rprSpanErrorSeverelyError-

(frames/s) onds(seconds/s) edSeconds(seconds/s)
rprSpanErrorUnavailable-
Seconds(seconds/s)


The known restrictions on the board are as follows: VC-3 virtual concatenation on the SDH side
supports only one or two VC-3s due to the limit of the mapping logic. In addition, only the first
two VC-3 timeslots of the first VC-4 in the first STM-4 frame of each VCTRUNK can be used.

The technical specifications of the EGR2 include the parameters specified for optical interfaces,
consumption.

Table 10-15 lists the parameters specified for the optical interfaces of the EGR2.
Table 10-15 Parameters specified for the optical interfaces of the EGR2
Parameter Value


LC LC

power range
(dBm)

wavelength range
(nm)
Minimum -3 -3 -3 0
overload (dBm)
Receiver -23 -23 -20 -17

sensitivity (dBm)
Minimum 9 9 9 9
extinction ratio
(dB)
Laser Safety Class



NOTE
specifications, and back-to-back specifications of the EGR2 board of the N2 version.
the case of overloading, latency specifications, and back-to-back specifications of the EGR2.
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 10-16 lists the throughput specifications of the EGR2. Table 10-17 lists the packet loss
ratio in the case of overloading of the EGR2. Table 10-18 lists the latency specifications of the
EGR2. Table 10-19 lists the back-to-back specifications of the EGR2.
NOTE
are used.
l The specifications in the following tables are obtained in the following scenario: EVPL bidirectional
unicast services are configured and eight VC-4s are bound on the GE port.
Table 10-16 lists the throughput specifications of the EGR2. The values are obtained when the



Table 10-16 Throughput specifications of the EGR2

(Byte) (%) (01,08,02) (pks/ (01,08,01) (pks/ sec)
sec) sec)
64 80.77 1201923 1201923 2403846
128 94.87 801282 801282 1602564
256 100.00 452899 452899 905798
512 100.00 234962 234962 469924
1024 100.00 119732 119732 239464
1280 100.00 196154 96154 192308
1518 100.00 81274 81274 162548
Table 10-17 lists the packet loss ratio in the case of overloading of the EGR2. The values are

Table 10-17 Packet loss ratio in the case of overloading of the EGR2

(Byte) (%) (01,08,02) (%) (01,08,01) (%)
64 100.00 16.719 16.720 16.719
128 100.00 4.315 4.328 4.321
256 100.00 0.000 0.000 0.000
512 100.00 0.000 0.000 0.000
1024 100.00 0.000 0.000 0.000


(Byte) (%) (01,08,02) (%) (01,08,01) (%)
1280 100.00 0.000 0.000 0.000
1518 100.00 0.000 0.000 0.000
Table 10-18 lists the latency specifications of the EGR2. The values are obtained when the
when the first bit of the transmitted frame reaches the output port of the equipment and the
time when the first bit of the transmitted frame reaches the input port of the equipment. In
store forward mode, the analyzer calculates the difference between the time when the first
bit of the transmitted frame reaches the output port of the equipment and the time when the
last bit of the transmitted frame reaches the input port of the equipment. In the table, the
CT values are obtained in cut through mode and the S&F values are obtained in store
forward mode.
Table 10-18 Latency specifications of the EGR2

64 80.77 117.8 117.8 117.3 117.3
128 94.87 121.2 121.2 120.2 120.2
256 100.00 126.6 126.6 124.6 124.6
512 100.00 137.7 137.7 133.7 133.7
1024 100.00 159.9 159.9 151.8 151.8
1280 100.00 170.2 170.2 160.0 160.0


1518 100.00 182.9 182.9 170.8 170.8
Table 10-19 lists the back-to-back specifications of the EGR2. The values are obtained when

Table 10-19 Back-to-back specifications of the EGR2

Frames) Frames)
64 100.00 298 300 598
128 100.00 650 650 1300
256 100.00 905798 905798 1811596
512 100.00 469924 469924 939848
1024 100.00 239464 239464 478928
1280 100.00 192308 192308 384616
1518 100.00 162548 162548 325096
The mechanical specifications of the EGR2 are as follows:

l Weight (kg): 1.1

Power Consumption
The maximum power consumption of the EGR2 at room temperature (25°C) is 40 W.
10.2 EMR0
technical specifications of the EMR0 (12xFE and 1xGE ring processing board). This topic also
describes how to configure and commission the EMR0.

The EMR0 is available in one functional version, namely, N2.
10.2.2 Application
The EMR0 is used to access Ethernet services, manage bandwidths, and realize Layer 2
The EMR0 supports the Layer 2 switching, port aggregation, and RPR functions.
The EMR0 consists of the Ethernet access module, network processor module, RPR protocol
10.2.5 Front Panel
The front panel of the EMR0 has indicators, interfaces, a bar code, and a laser safety class label.
The EMR0 does not have any jumpers or DIP switches that are used for board settings.
10.2.7 Valid Slots
The EMR0 must be installed in a valid slot in the subrack. Otherwise, the EMR0 cannot work
normally.
10.2.8 Feature Code
The feature code of the EMR0 indicates the type of optical interface.
The EMR0 supports multiple Ethernet functions and features such as Layer 2 switching and
You can set parameters for the EMR0 by using the U2000.

The technical specifications of the EMR0 include the parameters specified for optical interfaces,
consumption.

The EMR0 is available in one functional version, namely, N2.
10.2.2 Application
The EMR0 is used to access Ethernet services, manage bandwidths, and realize Layer 2
Figure 10-5 shows the typical networking and application of the RPR board. The RPR board
accesses and converges Ethernet services, and provides the Ethernet data with the following data
features: Layer 2 switching, port isolation, flow classification, traffic control, VLAN
management, and priority configuration. In addition, the RPR board performs encapsulation/
decapsulation, virtual concatenation, and SDH mapping/demapping for data. The RPR board
can be interconnected with the bandwidth access equipment and the data communication
equipment at the same time, thus to provide a network-level solution.
NOTE
variable, and the binding granularity is at the VC-3 or VC-4 level.

Figure 10-5 Networking and application of the RPR board
NMS
User A2 NE1
PORT 1
NE3
PORT 2
VLAN 100
PORT 2
User B2 VLAN 100

Line board
Data board
Cross-connect and

The EMR0 supports the Layer 2 switching, port aggregation, and RPR functions.
Table 10-20 provides the functions and features of the EMR0.
Table 10-20 Functions and features of the EMR0

Function and EMR0
Feature
Basic functions Accesses and processes 12xFE services and 1xGE services.
Supports the RPR feature.
Functions when l Supports four FE ports and one GE ports.

being used with the l Accesses 12xFE signals through the electrical interface when the
interface board EMR0 is used with the ETF8.
l Accesses 8xFE signals through the optical interface when the
EMR0 is used with the EFF8.

Function and EMR0

Feature
Specifications of the l Supports 10BASE-T/100BASE-TX signals when the EMR0 is

optical interface used with the ETF8. The maximum transmission distance is 100
m.
l Supports 100BASE-FX signals in compliance with IEEE 802.3u
when the EMR0 is used with the EFF8.
bytes.

bandwidth The EMR0 can adapt to the bandwidth of the slot.
Mapping Supports VC-3, VC3-2v, VC-4, and VC4-Xv (X≤8) granularities.

granularities
Encapsulation format Supports the GFP-F and LAPS protocols.
EVPL services l Supports EVPL services. The frame format can be Ethernet II,
IEEE 802.3, IEEE 802.1q TAG, or MPLS Martini.
l Supports the MPLS encapsulation and forwarding based on PORT
or PORT+VLAN.
l Supports five types of LSPs, including ingress LSP, egress LSP,
transit LSP, RPR ingress LSP, and RPR transit LSP.
l Supports a maximum of 512 LSPs.
EVPLAN services l Supports EVPLAN services that use the stack VLAN
encapsulation.
capacity of the MAC address table in the N2 functional version is
64K. The capacity of the MAC address table in the N1 functional
version is 16K. The aging time of the MAC address can be set and
queried.
static MAC address table that can contain 4K records. The sum of
the number of records in the blacklist and the number of addresses
in the static MAC address table must not exceed 4K.
l Supports the configuration of the static MAC routes. A maximum
of 4K static MAC routes can be configured.
maximum number of VBs supported by the N2EMR0 is 16. The
maximum number of logical ports for each VB is 32.

Function and EMR0

Feature
bytes to 9600 bytes. After the setting becomes valid, in the case of
the FE ports, the length of the packets that exit the IP ports is restricted
by the pre-set MTU; in the case of the GE ports, the length of the
MPLS Supports MartinioE.
Stack VLAN Supports the stack VLAN.
VLAN l Supports 4096 VLAN tags, and the addition, deletion, and
exchanging of VLAN tags in compliance with IEEE 802.1q/p.
l Supports the replacement of VLAN tags in Ethernet signal frames.
Link aggregation Supports the aggregation of the links of a maximum of eight FE ports.
function
RPR l Supports the RPR feature that complies with IEEE 802.17.
l Supports a maximum of 255 nodes on the ring network, and
supports stripping at the destination node and weighted fairness
algorithm.
l Supports five priority levels, including A0, A1, B_EIR, B_CIR,
and C, and supports automatic discovery of topologies, which can
display the network status in real time.
l Supports three protection modes, including Steering, Wrapping,
and Wrapping+Steering. Hence, the signal failure time is less than
50 ms.
l Supports the self-learning of routes on the ring, that is, supports
the learning of mapping relationship between MAC addresses and
node numbers.
l The N2EMR0 supports the manual configuration of routes for the
services on the RPR ring network.
RSTP Supports the broadcast packet suppression and RSTP, which comply
with IEEE 802.1w.

l The N2EMR0 supports the flow classification based on PORT,
PORT+VLAN ID, or PORT+VLAN ID+VLAN PRI.
IEEE 802.3x.
Echo test frames Supports the echo function specified in the RPR OAM function,
which is used to test the connectivity of the link.

Function and EMR0

Feature
level:
l STP/RSTP
l LCAS
l LAG

performance
monitoring
Weighted fairness Supports the weighted fairness algorithm.

algorithm
Automatic discovery Supports the automatic discovery of topologies.

of topologies
Maximum number of 255

supported nodes
Service priority Supports A0, A1, B_CIR, B_EIR, and C.

levels

The EMR0 consists of the Ethernet access module, network processor module, RPR protocol
Figure 10-6 shows the functional block diagram of the EMR0 by describing how to process
1xGE/FE signals.

Figure 10-6 Functional block diagram of the EMR0

Backplane
ENCP
Control Cross-connect unit
Interface
Network signal Switch RPR RPR
VCP
GE/FE Ethernet converting
access processor MAC MAC
fabric
DENCP
(east) (west) module
module Data
Cross-connect unit
RPR protocol
Network processor module processing module Mapping module
Laser shutdown
Communication
Logic and SCC unit
LOS control module Reference clock and frame header
Cross-connect unit
50 MHz
77 MHz
125 MHz Clock module
100 MHz
+3.3 V
module Fuse
+3.3 V backup power
RPR: resilient package ring


l MPLS
l L2 MPLS VPN
l Ethernet/VLAN


l WFQ
l Four CoSs
RPR Protocol Processing Module

The RPR implements the weighted fairness algorithm and statistical multiplexing for the ring
bandwidth. In addition, the RPR provides protection switching schemes. By using the RPR
protocol and RPR weighted fairness algorithm, the RPR protocol processing module controls
the bandwidth of each node accessed by the ring network. In addition, the RPR ring has the
features of spatial reuse and statistical multiplexing. Hence, the bandwidth utilization is
improved.
Topology auto-discovery ensures the plug-and-play feature of the RPR. The protocol for
topology auto-discovery provides correct and reliable ways of discovering topologies of all
nodes and changes occurring on these topologies.
RPR unicast frames are striped at the destination node and thus the bandwidth on the ring is
reused spatially.
The RPR ring supports a maximum of 255 nodes.
Mapping Module
In the upstream direction, virtual concatenation services support the LCAS function. The
encapsulation formats are LAPS and GFP-F.
The decapsulated data is finally transmitted to the RPR protocol processing module in packets.


functions:


Clock Module
Power Module
require.
10.2.5 Front Panel

The front panel of the EMR0 has indicators, interfaces, a bar code, and a laser safety class label.

Figure 10-7 shows the appearance of the front panel of the EMR0.

Figure 10-7 Front panel of the EMR0
EMR0
STAT
ACT
PROG
SRV
LINK
ACT
CLASS 1
LASER
PRODUCT
OUT1
IN1
FE1
FE2
FE3
FE4
EMR0
Indicators

Interfaces
The front panel of the EMR0 has five interfaces. Table 10-21 describes the types and usage of
the interfaces of EMR0.
Table 10-21 Interfaces of the EMR0

Interface

signals.

signals.

signals.

signals.

signals.

The EMR0 does not have any jumpers or DIP switches that are used for board settings.
10.2.7 Valid Slots

The EMR0 must be installed in a valid slot in the subrack. Otherwise, the EMR0 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The EMR0 can be used with the ETF8 and EFF8.

The slots valid for the EMR0 are as follows:
l When the cross-connect capacity is 20 Gbit/s, the EMR0 can be installed in slots 1–6 and
13–16. When the EMR0 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When
the EMR0 is installed in slots 7, 8, 11, and 12, the bandwidth is 2.5 Gbit/s. When the EMR0
l When the cross-connect capacity is 60 Gbit/s, the EMR0 can be installed in slots 5–8 and
Table 10-22 lists the slots valid for the EMR0 and the corresponding slots for the ETF8 and
EFF8.

Table 10-22 Slots valid for the EMR0 and the corresponding slots for the ETF8 and EFF8
Slot Valid for the EMR0 Corresponding Slot for the ETF8 and
EFF8
Slot 6 Slot 1
Slot 7 Slot 3
Slot 12 Slot 15
Slot 13 Slot 17
10.2.8 Feature Code

The feature code of the EMR0 indicates the type of optical interface.
Table 10-23 provides the relationship between the feature code of the EMR0 and the type of
optical interface.
Table 10-23 Relationship between the feature code of the EMR0 and the type of optical interface
SSN2EMR010 10 1000BASE-SX (0.5 km)
SSN2EMR011 11 1000BASE-LX (10 km)
SSN2EMR012 12 1000BASE-VX (40 km)
SSN2EMR013 13 1000BASE-ZX (80 km)



matches the board.
is correct.
----End

NOTE
LAG.
----End

Channels.
----End


Boards.
----End

The EMR0 supports multiple Ethernet functions and features such as Layer 2 switching and
You can configure the following Ethernet functions for the EMR0 by using the U2000:
l STP/RSTP
l LCAS
l LAG
l Test Frame
l IGMP Snooping

You can set parameters for the EMR0 by using the U2000.
You can set the following main parameters for the EMR0 by using the U2000:
l Working mode
l LCAS
l Mapping protocol
Settings.

Troubleshooting
Table 10-24 lists the faults that occur on the EMR0 frequently and the troubleshooting methods.

Table 10-24 Methods used to troubleshoot the faults that occur on the EMR0 frequently


interrupted.
abnormal.
Packet Loss.

fault occurs.
Replacing the Board

NOTE
replace the board.
For information on how to replace the EMR0, see Replacing an Ethernet Board.

10.2.13.1 N2EMR0
B3_EXC_VC4 B3_SD_VC3 B3_SD_VC4
BD_STATUS COMMUN_FAIL ETH_LOS

HP_TIM HP_UNEQ LAG_FAIL

CREASED
LP_REI_VC3 LP_SLM_VC3 LP_TIM_VC3
RPR_DUPLICATE_MAC RPR_ECHO_DLOC RPR_ECHO_LOC
RPR_MISCONFIG RPR_NB_INCONSIS RPR_PM_INCONSIS
RPR_PS_CHANGE RPR_STATIONS_EX- RPR_SUM_A0_EXCEED

CEED
SLAVE_WORKING SUBCARD_ABN T_LOS
VCAT_LOM_VC3 VCAT_LOM_VC4 LASER_MOD_ERR
ETH_NO_FLOW SWDL_PKG_NOBDSOFT

10.2.14.1 N2EMR0
Table 10-25 SDH
HPBBE HPCSES HPES
HPFESES HPSES HPUAS

AlignmentErrors FCSErrors rprSpanErrorUnavailableSeconds
rprSpanErrorTtlExp- rprSpanErrorTooLong- rprSpanErrorTooShortFrames

Frames Frames
rprSpanErrorBadHec- rprSpanErrorBadFcs- rprSpanErrorSelfSrcUcastFrames

Frames Frames
rprSpanErrorPmdAbort- rprSpanErrorBadAddr- rprSpanErrorBadParityFrames

Frames Frames
rprSpanErrorContained- rprSpanErrorBadDa- rprSpanErrorBadCtrlFcsFrames

Frames taFcsFrames
rprSpanErrorScffErrors rprSpanErrorErrored- rprSpanErrorSeverelyErroredSec-

Seconds onds

Packets Received(64 Octets Packets Received(65~127 Packets Received(512~1023
in Length)(packets/s) Octets in Length)(packets/s) Octets in Length)(packets/s)
Packets Received(256~511 Packets Received(128~255 Packets Received

Octets in Length)(packets/s) Octets in Length)(packets/s) (1024~1518 Octets in
Length)(packets/s)
Multicast Packets Received Broadcast Packets Received Drop Events(times/s)

Undersize Packets Received Oversize Packets Received Fragments(packets/s)

Jabbers(packets/s) Collisions(times/s) Octets Received(Byte/s)
Packets Received(packets/
s)

Packets Transmitted(64 Packets Transmitted(65~127 Packets Transmitted
Octets in Length)(packets/s) Octets in Length)(packets/s) (128~255 Octets in Length)
(packets/s)

(256~511 Octets in Length) (512~1023 Octets in Length) (1024~1518 Octets in Length)
(packets/s) (packets/s) (packets/s)
Unicast Packets Received Unicast Packets Transmitted Multicast Packets

(packets/s) (packets/s) Transmitted(packets/s)
Broadcast Packets Good Octets Transmitted Alignment Errors(frames/s)

Transmitted(packets/s) (Byte/s)

Table 10-29 Statistics of RMON VCG performance (receive frame count at Span side)
rprSpanRxUcastClassA- rprSpanRxUcastClassA- rprSpanRxUcastClassBCir-
rprSpanRxUcastClassBCir- rprSpanRxUcastClassBEir- rprSpanRxUcastClassBEir-

rprSpanRxUcastClassC- rprSpanRxUcastClassC- rprSpanRxMcastClassA-

rprSpanRxMcastClassA- rprSpanRxMcastClassBCir- rprSpanRxMcastClassBCir-

rprSpanRxMcastClassBEir- rprSpanRxMcastClassBEir- rprSpanRxMcastClassC-

rprSpanRxMcastClassC-
Bytes(Byte/s)
Table 10-30 Statistics of RMON VCG performance (transmit frame count at Span side)
rprSpanTxUcastClassA- rprSpanTxUcastClassA- rprSpanTxUcastClassBCir-
rprSpanTxUcastClassBCir- rprSpanTxUcastClassBEir- rprSpanTxUcastClassBEir-

rprSpanTxUcastClassC- rprSpanTxUcastClassC- rprSpanTxMcastClassA-

rprSpanTxMcastClassA- rprSpanTxMcastClassBCir- rprSpanTxMcastClassBCir-

rprSpanTxMcastClassBEir- rprSpanTxMcastClassBEir- rprSpanTxMcastClassC-

rprSpanTxMcastClassC-
Bytes(Byte/s)
Table 10-31 Statistics of RMON VCG performance (count of control layer frames)
rprSpanTxCtrlFrames rprSpanTxOamEchoFrames rprSpanTxOamFlushFrames
rprSpanTxOamOrgFrames rprSpanTxTopoAtdFrames rprSpanTxTopoChkSum-


rprSpanTxTopoTpFrames rprSpanRxCtrlFrames rprSpanRxOamEchoFrames

rprSpanRxOamFlushFrames rprSpanRxOamOrgFrames rprSpanRxTopoAtdFrames

rprSpanRxTopoChkSum- rprSpanRxTopoTpFrames
Frames(frames/s) (frames/s)
Table 10-32 Statistics of RMON VCG performance (frames received by Client)

rprClientTxUcastClassA- rprClientTxUcastClassA- rprClientTxUcastClassBCir-
rprClientTxUcastClassBCir- rprClientTxUcastClass- rprClientTxUcastClassBEir-

rprClientTxUcastClassC- rprClientTxUcastClassC- rprClientTxMcastClassA-

rprClientTxMcastClassA- rprClientTxMcastClassB- rprClientTxMcastClassBCir-

rprClientTxMcastClassBEir- rprClientTxMcastClass- rprClientTxMcastClassC-

Frames(frames/s) BEirBytes(Byte/s) Frames(frames/s)
rprClientTxMcastClassC- rprClientTxBcastFrames
Table 10-33 Statistics of RMON VCG performance (frames transmitted by client)

rprClientRxUcastClassA- rprClientRxUcastClassA- rprClientRxUcastClassBCir-
rprClientRxUcastClassBCir- rprClientRxUcastClass- rprClientRxUcastClassBEir-

rprClientRxUcastClassC- rprClientRxUcastClassC- rprClientRxMcastClassA-

rprClientRxMcastClassA- rprClientRxMcastClassB- rprClientRxMcastClassBCir-

rprClientRxMcastClass- rprClientRxMcastClass- rprClientRxMcastClassC-

BEirFrames(frames/s) BEirBytes(Byte/s) Frames(frames/s)
rprClientRxMcastClassC- rprClientRxBcastFrames

Table 10-34 Statistics of RMON VCG performance (count of error frames)
rprSpanErrorTtlExpFrames rprSpanErrorTooLong- rprSpanErrorTooShort-

(frames/s) Frames(frames/s) Frames(frames/s)
rprSpanErrorBadHecFrames rprSpanErrorBadFcsFrames rprSpanErrorSelfSrcUcast-

rprSpanErrorPmdAbort- rprSpanErrorBadAddr- rprSpanErrorBadParity-

rprSpanErrorContained- rprSpanErrorBadDataFcs- rprSpanErrorBadCtrlFcs-

rprSpanErrorScffErrors rprSpanErrorErroredSec- rprSpanErrorSeverelyError-

(frames/s) onds(seconds/s) edSeconds(seconds/s)
rprSpanErrorUnavailable-
Seconds(seconds/s)

The known restrictions on the board are as follows: VC-3 virtual concatenation on the SDH side
supports only one or two VC-3s due to the limit of the mapping logic. In addition, only the first
two VC-3 timeslots of the first VC-4 in the first STM-4 frame of each VCTRUNK can be used.

The technical specifications of the EMR0 include the parameters specified for optical interfaces,
consumption.

Table 10-35 lists the parameters specified for the optical interfaces of the EMR0.
Table 10-35 Parameters specified for the optical interfaces of the EMR0
Parameter Value
Type of optical 1000BASE-ZX 1000BASE-LX 1000BASE-SX (0.5

interface (80 km) (10 km) km)
Type of fiber Single-mode LC Single-mode LC Multi-mode LC
Launched optical -2 to 5 -9 to -3 -9.5 to -2.5

power range (dBm)
Operating 1500 to 1580 1270 to 1355 770 to 860

wavelength range
(nm)

Parameter Value
Minimum overload -3 -3 0
(dBm)

(dBm)
Minimum extinction 9 9 9
ratio (dB)
Laser Safety Class


NOTE
specifications, and back-to-back specifications of the EMR0 board of the N2 version.
the case of overloading, latency specifications, and back-to-back specifications of the EMR0.
Tested Tested
Port 1 Port 2
Data network
performance
analyzer
Table 10-36 and Table 10-37 list the throughput specifications of the EMR0. Table 10-38 and
Table 10-39 list the packet loss ratio in the case of overloading of the EMR0. Table 10-40 and
Table 10-41 list the latency specifications of the EMR0. Table 10-42 and Table 10-43 list the
back-to-back specifications of the EMR0.

NOTE
are used.
l The specifications in the following tables are obtained in the following scenario: EVPL bidirectional
unicast services are configured and eight VC-4s are bound on the FE port, or EVPL bidirectional
unicast services are configured and eight VC-4s are bound on the GE port.
Table 10-36 lists the throughput specifications of the EMR0 (eight VC-4s are bound on the FE

Table 10-36 Throughput specifications of the EMR0 (eight VC-4s are bound on the FE port)

(Byte) (%) (01,06,06) (pks/ (01,06,05) (pks/ sec)
sec) sec)
64 100.00 148810 148810 297620
128 100.00 84459 84459 168918
256 100.00 45290 45290 90580
512 100.00 23496 23496 46992
1024 100.00 11973 11973 23946
1280 100.00 9615 9615 19230
1518 100.00 8127 8127 16254
Table 10-37 lists the throughput specifications of the EMR0 (eight VC-4s are bound on the GE


Table 10-37 Throughput specifications of the EMR0 (eight VC-4s are bound on the GE port)
(Byte) (%) (01,04,01) (pks/ (01,01,01) (pks/ sec)
sec) sec)
64 72.41 1077586 1077586 2155172
128 94.87 801282 801282 1602564
256 100.00 452899 452899 905798
512 100.00 234962 234962 469924
1024 100.00 119732 119732 239464
1280 100.00 96154 96154 192308
1518 100.00 81274 81274 162548
Table 10-38 lists the packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are
l Step rate: 10.00

Table 10-38 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound
on the FE port)
(Byte) (%) (01,06,06) (%) (01,06,05) (%)
64 100.00 0.000 0.000 0.000
128 100.00 0.000 0.000 0.000
256 100.00 0.000 0.000 0.000
512 100.00 0.000 0.000 0.000
1024 100.00 0.000 0.000 0.000
1280 100.00 0.000 0.000 0.000
1518 100.00 0.000 0.000 0.000
Table 10-39 lists the packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are
l Step rate: 10.00
Table 10-39 Packet loss ratio in the case of overloading of the EMR0 (eight VC-4s are bound
on the GE port)
(Byte) (%) (01,04,01) (%) (01,01,01) (%)
64 100.00 29.833 29.827 29.830
128 100.00 4.306 4.309 4.307
256 100.00 0.000 0.000 0.000
512 100.00 0.000 0.000 0.000
1024 100.00 0.000 0.000 0.000
1280 100.00 0.000 0.000 0.000
1518 100.00 0.000 0.000 0.000

Table 10-40 lists the latency specifications of the EMR0 (eight VC-4s are bound on the FE port).
forward mode.
l Step rate: 10.00
Table 10-40 Latency specifications of the EMR0 (eight VC-4s are bound on the FE port)
64 100.00 126.1 126.1 121.0 121.0
128 100.00 131.0 131.0 120.8 120.8
256 100.00 149.2 149.2 128.8 128.8
512 100.00 176.9 176.9 136.0 136.0
1024 100.00 237.0 237.0 155.1 155.1
1280 100.00 266.7 266.7 164.3 164.3
1518 100.00 289.3 289.3 167.9 167.9
Table 10-41 lists the latency specifications of the EMR0 (eight VC-4s are bound on the GE

forward mode.
l Step rate: 10.00
Table 10-41 Latency specifications of the EMR0 (eight VC-4s are bound on the GE port)

64 72.41 130.1 130.1 129.6 129.6
128 94.87 143.1 143.1 142.1 142.1
256 100.00 123.4 123.4 121.4 121.4
512 100.00 130.7 130.7 126.7 126.7
1024 100.00 154.4 154.4 146.3 146.3
1280 100.00 164.6 164.6 154.4 154.4
1518 100.00 174.4 174.4 162.3 162.3
Table 10-42 lists the back-to-back specifications of the EMR0 (eight VC-4s are bound on the
FE port). The values are obtained when the SmartApplication is set as follows:

l Step rate: 10.00

Table 10-42 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the FE port)

Frames) Frames)
64 100.00 297620 297620 595240
128 100.00 168918 168918 337836
256 100.00 90580 90580 181160
512 100.00 46992 46992 93984
1024 100.00 23946 23946 47892
1280 100.00 19230 19230 38460
1518 100.00 16254 16254 32508
Table 10-43 lists the back-to-back specifications of the EMR0 (eight VC-4s are bound on the
GE port). The values are obtained when the SmartApplication is set as follows:

l Step rate: 10.00
Table 10-43 Back-to-back specifications of the EMR0 (eight VC-4s are bound on the GE port)

Frames) Frames)
64 100.00 3410 3410 6820
128 100.00 29054 29054 58108
256 100.00 905798 905798 1811596
512 100.00 469924 469924 939848
1024 100.00 239464 239464 478928
1280 100.00 192308 192308 384616


Frames) Frames)
1518 100.00 162548 162548 325096
The mechanical specifications of the EMR0 are as follows:
l Weight (kg): 1.2
Power Consumption
The maximum power consumption of the EMR0 at room temperature (25°C) is 50 W.

Hardware Description 11 SAN Boards
11 SAN Boards
About This Chapter
The SAN boards are multi-service transparent transmission processing boards.
11.1 MST4
technical specifications of the MST4 (4-port multi-service transparent transmission board). This
topic also describes how to configure and commission the MST4.

11 SAN Boards Hardware Description
11.1 MST4
technical specifications of the MST4 (4-port multi-service transparent transmission board). This
topic also describes how to configure and commission the MST4.

The MST4 is available in one functional version, namely, N1.
11.1.2 Application
The MST4 is a multi-service transparent transmission board. The MST4 is used in remote
disaster recovery, remote backup and data centralization, and integration of storage resources.
The MST4 supports the access of multiple services, alarms, and other maintenance functions.
The MST4 consists of the client-side access module, FC protocol processing module,
encapsulation and mapping module, logic and control module, clock module, and power module.
11.1.5 Front Panel
The front panel of the MST4 has indicators, interfaces, and a bar code.
The MST4 does not have any jumpers or DIP switches that are used for board settings.
11.1.7 Valid Slots
The MST4 must be installed in a valid slot in the subrack. Otherwise, the MST4 cannot work
normally.
11.1.8 Feature Code
The feature code of the MST4 indicates the type of supported services, type of optical interface,
and transmission distance.
You can set parameters for the MST4 by using the U2000.


The specifications of the MST4 include the parameters specified for optical interfaces, laser
safety class, dimensions, weight, and power consumption.

The MST4 is available in one functional version, namely, N1.
11.1.2 Application
The MST4 is a multi-service transparent transmission board. The MST4 is used in remote
disaster recovery, remote backup and data centralization, and integration of storage resources.
The MST4 is used in the fields of the SAN services and video services. The MST4 can access
the FC100/FICON, FC200, ESCON, and DVB-ASI services, and provides the FC100 and FC200
services with the distance extension function. Hence, the MST4 is applicable to the long-distance
transmission of the FC services on the SDH network. In addition, the MST4 meets the
transmission requirements of the storage network and extends the types of services supported
by the equipment. Figure 11-1 shows the networking and application of the SAN services.
Figure 11-1 Networking and application of the SAN services
NE1 NE2
FC switch FC switch

The MST4 supports the access of multiple services, alarms, and other maintenance functions.
Table 11-1 provides the functions and features of the MST4.
Table 11-1 Functions and features of the MST4
Function and MST4

Feature
Basic functions Provides four independent ports to access multiple services.

Supports the transparent transmission of the SAN and Video services.
Connector type LC

Function and MST4

Feature
Optical module SFP

type
Service types l Supports FC100/FICON, FC200, ESCON, and DVB-ASI services.

Table 11-2 describes types and rates of the services.
l Accesses four-channel FC services (FC100/FICON and FC200) at the
same time, and the total bandwidth is less than 2.5 Gbit/s.
l Supports the full-rate transmission of FC services (one-channel FC200
services or two-channel FC100 services).
l Accesses four-channel ESCON or DVB-ASI services, and the total
bandwidth is less than 2.5 Gbit/s.
Distance The first and second ports support the distance extension function on the
extension SDH side.
l FC100 services: 3000 km
l FC200 services: 1500 km
Maximum 2.5 Gbit/s

uplink The backplane provides four 622 Mbit/s buses that are directly connected
bandwidth to the cross-connect unit.
The MST4 can adapt to the bandwidth of the slot.
Mapping Supports the VC4-Xc (X = 4, 8, or 16) granularity.

granularity
ESCON Accesses four-channel ESCON services, and the total bandwidth is less
services than 2.5 Gbit/s.
DVB-ASI Accesses four-channel DVB-ASI services, and the total bandwidth is less
services than 2.5 Gbit/s.
Encapsulation Supports the GFP-T protocol, which complies with ITU-T G.7041.
format
Maintenance Supports inloops and outloops on ports on the customer side, which can
features be used to locate faults quickly.
events
Table 11-2 Service types service rates supported by the MST4

Service Type Rate Remarks
FC100/FICON 1062.5 Mbit/s SAN service
FC200 2125 Mbit/s SAN service

Service Type Rate Remarks
ESCON 200 Mbit/s SAN service
DVB-ASI 270 Mbit/s Video service

The MST4 consists of the client-side access module, FC protocol processing module,
encapsulation and mapping module, logic and control module, clock module, and power module.
Figure 11-2 shows the functional block diagram of the MST4 by describing how to process
1xFC100 signals, 1xFC200 signals, 1xFICON signals, 1xDVB-ASI signals, or 1xESCON
signals.
Figure 11-2 Functional block diagram of the MST4

Backplane
FC1_ FC1_
FC2 SND Encap-
Client- RCV
FC100 sulation Cross-connect unit A/B
FC200 side Interface
FICON access FC1_ FC1_ Mapping converting
SND FC2 RCV Decap-
DVB-ASI module module Cross-connect unit A/B
ESCON sulation
FC protocol
processing module
Encapsulation and
mapping module
Communication
SCC unit
Logic and control module Reference clock and frame header
Cross-connect unit
100 MHz
125 MHz
135 MHz Clock
212.5 MHz module
622 MHz +3.3 V Power Fuse -48 V/-60 V
module Fuse
+3.3 V backup power
Client-Side Access Module

The client-side access module accesses FC100, FC200, FICON, DVB-ASI, and ESCON
services. The client-side interface unit performs O/E conversion for services and monitors the
optical signals on the client side.
In the upstream direction, the client-side data interface (CDI) receives serial data signals accessed
through the SFP optical module. The serial data signals are then transmitted to the PCS functional
module for physical layer and 8B/10B line performance monitoring.
In the downstream direction, 8B/ 10B conversion is performed for the signals from FC. The
signals are then adapted into client reference clocks by inserting or discarding idle packets. After
being converted from parallel signals into serial signals, the signals are transmitted through the
CDI interface to the optical module on the client side.

FC Protocol Processing Module

The FC protocol processing unit mainly extends the distance of FC service transmission. This
module supports the maximum transmission distance of 3000 km for 2xFC100 services or the
maximum transmission distance of 1500 km for 1xFC200 services.
The FC protocol processing unit performs FC1 layer and FC2 layer functions. The FC1 layer
functions include the following:
l 8B/10B conversion
l Synchronous processing
l Extraction of primitive signal and primitive sequence
The FC2 layer functions include the following:
l Check and counting of all special frames
l Modification of values of certain special frames (FLOG1, PLOG1, and ELP)
l CRC check
Encapsulation and Mapping Module

The encapsulation and mapping module mainly performs the following functions:
l Encapsulates and maps data.
l Decapsulates and demaps data.
According to the direction of the signal flow, the functional modules inside the chip can be
classified into modules in the ingress direction and modules in the egress direction. In the ingress
direction, signals from the client side to the line side are processed. In the egress direction, signals
from the line side to the client side are processed.
Ingress direction
Through GFP encapsulation, 64B/65B conversion is performed for data bytes after decoding.
The data bytes are then mapped in compliance with the GFP protocol.
Egress direction
SDH data frames are received from the line-side interface module. After overheads are
processed, GFP data frames are extracted from SDH concatenated channels and are then
transmitted to the decapsulation module for decapsulation.

controller. This module is connected to external circuits through buses. The logic and control
module manages and configures other modules of the board. This module contains basic logic
units and performs the following functions:


Clock Module
This module provides required reference clocks for boards. The clock frequency can be 100
MHz or 125 MHz.
Power Module
require.
11.1.5 Front Panel

The front panel of the MST4 has indicators, interfaces, and a bar code.

Figure 11-3 shows the appearance of the front panel of the MST4.

Figure 11-3 Front panel of the MST4
MST4
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
OUT1
IN1
OUT2
IN2
OUT3
IN3
OUT4
IN4
MST4
Indicators
Interfaces
The front panel of the MST4 has four pair of optical interfaces. Table 11-3 describes the types
and usage of the optical interfaces of the MST4.

Table 11-3 Optical interfaces of the MST4

Interface
IN1–IN4 LC Receives multi-service optical signals.
OUT1–OUT4 LC Transmits multi-service optical signals.

The MST4 does not have any jumpers or DIP switches that are used for board settings.
11.1.7 Valid Slots

The MST4 must be installed in a valid slot in the subrack. Otherwise, the MST4 cannot work
normally.
NOTE
l Slot bandwidth
l Board version
The MST4 can be installed in slots 5–8 and 11–13 in the subrack.
l When the cross-connect capacity is 20 Gbit/s, the MST4 can be installed in slots 5–8 and
11–13. When the MST4 is installed in slots 5 and 6, the bandwidth is 622 Mbit/s. When
the MST4 is installed in slots 7, 8, 11, and 12, the bandwidth is 2.5 Gbit/s. When the MST4
is installed in 13, the bandwidth is 1.25 Gbit/s.
l When the cross-connect capacity is 60 Gbit/s, the MST4 can be installed in slots 5–8 and
11.1.8 Feature Code

The feature code of the MST4 indicates the type of supported services, type of optical interface,
and transmission distance.
Table 11-4 provides the relationship between the feature code of the MST4, the type of supported
services, type of optical interface, and transmission distance.
Table 11-4 Relationship between the feature code of the MST4, the type of supported services,
type of optical interface, and transmission distance
Board Feature Type of Supported Services Transmission

Code (Type of Optical Interface) Distance
SSN1MST410 10 2xFC (SM) 2 km

Board Feature Type of Supported Services Transmission

Code (Type of Optical Interface) Distance
SSN1MST412 12 2xFC (MM) 0.5 km
SSN1MST413 13 4xESCON/DVB-ASI (SM) 15 km
SSN1MST414 14 4xESCON/DVB-ASI (MM) 2 km
SSN1MST415 15 1xFC2 (MM) -
ESCON/DVB-ASI (MM)
SSN1MST416 16 1xFC2 (MM) -
ESCON/DVB-ASI (SM)
2xESCON/DVB-ASI (SM) -
2xESCON/DVB-ASI (MM) -


matches the board.
is correct.
----End


Step 2 Required: Configure services. For details, see Configuring the SAN Service.
----End

Step 1 Required: Test the SAN service channel. For details, see 23.8 Testing the SAN Service
Channel.
----End

Boards.
Step 2 Required: Query the alarms of the board. Modify the connections or configurations of the board
according to the alarms until the alarms are cleared. For the method for querying the alarms of
a board, see Viewing the Current Alarms.
----End

You can set parameters for the MST4 by using the U2000.
You can set the following parameters for the MST4 by using the U2000:
l J1 byte
l C2 byte

Troubleshooting
Table 11-5 lists the faults that occur on the MST4 frequently and the troubleshooting methods.

Table 11-5 Methods used to troubleshoot the faults that occur on the MST4 frequently


abnormal.
Packet Loss.

fault occurs on a single service port. Interconnection Faults.
Replacing the Board

NOTE
replace the board.
For information on how to replace the MST4, see Replacing an SAN Board.

11.1.13.1 N1MST4
AU_AIS AU_CMM AU_LOP
BDID_ERROR COMMUN_FAIL HARD_BAD
HP_TIM HP_UNEQ IN_PWR_ABN
LASER_MOD_ERR LOOP_ALM LSR_COOL_ALM
LSR_NO_FITED LSR_WILL_DIE NO_BD_SOFT
NO_LSR_PARA_FILE PLL_FAIL POWER_ABNORMAL

R_LOC R_LOS TEM_LA
T_LOSEX TEM_HA PATCHFILE_NOTEXIST
TF TR_LOC PATCH_NOT_CONFIRM
PATCH_ERR SPARE_PATH_ALM SWDL_PKG_NOBDSOFT

11.1.14.1 N1MST4
AUPJCHIGH AUPJCLOW HPBBE
HPCSES HPES HPFEBBE
HPFECSES HPFEES HPFESES
HPSES HPUAS OSPICCVCUR
TPLMAX TPLMIN

The specifications of the MST4 include the parameters specified for optical interfaces, laser
safety class, dimensions, weight, and power consumption.

The optical interfaces of the MST4 can use several types of optical modules. Table 11-6 lists
the parameters specified for the optical interfaces of the MST4.
Table 11-6 Parameters specified for the optical interfaces of the MST4
Parameter Value
Type of optical X3.296/(DVB-ASI )

interface EN50083-9
200-M5-SN-I 200-SM-LC-I

Parameter Value
Part number of 34060277 34060287 34060325 34060288 34060278

optical module
Type of ESCON/DVB FC200, FC100

supported
services
Service rate STM-4 STM-1 2.125 Gbit/s STM-16
Type of fiber Single- Multi-mode Multi-mode Single- Single-

mode LC LC LC mode LC mode LC
Operating 1310 850 1310

wavelength
range (nm)
Transmission 15 2 0.5 2 15
distance (km)
Launched -15 to -8 -19 to -14 -9.5 to -2.5 -10 to -3 -5 to -3

optical power
range (dBm)
Receiver -31 -30 -17 -21

sensitivity
(dBm)
Minimum -8 -14 0 -3 0
overload (dBm)
The mechanical specifications of the MST4 are as follows:
l Weight (kg): 0.9
Power Consumption
The maximum power consumption of the MST4 at room temperature (25°C) is 26 W.

Hardware Description 12 Microwave Boards
12 Microwave Boards
About This Chapter
The microwave boards include the microwave intermediate frequency (IF) board IFSD1 and
microwave power board RPWR.
12.1 IFSD1
technical specifications of the IFSD1 (dual-port IF board). This topic also describes how to
configure and commission the IFSD1.
12.2 RPWR
technical specifications of the RPWR (6-channel ODU power board). This topic also describes
how to configure and commission the RPWR.
12.3 ODU
When the microwave board is used, it needs to work with the microwave outdoor unit (ODU).
The ODU types supported by the equipment are standard power (SP) and high power (HP).

12 Microwave Boards Hardware Description
12.1 IFSD1
technical specifications of the IFSD1 (dual-port IF board). This topic also describes how to
configure and commission the IFSD1.

The IFSD1 is available in one functional version, namely, N1.
12.1.2 Application
Working as the microwave module on the OptiX OSN equipment, the IFSD1 can receive and
transmit two IF signals and work with the OptiX RTN 600 to transmit microwave signals.
The IFSD1 transmits and receives two IF signals, provides the management channel to the ODU,
and supplies the –48 V power to the ODU.
The IFSD1 consists of the combiner interface module, IF processing module, MODEM module,
FPGA module, rate converting module, and communication and control module.
12.1.5 Front Panel
The front panel of the IFSD1 has indicators, interfaces, power switches, and labels.
The IFSD1 does not have any jumpers or DIP switches that are used for board settings.
12.1.7 Valid Slots
The IFSD1 must be installed in a valid slot in the subrack. Otherwise, the IFSD1 cannot work
normally.
12.1.8 Feature Code
The IFSD1 does not have the feature code.
The IFSD1 supports the 1+1 HSB/FD/SD protection and N+1 protection.
You can set parameters for the IFSD1 by using the U2000 LCT and U2000.


The technical specifications of the IFSD1 include the IF performance, baseband signal
processing performance, board mechanical specifications, and power consumption.

The IFSD1 is available in one functional version, namely, N1.
12.1.2 Application
Working as the microwave module on the OptiX OSN equipment, the IFSD1 can receive and
transmit two IF signals and work with the OptiX RTN 600 to transmit microwave signals.
The OptiX OSN equipment can be configured with multiple IFSD1 boards according to the
service configuration so that the microwave services in multiple directions can be connected.
Figure 12-1 shows the position of the OptiX OSN equipment that is configured with the IFSD1
in the network.
Figure 12-1 Position of the OptiX OSN equipment that is configured with the IFSD1 in the
network
SDH/PDH
IFSD1: 11-13
STM-64/STM-16/STM-4 ring
SDH/PDH
SDH/PDH
OptiX OSN OptiX optical

OptiX RTN 600
equipment transmission product

The IFSD1 transmits and receives two IF signals, provides the management channel to the ODU,
and supplies the –48 V power to the ODU.
Table 12-1 provides the functions and features of the IFSD1.

Table 12-1 Functions and features of the IFSD1

Function and IFSD1
Feature
Basic functions Supports 2xSTM-1 SDH or PDH IF signals and management control
signals between the IDU and ODU, and supplies power to the ODU.
IF processing l Maps PDH signals and SDH signals into IF signals.

l Codes and decodes IF signals.
l Modulates and demodulates IF signals.
l Modulates and demodulates ODU control signals.
l Combines and splits service signals, ODU control signals, and –
48 V power supplies.
Microwave features l Supports the software programmable radio (SPR) function. That
is, you can set the microwave capacity and modulation scheme by
using the software.
l Supports the microwave frame that is based on the tributary and
STM-1, and hence supports the interconnection with the OptiX
OSN products or the OptiX RTN 600 products that support this
type of microwave frame through the air interface.
l Supports the automatic transmit power control (ATPC) function.
Service processing Supports the configuration of VC-12, VC-3, and VC-4 services.
Overhead processing l Processes the section overheads of the STM-1 IF signals.

overheads of the STM-1 IF signals.
l Supports the setting and query of the J1 and C2 bytes.
Pointer processing l Processes AU pointers of SDH IF signals.

l Processes TU pointers of PDH IF signals.

l 1+1 HSB
l 1+1 FD
l 1+1 SD
l N+1 Protection
l Microwave lower order SNCP

Function and IFSD1

Feature
Maintenance l Supports loopbacks on VC-4 paths.

features l Supports loopbacks on IF ports.
l Supports the detection of the board temperature.
affect the services.
l Supports the query of the version information of the board.
l Supports the detection of the hardware fault.

The IFSD1 consists of the combiner interface module, IF processing module, MODEM module,
FPGA module, rate converting module, and communication and control module.
This topic considers the processing of one IF signal that is sent from the ODU as an example to
describe the working principle and signal flow of the IFSD1.
Figure 12-2 shows the functional block diagram of the IFSD1.
Figure 12-2 Functional block diagram of the IFSD1

Backplane
FPGA module
converting
M
Rate
U Cross-connect
X/ unit
IF D
IF Combiner processing MODEM SMOD E Overhead
ODU interface EM s related
module module M
module Overhead to HSM
U Board in the paired slot
X processing SCC
-48 V
Clock
module Communication and SCC
control module SCC
Power
module
Service bus IF signal ODU control signal

Overhead bus Control bus Communication bus
-48 V power supply
Signal Processing Flow in the Transmit Direction

After the service signals are processed by the rate converting module, the signals from the cross-
connect unit are sent to the MUX/DEMUX module of the FPGA module where the signals are

scrambled and the overhead byte and pointer are set. Then, the signals are sent to the MODEM
module for FEC coding and digital modulation and to the IF processing module for D/A
converting and analog modulation. The ODU control signals sent from the logic and control
module are sent to the combiner interface module after being modulated by the SMODEM
module. Finally, the IF signals, ODU control signals, and –48 V power supplies are combined
at the combiner interface module and then sent to the ODU over IF cables.
Signal Processing Flow in the Receive Direction

The combiner interface module divides the ODU control signals and IF signals from the received
IF signals. The ODU control signals are sent to the SMODEM module for demodulation and
then to the logic and control module. The IF signals are sent to the IF processing module for
filtering and A/D converting and then to the FPGA module for demultiplexing and overhead
processing. Then, the signals are sent to the rate converting module. Finally, the signals are sent
to the cross-connect unit.
Auxiliary Modules
The auxiliary modules include the logic and control module, clock module, and power module.
The functions of these modules are as follows:
l Logic and control module
This module realizes the alarm display, performance monitoring, and communication with the
system control and communication board and the other boards through the Ethernet interface.
In addition, this module provides two pairs of RS485 data buses and can provide quick response
in real time. This module supports the in-service loading of programs.
l Clock module
– Extracts the clock from the received signal and sends the 8 KHz clock to the clock unit.
– Supports the 38 MHz system clock in the transmit direction.
l Power module
– Provides two –48 V power input interfaces and supports the DC power supply whose
input voltage ranges from –38.4 V to –72 V.
– Provides DC power supplies for all the modules on the IFSD1.
– Monitors all the power supplies for the IFSD1 and reports alarms in the case of a board
voltage abnormality.
– Provides one –48 V DC power supply for the ODU.
12.1.5 Front Panel

The front panel of the IFSD1 has indicators, interfaces, power switches, and labels.

Figure 12-3 shows the appearance of the front panel of the IFSD1.

Figure 12-3 Front panel of the IFSD1
IFSD1
STAT
PROG
SRV
LINK1
ODU1
ACT1
LINK2
ODU2
ACT2
TURNOFFPOWERBEFORE
-48V OUTPUT
DISCONNECTING IF CABLE
!
WARNING
IF1
ODU-PWR1
I
O
PWR1
PWR2
ODU-PWR2
I
IF2
IFSD1
Indicators
l Active/Standby state indicator (ACT1) – one color (green)
l Active/Standby state indicator (ACT2) – one color (green)
l Connection status indicator 1 (LINK1) – two colors (red and green)
l Connection status indicator 2 (LINK2) – two colors (red and green)
l Working indicator of ODU 1 (ODU1) – two colors (red and green)
l Working indicator of ODU 2 (ODU2) – two colors (red and green)

Interfaces
Table 12-2 Interfaces of the IFSD1

Interface Description Usage
IF1 IF port 1 IF port 1 refers to the IF interface between the

IDU and the ODU. This port transmits the
signal that combines the IF service signal,
ODU control signal, and –48 V power supply
required by the ODU. A single type-N IF
cable is used for connection.
IF2 IF port 2 IF port 2 refers to the IF interface between the

IDU and the ODU. This port transmits the
signal that combines the IF service signal,
ODU control signal, and –48 V power supply
required by the ODU. A single N-Type IF
cable is used for connection.
PWR1 Power interface 1 The power supply provided by the RPWR is

transferred by the combiner unit of the IF
board to supply power to the ODU. The IF
board can provide a maximum through-
current of 1.76 A for the ODU. The PWR1
interface must be connected to the dedicated
power cable that is delivered with the
equipment.
PWR2 Power interface 2 The power supply provided by the RPWR is

transferred by the combiner unit of the IF
board to supply power to the ODU. The IF
board can provide a maximum through-
current of 1.76 A for the ODU. The PWR2
interface must be connected to the dedicated
power cable that is delivered with the
equipment.
ODU-PWR1a ODU power switch 1 Turns on or turns off the –48 V DC power
supply for the ODU.
ODU-PWR2a ODU power switch 2 Turns on or turns off the –48 V DC power
supply for the ODU.
CAUTION
a: The ODU-PWR1 and ODU-PWR2 switches are equipped with lockup devices. To move the
switch, you need to pull the switch lever partially. When the switch is set to "O", it indicates that
the circuit is open. When the switch is set to "I", it indicates that the circuit is closed.

Labels
The front label has a high temperature warning label and an operation warning label.
The high temperature warning label indicates that the board surface temperature may exceed
70°C when the ambient temperature is higher than 55°C. In this case, you need to wear protective
gloves before touching the board.
The operation warning label indicates that the ODU power switch must be turned off before the
IF cable is removed.

The IFSD1 does not have any jumpers or DIP switches that are used for board settings.
12.1.7 Valid Slots

The IFSD1 must be installed in a valid slot in the subrack. Otherwise, the IFSD1 cannot work
normally.
The IFSD1 can be installed in slots 5–8 and 11–13 in the subrack.
12.1.8 Feature Code

The IFSD1 does not have the feature code.

The IFSD1 supports the 1+1 HSB/FD/SD protection and N+1 protection.


Step 1 Required: Check the appearance of the board. Ensure that the board is not damaged.
l The front panel and the steel plate in the rear must not be deformed.
l There must be no unexpected sound when you shake the board gently.
l The screws on the daughter board must be tightened.
l The power switch of the ODU must be intact and be in the OFF position.

is correct.
Step 5 Required: Check whether the cable between the IF board and the power board (N1RPWR) and
the cable between the IF board and the ODU are properly connected. In addition, check whether
the accessories such as antennas are installed.
Step 6 Required: Switch on the ODU and check whether the ODU starts to work.
----End

Step 1 Required: Add a logical board for the IF board and ODU. For details, see Adding Boards.
Step 2 Required: Set the interface parameters of the ODU. For details, see Configuring Parameters of
ODU Interfaces.
Step 3 Required: Configure the IF/ODU information. For details, see Configuring the IF/ODU
Information of a Radio Link.
Step 4 Required: Set the parameters of the IF interface. For details, see Setting the Parameters of the
IF Interface.
Step 5 Required: Configure the SDH or PDH services. For details, see Configuring the SDH/PDH
Services (on a Per-NE Basis).
Step 6 Required: Create the IF protection. For details, see Creating IF 1+1 Protection or Creating an
N+1 Protection Group (perform this operation according to actual requirements).
----End

Step 1 Required: Query the current alarms of the IF board and ODU. For details, see Querying Current
Alarms for the IF Board and ODU.
Step 2 Required: Align the antennas. For details, see Aligning the Antennas.
Step 3 Required: Log in to the NE on the opposite end. For details, see Logging In to the Opposite
NE.
Step 4 Required: Query the receive power of the ODU. For details, see Aligning the Single-Polarized
Antennas.
Step 5 Optional: Test the 24–hour BER. For details, see Testing the Point-to-Point BER.
Step 6 Optional: Test the IF protection switching. For details, see Testing the protection switch.
----End

Boards.

the Current Alarms.
----End

You can set parameters for the IFSD1 by using the U2000 LCT and U2000.
You can set the following parameters for the IFSD1 by using the network management system:
l Radio work mode
l Radio link ID
l ATPC attributes
l J1 byte
The J1 byte is applicable to SDH microwave only. The other parameters are applicable to both
PDH and SDH microwaves.
Radio Work Mode
Table 12-3 Radio work modes

Service Capacity Modulation Scheme Channel Spacing (MHz)
4xE1 QPSK 7
4xE1 16QAM 3.5
8xE1 QPSK 14 (13.75)
8xE1 16QAM 7
16xE1 QPSK 28 (27.5)
16xE1 16QAM 14 (13.75)
22xE1 32QAM 14 (13.75)
26xE1 64QAM 14 (13.75)
35xE1 16QAM 28 (27.5)
44xE1 32QAM 28 (27.5)
53xE1 64QAM 28 (27.5)
STM-1 128QAM 28 (27.5)

NOTE
l The channel spacings 13.75 MHz and 27.5 MHz are applied to the 18 GHz frequency band.
l The channel spacings provided in the table are the minimum channel spacings supported by the OptiX OSN
equipment series. The channel spacings equal to or larger than the values are also supported.
Radio Link ID
The radio link ID is an identification of the radio link. The transmit end sends the radio link ID
byte continuously so that the receive end can learn that the transmit end is in a constant
connection state. If the receive end detects a mismatch of the radio link ID, the receive end inserts
the all "1"s signal and the corresponding IF port reports the MW_LIM alarm.
ATPC Attributes
The ATPC is a technology that automatically adjusts the transmit power of the transmitter
according to the attenuation of the received signal level (RSL) at the receive end. The ATPC
attributes include the following parameters:
l ATPC enable status

This parameter specifies whether the NE enables the ATPC function to control the transmit
power of the transmitter. By default, the ATPC function is disabled.
l ATPC upper threshold
When the RSL at the receive end is higher than the set value of this parameter, the receive
end notifies the transmit end to reduce the transmit power by using the ATPC overhead in
the microwave frame. The decrement depends on the value of the ATPC adjustment
parameter.
l ATPC lower threshold
When the RSL at the receive end is lower than the set value of this parameter, the receive
end notifies the transmit end to increase the transmit power by using the ATPC overhead
in the microwave frame. The increment depends on the value of the ATPC adjustment
parameter.
l ATPC adjustment
This parameter specifies the decrement/increment of an ATPC adjustment.
NOTE
The ATPC adjustment cannot exceed the range of the ODU transmit power.
J1 Byte
The IFSD1 board supports four byte modes, which are as follows:
l Single-byte mode
l 16-byte mode with CRC
l 16-byte mode without CRC
l 64-byte mode
By default, the IFSD1 board does not monitor the received J1 byte. That is, the J1 byte to be
received is set to the disabled mode. The J1 byte to be sent is a 16-byte string with CRC. The
first byte is created automatically and the following 15 bytes are the ASCII codes "HuaWei SBS
". The last five characters of the string are blank spaces.


Troubleshooting
For the faults that occur on the IFSD1 frequently, the common fault causes, and the
troubleshooting methods, see Troubleshooting Microwave Links.
Replacing the Board

NOTE
replace the board.
For information on how to replace the IFSD1, see Replacing the IF Board.

12.1.13.1 N1IFSD1
B1_SD B2_EXC B2_SD
B3_EXC B3_SD BDID_ERROR
BD_STATUS CHIP_ABN COMMUN_FAIL
FSELECT_STG HARD_BAD HP_CROSSTR
HP_LOM HP_RDI HP_REI
IF_CABLE_OPEN LOOP_ALM MS_AIS
MS_CROSSTR MS_RDI MS_REI
MSAD_CROSSTR MW_BER_EXC MW_BER_SD
MW_FEC_UNCOR MW_LIM MW_LOF
MW_RDI NO_BD_SOFT PLL_FAIL
R_LOC R_LOF R_LOS
RS_CROSSTR SLAVE_WORKING TEMP_ALARM
TR_LOC VOLT_LOS POWER_ABNORMAL

SWDL_PKG_NOBD-
SOFT

12.1.14.1 N1IFSD1
FEC_BEF_COR_ER FEC_COR_BYTE_CNT HPBBE
HPCSES HPES HPFEBBE
HPFECSES HPFEES HPFESES
HPFEUAS HPSES HPUAS
MSBBE MSCSES MSES
MSFESES MSFEUAS MSSES
MSUAS RSBBE RSCSES
RSES RSOFS RSOOF
RSSES RSUAS XCSTMPMAX
XCSTMPMIN XCSTMPCUR

The technical specifications of the IFSD1 include the IF performance, baseband signal
processing performance, board mechanical specifications, and power consumption.
Microwave Capacity
One IFSD1 board can access microwave signals in both directions. The capacity of microwave
signals in each direction depends on the radio work mode of these microwave signals. For details
about the radio work modes, see 12.1.11 Parameter Settings.

IF Performance
Table 12-4 IF performance
Item Performance
IF signal
Transmit frequency of the IF 350

board (MHz)
Receive frequency of the IF 140

board (MHz)
Impedance (ohm) 50
ODU O&M signal
Modulation scheme ASK
Transmit frequency of the IF 5.5

board (MHz)
Receive frequency of the IF 10

board (MHz)
Baseband Signal Processing Performance of the Modem
Table 12-5 Baseband signal processing performance of the modem
Item Performance
Coding mode l Uses Reed-Solomon (RS) coding for PDH signals.

l Uses Trellis-Coded Modulation (TCM) and RS two-level coding
for SDH signals.
Adaptive time- Consists of the feed forward equalizer filter and decision feedback
domain equalizer for equalizer.
baseband signals
Mechanical Specification
The mechanical specifications of the IFSD1 are as follows:

l Weight (kg): 1.1
Power Consumption
The maximum power consumption of the IFSD1 at room temperature (25°C) is 24 W.

12.2 RPWR
technical specifications of the RPWR (6-channel ODU power board). This topic also describes
how to configure and commission the RPWR.

The RPWR is available in one functional version, namely, N1.
12.2.2 Application
The RPWR is a power access board and is not related to the service features. The RPWR,
however, must be configured if the product needs to provide the IF feature. The RPWR accesses
two –38.4 V to –72 V DC power supplies, provides the IFSD1 with six independent –48 V power
supplies, and finally feeds power to the ODU after the IFSD1 processes the six –48 V power
supplies.
The RPWR accesses two –48 V/–60 V DC power supplies and supplies the –48 V power to six
ODUs.
The RPWR consists of the combiner module, protection module, filtering module, DC/DC power
module (that is, power module), and status detection module.
12.2.5 Front Panel
The front panel of the RPWR has indicators, power input interfaces, and power output interfaces.
The RPWR does not have any jumpers or DIP switches that are used for board settings.
12.2.7 Valid Slots
The RPWR must be installed in a valid slot in the subrack. Otherwise, the RPWR cannot work
normally.
12.2.8 Feature Code
The RPWR does not have the feature code.
The RPWR is not loaded with the software. Hence, the RPWR does not report an alarm.
The RPWR is not loaded with the software. Hence, the RPWR does not report a performance
event.
The technical specifications of the RPWR include the mechanical specifications, power
consumption, input voltage, and specifications of the fuse.


The RPWR is available in one functional version, namely, N1.
12.2.2 Application
The RPWR is a power access board and is not related to the service features. The RPWR,
however, must be configured if the product needs to provide the IF feature. The RPWR accesses
two –38.4 V to –72 V DC power supplies, provides the IFSD1 with six independent –48 V power
supplies, and finally feeds power to the ODU after the IFSD1 processes the six –48 V power
supplies.
Figure 12-4 shows the position of the OptiX OSN equipment that is configured with the RPWR
in the network.
Figure 12-4 Position of the OptiX OSN equipment that is configured with the RPWR in the
network
SDH/PDH
RPWR: 11-13
STM-64/STM-16/STM-4 ring
SDH/PDH
SDH/PDH
OptiX OSN OptiX optical

OptiX RTN 600
equipment transmission product

The RPWR accesses two –48 V/–60 V DC power supplies and supplies the –48 V power to six
ODUs.
Table 12-6 provides the functions and features of the RPWR.

Table 12-6 Functions and features of the RPWR

Function and RPWR
Feature
Input power l Provides the –48 V power supply after converting the –48 V DC
power supply, which is realized through the internal power module.
l Accesses the –48 V/–60 V DC power system. The voltage of the
two input DC power supplies ranges from –38.4 V to –72 V.
Combiner function Combines the power supplies.
Protection against Provides protection against lightning, surge, and short-circuit.

lightning, surge,
and short-circuit
Protection In the case of the DC power interface, the differential-mode voltage

function must be more than 2 kV and the common-mode voltage must be more
than 4 kV.
Filtering function Provides the filtering for the power interface and has the structural
shielding that improves the electromagnetic compatibility.
Power output Provides six –48 V power supplies for the ODU. The maximum power
consumption of each power supply is 60 W.
Alarm and Provides one board operation indicator.

indication l When the indicator turns red, it indicates that one or more power
modules are faulty.
l When the indicator is on and green, it indicates that the board works
normally and no alarms are reported.
Power supply The input of the power board supports the 1+1 hot backup. The output
backup of the power module has no backup.

The RPWR consists of the combiner module, protection module, filtering module, DC/DC power
module (that is, power module), and status detection module.
Figure 12-5 shows the functional block diagram of the RPWR.

Figure 12-5 Functional block diagram of the RPWR
Power IF port 1
Fuse 1 module 1
Power IF port 2
Fuse 2 module 2
-48V_1
Power
Fuse 3 module 3 IF port 3
Combiner Protection Filtering Soft start
-48V_2 module module module module
Fuse 4 Power IF port 4
module 4
Power
Power
Board operation Status Optical Six channels

indicator detection coupling
module isolation
Signal Flow
The two –48 V power supplies pass through the combiner, protection, filtering, soft start, and
power modules after they are accessed to the power board. The voltage converting operation is
performed on the two –48 V power supplies at the power module (using the DC_I and DC_C
grounding mode). Then, six isolated ODU power supplies are sent to the IF board for processing
and finally are used to supply power to ODUs.
Status Detection Module

The status detection module checks whether the output power supply exists and reports the real
condition so that the STAT indicator indicates the condition. When the STAT indicator turns
red, it indicates that one ore more power modules are faulty. When the STAT indicator is on and
green, it indicates that the power supply works normally.
Power Module
The two –48 V power supplies enter the DC/DC power converting module after they traverse
the protection, filtering, and soft start modules. The power supplies are isolated by the internal
transformer of the power module so that six independent stable power supplies can be sent to
the status detection module and finally to the IF board.
12.2.5 Front Panel

The front panel of the RPWR has indicators, power input interfaces, and power output interfaces.

Figure 12-6 shows the appearance of the front panel of the RPWR.

Figure 12-6 Front panel of the RPWR
RPWR
STAT
NEG(-)
RTN(+)
NEG(-)
RTN(+)
POWER1
POWER2
POWER3
POWER4
POWER4
POWER4
RPWR
Indicators
The front panel of the board has one indicator as follows: board hardware status indicator (STAT)
– two colors (red and green)
For the meanings of the status of the indicator, see 19 Indicators.
Interfaces
The front panel of the RPWR has two power input interfaces and six power output interfaces.
Table 12-7 describes the types and usage of the interfaces of the RPWR.

Table 12-7 Interfaces of the RPWR
PWR1 –48 V power input interface Accesses the –48 V power supply.
PWR2 –48 V power input interface Accesses the –48 V power supply.
POWER1– –48 V power output interface Supplies the –48 V power to the IF
POWER6 board for processing. Then, the IF
board supplies the power to the ODU.

The RPWR does not have any jumpers or DIP switches that are used for board settings.
12.2.7 Valid Slots

The RPWR must be installed in a valid slot in the subrack. Otherwise, the RPWR cannot work
normally.
The RPWR can be installed in slots 5–8 and 11–13 in the subrack.
12.2.8 Feature Code

The RPWR does not have the feature code.


Step 1 Required: Check the appearance of the board. Ensure that the board is not damaged. The front
panel and the steel plate in the rear must not be deformed.
Step 3 Required: Check the connection of the hardware.

l The subrack power cable must be correctly connected to the RPWR in the corresponding
subrack. The connector of the subrack power cable must be tightened. If the connector is not
tightened, use a screwdriver to tighten the screws on the connector.
l The power cable between the RPWR and the IF board must be correctly connected and
tightened.

For the connection between the RPWR and the subrack power cable and the connection of the
cable between the RPWR and the IFSD1, see "Installing and Routing IF Cables – Connection
of IF Cables" in Quick Installation Guide.
Step 4 Required: Check the status of the indicator of the board. The indicator should be on and green,
which indicates that the board works normally.
----End

Step 1 The RPWR need not be configured on the U2000.
----End

Step 1 Required: Use a multimeter to test the resistance between the –48 V interface and the BGND
interface of the DB3 cable connector. In normal cases, the resistance is not zero and is less than
100 Kohms. In this case, you can power on the RPWR.
Step 2 Check the color of the indicator of the RPWR. If the indicator is green, the RPWR works
normally. If the indicator is red, the RPWR is faulty.
----End

Step 1 Check whether the system works normally after the system is powered on.
----End

Troubleshooting
The power module output fault occurs on the RPWR frequently. When the power module output
fault occurs, the indicator is on and red, indicating an alarm. To rectify the fault, replace the
RPWR.
NOTE
The RPWR does not report the fault alarm signal and only turns on the alarm indicator.
Replacing the Board

NOTE
replace the board.
For information on how to replace the RPWR, see Replacing the Power Supply Board of the
ODU.


The RPWR is not loaded with the software. Hence, the RPWR does not report an alarm.

The RPWR is not loaded with the software. Hence, the RPWR does not report a performance
event.

The technical specifications of the RPWR include the mechanical specifications, power
consumption, input voltage, and specifications of the fuse.
The mechanical specifications of the RPWR are as follows:

l Weight (kg): 1.4
Power Consumption
The maximum power consumption of the RPWR at room temperature (25°C) is 45 W.
Input Voltage
The input voltage range of the RPWR is as follows:
l If the standard voltage of the accessed power supply is -48 V, the voltage of the power
supply ranges from -38.4 V to -57.6 V.
l If the standard voltage of the accessed power supply is -60 V, the voltage of the power
supply ranges from -48 V to -72 V.
Specifications of the Fuses

Two types of fuses are available for the main circuit and power modules of the RPWR.
l Specifications of the fuse for the main circuit are as follows: fast blow fuse, 250 V, 20 A,
UL certificated, 0.00355 ohms, 631 A x A x second, UL/CSA/METI
l Specifications of the fuse for the power modules of the RPWR are as follows: slow blow
fuse, surface-mounted fuse, 125 V, 4 A, UL certificated, 0.023 ohms, 23 A x A x second,
UL.
12.3 ODU
When the microwave board is used, it needs to work with the microwave outdoor unit (ODU).
The ODU types supported by the equipment are standard power (SP) and high power (HP).
For more information on the ODU, see the ODU Hardware Description.

Hardware Description 13 WDM Boards
13 WDM Boards
About This Chapter
The WDM boards include the CMR2, CMR4, MR2, MR2A, MR2B, MR2C, MR4, LWX, and
FIB.
13.1 CMR2
technical specifications of the TN11CMR2 (2-channel optical add/drop multiplexing board).
13.2 CMR4
13.3 MR2
technical specifications of the TN11MR2 (2-channel optical add/drop multiplexing board).
13.4 MR2A
technical specifications of the MR2A (2-channel optical add/drop multiplexing board).
13.5 MR2B
technical specifications of the MR2B (2-channel optical add/drop multiplexing board).
13.6 MR2C
technical specifications of the MR2C (2-channel optical add/drop multiplexing board).
13.7 MR4
13.8 LWX
technical specifications of the LWX (arbitrary bit rate wavelength conversion board).
13.9 FIB

13 WDM Boards Hardware Description
technical specifications of the FIB (filter isolating board).

13.1 CMR2

The CMR2 is available in one functional version, namely, TN11.
13.1.2 Application
The CMR2 is mainly used to add/drop and multiplex two channels of wavelength signals to/
from the multiplexed signals.
The CMR2 is applied to the coarse wavelength division multiplexing (CWDM) system. The
channel spacing is 20 nm. The CMR2 supports the add/drop multiplexing function and channel
expansion function.
The CMR2 consists of the OADM module, communication and control module, and power
module.
13.1.5 Front Panel
The front panel of the CMR2 has indicators, interfaces, and a laser safety class label.
13.1.6 Valid Slots
The CMR2 can be installed in slots 5–8 and 11–13 in the subrack.
13.1.7 Feature Code
The feature code of the CMR2 contains eight characters, which indicate the wavelengths of the
two channels of optical signals processed by the CMR2.
The technical specifications of the CMR2 include the parameters specified for optical interfaces,

13.1.2 Application
The CMR2 is mainly used to add/drop and multiplex two channels of wavelength signals to/
Figure 13-1 shows the application of the CMR2 in the CWDM system.

Figure 13-1 Application of the CMR2 in the CWDM system
Optical transmission
CMR2 CMR2
network
Line Line Line

board board board
Remarks: The line board in this figure supports CWDM wavelength signals.

The CMR2 is applied to the coarse wavelength division multiplexing (CWDM) system. The
channel spacing is 20 nm. The CMR2 supports the add/drop multiplexing function and channel
expansion function.
Table 13-1 provides the functions and features of the CMR2.
Table 13-1 Functions and features of the CMR2

Function and CMR2
Feature
Basic functions Adds/Drops and multiplexes two signals to/from the multiplexed
signals.
Channel expansion Provides the interface to cascade another optical add/drop

multiplexing board to realize the expansion of the add/drop channel.

module.
Figure 13-2 shows the functional block diagram of the CMR2.

Figure 13-2 Functional block diagram of the CMR2
D1 D2 MO MI A1 A2
Drop optical Add optical

IN OUT
module module
OADM optical
module
Control
Memory CPU Communication

Control and communication module
Power supply
module
Fuse Required
voltage
Backplane
DC power supply (controlled by SCC)
from a backplane SCC
The CMR2 contains the OADM module that adds, drops, and multiplexes two channels of
signals. In addition, the CMR2 provides the interface to cascade another optical add/drop
multiplexing board to increase the add/drop capability. The CMR2 is a passive board and does
not have an interface with the backplane.
OADM Module
The board receives one multiplexed optical signal that is sent by the upstream station on the IN
interface. Then, the drop optical module drops two wavelengths from the signal through optical
interfaces D01 and D02. The two dropped wavelengths are transmitted through the MO optical
interface.
The board receives one multiplexed signal that travels over the main optical path on the MI
optical interface. Then, the add optical module adds two wavelengths through optical interfaces
A01 and A02 and multiplexes them with the signal on the main optical path into one signal. This
multiplexed signal is transmitted through the OUT interface.

l Controls the operations of the entire board.
l Collects the following information of each functional module of the board: alarms,
performance events, working status, and voltage detection.
l Communicates data with the SCC.

DC/DC Converter
It converts –48 V DC or –60 V DC into a voltage required by each module of the board.
13.1.5 Front Panel


Figure 13-3 shows the appearance of the front panel of the CMR2.
Figure 13-3 Front panel of the CMR2
CMR2
STAT
LASER
RADIATION
DO NOT VIEW DIRECTLY
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT
IN
MO
MI
D1
A1
D2
A2
CMR2
Indicator
The front panel of the CMR2 has one indicator as follows: board hardware status indicator
(STAT) – two colors (red and green)

Interfaces
The front panel of the CMR2 has eight optical interfaces. Table 13-2 describes the types and
usage of the optical interfaces of the CMR2.
Table 13-2 Optical interfaces of the CMR2

Interface
A1–A2 LC Receives the signals sent from the optical wavelength

converting board or centralized client-side equipment.
D1–D2 LC Transmits signals to the optical wavelength converting board

or centralized client-side equipment.
IN LC Receives the multiplexed signals.
OUT LC Transmits the multiplexed signals.
MO LC Works as a cascading output optical interface and is connected

to the input optical interface of an OADM board.
MI LC Works as a cascading input optical interface and is connected

to the output optical interface of an OADM board.
13.1.6 Valid Slots

13.1.7 Feature Code

two channels of optical signals processed by the CMR2.
Table 13-3 describes the feature code of the CMR2.
Table 13-3 Feature code of the CMR2

Feature Code Indication Description
First four characters Wavelength of optical Indicates the wavelength of

signals the first channel of optical
signals processed by the
CMR2.
Last four characters Wavelength of optical Indicates the wavelength of

signals the second channel of optical
signals processed by the
CMR2.

Consider the TN11CMR2 whose feature code is "14711571" as an example. The meaning of
the feature code of the TN11CMR2 is as follows:
l "1471" indicates that the wavelength of the first channel of optical signals is 1471 nm.
l "1571" indicates that the wavelength of the second channel of optical signals is 1571 nm.


Table 13-4 lists the parameters specified for the optical interfaces of the CMR2.
Table 13-4 Parameters specified for the optical interfaces of the CMR2
Optical Parameter Value

Interface
- Operating wavelength range 1271 to 1611

(nm)
- Channel spacing (nm) 20
IN-D1 0.5 dB passband bandwidth ≥ ±6.5

IN-D2 (nm)
Insertion loss (dB) on the ≤ 1.5

drop channel
Adjacent channel isolation > 25

(dB)
Non-adjacent channel > 35

isolation (dB)
A1-OUT 0.5 dB passband bandwidth ≥ ±6.5

A2-OUT (nm)
Insertion loss (dB) on the add ≤ 1.5

channel
IN-MO Insertion loss (dB) ≤ 1.0

MI-OUT
Isolation (dB) > 13
- Return loss (dB) > 40
Laser Safety Class

The safety class of the laser on the board is Class 1M. The maximum launched optical power of
the optical interfaces is within the range from 10 dBm (10 mW) to 22.15 dBm (164 mW).

The mechanical specifications of the CMR2 are as follows:
l Weight (kg): 0.8
Power Consumption
The power consumption of the CMR2 at room temperature (25°C) is 0 W.
13.2 CMR4

13.2.2 Application
The CMR4 is mainly used to add/drop and multiplex four channels of wavelength signals to/
The CMR4 is applied to the CWDM system. The channel spacing is 20 nm. The CMR4 supports
the add/drop multiplexing function and channel expansion function.
module.
13.2.5 Front Panel
13.2.6 Valid Slots
13.2.7 Feature Code
four channels of optical signals processed by the CMR4.

13.2.2 Application
The CMR4 is mainly used to add/drop and multiplex four channels of wavelength signals to/
Figure 13-4 shows the application of the CMR4 in the CWDM system.

Figure 13-4 Application of the CMR4 in the CWDM system
CMR4 network CMR4
Line Line Line Line

board board board board
Remarks: The line board in this figure supports CWDM wavelength signals.

The CMR4 is applied to the CWDM system. The channel spacing is 20 nm. The CMR4 supports
Table 13-5 provides the functions and features of the CMR4.
Table 13-5 Functions and features of the CMR4

Function and CMR4
Feature
Basic functions Adds/Drops and multiplexes four signals to/from the multiplexed
signals.


module.
Figure 13-5 shows the functional block diagram of the CMR4.

Figure 13-5 Functional block diagram of the CMR4

D01 D02 D03 D04 MO MI A01 A02 A03 A04
IN Drop Add OUT
OADM module
Communication and control module
Pow er module
DC/DC
converter
Delayed
startup
Fuse
SCC
Backplane
-48 V/-60 V -48 V/-60 V SCC
OADM Module
interface. Then, the drop optical module drops four wavelengths from the signal through optical
interfaces D01–D04. The four dropped wavelengths are transmitted through the MO optical
interface.
optical interface. Then, the add optical module adds four wavelengths through optical interfaces
A01–A04 and multiplexes them with the signal on the main optical path into one signal. This

DC/DC Converter

13.2.5 Front Panel


Figure 13-6 shows the appearance of the front panel of the CMR4.
Figure 13-6 Front panel of the CMR4
CMR4
STAT
LASER
RADIATION
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT
IN
MO
MI
D1
A1
D2
A2
D3
A3
D4
A4
CMR4
Indicators
The front panel of the CMR4 has one indicator as follows: board hardware status indicator
(STAT) – two colors (red and green)

Interfaces
The front panel of the CMR4 has 12 optical interfaces. Table 13-6 describes the types and usage
of the optical interfaces of the CMR4.
Table 13-6 Optical interfaces of the CMR4

Interface

D1–D4 LC Transmits signals to the optical wavelength converting

board or centralized client-side equipment.
MO LC Works as a cascading output optical interface and is

connected to the input optical interface of an OADM
board.
MI LC Works as a cascading input optical interface and is

connected to the output optical interface of an OADM
board.
13.2.6 Valid Slots

13.2.7 Feature Code

four channels of optical signals processed by the CMR4.
Table 13-7 describes the feature code of the CMR4.
Table 13-7 Feature code of the CMR4

1st and 2nd characters Wavelength of optical The two characters are the
signals two middle characters of the
figure that indicates the
wavelength of the first
channel of optical signals
processed by the CMR4.

3rd and 4th characters Wavelength of optical The two characters are the
wavelength of the second
5th and 6th characters Wavelength of optical The two characters are the
wavelength of the third
7th and 8th characters Wavelength of optical The two characters are the
wavelength of the fourth
Consider the TN11CMR4 whose feature code is "47495961" as an example. The meaning of
the feature code of the TN11CMR4 is as follows:
l "47" indicates that the wavelength of the first channel of optical signals is 1471 nm.
l "49" indicates that the wavelength of the second channel of optical signals is 1491 nm.
l "59" indicates that the wavelength of the third channel of optical signals is 1591 nm.
l "61" indicates that the wavelength of the fourth channel of optical signals is 1611 nm.


Table 13-8 lists the parameters specified for the optical interfaces of the CMR4.
Table 13-8 Parameters specified for the optical interfaces of the CMR4

Interface
- Operating wavelength range 1291 to 1611 (1371 nm excluded)

(nm)
- Channel spacing (nm) 20


Interface

IN-D2 (nm)
IN-D3 Insertion loss (dB) on the ≤2
IN-D4 drop channel

(dB)

isolation (dB)

A2-OUT (nm)
A3-OUT Insertion loss (dB) on the add ≤2
A4-OUT channel

MI-OUT
Isolation (dB) > 13
Laser Safety Class

The mechanical specifications of the CMR4 are as follows:

l Weight (kg): 0.9
Power Consumption
The power consumption of the CMR4 at room temperature (25°C) is 0 W.
13.3 MR2

The MR2 is available in one functional version, namely, TN11.
13.3.2 Application

The MR2 is mainly used to add/drop and multiplex two channels of wavelength signals to/from
the multiplexed signals.
The MR2 is applied to the dense wavelength division multiplexing (DWDM) system. The
channel spacing is 0.8 nm. The MR2 supports the add/drop multiplexing function and channel
expansion function.
The MR2 consists of the OADM module, communication and control module, and power
module.
13.3.5 Front Panel
The front panel of the MR2 has indicators, interfaces, and a laser safety class label.
13.3.6 Valid Slots
The MR2 can be installed in slots 5–8 and 11–13 in the subrack.
13.3.7 Feature Code
The feature code of the MR2 contains eight characters, which indicate the frequencies of the
two channels of optical signals processed by the MR2.
The technical specifications of the MR2 include the parameters specified for optical interfaces,

13.3.2 Application
The MR2 is mainly used to add/drop and multiplex two channels of wavelength signals to/from
Figure 13-7 shows the application of the MR2 in the DWDM system.
Figure 13-7 Application of the MR2 in the DWDM system
MR2 network MR2
Line Line Line Line

Remarks: The line board in this figure supports DWDM wavelength signals.


The MR2 is applied to the dense wavelength division multiplexing (DWDM) system. The
channel spacing is 0.8 nm. The MR2 supports the add/drop multiplexing function and channel
expansion function.
Table 13-9 provides the functions and features of the MR2.
Table 13-9 Functions and features of the MR2

Function and MR2
Feature
Basic functions Adds/Drops and multiplexes any two signals to/from the multiplexed
signals.


module.
Figure 13-8 shows the functional block diagram of the MR2.
Figure 13-8 Functional block diagram of the MR2
D1 D2 MO MI A1 A2
Drop optical Add optical

IN OUT
module module
OADM optical
module
Control

Control and communication module
Power supply
module
Fuse Required
voltage
Backplane
DC power supply (controlled by SCC)
from a backplane SCC

OADM Module
interface.

DC/DC Converter
13.3.5 Front Panel


Figure 13-9 shows the appearance of the front panel of the MR2.

Figure 13-9 Front panel of the MR2
MR2
STAT
LASER
RADIATION
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT
IN
MO
MI
D1
A1
D2
A2
MR2
Indicators
The front panel of the MR2 has one indicator as follows: board hardware status indicator (STAT)
Interfaces
The front panel of the MR2 has eight optical interfaces. Table 13-10 describes the types and
usage of the optical interfaces of the MR2.

Table 13-10 Optical interfaces of the MR2

Interface



board.

board.
13.3.6 Valid Slots

13.3.7 Feature Code

two channels of optical signals processed by the MR2.
Table 13-11 describes the feature code of the MR2.
Table 13-11 Feature code of the MR2
First four (1–4) characters Frequency of optical signals The four characters are the
last four characters of the
frequency of the first channel
of optical signals processed
by the MR2.
Last four (5–8) characters Frequency of optical signals The four characters are the
frequency of the second
processed by the MR2.

Consider the TN11MR2 whose feature code is "93609370" as an example. The meaning of the
feature code of the TN11MR2 is as follows:
l "9360" indicates that the frequency of the first channel of optical signals is 193.60 THz.
l "9370" indicates that the frequency of the second channel of optical signals is 193.70 THz.


Table 13-12 lists the parameters specified for the optical interfaces of the MR2.
Table 13-12 Parameters specified for the optical interfaces of the MR2

Interface
- Operating wavelength range 1529 to 1561

(nm)
- Channel spacing (GHz) 100

IN-D2 (nm)
Insertion loss (dB) on the ≤ 1.5

drop channel

(dB)

isolation (dB)

A2-OUT (nm)
Insertion loss (dB) on the add ≤ 1.5

channel

MI-OUT
Isolation (dB) > 13
Laser Safety Class


The mechanical specifications of the MR2 are as follows:
l Weight (kg): 0.9
Power Consumption
The power consumption of the MR2 at room temperature (25°C) is 0 W.
13.4 MR2A
technical specifications of the MR2A (2-channel optical add/drop multiplexing board).

The MR2A is available in one functional version, namely, N1. The N1MR2A is discontinued.
13.4.2 Application
The MR2A is mainly used to add/drop and multiplex two channels of wavelength signals to/
The MR2A is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2A supports
the add/drop multiplexing function between any two adjacent wavelengths.
The MR2A consists of the OADM module.
13.4.5 Front Panel
The front panel of the MR2A has interfaces and a laser safety class label.
13.4.6 Valid Slots
The MR2A can be installed in slots 5–8 and 11–13 in the subrack.
The technical specifications of the MR2A include the parameters specified for optical interfaces,

The MR2A is available in one functional version, namely, N1. The N1MR2A is discontinued.
13.4.2 Application
The MR2A is mainly used to add/drop and multiplex two channels of wavelength signals to/
Figure 13-10 shows the application of the MR2A in the DWDM system.

Figure 13-10 Application of the MR2A in the DWDM system
MR2A network MR2A
Line Line Line Line


The MR2A is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2A supports
Table 13-13 provides the functions and features of the MR2A.
Table 13-13 Functions and features of the MR2A

Function and MR2A
Feature
Basic functions Adds/Drops any two adjacent standard wavelengths defined in ITU-
T G.692 (DWDM). The signals are transparently transmitted and the
operating wavelength ranges from 1535.82 nm to 1560.61 nm.
OTM function One MR2A board can work as a two-channel add/drop OTM station,
as shown in Figure 13-11. Two MR2A boards can be cascaded to
work as a four-channel add/drop OTM station, as shown in Figure
13-12.
OADM function Works as a two-channel add/drop OADM station when working with
the LWX. For details, see Figure 13-13.
Central wavelength Supports the standard wavelengths defined in ITU-T

Recommendations. The channel spacing is 100 GHz.

Figure 13-11 One MR2A board working as a two-channel add/drop OTM station
D1 D2
IN MO
Drop
OUT
MI
Add
MR2A
A1 A2
Figure 13-12 Two MR2A boards being cascaded to work as a four-channel add/drop OTM
station
D1 D2 D1 D2
IN MO IN MO
Drop Drop
OUT
MI OUT MI
Add Add
MR2A MR2A
A1 A2 A1 A2
Figure 13-13 MR2A and LWX working as a two-channel add/drop OADM station
LWX
A2 D2
Out MO
In MR2A MI
D1 A1
LWX

The MR2A consists of the OADM module.

Figure 13-14 shows the functional block diagram of the MR2A.
Figure 13-14 Functional block diagram of the MR2A

D01 D02 MO MI A01 A02
IN Drop Add OUT
OADM
module
The MR2A contains the OADM module that adds, drops, and multiplexes two channels of
signals. In addition, the MR2A provides the interface to cascade another optical add/drop
multiplexing board to increase the add/drop capability. The MR2A is a passive board and does
OADM Module
interface.
13.4.5 Front Panel

The front panel of the MR2A has interfaces and a laser safety class label.

Figure 13-15 shows the appearance of the front panel of the MR2A.

Figure 13-15 Front panel of the MR2A
MR2A
CLASS 1
LASER
PRODUCT OUT
IN
MO
MI
D1
A1
D2 A2
MR2A
Interfaces
The front panel of the MR2A has four LC optical interfaces. Table 13-14 describes the types
and usage of the optical interfaces of the MR2A.
Table 13-14 Optical interfaces of the MR2A

Interface
A01–A02 LC Adds two wavelengths of signals from the local equipment.
D01–D02 LC Drops two wavelengths of signals to the local equipment.
IN LC Receives the multiplexed signals of two wavelengths.
OUT LC Transmits the multiplexed signals of two wavelengths.


Interface
MO/MI LC Works as a cascading interface and cascades several MR2A

boards.
13.4.6 Valid Slots

The MR2A can be installed in slots 5–8 and 11–13 in the subrack.

The technical specifications of the MR2A include the parameters specified for optical interfaces,

Table 13-15 lists the parameters specified for the optical interfaces of the MR2A.
Table 13-15 Parameters specified for the optical interfaces of the MR2A
Parameter Value
Operating wavelength The operating wavelength range is from 1535.82 nm to 1560.61

range (nm) nm. The working wavelengths can be any two adjacent standard
wavelengths defined in ITU-T G.692 (DWDM).
Channel spacing (GHz) 100
Insertion loss on the add <2

channel or drop channel
(dB)

(dB)

isolation (dB)
-0.5 dB channel bandwidth < ±0.11

(nm)
Laser Safety Class


The mechanical specifications of the MR2A are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the MR2A at room temperature (25°C) is 0 W.
13.5 MR2B
technical specifications of the MR2B (2-channel optical add/drop multiplexing board).

The MR2B is available in one functional version, namely, N1. The N1MR2B is discontinued.
13.5.2 Application
The MR2B is mainly used to add/drop and multiplex two channels of wavelength signals to/
The MR2B is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2B supports
The MR2B consists of the OADM module.
13.5.5 Front Panel
The front panel of the MR2B has interfaces and a laser safety class label.
13.5.6 Valid Slots
The MR2B can be installed in divided slots 5–7 and 19–21 in the subrack.
The technical specifications of the MR2B include the parameters specified for optical interfaces,

The MR2B is available in one functional version, namely, N1. The N1MR2B is discontinued.
13.5.2 Application
The MR2B is mainly used to add/drop and multiplex two channels of wavelength signals to/
Figure 13-16 shows the application of the MR2B in the DWDM system.

Figure 13-16 Application of the MR2B in the DWDM system
MR2B network MR2B
Line Line Line Line


The MR2B is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2B supports
Table 13-16 provides the functions and features of the MR2B.
Table 13-16 Functions and features of the MR2B

Function and MR2B
Feature
Basic functions Adds/Drops any two adjacent standard wavelengths defined

in ITU-T G.692 (DWDM). The signals are transparently
transmitted and the operating wavelength ranges from 1535.82
nm to 1560.61 nm.
OTM function One MR2B board can work as a two-channel add/drop OTM
station, as shown in Figure 13-17. Two MR2B boards can be
cascaded to work as a four-channel add/drop OTM station, as
shown in Figure 13-18.
OADM function Works as a two-channel add/drop OADM station when

working with the LWX. For details, see Figure 13-19.


Figure 13-17 One MR2B board working as a two-channel add/drop OTM station
D1 D2
IN MO
Drop
OUT
MI
Add
MR2B
A1 A2
Figure 13-18 Two MR2B boards being cascaded to work as a four-channel add/drop OTM
station
D1 D2 D1 D2
IN MO IN MO
Drop Drop
OUT
MI OUT MI
Add Add
MR2B MR2B
A1 A2 A1 A2
Figure 13-19 MR2B and LWX working as a two-channel add/drop OADM station
LWX
A2 D2
Out MO
In MR2B MI
D1 A1
LWX

The MR2B consists of the OADM module.

Figure 13-20 shows the functional block diagram of the MR2B.
Figure 13-20 Functional block diagram of the MR2B

D01 D02 MO MI A01 A02
IN Drop Add OUT
OADM
module
The MR2B contains the OADM module that adds, drops, and multiplexes two channels of
signals. In addition, the MR2B provides the interface to cascade another optical add/drop
multiplexing board to increase the add/drop capability. The MR2B is a passive board and does
OADM Module
interface.
13.5.5 Front Panel

The front panel of the MR2B has interfaces and a laser safety class label.

Figure 13-21 shows the appearance of the front panel of the MR2B.

Figure 13-21 Front panel of the MR2B
MR2B
CLASS1
LASER
PRODUCT
OUT AO1 AO2 MI

MO DO2 DO1
IN
MR2B
Interfaces
The front panel of the MR2B has four LC optical interfaces. Table 13-17 describes the types
and usage of the optical interfaces of the MR2B.
Table 13-17 Optical interfaces of the MR2B

Interface
MO/MI LC Works as a cascading interface and cascades several MR2B

boards.
13.5.6 Valid Slots

The MR2B can be installed in divided slots 5–7 and 19–21 in the subrack.

The technical specifications of the MR2B include the parameters specified for optical interfaces,


Table 13-18 lists the parameters specified for the optical interfaces of the MR2B.
Table 13-18 Parameters specified for the optical interfaces of the MR2B
Parameter Value


(dB)

(dB)

isolation (dB)

(nm)
Laser Safety Class

The mechanical specifications of the MR2B are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the MR2B at room temperature (25°C) is 0 W.
13.6 MR2C
technical specifications of the MR2C (2-channel optical add/drop multiplexing board).

The MR2C is available in one functional version, namely, N1.

13.6.2 Application
The MR2C is mainly used to add/drop and multiplex two channels of wavelength signals to/
The MR2C is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2C supports
The MR2C consists of the OADM module.
13.6.5 Front Panel
The front panel of the MR2C has interfaces and a laser safety class label.
13.6.6 Valid Slots
The MR2C can be installed in slots 1–4 and 15–18 in the subrack.
The technical specifications of the MR2C include the parameters specified for optical interfaces,

The MR2C is available in one functional version, namely, N1.
13.6.2 Application
The MR2C is mainly used to add/drop and multiplex two channels of wavelength signals to/
Figure 13-22 shows the application of the MR2C in the DWDM system.
Figure 13-22 Application of the MR2C in the DWDM system
MR2C network MR2C
Line Line Line Line


The MR2C is applied to the DWDM system. The channel spacing is 0.8 nm. The MR2C supports

Table 13-19 provides the functions and features of the MR2C.
Table 13-19 Functions and features of the MR2C

Function and MR2C
Feature
Basic functions Adds/Drops any two adjacent standard wavelengths defined in

ITU-T G.692 (DWDM). The signals are transparently
transmitted and the operating wavelength ranges from 1535.82
nm to 1560.61 nm.
OTM function One MR2C board can work as a two-channel add/drop OTM
station, as shown in Figure 13-23. Two MR2C boards can be
cascaded to work as a four-channel add/drop OTM station, as
shown in Figure 13-24.
OADM function Works as a two-channel add/drop OADM station when working

with the LWX. For details, see Figure 13-25.

Figure 13-23 One MR2C board working as a two-channel add/drop OTM station
D1 D2
IN MO
Drop
OUT
MI
Add
MR2C
A1 A2
Figure 13-24 Two MR2C boards being cascaded to work as a four-channel add/drop OTM
station
D1 D2 D1 D2
IN MO IN MO
Drop Drop
OUT
MI OUT MI
Add Add
MR2C MR2C
A1 A2 A1 A2

Figure 13-25 MR2C and LWX working as a two-channel add/drop OADM station
LWX
A2 D2
Out MO
In MR2C MI
D1 A1
LWX

The MR2C consists of the OADM module.
Figure 13-26 shows the functional block diagram of the MR2C.
Figure 13-26 Functional block diagram of the MR2C

D01 D02 MO MI A01 A02
IN Drop Add OUT
OADM
module
The MR2C contains the OADM module that adds, drops, and multiplexes two channels of
signals. In addition, the MR2C provides the interface to cascade another optical add/drop
multiplexing board to increase the add/drop capability. The MR2C is a passive board and does
OADM Module
interface.

13.6.5 Front Panel

The front panel of the MR2C has interfaces and a laser safety class label.

Figure 13-27 shows the appearance of the front panel of the MR2C.
Figure 13-27 Front panel of the MR2C
MR2C
OUT AO1
AO2
MI
MO
DO2
DO1
IN
CLASS 1
LASER
PRODUCT
MR2C

Interfaces
The front panel of the MR2C has four pairs of LC optical interfaces. Table 13-20 describes the
types and usage of the optical interfaces of the MR2C.
Table 13-20 Optical interfaces of the MR2C

Interface
MO/MI LC Works as a cascading interface and cascades several MR2C

boards.
13.6.6 Valid Slots

The MR2C can be installed in slots 1–4 and 15–18 in the subrack.

The technical specifications of the MR2C include the parameters specified for optical interfaces,

Table 13-21 lists the parameters specified for the optical interfaces of the MR2C.
Table 13-21 Parameters specified for the optical interfaces of the MR2C
Parameter Value


(dB)

(dB)

Parameter Value

isolation (dB)

(nm)
Laser Safety Class

The mechanical specifications of the MR2C are as follows:
l Dimensions (mm): 22 (W) x 110 (D) x 254.1 (H)
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the MR2C at room temperature (25°C) is 0 W.
13.7 MR4

13.7.2 Application
The MR4 is mainly used to add/drop and multiplex four channels of wavelength signals to/from
The MR4 is applied to the DWDM system. The channel spacing is 0.8 nm. The MR4 supports
module.
13.7.5 Front Panel
13.7.6 Valid Slots
13.7.7 Feature Code
first channel and fourth channel of optical signals processed by the MR4.



13.7.2 Application
The MR4 is mainly used to add/drop and multiplex four channels of wavelength signals to/from
Figure 13-28 shows the application of the MR4 in the DWDM system.
Figure 13-28 Application of the MR4 in the DWDM system
MR4 network MR4
Line Line Line Line


The MR4 is applied to the DWDM system. The channel spacing is 0.8 nm. The MR4 supports
Table 13-22 provides the functions and features of the MR4.
Table 13-22 Functions and features of the MR4
Function and MR4

Feature
Basic functions Adds/Drops and multiplexes four continuous signals to/from the
multiplexed signals.



module.
Figure 13-29 shows the functional block diagram of the MR4.
Figure 13-29 Functional block diagram of the MR4

D01 D02 D03 D04 MO MI A01 A02 A03 A04
IN Drop Add OUT
OADM module
Pow er module
DC/DC
converter
Delayed
startup
Fuse
SCC
Backplane
-48 V/-60 V -48 V/-60 V SCC
OADM Module
interface. Then, the drop optical module drops four wavelengths from the signal through optical
interfaces D01–D04. The four dropped wavelengths are transmitted through the MO optical
interface.
optical interface. Then, the add optical module adds four wavelengths through optical interfaces
A01–A04 and multiplexes them with the signal on the main optical path into one signal. This


DC/DC Converter
13.7.5 Front Panel


Figure 13-30 shows the appearance of the front panel of the MR4.
Figure 13-30 Front panel of the MR4
MR4
STAT
OUT
IN
MO
IN
D1
A1
D2
A2
D3
A3
D4
A4
LASER
RADIATION
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
MR4

Indicators
The front panel of the MR4 has one indicator as follows: board hardware status indicator (STAT)
Interfaces
The front panel of the MR4 has 12 optical interfaces. Table 13-23 describes the types and usage
of the optical interfaces of the MR4.
Table 13-23 Optical interfaces of the MR4

Interface



board.

board.
13.7.6 Valid Slots

13.7.7 Feature Code

first channel and fourth channel of optical signals processed by the MR4.
Table 13-24 describes the feature code of the MR4.

Table 13-24 Feature code of the MR4
First four (1–4) characters Frequency of optical signals The four characters are the
frequency of the first channel
of optical signals processed
by the MR4.
Last four (5–8) characters Frequency of optical signals The four characters are the
frequency of the fourth
processed by the MR4.
Consider the TN11MR4 whose feature code is "92109240" as an example. The meaning of the
feature code of the TN11MR4 is as follows:
l "9210" indicates that the frequency of the first channel of optical signals is 192.10 THz.
l "9240" indicates that the frequency of the fourth channel of optical signals is 192.40 THz.
The four channels of optical signals processed by the MR4 are successive. Hence, we can infer
the following:
l The frequency of the second channel of optical signals is 192.20 THz.

l The frequency of the third channel of optical signals is 192.30 THz.


Table 13-25 lists the parameters specified for the optical interfaces of the MR4.
Table 13-25 Parameters specified for the optical interfaces of the MR4
Optical Interface Parameter Value
- Operating wavelength range (nm) 1529 to 1561
- Channel spacing (GHz) 100
IN-D1 0.5 dB passband bandwidth (nm) ≥ ±0.11

IN-D2
Insertion loss on the drop channel (dB) ≤ 2.2
IN-D3
IN-D4 Adjacent channel isolation (dB) > 25

Optical Interface Parameter Value
Non-adjacent channel isolation (dB) > 35
A1-OUT 0.5 dB passband bandwidth (nm) ≥ ±0.11

A2-OUT
Insertion loss on the add channel (dB) ≤ 2.2
A3-OUT
A4-OUT

MI-OUT
Isolation (dB) > 13
Laser Safety Class

The mechanical specifications of the MR4 are as follows:

l Weight (kg): 0.9
Power Consumption
The power consumption of the MR4 at room temperature (25°C) is 0 W.
13.8 LWX
technical specifications of the LWX (arbitrary bit rate wavelength conversion board).

The LWX is available in one functional version, namely, N1. The N1LWX is discontinued.
13.8.2 Application
The LWX is a wavelength conversion board. The LWX converts a wavelength at an arbitrary
rate (10 Mbit/s to 2.7 Gbit/s) into a standard wavelength defined in ITU-T G.692, and performs
the reverse process.
The LWX converts a wavelength at an arbitrary rate (10 Mbit/s to 2.7 Gbit/s, NRZ code) on the
client side into a standard wavelength defined in ITU-T G.692, and performs the reverse process.
The LWX consists of the O/E converting module, cross-connect module, CDR module, logic
and control module, DC/DC converter, and other modules.

13.8.5 Front Panel

The front panel of the LWX has indicators, interfaces, and a laser safety class label.
13.8.6 Valid Slots
The LWX can be installed in slots 5–8 and 11–13 in the subrack.
13.8.7 Feature Code
The feature code of the LWX indicates the scheme that the optical interfaces use to receive and
transmit signals.
You can set the parameters for the LWX by using the U2000.
The technical specifications of the LWX include the parameters specified for optical interfaces,
the safety class of the laser, mechanical specifications and power consumption.

The LWX is available in one functional version, namely, N1. The N1LWX is discontinued.
13.8.2 Application
The LWX is a wavelength conversion board. The LWX converts a wavelength at an arbitrary
rate (10 Mbit/s to 2.7 Gbit/s) into a standard wavelength defined in ITU-T G.692, and performs
the reverse process.
Figure 13-31 shows the application of the LWX in the DWDM system.
Figure 13-31 Application of the LWX in the DWDM system
G.692 G.692
Demultiplex-
Multiplexing
LWX LWX
ing
10 Mbit/s-2.7 Gbit/s
Client side WDM side WDM side Client side

The LWX converts a wavelength at an arbitrary rate (10 Mbit/s to 2.7 Gbit/s, NRZ code) on the
client side into a standard wavelength defined in ITU-T G.692, and performs the reverse process.
The LWX supports the optical wavelength conversion, 3R function, protection, and loopback
function.

Table 13-26 provides the functions and features of the LWX.
Table 13-26 Functions and features of the LWX

Function LWX
and Feature
Basic Converts a wavelength on the client side into a standard wavelength defined
functions in ITU-T G.692 (DWDM), and performs the reverse process.
Transparently transmits signals.
3R function Provides the 3R function for the signals at a rate ranging from 10 Mbit/s to
2.7 Gbit/s on the client side, restores the clock, and monitors the rate.
Protection Single fed and single Supports the inter-board protection and 1+1 inter-
schemes receiving board hot standby protection. The protection
switching time is less than 50 ms.
Dual fed and Supports the intra-board protection. One board can
selective receiving realize the optical channel protection. The protection
switching time is less than 50 ms.
ALS function Supports the ALS function. When the LWX does not receive light, the LWX
automatically turns off the corresponding optical transmit module.
Loopback Supports inloops and outloops at optical interfaces so that faults can be
function located quickly.
Performance Reports various alarms and performance events, which facilitates the
and alarm maintenance of the equipment.
monitoring
Central Supports the standard wavelengths defined in ITU-T Recommendations. The

wavelength channel spacing is 100 GHz.

The LWX consists of the O/E converting module, cross-connect module, CDR module, logic
and control module, DC/DC converter, and other modules.
Figure 13-32 shows the functional block diagram of the LWX.

Figure 13-32 Functional block diagram of the LWX
Loopback control Reference clock
10 Mbit/s to 2.7
Gbit/s
O/E 2x2 cross- Multi-rate
Optical module on WDM side
loopback connection CDR
the client side
10 Mbit/s to 2.7
Gbit/s
E/O Data
LOS
Laser Communication
shutdown and control
module
LOS
10 Mbit/s to 2.7 Client side

Gbit/s loopback
Optical module 2 O/E
on the WDM side
2x2 cross- Multi-rate
connection CDR
Loopback control
Reference
clock
10 Mbit/s to 2.7
Gbit/s
Optical module 1 O/E
on the WDM side
10 Mbit/s to 2.7 Clock
Gbit/s
E/O Data
Optical
splitter
LOS Communication
and control
Laser shutdown module Communication
SCC unit
+3.3
V DC/DC Fuse -48 V/ -60 V
DC/DC converter
-48 V/ -60 V
converter
Fuse
+3.3 V backup
power

l The optical module on the client side applies SFP encapsulation and can be configured as
different types of optical modules. This module can access the optical signals at a rate
ranging from 10 Mbit/s to 2.7 Gbit/s.
l The optical module on the WDM side can be configured as an optical transceiver module,
or both an optical transceiver module and an optical receiver module. When two modules
are configured on the WDM side, an optical splitter is used to perform dual feeding.

l In the receive direction, the module converts the received optical signals into electrical
signals.
l In the transmit direction, the module converts the electrical signals into SDH optical signals
and sends the SDH optical signals to fibers for transmission.
l Detects the R_LOS alarm and provides the function of shutting down the laser.
l Supports the data selection from the client side to the WDM side and the data selection
from the WDM side to the client side.
l Supports the selection of WDM-side optical modules.
l Supports the loopback of client-side signals.
l Supports the loopback of WDM-side signals.
CDR Module
l Restores the data and clock signals from the signals that are at a rate ranging from 10 Mbit/
s to 2.7 Gbit/s.
l Reads the rates of the accessed services.

l Supports Ethernet communication.
l Supports the reference clock of the CDR module.
l Selects and configures the services of the other modules.
l Selects the clock signal from the active and standby cross-connect boards.
DC/DC Converter
require.
13.8.5 Front Panel

The front panel of the LWX has indicators, interfaces, and a laser safety class label.

Figure 13-33 shows the appearance of the front panel of the LWX.

Figure 13-33 Front panel of the LWX
LWX
STAT
ACT
PROG
SRV
CLASS 1
LASER
PRODUCT
TX
RX
OUT1 IN1
OUT2 IN2
LWX
Indicators
Interfaces
The front panel of the LWX has six optical interfaces. Table 13-27 describes the types and usage
of the optical interfaces of the LWX.

Table 13-27 Optical interfaces of the LWX

Interface
IN1–IN2 LC Receives the signals sent from the MR2A.
OUT1–OUT2 LC Transmits signals to the MR2A.
TX LC Transmits signals to the client-side equipment.
RX LC Receives the signals sent from the client-side

equipment.
13.8.6 Valid Slots

The LWX can be installed in slots 5–8 and 11–13 in the subrack.
13.8.7 Feature Code

The feature code of the LWX indicates the scheme that the optical interfaces use to receive and
transmit signals.
Table 13-28 provides the relationship between the feature code of the LWX and the signal
receive/transmit scheme.
Table 13-28 Relationship between the feature code of the LWX and the signal receive/transmit
scheme
Board Feature Code Signal Receive/Transmit Scheme
SSN1LWX01 01 Single fed and single receiving
SSN1LWX02 02 Dual fed and selective receiving

You can set the parameters for the LWX by using the U2000.
You can set the following parameters for the LWX by using the U2000:
l Path use status
l Optical interface loopback
l Service type
l Client service bearer rate (M)
l Laser status
l Automatic laser shutdown
l Current bearer rate (M)

l Actual wavelength No./wavelength (nm)/frequency (THz)

l Actual band type
l Configure wavelength No./wavelength (nm)/frequency (THz)
l Configure band type
l SD trigger condition

The technical specifications of the LWX include the parameters specified for optical interfaces,
the safety class of the laser, mechanical specifications and power consumption.

Table 13-29 and Table 13-30 list the parameters specified for the client-side and WDM-side
optical interfaces of the LWX.
Table 13-29 Parameters specified for the client-side optical interfaces of the LWX
Parameter Value
Nominal bit rate 10 Mbit/s to 2.7 Gbit/s
Transmission 15 40 80
distance (km)
Characteristics of the transmitter at point S
Operating 1260 to 1360 1260 to 1360 1500 to 1580

wavelength range
(nm)
Maximum mean 0 +3 +3
launched power
(dBm)
Minimum mean -5 -2 -2
launched power
(dBm)
Minimum extinction +8.2 +8.2 +8.2

ratio (dB)
Minimum side mode 30 30 30

suppression ratio
(dB)
Eye pattern mask Complies with the Complies with the Complies with the
mask defined in ITU- mask defined in ITU- mask defined in ITU-
T G.957. T G.957. T G.957.
Characteristics of the receiver at point S

Parameter Value
Receiver type PIN APD APD
Receiver wavelength 1200 to 1600 1200 to 1600 1200 to 1600

range (nm)

(dBm)
Minimum overload 0 -9 -9
(dBm)
Maximum -27 -27 -27

reflectance (dB)
Table 13-30 Parameters specified for the WDM-side optical interfaces of the LWX
Parameter Value
Channel 100
spacing (GHz)
Line code NRZ

pattern
Characteristics of the transmitter at point Sn
Transmission 640 170 (2 mW) 170 (10 mW) 360

distance (km)
Maximum mean +3 +3 +7 +3
launched power
(dBm)
Minimum mean -2 -2 5 -2
launched power
(dBm)
Minimum +10 +10 +10 +10

extinction ratio
(dB)
Nominal central 192.10 to 192.10 to 192.10 to 192.10 to

frequency 196.00 196.00 196.00 196.00
(THz)
Central ±12.5 ±12.5 ±12.5 ±12.5

frequency
deviation (GHz)
Maximum -20 0.2 0.4 0.4 0.4

dB spectral
width (nm)

Parameter Value
Minimum side 35 35 35 35
mode
suppression
ratio (dB)
Dispersion 12800 3400 3400 7200

compensation
(ps/nm)
Eye pattern Complies with Complies with Complies with Complies with
mask the mask the mask the mask the mask
defined in ITU- defined in ITU- defined in ITU- defined in ITU-
T G.957. T G.957. T G.957. T G.957.
Characteristics of the receiver at point Rn
Receiver type APD PIN
Receiver 1200 to 1600 1200 to 1600

wavelength
range (nm)
Receiver -28 -18

sensitivity
(dBm)
Minimum -9 0
overload (dBm)
Maximum -27 -27

reflectance (dB)
Laser Safety Class

The mechanical specifications of the LWX are as follows:
l Weight (kg): 1.1
Power Consumption
The maximum power consumption of the LWX at room temperature (25°C) is 30 W.

13.9 FIB
technical specifications of the FIB (filter isolating board).

The FIB is available in one functional version, namely, N1.
13.9.2 Application
The FIB is used in the remote optical pumping amplifier system. The FIB can realize long-
distance optical regeneration transmission when it works with the single-wavelength long-
distance board ROP.
The FIB filters and isolates one optical signals.
The FIB consists of an isolator and a filter.
13.9.5 Front Panel
The front panel of the FIB has one channel of optical interface.
13.9.6 Valid Slots
The FIB can be installed in slots 5–8 and 11–13 in the subrack.
The technical specifications of the FIB include the parameters specified for optical interfaces,

The FIB is available in one functional version, namely, N1.
13.9.2 Application
The FIB is used in the remote optical pumping amplifier system. The FIB can realize long-
distance optical regeneration transmission when it works with the single-wavelength long-
distance board ROP.
Figure 13-34 shows the position of the FIB in an optical transmission system.
Figure 13-34 Position of the FIB in an optical transmission system

C (single span)
FIB
a (54 dB) b (18 dB)
Optical -> Filter Optical

BA17 Erbium ROP ISO
transmitter 1550.12 receiver
G.652 fiber doped fiber G.652 fiber


The FIB filters and isolates one optical signals.
Table 13-31 provides the functions and features of the FIB.
Table 13-31 Functions and features of the FIB

Function and FIB
Feature
Optical isolator The isolator allows optical signals to pass in a single direction. The
operating wavelength ranges from 1529 nm to 1561 nm.
Optical filter The filter filters out the wavelengths other than the 1550.12 nm
wavelength.

The FIB consists of an isolator and a filter.
Figure 13-35 shows the functional block diagram of the FIB.
Figure 13-35 Functional block diagram of the FIB
Isolator Filter
Optical signals are heavily attenuated and degraded after they travel for a long distance in fibers.
The degraded signals cannot be normally received by an optical receiver. Hence, an ROP needs
to be used to amplify the gain of the optical signals. To prevent other factors from affecting the
ROP because the ROP has high optical power, the FIB needs to be used to filter wavelengths.
The isolator of the FIB allows the optical signals to pass in a single direction. The filter of the
FIB filters out the wavelengths other than the 1550.12 nm wavelength. As a result, the optical
receiver receives the optical signals normally.
13.9.5 Front Panel

The front panel of the FIB has one channel of optical interface.

Figure 13-36 shows the appearance of the front panel of the FIB.

Figure 13-36 Front panel of the FIB
FIB
CLASS 1
LASER
PRODUCT
OUT
IN
FIB
Interfaces
The front panel of the FIB has one optical interface. The optical interface is used to receive and
transmit one channel of optical signals. Table 13-32 describes the types and usage of the optical
interfaces of the FIB.
Table 13-32 Optical interfaces of the FIB

Interface
IN LSH Receives one channel of optical signals.
OUT LC Transmits one channel of optical signals.

13.9.6 Valid Slots

The FIB can be installed in slots 5–8 and 11–13 in the subrack.

The technical specifications of the FIB include the parameters specified for optical interfaces,

Table 13-33 lists the parameters specified for the optical interfaces of the FIB.
Table 13-33 Parameters specified for the optical interfaces of the FIB
Parameter Value
Central wavelength 1550.12±0.05

(nm)
-0.5 dB bandwidth > 0.4

(nm)
Laser Safety Class

The mechanical specifications of the FIB are as follows:
l Weight (kg): 0.4
Power Consumption
The maximum power consumption of the FIB at room temperature (25°C) is 0 W.

Hardware Description 14 Auxiliary Boards
14 Auxiliary Boards
About This Chapter
This topic describes the auxiliary boards including the SAP, SEI, and FAN.
14.1 SAP
technical specifications of the SAP (system auxiliary processing board).
14.2 SEI
This topic describes the version, functions, working principle, front panel, valid slots and
technical specifications of the SEI (signal extended interface board).
14.3 FAN
technical specifications of the FAN (fan board).

14 Auxiliary Boards Hardware Description
14.1 SAP
technical specifications of the SAP (system auxiliary processing board).

The SAP is available in two functional versions, namely, Q1 and Q2. The main difference
between the two versions is with regard to their different indicators on the front panel. The
Q1SAP is no longer manufactured.
14.1.2 Application
The SAP is a system auxiliary interface board. The SAP can be used on the OptiX OSN
equipment series to provide various management interfaces and auxiliary interfaces.
The SAP provides various management and commissioning interfaces, and provides centralized
backup for the +3.3 V power supply of the boards in the subrack.
The SAP consists of the communication and control module, clock module, switch module,
overhead processing module, DC/DC converter, and other modules.
14.1.5 Jumpers
The SAP has jumpers that are used to set the input voltage and to test the orderwire phone
function.
14.1.6 Front Panel
The front panel of the SAP has indicators and interfaces of various types.
14.1.7 Valid Slots
The SAP can be installed in slot 14 in the subrack.
The technical specifications of the SAP include the mechanical specifications and power
consumption.

The SAP is available in two functional versions, namely, Q1 and Q2. The main difference
between the two versions is with regard to their different indicators on the front panel. The
Q1SAP is no longer manufactured.
Table 14-1 describes the versions of the SAP.
Table 14-1 Versions of the SAP
Item Description
Functional The SAP is available in two functional versions, namely, Q1 and Q2.
version
Differences The Q2SAP isolates the PGND from the GND.

The Q2SAP supports the version replacement function.

Item Description
Substitution The Q2SAP can directly substitute for the Q1SAP.
14.1.2 Application
The SAP is a system auxiliary interface board. The SAP can be used on the OptiX OSN
equipment series to provide various management interfaces and auxiliary interfaces.

The SAP provides various management and commissioning interfaces, and provides centralized
backup for the +3.3 V power supply of the boards in the subrack.
Table 14-2 provides the functions and features of the SAP.
Table 14-2 Functions and features of the SAP

Item SAP
Management Provides the ETH NM interface.

interface
Alarm interface Realizes alarm input and output, and output of the alarm cascading.
Cabinet alarm Drives and cascades the four cabinet indicators.

indicator
Commissioning Provides one commissioning interface COM.

interface
Internal Realizes communication between boards in the subrack.

communication
Overhead processing Processes the E1, E2, F1, and Serial 1–Serial 4 bytes.
Power supply backup l Monitors the two independent –48 V power supplies and detects
and checking the overvoltage (–72 V) and undervoltage (–38.4 V) conditions.
l Provides the centralized backup for the +3.3 V power supply of
the boards in the subrack, which realizes the 1:N protection for
the secondary power supply of each board. The power of the +3.3
V backup power supply is 82.5 W.
l Detects the overvoltage (+3.8 V) and undervoltage (+3.1 V)
conditions for the +3.3 V backup power supply.
Audible alarm Supports the audible alarm and the clearing of the audible alarm.
Ethernet port Supports the checking of the Ethernet port connection status.
connection status
checking

Item SAP
Note: The COM interface is used for internal commissioning only. That is, the COM interface
cannot be used for equipment monitoring. Otherwise, the Ethernet communication between
boards may become abnormal.

The SAP consists of the communication and control module, clock module, switch module,
overhead processing module, DC/DC converter, and other modules.
Figure 14-1 shows the functional block diagram of the SAP.
Figure 14-1 Functional block diagram of the SAP
E1/E2 Phone
SLIC V1
V2 SEI
S1-S4
F1
Overhead
Switch CXL unit
processin
module A/B
g module
Reference clock and

Clock frame header
module CXL unit A/B
(VLANA)
100/10 Mbit/s
CXL unit A/B
14x100/10 Mbit/s (VLANA)
100/10 Ehernet bus
COM interface Mbit/s Communication Other units A/B
(VLAN B) 8xalarm input (VLAN B)
100/10 and SEI
ETH interface Mbit/s control module 4xalarm output
Driver of indicators on the SEI
(VLAN A)
top of cabinet SEI
Power test & thunder-
proof test -48 V/ -60 V
+3.3 V Fuse -48 V/ -60 V
DC/DC
DC/DC +3.3 V backup
converter power supply for
other units

The communication module performs the following functions:

l Provides 13x10/100 Mbit/s FE interfaces with the LAN switch.

l Constructs the data communication platform between boards of the OptiX OSN 2500.
l Provides two Ethernet ports for the active and standby SCC boards and network
management.
l Provides one interface for network management.
l Provides one interface for commissioning. This interface can also function as a subrack
extending port.
Clock Module
The clock module first separates frequencies of the system clock and classifies the header sent
from the cross-connect unit. The system clock and header are then transmitted to other modules
such as the overhead processing module and switch module.
Switch Module
The switch module performs switching of 4096x4096 or 1024x1024 timeslots under control of
the micro processor. The switch module can switch any timeslot of the overhead signal sent from
the SCC to any timeslot of the output overhead signal.
Overhead Processing Module

The overhead processing module performs the following functions:
l Processes the E1 and E2bytes sent from the SCC board.

l Provides the phone/V1/V2 interface for orderwire processing through the subscriber line
interface circuit (SLIC) unit.
l Realizes interconnection between orderwire audio interfaces.
l Processes the user channel byte F1 sent form the SCC board.
l Provides the transparent output interface.
l Processes Serial 1–Serial 4 sent from the SCC board.
l Provides the RS-232/RS-422 transparent data interface, the level of which can be set
through the software.
l Sets and multiplexes S1/S2. When being multiplexed, S1/S2 functions as the NNI serial
interface to transmit the NNI audio signaling.
l Uses V1/V2 to transmit NNI audio signals.
DC/DC Converter
The DC/DC converter generates the required DC voltage for each chip. The following DC
voltages are provided: +1.8 V, +3.3 V, and +5 V. The board provides the +3.3 V backup power
supply for the system.
Other Functions
l Detects the two independent –48 V power supplies.
l Detects the system lightning protection alarm.
l Provides 8-input and 4-output alarms interfaces.

l Cascades alarms.
l Drives and cascades the indicators at the top of cabinet.
14.1.5 Jumpers
The SAP has jumpers that are used to set the input voltage and to test the orderwire phone
function.
Figure 14-2 shows the positions of the jumpers on the SAP.
Figure 14-2 Jumpers on the SAP
Power J10
module
J9
J6
CPU
Table 14-3 describes the jumpers on the SAP.
Table 14-3 Jumpers on the SAP
Jumper Function Indication
J6 To test the By default, the jumper is not capped.

orderwire phone If the jumper is capped, the orderwire phone function
function is enabled in the test environment.
J9, J10 To set the input If the jumpers are not capped, the equipment uses the
voltage of the power supply whose input voltage is –60 V.
equipment If the jumpers are capped, the equipment uses the power
supply whose input voltage is –48 V.

14.1.6 Front Panel

The front panel of the SAP has indicators and interfaces of various types.

Figure 14-3 shows the appearance of the front panel of the Q1SAP.
Figure 14-3 Front panel of the Q1SAP
SAP
STAT
PROG
COM
ETH
SAP
Figure 14-4 shows the appearance of the front panel of the Q2SAP.

Figure 14-4 Front panel of the Q2SAP
SAP
STAT
PROG
PWRA
PWRB
PWRC
COM
ETH
SAP
Indicators
The front panel of the Q1SAP has the following indicators:
Indicators
The front panel of the Q2SAP has the following indicators:
l –48 V power supply indicator of side A (PWRA) – two colors (red and green)

l –48 V power supply indicator of side B (PWRB) – two colors (red and green)
l +3.3 V backup power supply indicator of the system (PWRC) – two colors (red and green)
Interfaces
The front panel of the SAP has two interfaces. Table 14-4 describes the types and usage of the
interfaces of the SAP.
Table 14-4 Interfaces of the SAP

Interface
ETH RJ-45 NM interface
COM RJ-45 Commissioning interface
Table 14-5 describes the pins of the ETH and COM interfaces.
Table 14-5 Pins of the ETH and COM interfaces

Front View Pin Usage
1 Transmitting (+)
3 Receiving (+)
4 Unspecified
8 7 6 5 4 3 2 1
5 Unspecified
6 Receiving (–)
7, 8 Unspecified
14.1.7 Valid Slots

The SAP can be installed in slot 14 in the subrack.

The technical specifications of the SAP include the mechanical specifications and power
consumption.
The mechanical specifications of the Q1SAP are as follows:


l Weight: 0.7 kg
The mechanical specifications of the Q2SAP are as follows:

l Weight: 1.0 kg
Power Consumption
The maximum power consumption of the Q1SAP at room temperature (25°C) is 20 W.
The maximum power consumption of the Q2SAP at room temperature (25°C) is 25 W.
14.2 SEI
This topic describes the version, functions, working principle, front panel, valid slots and
technical specifications of the SEI (signal extended interface board).

The SEI is available in one functional version, namely, Q1.
14.2.2 Application
The SEI is a system extended interface board. The SEI can be used on the OptiX OSN equipment
series to provide various management interfaces and auxiliary interfaces.
The SEI provides various auxiliary and management interfaces for the equipment.
The SEI consists of the cabinet alarm indicator and alarm cascading circuit, and the interface
protection and filter circuit.
14.2.5 Front Panel
The front panel of the SEI has interfaces of various types.
14.2.6 Valid Slots
The SEI cannot be removed or inserted and it is fixed to the SEI area in the subrack.
The technical specifications of the SEI include the mechanical specifications and power
consumption.

The SEI is available in one functional version, namely, Q1.
14.2.2 Application
The SEI is a system extended interface board. The SEI can be used on the OptiX OSN equipment
series to provide various management interfaces and auxiliary interfaces.


The SEI provides various auxiliary and management interfaces for the equipment.
Table 14-6 provides the functions and features of the SEI.
Table 14-6 Functions and features of the SEI

Item SEI
Management l Provides the OAM interface, which supports the X.25 protocol.
interface l Provides the management serial interface F&f.
Auxiliary interface l Provides four broadcast data interfaces (Serial 1–Serial 4).
l Provides one F1 interface for the 64 kbit/s codirectional data
channel.
Clock interface l Provides two BITS clock input interfaces and two BITS clock
output interfaces (impedance: 120 ohms).
l Provides two BITS clock input interfaces and two BITS clock
output interfaces (impedance: 75 ohms).
Alarm interface l Provides four cabinet alarm indicator output interfaces.

l Provides four cabinet alarm indicator input cascading interfaces.
Cabinet alarm l Provides four output interfaces for the cabinet alarm indicator.
indicator l Provides four input concatenation interfaces for the cabinet alarm
indicator.
Orderwire interface l Provides one orderwire phone interface.

l Provides two NNI connection signaling interfaces.
l Provides two NNI voice interfaces.

The SEI consists of the cabinet alarm indicator and alarm cascading circuit, and the interface
protection and filter circuit.
The SEI accesses various control and management signals, performs protection and filter
functions for these signals, and transmits the signals to the CXL for processing through the
backplane.
Figure 14-5 shows the functional block diagram of the SEI.

Figure 14-5 Functional block diagram of the SEI

Cabinet indicator
Ouput of four cabinet indicators output
Alarm cascading interface Cabinet alarm
Alarm cascading
indicator and
F&f interface alarm cascading
F&f
Phone (one orderwire interface) circuit
Phone
V1/V2 (NNI phone interface) NNI phone SAP
S1-S4 interface S1-S4

protection and F1
F1 interface filter Interface Alarm input/output
8-input/4-output alarm interface circuit
OAM
OAM interface
Clock input and
2-in and 2-out clock interface output
CXL unit
Interface Protection and Filter Circuit

This module performs protection and filter functions for the following interfaces:
l 8-input and 4-output alarm interface
l Alarm cascading interface
l F1 codirectional data interface
l S1-S4 broadcast data interface
l Orderwire and NNI audio interface
l F&f interface
l OAM serial interface for network management
l 2-input and 2-output BITS clock interface
This module also provides physical interfaces for all the previously listed interfaces.
Cabinet Alarm Indicator and Alarm Cascading Circuit

This module provides four alarm indicators at the top of the cabinet and alarm cascading
interfaces.
14.2.5 Front Panel

The front panel of the SEI has interfaces of various types.

Figure 14-6 shows the appearance of the front panel of the SEI.
Figure 14-6 Front panel of the SEI
ALMO1 ALMO2 LAMP1 LAMP1 OAM F1 F&f PHONE CLK1 CLK2
CLKO1 CLKO2 CLKI1 CLKI2
ALMI1 ALMI2 S1 S2 S3 S4 V1 V2

Interfaces
The front panel of the SEI has 24 interfaces. Table 14-7 describes the types and usage of the
interfaces of the SEI.
Table 14-7 Interfaces of the SEI

Interfac Type of Usage Interfa Type of Usage
e Interface ce Interfa
ce
ALMO1 RJ-45 Interface for 4- ALMI1 RJ-45 Interface for the 1st
channel alarm outputs to the 4th channels
of alarm inputs
ALMO2 RJ-45 Cascading interface ALMI2 RJ-45 Interface for the 5th
for 4-channel alarm to the 8th channels
inputs of alarm inputs
LAMP1 RJ-45 Interface for 4- S1 RJ-45 Serial 1

channel cabinet alarm
indicator outputs
LAMP2 RJ-45 Cascading interface S2 RJ-45 Serial 2

for 4-channel cabinet
alarm indicator inputs
OAM RJ-45 OAM interface S3 RJ-45 Serial 3
F1 RJ-45 F1 interface S4 RJ-45 Serial 4
F&f RJ-45 F&f interface V1 RJ-45 NNI voice interface

1
PHONE RJ-45 Orderwire phone V2 RJ-45 NNI voice interface

interface 2
CLK1 RJ-45 120-ohm clock 1 18 RJ-45 Reserved
CLK2 RJ-45 120-ohm clock 2 20 RJ-45 Reserved
CLKO1 SMB 75-ohm clock output CLKO2 SMB 75-ohm clock

1 output 2
CLKI1 SMB 75-ohm clock input 1 CLKI2 SMB 75-ohm clock input
2
Table 14-8 describes the pins of the CLK1 and CLK2 interfaces.

Table 14-8 Pins of the CLK1 and CLK2 interfaces
1 Receiving (–)
2 Receiving (+)
3 Grounding
8 7 6 5 4 3 2 1
5 Transmitting (+)
6 Grounding
7, 8 Unspecified
Table 14-9 describes the pins of the F1 interface.
Table 14-9 Pins of the F1 interface
1 Transmitting (+)
3 Receiving (+)
4 Unspecified
8 7 6 5 4 3 2 1
5 Unspecified
6 Receiving (–)
7, 8 Unspecified
Table 14-10 describes the pins of the F&f interface.
Table 14-10 Pins of the F&f interface
4 Receive end for RS-232 data
5 Grounding
8 Transmit end for RS-232 data
1, 2, 3, 6, 7 Unspecified
8 7 6 5 4 3 2 1

Table 14-11 describes the pins of the PHONE, V1, and V2 interfaces.
Table 14-11 Pins of the PHONE, V1, and V2 interfaces

4 Signal 1
5 Signal 2
1, 2, 3, 6, 7, 8 Unspecified
8 7 6 5 4 3 2 1
Table 14-12 describes the pins of the LAMP1 and LAMP2 interfaces.
Table 14-12 Pins of the LAMP1 and LAMP2 interfaces

1 Critical alarm signal (+)
2 Critical alarm signal (–)
3 Major alarm signal (+)
4 Power indicator driving signal

8 7 6 5 4 3 2 1 (+)
5 Power indicator driving signal

(–)
6 Major alarm signal (–)
7 Minor alarm signal (+)
8 Minor alarm signal (–)
Table 14-13 describes the pins of the ALM01 and ALM02 interfaces.

Table 14-13 Pins of the ALM01 and ALM02 interfaces

1 Critical and major alarm signal output

(+)
2 Critical and major alarm signal output

(–)
3 Minor and warning alarm signal output

8 7 6 5 4 3 2 1
(+)
4 Alarm signal output 1 (+)
5 Alarm signal output 1 (–)
6 Minor and warning alarm signal output

(–)
7 Alarm signal output 2 (+)
8 Alarm signal output 2 (–)
Table 14-14 describes the pins of the OAM interface.
Table 14-14 Pins of the OAM interface

1 Requests for transmission.
2 Transmits the DTE ready signal.
3 Transmits data.
4 Grounding
8 7 6 5 4 3 2 1
5 Grounding
6 Receives data.
7 Transmits the DCE ready signal.
8 Ready for receiving signals.
Table 14-15 describes the pins of the S1, S2, S3, and S4 interfaces.

Table 14-15 Pins of the S1, S2, S3, and S4 interfaces

1 RS-422 data transmitting (+)
2 RS-422 data transmitting (–)
3 RS-422 data receiving (+)

8 7 6 5 4 3 2 1
5 Grounding
7 Unspecified
8 Transmit end for RS-232 data
Table 14-16 describes the pins of the ALMI1 interface.
Table 14-16 Pins of the ALMI1 interface

1 Alarm input 1
2 Ground for alarm input 1
3 Alarm input 2
4 Alarm input 3
8 7 6 5 4 3 2 1
7 Alarm input 4
Table 14-17 describes the pins of the ALMI2 interface.

Table 14-17 Pins of the ALMI2 interface

1 Alarm input 5
3 Alarm input 6
4 Alarm input 7
8 7 6 5 4 3 2 1
7 Alarm input 8
Connections for Alarm Cascading

l Connections for alarm cascading
Figure 14-7 shows the connections when one or multiple cabinets input or output alarm signals.
Connect the alarm output interface to the alarm cascading interface of a lower level. Make the
connections one by one until the alarm output is connected to the centralized alarm system.
Figure 14-7 Connections for alarm input, alarm cascading, and alarm output
To the
centralized
alarm system
ALMO1 ALMO2 ALMO1 ALMO2
Subrack 1 Subrack 3
ALMO1 ALMO2 ALMO1 ALMO2
Subrack 2 Subrack 4
Cabinet 1 Cabinet 2
l Connection of cabinet alarm indicators

Figure 14-8 shows the connections of the 4-channel cabinet alarm indicators. Connect LAMP1
of subrack 2 to LAMP2 of subrack 1. Finally, connect LAMP1 of subrack 1 to the indicator
interface at the top of the cabinet.

Figure 14-8 Connection of cabinet alarm indicators

Cabinet
indicators
LAMP1 LAMP2
Subrack 2
LAMP1 LAMP2
Subrack 1
Cabinet
14.2.6 Valid Slots

The SEI cannot be removed or inserted and it is fixed to the SEI area in the subrack.

The technical specifications of the SEI include the mechanical specifications and power
consumption.
The mechanical specifications of the SEI are as follows:
l Dimensions (mm): 25.4 (W) x 30 (D) x 290 (H)
l Weight: 0.9 kg
Power Consumption
At room temperature (25°C), the maximum power consumption of the SEI is 10 W.
14.3 FAN
technical specifications of the FAN (fan board).

The FAN is available in one functional version, namely, N1.
14.3.2 Application
The FAN is a system fan board. The FAN can be used on the OptiX OSN equipment series to
provide the heat dissipation function.

The FAN adjusts the fan speed, checks the fan status, reports the fault of the fan control board,
and reports the off-position alarm of the fan.
The FAN consists of the fan control unit and fan power supply unit.
14.3.5 Front Panel
The front panel of the FAN has indicators.
14.3.6 Valid Slots
The FAN can be installed in slots 24 and 25 in the subrack.
The technical specifications of the FAN include the mechanical specifications, power
consumption, and working voltages.

The FAN is available in one functional version, namely, N1.
The logical board of fan tray assembly XE1FAN is displayed as N1FAN on the U2000. The
XE1FAN is of the two-layer structure. The one-layer fan is no longer manufactured.
14.3.2 Application
The FAN is a system fan board. The FAN can be used on the OptiX OSN equipment series to
provide the heat dissipation function.

The FAN adjusts the fan speed, checks the fan status, reports the fault of the fan control board,
and reports the off-position alarm of the fan.
Table 14-18 provides the functions and features of the FAN.
Table 14-18 Functions and features of the FAN
Function and FAN

Feature
Function of Provides the following functions of intelligent speed adjustment:

intelligent speed l Automatically adjusts the fan speed.
adjustment
l Ensures that the fan operates at full speed when the speed
adjustment signal is abnormal.
l In normal situations, all the fan tray assemblies operate normally.
When one fan tray assembly reports an alarm, the other fan tray
assemblies adjust the fan speed to operate at full speed.
Hot swapping Provides the hot swapping function for the fan tray assembly.
function
Backup function Provides the mutual backup function for the power supplies of the
fans in the fan tray assemblies.

Function and FAN

Feature
Status checking Supports the checking of the fan status.
Alarm function Reports the fan alarm and in-service information.
Fan backup The two fans in the fan tray assembly function as a backup for each
other. The two fans operate at the same time. When one fan is faulty,
the other fan adjusts the speed to operate at full speed.
NOTE
l When one fan tray assembly of the three fan three assemblies fails, the system can work normally
for 96 hours at the ambient temperature ranging from 0°C to 45°C.
l The fan tray assembly must be replaced when one of the following situations occurs.
l One or more fans in each fan tray assembly of the three fan tray assemblies are faulty.
l Two fans in a fan tray assembly are faulty.
l When a fan tray assembly works normally, the upper fan and lower fan in the fan tray assembly
operate at the same speed.

The FAN consists of the fan control unit and fan power supply unit.
Figure 14-9 shows the functional block diagram of the XE1FAN.
Figure 14-9 Functional block diagram of the XE1FAN
Status signal
Speed adjusting signal

Fan control
unit
Status signal
Fan
Alarm signal
Power
Fan power External power supply 1

supply
unit External power supply 2
Fan Power Supply Unit

This unit provides the driving voltage for the fan to operate.
Fan Control Unit

The fan control unit controls the operation speed of the fan through the speed adjusting signal.
The fan control unit also detects its faults, faults in the fans, and faults in the fan power supply

unit. When detecting any fault, the fan control unit reports alarm information and the SCC then
issues commands to enable other fans to operate at full speed. The fan control unit also receives
commands from the SCC when the temperature is very low, and stops the fans. The fan control
unit detects the fault in the fan power supply unit, speed adjusting signal, fan state, and in-position
state of the FAN.
14.3.5 Front Panel

The front panel of the FAN has indicators.

The OptiX OSN equipment series use a modular fan platform.
One OptiX OSN 2500 subrack uses two fan tray assemblies, as shown in Figure 14-10.
Figure 14-10 Modular fan tray assembly
Indicators
The indicator (STATE) on the front panel of the board indicates the running state of the hardware.
This indicator is red, green, or yellow when it is on.
14.3.6 Valid Slots

The FAN can be installed in slots 24 and 25 in the subrack.

The technical specifications of the FAN include the mechanical specifications, power
consumption, and working voltages.

The mechanical specifications of the FAN are as follows:
l Dimensions (mm): 120 (W) x 120 (D) x 50.8 (H)
l Weight of the XE1FAN: 1.5 kg
l Weight of the XE3FAN:1.2 kg
Power Consumption
At room temperature (25°C), the maximum power consumption of each fan assembly of the
XE1FAN is 16 W when the input voltage is -48 V.
At room temperature (25°C), the maximum power consumption of each fan assembly of the
XE3FAN is 16 W when the input voltage is -48 V.
Working Voltages
The working voltages of the FAN can be -48 V±20% DC or -60 V±20% DC.

Hardware Description 15 Optical Amplifier Boards
15 Optical Amplifier Boards
About This Chapter
This topic describes the optical amplifier boards such as the BA2, BPA, COA, OBU1, RPC01,
and RPC02, .
15.1 BA2
technical specifications of the BA2 (optical booster amplifier board).
15.2 BPA
technical specifications of the BPA (optical booster and pre-amplifier board).
15.3 COA
technical specifications of the COA (case-shaped optical amplifier).
15.4 RPC01
technical specifications of the RPC01 (forward Raman driving board).
15.5 RPC02
technical specifications of the RPC02 (backward Raman driving board).
15.6 OBU1
technical specifications of the TN11OBU1 (optical booster amplifier board).

15 Optical Amplifier Boards Hardware Description
15.1 BA2
technical specifications of the BA2 (optical booster amplifier board).

The BA2 is available in one functional version, namely, N1.
15.1.2 Application
The BA2 is a two-channel optical power amplifier board. The BA2 amplifies the power of optical
signals and is applicable to the long-distance optical fiber transmission.
During the long-haul transmission of optical signals, the attenuation of the signals is high. Hence,
the BA is required to ensure that the optical receiver can receive normal optical signals.
The BA2 consists of the EDFA module, control module, communication module, and DC/DC
converter module.
15.1.5 Front Panel
The front panel of the BA2 has indicators and interfaces.
15.1.6 Valid Slots
The BA2 can be installed in slots 5–8 and 11–13 in the subrack.
15.1.7 Feature Code
The feature code of the BA2 indicates the output optical power of the optical interfaces.
The technical specifications of the BA2 include the parameters specified for optical interfaces,

The BA2 is available in one functional version, namely, N1.
15.1.2 Application
The BA2 is a two-channel optical power amplifier board. The BA2 amplifies the power of optical
signals and is applicable to the long-distance optical fiber transmission.
Figure 15-1 shows the position of the BA in an optical transmission system.
Figure 15-1 Position of the BA in an optical transmission system
Tx BA Rx


the BA is required to ensure that the optical receiver can receive normal optical signals.
The BA2 amplifies the power of two-channel optical signals. Table 15-1 provides the functions
and features of the BA2.
Table 15-1 Functions and features of the BA2

Function and BA2
Feature
Basic functions Increases the launched optical power of the line board to
13–15 dBm or 15–18 dBm. As a result, when the G.652
optical fiber with a loss of 0.275 dB/km is used, the
transmission distance can be 120 km, 130 km, or above.
Supporting the Supports the automatic control of the laser temperature and
EDFA optical power of the EDFA module.
Supports the automatic monitoring of the input and output
optical power of the EDFA module and query of the optical
power of the EDFA module.
Supports the protection function of the EDFA module.
When no optical signals are received, the laser is
automatically turned off. When optical signals are received,
the laser is automatically turned on.
Performance Supports the reporting of the performance parameters of the

events and alarms laser. Reports various alarms and performance events,
monitoring which facilitates the management and maintenance of the
equipment.
Software upgrade Supports the software upgrade and expansion without

interrupting services.
CAUTION
The wavelength of the optical signal transmitted to the BA2 must be within the range from 1530
nm to 1565 nm. Otherwise, the input optical signal cannot be amplified correctly. Hence, make
sure that the output wavelength of the line board that is interconnected with the BA2 is within
the required range.
NOTE
The BA2 provides the intelligent power adjustment (IPA) function. When the IPA function is enabled and
no input signals are detected on the receive side of a line board, the pumping laser is turned off to prevent
high laser power from damaging the eyes.


The BA2 consists of the EDFA module, control module, communication module, and DC/DC
converter module.
Figure 15-2 shows the functional block diagram of the BA2.
Figure 15-2 Functional block diagram of the BA2

EDFA module
Optical Doped Optical
erbium
input fiber output
Fiber Input WDM Output Optical
Filter
distributor isolate coupler isolate splitter
Input Output
power power
monitor Laser pump monitor
(Pin1) (Pin2)
Input Pump Pump Temperat Output

current
power current detect ure power
Laser Pump
shutdown temperature
Manual control
control LOS in
AD/DA
Control&Generation alarms
Control module
Communication
Communication
SCC unit
module
+3.3 V DC/DC
Fuse -48 V/ -60 V
converter
DC/DC module -48 V/ -60 V
converter
module Fuse +3.3 V
backup
power
EDFA Module
The optical amplifier unit consists of two EDFA modules. One module is the BA and the other
module is the PA. When the board is used as a PA, an optical filter with 1550.12 nm as the
central wavelength is added to the optical output end of the module. A BA does not have the
filter. A semi-conductor laser bump with 980 nm as the central wavelength is in the erbium fiber
inside the EDFA module. Bump light and input signal light are coupled into the erbium fiber
through an optical coupler. The input and output optical signals of the module are led out by two
fiber splitters according to a specific coupling ratio. Then, the optical signals are converted into
optical current by two PIN photoelectrical diodes. The input and output power of the EDFA
module is determined according to the optical signals. The module also applies optical isolating
measures at the input and output ends to improve the performance of the module.

Control Module
The control module performs the following functions:
l Detects and drives bump electricity.
l Controls the temperature of the bump laser.
l Detects the input and output power.
l Reports alarms.
The control module consists of the A/D converting unit, D/A converting unit, and CPU. The A/
D converting unit converts the temperature value of the cooling electricity and the input/output
optical power from analog values into digital values. The converted values are sent to the CPU,
which generates performance reporting events or alarms. The A/D converting unit also converts
bump electricity from analog values into digital values. The converted values are also sent to
the CPU. After the CPU processes the converted values, the D/A converting unit precisely
controls the driving analog circuit of the bump laser of the EDFA optical module. The internal
temperature of the bump laser module remains at 25°C. The temperature sensor inside the bump
laser outputs temperature change to drive the cooler to keep the internal temperature of the bump
laser module at 25°C.
Communication Module
The communication module supports Ethernet communication.
DC/DC Converter Module

require.
15.1.5 Front Panel

The front panel of the BA2 has indicators and interfaces.

The BA2 is available in two types, namely, one-interface BA2 and two-interface BA2.
Figure 15-3 shows the appearance of the front panel of the one-interface BA2.

Figure 15-3 Front panel of the one-interface BA2
BA2
STAT
ACT
PROG
SRV
LASER
RADIATION
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT1
IN1
BA2
Figure 15-4 shows the appearance of the front panel of the two-interface BA2.

Figure 15-4 Front panel of the two-interface BA2
BA2
STAT
ACT
PROG
SRV
LASER
RADIATION
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
OUT1
IN1
OUT2 IN2
BA2
Indicators
Interfaces
The front panel of the one-interface BA2 has one optical interface. The optical interface transmits
and receives one channel of optical signals. The one-interface BA2 uses the swappable optical
module, which facilitates the maintenance and upgrading of the optical module.

The front panel of the two-interface BA2 has two optical interfaces. The optical interfaces
transmit and receive two channels of optical signals. The two-interface BA2 uses the swappable
optical module, which facilitates the maintenance and upgrading of the optical module.
WARNING
If the front panel of the one-interface BA2 has two LC optical interfaces, only the upper optical
interface (IN1/OUT1) is valid. In the case of the BA2 whose front panel has two LC optical
interfaces, determine whether the BA2 is a one-interface BA2 or a two-interface BA2 according
to 15.1.7 Feature Code.
Table 15-2 describes the type and usage of the optical interface of the one-interface BA2.
Table 15-2 Optical interface of the one-interface BA2

Interface
IN LC Receives one channel of optical signals.
OUT LC Transmits one channel of optical signals.
Table 15-3 describes the types and usage of the optical interfaces of the two-interface BA2.
Table 15-3 Optical interfaces of the two-interface BA2
IN1 LC Receives the first channel of optical signals.
OUT1 LC Transmits the first channel of optical signals.
IN2 LC Receives the second channel of optical signals.
OUT2 LC Transmits the second channel of optical signals.
15.1.6 Valid Slots

The BA2 can be installed in slots 5–8 and 11–13 in the subrack.
15.1.7 Feature Code

The feature code of the BA2 indicates the output optical power of the optical interfaces.
Table 15-4 provides the relationship between the feature code of the BA2 and the output optical
power.

Table 15-4 Relationship between the feature code of the BA2 and the output optical power
Board Feature Code Output Optical Power
SSN1BA201 01 Dual-channel optical power

amplification: 14 dBm

amplification: 17 dBm
SSN1BA203 03 Optical power amplification:

14 dBm
SSN1BA204 04 Optical power amplification:

17 dBm

amplification: 14 dBm and 17
dBm

The technical specifications of the BA2 include the parameters specified for optical interfaces,

Table 15-5 lists the parameters specified for the optical interfaces of the BA2.
Table 15-5 Parameters specified for the optical interfaces of the BA2
Parameter Value
Nominal bit rate 2488320 kbit/s and 9953280 kbit/s
Application code V-16.2, U-16.2, L-64.2, V-64.2, and U-64.2
Input wavelength (nm) BA: 1530 to 1565
Input optical power BA: -6 to +3

(dBm)
Output optical power BA: 13 to 15 or 15 to 17

(dBm)
Noise figure (dB) BA: < 6.5
Laser Safety Class


The mechanical specifications of the BA2 are as follows:
l Weight (kg): 1.0
Power Consumption
The maximum power consumption of the BA2 at room temperature (25°C) is 20 W.
15.2 BPA
technical specifications of the BPA (optical booster and pre-amplifier board).

The BPA is available in the following functional versions: N1 and N2. The N1BPA is
discontinued.
15.2.2 Application
The BPA is an optical booster and pre-amplifier board. The BPA provides a BA and a PA, which
are respectively used at the transmit end and receive end of the OptiX OSN equipment.
the BA and PA are required to ensure that the optical receiver can receive normal optical signals.
The BPA consists of the optical part, driving and detecting part, and data processing and
communication part.
15.2.5 Front Panel
The front panel of the BPA has indicators, interfaces, and a laser safety class label.
15.2.6 Valid Slots
The BPA can be installed in slots 5–8 and 11–13 in the subrack.
15.2.7 Feature Code
The feature code of the BPA indicates the output optical power of the optical interfaces.
The technical specifications of the BPA include the parameters specified for optical interfaces,

The BPA is available in the following functional versions: N1 and N2. The N1BPA is
discontinued.
Table 15-6 describes the versions of the BPA.

Table 15-6 Versions of the BPA

Item Description
Functional Versions The BPA is available in two functional versions, namely, N1

and N2.
Differences The N1BPA consists of two EDFA optical modules, whereas

the N2BPA has only one EDFA optical module.
Substitution The two versions can substitute for each other when certain
conditions are met. If the ALS function is required and the
N2BPA is used to substitute for the N1BPA, enable the ALS
function on the N2BPA. If the ALS function is required and the
N1BPA is used to substitute for the N2BPA, enable the ALS
function on the line board. If the ALS function is not required,
this restriction is not applicable.
15.2.2 Application
The BPA is an optical booster and pre-amplifier board. The BPA provides a BA and a PA, which
are respectively used at the transmit end and receive end of the OptiX OSN equipment.
Figure 15-5 shows the position of the BA and PA in an optical transmission system.
Figure 15-5 Position of the BA and PA in an optical transmission system
Tx BA Rx
Tx PA Rx

the BA and PA are required to ensure that the optical receiver can receive normal optical signals.
Table 15-7 provides the functions and features of the BPA.

Table 15-7 Functions and features of the BPA

Function and BPA
Feature
Basic functions Increases the launched optical power of the line board to 13–
15 dBm or 15–18 dBm. As a result, when the G.652 optical
fiber with a loss of 0.275 dB/km is used, the transmission
distance can be 120 km, 130 km, or above.
Pre-amplification Provides the PA module to pre-amplify the received optical

function signals. Increases the power of the small-volume optical
signals by 22-25 dB (N1BPA) or 22-33 dB (N2BPA) so that
the sensitivity of the receiver increases to -37 dBm.
Supporting the EDFA l Supports the automatic control of the laser temperature and
optical power of the EDFA module.
l Supports the automatic monitoring of the input and output
optical power of the EDFA module and query of the optical
power of the EDFA module.
l Supports the protection function of the EDFA module.
When no optical signals are received, the laser is
automatically turned off. When optical signals are
received, the laser is automatically turned on.
Performance events Supports the reporting of the performance parameters of the

and alarms laser. Reports various alarms and performance events, which
monitoring facilitates the management and maintenance of the equipment.
Software upgrade Supports the software upgrade and expansion without

interrupting services.

The BPA consists of the optical part, driving and detecting part, and data processing and
communication part.
Figure 15-6 shows the functional block diagram of the N1BPA.

Figure 15-6 Functional block diagram of the N1BPA

Optical input Optical output Optical input Optical output
EDFA optical module 1 EDFA optical module 2 Optical

part
Output
power
Module Input/output Pump Module Input check Driving
Pump current Drive Drive
temperature power current temperature power and
check module module
control check check control check detecting
Fixed filter part
A/D or D/A conversion
Data processing and

Communication Control communication part
SCC module module
Figure 15-7 shows the functional block diagram of the N2BPA.
Figure 15-7 Functional block diagram of the N2BPA

Optical input Optical output Optical input Optical output
EDFA optical module Optical

part
Module Input/output Pump Module Input/output Driving

Pump current Drive Drive
temperature power current temperature power and
check module module
control check check control check detecting
part
Data processing and

SCC module module
Optical Part
The N1BPA consists of two EDFA optical modules. The N2BPA has only one EDFA optical
module. The EDFA optical module magnifies the optical power.
Driving and Detecting Part

The driving and detecting part provides the EDFA optical module with the driving current. It
also checks the working status of each part in the EDFA optical module. In addition, it predicts
and handles possible faults.

The driving and detecting part performs the following functions: checking the pump current,
driving the optical module, controlling the temperature of the optical module, and checking the
input and output optical power.
Data Processing and Communication Part

The data processing and communication part consists of the CPU and peripheral chips. The data
processing and communication part analyzes the test result of the tested circuit. Then, it adjusts
the driving circuit based on the analysis result so that the gain or output optical power of the
EDFA optical module remains in the range of the rated value. It also classifies the abnormal
states represented by the measured values and reports the abnormal states to the NMS.
15.2.5 Front Panel

The front panel of the BPA has indicators, interfaces, and a laser safety class label.

Figure 15-8 shows the appearance of the front panel of the BPA.
Figure 15-8 Front panel of the BPA
BPA
STAT
ACT
PROG
SRV
LASER
RADIATION
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
BOUT
BIN
POUT
PIN
BPA

Indicators
Interfaces
The front panel of the BPA has two LC optical interfaces. Table 15-8 describes the types and
usage of the optical interfaces of the BPA.
Table 15-8 Optical interfaces of the BPA

Interface
BIN LC Receives one channel of optical signals for

amplification.
BOUT LC Transmits one channel of amplified optical

signals.
PIN LC Receives one channel of optical signals for pre-

amplification.
POUT LC Transmits one channel of pre-amplified optical

signals.
15.2.6 Valid Slots

The BPA can be installed in slots 5–8 and 11–13 in the subrack.
15.2.7 Feature Code

The feature code of the BPA indicates the output optical power of the optical interfaces.
Table 15-9 provides the relationship between the feature code of the BPA and the output optical
power.

Table 15-9 Relationship between the feature code of the BPA and the output optical power
Board Feature Code Description
SSN1BPA01 and 01 The receiver sensitivity of the PA module

SSN2BPA01 is –37 dBm.
The output optical power of the BA
module is 14 dBm.
SSN1BPA02 02 The receiver sensitivity of the PA module

is –37 dBm.
The output optical power of the BA
module is 17 dBm.

The technical specifications of the BPA include the parameters specified for optical interfaces,

Table 15-10 lists the parameters specified for the optical interfaces of the BPA.
Table 15-10 Parameters specified for the optical interfaces of the BPA
Parameter Value
Nominal bit rate 2488320 kbit/s or 9953280 kbit/s
Application code V-16.2, U-16.2, L-64.2, V-64.2, and U-64.2
Input wavelength (nm) BA: 1530 to 1565

PA: 1550.12
Input optical power BA: -6 to +3

(dBm) PA: -28 to -10 (when the BPA works with the line board at the rate
of 10 Gbit/s)
PA: -38 to -10 (when the BPA works with the line board at the rate
less than 10 Gbit/s)
Output optical power N1BPA: 13 to 15 or 15 to 17 (BA)

(dBm) N2BPA: 13 to 15 (BA)
Sensitivity (dBm) PA: -38
Noise figure (dB) BA: < 6.5

PA: < 6

Parameter Value
Signal gain (dB) N1BPA: +22 to +25 (PA)

N2BPA: +22 to +33 (PA)
NOTE
When you perform a loopback on the PA module of the BPA, prevent the damage caused by high input
optical power to the optical module.
Laser Safety Class

The mechanical specifications of the BPA are as follows:
l Weight of the N1BPA (kg): 1.0
l Weight of the N2BPA (kg): 1.2
Power Consumption
The maximum power consumption of the N1BPA at room temperature (25°C) is 20 W.
The maximum power consumption of the N2BPA at room temperature (25°C) is 11 W.
15.3 COA
technical specifications of the COA (case-shaped optical amplifier).

The COA is available in three functional versions, namely, 61, 62, and N1.
15.3.2 Application
The COA is a case-shaped optical amplifier that is not installed in a slot of the subrack. The
COA is mainly used to amplify optical signals and is applicable to the long-distance optical fiber
transmission.
The COA integrates the optical amplifier module, the driving circuit, and the communication
circuit in an aluminium case.
The 61COA and N1COA consist of the EDFA module, control module, communication module,
and DC/DC converter module.
15.3.5 Front Panel
The front panel of the COA has indicators and interfaces.

15.3.6 Valid Slots

The COA adopts the case-shape design. Hence, the COA does not require a slot in the subrack.
15.3.7 Feature Code
The feature code of the 61COA indicates the output optical power of the optical interfaces.
The technical specifications of the COA include the parameters specified for optical interfaces,

The COA is available in three functional versions, namely, 61, 62, and N1.
The working principle of the 62COA is basically the same as the working principle of the 61COA
or N1COA. The difference between the 62COA and the 61COA (N1COA) is with regard to the
used optical amplifier modules. The 62COA uses the Raman optical amplifier module, whereas
the 61COA and N1COA use the EDFA optical amplifier module.
NOTE
The COA that occurs in the following text includes the 61COA, N1COA, and 62COA. The characteristics
of the COA are the common characteristics of the three types of COAs.
Table 15-11 describes the versions of the COA.
Table 15-11 Versions of the COA

Item Description
Functional versions The COA is available in three functional versions, namely, 61, 62,
and N1.
Differences The 61COA can function as a BA or a PA. The BA is the EDFA

optical amplifier in the 1530 nm to 1560 nm fiber communication
window; the PA is the EDFA optical amplifier in the 1550 nm fiber
communication window.
The N1COA is the EDFA optical amplifier in the 1530 nm to 1560
nm fiber communication window.
The N1COA does not have a filter and is a multi-wavelength
amplifier.
The 62COA uses the Raman optical amplifier module.
Substitution The versions cannot be substituted with each other.
15.3.2 Application
The COA is a case-shaped optical amplifier that is not installed in a slot of the subrack. The
COA is mainly used to amplify optical signals and is applicable to the long-distance optical fiber
transmission.
The application of the COA is the same as that of the BA and PA on the OptiX OSN equipment
series. For details, see Figure 15-5.


The COA integrates the optical amplifier module, the driving circuit, and the communication
circuit in an aluminium case.
The COA is an external and independent amplifier and does not occupy a slot in the subrack.
The COA can work independently. The equipment supports a maximum of two 61COAs, two
N1COAs, or one 62COA.
61COA and N1COA

The 61COA/N1COA is equipped with only one EDFA optical module. The 61COA/N1COA
can work as a power amplifier, a pre-amplifier, or a line amplifier. Figure 15-9 shows the
appearance of the 61COA/N1COA.
The optical characteristics of the 61COA/N1COA are the same as the optical characteristics of
the optical amplifier boards such as the BPA and BA2. The difference between the 61COA/
N1COA and the optical amplifier boards is that the 61COA/N1COA is an external optical
amplifier unit, which does not occupy a slot in the subrack. The 61COA/N1COA can be directly
installed in the ETSI cabinet but requires separate power supply.
Figure 15-9 Appearance of the 61COA/N1COA (PA)
The application of the 61COA/N1COA in the optical transmission system is the same as the
application of the BA2 and BPA in the optical transmission system. Table 15-12 provides the
functions and features of the 61COA/N1COA.
Table 15-12 Functions and features of the 61COA/N1COA
Function and 61COA/N1COA

Feature
Power The 61COA increases the launched optical power of the line
amplification board to 13–15 dBm or 15–17 dBm. As a result, the valid
function transmission distance of optical signals is extended.
Pre-amplification The 61COA/N1COA provides the pre-amplification

function function. The receiver sensitivity is –38 dBm.
ALS function Supports the ALS function.

Function and 61COA/N1COA

Feature
Communication Communicates with the CXL through the RS-232 serial

through serial ports port, reports the alarms and performance events of the COA
to the NMS, and receives the configuration commands
issued by the NMS.
62COA
The 62COA is a case-shaped Raman optical amplifier and is used at the receive end of the SDH
equipment.
The 62COA transmits counter-propagated pumping optical signals to fibers for distributed
Raman amplification. The gain medium of distributed Raman amplification is the line fiber that
can realize better noise performance. This is different from the 61COA. Hence, the 62COA can
extend the transmission distance, reduce the signal-to-noise ratio, and realize ultra long hop
transmission for a single span.
Figure 15-10 shows the appearance of the 62COA.
Figure 15-10 Appearance of the 62COA

4
1
2
3
1. Captive screw 2. Ejector lever 3. COA board

4. ESD jack 5. Power access board
The 62COA is a case-shaped Raman optical amplifier and is used at the receive end of the optical
transmission system. The optical signals are amplified during transmission based on the
stimulated Raman scattering effect of the fiber. The 62COA needs to work with the EDFA to
realize the transmission of optical signals for more than 170 km. For details, see Figure
15-11.

Figure 15-11 Application of the 62COA

Raman amplifier
Signal light
EDFA Pump light
EDFA
Pump light Laser
Fiber
Transmitting end Coupler Receiving end
The Raman amplifier amplifies optical signals during transmission by transmitting counter-
propagated pumping optical signals to fibers for distributed Raman amplification. As a result,
the phase of optical signals is significantly different from the phase of pump signals. The power
fluctuation of the Raman pumping is offset in the counter-propagation. Hence, the noise caused
by the pump can be effectively suppressed.
Table 15-13 provides the functions and features of the 62COA.
Table 15-13 Functions and features of the 62COA

Function and 62COA
Feature
Basic functions Is configured at the receive end of the SDH system, and
realizes extra long-haul transmission (more than 170 km)
when working with an EDFA whose output power is 17
dBm at the transmit end.
Pre-amplification The 62COA provides the pre-amplification function. The

function receiver sensitivity is –39 dBm.
ALS function Supports the ALS function.
Communication Communicates with the CXL through the RS-232 serial

through serial ports port, reports the alarms and performance events of the COA
to the NMS, and receives the configuration commands
issued by the NMS.

The 61COA and N1COA consist of the EDFA module, control module, communication module,
and DC/DC converter module.
The working principle of the N1COA is similar to the working principle of the 61COA. The
61COA has the filter unit, whereas the N1COA does not have the filter unit.
Figure 15-12 shows the functional block diagram of the 61COA/N1COA.

Figure 15-12 Functional block diagram of the 61COA/N1COA

Optical output
Optical input
Fixed For pre-amplification
filter
EDFA optical Optical part

module
Module Driving and

Pump Drive Input/Output
temperature detecting part
power check module Power check
control
Data processing and

SCC module module
EDFA Module
The optical amplifier unit consists of two EDFA modules. One module is the BA and the other
module is the PA. When the board is used as a PA, an optical filter with 1550.12 nm as the
central wavelength is added to the optical output end of the module. A BA does not have the
filter. A semi-conductor laser bump with 980 nm as the central wavelength is in the erbium fiber
inside the EDFA module. Bump light and input signal light are coupled into the erbium fiber
through an optical coupler. The input and output optical signals of the module are led out by two
fiber splitters according to a specific coupling ratio. Then, the optical signals are converted into
optical current by two PIN photoelectrical diodes. The input and output power of the EDFA
module is determined according to the optical signals. The module also applies optical isolating
measures at the input and output ends to improve the performance of the module.
Control Module
The control module performs the following functions:
l Detects and drives bump electricity.

l Controls the temperature of the bump laser.
l Detects the input and output power.
l Reports alarms.
The control module consists of the A/D converting unit, D/A converting unit, and CPU. The A/
D converting unit converts the temperature value of the cooling electricity and the input/output
optical power from analog values into digital values. The converted values are sent to the CPU,
which generates performance reporting events or alarms. The A/D converting unit also converts
bump electricity from analog values into digital values. The converted values are also sent to
the CPU. After the CPU processes the converted values, the D/A converting unit precisely

controls the driving analog circuit of the bump laser of the EDFA optical module. The internal
temperature of the bump laser module remains at 25°C. The temperature sensor inside the bump
laser outputs temperature change to drive the cooler to keep the internal temperature of the bump
laser module at 25°C.
Communication Module
The communication module supports Ethernet communication.
DC/DC Converter Module

require.
15.3.5 Front Panel

The front panel of the COA has indicators and interfaces.

Figure 15-13 shows the appearance of the front panel of the 61COA/N1COA.
Figure 15-13 Front panel of the 61COA/N1COA

8 9 10
1 2 3 4 5 6 7 11
1. ID DIP switch 2. Running indicator 3. Alarm indicator

4. RS-232-1 5. RS-232-2 6. MONITOR-1
7. MONITOR-2 8. IN: input optical interface
9. OUT: output optical interface 10. Power switch 11. -48 V power interface
Figure 15-14 shows the appearance of the front panel of the 62COA.

Figure 15-14 Front panel of the 62COA
1. SC/PC optical interface (OUT) 2. LSH optical interface (IN) 3. Air filter
4. Fan board 5. RJ-45 interface 6. RS-232-1
7. RS-232-2 8. DIP switch (bits 8-5) 9. DIP switch (bits 4-1)
10. Power input interface 11. Power switch
Indicators
l Board running status indicator (RUN) – one color (green)
l Fan alarm indicator (ALM) – one color (red)
Interfaces
The front panel of the 61COA/N1COA has one SC/PC optical interface. The optical interface
receives and transmits one channel of optical signals. The input optical interface of the 62COA
is connected to the LSH flange and the output optical interface is connected to the SC flange.
Figure 15-15 shows the SC/PC fiber connector that the SC/PC optical interfaces of the 61COA
and N1COA use.
Figure 15-15 SC/PC fiber connector

Figure 15-16 shows the flange and fiber connector that the input optical interface of the 62COA
uses.
Figure 15-16 LSH flange and fiber connector
NOTE
The protective cap of the LSH fiber jumper is specially designed. When you connect the LSH fiber jumper
to an LSH flange, do not remove the protective cap but insert the LSH fiber jumper into the LSH flange
directly.
The COA has two RS-232 serial ports, which function as the control and communication ports.
The serial ports communicate with the SCC unit and report alarms and performance events.
Table 15-14 provides the pin assignments of the RS-232 serial port.
Table 15-14 Pin assignments of the RS-232 serial port

Front View Pin of RS-232-1 Pin of RS-232-2 Definition
2 2 Used to receive
data.
3 3 Used to transmit
9
data.
1
5 5 Used for
common
grounding.
TIP
To realize the communication between the COA and the CXL, use a serial port control line to connect the
RS-232-1 serial port of the COA to the F&f port of the subrack.
The RS-232-2 serial port is used in the scenario where several COAs are used at a single station.
To enable each COA to communicate with the SCC unit, use a serial port line to connect the
RS-232-2 port of COA 1 to the RS-232-1 port of COA 2, and use another serial port line to
connect the RS-232-2 port of COA 2 to the RS-232-1 port of COA 3. Connect the other COAs
similarly. In this case, each COA communicates with the SCC unit through the RS-232-1 serial
port of COA 1.

The COA has two MONITOR interfaces. When the 61COA is used alone, the MONITOR-1
interface and MONITOR-2 interface are the alarm output interfaces. In this case, the two
MONITOR interfaces have the same functions. Table 15-15 provides the pin assignments of
the MONITOR interfaces.
Table 15-15 Pin assignments of the MONITOR interfaces

Front View Pin of Pin of Definition
MONITOR- MONITOR-2
1
1 and 6 1 and 6 The input optical power of the

EDFA module is very low.
2 and 7 2 and 7 The working current of the pump

9
laser of the EDFA module

1
exceeds the threshold.
3 and 8 3 and 8 The cooling current of the pump

laser of the EDFA module
exceeds the threshold.
4 and 9 4 and 9 The ambient temperature of the

EDFA module exceeds the
threshold.
5 5 Digital ground
The 62COA has one RJ-45 connector, through which the 62COA is connected to the computer
for software loading. Table 15-16 provides the pin assignments of the RJ-45 connector of the
62COA.
Table 15-16 Pin assignments of the RJ-45 connector of the 62COA

1 Transmitting (+)
3 Receiving (+)
4 Not defined
8 7 6 5 4 3 2 1
5 Not defined
6 Receiving (–)
7–8 Not defined
The COA has one DIP switch.

l The DIP switches of the 61COA/N1COA are in the lower left corner of the front panel.
The DIP switches are used to set the ID of the 61COA/N1COA. When a bit of the DIP
switch is set upwards, the bit is in the OFF position. When the bit is set downwards, the bit
is in the ON position. The SCC identifies a 61COA/N1COA through the ID of the 61COA/
N1COA. The SCC communicates with the 61COAs/N1COAs whose IDs are different in
the master-slave calling mode.
l The DIP switch of the 62COA is used to set the ID of the 62COA and the type of fiber.
The DIP switch has eight bits. The bit on the leftmost side is numbered "8" and the bit on
the rightmost side is numbered "1". When a bit of the DIP switch is set upwards, the bit
indicates "0". When the bit is set downwards, the bit indicates "1". The first four bits (1–
4) are used to set the board ID, which ranges from 20 to 35. In actual situations, the first
four bits indicate only the range from 20 to 27. The fifth bit is used to set the type of fiber.
When bit 5 indicates "0", the fiber is of the G.652 type. When bit 5 indicates "1", the fiber
is of the G.655 type.
15.3.6 Valid Slots

The COA adopts the case-shape design. Hence, the COA does not require a slot in the subrack.
In the ETSI cabinet, the 61COA or N1COA is installed on a special bracket, and the 62COA is
installed directly in the cabinet through the mounting ears. On the NMS, the logical slots of the
61COA, N1COA, and 62COA are slots 101 and 102.
Installation Position of the 61COA or N1COA

The installation of the 61COA is considered as an example. The bracket is fixed on the crossbars
on both sides of the cabinet. There are guide rails on the bracket. The 61COA is pushed onto
the bracket along the guide rails and is fixed on the bracket. One bracket can hold two 61COAs
horizontally. The front panels of the two 61COAs are on the front side of the cabinet, as shown
in Figure 15-17.
Figure 15-17 Position of the 61COA in the ETSI cabinet
Installation Position of the 62COA

The case-shaped 62COA can be installed in the 300 mm or 600 mm ETSI cabinet through
mounting ears and screws. If the upward-wiring scheme is applied, the 62COA is installed at
the bottom of the ETSI cabinet (positions of the first and third floating nuts). If the downward-

wiring scheme is applied, the 62COA is installed in any idle place of the 2.6 m high cabinet or
in the ETSI cabinet that is not fully configured.
15.3.7 Feature Code

The feature code of the 61COA indicates the output optical power of the optical interfaces.
Table 15-17 provides the relationship between the feature code of the 61COA and the output
optical power.
Table 15-17 Relationship between the feature code of the 61COA and the output optical power
Board Feature Code Description
SS61COA01 01 The output optical power of the

BA module is 14 dBm.
SS61COA02 02 The output optical power of the

BA module is 17 dBm.
SS61COA03 03 The receiver sensitivity of the

PA module is –38 dBm.

The technical specifications of the COA include the parameters specified for optical interfaces,

Table 15-18 lists the parameters specified for the optical interfaces of the COA.
Table 15-18 Parameters specified for the optical interfaces of the COA
Parameter Value
61COA N1COA 62COA
Operating 1550 1550.12

wavelength range
(nm)
Input optical power BA: -6 to +3 -10 to -37 -43 to -20

range (dBm) PA: -10 to -38 (The LOS alarm is reported
when the input optical
power reaches -45 dBm.)

Parameter Value
61COA N1COA 62COA
Launched optical BA14: 13 to 15 15 to 17 NA

power range (dBm) BA17: 15 to 17
PA: -16 to 12
NOTE
"BA14" indicates that
the output optical power
of a BA is always 14
dBm.
"BA17" indicates that
the output optical power
of a BA is always 17
dBm.
Signal gain (dB) PA: > 26 > 23 13
Receiver sensitivity PA: -38 (in the case of -38 -39

(dBm) 2.5 Gbit/s signals)
Pump wavelength NA 1451.2

(nm)
Maximum on/off NA > 15 (in the case of the G.

gain (dB) 652 fiber)
Noise figure (dB) BA14: < 7 < -1.5

BA17: < 7
PA: < 5
Laser Safety Class

The mechanical specifications of the 61COA and N1COA are as follows:
l Dimensions (mm): 240 (W) x 190 (D) x 50 (H)
l Weight (kg): 3.5
The mechanical specifications of the 62COA are as follows:
l Dimensions (mm): 294 (W) x 436 (D) x 86 (H)
l Weight (kg): 8.0
Power Consumption
The maximum power consumption of the 61COA at room temperature (25°C) is 10 W.
The maximum power consumption of the 62COA at room temperature (25°C) is 75 W.

The maximum power consumption of the N1COA at room temperature (25°C) is 10 W.
15.4 RPC01
technical specifications of the RPC01 (forward Raman driving board).

The RPC01 is available in one functional version, namely, N1.
15.4.2 Application
The RPC01 is an external forward Raman driving board that must work with the EDFA.
The RPC01 supports the online optical performance monitoring function and other functions.
The RPC01 consists of the Raman pump optical module, driving and detecting module,
communication and control module, and power supply module.
15.4.5 Front Panel
The front panel of the RPC01 has indicators, interfaces, and a laser safety class label.
15.4.6 Valid Slots
The RPC01 is an external forward Raman driving board. Hence, the RPC01 is not installed in
the subrack. The RPC01 is connected to the COM interface of an NE directly or through a hub
to realize the communication with the SCC. The logical slot of the RPC01 on the NMS is slot
104.
The RPC01 has two groups of jumpers, namely, group J3 and group J4.
15.4.8 Feature Code
The feature code of the RPC01 contains three characters, which indicate the gain of the optical
signal processed by the RPC01.
You can set the parameters for the RPC01 by using the U2000.
The technical specifications of the RPC01 include the parameters specified for optical interfaces,

15.4.2 Application
The RPC01 is an external forward Raman driving board that must work with the EDFA.
Figure 15-18 shows the position of the RPC01 in an optical transmission system.
Figure 15-18 Position of the RPC01 in an optical transmission system
Transmitting RPC01 Receiving


Table 15-19 provides the functions and features of the RPC01.
Table 15-19 Functions and features of the RPC01

Function and RPC01
Feature
Basic functions l Generates multi-channel pump light of high power, which

provides energy for the amplification of signals in the fiber.
l Realizes the distributed online amplification of signals over long
distance with wide bandwidth and low noise.
Online optical Provides the online monitoring interface. A small amount of optical
performance signal can be transmitted to the spectrum analyzer through the
monitoring function interface so that the spectrum and optical performance of the
multiplexed optical signal can be monitored without a service
interruption.
Performance events l Detects the pump optical power, temperature control current,
and alarms pump current, and back facet current.
monitoring l Supports the setting of the LOS value to disable the output port of
the laser.

The RPC01 is used at the transmit end of the system. The RPC01 utilizes the stimulated Raman
scattering effect of the fiber to amplify the optical signals during transmission.

Figure 15-19 Functional block diagram of the RPC01 (forward pump)
Signal light Splitter Signal light

LINE SYS
Pump light
Pump source MON
Raman pump optical module
Control the Detect the pump
PIN Detect the
pumping current light power and temperature.
and temperature. current.
Driving and detecting module
Control

Power supply
module
Fuse Voltages required
by the board
Backplane
DC power provided SCC (controlled by
by the backplane the SCC)
Signal Flow
The signal light is received at the SYS interface and transmitted to the optical line through the
LINE interface. A few supervisory signals are transmitted to the test instrument through the
MON interface for online optical performance monitoring. The pump light that is generated by
the RPC01 is transmitted to the optical line through the LINE interface in the same direction of
the signal light, to realize the distributed amplification of the optical signal. The Ethernet
interface of the RPC01 is connected to the COM interface of an NE directly or through a hub to
realize the communication with the SCC.
Functional Modules
l Raman pump optical module
– The laser in the pump source module generates the pump light and sends the pump light
to the optical line for transmission. The Raman pump optical module utilizes the
stimulated Raman scattering effect of the fiber to amplify the optical signals during
transmission.
– The splitter splits one channel of optical signals from the pump source module into two
channels of signals of different power. One channel of signals are transmitted through
the SYS interface to the main optical path. The other channel of signals are transmitted
to the MON interface for spectrum detection and supervising.
l Driving and detecting module

– Detects the optical power of the service signals in real time.

– Detects the driving current, back facet current, cooling current, and operating
temperature of the pump inside the pump optical module in real time.
– Drives the pump laser inside the pump optical module.
– Reports alarms and performance events to the logic and control module.
l Communication and control module
– Controls the operations on the board.
– Controls the operations on each module of the board according to the CPU instructions.
– Collects the alarms, performance events, working status, and voltage detection
information of each functional module of the board.
– Communicates with the SCC.
l Power supply module
Converts the DC power provided by the backplane into the power required by each module
of the board.
15.4.5 Front Panel


Figure 15-20 shows the appearance of the front panel of the RPC01.
Figure 15-20 Front panel of the RPC01
03793010860000002 Y SSN1 RPC 01
Board manufacturing Board serial

information number and name
MON SYS LINE
LASER
RADIATION
AVOID EYE OR SKIN
EXPOSURE TO DIRECT OR
SCATTERED RADIATION
CRPC
CLASS 4 LASER
PRODUCT
ALM RUN
警告:开启电源前，务必连好光纤
! WARNING: FIBERS MUST

BE CONNECTED SEFORE
POWER UP
RS232-1 RS232-2 LAN
Indicators

Interfaces
The front panel of the RPC01 has six interfaces. Table 15-20 describes the types and usage of
the interfaces of the RPC01.
Table 15-20 Interfaces of the RPC01

Interface
LINE LSH/APC Transmits the amplified signals to the fibers.
SYS LC Is connected to the BA and receives the optical signals

transmitted from the BA.
NOTE
The permissible input power for the SYS interface on the
RPC01 board ranges from +5 dBm to +8 dBm. Therefore,
when the output power of a BA is +14 dBm or +17 dBm, you
need to add an optical attenuator ranging from 5 dB to 10 dB
in front of the SYS interface.
MON LC Monitors the optical performance.

The power of the MON interface is 1/99 of the power
of the SYS interface. That is, the power of the MON
interface is 20 dB less than the power of the SYS
interface.
LAN RJ-45 Is connected to the COM interface of an NE directly or

through a hub to realize the communication with the
SCC.
RS232-1/ - Is an RS-232 communication interface.

RS232-2
15.4.6 Valid Slots

The RPC01 is an external forward Raman driving board. Hence, the RPC01 is not installed in
104.

Figure 15-21 shows the jumpers of the RPC01.

Figure 15-21 Jumpers of the RPC01

RPC01
J4 J3
10
9
2
CPU
10
9
2
1
To ensure that the board can operate normally, set the jumpers as follows:
l Short-circuit jumpers 1 and 2 of group J4.
15.4.8 Feature Code

Table 15-21 describes the feature code of the RPC01.
Table 15-21 Feature code of the RPC01
The first character - Is always "G".
The second and third Gain Indicates the gain.

characters
Consider the N1RPC01 whose feature code is "G10" as an example. "G10" indicates that the
maximum gain of the optical signal is 10 dB.

You can set the following parameters for the RPC01 by using the U2000:
l Laser status
l Board work type
l Fixed Pump Optical Power (dBm)
l Min. Fixed Pump Optical Power (dBm)

l Max. Fixed Pump Optical Power (dBm)

For the description of each parameter, see 22.6 Optical Amplifier Boards.
Interface Display
Table 15-22 shows the serial numbers of the optical interfaces on the front panel of the RPC01
on the NMS.
Table 15-22 Serial numbers of the optical interfaces on the front panel of the RPC01 on the
NMS
Interface on the Front Panel Serial Number of the NMS Interface
LINE 1
SYS 2
MON 3


Table 15-23 lists the parameters specified for the optical interfaces of the RPC01.
Table 15-23 Parameters specified for the optical interfaces of the RPC01
Parameter Value
Pump wavelength (nm) 1400 to 1500
Operating wavelength (nm) 1529 to 1561
Receiver optical power range (dBm) -35 to 17
Maximum pump power (dBm) 29
Gain on the G.652 fiber (dB) ≥ 10
Gain on the LEAF fiber (dB) ≥ 12
Equivalent noise figure on the G.652 fiber ≤0

(dB)
Equivalent noise figure on the LEAF fiber ≤ -1

(dB)
Polarization dependent loss (dB) ≤ 0.5
Type of output connector LSH/APC or LC/PC

Laser Safety Class

the optical interfaces is more than 27 dBm (500 mW).
l Dimensions (mm): 76.0 (W) x 218.5 (D) x 345.0 (H)
l Weight (kg): 4.0
Power Consumption
The maximum power consumption of the RPC01 at room temperature (25°C) is 70 W.
15.5 RPC02
technical specifications of the RPC02 (backward Raman driving board).

15.5.2 Application
The RPC02 is an external backward Raman driving board that must work with the EDFA.
15.5.5 Front Panel
15.5.6 Valid Slots
The RPC02 is an external backward Raman driving board. Hence, the RPC02 is not installed in
105.
15.5.8 Feature Code


15.5.2 Application
The RPC02 is an external backward Raman driving board that must work with the EDFA.
Figure 15-22 shows the position of the RPC02 in an optical transmission system.
Figure 15-22 Position of the RPC02 in an optical transmission system
Transmitting RPC02 Receiving

Table 15-24 provides the functions and features of the RPC02.
Table 15-24 Functions and features of the RPC02
Function and RPC02

Feature
Basic functions l Generates multi-channel pump light of high power, which

provides energy for the amplification of signals in the fiber.
l Realizes the distributed online amplification of signals over long
distance with wide bandwidth and low noise.
performance signal can be transmitted to the spectrum analyzer through the
monitoring function interface so that the spectrum and optical performance of the
multiplexed optical signal can be monitored without a service
interruption.
Performance events l Detects the pump optical power, temperature control current,
and alarms pump current, and back facet current.
monitoring l Supports the setting of the LOS value to disable the output port of
the laser.


The RPC02 is used at the receive end of the system. The RPC02 utilizes the stimulated Raman
scattering effect of the fiber to amplify the optical signals during transmission. The pump light
travels in the reverse direction of the signal light. The RPC02 must work with the EDFA.
Figure 15-23 shows the functional block diagram of the RPC02.
Figure 15-23 Functional block diagram of the RPC02 (backward pump)
Signal light Splitter Signal light

LINE SYS
Pump light
Pump source MON
Raman pump optical module
Control the Detect the pump
PIN Detect the
pumping current light power and temperature.
and temperature. current.
Control

Power supply
module
Fuse Voltages required
by the board
Backplane
DC power provided SCC (controlled by
by the backplane the SCC)
Signal Flow
The pump source of the RPC02 sends the pump light to the WDM side through the LINE optical
interface. On the line, the signals that are amplified through the distributed amplification are
received through the LINE interface. Then, the splitter splits the signals into two channels. The
service optical signals are transmitted through the SYS interface. A few supervisory signals are
transmitted to the test instrument through the MON interface for online optical performance
monitoring. The Ethernet interface of the RPC02 is connected to the COM interface of an NE
directly or through a hub to realize the communication with the SCC.
Functional Modules
l Raman pump optical module
– The laser in the pump source module generates the pump light and sends the pump light
to the optical line for transmission. The Raman pump optical module utilizes the
stimulated Raman scattering effect of the fiber to amplify the optical signals during
transmission.
– The splitter splits one channel of optical signals from the pump source module into two
channels of signals of different power. One channel of signals are transmitted through

the SYS interface to the main optical path. The other channel of signals are transmitted
to the MON interface for spectrum detection and supervising.
l Driving and detecting module
– Detects the optical power of the service signals in real time.
– Detects the driving current, back facet current, cooling current, and operating
temperature of the pump inside the pump optical module in real time.
– Drives the pump laser inside the pump optical module.
– Reports alarms and performance events to the logic and control module.
l Communication and control module
– Controls the operations on the board.
– Controls the operations on each module of the board according to the CPU instructions.
– Collects the alarms, performance events, working status, and voltage detection
information of each functional module of the board.
– Communicates with the SCC.
l Power supply module
Converts the DC power provided by the backplane into the power required by each module
of the board.
15.5.5 Front Panel


Figure 15-24 shows the appearance of the front panel of the RPC02.
Figure 15-24 Front panel of the RPC02
03793010860000002 Y SSN1 RPC02
Board manufacturing Board serial

information number and name
MON SYS LINE
LASER
RADIATION
AVOID EYE OR SKIN
EXPOSURE TO DIRECT OR
SCATTERED RADIATION
CRPC
CLASS 4 LASER
PRODUCT
ALM RUN
警告:开启电源前，务必连好光纤
! WARNING: FIBERS MUST

BE CONNECTED SEFORE
POWER UP
RS232-1 RS232-2 LAN
Indicators


Interfaces
The front panel of the RPC02 has six interfaces. Table 15-25 describes the types and usage of
the interfaces of the RPC02.
Table 15-25 Interfaces of the RPC02

Interface
LINE LSH/APC Receives the optical signals transmitted from the line.
SYS LC Is connected to the BA and transmits the amplified

signals to the fibers.
MON LC Monitors the optical performance.

The power of the MON interface is 1/99 of the power
of the SYS interface. That is, the power of the MON
interface is 20 dB less than the power of the SYS
interface.
LAN RJ-45 Is connected to the COM interface of an NE directly or

through a hub to realize the communication with the
SCC.
RS232-1/ - Is an RS-232 communication interface.

RS232-2
15.5.6 Valid Slots

The RPC02 is an external backward Raman driving board. Hence, the RPC02 is not installed in
105.

Figure 15-25 shows the jumpers of the RPC02.

Figure 15-25 Jumpers of the RPC02

RPC02
J4 J3
10
9
2
CPU
10
9
2
1
To ensure that the board can operate normally, set the jumpers as follows:
l Do not short-circuit jumpers 9 and 10 of group J3.
15.5.8 Feature Code

Table 15-26 describes the feature code of the RPC02.
Table 15-26 Feature code of the RPC02
The first character - Is always "G".

characters
Consider the N1RPC02 whose feature code is "G10" as an example. "G10" indicates that the
maximum gain of the optical signal is 10 dB.

You can set the following parameters for the RPC02 by using the U2000:
l Laser status
l Board work type
l Fixed Pump Optical Power (dBm)
l Min. Fixed Pump Optical Power (dBm)

l Max. Fixed Pump Optical Power (dBm)
Interface Display
Table 15-27 shows the serial numbers of the optical interfaces on the front panel of the RPC02
on the NMS.
Table 15-27 Serial numbers of the optical interfaces on the front panel of the RPC02 on the
NMS
Interface on the Front Panel Serial Number of the NMS Interface
LINE 1
SYS 2
MON 3


Table 15-28 lists the parameters specified for the optical interfaces of the RPC02.
Table 15-28 Parameters specified for the optical interfaces of the RPC02
Parameter Value
Pump wavelength (nm) 1400 to 1500
Operating wavelength (nm) 1529 to 1561
Receiver optical power range (dBm) -35 to 3
Maximum pump power (dBm) 29.5
Gain on the G.652 fiber (dB) > 10
Gain on the LEAF fiber (dB) NA
Equivalent noise figure on the G.652 fiber (dB) NA
Equivalent noise figure on the LEAF fiber (dB) NA
Polarization dependent loss (dB) ≤ 0.5
Type of output connector LSH/APC or LC/PC

Laser Safety Class

the optical interfaces is more than 27 dBm (500 mW).
The mechanical specifications of the RPC02 are as follows:
l Dimensions (mm): 76.0 (W) x 218.5 (D) x 345.0 (H)

l Weight (kg): 4.2
Power Consumption
15.6 OBU1
technical specifications of the TN11OBU1 (optical booster amplifier board).

The OBU1 is available in the following functional version: TN11.
15.6.2 Application
The OBU1 is an optical booster amplifier board that amplifies optical signals.
The OBU1 supports the online optical performance monitoring function, gain lock, transient
control, and other functions.
The OBU1 consists of the EDFA optical module, driving and detecting module, communication
and control module, and power supply module.
15.6.5 Front Panel
The front panel of the OBU1 has indicators, interfaces, and a laser safety class label.
15.6.6 Valid Slots
The OBU1 can be installed in slots 5–8 and 11–13 in the subrack.
15.6.7 Feature Code
The feature code of the OBU1 contains six characters, which indicate the gain and maximum
nominal input optical power of the optical signals processed by the OBU1.
You can set the parameters for the OBU1 by using the U2000.
The technical specifications of the OBU1 include the parameters specified for optical interfaces,


The OBU1 is available in the following functional version: TN11.
15.6.2 Application
The OBU1 is an optical booster amplifier board that amplifies optical signals.
The OBU1 is available in two types, namely, OBU101 and OBU102. The OBU101 is used at
the receive end and the OBU102 is used at the transmit end. Figure 15-26 shows the position
of the OBU1 in an optical transmission system.
Figure 15-26 Position of the OBU1 in an optical transmission system
Transmitting OBU102 Receiving
Transmitting OBU101 Receiving

The OBU1 supports the online optical performance monitoring function, gain lock, transient
control, and other functions.
Table 15-29 provides the functions and features of the OBU1.
Table 15-29 Functions and features of the OBU1
Function and OBU1

Feature
Basic functions Amplifies a maximum of 40 channels of optical signals with the channel
spacing of 100 GHz at the same time.
Supports the system to transmit services over different fiber spans
without electrical regeneration.
Typical gain The typical gain of the OBU101 is 20 dB and the typical gain of the
OBU102 is 23 dB.
performance signal can be transmitted to the spectrum analyzer through the interface
monitoring so that the spectrum and optical performance of the multiplexed optical
function signal can be monitored without a service interruption.
Gain lock function The EDFA inside the board has the gain lock function. When one or
more channels are added or dropped, or optical signals of certain
channels fluctuate, the signal gain of other channels is not affected.

Function and OBU1

Feature
Transient control The EDFA inside the board has the transient control function. When
function channels are added or dropped, the board can suppress the fluctuation
of the optical power in the path to realize the smooth upgrading and
expansion.
Performance Checks and reports the optical power.

events and alarms Controls the temperature of the pump laser.
monitoring
Detects the pump driving current, back facet current, cooling current,
temperature of the pump laser, and ambient temperature of the board.
NOTE
The OBU1 is available in two types, namely, OBU101 and OBU102. The OBU101 is used at the receive
end and the OBU102 is used at the transmit end.

The OBU1 consists of the EDFA optical module, driving and detecting module, communication
and control module, and power supply module.
Figure 15-27 shows the functional block diagram of the OBU1.
Figure 15-27 Functional block diagram of the OBU1
EDFA optical module Splitter

IN OUT
MON
Driving Detect the pump
PIN current and
current
temperature.
Control

Power supply
module
Voltages required
Fuse
by the board
Backplane
SCC (controlled by the
DC power provided SCC)
by the backplane

Signal Flow
The OBU1 accesses the multiplexed optical signals, which are amplified by the EDFA optical
module. Then, the OBU1 sends the amplified optical signals to the splitter and transmits the
signals through the OUT interface. The OBU1 also sends a few supervisory signals to the test
instrument for online optical performance monitoring.
EDFA Optical Module

The EDFA optical module amplifies the input optical signals. The EDFA optical module adopts
the gain auto-adjustment technology. Hence, the gain of each operating wavelength signal can
remain in the allowed range.
Splitter
The splitter splits one channel of optical signals from the EDFA optical module into two channels
of signals of different power. One channel of signals is transmitted through the OUT interface
to the main optical path. The other channel of signals is transmitted to the MON interface for
spectrum detection and supervising.
The power of the MON interface is 1/99 of the power of the OUT interface. That is, the power
of the MON interface is 20 dB less than the power of the OUT interface.

The communication and control module controls and monitors the functional modules of the
board, and manages the communication.
The communication and control module collects the alarms, performance events, working status,
voltage detection information, and other information of each functional module of the board,
and reports the collected information to the SCC.
The communication and control module receives the commands issued by the SCC to control
and coordinate the operation of each functional module.
15.6.5 Front Panel

The front panel of the OBU1 has indicators, interfaces, and a laser safety class label.

Figure 15-28 shows the appearance of the front panel of the OBU1.

Figure 15-28 Front panel of the OBU1
OBU1
STAT
ACT
PROG
SRV
LASER
RADIATION
WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
MON
OUT
IN
OBU1
Indicators
Interfaces
The front panel of the OBU1 has three optical interfaces. Table 15-30 describes the types and
usage of the optical interfaces of the OBU1.

Table 15-30 Optical interfaces of the OBU1

Interface
IN LC Receives the multiplexed signals to be amplified.
OUT LC Transmits the amplified multiplexed signals.
MON LC Is connected to the test instrument to monitor the in-

service performance.
15.6.6 Valid Slots

The OBU1 can be installed in slots 5–8 and 11–13 in the subrack.
15.6.7 Feature Code

The feature code of the OBU1 contains six characters, which indicate the gain and maximum
nominal input optical power of the optical signals processed by the OBU1.
Table 15-31 describes the feature code of the OBU1.
Table 15-31 Feature code of the OBU1
The first character – Is always "G".

characters
The fourth character – Is always "I".
The fifth and sixth characters Maximum nominal input Indicates the maximum
optical power nominal input optical power.
Consider the TN11OBU1 whose feature code is "G23I-3" as an example. "G23I-3" indicates
that the gain is 23 dB and the maximum nominal input optical power is -3 dBm.

You can set the parameters for the OBU1 by using the U2000.
You can set the following parameters for the OBU1 by using the U2000:
l Threshold of input power loss

l Laser status
l Gain
l Nominal gain upper threshold

l Nominal gain lower threshold

l Rated optical power
l Configure band
l Configure working band parity
l Actual band
l Actual working band parity

The technical specifications of the OBU1 include the parameters specified for optical interfaces,

Table 15-32 lists the parameters specified for the optical interfaces of the OBU1.
Table 15-32 Parameters specified for the optical interfaces of the OBU1
Parameter Value
OBU1C01 OBU1C02
Operating wavelength range (nm) 1529 to 1561 1529 to 1561
Nominal input optical power -32 to -4 -32 to -3

(dBm)
Nominal output optical power -12 to +16 -9 to +20

(dBm)
Input power (dBm) of a typical -20 -19

single wavelength
Maximum nominal output optical 0 4

power (dBm) of a single
wavelength
Path gain (dB) 20±1.5 23±1.5
Noise figure (dB) ≤ 5.5 ≤ 6.0
Gain flatness (dB) ≤ 2.0 ≤ 2.0
Pre-incline of the gain spectral 0±0.2 1.0±0.2

form
Laser Safety Class


The mechanical specifications of the OBU1 are as follows:
l Weight (kg): 1.3
Power Consumption
l The maximum power consumption of the OBU101 at room temperature (25°C) is 16 W.
l The maximum power consumption of the OBU101 at high temperature (55°C) is 18 W.
l The maximum power consumption of the OBU102 at room temperature (25°C) is 18 W.
l The maximum power consumption of the OBU102 at high temperature (55°C) is 20 W.

Hardware Description 16 Power Boards
16 Power Boards
About This Chapter
This topic describes the power boards such as the UPM (CAU), PIU and PIUA.
16.1 UPM
technical specifications of the UPM (uninterruptible power module).
16.2 PIU
technical specifications of the PIU (power interface board).
16.3 PIUA
technical specifications of the PIUA (power interface board).

16 Power Boards Hardware Description
16.1 UPM
technical specifications of the UPM (uninterruptible power module).

None.
16.1.2 Application
The UPM is an external uninterruptible power module. The UPM can directly convert 110 V/
220 V AC mains power into -48 V DC power required by the transmission equipment. The UPM
is suitable for the telecom carriers who cannot provide -48 V DC power supply or requires
batteries.
The UPM is a special power supply system and is numbered EPS75-4815AF. The UPM can
directly convert 110 V/220 V AC power into –48 V DC power that the transmission equipment
requires. The UPM is suitable for the telecom carriers who cannot provide –48 V DC power for
the equipment.
The UPM is fed by one 220 V AC mains power supply. The rectifier module converts the input
power into –48 V DC voltage to provide four DC branches and one battery branch.
16.1.5 Front Panel
The front panel of the UPM has indicators and interfaces of many types.
16.1.6 Valid Slots
The UPM is case shaped. Hence, the UPM does not occupy a slot in the subrack.
The technical specifications of the UPM include the power parameters and mechanical
specifications.

None.
16.1.2 Application
The UPM is an external uninterruptible power module. The UPM can directly convert 110 V/
220 V AC mains power into -48 V DC power required by the transmission equipment. The UPM
is suitable for the telecom carriers who cannot provide -48 V DC power supply or requires
batteries.
Figure 16-1 shows the application of the UPM on the OptiX OSN equipment series.

Figure 16-1 Application of the UPM on the OptiX OSN equipment series
OptiX OSN equipment
Backplane
110 V/220 V -48 V
UPM PIU
Board A
-48 V
PIU
Board B
-48 V
Table 16-1 shows different mapping policies of UPM.
Table 16-1 Mapping policies of UPM on the OptiX OSN 2500

Type of Subrack Label of Subrack Mapping PDU Mapping UPM
General OptiX OSN N1PDU Q1PIU, Q1PIUA EPS75-4815AF

2500 subrack
Enhanced OptiX N1PDU Q1PIUA EPS75-4815AF

OSN 2500 subrack

The UPM is a special power supply system and is numbered EPS75-4815AF. The UPM can
directly convert 110 V/220 V AC power into –48 V DC power that the transmission equipment
requires. The UPM is suitable for the telecom carriers who cannot provide –48 V DC power for
the equipment.
The output power of a single EPS75-4815AF power system is 1600 W. The EPS75-4815AF
power system is 3U high. Figure 16-2 shows the appearance of the EPS75-4815AF power
system.
Figure 16-2 Appearance of the EPS75-4815AF power system

The UPM power box can be directly installed in the 19-inch cabinet or the ETSI cabinet.
The storage batteries of the UPM work with one EPS75-4815AF power system. When the
external AC power system supplies power normally, the batteries store power. When the 110
V/220 V AC power supply is interrupted, the batteries can supply power for 3 to 4 hours. To
supply power to the OptiX OSN equipment, only one power system is required to be connected
to the batteries.
The standard maximum configuration of each EPS75-4815AF power system includes five
rectifier modules and one monitoring module.
NOTE
The batteries do not belong to the EPS75-4815AF. Hence, the batteries need to be configured separately.
If the batteries are required, a battery cabinet is provided generally or a dedicated space in the equipment
cabinet is reserved for the batteries.
Table 16-2 provides the functions and features of the UPM.
Table 16-2 Functions and features of the EPS75-4815AF power system

Function and EPS75-4815AF
Feature
Hot-swappable The AC/DC rectifier module of the UPM is hot-swappable. When

function you replace a faulty rectifier module, the other rectifier module can
still work normally. Therefore, the maintainability of the system is
improved.
Storage battery The UPM provides the storage battery protection function. When the
protection function mains supply is interrupted, the power system of the equipment
automatically switches to the storage battery, which ensures that the
equipment operates normally. The battery module provides a
capacity of 40 to 500 Ah. The default capacity is 65 Ah.
Loading capacity The loading capability of each rectifier module is 800 W.
Lightning-proof The rectifier module is embedded with the lightning-proof protector.

function The rectifier module can bear the 1.2/50 us x 6 kV or 8/20 us x 3 kA
lightning surge. When the lightning current enters the rectifier
module along with the power cable, install category-C and category-
B light arresters before you connect the AC mains supply to the
power system to prevent the overvoltage caused by the direct
lightning strike from damaging the rectifier module.

The UPM is fed by one 220 V AC mains power supply. The rectifier module converts the input
power into –48 V DC voltage to provide four DC branches and one battery branch.
When the UPM works normally, the monitoring module controls the rectifier module, storage
battery loop, and load loop, which work according to the preset parameters or user settings. The
monitoring module also monitors the status and data of the rectifier module, storage battery loop,
and load loop.

In the case of a mains supply failure, the equipment is fed by the storage battery group that is
connected to the UPM. The battery group must be connected to the UPM before the mains supply
fails. When the batteries start to discharge due to a mains supply failure, the monitoring module
reports the no-mains-supply alarm. With the discharge of the batteries, the battery voltage starts
to drop. When the battery voltage is lower than 45 V, the monitoring module reports the DC
undervoltage alarm. When the battery voltage reaches 43 V, the battery group enables the power-
off protection function to interrupt the connection between the battery group and the equipment.
As a result, the batteries are automatically protected.
When the mains supply is restored, the UPM resumes normal operations.
16.1.5 Front Panel

The front panel of the UPM has indicators and interfaces of many types.

Figure 16-3 shows the front view of the EPS75-4815AF power system (subject to the UPM on
site).
Figure 16-3 Front panel of the EPS75-4815AF power system

1 2 3 4 5 6 14
7 8 9 10 11 12 13 15 16
1. Control miniature circuit breaker 2. Control MCB of the battery 3. Control MCB of load 1 (10 A)
(MCB) of the AC input (30 A) branch (80 A)
4. Control MCB of load 2 (30 A) 5. Control MCB of load 3 (40 6. Control MCB of load 4 (40 A)
A)
7. AC phase line terminal 8. AC zero line terminal 9. Negative 48 V terminal of the battery
branch
10. Negative 48 V terminal of the load 11. Positive 48 V terminal of 12. Positive 48 V terminal of the load
branch the battery branch branch
13. Connecting terminal of the 14. DB44 signal interface 15. Communication interface (COM)
protection grounding cable
16. Communication test interface
(TEST)
Indicators of the EPS75-4815AF

The front panel of each rectifier module has the following indicators:

l Running status indicator (RUN) – one color (green)

l Alarm and protection indicator (ALM) – one color (yellow)
l Faulty state indicator (FAULT) – one color (red)
The front panel of the monitoring module has the following indicators:
l Power supply system fault indicator (ALM) – one color (red)

l Power supply system status indicator (RUN) – one color (green)
Interfaces of the EPS75-4815AF Power System

The front panel of the EPS75-4815AF has seven interfaces. Table 16-3 describes the types and
usage of the interfaces of the EPS75-4815AF.
Table 16-3 Interfaces of the EPS75-4815AF power system
Power input Power interface "7" and "8" indicate the AC mains input
interface terminals, which access 110 V/220 V AC power.
Power output Power interface The power output interfaces are in the lower left
interface corner on the front panel of the UPM. The
terminals indicated by "9" and "11" form a
battery interface, through which the power
system is connected to the battery input socket
at the back of the storage battery box through a
battery cable. "10" and "12" indicate the output
interfaces of four loads. The output interfaces
can supply power to the OptiX OSN equipment
by using power cables.
Connecting Power interface The UPM is grounded through the cabinet.

terminal of the
protection
grounding cable
DB44 signal DB44 The backplane of the subrack can be connected

interface to the sensor transfer box (an optional device)
through the DB44 signal interface and to the
monitoring module through the 96-pin DIN
connector. In addition, the sensor transfer box
can be connected to multiple sensors. As a
result, the monitoring function is extended.
Communication RJ-45 It is used for communication with the PC. The

interface (COM) COM interface can adopt the RS-485
communication mode or RS-232
communication mode. Three baud rates are
available, namely, 4800 kbit/s, 9600 kbit/s, and
19200 kbit/s. The baud rate can be adjusted and
the default baud rate is 9600 kbit/s.

Communication RJ-45 It is used for internal test.

test interface
(TEST)
Switch button Button The switch buttons are on the left of the UPM,
as shown in . "1" indicates the control MCB of
the AC input (30 A), which enables and disables
the input of the AC mains supply. "2", "3", "4",
and "5" indicate the load control switches, which
enable and disable the load output.
16.1.6 Valid Slots

The UPM is case shaped. Hence, the UPM does not occupy a slot in the subrack.

The technical specifications of the UPM include the power parameters and mechanical
specifications.
Power Parameters
Table 16-4 lists the power parameters of the UPM.
Table 16-4 Power parameters of the UPM
Parameter Value
Voltage range of 90-290 V AC

the AC input
AC input One single-phase three-wire system: 45-65 Hz
Rated input current ≤ 28 A
Output nominal 53.5±0.5 V

voltage
Rated output DC output branches Load MCB 1: 10 A

current Load MCB 2: 3 0A
Load MCB 3: 40 A
Load MCB 4: 40 A
Battery MCB: 80 A
Total output DC current 37.5±3 A to 75±3 A
Regulated voltage ≤ ±1%

precision

Parameter Value
Non-balance of ≤ ±5% (50%-100% load)

load sharing
Rated efficiency of ≥ 89%

the integrated
equipment
Power factor ≥ 0.99 (nominal input or output)
Peak-to-peak noise ≤ 200mV (within the range of 20 MHz)

voltage
Electrical network ≤ ±0.1%

adjustment rate
Lightning When the UPM works alone, the input end can bear the simulated
protection lightning surge current whose waveform is 8/20μs and amplitude is 5
performance kA for five times in both directions. The interval between two surges
must not be less than one minute. If the lightning surge current is higher
than the preceding indexes, the UPM may be damaged and cannot work
normally.
Cooling method The fan that is embedded in the rectifier module cools the module.
The mechanical specifications of the UPM are as follows:
l Dimensions of the UPM (mm): 436 (W) x 255 (D) x 133 (H)
l Weight: 15 kg
16.2 PIU
technical specifications of the PIU (power interface board).

The PIU is available in one functional version, namely, Q1. The Q1PIU can only be used in the
general OptiX OSN 2500 subrack.
16.2.2 Application
The PIU is a power interface board that is mainly used to access the power supply for the OptiX
OSN equipment.
The PIU is used to access the power supply and to provide the lightning protection function and
filtering function.
The PIU consists of the power access unit, filtering unit, and unit that detects the failure of the
lightning-proof unit.

16.2.5 Front Panel

The front panel of the PIU has power interfaces.
16.2.6 Valid Slots
The PIU can be installed in slots 22 and 23 in the subrack.
The technical specifications of the PIU include the mechanical specifications, power
consumption, input voltage, and fuse.

The PIU is available in one functional version, namely, Q1. The Q1PIU can only be used in the
general OptiX OSN 2500 subrack.
16.2.2 Application
The PIU is a power interface board that is mainly used to access the power supply for the OptiX
OSN equipment.
Figure 16-4 shows the application of the PIU on the OptiX OSN equipment series.
Figure 16-4 Application of the PIU on the OptiX OSN equipment series
OptiX OSN equipment
-48 V PIU
Backplane
-48 V PIU
Board A
Board B
-48 V -48 V

The PIU is used to access the power supply and to provide the lightning protection function and
filtering function.
Table 16-5 provides the functions and features of the PIU.

Table 16-5 Functions and features of the PIU
Function and PIU

Feature
Lightning Provides the lightning protection function and reports the alarm that
protection function indicates the failure of the lightning protection function.
Filtering function Enhances the electromagnetic compatibility of the system by filtering

the power supply interface and shielding the structure of the board.
Power supply Provides one 50 W power interface for external devices such as the
interface COA.
Power supply of the Provides the FAN with normal working voltages.
FAN
Alarm monitoring Reports the board in-position alarm.
Power supply Supports the 1+1 hot backup. Any one PIU can supply power to the
backup entire subrack.
NOTE
One PIU can supply power to the entire subrack.

The PIU consists of the power access unit, filtering unit, and unit that detects the failure of the
lightning-proof unit.
Figure 16-5 shows the functional block diagram of the PIU.
Figure 16-5 Functional block diagram of the PIU

Power Unit that detects
Filtering
access the failure of the Backplane
unit
unit lightning-proof unit
Alarm indicating
the failure of the
lightning-proof unit
Sytem control unit
Power Access Unit

This unit accesses the –48 V or –60 V power supply for the system.
Unit That Detects the Failure of the Lightning-Proof Unit

This unit protects the equipment from overcurrent and lightning and reports the alarm that
indicates its failure to the SCC unit.

Filtering Unit
This unit filters the electromagnetic interference signals to ensure that the equipment operates
stably.
16.2.5 Front Panel

The front panel of the PIU has power interfaces.

Figure 16-6 shows the appearance of the front panel of the PIU.
Figure 16-6 Front panel of the PIU
PIU
PWS
RTN(+)
PWR
NEG(-)
Interfaces
The front panel of the PIU has two power interfaces. Table 16-6 describes the types and usage
of the interfaces of the PIU.
Table 16-6 Interfaces of the PIU

Interface
PWR Input interface for Accesses the –48 V power supply.

the –48 V power
supply
PWS Output interface Provides the 50 W power output and can supply
for the 50 W power to the COA.
power supply
Table 16-7 provides the pin assignments of the PWS interface of the PIU.

Table 16-7 Pin assignments of the PWS interface of the PIU
1 –48 V
2 –48 V
4 3
3 Grounding
4 Not defined
2 1
16.2.6 Valid Slots

The PIU can be installed in slots 22 and 23 in the subrack.

The technical specifications of the PIU include the mechanical specifications, power
consumption, input voltage, and fuse.
The mechanical specifications of the PIU are as follows:

l Weight: 1.3 kg
Power Consumption
At room temperature (25°C), the maximum power consumption of the PIU is 8W.
Input Voltage
The input voltage range of the PIU is as follows:
l If the standard voltage of the input power is -48 V, the power voltage ranges from -38.4 V
to -57.6 V.
l If the standard voltage of the input power is -60 V, the power voltage ranges from -48 V
to -72 V.
Fuse
The main loop fuse F1 of the PIU is 250 V-15 A-0.00182 ohms.

16.3 PIUA
technical specifications of the PIUA (power interface board).

The PIUA is available in one functional version, namely, Q1. The Q1PIUA can be used in the
general or enhanced OptiX OSN 2500 subrack.
16.3.2 Application
The PIUA is a power interface board that is mainly used to access the power supply for the OptiX
OSN equipment.
The PIUA is used to access the power supply and to provide the lightning protection function
and filtering function.
16.3.5 Front Panel
The front panel of the PIUA has power interfaces.
16.3.6 Valid Slots
The PIUA can be installed in slots 22 and 23 in the subrack.
The technical specifications of the PIUA include the mechanical specifications, power
consumption, input voltage, and the fuse.

The PIUA is available in one functional version, namely, Q1. The Q1PIUA can be used in the
general or enhanced OptiX OSN 2500 subrack.
16.3.2 Application
The PIUA is a power interface board that is mainly used to access the power supply for the OptiX
OSN equipment.
Figure 16-7 shows the application of the PIUA on the OptiX OSN equipment series.

Figure 16-7 Application of the PIUA on the OptiX OSN equipment series
OptiX OSN equipment
-48 V PIUA
Backplane
-48 V PIUA
Board A
Board B
-48 V -48 V

The PIUA is used to access the power supply and to provide the lightning protection function
and filtering function.
Table 16-8 provides the functions and features of the PIUA.
Table 16-8 Functions and features of the PIUA
Function and PIUA

Feature
Lightning Provides the lightning protection function and reports the alarm that
protection function indicates the failure of the lightning protection function.
Filtering function Enhances the electromagnetic compatibility of the system by filtering

the power supply interface and shielding the structure of the board.
Power supply Provides one 50 W power interfaces for external devices such as the
interface COA and hub.
Power supply of the Provides the FAN with normal working voltages.
FAN
Alarm monitoring Reports the board in-position alarm.
Power supply Supports the 1+1 hot backup. Any one PIUA can supply power to the
backup entire subrack.


Figure 16-8 shows the functional block diagram of the PIUA.
Figure 16-8 Functional block diagram of the PIUA

Power Unit that detects
Filtering
access the failure of the Backplane
unit
unit lightning-proof unit
Alarm indicating
the failure of the
lightning-proof unit
Sytem control unit
Power Access Unit

This unit accesses the –48 V or –60 V power supply for the system.
Unit That Detects the Failure of the Lightning-Proof Unit

This unit protects the equipment from overcurrent and lightning and reports the alarm that
indicates the failure of the lightning-proof unit to the SCC unit.
Filtering Unit
This unit filters the electromagnetic interference signals to ensure that the equipment can operate
stably.
16.3.5 Front Panel

The front panel of the PIUA has power interfaces.

Figure 16-9 shows the appearance of the front panel of the PIUA.
Figure 16-9 Front panel of the PIUA
PIU
PWS
RTN(+)
PWR
NEG(-)

Interfaces
The front panel of the PIUA has two power interfaces. Table 16-9 describes the types and usage
of the interfaces of the PIUA.
Table 16-9 Interfaces of the PIUA
Interfaces Type of Usage

Interface
PWR Input Accesses the –48 V power supply.

interface for
the –48 V
power
supply
PWS Output Provides the 50 W power output and can supply

interface for power to the COA.
the 50 W
power
supply
16.3.6 Valid Slots

The PIUA can be installed in slots 22 and 23 in the subrack.

The technical specifications of the PIUA include the mechanical specifications, power
consumption, input voltage, and the fuse.
The mechanical specifications of the PIUA are as follows:

l Weight: 0.8 kg
Power Consumption
At room temperature (25°C), the maximum power consumption of the PIUA is 2 W.
Input Voltage
The input voltage range of the PIUA is as follows:
l If the standard voltage of the input power is -48 V, the power voltage ranges from -38.4 V
to -57.6 V.
l If the standard voltage of the input power is -60 V, the power voltage ranges from -48V to
-72 V.

Fuse
The main loop fuse of the PIUA is 250 V-20 A-0.00355 ohms.

Hardware Description 17 Pluggable Optical/Electrical Module
17 Pluggable Optical/Electrical Module
About This Chapter
Certain boards on the OptiX OSN equipment supports the small form-factor pluggable (SFP),
enhanced small form-factor pluggable (eSFP), and 10 Gigabit small form-factor pluggable
(XFP) optical/electrical modules. When you need to adjust the type of accessed services or
replace such a faulty optical/electrical module, you just need to directly replace the pluggable
optical/electrical module without replacing its board.
17.1 Overview
The SFP/eSFP is a small form-factor pluggable optical transceiver. It is mainly used for SDH
optical communication and Ethernet data communication. The XFP is a 10-Gigabit small form-
factor pluggable optical transceiver. It is mainly for SDH optical communication, GE/10GE data
communication, and DWDM communication.
17.2 SFP/eSFP
This topic describes the BOM number, name, specifications, and supported boards of the SFP/
eSFP optical modules.
17.3 XFP
This topic describes the BOM number, name, specifications, and supported boards of the XFP
optical modules.
17.4 CWDM/DWDM
This topic describes the BOM number, name, specifications, and supported boards of the
CWDM/DWDM optical modules.

17 Pluggable Optical/Electrical Module Hardware Description
17.1 Overview
The SFP/eSFP is a small form-factor pluggable optical transceiver. It is mainly used for SDH
optical communication and Ethernet data communication. The XFP is a 10-Gigabit small form-
factor pluggable optical transceiver. It is mainly for SDH optical communication, GE/10GE data
communication, and DWDM communication.
Appearance
Figure 17-1 shows the appearances of the SFP and eSFP optical modules, and Figure 17-2
shows the appearance of the XFP optical module.
Figure 17-1 SFP/eSFP optical module
The dimensions of the SFP and eSFP optical modules are 13.4 mm (W) x 56.5 mm (D) x 8.5
mm (H).
Figure 17-2 XFP optical module

The dimensions of the XFP optical module are 18.3 mm (W) x 78 mm (D) x 8.5 mm (H).
Figure 17-3 SFP electrical module
The dimensions of the SFP electrical module are 13.4 mm (W) x 66.8 mm (D) x 8.5 mm (H).
BOM
The BOM of a pluggable optical module is used to identify different types of optical modules.
The BOM can be marked on a label that is stuck on each pluggable optical module.
Figure 17-4 shows the label of a pluggable optical module.
Figure 17-4 Label of a pluggable optical module
NOTE
You can check the specifications of an optical module in this manual according to the BOM of the optical
module.
17.2 SFP/eSFP
This topic describes the BOM number, name, specifications, and supported boards of the SFP/
eSFP optical modules.
Dual-Fiber Bidirectional Optical Module

Table 17-1 lists the BOM numbers and specifications of the SFP/eSFP optical modules.

Table 17-1 Mapping table of the BOM numbers and the types of the SFP/eSFP optical modules
BOM Name Specifications Compatible Board
Numb (Name-Encapsulation
er Form-Operating
Wavelength-Rate-
Minimum Output
Optical Power-Maximum
Output Optical Power-
Receiver Sensitivity-
Optical Interface Type-
Optical Fiber Type-
Transmission Distance)
340602 155 Mbit/s SFP Optical transceiver, SFP, N1ADQ1, N1EFF8,

87 optical module 1310 nm, STM1, -19 to -14 N1IDQ1, N1MST4,
dBm, -30 dBm, LC, MM, 2 N1SLQ1, N1SLQ1A,
km N1IDQ1A, N1EFF8A,
N1SLQ1A
340602 155 Mbit/s eSFP Optical transceiver, eSFP, N1OU08, N1SL1, N2SL1,
76 optical module 1310 nm, STM1, -15 to -8 N1SLQ1, N2SLQ1,
dBm, -31 dBm, LC, SM, 15 R1SLQ1, R1SL1, N1ADQ1,
km N1EFF8, N1IDQ1, N1SLT1,
Q2CXL1, N2SLO1,
Q3CXL1, N1SL1A,
N1SLQ1A, R1CXLLN,
R2CXLLN, Q5CXLLN,
Q6CXLLN, R1CXLD41,
R1CXLQ41, R2CXLQ41,
Q5CXLQ41, Q6CXLQ41,
N1IDQ1A, N3SLO1,
R3SL1, R3SLQ1,
N1EFF8A, N3SLH41
340602 Optical transceiver, eSFP, N1SL1, N2SL1, N1SLQ1,

81 1310 nm, STM1, -5 to 0 dBm, N2SLQ1, N1ADQ1,
-37 dBm, LC, SM, 40 km N1IDQ1, Q2CXL1,
Q3CXL1, N2SLO1,
N1SL1A, N1SLQ1A,
N3SLO1, R1CXLLN,
R2CXLLN, Q5CXLLN,
Q6CXLLN, R1CXLD41,
R1CXLQ41, R2CXLQ41,
Q5CXLQ41, Q6CXLQ41,
R1SL1, R3SL1, R1SLQ1,
R3SLQ1, N3SLH41,
N1SLT1


er Form-Operating
Wavelength-Rate-
Minimum Output
Optical Fiber Type-
340602 Optical transceiver, eSFP, N1SL1, N2SL1, N1SLQ1,

82 1550 nm, STM1, -5 to 0 dBm, N2SLQ1, R1SLQ1, R1SL1,
-37 dBm, LC, SM, 80 km N1ADQ1, N1IDQ1,
Q2CXL1, Q3CXL1,
N1SL1A, N1SLQ1A,
R1CXLLN, R2CXLLN,
Q5CXLLN, Q6CXLLN,
R1CXLD41, R1CXLQ41,
R2CXLQ41, Q5CXLQ41,
Q6CXLQ41, N3SLO1,
R3SL1, R3SLQ1, N1SLT1
340602 622 Mbit/s eSFP Optical transceiver, eSFP, N1SL4, N2SL4, N1SL4A,
77 optical module 1310 nm, STM4, -15 to -8 N1SLD4, N2SLD4,
dBm, -30 dBm, LC, SM, 15 N1SLD4A, N1SLQ4,
km N2SLQ4, N1SLQ4A,
N3SLH41, Q2CXL4,
Q3CXL4, Q5CXLLN,
Q6CXLLN, Q5CXLQ41,
Q6CXLQ41, R1CXLD41,
R1CXLLN, R2CXLLN,
R1CXLQ41, R2CXLQ41,
R1SL4, R3SL4, R1SLD4,
R3SLD4
340602 Optical transceiver, eSFP, N2SLQ4, N2SL4, N1SL4,

80 1310 nm, STM4, -3 to 2 dBm, N1SLD4, N2SLD4,
-30 dBm, LC, SM, 40 km N1SLQ4, N2SLQ4, R1SL4,
R1SLD4, N1ADL4,
N1IDL4, Q2CXL4,
Q3CXL4, N1MST4,
N1SL4A, N1SLD4A,
N1SLQ4A, R1CXLLN,
R2CXLLN, R1CXLD41,
R1CXLQ41, R2CXLQ41,
Q5CXLLN, Q6CXLLN,
Q5CXLQ41, Q6CXLQ41,
R3SL4, R3SLD4


er Form-Operating
Wavelength-Rate-
Minimum Output
Optical Fiber Type-
340602 Optical transceiver, eSFP, N1SL4, N2SL4, N1SLD4,

84 1550 nm, STM4, -3 to 2dBm, N2SLD4, N1SLQ4,
-30 dBm, LC, SM, 80 km N2SLQ4, R1SL4, R1SLD4,
N1ADL4, N1IDL4,
Q2CXL4, Q3CXL4,
N1SL4A, N1SLD4A,
N1SLQ4A, R1CXLLN,
R2CXLLN, Q5CXLLN,
Q6CXLLN, R1CXLD41,
R1CXLQ41, R2CXLQ41,
Q5CXLQ41, Q6CXLQ41,
N1SL4A, N1SLD4A,
N1SLQ4A, R3SL4, R3SLD4
340602 Optical transceiver, eSFP, N1SL4, N2SL4, N1SL4A,

85 1550 nm, STM4, -3 to +2 N1SLD4, N2SLD4,
dBm, -36 dBm, LC, SM, 100 N1SLD4A, N2SLQ4,
km N1SLQ4A, Q2CXL4,
Q3CXL4, Q5CXLLN,
Q6CXLLN, Q5CXLQ41,
Q6CXLQ41, R1CXLD41,
R1CXLLN, R2CXLLN,
R1CXLQ41, R2CXLQ41,
R1SL4, R3SL4, R1SLD4,
R3SLD4
340604 1.25 Gbit/s eSFP Optical transceiver, eSFP, N2EGS2, N1EGT2,

73 optical module 1310 nm, 1.25 Gbit/s, -9 to -3 N2EGR2, N2EMR0,
dBm, -20 dBm, LC, SM, 10 N1EGS4, N1EMS4,
km N3EGS4, N2EGT2,
N3EGS2, N4EGS4,
N1EMS2
340602 Optical transceiver, eSFP, N2EGS2, N3EGS2,

98 1310 nm, 1.25 Gbit/s, -5 to -0 N1EGT2, N2EGT2,
dBm, -23 dBm, LC, SM, 40 N2EGR2, N2EMR0,
km N1EGS4, N3EGS4,
N4EGS4, N1EMS4,
N1EMS2


er Form-Operating
Wavelength-Rate-
Minimum Output
Optical Fiber Type-
340603 Optical transceiver, eSFP, N1EGT2, N3EGS2,

60 1550 nm, 1.25 Gbit/s, -2 to 5 N2EGT2, N4EGS4
dBm, -23 dBm, LC, SM, 80
km
340602 2.125 Gbit/s eSFP Optical transceiver, eSFP, N2EGS2, N1EGT2,

86 optical module 850 nm, 2.125 Gbit/s (multi N2EMR0, N1EGS4,
rate), -9.5 to -2.5 dBm, N1EMS4, N3EGS4,
-17dBm, LC, MM, 0.5 km N2EGT2, N3EGS2,
N4EGS4, N1EMS2,
N1EGSH
340602 2.5 Gbit/s eSFP Optical Transceiver, eSFP, N1SLD16, N2SLQ16

78 optical module 1310 nm, STM16, -5 to 0
km
340602 Optical transceiver, eSFP, N1SLQ16, N2SLQ16,

88 1310 nm, STM16, -10 to -3 N1SLD16
km
340604 Optical Transceiver, eSFP, N1SLO16, N4SLO16,

84 1310 nm, 155 Mbit/s to 2.67 N4SLQ16, N3SL16A,
Gbit/s, -10 to -3 dBm, -21 Q2CXL16, Q5CXLLN,
dBm, LC, SM, 2 km Q6CXLLN, R1CXLLN,
R2CXLLN
340604 Optical transceiver, eSFP, Q2CXL16, Q3CXL16,

85 1310 nm, 155 Mbit/s to 2.67 N2SL16A, N3SL16A,
Gbit/s, -5 to 0 dBm, -21 dBm, R1CXLLN, R2CXLLN,
LC, SM, 15 km Q5CXLLN, Q6CXLLN,
N1SLO16, N4SLO16
340602 Optical transceiver, eSFP, R1CXLLN, R2CXLLN,

89 1310 nm, STM16, -2 to 3 Q5CXLLN, Q6CXLLN
km


er Form-Operating
Wavelength-Rate-
Minimum Output
Optical Fiber Type-
340604 Optical transceiver, eSFP, N1SLQ16, N2SLQ16,

88 1550 nm, STM16, -2 to 3 N2SL16A, N3SL16A,
dBm, -30 dBm, LC, SM, 80 N1SLD16, Q5CXLLN,
km Q6CXLLN, R2CXLLN,
N1SLO16, N4SLQ16
03030 OptiX HPLAT, N1SLD16, N1SLO16,

GGV SSX2T1SA02, 2.5 Gbit/s N4SLO16, N1SLQ16,
ESFP transceiver (-30 dBm N2SLQ16, N4SLQ16,
to -9 dBm, 1310 nm, 40 km, N3SL16A, Q2CXL16,
-2 dBm to +3 dBm, LC) Q3CXL16
03030 OptiX HPLAT, N4SLO16, N4SLQ16

GBQ SSX2T1SA01, 2.5 Gbit/s
ESFP transceiver (-31 dBm
to -9 dBm, 1550 nm, 1600 ps/
nm, 80 km, -2 to +3 dBm,
LC)
Single-Fiber Bidirectional Optical Module

Table 17-2 lists the BOM numbers and specifications of the single-fiber bidirectional eSFP
optical modules.

Table 17-2 Mapping table of the BOM numbers and the types of the single-fiber bidirectional
eSFP optical modules
BOM Name (Name-Encapsulation Compatible Board
Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-
340603 155 Mbit/s single- Optical transceiver, eSFP, Tx N1EFF8

64 fiber bidirectional 1550 nm/Rx 1310 nm,
eSFP optical STM1, -15 dBm, -8 dBm, -32
module dBm, LC/PC, SM, 15 km
340603 Optical transceiver, eSFP, Tx

63 1310 nm/Rx 1550 nm,
STM1, -15 dBm, -8 dBm, -32
dBm, LC/PC, SM, 15 km
340603 155 Mbit/s single- Optical transceiver, eSFP, Tx N1SLQ1

64 fiber bidirectional 1550 nm/Rx 1310 nm,
eSFP optical STM1, -15 dBm, -8 dBm, -32
module dBm, LC/PC, SM, 15 km

63 1310 nm/Rx 1550 nm,
STM1, -15 dBm, -8 dBm, -32

29 1550 nm/Rx 1310 nm,
STM1, -5 dBm, -0 dBm, -32

28 1310 nm/Rx 1550 nm,
STM1, -5 dBm, -0 dBm, -32
340604 1.25 Gbit/s single- Optical transceiver, SFP, Tx N1SLD4A, N1SLQ4

75 fiber bidirectional 1490 nm/Rx 1310 nm, 1.25
eSFP optical Gbit/s, -3 dBm, -9 dBm,
module -19.5 dBm, LC, SM,10 km
340604 Optical transceiver, SFP, Tx

70 1310 nm/Rx 1490 nm, 1.25
Gbit/s, -3 dBm, -9 dBm,
-19.5 dBm, LC, SM, 10 km


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-
99050 Optical transceiver, eSFP, Tx N1SLQ16, Q2CXL16,

DYH 1490 nm/Rx 1310 nm, N3SL16A
STM-16, -5 dBm to 0 dBm,
-18 dBm, LC/PC, SM, 15 km

DYS 1310 nm/Rx 1490 nm,
STM-16, -5 dBm, 0 dBm, -18
340604 1.25 Gbit/s single- Optical transceiver, SFP, Tx N1EGT2

75 fiber bidirectional 1490 nm/Rx 1310 nm, 1.25
eSFP optical Gbit/s, -3 dBm, -9 dBm,
module -19.5 dBm, LC, SM,10 km
340604 Optical transceiver, SFP, Tx

70 1310 nm/Rx 1490 nm, 1.25
Gbit/s, -3 dBm, -9 dBm,
-19.5 dBm, LC, SM, 10 km
17.3 XFP
This topic describes the BOM number, name, specifications, and supported boards of the XFP
optical modules.
Table 17-3 lists the BOM numbers and specifications of the XFP optical modules.

Table 17-3 Mapping table of the BOM numbers and the types of the XFP optical modules
er Form-Operating
Wavelength-Rate-
Minimum Output
Optical Fiber Type-
340603 9.95 Gbit/s to Optical transceiver, XFP, N1SLD64, N4SL64,

13 10.71 Gbit/s XFP 1310 nm, 9.95 Gbit/s to 10.71 N4SLD64, N4SLQ64,
optical module Gbit/s, -6 dBm to -1 dBm, -11 N1EAS2
dBm, LC, SM, 10 km
03030J 9.95 Gbit/s to 11.1 Optical transceiver, XFP, N1SLD64, N4SL64,

CB Gbit/s XFP optical 1550 nm, 9.95 Gbit/s to 11.1 N4SLD64, N4SLQ64
module Gbit/s, -1 dBm to 2 dBm, -17
dBm, LC, SM, 40 km
340603 9.95 Gbit/s to 11.1 Optical transceiver, XFP, N1PEX1, N4SL64

61 Gbit/s XFP optical 1550 nm, 9.95 Gbit/s to 11.1
module Gbit/s, 0 dBm to 4 dBm, -24
dBm, LC, SM, 80 km
03030J 10.71 Gbit/s XFP Optical transceiver (-19 dBm N4SL64

HE optical module to 0 dBm, 1550 nm, 800 ps/
nm, -1 dBm to +2 dBm, 193.4
THz, LC/PC), 100 GHz
spacing wavelength, FEC,
EA
17.4 CWDM/DWDM
This topic describes the BOM number, name, specifications, and supported boards of the
CWDM/DWDM optical modules.
CWDM Optical Module

Table 17-4 lists the BOM numbers and specifications of the 2.5 Gbit/s CWDM eSFP optical
modules.

Table 17-4 Mapping table of the BOM numbers and the types of the 2.5 Gbit/s CWDM eSFP
optical modules
Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-
03030 2.5 Gbit/s CWDM 2.5 Gbit/s CWDM eSFP N1SLO16, N4SLO16,
GJH eSFP optical transceiver (-31 dBm to -9 N1SLQ16, N2SLQ16,
module dBm, 1471 nm, 1600 ps/nm, N4SLQ16, Q2CXL16,
80 km, 0 dBm to 5 dBm, LC) Q3CXL16, R1CXLLNa,
R2CXLLNa, Q5CXLLNa
03030 2.5 Gbit/s CWDM eSFP
GJJ transceiver (-31 dBm to -9
dBm, 1491 nm, 1600 ps/nm,
80 km, 0 dBm to 5 dBm, LC)

GJK transceiver (-31 dBm to -9
dBm, 1511 nm, 1600 ps/nm,

GJL transceiver (-31 dBm to -9
dBm, 1531 nm, 1600 ps/nm,

GJM transceiver (-31 dBm to -9
dBm, 1551 nm, 1600 ps/nm,

GJN transceiver (-31 dBm to -9
dBm, 1571 nm, 1600 ps/nm,

GJP transceiver (-31 dBm to -9
dBm, 1591 nm, 1600 ps/nm,

GJQ transceiver (-31 dBm to -9
dBm, 1611 nm, 1600 ps/nm,


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-
NOTE
a: The interface supports the colored wavelength function only when it is equipped with the STM-16 optical
module.
DWDM Optical Module

Table 17-5 lists the BOM numbers and specifications of the 10 Gbit/s DWDM XFP optical
modules.
Table 17-5 Mapping table of the BOM numbers and the types of the 10 Gbit/s DWDM XFP
optical modules
Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-
03030J 10 Gbit/s DWDM 10.71 Gbit/s transceiver (-19 N4SL64, N4SLD64,

GQ XFP optical dBm to 0 dBm, 1550 nm, 800 N4SF64, N4SFD64
module ps/nm, -1 dBm to 2 dBm,
192.1 THz, LC/PC)
03030J 10.71 Gbit/s transceiver (-19

GR dBm to 0 dBm, 1550 nm, 800
ps/nm, -1 dBm to 2 dBm,
192.2 THz, LC/PC)

GS dBm to 0 dBm, 1550 nm, 800
192.3 THz, LC/PC)


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

GT dBm to 0 dBm, 1550 nm, 800
192.4 THz, LC/PC)

GU dBm to 0 dBm, 1550 nm, 800
192.5 THz, LC/PC)

GV dBm to 0 dBm, 1550 nm, 800
192.6 THz, LC/PC)

GW dBm to 0 dBm, 1550 nm, 800
192.7 THz, LC/PC)

GX dBm to 0 dBm, 1550 nm, 800
192.8 THz, LC/PC)

GY dBm to 0 dBm, 1550 nm, 800
192.9 THz, LC/PC)

HA dBm to 0 dBm, 1550 nm, 800
193.0 THz, LC/PC)

HB dBm to 0 dBm, 1550 nm, 800
193.1 THz, LC/PC)

HC dBm to 0 dBm, 1550 nm, 800
193.2 THz, LC/PC)


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

HD dBm to 0 dBm, 1550 nm, 800
193.3 THz, LC/PC)

HE dBm to 0 dBm, 1550 nm, 800
193.4 THz, LC/PC)

HF dBm to 0 dBm, 1550 nm, 800
193.5 THz, LC/PC)

HG dBm to 0 dBm, 1550 nm, 800
193.6 THz, LC/PC)

HH dBm to 0 dBm, 1550 nm, 800
193.7 THz, LC/PC)

HJ dBm to 0 dBm, 1550 nm, 800
193.8 THz, LC/PC)

HK dBm to 0 dBm, 1550 nm, 800
193.9 THz, LC/PC)

HL dBm to 0 dBm, 1550 nm, 800
194.0 THz, LC/PC)

HM dBm to 0 dBm, 1550 nm, 800
194.1 THz, LC/PC)


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

HN dBm to 0 dBm, 1550 nm, 800
194.2 THz, LC/PC)

HP dBm to 0 dBm, 1550 nm, 800
194.3 THz, LC/PC)

HQ dBm to 0 dBm, 1550 nm, 800
194.4 THz, LC/PC)

HR dBm to 0 dBm, 1550 nm, 800
194.5 THz, LC/PC)

HS dBm to 0 dBm, 1550 nm, 800
194.6 THz, LC/PC)

HT dBm to 0 dBm, 1550 nm, 800
194.7 THz, LC/PC)

HU dBm to 0 dBm, 1550 nm, 800
194.8 THz, LC/PC)

HV dBm to 0 dBm, 1550 nm, 800
194.9 THz, LC/PC)

HW dBm to 0 dBm, 1550 nm, 800
195.0 THz, LC/PC)


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

HX dBm to 0 dBm, 1550 nm, 800
195.1 THz, LC/PC)

HY dBm to 0 dBm, 1550 nm, 800
195.2 THz, LC/PC)

JA dBm to 0 dBm, 1550 nm, 800
195.3 THz, LC/PC)

JB dBm to 0 dBm, 1550 nm, 800
195.4 THz, LC/PC)

JC dBm to 0 dBm, 1550 nm, 800
195.5 THz, LC/PC)

JD dBm to 0 dBm, 1550 nm, 800
195.6 THz, LC/PC)

JE dBm to 0 dBm, 1550 nm, 800
195.7 THz, LC/PC)

JF dBm to 0 dBm, 1550 nm, 800
195.8 THz, LC/PC)

JG dBm to 0 dBm, 1550 nm, 800
195.9 THz, LC/PC)


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

JH dBm to 0 dBm, 1550 nm, 800
196.0 THz, LC/PC)
Table 17-6 lists the BOM numbers and specifications of the 2.5 Gbit/s DWDM eSFP optical
modules.
Table 17-6 Mapping table of the BOM numbers and the types of the 2.5 Gbit/s DWDM eSFP
optical modules
Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-
03030J 2.5 Gbit/s DWDM 2.50 Gbit/s transceiver (-31 N1SLO16, N4SLO16,
MY eSFP optical dBm to -9 dBm, 1550 nm, N1SLQ16, N2SLQ16,
module 3400 ps/nm, -2 dBm to +3 N4SLQ16
dBm, 192.8 THz, LC/PC)

NF dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

NG dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

NH dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3
03030 2.50 Gbit/s transceiver (-31

KEA dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEB dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEC dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KED dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEE dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEF dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEG dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEH dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

KEJ dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEK dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEL dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEM dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEN dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEP dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEQ dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KER dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KES dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

KET dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEU dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEV dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEW dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEX dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KEY dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFA dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFB dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFC dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

KFD dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFE dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFF dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFG dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFH dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFJ dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFK dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFL dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

KFM dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3


Numb Form-Operating
er Wavelength-Rate-
Minimum Output
Optical Fiber Type-

KFN dBm to -9 dBm, 1550 nm,
3400 ps/nm, -2 dBm to +3

Hardware Description 18 Cables
18 Cables
About This Chapter
This topic describes the cables that the equipment uses, including the fiber jumper, power cable,
alarm cable, management cable, signal cable, and clock cable.
18.1 Fiber Jumper

This topic describes the categories and connectors of the fiber jumpers.
18.2 Power Cable and Grounding Cable
The power cables and grounding cables include the cabinet power cable, subrack power cable,
COA power cable, UPM power cable, and grounding cable of the cabinet door.
18.3 Alarm Cable
The alarm cables that the equipment uses include the cabinet indicator cable, alarm cascading
cable, and alarm input/output cable.
18.4 Management Cable
The management cables include the serial port cable, ordinary phone line, COA cascading cable,
and network cable.
18.5 Signal Cable
The signal cables include the E1/E3 signal cable, framed E1 signal cable, and Nx64 kbit/s signal
cable.
18.6 Clock Cable
The clock cables include the clock cable and clock transit cable.

18 Cables Hardware Description
18.1 Fiber Jumper

This topic describes the categories and connectors of the fiber jumpers.
18.1.1 Categories of the Fiber Jumpers

The OptiX OSN equipment uses various types of fiber jumpers.
18.1.2 Connector
The OptiX OSN equipment uses various types of fiber connectors.
18.1.1 Categories of the Fiber Jumpers

The OptiX OSN equipment uses various types of fiber jumpers.
Table 18-1 lists the categories of the fiber jumpers that the OptiX OSN equipment uses.
Table 18-1 Categories of the fiber jumpers that the OptiX OSN equipment uses
Usage Connector Connector Fiber Available Length
1 2
Used to connect LC/PC FC/PC 2 mm single- 6 m, 10 m, 20 m, 30 m,

the OptiX OSN mode fiber and 50 m
equipment to the
ODF or to 2 mm multi- 3 m, 5 m, 10 m, 20 m,
connect an mode fiber 30 m, and 50 m
interface board of LC/PC SC/PC 2 mm single- 5 m, 10 m, 20 m, 30 m,
the OptiX OSN mode fiber and 50 m
equipment to
other equipment 2 mm multi- 10 m, 20 m, 30 m, and
mode fiber 50 m
SC/PC SC/PC 2 mm single- 2 m, 5 m, 10 m, 20 m,

mode fiber 30 m, 50 m, and 80 m
Used to connect LC/PC LC/PC 2 mm single- 1.5 m, 3 m, 5 m, 10 m,

the OptiX OSN mode fiber 20 m, and 30 m
equipment
2 mm multi- 3 m, 5 m, 10 m, 20 m,
mode fiber and 30 m
LC/PC FC/PC 2 mm single- 6 m, 10 m, 20 m, 30 m,

mode fiber and 50 m
LC/PC SC/PC 2 mm multi- 5 m, 10 m, 20 m, 30 m,

mode fiber and 50 m
Select the fiber connector and fiber length according to the on-site survey.
18.1.2 Connector
The OptiX OSN equipment uses various types of fiber connectors.

The four types of fiber connectors are described as follows:
l Most of the optical interfaces on the front panels of the boards are the LC/PC optical
interfaces. See Figure 18-1.
l The N2OU08 and 61COA provide the SC/PC optical interfaces.
l The "IN" interface on the case-shaped 62COA that is externally installed uses the LSH/
APC connector. See Figure 18-4.
l Generally, the ODF on the client side provides the FC/PC or SC/PC optical interface.
Figure 18-3 and Figure 18-2 show the corresponding FC/PC and SC/PC fiber connectors.
Table 18-2 describes the four types of fiber connectors.
Table 18-2 Types of fiber connectors
Type of Internal Description

Fiber Connector
LC/PC Plug-in square fiber connector/protruding polished
LSH/APC Connector with a dust-proof cover/protruding polished (eight

degrees)
FC/PC Round fiber connector/protruding polished
SC/PC Square fiber connector/protruding polished
LC/PC Fiber Connector

Figure 18-1 shows the appearance of the LC/PC fiber connector.
Figure 18-1 Appearance of the LC/PC fiber connector
The axial operation instead of rotation is required to insert or remove an LC/PC fiber connector.
To insert a fiber jumper that uses an LC/PC connector, align the head of the fiber jumper with
the optical interface and apply proper force. To remove the fiber jumper, first, press the clip,
then, slightly push the fiber connector inward, and finally, pull out the connector.

SC/PC Fiber Connector

Figure 18-2 shows the appearance of the SC/PC fiber connector.
Figure 18-2 Appearance of the SC/PC fiber connector
FC/PC Fiber Connector

Figure 18-3 shows the appearance of the FC/PC fiber connector.
Figure 18-3 Appearance of the FC/PC fiber connector
LSH/APC Fiber Connector

Figure 18-4 shows the appearance of the LSH/APC fiber connector.
Figure 18-4 Appearance of the LSH/APC fiber connector

18.2 Power Cable and Grounding Cable

The power cables and grounding cables include the cabinet power cable, subrack power cable,
COA power cable, UPM power cable, and grounding cable of the cabinet door.
18.2.1 Power Cable of the Cabinet

The –48 V power cable, BGND power cable, and PGND power cable are used to supply power
to the equipment in a cabinet. One end of the power cable is connected to the power distribution
cabinet and the grounding bar in the equipment room, and the other end is connected to the DC
PDU at the top of the cabinet.
18.2.2 Grounding Cable of the Cabinet Door
The grounding cable of the cabinet door grounds the front door, rear door and side panels of the
cabinet. The grounding cables of the cabinet door are correctly connected before delivery.
18.2.3 Subrack Power Cable
The subrack power cable connects the DC PDU at the top of the cabinet and the PIU in the
subrack. The subrack power cable leads the –48 V power from the top of the cabinet to the
subrack. The subrack power cable is correctly connected before delivery.
18.2.4 COA Power Cable
The PIU can supply power to a maximum of two pieces of external equipment (for example, the
COA).
18.2.5 UPM Power Cable
This topic describes the structure, pin assignments, and technical specifications of the UPM
power cable.
18.2.6 RPC Power Cable
One end of the RPC power cable is connected to the power input interface of the case-shaped
Raman amplifier, and the other end is connected to the output interface of the DC power
distribution box at the top of the cabinet.
18.2.1 Power Cable of the Cabinet

The –48 V power cable, BGND power cable, and PGND power cable are used to supply power
to the equipment in a cabinet. One end of the power cable is connected to the power distribution
cabinet and the grounding bar in the equipment room, and the other end is connected to the DC
PDU at the top of the cabinet.
Structure
Figure 18-5 shows the structure of the –48 V/BGND power cable of the cabinet. Figure 18-6
and Figure 18-7 show the structure of the PGND power cable of the cabinet when the N1PDU
is used.

Figure 18-5 Structure of the –48 V/BGND power cable of the cabinet
1 2
1. Cord end terminal 2. Bare crimping terminal – type OT 3. Cable tie
Figure 18-6 Structure of the PGND power cable of the cabinet (JG2)
1. Bare crimping terminal – type OT 2. Cable tie 3. Bare crimping terminal (JG2)
4. Heat shrink tube 5. Main label 6. Wire
7. Heat shrink tube - -
Figure 18-7 Structure of the PGND power cable of the cabinet (OT)
1. Bare crimping terminal – type OT 2. Cable tie 3. Bare crimping terminal (OT)
4. Heat shrink tube 5. Main label 6. Wire

7. Heat shrink tube - -
Pin Assignments
None.
Technical Specifications
Table 18-3 Technical specifications of the cabinet power cable

Item Description
–48 V power Terminal 2 Bare crimping terminal – type OT – M8 – tin plated – round
cable of the (telecommu bare terminal – 16 mm2/25 mm2
cabinet nications
room side)
Terminal 1 Single cord end terminal – 0.024 m – insertion depth of 12

(PDU side) mm – 80 A – green – 16 mm2/25 mm2
Cable type Power cable – 450 V/750 V – blue – 85 A – 16 mm2/25

mm2
BGND power Terminal 2 Bare crimping terminal – type OT – M8 – tin plated – round
cable of the bare terminal – 16 mm2/25 mm2
cabinet
Terminal 1 Single cord end terminal – 0.024 m – insertion depth of 12
mm – 80 A – green – 16 mm2/25 mm2
Cable type Power cable – 450 V/750 V – black – 16 mm2/25 mm2
PGND power Terminal 1 Bare crimping terminal – type OT – M8 – tin plated – round
cable of the bare terminal - 16 mm2/25 mm2
cabinet
Terminal 3 Bare crimping terminal – type OT – M8 – tin plated – round
bare terminal – 16 mm2/25 mm2
Cable type Power cable – 450 V/750 V – yellow/green – 16 mm2/25

mm2
Fireproof class IEC60332-3A
Length Determined by the site survey result.

NOTE
The cabinet power cable for considers that the cross sectional area of the bare crimping terminal is 16
mm2 by default. Therefore, select the cable with a proper cross sectional area according to the required
length.
l If the length of the cabinet power cable is required to be not more than 20 m, select the cable with a
cross sectional area of 16 mm2.
l If the length of the cabinet power cable is required to be more than 20 m, select the cable with a cross
sectional area of 25 mm2.
18.2.2 Grounding Cable of the Cabinet Door

The grounding cable of the cabinet door grounds the front door, rear door and side panels of the
cabinet. The grounding cables of the cabinet door are correctly connected before delivery.
Structure
Figure 18-8 shows the structure of the grounding cable of the cabinet door.
Figure 18-8 Structure of the grounding cable of the cabinet door
1. Bare crimping terminal – type OT 2. Heat shrink tube 3. Main label
Pin Assignments
None.
Item Description
Terminal X1/X2 Bare crimping terminal – OT – 6 mm2 – M6 – tin plated – round

insulated terminal – 12 to 10 AWG
Cable Type Wire – 600 V – UL1015 – 10 AWG – 105-core twisted pair –

yellow and green, round – 50 A
Fireproof UL1015
class
Length 0.35 m

18.2.3 Subrack Power Cable

The subrack power cable connects the DC PDU at the top of the cabinet and the PIU in the
subrack. The subrack power cable leads the –48 V power from the top of the cabinet to the
subrack. The subrack power cable is correctly connected before delivery.
Structure
Figure 18-9 shows the structure of the power cable for the.
Figure 18-9 Structure of the power cable for the
1. Cable connector 2. Main label 3. Cable tie 4. Label 5. Cord end terminal
Pin Assignments
Table 18-4 provides the pin assignments of the power cable for the .
Table 18-4 Pin assignments of the power cable for the

Cable Bare Connection Color of the Core
Connector Crimping
Terminal
X1.A1 X2 A1 is connected to X2. Blue (–48 V power)
X1.A3 X3 A3 is connected to X3. Black (power ground)
Table 18-5 Technical specifications of the power cable for the

Item Description
Cable connector X1 Cable connector – type D – 3-pin – female – without intermediate

male terminals
Bare crimping terminals Single cord end terminal – 4 mm2 – 20 A – insertion depth of 10
X2 and X3 mm – gray

Item Description
Cable Type Power cable – 600 V – 5.26 mm2 – 10 AWG – black (the core is
in blue and black) – 41 A
Number of 2
cores
Fireproof CM
class
Color The core is in blue and black.
Length 2.5 m, 3 m, and 3.5 m
18.2.4 COA Power Cable

The PIU can supply power to a maximum of two pieces of external equipment (for example, the
COA).
The COA power cable connects a power interface on the PIU to a power interface of the external
equipment. Both ends of the COA power cable use the 4-pin connector. One end of the COA
power cable is connected to the PIU and the other end is connected to the power interface of the
external equipment (for example, the COA).
Structure
Figure 18-10 shows the structure of the COA power cable.
Figure 18-10 Structure of the COA power cable

1
A-A A 3
B
3 1 W1
4 2 X1
A 2
W2 X3
X2
W1.1
W1
B W1.2 X3
W2.1
W2
W2.2
1. Common terminal – female 2. Common connector – 4-pin 3. Main label A-A. Sectional view in direction
A

Pin Assignments
Table 18-6 provides the pin assignments of the COA power cable.
Table 18-6 Pin assignments of the COA power cable

Connectors X1 Cables W1 and W2 Color Connector X3
and X2
X1.1 W1.1 Brown X3.1
X2.1 W2.1
X1.3 W1.2 Black X3.3
X2.3 W2.2
Item Description
Connector X3 Common connector – 4-pin – double rows/4.20 mm
Connector X1/X2 Common terminal – female – 4-pin – 18/26 AWG – 13.7 mm in

length
Model of wire W1/W2 Symmetrical twisted-pair cable – 0 ohms – UL2464 – 0.64 mm

– 22 AWG – one pair – black
Number of cores 2
Fireproof class CM
Color Black
Length 1.8 m
18.2.5 UPM Power Cable

This topic describes the structure, pin assignments, and technical specifications of the UPM
power cable.
Structure
Figure 18-11 shows the structure of the power cable that connects the UPM to the OptiX OSN
2500.
Figure 18-11 Structure of the UPM power cable

A
B
A1 A B 1
A2 2
A3
X1 X2

Pin Assignments
Table 18-7 provides the pin assignments of the UPM power cables.
Table 18-7 Pin assignments of the UPM power cable

Cable Correspondi Cable Connector Color of the Core
Connector X1 ng Cable X2
A1 W1 1 Blue (–48 V/–60 V power)
A3 W2 2 Black (power ground)
Table 18-8 Technical specifications of the UPM power cable

Item Description
Cable connector X1 Cable connector – type D – 3-pin – female (two female and one male)
Cable connector X2 Common connector – 2-pin – single row
Cable Type Power cable – 300 V – 1.31 mm2 – 16 AWG – black (the core is in
blue and black) – 13 A
Number of 2
cores
Fireproof CM
class
Color The core is in blue and black.
Length 2.5 m
18.2.6 RPC Power Cable

One end of the RPC power cable is connected to the power input interface of the case-shaped
Raman amplifier, and the other end is connected to the output interface of the DC power
distribution box at the top of the cabinet.
Structure
Figure 18-12 shows the structure of the RPC power cable.

Figure 18-12 Structure of the RPC power cable
Main label
Label 3 Label 1
Label 2
1. Bare crimping terminal 2. Common connector - 4- 3. Common terminal – A-A. Sectional view in
pin female direction A
Pin Assignments
Table 18-9 provides the pin assignments of the RPC power cable.
Table 18-9 Pin assignments of the RPC power cable
Connectors X1 Cables W1 and W2 Color Connector X3

and X2
X1 W1 Blue X3.1
X2 W1 Black X3.3
Table 18-10 lists the technical specifications of the RPC power cable.
Table 18-10 Technical specifications of the RPC power cable
Item Description
Connector X3 Common terminal – female – 18/26 AWG –

13.7 mm in length, common connector – 4-
pin – double rows - 4.2 mm
Connector X1/X2 Bare crimping terminal - single cord end

terminal - 1 mm2 - 5 A - tin plated - insertion
depth of 6 mm - yellow
Model of wire W1/W2 Power cable – 600 V – UL1015 – 18 AWG -

black - OA
Number of cores 2

Item Description
Fireproof class VM-1
Color Blue and black
Length 3.5 m
18.3 Alarm Cable

The alarm cables that the equipment uses include the cabinet indicator cable, alarm cascading
cable, and alarm input/output cable.
18.3.1 Cabinet Indicator Cable

The cabinet indicator cable is used to connect the SEI in the subrack to the cabinet indicators.
The cabinet indicator cable leads the indicator signal from the SEI to the cabinet indicators.
18.3.2 Indicator Cascading Cable Between Subracks or Alarm Cascading Cable Between the
OptiX OSN Equipment
The indicator cascading cable between subracks or the alarm cascading cable between the OptiX
OSN equipment cascades the indicator signals or alarm signals between the subracks of the
OptiX OSN equipment.
18.3.3 Alarm Cascading Cable Between the OptiX OSN Equipment and the Other Huawei
Transmission Equipment
The alarm cascading cable cascades the alarm signals of the OptiX OSN equipment and the
alarm signals of the other Huawei transmission equipment such as the OptiX 2500+ and OptiX
OSN 9500.
18.3.4 Alarm Input/Output Cable
The alarm input cable transmits the alarm signals of the external equipment to the OptiX OSN
equipment. The alarm output cable transmits the alarm signals of the OptiX OSN equipment to
the centralized alarm monitoring equipment.
18.3.1 Cabinet Indicator Cable

The cabinet indicator cable is used to connect the SEI in the subrack to the cabinet indicators.
The cabinet indicator cable leads the indicator signal from the SEI to the cabinet indicators.
Structure
Figure 18-13 shows the structure of the cabinet indicator cable.

Figure 18-13 Structure of the cabinet indicator cable
X2
X3
X1
X4
X5
A-A. Sectional view in direction A B-B. Sectional view in direction B
Pin Assignments
Table 18-11 provides the pin assignments of the cabinet indicator cable.
Table 18-11 Pin assignments of the cabinet indicator cable
Connector Connector X2/X3/X4/X5 Relation Print on the

X1 Label
X1.4 X2.2 Twisted Green

pair
X1.5 X2.1
X1.1 X3.2 Twisted Red

pair
X1.2 X3.1
X1.3 X4.2 Twisted Orange

pair
X1.6 X4.1
X1.7 X5.2 Twisted Yellow

pair
X1.8 X5.1
Item Description
Connector X1 Network interface connector – 8-pin – 8-bit – shielded –

RJ-45 connector
Connector X2/X3/X4/X5 Common connector – 2-pin – single row/2.5 mm
Cable type Symmetrical twisted-pair cable – 120 ohms – SEYPVPV

– 0.5 mm – 24 AWG – 8-core – PANTONE 430U
Number of cores 8

Item Description
Fireproof class CM
Diameter of the core 0.5 mm
Length 2.5 m, 3 m, and 3.5 m
18.3.2 Indicator Cascading Cable Between Subracks or Alarm

Cascading Cable Between the OptiX OSN Equipment
The indicator cascading cable between subracks or the alarm cascading cable between the OptiX
OSN equipment cascades the indicator signals or alarm signals between the subracks of the
OptiX OSN equipment.
Both ends of the cable use the RJ-45 connector. One end of the cable is connected to the LAMP1
or ALMO2 interface of the SEI in one subrack. The other end of the cable is connected to the
LAMP2 or ALMO1 interface of the SEI in another subrack.
Structure
Figure 18-14 shows the structure of the indicator cascading cable between subracks or the alarm
cascading cable between the OptiX OSN equipment.
Figure 18-14 Structure of the indicator cascading cable between subracks or the alarm cascading
cable between the OptiX OSN equipment
1. RJ-45 network interface connector 2. Label 1 A-A. Sectional view in direction A
Pin Assignments
Table 18-12 provides the pin assignments of the indicator cascading cable between subracks or
the alarm cascading cable between the OptiX OSN equipment.
Table 18-12 Pin assignments of the indicator cascading cable between subracks or the alarm
cascading cable between the OptiX OSN equipment
Connect Connect Relation Alarm Output

or X1 or X2
X1.1 X2.1 Twisted pair Critical alarm output and major

alarm output (+)

Connect Connect Relation Alarm Output

or X1 or X2
X1.2 X2.2 Critical alarm signal output and

major alarm signal output (–)
X1.3 X2.3 Twisted pair Minor alarm signal output and

warning alarm signal output (+)
X1.6 X2.6 Minor alarm signal output and

warning alarm signal output (–)
X1.4 X2.4 Twisted pair Alarm signal output 1 (+)
X1.5 X2.5 Alarm signal output 1 (–)
X1.7 X2.7 Twisted pair Alarm signal output 2 (+)
X1.8 X2.8 Alarm signal output 2 (–)
Item Description
Connector X1/ Network interface connector – 8-pin – 8-bit – shielded – RJ-45 connector
X2
Cable type Symmetrical twisted-pair cable – 120 ohms – SEYPVPV – 0.5 mm – 24

AWG – 8-core – PANTONE 430U
Number of cores 8
Fireproof class CM
Diameter of the 0.5 mm

core
Length 3 m, 5 m, 10 m, and 20 m
18.3.3 Alarm Cascading Cable Between the OptiX OSN Equipment

and the Other Huawei Transmission Equipment
The alarm cascading cable cascades the alarm signals of the OptiX OSN equipment and the
alarm signals of the other Huawei transmission equipment such as the OptiX 2500+ and OptiX
OSN 9500.
Both ends of the cable use the RJ-45 connector. One end of the cable is connected to the
ALMO1 or ALMO2 interface of the OptiX OSN subrack. The other end of the cable is connected
to the alarm output interface or the alarm cascading interface of the subrack of the other Huawei
transmission equipment.

Structure
Figure 18-15 shows the structure of the alarm cascading cable between the OptiX OSN
equipment and the other Huawei transmission equipment.
Figure 18-15 Structure of the alarm cascading cable between the OptiX OSN equipment and
the other Huawei transmission equipment
1. RJ-45 network interface connector 2. Main label 3. Label 1 4. Cable connector – type D – 9-pin – female
L: 5 m, 10 m, and 20 m - - -
Pin Assignments
Table 18-13 provides the pin assignments of the alarm cascading cable between the OptiX OSN
equipment and the other Huawei transmission equipment.
Table 18-13 Pin assignments of the alarm cascading cable between the OptiX OSN equipment
and the other Huawei transmission equipment
Connector X1 Connector X2 Relation Description
X1.1 X2.7 Twisted pair Critical alarm signal output (+)
X1.2 X2.3 Critical alarm signal output (–)
X1.3 X2.6 Twisted pair Major alarm signal output (+)
X1.6 X2.1 Major alarm signal output (–)
Item Description
Connector Network interface connector – 8-pin – 8-bit – shielded – RJ-45 connector

X1

Item Description
Connector Cable connector – type D – 9-pin – female

X2
Cable type Symmetrical twisted-pair cable – 100 ohms – SEYVP – 0.48 mm – 26 AWG
– 4-core – black
Number of 4
cores
Fireproof CM
class
Diameter of 0.5 mm
the core
Length 5 m, 10 m, and 20 m
18.3.4 Alarm Input/Output Cable

The alarm input cable transmits the alarm signals of the external equipment to the OptiX OSN
equipment. The alarm output cable transmits the alarm signals of the OptiX OSN equipment to
the centralized alarm monitoring equipment.
The alarm input/output cable uses an RJ-45 connector at one end to connect to the alarm input/
output interface of the equipment. The other end of the alarm input/output cable is connected to
the external equipment or the centralized alarm monitoring equipment. The connector needs to
be prepared on site as required. Each alarm input/output cable transmits four channels of alarm
signals.
Structure
Figure 18-16 shows the structure of the alarm input/output cable.
Figure 18-16 Structure of the alarm input/output cable
1. RJ-45 network interface connector 2. Main label A-A. Sectional view in direction A

Pin Assignments
Table 18-14 provides the pin assignments of the alarm input/output cable.
Table 18-14 Pin assignments of the alarm input/output cable

Connector X1 Color Relation Alarm Output Alarm Input
X1.1 Blue Twisted pair Critical or major alarm (+) SW_INPUT 1 +
X1.2 White Critical or major alarm (–) SW_INPUT 1 –
X1.3 Orange Twisted pair Minor or warning alarm (+) SW_INPUT 2 +
X1.6 White Minor or warning alarm (–) SW_INPUT 2 –
X1.4 Green Twisted pair Alarm signal output 1 (+) SW_INPUT 3 +
X1.5 White Alarm signal output 1 (–) SW_INPUT 3 –
X1.7 Brown Twisted pair Alarm signal output 2 (+) SW_INPUT 4 +
X1.8 White Alarm signal output 2 (–) SW_INPUT 4 –
Item Description
Connector X1 Network interface connector – 8-pin – 8-bit – shielded – RJ-45 connector
Cable type
Number of 8
cores
Fireproof class CM
Core diameter 0.5 mm
Length 10 m, 20 m, and 30 m
18.4 Management Cable

The management cables include the serial port cable, ordinary phone line, COA cascading cable,
and network cable.
18.4.1 OAM Serial Port Cable

The OAM serial port cable is used for the management and remote maintenance of the OptiX
OSN equipment.
18.4.2 Serial 1 to 4/F1/F&f Serial Port Cable
The serial 1–4/F1/F&f serial port cable uses an RJ-45 connector at one end to connect to the
serial 1–4 interfaces, F1 serial port, or F&f serial port, and uses a DB9 connector at the other
end to connect to the external detecting equipment or external managed equipment.

18.4.3 RS-232/RS-422 Serial Port Cable

The RS-232/RS-422 serial port cable is used to transport the management signals between
subnets.
18.4.4 Ordinary Telephone Line
The ordinary telephone line is used to connect the orderwire phone. Both ends of the ordinary
telephone line use the RJ-45 connector. One end of the ordinary telephone line is connected to
the PHONE interface of the equipment, and the other end is connected to the interface of the
orderwire phone.
18.4.5 COA Cascading Cable
When multiple COAs are installed in a cabinet, use COA cascading cables to cascade the COAs.
18.4.6 Straight Through Cable
The straight through cable is used to connect the OptiX OSN equipment to an NM computer.
18.4.7 Crossover Cable
The crossover cable is used to connect the OptiX OSN equipment, network management
computer, and Ethernet to achieve communication. Both ends of the crossover cable use the
RJ-45 connector.
18.4.1 OAM Serial Port Cable

The OAM serial port cable is used for the management and remote maintenance of the OptiX
OSN equipment.
The OAM serial port cable uses an RJ-45 connector at one end to connect to the OAM interface
of the equipment and uses a DB25 connector at the other end to connect to a laptop computer,
serial NMS, or modem.
Structure
Figure 18-17 shows the structure of the OAM serial port cable (using the DB25 connector).
Figure 18-17 Structure of the OAM serial port cable
1. RJ-45 network 2. Main label 3. Cable connector – A-A. Sectional view in B-B. Sectional view in
interface connector DB25 male direction A direction B

Pin Assignments
Table 18-15 provides the pin assignments of the OAM serial port cable.
Table 18-15 Pin assignments of the OAM serial port cable

Connector Connector X2 Relation Description
X1
X1.2 X2.20 Single Data terminal ready (DTR)
X1.3 X2.2 Single Transmitting data (TD)
X1.6 X2.3 Single Receiving data (RD)
X1.4 X2.7 Twisted pair Signaling ground (SG)
X1.5
Item Description
Connector X1 Network interface connector – RJ-45 connector – 8-pin – 8-bit – shielded

– connector
Connector X2 Cable connector – type D – 25-pin – male, or cable connector – type D –

9-pin – male
Type Symmetrical twisted-pair cable – 120 ohms – SEYPVPV – 0.5 mm – 24

AWG – 8-core – PANTONE 430U
Number of 8
cores
Fireproof class CM
Length 5000 mm
18.4.2 Serial 1 to 4/F1/F&f Serial Port Cable

The serial 1–4/F1/F&f serial port cable uses an RJ-45 connector at one end to connect to the
serial 1–4 interfaces, F1 serial port, or F&f serial port, and uses a DB9 connector at the other
end to connect to the external detecting equipment or external managed equipment.
The serial 1–4/F1/F&f serial port cable performs the following functions:
l Transparently transmits the environment monitoring data signal.
l Manages external devices such as the COA.
Structure
Figure 18-18 shows the structure of the serial 1–4/F1/F&f serial port cable.

Figure 18-18 Structure of the serial 1–4/F1/F&f serial port cable
1. RJ-45 network 2. Main label 3. Cable connector – A-A. Sectional view in B-B. Sectional view in
interface connector DB9 male direction A direction B
Pin Assignments
Table 18-16 provides the pin assignments of the serial 1–4/F1/F&f serial port cable.
Table 18-16 Pin assignments of the serial 1–4/F1/F&f serial port cable
Connector X1 Connector X2 Relation Description
X1.1 X2.8 Twisted pair RS422RX+
X1.2 X2.9 RS422RX–
X1.3 X2.6 Twisted pair RS422TX+
X1.6 X2.7 RS422TX–
X1.4 X2.3 Twisted pair RS232RX
X1.8 X2.2 RS232TX
X1.5 X2.5 Single SG
Item Description
Connector X1 Network interface connector – RJ-45 connector – 8-pin – 8-bit – shielded –

connector
Connector X2 Cable connector – type D – 9-pin – male
Cable type (1) Symmetrical twisted-pair cable – 120 ohms – SEYPVPV – 0.5 mm – 24
AWG – 8-core – PANTONE 430U (2) Symmetrical twisted-pair cable –
100 ohms – SEYVP – 0.48 mm – 26 AWG – 8-core – black

Item Description
Number of 8
cores
Fireproof class CM
Length 15 m in the case of cable type 1 and 3 m in the case of cable type 2
18.4.3 RS-232/RS-422 Serial Port Cable

The RS-232/RS-422 serial port cable is used to transport the management signals between
subnets.
Both ends of the RS-232/RS-422 serial port cable use the RJ-45 connector. One end of the
RS-232/RS-422 serial port cable is connected to the RS-232/RS-422 serial port of the equipment.
The other end is connected to the RS-232/RS-422 serial port of another piece of equipment that
needs to make orderwire calls to the other equipment.
Structure
Figure 18-19 shows the structure of the RS-232/RS4-22 serial port cable.
Figure 18-19 Structure of the RS-232/RS-422 serial port cable
1. RJ-45 network interface connector 2. Main label A-A. Sectional view in direction A
Pin Assignments
Table 18-17 provides the pin assignments of the RS-232/RS-422 serial port cable.
Table 18-17 Pin assignments of the RS-232/RS-422 serial port cable

X1
X1.3 X2.1 Twisted pair RX+


X1
X1.6 X2.2 RX–
X1.1 X2.3 Twisted pair TX+
X1.2 X2.6 TX–
X1.5 X2.5 Twisted pair SG
X1.4 X2.8 232RX
X1.8 X2.4 Single 232TX
Item Description
Connector X1/X2 Network interface connector – RJ-45 connector – 8-pin – 8-bit –

shielded – connector
Cable type Symmetrical twisted-pair cable – 120 ohms – SEYPVPV – 0.5 mm –

24 AWG – 8-core – PANTONE 430U
Number of cores 8
Fireproof class CM
Length 15 m
18.4.4 Ordinary Telephone Line

The ordinary telephone line is used to connect the orderwire phone. Both ends of the ordinary
telephone line use the RJ-45 connector. One end of the ordinary telephone line is connected to
the PHONE interface of the equipment, and the other end is connected to the interface of the
orderwire phone.
Structure
Figure 18-20 shows the structure of the ordinary telephone line.
Figure 18-20 Structure of the ordinary telephone line
1. RJ-45 connector 2. Main label

Pin Assignments
Table 18-18 provides the pin assignments of the ordinary telephone line.
Table 18-18 Pin assignments of the ordinary telephone line

Connector X1 Connector X2 Description
X1.1 X2.1 Not connected
X1.3 X2.3 TIP
X1.4 X2.4 RING
Item Description
Connector X1/X2 Network interface connector – 6-pin – 26 to 28 AWG
Cable type Power cable – 150 V – UL20251 – 0.08 mm2 – 28 AWG – black –
1 A – 2-core telephone line
Number of cores 2
Fireproof class CM
Length 15 m
18.4.5 COA Cascading Cable

When multiple COAs are installed in a cabinet, use COA cascading cables to cascade the COAs.
Both ends of the COA cascading cable use the DB9 connector. One end of the COA cascading
cable is connected to the RS232-1 serial port of one COA, and the other end is connected to the
RS232-2 serial port of another COA.
Structure
Figure 18-21 shows the structure of the COA cascading cable.

Figure 18-21 Structure of the COA cascading cable
1. Cable connector – DB9 male 2. Label A-A. Sectional view in direction A
Pin Assignments
Table 18-19 provides the pin assignments of the COA cascading cable.
Table 18-19 Pin assignments of the COA cascading cable

Connector X1 Connector X2 Remarks
3 2 One pair
2 3
5 5 Grounding
Item Description
Connector X1/X2 Cable connector – type D – 9-pin – male
Cable type Symmetrical twisted-pair cable – 100 ohms – UL2464 – 0.32 mm –

28 AWG – 2P – Huawei grey
Number of cores Two pairs
Fireproof class CM
Length 0.6 m and 2.5 m
18.4.6 Straight Through Cable

The straight through cable is used to connect the OptiX OSN equipment to an NM computer.
Both ends of the straight through cable use the RJ-45 connector. One end of the straight through
cable is connected to the ETH interface of the equipment, and the other end is connected to the
network interface of the NM computer.

NOTE
As the ETH interface of the OptiX OSN equipment supports the auto-sensing function, the ETH interface
can use a straight through cable or a crossover cable.
Structure
Figure 18-22 shows the structure of the straight through cable.
Figure 18-22 Structure of the straight through cable
1. RJ-45 network interface connector 2. Label 1 3. Main label 4. Label 2
Pin Assignments
Table 18-20 provides the pin assignments of the straight through cable.
Table 18-20 Pin assignments of the straight through cable

Connector X1 Connector X2 Color Relation
X1.1 X2.1 White/Orange Twisted pair
X1.2 X2.2 Orange
X1.3 X2.3 White/Green Twisted pair
X1.6 X2.6 Green
X1.4 X2.4 Blue Twisted pair
X1.5 X2.5 White/Blue
X1.7 X2.7 White/Brown Twisted pair
X1.8 X2.8 Brown

Item Description

shielded – connector – 24 to 26 AWG – CAT 6/configured with the
SFTP network cable
Cable type Communication cable – 100±15 ohms – CAT5E SFTP 24 AWG – 8-

core – PANTONE 445U
Number of cores 8
Fireproof class CM
Length 5 m, 10 m, 20 m, and 30 m
18.4.7 Crossover Cable

The crossover cable is used to connect the OptiX OSN equipment, network management
computer, and Ethernet to achieve communication. Both ends of the crossover cable use the
RJ-45 connector.
Structure
Figure 18-23 shows the structure of the crossover cable.
Figure 18-23 Structure of the crossover cable
1. RJ-45 network interface connector 2. Label 1 3. Main label 4. Network cable 5. Label 2
Pin Assignments
Table 18-21 provides the pin assignments of the crossover cable.
Table 18-21 Pin assignments of the crossover cable
X1.6 X2.2 Orange Twisted pair
X1.3 X2.1 White/Orange

X1.1 X2.3 White/Green Twisted pair
X1.2 X2.6 Green
X1.4 X2.4 Blue Twisted pair
X1.5 X2.5 White/Blue
X1.7 X2.7 White/Brown Twisted pair
X1.8 X2.8 Brown
Item Description

shielded – connector – 24 to 26 AWG – CAT 6/configured with the
SFTP network cable
Cable type Communication cable – 100±5 ohms – CAT5E SFTP 24 AWG – 8-

core – PANTONE 646U
Number of cores 8
Fireproof class CM
Length 5 m and 30 m
18.5 Signal Cable

The signal cables include the E1/E3 signal cable, framed E1 signal cable, and Nx64 kbit/s signal
cable.
18.5.1 75-ohm 8xE1 Cable

The 75-ohm 8xE1 cable is used to receive and transmit E1 signals.
18.5.3 E3/T3/STM-1 Cable
The E3/T3/STM-1 cable is used to receive and transmit E3/T3/STM-1 electrical signals. The
E3/T3/STM-1 cable uses an SMB connector at one end to connect to the E3/T3/STM-1 electrical
access board. The other end of the E3/T3/STM-1 cable is connected to the DDF. The connector
needs to be prepared on site as required.
18.5.4 Framed E1 Cable
The framed E1 cable is connected to the DB44 connector of the DM12 to access eight channels
of framed E1 signals.
18.5.5 Nx64 kbit/s Cable

The Nx64 kbit/s cable is connected to the DB28 connector of the DM12 to access one channel
of Nx64 kbit/s signals.

The 75-ohm 8xE1 cable uses a DB44 connector at one end to connect to the D75S. The other
end of the 75-ohm 8xE1 cable is connected to the digital distribution frame (DDF). The connector
needs to be prepared on site as required. Each 75-ohm 8xE1 cable can transmit 8xE1 signals.
Structure
Figure 18-24 shows the structure of the 75-ohm 8xE1 cable.
Figure 18-24 Structure of the 75-ohm 8xE1 cable

Pos.1 View A 1
A Pos.44
MO55
Main label
W
1. Cable connector – type D – 44-pin – male 2. Main label
Pin Assignments
Table 18-22 provides the pin assignments of the 75-ohm 8xE1 cable.
Table 18-22 Pin assignments of the 75-ohm 8xE1 cable
Connector Cable W Remarks Connector Cable W Remarks
Core No. Core No.
38 Ring 1 R1 34 Ring 9 R5
23 Tip 19 Tip
37 Ring 3 R2 33 Ring 11 R6
22 Tip 18 Tip

Connector Cable W Remarks Connector Cable W Remarks
Core No. Core No.
36 Ring 5 R3 32 Ring 13 R7
21 Tip 17 Tip
35 Ring 7 R4 31 Ring 15 R8
20 Tip 16 Tip
15 Ring 2 T1 11 Ring 10 T5
30 Tip 26 Tip
14 Ring 4 T2 10 Ring 12 T6
29 Tip 25 Tip
13 Ring 6 T3 9 Ring 14 T7
28 Tip 24 Tip
12 Ring 8 T4 8 Ring 16 T8
27 Tip 7 Tip
Shell External braid shield layer/Without Shell External braid shield layer/
the external braid shield layer Without the external braid shield
layer
The external layer of the 75-ohm E1 cable may be of the shielded type or unshielded type. The
specifications of the 75-ohm E1 cable with the shielded layer are different from the specifications
of the 75-ohm E1 cable with the unshielded layer. Table 18-23 lists the specifications of the 75-
ohm E1 cable with the external braid shield layer. Table 18-24 lists the specifications of the 75-
ohm E1 cable without the external braid shield layer.
Table 18-23 Specifications of the 75-ohm E1 cable with the external braid shield layer
Item Description
Connector X Connector accessories– type D – 44-pin – male – cable welding type

– 3-row pins
Cable type Coaxial cable – SYFVZP-LC 75-1-1x16 – 75 ohms – 13.10 mm –

1.2 mm – 0.254 mm – Pantone Warm Gray 1U
Fireproof class Complies with IEC60332–3C.
Number of cores 16 cores, 8xE1

Item Description
Diameter of the 13.10 mm – 1.2 mm – 0.254 mm

shielding layer –
diameter of the
internal insulation
layer – diameter of the
internal conductor
Length 3 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, and 50 m
Table 18-24 Specifications of the 75-ohm E1 cable without the external braid shield layer
Item Description
Connector X Connector accessories– type D – 44-pin – male – cable welding type

– 3-row pins
Cable type Coaxial cable – SYFVZP-LC 75-1-1x16 – 75 ohms – 12.40 mm –

1.2 mm – 0.254 mm – Pantone Warm Gray 1U
Fireproof class Complies with IEC60332–3C.
Number of cores 16 cores, 8xE1
Diameter of the 12.40 mm – 1.2 mm – 0.254 mm

shielding layer –
diameter of the
internal insulation
layer – diameter of the
internal conductor
Length 5 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, and 50 m
CAUTION
The pin assignment table is delivered with the 75-ohm 8xE1 cable in a packing bag. You must
keep the table carefully.

The 120-ohm 8xE1 cable uses a DB44 connector at one end to connect to the 120-ohm E1
electrical interface board. The other end of the 120-ohm 8xE1 cable is connected to the DDF.
The connector needs to be prepared on site as required. Each 120-ohm 8xE1 cable can transmit
8xE1 signals.

Structure
Figure 18-25 shows the structure of the 120-ohm 8xE1 cable.
Figure 18-25 Structure of the 120-ohm 8xE1 cable
1. Cable connector – type D – 44-pin – male 2. Label 1, marked with "W1 (TX1–8)"
3. Label 3, marked with "W2 (RX1–8)" 4. Main label
Pin Assignments
Table 18-25 provides the pin assignments of the 120-ohm 8xE1 cable.
Table 18-25 Pin assignments of the 120-ohm 8xE1 cable
Connecto Cable W1 Remar Connecto Cable W2 Remar

r ks r ks
Core No. Core No.
15 Blue Twisted TX1 38 Blue Twisted RX1

pair pair
30 White 23 White
14 Orang Twisted TX2 37 Orang Twisted RX2

e pair e pair
29 White 22 White
13 Green Twisted TX3 36 Green Twisted RX3

pair pair
28 White 21 White
12 Brow Twisted TX4 35 Brown Twisted RX4

n pair pair
27 White 20 White
11 Grey Twisted TX5 34 Grey Twisted RX5

pair pair
26 White 19 White

Connecto Cable W1 Remar Connecto Cable W2 Remar

r ks r ks
Core No. Core No.
10 Blue Twisted TX6 33 Blue Twisted RX6

pair pair
25 Red 18 Red
9 Orang Twisted TX7 32 Orang Twisted RX7

e pair e pair
24 Red 17 Red
8 Green Twisted TX8 31 Green Twisted RX8

pair pair
7 Red 16 Red
Shell External braided shield Shell External braided shield
Item Description
Connector X Cable connector – type D – 44-pin – male
Cable type Communication cable – 120 ohms – SEYPVPV – 0.5 mm – 24 AWG

– 16-core – PANTONE 430U
Number of cores 16

internal conductor
Fireproof class CM
Length 10 m, 15 m, 20 m, 30 m, and 40 m
18.5.3 E3/T3/STM-1 Cable

The E3/T3/STM-1 cable is used to receive and transmit E3/T3/STM-1 electrical signals. The
E3/T3/STM-1 cable uses an SMB connector at one end to connect to the E3/T3/STM-1 electrical
access board. The other end of the E3/T3/STM-1 cable is connected to the DDF. The connector
needs to be prepared on site as required.
Structure
Figure 18-26 shows the structure of the E3/T3/STM-1 cable.

Figure 18-26 Structure of the E3/T3/STM-1 cable
1. Coaxial connector – SMB 2. Main label 3. Coaxial cable
Pin Assignments
None.
Item Description
Connector Coaxial connector – SMB connector – 75 ohms – straight – female
Cable I Coaxial cable – 75 ohms – 3.9 mm – 2.1 mm – 0.34 mm – shielded
Diameter of the shielding layer – diameter of the internal insulation layer

– diameter of the internal conductor: 3.9 mm – 2.1 mm – 0.34 mm
Length: 10 m, 15 m, 20 m, and 30 m
Cable II Coaxial cable – 75 ohms – 4.4 mm – 2.4 mm – 0.4 mm – shielded – grey

Length: 15 m, 20 m, 25 m, 30 m, and 40 m
Cable III Coaxial cable – 75 ohms – 6.7 mm – 3.8 mm – 0.61 mm – shielded –

grey

Length: 15 m, 20 m, 25 m, 30 m, and 130 m
Cable IV Coaxial cable – 75 ohms – 5.80 mm – 3.71 mm – 0.643 mm – black

Length: 30 cm
Fireproof class CM

18.5.4 Framed E1 Cable

The framed E1 cable is connected to the DB44 connector of the DM12 to access eight channels
of framed E1 signals.
The framed E1 cables are available in two types, namely, 75-ohm framed E1 cable and 120-ohm
framed E1 cable.
l For the structure, pin assignments, and technical specifications of the 75-ohm framed E1
cable, see the topic that describes the 75-ohm 8xE1 cable.
l For the structure, pin assignments, and technical specifications of the 120-ohm framed E1
cable, see the topic that describes the 120-ohm 8xE1 cable.
18.5.5 Nx64 kbit/s Cable

The Nx64 kbit/s cable is connected to the DB28 connector of the DM12 to access one channel
of Nx64 kbit/s signals.
Table 18-26 provides the pin assignments of the DB28 connector.
Table 18-26 Pin assignments of the DB28 connector of the DM12
Pin Signal Direction Description
1 TXD+ ---> Transmits data.
2 TXD– ---> Transmits data.
3 TXC+ <--> Transmits the clock signal provided by the

DCE to the DTE.
4 TXC– <--> Transmits the clock signal provided by the

DCE to the DTE.
5 NC - -
6 GND ----- Circuit_GND
7 MODE0 <--- Receives the signal that identifies the type of

cable.

cable.

cable.
10 MODE_DC <--- Receives the signal that identifies the type of

E DCE/DTE cable.
11 DCD+ <--> Detects the carrier.
12 DCD– <--> Detects the carrier.
13 RTS+ ---> Requests for transmission.
14 RTS– ---> Requests for transmission.

Pin Signal Direction Description
15 TXCE+ ---> Transmits the data clock in the case of the

DCE and loops back the clock in the case of
the DTE.
16 TXCE– ---> Transmits the data clock in the case of the

DCE and loops back the clock in the case of
the DTE.
17 RXC+ <--- Receives clock signals.
18 RXC– <--- Receives clock signals.
19 RXD+ <--- Receives data.
20 RXD– <--- Receives data.
21 GND ----- Shield_GND
22 LL <--> Receives the loopback control signal.
23 CTS+ <--- Permits the transmission.
24 CTS– <--- Permits the transmission.
25 DSR+ <--- Receives the DCE ready signal.
26 DSR– <--- Receives the DCE ready signal.
27 DTR+ ---> Transmits the DTE ready signal.
28 DTR– ---> Transmits the DTE ready signal.
The Nx64 kbit/s cables are classified into the following categories according to the protocol,
which the Nx64 kbit/s signals comply with:
l V.35 DCE cable

l V.35 DTE cable
l V.24 DCE cable
l V.24 DTE cable
l X.21 DCE cable
l X.21 DTE cable
l RS-449 DCE cable
l RS-449 DTE cable
l RS-530 DCE cable
l RS-530 DTE cable
V.35 DCE Cable

Figure 18-27 shows the structure of the V.35 DCE cable.

Figure 18-27 Structure of the V.35 DCE cable

A-A B-B
1 2 3
Pos.28
A W B
Pos.1
A B
C D
E F
H J
X1 X2 M
K
P
N
L
R
S T
U V
W X
Y Z
AA BB
CC DD
EE FF
HH JJ
KK LL
MM NN
1. Cable connector – D28 – male 2. Main label

3. Cable connector – D34 – female + D34 plastic shell -
Table 18-27 provides the pin assignments of the V.35 DCE cable.
Table 18-27 Pin assignments of the V.35 DCE cable
Connector X1 Connector X2 Relation
19 P Twisted pair
20 S
1 R Twisted pair
2 T
15 V Twisted pair
16 X
3 Y Twisted pair
4 AA
17 U Twisted pair
18 W
11 F -
22 J -
23 C -
13 D -
25 H -
27 E -

21 B -
6+7+8 A Pins 6, 7, and 8 are short-

circuited.
The technical specifications of the V.35 DCE cable are as follows.
Item Description
Connector X1 Cable connector – type-D dual–edge subassembly – 28-pin – straight

– male – cable welding type – spacing 0.80 mm – matching with 28 to
30 AWG, exclusively used by the OEM
Connector X2 Cable connector – V35 plug – 34-pin – molding shell – kit, exclusively
used by the OEM
Cable connector – V35 DCE plug – 34-pin – female – cable crimping

type – housing core, exclusively used by the OEM
Cable type Symmetrical twisted-pair cable – 100 ohms – 0.38 mm – 28 AWG – 5

pairs – 8 cores – PANTONE 296U – exclusively used by the OEM
Number of cores Five pairs and eight cores

core
Length 3m
V.35 DTE Cable

Figure 18-28 shows the structure of the V.35 DTE cable.
Figure 18-28 Structure of the V.35 DTE cable

A-A B-B
1 2 3 4 5
Pos.28
A W B
Pos.1
B A
X1 X2 F
D
J
E
L N K M
C
H
R T P S
V X U W
Z BB Y AA
DD FF CC EE
JJ LL HH KK
NN MM
1. Cable connector – D28 – male 2. Main label 3. Cable connector – D34 – plastic shell
4. Ordinary terminal 5. Cable connector – D34 – male

Table 18-28 provides the pin assignments of the V.35 DTE cable.
Table 18-28 Pin assignments of the V.35 DTE cable

1 P Twisted pair
2 S
19 R Twisted pair
20 T
17 V Twisted pair
18 X
3 Y Twisted pair
4 AA
15 U Twisted pair
16 W
11 F -
22 J -
13 C -
23 D -
27 H -
25 E -
21 B -
6 + 10 + 7 + 8 A Pins 6, 7, 8, and 10 are short-

circuited.
The technical specifications of the V.35 DTE cable are as follows.
Item Description
Connector X1 Cable connector – type-D dual–edge subassembly – 28-pin – straight – male

– cable welding type – spacing 0.80 mm – matching with 28 to 30 AWG,
exclusively used by the OEM
Connector X2 Cable connector – V35 plug – 34-pin – molding shell – kit, exclusively used
by the OEM

Item Description
Cable connector – V35 DTE plug – 34-pin – female – cable crimping type
– housing core, exclusively used by the OEM
Cable type Symmetrical twisted-pair cable – 100 ohms – 0.38 mm – 28 AWG – 5 pairs
– 8 cores – PANTONE 296U – exclusively used by the OEM
Number of Five pairs and eight cores

cores
Diameter of 0.32 mm
the core
Length 3m
V.24 DCE Cable

Figure 18-29 shows the structure of the V.24 DCE cable.
Figure 18-29 Structure of the V.24 DCE cable

A-A B-B
1 2 3
Pos.25
Pos.1
A
W B
Pos.28
Pos.1 X1
X2
1. Cable connector – D25 – female 2. Main label 3. Cable connector – D28 – male
Table 18-29 provides the pin assignments of the V.24 DCE cable.
Table 18-29 Pin assignments of the V.24 DCE cable
19 2 Twisted pair
1 3
23 4 Twisted pair
13 5
25 20 Twisted pair
27 6

11 8 Twisted pair
22 18
3 15 Twisted pair
17 24
15 17 -
21 1 Single
6+7 7 Pins 6 and 7 are short-

circuited.
The technical specifications of the V.24 DCE cable are as follows.
Table 18-30 Technical specifications of the V.24 DCE cable

Item Description
Connector X1 Cable connector – type-D dual–edge subassembly – 28-pin – straight –

male – cable welding type – spacing 0.80 mm – matching with 28 to 30
AWG, exclusively used by the OEM
Connector X2 Cable connector – type D – 25-pin – female – cable welding type

cores

core
Length 3m
V.24 DTE Cable

Figure 18-30 shows the structure of the V.24 DTE cable.

Figure 18-30 Structure of the V.24 DTE cable

A-A B-B
1 2 3
Pos.1
Pos.1
A
W B
Pos.28
Pos.25 X1
X2
1. Cable connector – D25 – male 2. Main label 3. Cable connector – D28 – male
Table 18-31 provides the pin assignments of the V.24 DTE cable.
Table 18-31 Pin assignments of the V.24 DTE cable

1 2 Twisted pair
19 3
13 4 Twisted pair
23 5
27 20 Twisted pair
25 6
11 8 Twisted pair
22 18
3 15 Twisted pair
15 24
17 17 -
21 1 Single
6 + 10 + 7 7 Pins 6, 10, and 7 are short-

circuited.
The technical specifications of the V.24 DTE cable are as follows.

Table 18-32 Technical specifications of the V.24 DTE cable
Item Description

Connector X2 Cable connector – type D – 25-pin – male – cable welding type

cores

core
Length 3m
X.21 DCE Cable

Figure 18-31 shows the structure of the X.21 DCE cable.
Figure 18-31 Structure of the X.21 DCE cable

A-A B-B
1 2 3
Pos.15
Pos.1
W B
A
Pos.28
Pos.1
X2 X1
Table 18-33 provides the pin assignments of the X.21 DCE cable.
Table 18-33 Pin assignments of the X.21 DCE cable
13 5 Twisted pair
14 12
23 3 Twisted pair
24 10

19 2 Twisted pair
20 9
1 4 Twisted pair
2 11
15 6 Twisted pair
16 13
21 1 –

circuited.
The technical specifications of the X.21 DCE cable are as follows.
Table 18-34 Technical specifications of the X.21 DCE cable

Item Description


cores
Diameter of 0.32 mm
the core
Length 3m
X.21 DTE Cable

Figure 18-32 shows the structure of the X.21 DTE cable.

Figure 18-32 Structure of the X.21 DTE cable

A-A B-B
1 2 3
Pos.1 Pos.1
W
B
A
Pos.28
Pos.15
X2 X1
Table 18-35 provides the pin assignments of the X.21 DTE cable.
Table 18-35 Pin assignments of the X.21 DTE cable

13 3 Twisted pair
14 10
23 5 Twisted pair
24 12
19 4 Twisted pair
20 11
1 2 Twisted pair
2 9
15 6 Twisted pair
16 13
17 6 Twisted pair
18 13
21 1 –

circuited.
The technical specifications of the X.21 DTE cable are as follows.

Table 18-36 Technical specifications of the X.12 DTE cable
Item Description


cores

core
Length 3m
RS-449 DCE Cable

Figure 18-33 shows the structure of the RS-449 DCE cable.
Figure 18-33 Structure of the RS-449 DCE cable

A-A B-B
1 2 3
Pos.1 Pos.1
W
B
A
Pos.28
Pos.15
X2 X1
1. Cable connector – D28 – male 2. Main label 3. Cable connector – D37 – female – I
Table 18-37 provides the pin assignments of the RS-449 DCE cable.
Table 18-37 Pin assignments of the RS-449 DCE cable
27 11 Twisted pair
28 29
25 12 Twisted pair
26 30

13 9 Twisted pair
14 27
23 7 Twisted pair
24 25
11 13 Twisted pair
12 31
19 4 Twisted pair
20 22
1 6 Twisted pair
2 24
15 8 Twisted pair
16 26
17 17 Twisted pair
18 35
3 5 Twisted pair
4 23
22 10 –
21 1 –

circuited.
The technical specifications of the RS-449 DCE cable are as follows.
Table 18-38 Technical specifications of the RS-449 DCE cable
Item Description
Connector X1 Cable connector – type-D dual–edge subassembly – 28-pin – straight

– male – cable welding type – spacing 0.80 mm – matching with 28 to
30 AWG, exclusively used by the OEM
Connector X2 Cable connector – type D – 37-pin – female – cable welding type,

Cable type Symmetrical twisted-pair cable – 100 ohms – communication cable –

0.32 mm – 28 AWG – 26-core – PANTONE 296U – exclusively used
by the OEM

Item Description
Number of cores 26

core
Length 3m
RS-449 DTE Cable

Figure 18-34 shows the structure of the RS-449 DTE cable.
Figure 18-34 Structure of the RS-449 DTE cable

A-A B-B
1 2 3
Pos.37
Pos.28
A
W B
Pos.1 X1
X2 Pos.1
1. Cable connector – D28 – male 2. Main label 3. Cable connector – D37 – male – I
Table 18-39 provides the pin assignments of the RS-449 DTE cable.
Table 18-39 Pin assignments of the RS-449 DTE cable
27 12 Twisted pair
28 30
25 11 Twisted pair
26 29
13 7 Twisted pair
14 25
23 9 Twisted pair
24 27
11 13 Twisted pair
12 31

19 6 Twisted pair
20 24
1 4 Twisted pair
2 22
15 17 Twisted pair
16 35
17 8 Twisted pair
18 26
3 5 Twisted pair
4 23
22 10 -
21 1 -

circuited.
The technical specifications of the RS-449 DTE cable are as follows.
Table 18-40 Technical specifications of the RS-449 DTE cable

Item Description

Connector X2 Cable connector – type D – SUB plug – 37-pin – straight – male – cable
welding type – two rows, standard installation holes, exclusively used by
the OEM
Cable type Symmetrical twisted-pair cable – 100 ohms – communication cable – 0.32
mm – 28 AWG – 26-core – PANTONE 296U – exclusively used by the
OEM
Number of 26
cores
Diameter of 0.32 mm
the core

RS-530 DCE Cable

Figure 18-35 shows the structure of the RS-530 DCE cable.
Figure 18-35 Structure of the RS-530 DCE cable

A-A B-B
1 2 3
Pos.25
Pos.1
A W B
X1 Pos.28
Pos.1 X2
Table 18-41 provides the pin assignments of the RS-530 DCE cable.
Table 18-41 Pin assignments of the RS-530 DCE cable
28 22 Twisted pair
27 6
26 23 Twisted pair
25 20
24 19 Twisted pair
23 4
22 18 Single
21 1 Single
20 14 Twisted pair
19 2
18 11 Twisted pair
17 24
16 9 Twisted pair
15 17
14 13 Twisted pair
13 5

12 10 Twisted pair
11 8
4 12 Twisted pair
3 15
2 16 Twisted pair
1 3
6+7+9 7 Pins 6, 7, and 9 are short-

circuited.
The technical specifications of the RS-530 DCE cable are as follows.
Table 18-42 Technical specifications of the RS-530 DCE cable

Item Description

OEM
Number of 26
cores

core
Length 3m
RS-530 DTE Cable

Figure 18-36 shows the structure of the RS-530 DTE cable.

Figure 18-36 Structure of the RS-530 DTE cable

A-A B-B
1 2 3
Pos.1
Pos.1
A W B
Pos.28
X1
Pos.25 X2
Table 18-43 provides the pin assignments of the RS-530 DTE cable.
Table 18-43 Pin assignments of the RS-530 DTE cable
27 20 Twisted pair
28 23
25 6 Twisted pair
26 22
13 4 Twisted pair
14 19
23 5 Twisted pair
24 13
11 8 Twisted pair
12 10
19 3 Twisted pair
20 16
1 2 Twisted pair
2 14
15 24 Twisted pair
16 11
17 17 Twisted pair
18 9
3 15 Twisted pair

4 12
22 18 –
21 1 –
6 + 7 + 9 + 10 7 Pins 6, 7, 9, and 10 are short-

circuited.
The technical specifications of the RS-530 DTE cable are as follows.
Table 18-44 Technical specifications of the RS-530 DTE cable

Item Description

OEM
Number of 26
cores

core
Length 3m
18.6 Clock Cable

The clock cables include the clock cable and clock transit cable.
18.6.1 Clock Cable

The clock cables are available in two types, namely, 75-ohm clock cable and 120-ohm clock
cable. The clock cable is used to receive and transmit external clock signals. In the case of the
75-ohm clock cable, the cable uses an SMB connector at one end to connect to the external clock
interface of the OptiX OSN equipment. The other end of the cable is connected to the external
clock equipment. The connector needs to be prepared on site as required. In the case of the 120-
ohm clock cable, the cable uses an RJ-45 connector at one end to connect to the external clock
clock equipment. The connector needs to be prepared on site as required.
18.6.2 One-Channel Clock Transit Cable and Two-Channel Clock Transit Cable
The clock transit cables are available in two types, namely, one-channel 75-ohm-to-120-ohm
clock transit cable and two-channel 75-ohm-to-120-ohm clock transit cable.

18.6.1 Clock Cable

The clock cables are available in two types, namely, 75-ohm clock cable and 120-ohm clock
cable. The clock cable is used to receive and transmit external clock signals. In the case of the
75-ohm clock cable, the cable uses an SMB connector at one end to connect to the external clock
clock equipment. The connector needs to be prepared on site as required. In the case of the 120-
ohm clock cable, the cable uses an RJ-45 connector at one end to connect to the external clock
clock equipment. The connector needs to be prepared on site as required.
Structure
Figure 18-37 shows the structure of the 75-ohm clock cable. Figure 18-38 shows the structure
of the 120-ohm clock cable.
Figure 18-37 Structure of the 75-ohm clock cable
1. Coaxial connector – SMB 2. Label
Figure 18-38 Structure of the 120-ohm clock cable
1. Label 1 (R) and label 2 (T) 2. Communication cable 3. Main label 4. Network interface connector – RJ-45
Pin Assignments
Table 18-45 provides the pin assignments of the 120-ohm clock cable.
Table 18-45 Pin assignments of the 120-ohm clock cable

X1 W Remarks
X1.1 Blue W1
X1.2 White

X1 W Remarks
X1.4 Orange W2
X1.5 White
Table 18-46 Pin assignments of the 120-ohm clock cable
X1 Relationship Description
External Clock Mode External Time Mode

(1 PPS + Time
Information)
X1.1 Twisted pair CLK receive end (–) Not defined
X1.2 CLK receive end (+) Not defined
X1.3 Twisted pair Not defined 1 PPS signal (-)
X1.6 Not defined 1 PPS signal (+)
X1.4 Twisted pair CLK transmit end (–) Grounding end
X1.5 CLK transmit end (+) Grounding end
X1.7 Twisted pair Not defined Time information (-)
X1.8 Not defined Time information (+)
Item Description
75-ohm Connector: coaxial connector – SMB – 75 ohms – straight – female

clock cable
Cable type: coaxial cable – 75 ohms – 3.9 mm – 2.1 mm – 0.34 mm – shielded
Diameter of the shielding layer – diameter of the internal insulation layer –

diameter of the internal conductor: 3.9 mm – 2.1 mm – 0.34 mm
Length: 10 m, 15 m, 20 m, and 30 m
120-ohm Connector X: network interface connector – 8-pin – 8-bit – shielded – crystal

clock cable model connector
Cable type: symmetrical twisted-pair cable – 120 ohms – SEYPVPV – 0.4 mm

– 26 AWG – 2 pairs – PANTONE 430U
Diameter of the internal conductor: 0.4 mm/26 AWG
Length: 5 m, 10 m, 20 m, 30 m, 40 m, 50 m, 70 m, and 100 m

18.6.2 One-Channel Clock Transit Cable and Two-Channel Clock

Transit Cable
The clock transit cables are available in two types, namely, one-channel 75-ohm-to-120-ohm
clock transit cable and two-channel 75-ohm-to-120-ohm clock transit cable.
Structure
Figure 18-39 shows the structure of the one-channel 75-ohm-to-120-ohm clock transit
cable.Figure 18-40 shows the structure of the two-channel 75-ohm-to-120-ohm clock transit
cable.
Figure 18-39 Structure of the one-channel 75-ohm-to-120-ohm clock transit cable
1. Coaxial connector – SMB – 75 ohms – straight/plug – 2. Main label 3. 75-ohm-to-120-ohm transit PCB
female
Figure 18-40 Structure of the two-channel 75-ohm-to-120-ohm clock transit cable
1. Coaxial connector – SMB – 75 ohms – straight/plug – female 2. Label 1: "1#" 3. Label 2: "2#" 4. Main label
5. 75-ohm-to-120-ohm transit PCB 6. Label 3: "1#" 7. Label 4: "2#"
Pin Assignments
Table 18-47 provides the pin assignments of the two-channel 75-ohm-to-120-ohm clock transit
cable.

Table 18-47 Pin assignments of the two-channel 75-ohm-to-120-ohm clock transit cable
Connector 75-ohm Cable Color 120-ohm Cable
X1 Core Blue W3
Shielding layer White
X2 Core Blue W4
Shielding layer White
Item Description
One Connector: coaxial connector – SMB – 75 ohms – straight – female

channel
75-ohm cable: coaxial cable – 75 ohms – 3.9 mm – 2.1 mm – 0.34 mm – shielded
75-ohm cable: diameter of the shielding layer (3.9 mm) – diameter of the
internal insulation layer (2.1 mm) – diameter of the internal conductor (0.34
mm)
120-ohm cable: symmetrical twisted-pair cable – 120 ohms – SEYPVPV – 0.4

mm – 26 AWG – 2 pairs – PANTONE 430U
Diameter of the internal conductor of the 120-ohm cable: 0.4 mm/26 AWG
Length: 30 m
Two Connector X1/X2: coaxial connector – SMB – 75 ohms – straight – female

channels
75-ohm cable: coaxial cable – 75 ohms – 3.9 mm – 2.1 mm – 0.34 mm – shielded
75-ohm cable: diameter of the shielding layer (3.9 mm) – diameter of the
internal insulation layer (2.1 mm) – diameter of the internal conductor (0.34
mm)
120-ohm cable: symmetrical twisted-pair cable – 120 ohms – SEYPVPV – 0.4

mm – 26 AWG – 2 pairs – PANTONE 430U
Diameter of the internal conductor of the 120-ohm cable: 0.4 mm/26 AWG
Length: 30 m

Hardware Description 19 Indicators
19 Indicators
About This Chapter
This topic describes the indicators on the OptiX OSN equipment and the indicators on the boards
of the OptiX OSN equipment.
19.1 Indicators on the Cabinet

This topic describes the indicators on the cabinet of the OptiX OSN equipment.
19.2 Alarm Indicators on the Boards
This topic describes the alarm indicators on the boards.

19 Indicators Hardware Description
19.1 Indicators on the Cabinet

This topic describes the indicators on the cabinet of the OptiX OSN equipment.
Indicator Description
Power indicator – Power (green) On: Power is supplied to the equipment.
Off: Power is not supplied to the equipment.
Critical alarm indicator – Critical (red) On: A critical alarm occurs on the equipment.
Off: No critical alarm occurs on the equipment.
Major alarm indicator – Major (orange) On: A major alarm occurs on the equipment.
Off: No major alarm occurs on the equipment.
Minor alarm indicator – Minor On: A minor alarm occurs on the equipment.
(yellow)
Off: No minor alarm occurs on the equipment.
19.2 Alarm Indicators on the Boards

This topic describes the alarm indicators on the boards.
Board Hardware Status Indicator (STAT)

Status Meaning
On (green) The board operates normally.
On (red) The hardware of the board is faulty or does not match

the equipment.
Off The board is not powered on or does not start to work.
Service Activation Status Indicator/Board Status (Active/Standby) Indicator (ACT)

Status Meaning of the Service Meaning of the Board Status
Activation Status Indicator (Active/Standby) Indicator
On (green) The services are activated. The The board works as the working
board is in the working state. board.
Off The services are not activated. The board works as the
protection board.

Board Software Status Indicator (PROG)

Status Meaning
On (green) The board software or FPGA in the flash is

successfully loaded and stored, or the board software
is successfully initiated.
On for 100 ms and off for 100 ms The board software is being loaded to the flash or the
repeatedly (green) FPGA software is being loaded to the FPGA.
On for 300 ms and off for 300 ms l The board software is being initialized and is in
repeatedly (green) the BIOS boot state.
l The board is in the BIOS state because the board
is reset for three times in five minutes.
On (red) l The board software or FPGA in the flash is lost.

l The board software fails to be loaded.
l The board software fails to be initialized.
Off l No power is accessed.

l The high-power-consumption board enters the
low-power-consumption mode.
Service Alarm Indicator (SRV)

Type of Board Status Meaning
Service board On (green) The services are normal and no

service alarm is generated.
On (red) A critical or major alarm occurs in

the services.
On (yellow) A minor or remote alarm occurs in

the services.
Off The services are not configured and

no alarm is generated, or no power is
supplied to the board.

Synchronization Clock Status Indicator (SYNC)

Status Meaning
On (green) l The clock works in free-run mode and the system

clock priority list is not set. By default, the system
clock priority list contains only internal sources.
l The clock works in locked mode and is tracing a
clock source other than the internal sources in the
priority list.
On (red) The system clock priority list is set. All the clock
sources, however, are lost except for the internal
clock sources. The clock works in holdover mode or
free-run mode.
Alarm Mute Indicator (ALMC)

Status Meaning
On (yellow) The board is in the alarm mute state.
Off When an alarm is generated, the equipment emits an alarm

sound.
CF Card Read/Write Indicator (CF R/W)

Status Meaning
On (green) The card is in the read/write state.
Flashing (green) The system is reading data from the card or is writing data
into the card.
On (red) Pre-processing the card removal request is complete. The

card can be removed.
The card is offline or cannot be read from or written to.
Flashing (red) The system receives the card removal pre-processing

indication and is processing the indication.
Power Monitoring Indicators

–48 V power supply indicator of On (green) The –48 V power supply of channel
channel A (PWRA) A is normal.

On (red) The –48 V power supply of channel

A is faulty (lost or failed).
–48 V power supply indicator of On (green) The –48 V power supply of channel B
channel B (PWRB) is normal.
On (red) The –48 V power supply of channel B

is faulty (lost or failed).
+3.3 V backup power supply On (green) The +3.3 V backup power supply of
indicator of the system (PWRC) the system is normal.
On (red) The +3.3 V backup power supply of

the system is lost.
Ethernet Indicators
Connection status indicator – On The fiber cable is successfully

LINK (green) connected to the equipment.
Off The fiber cable is not connected to the

equipment.
Data receiving and Flashing The Ethernet interface is receiving or

transmission indicator – ACT transmitting data.
(orange)
Off The Ethernet interface is not receiving
or transmitting data.
Service Activation Status Indicator of the Cross-Connect Unit (ACTX)

Status Meaning
On (green) The cross-connect unit is in the active state.
Off The cross-connect unit is in the standby state.
Active/Standby State Indicator of the SCC Unit (ACTC)

Status Meaning
On (green) The SCC unit is in the active state.
Off The SCC unit is in the standby state.

Service Alarm Indicator of the Line Unit (SRVL)

Status Meaning
On (green) The line services are normal and no alarm is

generated.
On (red) A critical or major alarm occurs in the line services.
On (yellow) A minor or remote alarm occurs in the line services.
Off The line services are not configured and no alarm is

generated, or no power is supplied to the unit.
FAN Running Status Indicator (STATE)

Status Meaning
On (green) The fan operates normally.
On (red) The fan, fan power supply board, or fan control board
is abnormal.
On (yellow) The fan stops when the temperature is very low.
Indicators on the Front Panel of the COA

Running indicator Flashing once every two The COA operates normally.
– RUN (green) seconds (green)
Flashing once every four The COA is in database protection mode.

seconds (green) The communication between the COA
and the SCC is interrupted.
Flashing five times every The program is being started or loaded.

second (green)
Alarm indicator – On (red) Errors occur during the memory self-

ALM check.
Flashing thrice every other A critical alarm occurs.

second (red)
Flashing twice every other A major alarm occurs.

second (red)
Flashing once every other A minor alarm occurs.

second (red)

Indicators on the UPM

Module Indicator Status Meaning
Rectifier ALM On (red) The rectifier module is faulty. In normal

module situations, the indicator is off.
Vout On (green) The output of the rectifier module is normal.
Monitoring RUN Flashing The entire power system is normal.

module (green)
ALM On (red) The entire power system is faulty. In normal

situations, the indicator is off.
Indicators on the Microwave Boards

Connection status indicator 1 On (green) The link at the microwave layer is

(LINK1) – two colors (red and normal.
green)
On (red) The link at the microwave layer is
faulty.
Connection status indicator 2 On (green) The link at the microwave layer is

(LINK2) – two colors (red and normal.
green)
On (red) The link at the microwave layer is
faulty.
Active/Standby state On (green) The board is in the active state when

indicator (ACT1) – one color the board is in the 1+1 protection
(green) system.
The board is activated when the board
is not protected.
Off The board is in the standby state when

the board is in the 1+1 protection
system.
The board is not activated when the
board is not protected.
Active/Standby state On (green) The board is in the active state when

indicator (ACT2) – one color the board is in the 1+1 protection
(green) system.
The board is activated when the board
is not protected.
Off The board is in the standby state when

the board is in the 1+1 protection
system.
The board is not activated when the
board is not protected.

Working indicator of ODU 1 On (green) ODU 1 operates normally.

(ODU1) – two colors (red and
green) On (red) ODU 1 is faulty.
Working indicator of ODU 2 On (green) ODU 2 operates normally.

(ODU2) – two colors (red and
green) On (red) ODU 2 is faulty.

Hardware Description 20 Labels
20 Labels
About This Chapter
This topic describes the safety labels and engineering labels on the OptiX OSN equipment.
20.1 Safety Labels

Various safety labels are affixed to the equipment. This topic provides the indications and
positions of the safety labels.
20.2 Engineering Labels
The engineering labels should be prepared according to the local engineering specifications or
Huawei engineering specifications.

20 Labels Hardware Description
20.1 Safety Labels

Various safety labels are affixed to the equipment. This topic provides the indications and
positions of the safety labels.
20.1.1 Label Description

Labels, such as the ESD protection label, grounding label, and fan warning label are affixed to
the subrack.
20.1.2 Label Position
The ESD protection label and grounding label are affixed to the subrack. The laser safety class
label and APD warning label are affixed to the front panel of the board.
20.1.1 Label Description

Labels, such as the ESD protection label, grounding label, and fan warning label are affixed to
the subrack.
Table 20-1 Labels on the equipment
Label Label Name Indication
ESD protection The equipment is

label sensitive to static
electricity.
LASER
Laser safety class The power class of the
RADIATION label laser source
CLASS 1 WITH OPTICAL
INSTRUMENTS
LASER CLASS 1M
LASER
PRODUCT PRODUCT
Grounding label The grounding

position
! ATTENTION 警告 Periodic cleaning The air filter should be

CLEAN PERIODICALLY 定期清洗
label cleaned periodically.
严禁在风扇高速旋转时接触叶片 Fan warning label The fan blades should

DON'T TOUCH THE not be touched when
FANLEAVESBEFORE
THEYSLOW DOWN ! the fan is rotating.
APD warning label The overload point of

! APD the indicator is –9
Receiver dBm.
MAX:-9dBm

Label Label Name Indication
RoHS label The equipment may

contain some of the
poisonous substances
specified by the
regulations in China,
but can be safely used
within a period of 50
years. The equipment
should be recycled or
reused after 50 years.
OptiX OSN 2500
电源额定值 POWER RATING: -48 － -60V ; 10A
This device complies with Part 15 of the FCC Rules.

Product nameplate The product name and
label certification
Operation is subject to the following two conditions:
(1) this device may not cause harmful interference,
and (2) this device must accept any interference
received, including interference that may cause
undesired operation.
N14036
华为技术有限公司中国制作
HUAWEI TECHNOLOGIES CO.,LTD. MADE IN CHINA
In the case of the enhanced subrack:

OptiX OSN 2500
电源额定值 POWER RATING: -48－ -60V ; 16.8A

N14036
合格证/QUALIFICATION CARD
Certificate of The equipment is
qualification label qualified.
HUAWEI
20.1.2 Label Position

The ESD protection label and grounding label are affixed to the subrack. The laser safety class
label and APD warning label are affixed to the front panel of the board.

Figure 20-1 Positions of the labels affixed to the OptiX OSN 2500 subrack
OptiX OSN 2500

电源额定值 POWER RATING: -48－ -60V ; 16.8A

N14036
合格证/QUALIFICATION CARD
HUAWEI
严禁在风扇高速旋转时接触叶片
DON'T TOUCH THE

FAN LEAVES BEFORE
THEY SLOW DOWN !
ATTENTION 警告
CLEAN PERIODICALLY 定期清洗

Figure 20-2 Positions of the labels affixed to the board
SL16
CLASS 1
LASER
PRODUCT
! APD
Receiver
MAX:-9dBm
BA2
LASER
RADIATION

WITH OPTICAL
INSTRUMENTS
CLASS 1M LASER
PRODUCT
20.2 Engineering Labels

The engineering labels should be prepared according to the local engineering specifications or
Huawei engineering specifications.
Table 20-2 provides the engineering specifications of Huawei.
For information on how to prepare and affix labels, see the OptiX OSN 2500 Intelligent Optical
Transmission System Installation Guide.

Table 20-2 Huawei specifications for the engineering labels

Label Illustration Description
Engineer On the loaded cabinet side, the

TO:
ing label A01 -48V2
TO: label marked with "A01/B08 —–
B03 -48V2
for the B08 48V2" on the cable indicates that
power the cable supplies the –48 V2
cable power. This cable is led out from
the eighth connecter in the second
(1) (2)
row of the –48 V bus bar in the
(1) Label on the loaded cabinet side, that is, power distribution cabinet in row
the position of the cable on the power A and column 01 in the
distribution cabinet side equipment room.
(2) Label on the power distribution cabinet On the power distribution cabinet
side, that is, the position of the cable on the side, the label marked with "B03
loaded cabinet side —–48V2" on the cable indicates
that the cable supplies the –48 V2
power. This cable is led out from
the loaded cabinet in row B and
column 03 in the equipment
room. In the case of the PGND
cable and BGND cable, specify
only the row number and column
number of the power distribution
cabinet. It is not required to
specify the connecter on the bus
bar.
Engineer The external alarm cable is

ing label connected to the power
for the distribution cabinet (the first
external cabinet in each row used for
alarm power distribution). Affix labels
cable to the terminals of the power
distribution cabinet to indicate
the equipment that uses the
terminals. No engineering label
needs to be affixed to the
equipment side, unless otherwise
specified.
"A01" indicates that the alarm
cable connects the power
distribution cabinet and the
cabinet in row A and column 01
in the equipment room.

Engineer "A01-03-06-05" indicates that

ing label the local end of the network cable
for the is connected to network port 05 in
network slot 06 of subrack 03 in the
cable cabinet in row A and column 01
"B02-03-12" indicates that the
opposite end of the network cable
is connected to network port 12 in
subrack 03 in the cabinet in row
B and column 02 in the
equipment room. It is not
required to specify the slot
number.
Engineer "A01-01-05-05-R" indicates that

ing label the local end of the fiber is
for the connected to optical receiving
fiber that port 05 in slot 05 of subrack 01 in
connects the cabinet in row A and column
two 01 in the equipment room.
pieces of "G01-01-01-01-T" indicates that
equipme the opposite end of the fiber is
nt connected to optical transmitting
port 01 in slot 01 of subrack 01 in
the cabinet in row G and column
01 in the equipment room.
Engineer "ODF-G01-01-01-R" indicates

ing label that the local end of the fiber is
for the connected to the optical receiving
fiber that terminal in row 01 and column 01
connects of the ODF in row G and column
the 01 in the equipment room.
equipme "A01-01-05-05-R" indicates that
nt and the opposite end of the fiber is
the ODF connected to optical receiving
port 05 in slot 05 of subrack 01 in
the cabinet in row A and column
01 in the equipment room.

Engineer "A01-03-01-01-R" indicates that

ing label the local end of the trunk cable is
for the connected to the receiving
trunk terminal of trunk cable 01 in slot
cable 01 of subrack 03 in the cabinet in
that row A and column 01 in the
connects equipment room.
the "DDF-G01-01-01-AR" indicates
equipme that the opposite end of the trunk
nt and cable is connected to the
the DDF receiving terminal of direction A
(connected to the optical
transmission equipment) in row
01 and column 01 of the DDF in
row G and column 01 in the
equipment room.
Engineer "A01-03-01-01" indicates that

ing label the local end of the subscriber
for the TO:
cable is connected to cable 01 in
subscrib slot 01 of subrack 03 in the
er cable cabinet in row A and column 01
"MDF-G01-01-01" indicates that
the opposite end of the subscriber
cable is connected to the terminal
in row 01 and column 01 of the
MDF in row G and column 01 in
the equipment room.

Engineer IF CABLE
ing label MAIN/STD BY N
for the IF
cable The meanings of the parameters
are as follows:
l MAIN: IF cable of the main
ODU
l STD BY: IF cable of the
standby ODU
l N: antenna serial number,
starting from 1

Hardware Description 21 Board Information Quick Reference
21 Board Information Quick Reference
About This Chapter
This topic provides information about whether a board is supported by the OptiX OSN products,
the parameters specified for the interfaces of the boards (including the parameters specified for
optical interfaces, electrical interfaces, and auxiliary interfaces), the loopback capability of each
board, the functions supported by each board, and the protection schemes supported by each
board.
21.1 Compatibility of Board Versions with the Products

This topic provides information on whether a board of a specific version is supported by the
OptiX OSN products.
21.2 Quick Reference Table for Optical Interfaces
This topic lists the common parameters specified for the interfaces of boards.
21.3 Quick Reference of Board Functions
This topic describes the functions supported by SDH boards, PDH boards, data boards, and
packet boards.
21.4 Loopback Capability of the Boards
The SDH boards, PDH boards, and data boards of the OptiX OSN equipment support various
types of loopbacks.
21.5 Protection Schemes Supported by Each Board
The SDH boards, PDH boards, data boards, microwave boards, and packet boards of the OptiX
OSN equipment support various protection schemes.
21.6 Power Consumption and Weight of Each Board
This section lists the power consumption and weight of each board of the OptiX OSN series
equipment.

21 Board Information Quick Reference Hardware Description
21.1 Compatibility of Board Versions with the Products

This topic provides information on whether a board of a specific version is supported by the
OptiX OSN products.
Table 21-1 provides information on whether a board of a specific version is supported by the
OptiX OSN products.
Table 21-1 Information on whether a board of a specific version is supported by the OptiX OSN
products
Product OptiX OptiX OptiX OptiX OptiX OptiX OptiX

OSN OSN OSN OSN OSN OSN OSN
7500 3500 3500 II 2500 2500 1500A 1500B
REG
N1SL64 Y Y Y N Y N N
N2SL64 N Y N N Y N N
N4SL64 Y Y Y N N N N
T2SL64 Y N N N N N N
T2SL64A Y N N N N N N
N1SF64 Y Y Y N Y N N
N4SF64 Y Y Y N N N N
N1SF64A Y Y Y N N N N
N4SFD64 Y Y N N N N N
N1SLD64 Y Y N N N N N
N4SLD64 Y Y N N N N N
N1SL16 Y Y Y Y N Y Y
N2SL16 Y Y Y Y Y Y Y
N3SL16 Y Y Y Y Y Y Y
N1SL16A Y Y Y Y N Y Y
N3SL16A Y Y Y Y Y Y Y
N1SLD16 N Y Y N N N N
N1SLQ16 Y Y Y N N N N


7500 3500 3500 II 2500 2500 1500A 1500B
REG
N1SLO16 Y Y N N N N N
N4SLO16 Y Y N N N N N
N1SF16 Y Y Y Y Y Y Y
N3SLQ41 Y Y Y Y N Y Y
N3SLH41 Y Y Y N N N N
N1SL4 Y Y Y Y N Y Y
N2SL4 Y Y Y Y N Y Y
R1SL4 N N N Y N Y Y
R3SL4 N N N N N Y Y
N1SLQ4A Y Y Y Y N Y Y
N1SLD4 Y Y Y Y N Y Y
N2SLD4 Y Y Y Y N Y Y
N1SLD4A Y Y Y Y N Y Y
R1SLD4 N N N Y N Y Y
R3SLD4 N N N N N N Y
N1SLT1 Y Y Y Y N Y Y
N1SLQ1A Y Y Y Y N Y Y
R1SLQ1 N N N Y N Y Y
R3SLQ1 N N N N N Y Y
N1SL1 Y Y Y Y N Y Y
N2SL1 Y Y Y Y N Y Y
R1SL1 N N N Y N Y Y


7500 3500 3500 II 2500 2500 1500A 1500B
REG
R3SL1 N N N N N Y Y
N1SLH1 Y Y Y N N N N
N1SEP1 Y Y Y Y N Y Y
N2SLO1 Y Y Y Y N Y Y
N3SLO1 Y Y Y Y N Y Y
R1PL1 N N N N N Y Y
R1PD1 N N N Y N Y Y
R2PD1 N N N Y N Y Y
R3PD1 N N N N N N Y
N1PQ1 Y Y Y Y N N Y
N2PQ1 Y Y Y Y N N Y
N1PQM Y Y Y Y N N Y
N1PL3 Y Y Y Y N N Y
N2PL3 Y Y Y Y N N Y
N1PL3A Y Y Y Y N Y Y
N2PL3A Y Y Y Y N Y Y
N1PD3 Y Y Y Y N N Y
N2PD3 Y Y Y Y N N Y
N2PQ3 Y Y Y Y N N Y
N1DX1 Y Y Y Y N N Y
N1DXA Y Y Y Y N Y Y
N1SPQ4 N Y Y Y N N Y
N2SPQ4 Y Y Y Y N N Y
R1EFT4 N N N Y N Y Y
N1EFT8 Y Y Y Y N Y Y
N2EFT8 Y Y Y Y N Y Y
N1EFT8A Y Y Y Y N Y Y
N2EFT8A Y Y Y Y N Y Y


7500 3500 3500 II 2500 2500 1500A 1500B
REG
N1EGT2 Y Y Y Y N Y Y
N2EGT2 Y Y Y Y N Y Y
N1EFS0 N Y Y Y N N Y
N2EFS0 Y Y Y Y N N Y
N1EFS0A Y Y Y Y N N Y
N1EFS4 Y Y Y Y N Y Y
N2EGS2 Y Y Y Y N Y Y
N1EMS4 Y Y Y Y N Y Y
N1EMS2 Y Y Y Y N Y Y
N2EGR2 Y Y Y Y N Y Y
N2EMR0 Y Y Y Y N Y Y
N1EAS2 Y Y Y N N N N
N1EFP0 Y Y Y Y N N Y
N1EGSH Y N N N N N N
N1ADL4 Y Y Y Y N Y Y
N1ADQ1 Y Y Y Y N Y Y
N1IDL4 Y Y Y Y N Y Y
N1IDL4A Y Y Y Y N Y Y
N1IDQ1 Y Y Y Y N Y Y
N1IDQ1A Y Y Y Y N Y Y


7500 3500 3500 II 2500 2500 1500A 1500B
REG
N1MST4 Y Y N Y N Y Y
N1EU08 Y Y Y Y N N Y
N1OU08 Y Y Y Y N N Y
N2OU08 Y Y Y Y N N Y
N1D75S Y Y Y Y N N Y
N1MU04 Y Y Y Y N N Y
N1C34S Y Y Y Y N N Y
N1EU04 N Y Y Y N N Y
N1D12B Y Y Y Y N N Y
R1L12S N N N N N Y N
R1L75S N N N N N Y N
N1EFF8 Y Y Y Y N N Y
N1EFF8A Y Y Y Y N N Y
N1ETF8 Y Y Y Y N N Y
N1ETF8A Y Y Y Y N N Y
N1ETS8 Y Y Y Y N N Y
N1DM12 Y Y Y Y N N Y
N1TSB4 N Y Y Y N N Y
N1TSB8 Y Y Y Y N N Y
Q2CXL1 N N N Y N Y Y
R1CXLLN N N N N N Y Y


7500 3500 3500 II 2500 2500 1500A 1500B
REG
R2CXLLN N N N N N Y Y
Q5CXLLN N N Y Y N Y Y
Q6CXLLN N N Y N N N N
R1CXLD41 N N N N N Y Y
R1CXLQ41 N N N N N Y Y
R2CXLQ41 N N N N N Y Y
Q5CXLQ41 N N Y Y N Y Y
Q6CXLQ41 N N Y N N N N
T1GXCSA Y N N N N N N
N1GXCSA N Y N N N N N
T1EXCSA Y N N N N N N
N1EXCSA N Y N N N N N
T2UXCSA Y N N N N N N
N1UXCSA N Y N N N N N
N1UXCSB N Y N N N N N
T1SXCSA Y N N N N N N
N1SXCSA N Y N N N N N
N1SXCSB N Y N N N N N
T1IXCSA Y N N N N N N
N1IXCSA N Y N N N N N
N1IXCSB N Y N N N N N
N1FXCSA N Y N N N N N
N1XCE N Y N N N N N
N1GSCC N Y N N N N N
N2GSCC Y N N N N N N
N3GSCC Y Y N N N N N
N4GSCC Y Y N N N N N
CRG N N N N Y N N


7500 3500 3500 II 2500 2500 1500A 1500B
REG
T1EOW Y N N N N N N
R1EOW N N Y N N Y Y
T1AUX Y N N N N N N
N1AUX N Y N N N N N
R1AUX N N N N N Y Y
R2AUX N N N N N Y Y
Q1AUX N N Y N N N N
R1AMU N N N N N Y Y
Q1SAP N N N Y Y N N
Q2SAP N N N Y Y N N
Q1SEI N N N Y Y N N
N1SEI N N Y N N N N
N1FAN N Y Y Y Y N N
R1FAN N N N N N Y Y
N1FANA Y N Y N N N N
N1FANB N N Y N N N N
TN11CMR2 Y Y Y Y N Y Y
TN11CMR4 Y Y Y Y N Y Y
TN11MR2 Y Y Y Y N Y Y
TN11MR4 Y Y Y Y N Y Y
N1MR2A Y Y Y Y N Y Y
N1MR2B N N N Y N Y Y
N1MR2C Y Y Y Y N N Y
N1LWX Y Y Y Y N Y Y
N1IFSD1 Y Y Y Y N Y Y
N1RPWR Y Y Y Y N Y Y
TN11OBU1 Y Y Y Y Y Y Y
N1FIB Y Y Y Y Y Y Y


7500 3500 3500 II 2500 2500 1500A 1500B
REG
N1BA2 Y Y Y Y Y Y Y
N1BPA Y Y Y Y Y Y Y
N2BPA Y Y Y Y Y Y Y
61COA Y Y Y Y Y Y Y
62COA Y Y Y Y Y Y Y
N1COA Y Y Y Y Y Y Y
N1RPC01 Y Y Y Y N Y Y
N1RPC02 Y Y Y Y N Y Y
N1DCU Y Y Y N Y N N
N2DCU Y Y Y N Y N N
UPM N N Y Y Y Y Y
(GIE4805S)
UPM Y Y Y Y Y Y Y
(EPS75-4815A
F)
T1PIU Y N N N N N N
N1PIU N Y N N N N N
N1PIUA N Y N N N N N
Q1PIU N N N Y Y N N
Q1PIUA N N N Y N N N
Q2PIU N N Y N N N N
R1PIU N N N N N N Y
R1PIUA N N N N N Y N
R1PIUB N N N N N N Y
R1PIUC N N N N N Y N
NOTE
"Y" indicates that the OptiX OSN equipment supports the board and "N" indicates that the OptiX OSN
equipment does not support the board.
This table provides information on whether a specific type of board is supported by a specific type of OptiX
OSN equipment. For example, the N3GSCC is supported by the OptiX OSN 7500 and OptiX OSN 3500
but not supported by the other equipment such as the OptiX OSN 3500 II.

21.2 Quick Reference Table for Optical Interfaces

This topic lists the common parameters specified for the interfaces of boards.
21.3 Quick Reference of Board Functions

This topic describes the functions supported by SDH boards, PDH boards, data boards, and
packet boards.
21.3.1 Information Quick Reference of SDH Boards
This topic describes the functions supported by different types of SDH boards.
21.3.2 Information Quick Reference of PDH Boards
This topic describes the functions supported by different types of PDH boards.
21.3.3 Information Quick Reference of Data Boards
This topic describes the functions supported by different types of data boards.
21.3.1 Information Quick Reference of SDH Boards

This topic describes the functions supported by different types of SDH boards.
Table 21-2 provides the functions supported by SDH boards.
Table 21-2 Basic functions of SDH boards
Func ALS REG PRBS AU-3 TCM FEC Fixed Color Tuna
tion Speci Wave ed ble
ficati lengt Wave Wave
ons h lengt lengt
h h
N1SL Y Y N N N N Y Y N
64
N2SL Y Y N Y Y N Y Y N
64
N4SL Y N N N N N Y Y N
64
T2SL Y Y N Y Y N Y Y N
64
T2SL Y Y N Y Y N Y Y N
64A
N1SF Y Y N N N Y Y Y N
64
64

ons h lengt lengt
h h
N1SF Y Y N N N Y Y Y Y
64A
D64
N1SL Y N N N N N N N N
D64
D64
16
N2SL Y Y N Y Y N N Y N
16
N3SL Y Y Y N Y N Y Y N
16
16A
N2SL Y Y N Y Y N N N N
16A
N3SL Y Y Y N Y N N N N
16A
D16
N1SL Y N N N N N N Y N
Q16
N2SL Y N N Y Y N N Y N
Q16
Q16
O16
O16
N1SF Y N N N N Y Y Y N
16

ons h lengt lengt
h h
Q41
H41
4
N2SL Y N N Y Y N N N N
4
R1SL Y N N N N N N N N
4
R3SL Y N Y N N N N N N
4
4A
Q4
Q4
Q4A
D4
D4
D4
R3SL Y N Y N Y N N N N
D4
D4A
N1SL Y N Y N N N N N N
T1
Q1

ons h lengt lengt
h h
Q1
Q1
Q1A
Q1
1
1
1A
1
1
H1
N1SE Y N N N N N N N N
P1
O1
N3SL Y N Y N N N N N N
O1
Q2C Y N N N N N N N N
XL1a
XL1a
XL4a
XL4a

ons h lengt lengt
h h
Q2C Y N N N N N N Y N
XL16
a
Q3C Y N N N N N N Y N
XL16
a
R1C Y N N N N N N Yb N
XLL
Na
R2C Y N N N N N N Yb N
XLL
Na
Q5C Y N N N N N N Yb N
XLL
Na
XLL
Na
R1C Y N N N N N N N N
XLD
41a
XLQ
41a
XLQ
41a
XLQ
41a
XLQ
41a
NOTE
l a: the system control, cross-connect, and line board with the SDH processing unit.
l b: The interface supports the colored wavelength function only when it is equipped with an STM-16
optical module.

21.3.2 Information Quick Reference of PDH Boards

This topic describes the functions supported by different types of PDH boards.
Table 21-3 provides the functions supported by PDH boards.
Table 21-3 Basic functions of PDH boards
Function PRBS TPS E13 M13
R1PL1 Y N N N
R1PD1 Y Y N N
R2PD1 Y Y Y N
R3PD1 Y Y YNote N
N1PQ1 Y Y N N
N2PQ1 Y Y Y N
N1PQM Y Y N N
N1PL3 N Y N N
N2PL3 Y Y Y Y
N1PL3A N N N N
N2PL3A Y N Y Y
N1PD3 Y Y N N
N2PD3 Y Y Y Y
N2PQ3 Y Y Y Y
N1DX1 Y Y N N
N1DXA N N N N
N1SPQ4 N Y N N
N2SPQ4 N Y N N
NOTE
The R3PD1 supports the E13 function only in server mode.
21.3.3 Information Quick Reference of Data Boards

This topic describes the functions supported by different types of data boards.
Table 21-4 provides the functions supported by data boards.

Table 21-4 Basic functions of data boards

Fun EPL EV EPL EV MP Qo ET ET Tes Qin RM IG
ctio PL AN PL LS S H- H- t Q ON MP
n AN OA OA Fra Sno
M M mes opi
(802 (802 ng
. .
1ag 3ah
) )
R1E Y N N N N N N N Y N Y N
FT4
N1E Y N N N N N N N Y N Y N
FT8
N2E Y N N N N N Y Y Y N Y N
FT8
FT8
A
N2E Y N N N N N Y Y Y N Y N
FT8
A
GT2
GT2
N1E Y Y Y N Y Y N N Y N Y Y
FS0
FS0
N4E Y Y Y N Y Y Y Y Y N Y Y
FS0
FS0
FS0
A
FS4
FS4

Fun EPL EV EPL EV MP Qo ET ET Tes Qin RM IG

ctio PL AN PL LS S H- H- t Q ON MP
n AN OA OA Fra Sno
M M mes opi
(802 (802 ng
. .
1ag 3ah
) )
FS4
GS2
GS2
N1E Y Y Y Y N Y Y Y Y Y Y Y
MS
4
MS
2
GS4
GS4
GS4
N2E N Y N Y Y Y N N Y N N Y
GR
2
N2E N Y N Y Y Y N N Y N N Y
MR
0
N1E Y Y Y Y N Y Y N Y Y Y Y
AS2
GS
H
FP0
NOTE
For the ETH-OAM functions supported by data boards, see "Availability" in the Feature Description.

21.4 Loopback Capability of the Boards

The SDH boards, PDH boards, and data boards of the OptiX OSN equipment support various
types of loopbacks.
Table 21-5 provides the loopback capability of the SDH boards of the OptiX OSN equipment.
Table 21-5 Loopback capability of the SDH boards

Board Inloop at an Outloop at Inloop on a Outloop on Outloop on
Interface an VC-4 Path a VC-4 Path a VC-3 or
Interface VC-12 Path
Q2SL1 Supported Supported Supported Not Not

supported supported

supported supported

supported supported
N1SL64 Supported Supported Supported Supported Not

supported
N2SL64 Supported Supported Not Not Not

supported supported supported

supported
T2SL64 Supported Supported Not Not Not

T2SL64A Supported Supported Not Not Not

N1SF64 Supported Supported Supported Supported Not

supported
N4SF64 Supported Supported Supported Supported Not

supported
N1SF64A Supported Supported Supported Supported Not

supported
N4SFD64 Supported Supported Supported Supported Not

supported
N1SLD64 Supported Supported Supported Supported Not

supported

supported


N1SL16 Supported Supported Supported Not Not

supported supported


supported
N1SL16A Supported Supported Supported Not Not

supported supported
N2SL16A Supported Supported Not Not Not

N3SL16A Supported Supported Supported Supported Not

supported

supported
N1SLQ16 Supported Supported Supported Supported Not

supported
N2SLQ16 Supported Supported Not Not Not


supported
N1SLO16 Supported Supported Supported Supported Not

supported

supported
N1SF16 Supported Supported Supported Not Not

supported supported

supported
N3SLH41 Supported Supported Supported Supported Not

supported

supported supported

supported



R1SL4 Supported Supported Supported Not Not

supported supported
R3SL4 Supported Supported Supported Supported Not

supported
N1SLQ4 Supported Supported Supported Not Not

supported supported
N1SLQ4A Supported Supported Supported Supported Not

supported

N1SLD4 Supported Supported Supported Not Not

supported supported
N1SL4DA Supported Supported Supported Supported Not

supported
N2SLD4 Supported Supported Not Not Not

R1SLD4 Supported Supported Supported Not Not

supported supported
R3SLD4 Supported Supported Supported Supported Not

supported
N1SLT1 Supported Supported Supported Supported Not

supported
N1SLQ1 Supported Supported Supported Not Not

supported supported
N1SLQ1A Supported Supported Supported Supported Not

supported

R1SLQ1 Supported Supported Supported Not Not

supported supported
R3SLQ1 Supported Supported Supported Supported Not

supported

supported supported

supported



R1SL1 Supported Supported Supported Not Not

supported supported
R3SL1 Supported Supported Supported Supported Not

supported
N1SLH1 Supported Supported Supported Supported Not

supported
N1SEP1 Supported Supported Supported Not Not

supported supported
N2SLO1 Supported Supported Not Not Not


supported
Table 21-6 provides information on whether each SDH board of the OptiX OSN equipment
supports the insertion of the AU_AIS when the board is looped back.
Table 21-6 Information on whether each SDH board of the OptiX OSN equipment supports the
insertion of the AU_AIS when the board is looped back
Board Insertion of Insertion of Insertion of Insertion of

the AU_AIS the AU_AIS to the AU_AIS the AU_AIS
to the Port the Cross- to the Cross- to the Port
Side (Inloop Connect Side Connect Side Side
at an (Outloop at an (Inloop on a (Outloop on
Interface) Interface) VC-4 Path) a VC-4 Path)
Q2SL1 Not supported Supported Not supported Not supported
N1SL64 Supported Supported Supported Supported
N2SL64 Not supported Supported Not supported Not supported
T2SL64 Not supported Supported Not supported Not supported
T2SL64A Not supported Supported Not supported Not supported
N1SF64 Supported Supported Supported Supported


N4SF64 Supported Supported Supported Supported
N1SF64A Supported Supported Supported Supported
N4SFD64 Supported Supported Supported Supported
N1SLD64 Supported Supported Supported Supported
N1SL16A Not supported Supported Not supported Not supported
N2SL16A Not supported Supported Not supported Not supported
N3SL16A Supported Supported Supported Supported
N1SLQ16 Supported Supported Supported Supported
N2SLQ16 Not supported Supported Not supported Not supported
N1SLO16 Supported Supported Supported Supported
N1SF16 Not supported Supported Not supported Not supported
N3SLQ41 Supported Supported Supported Supported
N3SLH41 Supported Supported Supported Supported
R1SL4 Not supported Supported Not supported Not supported
R3SL4 Supported Supported Supported Supported
N1SLQ4A Supported Supported Supported Supported


N1SLD4 Not supported Supported Not supported Not supported
N1SLD4A Supported Supported Supported Supported
N2SLD4 Not supported Supported Not supported Not supported
R3SLD4 Supported Supported Supported Supported
R1SLD4 Not supported Supported Not supported Not supported
N1SLT1 Supported Supported Supported Supported
N1SLQ1A Supported Supported Supported Supported
R1SLQ1 Not supported Supported Not supported Not supported
R3SLQ1 Supported Supported Supported Supported
R1SL1 Not supported Supported Not supported Not supported
R3SL1 Supported Supported Supported Supported
N1SLH1 Supported Supported Supported Supported
N1SEP1 Not supported Supported Not supported Not supported
N2SLO1 Not supported Supported Not supported Not supported
N3SLO1 Supported Supported Supported Supported
Table 21-7 provides the loopback capability of the PDH boards of the OptiX OSN equipment.
Table 21-7 Loopback capability of the PDH boards
Board Inloop at an Outloop at an

Interface Interface
R1PL1 Supported Supported

Board Inloop at an Outloop at an

Interface Interface
R1PD1 Supported Supported
R3PD1 Supported Supported
N1PQ1 Supported Supported
N1PQM Supported Supported
N1PD3 Supported Supported
N1PL3 Supported Supported
N2PQ3 Supported Supported
N2SPQ4 Supported Supported
Table 21-8 provides the loopback capability of the data boards of the OptiX OSN equipment.
Table 21-8 Loopback capability of the data boards of the OptiX OSN equipment
Board Outloop Inloop at Outloop Inloop at Inloop Inloop
at the the MAC at the the PHY and and
MAC Layer PHY Layer Outloop Outloop
Layer Layer on a on a VC-3
VC-4 Path
Path
N1EFS4 Not Supported Not Supported Not Supported


N3EFS4 Not Supported Not Supported Not Not

supported supported supported supported



N5EFS0 Not Supported Not Supported Not Not

N1EFS0A Not Supported Not Supported Not Not



VC-4 Path
Path
N1EGT2 Not Supported Not Supported Not Not

N2EGT2 Not Supported Not Supported Not Not

N1EFT8 supported Supported Not Supported Not Supported

supported supported
N2EFT8 Not Supported Not Supported Not Supported

N1EFT8A Not Supported Not Supported Not Supported

N2EFT8A Not Supported Not Supported Not Supported

R1EFT4 Not Supported Not Supported Not Supported

N1EMS4 Not Not Not Supported Not Not

supported supported supported supported supported
N1EMS2 Not Supported Not Supported Not Not

N1EGS4 Not Not Not Supported Not Not




N2EGS2 Not Not Not Supported Not Supported

N3EGS2 Not Supported Not Supported Not Not

N2EGR2 Not Supported Not Supported Not Not

N1EAS2 Not Supported Not Supported Not Not



VC-4 Path
Path
N2EMR0 Not Supported Not Supported Not Not

N1MST4 Not Not Not Supported Not Not

N1EFP0 Not Supported Not Supported Not Not

N1EGSH Not Supported Not Supported Not Not

Table 21-9 provides the loopback capability of the ATM/IMA boards of the OptiX OSN
equipment.
Table 21-9 Loopback capability of the ATM/IMA boards of the OptiX OSN equipment
Board Outloop at an Inloop at an Outloop at an Inloop at an
External External Internal Internal
Interface Interface Interface Interface
N1ADL4 Not supported Supported Supported Supported
N1ADQ1 Not supported Supported Supported Supported
N1IDL4 Not supported Supported Supported Supported
N1IDL4A Not supported Supported Supported Supported
N1IDQ1 Not supported Supported Supported Supported
N1IDQ1A Not supported Supported Supported Supported
21.5 Protection Schemes Supported by Each Board

The SDH boards, PDH boards, data boards, microwave boards, and packet boards of the OptiX
OSN equipment support various protection schemes.
Table 21-10 lists the protection schemes that the SDH boards of the OptiX OSN equipment
support.

Table 21-10 Protection schemes that the SDH boards of the OptiX OSN equipment support
Board Protection Scheme
Two- Four- Linear SNCP SNCT SNC MS TPS

Fiber Fiber MSP P MP P Prote
Ring Ring and ction
MSP MSP SN
CP
Fibe
r-
Sha
red
Prot
ecti
on
N1SL64 √ √ √ √ √ √ √ x
N2SL64 √ √ √ √ √ √ √ x
N4SL64 √ √ √ √ √ √ √ x
T2SL64 √ √ √ √ √ √ √ x
T2SL64A √ √ √ √ √ √ √ x
N4SF64 √ √ √ √ √ √ √ x
N1SF64 √ √ √ √ √ √ √ x
A
N4SFD6 √ √ √ √ √ √ √ x
4
N1SLD6 √ √ √ √ √ √ √ x
4
N4SLD6 √ √ √ √ √ √ √ x
4
N1SL16 √ √ √ √ √ √ √ x
N2SL16 √ √ √ √ √ √ √ x
N3SL16 √ √ √ √ √ √ √ x
N1SL16 √ √ √ √ √ √ √ x
A
N2SL16 √ √ √ √ √ √ √ x
A
N3SL16 √ √ √ √ √ √ √ x
A
N1SLD1 √ √ √ √ √ √ √ x
6


Ring Ring and ction
MSP MSP SN
CP
Fibe
r-
Sha
red
Prot
ecti
on
N1SLQ1 √ √ √ √ √ √ √ x
6
N4SLQ1 √ √ √ √ √ √ x x
6
N1SLO1 √ √ √ √ √ √ √ x
6
N4SLO1 √ √ √ √ √ √ x x
6
N1SF16 √ √ √ √ √ √ √ x
N3SLQ4 √ √ √ √ √ √ √ x
1
N3SLH4 √ √ √ √ √ √ √ x
1
N1SL4 √ √ √ √ √ √ √ x
N2SL4 √ √ √ √ √ √ √ x
N1SL4A √ √ √ √ √ √ √ x
R1SL4 √ √ √ √ √ √ √ x
R3SL4 √ √ √ √ √ √ √ x
N1SLQ4 √ √ √ √ √ √ √ x
N2SLQ4 √ √ √ √ √ √ √ x
N1SLQ4 √ √ √ √ √ √ √ x
A
N1SLD4 √ √ √ √ √ √ √ x
N2SLD4 √ √ √ √ √ √ √ x
N1SLD4 √ √ √ √ √ √ √ x
A


Ring Ring and ction
MSP MSP SN
CP
Fibe
r-
Sha
red
Prot
ecti
on
R1SLD4 √ √ √ √ √ √ √ x
R3SLD4 √ √ √ √ √ √ √ x
N1SLT1 √ √ √ √ √ √ x x
N1SLQ1 √ √ √ √ √ √ x x
N2SLQ1 √ √ √ √ √ √ x x
N1SLQ1 √ √ √ √ √ √ x x
A
R1SLQ1 √ √ √ √ √ √ x x
R3SLQ1 √ √ √ √ √ √ x x
N1SL1 √ √ √ √ √ √ x x
N2SL1 √ √ √ √ √ √ x x
N1SL1A √ √ √ √ √ √ x x
R1SL1 √ √ √ √ √ √ x x
R3SL1 √ √ √ √ √ √ x x
N1SLH1 √ √ √ √ √ √ x √
N1SEP1 √ √ √ √ √ √ x √
N2SLO1 √ √ √ √ √ √ x x
N3SLO1 √ √ √ √ √ √ x x
Note: "√" means that the board supports the protection scheme and "x" means that the board
does not support the protection scheme.
Table 21-11 lists the protection schemes that the PDH boards of the OptiX OSN equipment
support.

Table 21-11 Protection schemes that the PDH boards of the OptiX OSN equipment support
TPS TPS TPS TPS TPS

Protection Protection Protection Protection Protection
for the E1 for the E1/ for the E3/ for the E4/ for the DDN
Services T1 Services T3 Services STM-1 Services
Services
R1PL1 √ x x x x
R1PD1 √ x x x x
R3PD1 √ x x x x
N1PQ1 √ x x x x
N1PQM √ √ x x x
N1PL3 x x √ x x
N2PL3 x x √ x x
N1PL3A x x x x x
N2PL3A x x x x x
N1PD3 x x √ x x
N2PD3 x x √ x x
N2PQ3 x x √ x x
N1DX1 x x x x √
N1DXA x x x x √
N2SPQ4 x x x √ x
Table 21-12 lists the protection schemes that the data boards of the OptiX OSN equipment
support.

Table 21-12 Protection schemes that the data boards of the OptiX OSN equipment support
LC STP MS Dat T B P L D L R MSP, ATM

AS / TP a PS P P A L P P SNCP Prote
RST DNI S S G A T R , ction
P Prot G SNC
ecti MP,
on and
SNC
TP
R1EFT √ x x x x x x x x √ x x x
4
N1EF √ x x x x x x x x √ x x x
T8
N1EG √ x x x x x x x x √ x √ x
T2
N2EG √ x x x x x x x x √ x √ x
T2
N2EFS √ √ x x √ x x x x √ x x x
0
0
0
0A
N1EFS √ √ x x x x x x x √ x x x
4
4
4
N2EG √ √ x x x x x x x √ x √ x
S2
N3EG √ √ x x x √ x x x √ x √ x
S2
N1EM √ √ √ x x √ √ x x √ x √ x
S4
N1EM √ √ x x x x x x x √ x √ x
S2

LC STP MS Dat T B P L D L R MSP, ATM

AS / TP a PS P P A L P P SNCP Prote
RST DNI S S G A T R , ction
P Prot G SNC
ecti MP,
on and
SNC
TP
N3EG √ √ x x x √ √ x x √ x √ x
S4
N4EG √ √ x √ x √ √ x x √ x √ x
S4
N2EG √ x x x x x x x x x √ √ x
R2
N2EM √ x x x x x x x x x √ √ x
R0
N1EA √ √ x x x x x x x √ x √ x
S2
N1EFP √ √ x x x x x √ √ √ x x x
0
N1EG √ √ √ x x x x √ √ √ x x x
SH
N1AD x x x x x x x x x x x x √
L4
N1AD x x x x x x x x x x x x √
Q1
N1IDL x x x x x x x x x x x x √
4
N1ID x x x x x x x x x x x x √
Q1
N1MS x x x x x x x x x x x x x
T4
Table 21-13 lists the protection schemes that the microwave boards of the OptiX OSN equipment
support.

Table 21-13 Protection schemes that the microwave boards of the OptiX OSN equipment
support
Board Protection schemes
1+1 HSB/FD/SD N+1 Protection

Protection
N1IFSD1 √ √
N1RPWR x x
21.6 Power Consumption and Weight of Each Board

This section lists the power consumption and weight of each board of the OptiX OSN series
equipment.
Table 21-14 lists the power consumption and weight of each board.
Table 21-14 Power consumption and weight of each board

Board Power Weight Board Power Weight
Consumption (kg) Consumption (kg)
(W) (W)
SDH boards
N1SLQ41 12 0.6 N1SLD4 17 0.6
N1SF64A 33(the OptiX 1.1 N2SLD4 15 1.0

OSN 3500/3500
II supports)
26(the OptiX
OSN 7500
supports)
N1SF64 33(the OptiX 1.1 R1SLD4 11 0.5

OSN 3500/3500
II/2500 REG
supports)
26(the OptiX
OSN 7500
supports)
N1SLD64 41 1.2 R3SLD4 11 0.5
N1SL64A 40 1.1 N1SL4A 17 0.6


(W) (W)
N1SL64 30(the OptiX 1.1 N1SL4 17 0.6

OSN 3500/3500
II/2500 REG
supports)
22(the OptiX
OSN 7500
supports)
N2SL64 32 1.1 N2SL4 15 1.0
T2SL64 40 1.1 R1SL4 10 0.5
N1SF16 26 1.1 R3SL4 11 0.5
N1SLO16 38 1.0 N1SEP1 17 1.0
N1SLQ16 20 0.9 N1SLH1 27 1.0
N2SLQ16 35 1.3 N1SLT1 22 1.3
N1SLD16 23 0.9 N2SLO1 26 1.1
N1SL16A 20 0.6 N3SLO1 20 1.2
N2SL16A 20 1.1 N1SLQ1A 15 1.0
N3SL16A 22 0.9 N1SLQ1 15 1.0
N1SL16 19 1.1 N2SLQ1 15 1.0
N2SL16 19 1.1 R1SLQ1 12 0.4
N3SL16 22 1.1 N1SL1A 17 0.6
N1SLQ4A 17 1.0 N1SL1 17 0.6
N1SLQ4 17 1.0 N2SL1 14 1.0
N2SLQ4 16 1.0 R1SL1 10 0.3
N1SLD4A 17 0.6 R3SL1 11 0.3
T2SL64A 40 1.1 N3SLQ41 16 0.7
N1EU08 11 0.4 N1EU04 6 0.4
N1OU08 6 0.4 N2OU08 6 0.4
N4SLD64 20 1.2 N4SFD64 37 1.1


(W) (W)
N4SLO16 21 1.0 N4SL64 15(the OptiX 1.1

OSN 3500/3500
II supports)
14(the OptiX
OSN 7500
supports)
N4SLQ16 12 0.7 N4SF64 26(the OptiX 1.2

OSN 3500/3500
II supports)
25(the OptiX
OSN 7500
supports)
N3SLH41 49 1.5 - - -
R3SL1 11 0.2 R3SL4 11 0.6
R3SLD4 11 0.2 R3SLQ1 12 0.2
PDH boards
N1SPQ4 24 0.9 N2PL3 12 0.9
N2SPQ4 24 0.9 N1PQM 22 1.0
N1DXA 10 0.8 N1PQ1 19 1.0
N1DX1 15 1.0 N2PQ1 13 1.0
N1PQ3 13 0.9 R1PD1 15 0.6
N1PD3 19 1.1 R2PD1 15 0.6
N2PD3 12 1.1 R3PD1 8 0.4
N1PL3A 15 1.0 N1PL1 7 0.5
N2PL3A 12 0.9 R1PL1 7 0.5
N1PL3 15 1.0 N2PQ3 13 0.9
N1DM12 0 0.4 N1TSB8 0 0.3
N1TSB4 3 0.3 N1MU04 2 0.4
N1C34S 0 0.3 R1L12S 5 0.3
N1D34S 0 0.4 N1D12B 0 0.3
N1D75S 0 0.4 N1L75S 3 0.3
N1D12S 0 0.4 - - -
R3PD1 8 0.4 - - -


(W) (W)
Data boards
N1MST4 26 0.9 N2EFS4 30 1.0
N1IDQ1 41 1.0 N3EFS4 18 0.6
N1IDL4 41 1.0 N1EFS0A 32 0.7
N1ADQ1 41 1.0 N1EFS0 35 1.0
N1ADL4 41 0.9 N2EFS0 35 1.0
N1EAS2 70 1.2 N4EFS0 35 1.0
N1EMR0 47 1.2 N5EFS0 22 0.6
N2EGR2 40 1.1 N1EGT2 29 0.9
N1EGS4A 53 1.1 N2EGT2 15 0.9
N1EGS4 70 1.1 N1EFT8A 26 1.0
N3EGS4 70 1.1 N1EFT8 26 1.0
N4EGS4 34 0.7 N1EFT4 14 0.5
N1EMS4 65 1.1 N1EFT8 26 1.0
N1EMS2 40 0.8 N1EFT4 14 0.5
N2EGS2 43 1.0 R1EFT4 14 0.5
N3EGS2 25 0.6 N2EMR0 50 1.2
N1EFS4 30 1.0 N1ETF8A 11 0.4
N1ETS8 0 0.4 N1EFF8A 15 0.4
N1IDQ1A 60 1.5 - - -
N1EFP0 22 0.6 N2EFT8A 26 1.0
N1EGSH 85 1.2 N2EFT8 26 1.0
N1EFF8 6 0.4 N1ETF8 2 0.4
N1IDL4A 46 1.5 - - -
R1PEFS8 12 0.3 N1PETF8 8 0.4
Q1PEGS2 9 0.6 N1PEG16 137 2.3
R1PEGS1 8 0.4 N1PEX1 107 2.4
Microwave boards
N1IFSD1 24 1.1 N1RPWR 45 1.4


(W) (W)
WDM boards
N1FIB 0 0.4 N1MR2B 0 1.0
N1MR2A 0 1.0 N1MR2 0 0.9
N1LWX 30 1.1 N1CMR4 0 0.9
N1MR4 0 0.9 N1CMR2 0 0.8
N1MR2C 0 1.0 - - -
Cross-Connect and system control boards
N1CRG 12 0.9 T1EXCSA 53 1.9
N1XCE 25 1.5 N1EXCSA 62 2.0
N1IXCSB 94 0.8 T1GXCSA 41 1.8
T1IXCSA 140 2.4 N1GXCSA 27 1.8
N1IXCSA 94 2.1 R1CXLQ4 48 1.0

1
N1SXCSB 63 1.8 Q6CXLQ4 48 1.5

1
T1SXCSA 96 2.2 R1CXLD4 48 1.0

1
N1SXCSA 63 2.0 R1CXLLN 48 1.0
N1UXCSB 65 2.0 Q6CXLLN 48 1.5
T1UXCSA 69 2.1 Q2CXL16 40 1.1

T2UXCSA
N1UXCSA 65 2.0 Q3CXL16 46 1.2
Q2CXL1 40 1.1 Q2CXL4 40 1.1
Q3CXL1 46 1.1 Q3CXL4 46 1.2
N4GSCC 19 1.0 - - -
R2CXLLN 28 1.0 Q5CXLLN 32 1.0

R2CXLQ4 Q5CXLQ4
1 1
N1FXCSA 107 1.6 - - -
N2PSXCS 80 1.2 - - -
A


(W) (W)
N1GSCC 10 0.9 N2GSCC 20 0.9
N3GSCC 20 0.9 - - -
T1PSXCS 95 1.4 - - -
A
Auxiliary boards
N1FANA 19 1.2 R1AMU 8 0.5
XE1FAN 16 1.5 R1AUX 19 1.0
XE3FAN 10 1.2 R2AUX 19 1.0
R1FAN 20 0.8 Q1AUX 10 0.5
Q1SEI 10 0.9 N1AUX 19 1.0
N1SEI 1 0.9 T1AUX 3 0.4
Q1SAP 20 0.7 T1EOW 13 0.5
Q2SAP 25 1.0 R1EOW 10 0.4
Optical amplifier boards and dispersion compensation boards
N1DCU 0 0.4 62COA 75 8.0
N2DCU 0 0.4 N1COA 10 3.5
N1RPC02 110 4.2 N1BPA 20 1.0
N1RPC01 70 4.0 N2BPA 11 1.2
61COA 10 3.5 N1BA2 20 1.0
TN11OBU 16 1.3 TN11OBU 18 1.3

101 102
Power interface boards
R1PIUA 2 0.5 N1PIU 8 1.2
R1PIUB 4 0.4 Q2PIU 2 0.3
R1PIUC 5 0.5 Q1PIU 8 1.3
N1PIUA 3 0.5 R1PIU 2 0.4
T1PIU 8 1.3 UPM - 15
N1PIUB 6 0.6 - - -
T1PIUB 6 0.5 - - -

Hardware Description 22 Parameter Settings
22 Parameter Settings
About This Chapter
You can set the parameters for the SDH boards, PDH boards, data boards, WDM boards, optical
amplifier boards, and cross-connect and timing unit by using the U2000.
22.1 Data Boards

The data boards include EoS/EoP boards, ATM boards, RPR boards, and SAN boards. The
parameters that need to be set for the data boards include the SDH parameters, Ethernet
parameters, and ATM parameters.
22.2 SDH Processing Boards
The parameters that need to be set for the SDH processing boards include the J0 byte, J1 byte,
J2 byte, and C2 byte.
22.3 PDH Boards
The parameters that need to be set for the PDH boards include the J1 byte, C2 byte, J2 byte, V5
byte, and tributary loopback.
22.4 WDM Boards
The parameters that need to be set for the WDM boards include the path use status, optical
interface loopback, service type, client service bearer rate (M), laser status, automatic laser
shutdown, current bearer rate (M), actual wavelength no./wavelength (nm)/frequency (THz),
actual band type, configure wavelength no./wavelength (nm)/frequency (THz), configure band
type, and SD trigger condition.
22.5 Cross-Connect and Timing Units
The parameters that need to be set for the cross-connect and timing units include the clock source
parameters and clock subnet parameters.
22.6 Optical Amplifier Boards
The parameters that need to be set for the optical amplifier boards include the laser status, board
work type, configure band, configure working band parity, actual band, actual working band
parity, threshold of input power loss, gain, rated optical power, nominal gain upper threshold,
and nominal gain lower threshold.

22 Parameter Settings Hardware Description
22.1 Data Boards

The data boards include EoS/EoP boards, ATM boards, RPR boards, and SAN boards. The
parameters that need to be set for the data boards include the SDH parameters, Ethernet
parameters, and ATM parameters.
22.1.1 SDH Parameters

The SDH parameters that need to be set for the data boards include the J1 byte, C2 byte, J2 byte,
and V5 byte.
22.1.2 Ethernet Parameters
The Ethernet parameters that need to be set for the data boards include the working mode and
Maximum Frame Length.
22.1.3 ATM Parameters
The ATM parameters that need to be set for the ATM boards include the port type and traffic
type.
22.1.1 SDH Parameters

The SDH parameters that need to be set for the data boards include the J1 byte, C2 byte, J2 byte,
and V5 byte.
J1 Byte
J1 is the path trace byte. Successive transmission of the J1 byte at the transmit end helps the
receive end learn that its connection with the specified transmit end is in the continuous
connection state.
When a J1 mismatch is detected at the receive end, the VC-3 path generates an LP_TIM_VC3
alarm and the VC-4 path generates an HP_TIM alarm.
When the J1 byte is set to the single-byte "□" by default, the alarms are not reported.
NOTE
l In the case of the N1EFS4 and MST4, the J1 byte is set to " HuaWei SBS " by default. In the case
of the other boards, the J1 byte is set to the single-byte "□" by default.
l In the case of the EMS4 and EGS4, it is recommended that you set the J1 byte to " HuaWei SBS ".
C2 Byte
C2 is the signal label byte, which is used to indicate the multiplexing structure of the VC frames
and the payload property. The C2 byte to be sent must match the C2 byte to be received.
When a C2 mismatch is detected, the VC-3 path generates an LP_SLM_VC3 alarm and the
VC-4 path generates an HP_SLM alarm.
J2 Byte
J2 is the VC-12 path trace byte. This byte is used to transmit repetitively a low order path access
point identifier so that a path receiving terminal can verify its continued connection to the
intended transmitter.
When a J2 mismatch is detected, the VC-12 path generates an LP_TIM_VC12 alarm.

When the J2 byte is set to the single-byte "□" by default, the alarms are not reported.
V5 Byte
V5 is the path status and signal label byte. This byte is used to detect bit errors and indicate
remote errors or remote failures on lower order paths. The LP_REI and LP_RFI alarms are
generated accordingly.
When a V5 mismatch is detected at the receive end, the VC-12 path generates an LP_SLM_VC12
alarm.
Table 22-1 shows the relation between the service type and the value of the V5 byte.
Table 22-1 Relation between the service type and the value of the V5 byte
Service Type Value of the V5 Byte (Hexadecimal)
Asynchronous 02
Byte synchronization 04
HDLC/PPP mapping 0A
Unequipped or supervisory- 00
unequipped
22.1.2 Ethernet Parameters

The Ethernet parameters that need to be set for the data boards include the working mode and
Maximum Frame Length.
22.1.2.1 Basic Attributes

This topic describes the parameters, such as the port attribute, port enabling status, and maximum
frame length, for configuring the basic attributes of an Ethernet port.
22.1.2.2 Flow Control
This topic describes the parameters, such as autonegotiation and non-autonegotiation, which are
used for configuring flow control function of an Ethernet port.
22.1.2.3 Network Attributes
This topic describes the parameters, such as port attribute and P port encapsulation format, which
are used for configuring network attributes of an Ethernet port.
22.1.2.4 Advanced Attributes
This topic describes the parameters, such as the loop detection, loop port shutdown, and traffic
threshold (Mbit/s), which are used for configuring the advanced attributes of an Ethernet port.
22.1.2.5 TAG Attributes
Tag attributes are important attributes for configuring Ethernet services, including the
parameters such as the default VLAN ID, VLAN priority, ingress detection setting, and tag ID.
22.1.2.6 Encapsulation/Mapping
The equipment supports the setting of encapsulation and mapping protocols for Ethernet packets,
including the parameters such as mapping protocol, scrambling code, and CRC or not.

22.1.2.7 Bound Paths

This topic describes the parameters, such as available resources, available timeslots, and service
direction, which are used for binding a path with an Ethernet port.
22.1.2.1 Basic Attributes

This topic describes the parameters, such as the port attribute, port enabling status, and maximum
frame length, for configuring the basic attributes of an Ethernet port.
Table 22-2 lists the parameters for configuring the basic attributes of an Ethernet port.
Table 22-2 Parameters for configuring the basic attributes of an Ethernet port
Field Value Range Description
Port PORTn Displays all the available ports

on an Ethernet port. The letter
n indicates the number of the
PORT port.
Name For example, PORT-1 Specifies the name of a PORT

port. The name can contain up
to 32 characters in English or
16 characters in Chinese.
Enabled, Disabled Disabled, Enabled "Enabled" indicates that this

Default value: Disabled port is used and services are
available. "Disabled" indicates
that the services on this port are
not processed. Hence, when
configuring a service, you need
to enable the port to be used.
Working Mode Auto-Negotiation, 10M Half- Specifies the working mode of

Duplex, 10M Full-Duplex, the Ethernet port on a board.
100M Half-Duplex, 100M This parameter determines the
Full-Duplex, 1000M Half- maximum transmission rate
Duplex, 1000M Full-Duplex, and communication mode of
10GE Full-Duplex LAN, the Ethernet port.
10GE Full-Duplex WAN When setting this parameter,
you must ensure the working
modes of the interconnected
ports are the same. Otherwise,
the services are not available.
Max. Frame Length The value ranges of the The Max. Frame Length
parameters are different from (Ethernet Port Attribute)
each other for different boards parameter specifies the
and products. You can click maximum frame length that is
the hyperlink in the supported at an Ethernet port.
description to display the Click Max. Frame Length
specific information. (Ethernet Port Attribute) for
more information.

Port physical parameters You can query the reported Displays the actual working
value to obtain the relevant state of an MAC port.
information.
MAC Loopback The value ranges of the The MAC Loopback

each other for different boards parameter specifies the MAC
and products. You can click loopback state at an Ethernet
the hyperlink in the port. Port loopback setting is
description to display the applied to locating faults only.
specific information. Click MAC Loopback
(Ethernet Port Attribute) for
more information.
PHY Loopback The value ranges of the The PHY Loopback

each other for different boards parameter specifies the PHY
and products. You can click loopback state at an Ethernet
the hyperlink in the port. Port loopback setting is
description to display the applied to locating faults only.
specific information. Click PHY Loopback
(Ethernet Port Attribute) for
more information.
QinQ Type Area 0x600-0xFFFF The QinQ Type Area

0x8100 parameter indicates the VLAN
protocol used by the packet
that is transmitted by QinQ.
Click QinQ Type Area for
more information.
Port Status For example, Disabled Displays the status of an IP

port.
Physical Type You can query the reported Displays the actual type of a
value to obtain the relevant port.
information.
Logic Type SDH-OPPORT, SDH-EPORT Displays the logic type of port.
22.1.2.2 Flow Control

This topic describes the parameters, such as autonegotiation and non-autonegotiation, which are
used for configuring flow control function of an Ethernet port.
Table 22-3 lists the parameters for configuring flow control of an Ethernet port.

Table 22-3 Parameters for configuring flow control of an Ethernet port

Port PORTn Displays all the available

MAC ports on an Ethernet
board.
Specifies the PORT port. The
letter n indicates the number of
the PORT port.
Non-Autonegotiation Disabled, Enable Symmetric The Non-Autonegotiation

Flow Control Mode Flow Control, Send Only, Flow Control Mode
Receive Only (Ethernet Port Attribute)
Default value: Disable specifies the flow control
mode adopted when an
Ethernet port works in non-
auto-negotiation mode.
Click Non-Autonegotiation
Flow Control Mode (Ethernet
Port Attribute) for more
information.
Autonegotiation Flow The value ranges of the The Autonegotiation Flow

Control Mode parameters are different from Control Mode (Ethernet
each other for different boards Port Attribute) specifies the
and products. You can click flow control mode adopted
the hyperlink in the when an Ethernet port works in
description to display the auto-negotiation mode.
specific information. The N1EMS4 and N1EGS4
boards do not support the
autonegotiation traffic control
attribute.
Click Autonegotiation Flow
Control Mode (Ethernet Port
Attribute) for more
information.
22.1.2.3 Network Attributes

This topic describes the parameters, such as port attribute and P port encapsulation format, which
are used for configuring network attributes of an Ethernet port.
Table 22-4 lists the parameters for configuring network attributes of an Ethernet port.

Table 22-4 Parameters for configuring network attributes of an Ethernet port

Port PORTn or VCTRUNKn Specifies the PORT or

VCTRUNK port. The letter n
indicates the number of the
port.
Port Attribute The value ranges of the The Port Attribute (Ethernet
parameters are different from Port) parameter specifies the
each other for different boards position of a port in the
and products. You can click network. Different port
the hyperlink in the attributes support different
description to display the packets.
specific information. Click Port Attribute (Ethernet
Port) for more information.
Encapsulation Format of P MartinioE, stack VLAN Encapsulation Format of P

Port Default value: MartinioE Port (Network Attributes)
indicates that the board
supports receiving of data
packets in the MPLS
encapsulation format and
normal Ethernet data packets.
The port needs to process
different types of packets in
different ways, so you need to
set the port to a PE port or a P
port. The PE port is not
configured with the
encapsulation format, while
the P port is configured with
the encapsulation format. The
P port indicates a port for
connecting the equipment of
the network provider, so the P
port receives data packets in
the MPLS encapsulation
format. You can set the packet
encapsulation format of the P
port by running the
configuration command.
This parameter is not
supported by a board that
supports the QinQ function.
Click Encapsulation Format of
P Port (Network Attributes) for
more information.

22.1.2.4 Advanced Attributes

This topic describes the parameters, such as the loop detection, loop port shutdown, and traffic
threshold (Mbit/s), which are used for configuring the advanced attributes of an Ethernet port.
Table 22-5 lists the parameters for configuring the advanced attributes of an Ethernet port.
Table 22-5 Parameters for configuring the advanced attributes of an Ethernet port
Port PORTn or VCTRUNKn Indicates the PORT or

VCTRUNK port. The letter
n indicates the number of
the PORT port.
Enabling Broadcast Packet Enabled, Disabled The Enabling Broadcast

Suppression Default value: Disabled Packet Suppression
(Ethernet Interface
Attributes) parameter
specifies whether to enable
the function for a port to
suppress the broadcast
packets and to control the
traffic of the broadcast data
packets that enter the port.
If the broadcast packet
suppression function is
enabled, and if the
broadcast traffic exceeds
the specified threshold
value, the broadcast
packets that enter the port
are discarded.
Click Enabling Broadcast
Packet Suppression
(Ethernet Interface
Attributes) for more
information.

Broadcast Packet Suppression 1-10 The Broadcast Packet

Threshold Default value: 3 Suppression Threshold
(Ethernet Interface
Attributes) parameter
allocates the specified
bandwidth to the broadcast
packets. The bandwidth is
allocated on the basis of the
traffic proportion at the
port. If the bandwidth
allocated to the broadcast
packets reaches the
specified threshold, the port
discards the broadcast data
packets that are received.
Click Broadcast Packet
Suppression Threshold
(Ethernet Interface
information.
Traffic Threshold(Mpbs) 0-100 (FE), 0-1000 (GE), in The Traffic Threshold

step length of 1 (Mpbs) (External
Default value: 100 (FE), Ethernet Port Attribute)
1000 (GE) parameter specifies the data
flow threshold at external
physical ports.
Click Traffic Threshold
(Mpbs)(External Ethernet
information.
Port Traffic Threshold Time 1-30 The Port Traffic

Window(Min) Default value: 0 Threshold Time Window
(Min) parameter specifies
the duration for a
VCTRUNK or an IP port to
monitor the traffic after the
zero traffic monitoring
function of the port is
enabled.
Click Port Traffic
Threshold Time Window
(Min) for more
information.

Loop Detection Enabled, Disabled The Loop Detection

Default value: Disabled (Ethernet Port Attribute)
parameter specifies the
function of reporting the
self-loop alarms after one
of the following loopback
cases is detected.
Click Loop Detection
(Ethernet Port Attribute)
for more information.
Loop Port Shutdown Enabled, Disabled The Traffic Threshold

Default value: Enabled (Mpbs) (External
Ethernet Port Attribute)
parameter specifies the data
flow threshold at external
physical ports.
Click Loop Port Shutdown
(Ethernet Port Attribute)
Zero-Flow Monitor Enabled, Disabled The Zero-Flow Monitor

Default value: Disabled parameter specifies
whether the traffic on a port
is monitored.
Click Zero-Flow Monitor
(Ethernet Interface
information.
Jumbo Frame Type 0 to 65535 The Jumbo Frame Type

Default value: 34928 parameter specifies the
value of the jumbo frame
type on an Ethernet port.
The jumbo frame indicates
the oversized Ethernet
frame, whose maximum
length is 65535 bytes. The
Ethernet service board
determines whether the
Ethernet frame is a jumbo
frame according to the
value of the jumbo frame
type.
Click Jumbo Frame Type

DNI Status Enabled, Disabled Indicates whether to enable

the DNI status of the
VCTRUNK port on a data
board.
22.1.2.5 TAG Attributes

Tag attributes are important attributes for configuring Ethernet services, including the
parameters such as the default VLAN ID, VLAN priority, ingress detection setting, and tag ID.
Table 22-6 lists the parameters for configuring the tag attributes of an Ethernet port.
Table 22-6 Parameters for configuring the tag attributes of an Ethernet port
Port PORTn or VCTRUNKn Specifies the PORT or VCTRUNK

port. The letter n indicates the
number of the port.
Tag Identifier Access, Tag Aware, Hybrid The Tag Identifier parameter
Default value: Tag Aware indicates that the Ethernet port
supports IEEE 802.1Q Ethernet
packets that contain VLAN tags.
You can set three attributes to
differentiate the packets from each
other so that these packets can be
transmitted efficiently.
Click Tag Identifier for more
information.
Default VLAN ID 1-4095 The Default VLAN ID (Ethernet

Default value: 1 Port Attribute) parameter
specifies the default VLAN ID of
a port.
Click Default VLAN ID (Ethernet
information.
VLAN Priority 0-7 The VLAN Priority (Ethernet

Default value: 0 Port Attribute) parameter
specifies the priority of the default
VLAN ID of a port. It indicates the
priority of the service quality.
Click VLAN Priority (Ethernet
information.

Entry Detection Enabled, Disabled The Entry Detection (Ethernet

Default value: Enabled Port Attribute) parameter
specifies whether to identify the
tag labels in the data packets.
Click Entry Detection (Ethernet
information.
22.1.2.6 Encapsulation/Mapping
The equipment supports the setting of encapsulation and mapping protocols for Ethernet packets,
including the parameters such as mapping protocol, scrambling code, and CRC or not.
Table 22-7 lists the parameters for configuring the encapsulation and mapping of an Ethernet
port.
Table 22-7 Parameters for configuring the encapsulation and mapping of an Ethernet port
Port VCTRUNKn Indicates the VCTRUNK

port. The letter n indicates the
number of the VCTRUNK
port.
Mapping Protocol The value ranges of the The Mapping Protocol

parameters are different from parameter specifies the
each other for different mapping protocol of the
boards and products. You can VCTRUNK port.
click the hyperlink in the Click Mapping Protocol for
description to display the more information.
specific information.
Scramble The value ranges of the The Scramble parameter

parameters are different from specifies whether to scramble
each other for different the payload area of the
boards and products. You can encapsulation protocol and
click the hyperlink in the the scramble mode.
description to display the You can set this parameter
specific information. only when the mapping
protocol is GFP, HDLC, or
LAPS.
Click Scramble for more
information.

Set Inverse Value for CRC Yes, No The Set Inverse Value for
Default value: Yes CRC parameter specifies
whether to set an inverse
value for the CRC field of the
HDLC or LAPS protocol.
You can set this parameter
only when the mapping
protocol is HDLC or LAPS.
Click Set Inverse Value for
CRC for more information.
Check Field Length The value ranges of the The Check Field Length
parameters are different from parameter specifies the length
each other for different of the CRC field of the
boards and products. You can mapping protocol.
click the hyperlink in the You can set this parameter
description to display the only when the mapping
specific information. protocol is GFP, HDLC, or
LAPS.
Click Check Field Length for
more information.
FCS Calculated Bit The value ranges of the The FCS Calculated Bit
Sequence parameters are different from Sequence parameter
each other for different specifies the sequence of
boards and products. You can storing the bits in the CRC
click the hyperlink in the field of the mapping protocol.
protocol is GFP, HDLC, or
LAPS.
Click FCS Calculated Bit
Sequence for more
information.
Extension Header Option The value ranges of the The Extension Header
parameters are different from Option parameter specifies
each other for different whether Mapping Protocol
boards and products. You can of the GFP protocol supports
click the hyperlink in the the extension header.
protocol is GFP.
Click Extension Header
Option for more information.

22.1.2.7 Bound Paths

This topic describes the parameters, such as available resources, available timeslots, and service
direction, which are used for binding a path with an Ethernet port.
NOTE
The configured cross-connections must correspond to the bound bandwidth timeslots. Otherwise, the
services are unavailable.
Table 22-8 lists the parameters that are used for binding a path.
Table 22-8 Parameters for binding paths

Configurable Ports For example, VCTRUNKn Displays all the available

VCTRUNK ports on the
board.
Available Resources For example, VC4-1 Displays all the available

VC-4s.
Available Timeslots For example, VC12-1 Displays all the available

timeslots.
VCTRUNK Port VCTRUNKn Displays the number (n) of

the VCTRUNK port.
Level For example, VC12-xv Specifies the level of a path

that is bound with the
VCTRUNK.
Service Direction Bidirectional, Uplink, Specifies the direction of the

Downlink Ethernet service.
Default value: Bidirectional
Bound Path For example, VC4-1-VC12 Specifies the number of the

(1-3) path to be bound, for
example, VC4-1-VC12(1-3).
Number of Bound Paths n Displays the number of

VCTRUNKs to be bound.
The Used Channel For example, VC4-1-VC12 Displays the actually used
(1) channel.
Activation Status Active, Deactive Displays whether the path is

active.
Display in Combination - If you select Display in

Combination, the bound
paths are displayed in a
centralized manner.
Otherwise, the bound paths
are displayed in a distributed
manner.

22.1.3 ATM Parameters

The ATM parameters that need to be set for the ATM boards include the port type and traffic
type.
Port Type
The port types include NNI and UNI. The default port type is UNI.
Traffic Type
The traffic type must meet the requirements of the port.
Service Type
Five service types are available, namely, CBR, rt-VBR, nrt-VBR, UBR, and UBR+.
Peak Cell Rate

Set the peak cell rate of the ATM services. This parameter must be set for each service type.
Sustainable Cell Rate

Set the sustainable cell rate of the ATM services. In the case of the rt-VBR and nrt-VBR services,
set this parameter.
MBS
Set the MBS of the ATM services. In the case of the rt-VBR and nrt-VBR services, set this
parameter.
CDVT
Set the CDVT of the ATM services. In the case of the CBR, rt-VBR, and UBR services, set this
parameter.
22.2 SDH Processing Boards

The parameters that need to be set for the SDH processing boards include the J0 byte, J1 byte,
J2 byte, and C2 byte.
J0 Byte
The J0 byte is used to transmit repetitively a section access point identifier so that a section
receiver can verify its continued connection to the intended transmitter. It is recommended that
you set the J0 byte to the default value, namely, single-byte "Disabled".
J1 Byte
J1 is the higher order path trace byte. This byte is used to transmit repetitively a path access

intended transmitter. When a J1 mismatch is detected at the receive end, the corresponding VC-4
path generates an HP_TIM alarm.
In the case of the SLO1, it is recommended that you set the J1 byte to " HuaWei SBS ". In
the case of the other boards, it is recommended that the J1 byte uses the default value, namely,
single-byte "Disabled".
NOTE
The J1 byte was set to " HuaWei SBS " by default. In the character string " HuaWei SBS ", there is
one blank space before "HuaWei" and five blank spaces after "SBS".
J2 Byte
J2 is the lower order path trace byte. This byte is used to transmit repetitively a low order path
access point identifier so that a path receiving terminal can verify its continued connection to
the intended transmitter.
To set and query the J2 byte to be received, enable the lower order monitoring function.
NOTE
In the case of the SDH processing boards, the J2 byte to be sent cannot be set.
C2 Byte
and the payload property. The C2 byte to be sent must match the C2 byte to be received. When
a C2 mismatch is detected, the corresponding VC-4 path at the local end generates an HP_SLM
alarm.
Table 22-9 shows the relation between the service type and the value of the C2 byte.
Table 22-9 Relation between the service type and the value of the C2 byte
Service Type Value of the C2 Byte (Hexadecimal)
TUG structure 02
34M/45M into C-3 04
140M into C-4 12
Unequipped 00
22.3 PDH Boards

The parameters that need to be set for the PDH boards include the J1 byte, C2 byte, J2 byte, V5
byte, and tributary loopback.
J1 Byte
J1 is the path trace byte. This byte is used to transmit repetitively a path access point identifier
so that a path receiving terminal can verify its continued connection to the intended transmitter.
When a J1 mismatch is detected at the receive end, the corresponding VC-4 path generates an
HP_TIM alarm.

The J1 byte is set to the single-byte "□" by default.
NOTE
The J1 byte was set to " HuaWei SBS " by default.
C2 Byte
and the payload property. The C2 byte to be sent must match the C2 byte to be received. When
a C2 mismatch is detected, the corresponding VC-4 path at the local end generates an HP_SLM
alarm.
Table 22-10 shows the relation between the service type and the value of the C2 byte.
Table 22-10 Relation between the service type and the value of the C2 byte
Service Type Value of the C2 Byte (Hexadecimal)
TUG structure 02
34M/45M into C-3 04
140M into C-4 12
Unequipped 00
J2 Byte
J2 is the VC-12 path trace byte. This byte is used to transmit repetitively a low order path access
intended transmitter.
V5 Byte
V5 is the path status and signal label byte. This byte is used to detect bit errors and indicate
remote errors or remote failures on lower order paths. The LP_REI and LP_RFI alarms are
generated accordingly. Table 22-11 shows the relation between the service type and the value
of the V5 byte.
Table 22-11 Relation between the service type and the value of the V5 byte
Service Type Value of the V5 Byte (Hexadecimal)
Asynchronous 02
Byte synchronization 04
HDLC/PPP mapping 0A
Unequipped or supervisory- 00
unequipped

Equipping Indication
When a service channel only carries the service and does not process the service, select
Unequipped or Supervisory-Unequipped.
When a service channel carries the service and also processes the service, select Equipped-
Unspecific Payload.
Tributary Loopback
The tributary loopback function is used to locate faults in the service channels.
The tributary loopback is also a diagnosis function. When the tributary loopback is performed,
related services are interrupted.
Path Service Type

This parameter is set to specify service type for the channel.
l Select E1 or T1 for E1/T1 processing boards according to the actual service type in the
channel.
l Select E3 or T3 for E3/T3 processing boards according to the actual service type in the
channel.
Serial Port Protocol Mode

For the DX1, select the protocol mode of the N x 64 kbit/s signals. The protocol mode includes
V.35, V.24, X.21, RS449, RS530 and RS530A.
DDN Clock Source Management

The timing scheme and working clock source can be set for the DX1.
l Set the timing scheme of the DDN channels 10–12 and 14–16 to the DCE internal scheme,
DCE slave scheme or DTE external scheme.
l Set the timing scheme of the DDN channels 9 and 13 to the DCE internal scheme, DCE
slave scheme, DTE external scheme, DTE internal scheme, DTE slave scheme or DCE
external scheme. By default, the timing scheme is the DCE internal scheme for channels 9
and 13 is the DCE internal scheme.
22.4 WDM Boards

The parameters that need to be set for the WDM boards include the path use status, optical
interface loopback, service type, client service bearer rate (M), laser status, automatic laser
shutdown, current bearer rate (M), actual wavelength no./wavelength (nm)/frequency (THz),
actual band type, configure wavelength no./wavelength (nm)/frequency (THz), configure band
type, and SD trigger condition.

Path Use Status

Item Description
Parameter description Used to set the path use status
Parameter values Used and Unused
Parameter value description Default value: Used
Recommended value Used
Application scenarios In configuration, commissioning, and

maintenance stages
Impact on the system When the Path Use Status of an optical interface
is set to Unused, service alarms at this interface
are suppressed, which disables the automatic laser
turn on function.
Relevant boards LWX
Configuration requirements When the channel is not required, its Path Use
Status can be set to Unused. In this case, a
command should be issued to shut down the laser
of this path; otherwise, an alarm indicates that the
laser is forcibly turned on is reported.
Optical Interface Loopback

Item Description
Parameter description Used to set the loopback mode of the current

optical interface.
Parameter values Non-Loopback, Outloop, and Inloop
Parameter value description Default value: Non-Loopback
Non-Loopback: indicates that the equipment is in

normal state. Optical interface loopback is not
required when the equipment normally operates.
Inloop: indicates a mode that signals to be output

from the output interface of the local-end
equipment are looped back to the signal input
interface of this equipment. Inloop is used to test
the signal processing on the board.
Outloop: indicates a mode that unprocessed

signals accessed to the local-end equipment are
directly looped back to the corresponding output
interface without the signal structure changed.
Outloop is used to test connections between fiber
lines and connectors.

Item Description
Recommended value Non-Loopback
Application scenarios In commissioning and maintenance stages
Impact on the system When the loopback mode is set to Inloop or

Outloop, services are interrupted.
Relevant boards RPC01 and RPC02
Configuration requirements None
Service Type
Item Description
Parameter description Used to set the type of services at a client-side

optical interface.
Parameter values LWX: GE, FE, STM-1, STM-16, OC-3, OC-12,

OC-48, FC-100, FC-200 FICON, FICON
Express, DVB-ASI DVB-SDI, and ESCON
Parameter value description Default value: Any
Recommended value None

maintenance stages
Impact on the system None
Relevant boards LWX
Configuration requirements The type of actually accessed services must be the

same as the type of configured services.
Otherwise, the services are not available.
Client Service Bearer Rate (M)

Item Description
Parameter description Used to set the bearer rate of client-side services.
Parameter values(M) 16 to 2500
Parameter value The bearer rate of client-side services can be set only when the
description client-side services are of Any type. The set value should equal
to the maximum rate of actually accessed services.

Item Description
Application scenarios In configuration, commissioning, and maintenance stages
Impact on the system A SPEED_OVER alarm is reported when the rate of actually
accessed services exceeds the set value.
Relevant boards LWX
Configuration Actually Set value Actually Set value (M)

requirements (the set accessed (M) accessed
value of bearer rate services services
should be the same as the
rate of actually accessed STM-1 155.5 GE 1250
services) STM-4 622 FE 125
STM-16 2488.3 FC100 1062
OC3 155.5 FC200 2124
OC12 622 FICON 1062
OC48 2488.3 FICON 2124

Express
HDTV 270 ESCON 200
DVB-SDI 270 FDDI 125
DVB-ASI 270 - -
Laser Status
Item Description
Parameter description Used to set the laser Open/Close status.
Parameter values Open and Close

Default value: Open
Parameter value description Open: The laser is turned on to start transmitting

services.
Close: The laser is turned off to stop service
transmitting.
Recommended value Open

maintenance stages
Impact on the system When the laser is set to Close, services are
interrupted.
Relevant boards LWX

Item Description
Configuration requirements When an optical interface is unused or is not

connected to a fiber, the laser at this interface
should be set to Open.
Automatic Laser Shutdown

Item Description
Parameter description Used to set whether to enable automatic laser

shutdown (ALS) of the downstream laser of the
local board in the case of loss of received signals.
If ALS is enabled, when the received signals are
lost, the laser is automatically shut down and stops
transmitting signals. ALS prolongs the service life
of a laser and avoids personal injury from the laser.
Parameter values Enabled and Disabled
Parameter value description By default, ALS of optical interfaces on client

sides is set to Enabled and ALS of optical
interfaces on WDM sides is set to Disabled.
Recommended value ALS of optical interfaces on client sides is set to

Enabled and ALS of optical interfaces on WDM
sides is set to Disabled.
Application scenarios In configuration and maintenance stages
Relevant boards LWX
Configuration requirements If the optical interface on a WDM side does not

use the ESC as the network management channel
or no fiber is connected, you can set ALS of the
optical interface to Enabled to prolong the service
life of the laser.
Current Bearer Rate (M)

Item Description
Parameter description Used to query the current bearer rate of client-side

services.
Parameter values Can only be queried
Parameter value description None

Item Description

maintenance stages
Relevant boards LWX
Actual Wavelength No./Wavelength (nm)/Frequency (THz)

Item Description
Parameter description Used to query the operating wavelength at the

WDM-side optical interface of a board.

maintenance stages
Relevant boards LWX
Actual Band Type

Item Description
Parameter description Used to query the band type.
Relevant boards LWX

Configure Wavelength No./Wavelength (nm)/Frequency (THz)

Item Description
Parameter description Used to configure the operating wavelength at the

WDM-side optical interface of a board.
Parameter values C-band wavelength spacing: 100G

(192.100-196.00 THz)
CWDM-band wavelength spacing: 20 nm
(1271-1611 nm)
Parameter value description The operating wavelength of a fixed-wavelength

OTU should be set to the actual wavelength of the
OTU. The operating wavelength of a tunable-
wavelength OTU should be set according to the
network wavelength planning.
Application scenarios In configuration stage
Impact on the system l The same wavelength should be used for a

service in the receive and transmit directions.
l If a service travels through multiple
regenerating stations, it is recommended that
these regenerating sections use the same
wavelength.
l It is recommended that the active and standby
channels use the same wavelength when the
inter-board channel protection or client-side
path protection is adopted.
Relevant boards LWX
Configuration requirements The configured logic wavelength must be the same

as the actual physical wavelength. Otherwise, a
CFGDATA_OUTRANGE alarm is reported. In
the case of tunable optical modules, issuing the
captioned command directly changes their
physical wavelengths (but does not change the
band). In the case of non-tunable optical modules,
issuing this command changes their logic
wavelengths only.
Configure Band Type

Item Description
Parameter description Used to configure the band type.
Parameter values(dBm) C and CWDM

Item Description

maintenance stages
Relevant boards LWX
Configuration requirements The configured logic band must be the same as

the actual physical band. Otherwise, a
CFGDATA_OUTRANGE alarm is reported.
SD Trigger Condition
Item Description
Parameter description Used to configure the trigger condition to perform

SD switching on the board.
Parameter values(dBm) B1_SD, OTUk_DEG, ODUk_PM_DEG, and

None
Parameter value description B1_SD: Regeneration section (B1) signal

degrade
OTUk_DEG: OTUk signal degrade
ODUk_PM_DEG: ODUk_PM signal degrade
None: No condition is configured for SD
switching.
Recommended value Set the value to None.
Impact on the system When the B1_SD, OTUk_DEG, or

ODUk_PM_DEG alarm occurs, the protection
group might be triggered to perform protection
switching.
Relevant boards LWX
Configuration requirements Set the value to B1_SD, OTUk_DEG, or

ODUk_PM_DEG if the protection mechanism
needs such a trigger condition.

22.5 Cross-Connect and Timing Units

The parameters that need to be set for the cross-connect and timing units include the clock source
parameters and clock subnet parameters.
Table 22-12 lists the parameters that need to be set for the cross-connect and timing units.
Table 22-12 Parameters that need to be set for the cross-connect and timing units
Domain Parameter Value Configuration
Clock NE Name - Displays the name of an NE.

Synchroni
zation NE Clock Tracing Mode, This field shows the current working
Status Working Mode Holdover Mode, mode of the clock function board on
Free-Run Mode the NE. This field is read-only.
Tracing Mode: It is the normal
working mode and indicates that the
clock is synchronized with the input
reference clock source under the
actual service conditions.
Holdover Mode: Indicates that the
clock works with the stored
frequency information as the timing
reference after all the timing
references are lost.
Free-Run Mode: Indicates that the
clock works through the internal
oscillator.
S1 Byte For example: NA Displays the S1 byte synchronous

Synchronization quality information in the clock
Quality function on the current NE. For query
Information only.
S1 Byte Clock For example: NA Displays the trace source of the

Synchronous current NE clock. For query only.
Source This field displays no information
until the S1 byte (clock protection
function) is activated. Similarly, this
field displays NA until you press the
Query button, and then it displays the
related information.

Synchronous For example: Displays the trace source of the

Source External Clock current NE clock. For query only.
Source 1 Normally, the synchronous source
should be a clock source with the
highest priority among the clock
stratums. If the synchronous source
cannot be traced, try to trace a clock
source with a lower priority level
according to the sequence of the clock
stratums.
Data Output Normal Data Displays the data output method.

Method in Output Mode,
Holdover Mode Keep the Latest
Data Default:
Normal Data
Output Mode
Clock Clock source - The clock sources currently used by

source the NE are listed in sequence. The top
priority clock source is of the highest priority.
External clock 2 MHz and 2 Mbit/ Select the mode only for the input
source mode s external clock source.
Synchronous Sa4, Sa5, Sa6, Select the synchronous status byte

status byte Sa7, and Sa8 only for the input external clock
source that is in 2 Mbit/s mode.
Clock AlS alarm Selected and not This parameter specifies the
source generated selected condition for determining the clock
switching source switching. When an AIS alarm
condition occurs on an NE, the NE determines
whether to perform the clock source
switching.
B1 BER Selected and not This parameter specifies the

threshold- selected condition for determining the clock
crossing source switching. When the B1 BER
generated on an NE crosses the threshold, the
NE determines whether to perform
the clock source switching.
RLOS, RLOF and Selected When an R_LOS, R_LOF, or OOF

OOF alarms alarm occurs on an NE, the NE
generated considers that the corresponding
clock source fails.

Phase- External clock Synchronization This parameter is used to set the

locked output mode quality operation to be performed by the
source when 2M output unavailable, system when the output of the
output by synchronous output AIS, and synchronous clock (that is, 2M phase-
external source is invalid shut off locked source) fails.
clock Default value:
Shut off
Output mode of 2 Mbit/s and 2 The NE provides two external clock

external clock MHz outputs. This parameter is used to set
source 1 the output mode for external clock
source 1.
Output mode of 2 Mbit/s and 2 The NE provides two external clock

external clock MHz outputs. This parameter is used to set
source 2 the output mode for external clock
source 2.
Clock source No threshold Set a threshold for the 2M

threshold value, G.813 SDH synchronous output sources. The
equipment timing threshold is set for the clock
source (SETS) protection function of the S1 byte.
signal, G.812 The NE clock system uses this
local clock signal, threshold as the basis for ensuring the
G.812 transit quality of the output clock. If a clock
clock signal, G. is of a quality higher than the
811 clock signal, threshold, the clock system transmits
and unknown clock signals.
Clock Lock status Lockout and This parameter is used to set whether
source unlock the clock source switching is allowed.
switching
Switching Forced switching, This parameter specifies the
operation manual switching, switching operation to be performed
and clear on the clock source.
switching
Clock Higher priority Auto-revertive When the clock source of a higher

source clock source and non-revertive priority degrades, the NE
reversion reversion mode automatically switches to the clock
parameter source of a lower priority. When this
parameter is set to "Auto-revertive",
the NE automatically switches back
to the clock source of a higher priority
when the clock source of the higher
priority is restored. When this
parameter is set to "Non-revertive",
the NE does not automatically switch
back to the clock source of a higher
priority when the clock source of the
higher priority is restored.

Clock source 0 to 12 minutes This parameter is used to set the

WTR time period from the time when the
recovery of the clock is detected to
the time when the clock selector
responds. This setting prevents
repeated switching from occurring in
the case of unstable signals.
Clock Affiliated subnet Default value: 0 This parameter is used to set the
subnet subnet ID.
Protection status Start extended This parameter specifies whether to

SSM protocol, start up the SSM protocol.
start standard
SSM protocol, and
stop SSM protocol
Clock source ID 1 to 15 Huawei equipment uses the first four

bits of the S1 byte to identify the
clock source. Hence, the subnet clock
source ID is the four bits.
SSM Line port All the line ports This parameter displays the line ports
output of the current NE that can be controlled.
control
Control status Enabled and This parameter specifies whether the
disabled line port allows the output of the
quality information carried by the S1
byte. Generally, set this parameter to
"Disabled" at edges of a network to
prevent impact on the other
equipment.
Clock Configuration Unknown This parameter is used to set the clock

quality quality synchronization quality. Specify the clock quality of
quality, G.811 the clock source listed in the priority
clock signal, G. table. If an option other than
812 transit clock "Automatic extraction" is selected,
signal, G.812 the NE considers the specified clock
local clock signal, quality (other than the actual clock
G.813 SDH quality) as the criteria.
equipment timing
source (SETS)
signal, do not use
for
synchronization,
and automatic
extraction
Default value:
Automatic
extraction

Clock quality Unknown The clock source quality information

synchronization actually received by the NE is
quality, G.811 extracted by the NE from the S1 byte
clock signal, G. of each clock source. When the
812 transit clock customer queries the actual clock
signal, G.812 quality and the NE successfully
local clock signal, returns the result, the quality can be
G.813 SDH displayed. Otherwise, it displays "no
equipment timing information".
source (SETS)
signal, do not use
for
synchronization,
and automatic
extraction
Clock ID Line port All the line ports This parameter displays the line ports
status of the current NE that can be configured with the clock
ID.
Enabled status Enabled and This parameter specifies whether to

disabled enable the setting of the clock ID.
Default value:
Enabled
22.6 Optical Amplifier Boards

The parameters that need to be set for the optical amplifier boards include the laser status, board
work type, configure band, configure working band parity, actual band, actual working band
parity, threshold of input power loss, gain, rated optical power, nominal gain upper threshold,
and nominal gain lower threshold.
Laser Status
Item Description
Parameter description Used to set the laser Open/Close status.
Parameter values Open and Close

Default value of the OBU1: Open
Default value of the RPC01/RPC02: Close
Recommended value Close

maintenance stages
Impact on the system When the laser is set to Close, services are
interrupted.

Item Description
Relevant boards OBU1, RPC01, and RPC02
Configuration requirements When services are normal, the laser of the optical
amplifying unit should be set to Open.
Board Work Type

Item Description
Parameter description Used to query and set the Board Work Type.
Parameter values C, C+L, and L
Recommended value C

maintenance stages
Configure Band
Item Description
Parameter description Used to configure the type of the working band of

a board.
Parameter values C
Parameter value description Supports only C band.

maintenance stages

Configure Working Band Parity

Item Description
Parameter description Selects the required parity of the working band.
Parameter values All, Even, and Odd
Parameter value description All: All 192.10 THz to 196.05 THz odd and even
wavelengths at 50 GHz channel spacing in C band.
There are 80 wavelengths in total. It is applicable
for the OBU1, RPC01, and PRC02 boards.
Even: All 192.10 THz to 196.00 THz even

wavelengths at 100 GHz channel spacing. There
are 40 wavelengths in total. It is applicable for the
RPC01 and PRC02 boards.
Odd: All 192.15 THz to 196.05 THz odd

wavelengths at 100 GHz channel spacing. There
are 40 wavelengths in total. It is applicable for the
RPC01 and PRC02 boards.
Recommended value Corresponding wavelengths are used according to

different requirements.
Configuration requirements When configuring the parity of wavelengths,

make sure that the parity configured is consistent
with the parity of the actual working wavelengths.
Actual Band
Item Description
Parameter description Used to query the actual working band of the

board.
Relevant boards OBU1

Actual Working Band Parity

Item Description
Parameter description Used to query the parity of the actual working band
of the board.
Threshold of Input Power Loss (dBm)

Item Description
Parameter description Indicates the lower threshold of input optical

power loss (an MUT_LOS alarm is reported).
Parameter value description The default value varies with the boards and
subjects to the on-site queried result.
Gain (dB)
Item Description
Parameter description Used to query the optical power gain of the current
optical amplifying unit.

Item Description

maintenance stages
Configuration requirements Normally, the queried result should range from the
nominal gain minus 2.5 dB to the nominal gain
plus 2.5 dB.
Nominal Gain Upper Threshold (dB)

Item Description
Parameter description Used to query the nominal gain upper threshold.
Nominal Gain Lower Threshold (dB)

Item Description
Parameter description Used to query the nominal gain lower threshold.

Rated Optical Power (dBm)

Item Description
Parameter description Used to set and query the single-wavelength rated

optical power as the reference value for automatic
optical power adjustment.
Parameter values (dBm) –30.0 to 30.0
Parameter value description Default value at the input optical interface: –19
dBm
Default value at the output optical interface: –4
dBm
Recommended value OBUC01: input interface: –20 dBm; output

interface: 0 dBm
OBUC03: input interface: –19 dBm; output
interface: 4 dBm

maintenance stages
Configuration requirements The rated input and output optical power should
be configured by referring to the actual
configurable input and output range of the optical
amplifying unit and should be the same as the
input and output values measured when the
optical amplifying unit operates normally.
Fixed Pump Optical Power (dBm)

Item Description
Parameter description Used to set or query the output optical power of

an optical amplifier board.
Parameter values (dBm) 5 to 30.0 (continuously tunable)
Parameter value description Normally, the fixed pump optical power of the
RPC board should be larger than 23 dBm. The
value is related to the system specifications.

maintenance stages

Item Description
Impact on the system Fixed Pump Optical Power (dBm) must be set
within a range between Min. Fixed Pump
Optical Power (dBm) and Max. Fixed Pump
Optical Power (dBm). If the fixed pump optical
power value is beyond the range, the board might
work abnormally.
Min. Fixed Pump Optical Power (dBm)

Item Description
Parameter description Used to query the minimum pump optical power

that an optical amplifier board can fix. If the fixed
pump optical power value is smaller than the
minimum value, the board might work
abnormally.
Parameter values (dBm) 5 to 30.0
Recommended value Default value: 20 dBm

maintenance stages
Impact on the system If the configured value of Fixed Pump Optical

Power (dBm) is smaller than the value of Min.
Fixed Pump Optical Power (dBm), the board
might work abnormally.
Max. Fixed Pump Optical Power (dBm)

Item Description
Parameter description Used to query the maximum pump optical power

that an optical amplifier board can fix. If the fixed
pump optical power value is larger than the
maximum value, the board might work
abnormally.
Parameter values (dBm) 5 to 30.0

Item Description
Recommended value Default value: 26 dBm

maintenance stages
Impact on the system If the configured value of Fixed Pump Optical

Power (dBm) is larger than the value of Max.
Fixed Pump Optical Power (dBm), the board
might work abnormally.

Hardware Description 23 Task Collection
23 Task Collection
About This Chapter
This topic describes the operation tasks to be performed during board commissioning and board
configuration.
23.1 Querying the Protection Subnet

You can know the network protection schemes by querying the protection subnet to which an
NE belongs. Then, you can configure services for the board according to the protection schemes.
23.2 Troubleshooting Service Unavailability
In certain cases, the services become unavailable after the cross-connections related to the
services are configured. This topic describes the methods of troubleshooting service
unavailability.
23.3 Troubleshooting the Clock Tracing Failure
In many cases, the equipment still fails to trace the clock after you configure the clock source
priority list. To locate the clock tracing problem, you need to check all the stations that the clock
travels along the clock tracing direction and from the source station to the sink station.
23.4 Configuring the F&f Debugging Serial Port and OAM NM Port
The OAM NM port provides the network management function and thus is used for remote
maintenance. The F&f debugging serial port is used for managing the external equipment such
as the COA, TDA, and DCU. The F&f debugging serial port supports a maximum transmission
distance of 15 m.
23.5 Testing the Frequency Accuracy of the Free-Run Clock
The frequency accuracy indicates the deviation of the actual clock frequency from the nominal
clock frequency, which is a highly stable frequency. Generally, the frequency accuracy is
represented by the relative frequency deviation.
23.6 Testing the Clock Holdover Accuracy
The SDH equipment supports the clock holdover function. That is, the SDH equipment can retain
the clock accuracy of ±0.37 ppm or a higher clock accuracy (at a temperature from 20°C to 30°
C) relative to the clock frequency at the service interruption moment, within 24 hours after the
external clock source is interrupted.
23.7 Checking Board Parameters

23 Task Collection Hardware Description
To learn about board parameter status, you can check board parameters. Before actual
configuration operations in networking, you need to check board parameters, to make sure that
the board parameter status meets the requirements of actual networking.
23.8 Testing the SAN Service Channel
When a network carries services, you need to check the availability of the service channels.

23.1 Querying the Protection Subnet

You can know the network protection schemes by querying the protection subnet to which an
NE belongs. Then, you can configure services for the board according to the protection schemes.
Prerequisite
l You must be an NM user with "NE operator" authority or higher.
l The PDH board must be created.
Procedure
Step 1 Choose Protection Subnet > SDH Protection Subnet Maintenance from the Main Menu to
display the Protection Subnet Attributes dialog box.
Step 2 In Protection Subnet Attributes, the left pane displays the protection subnet to which the NE
belongs, and the right pane displays the attribute information of the protection subnet.
----End
23.2 Troubleshooting Service Unavailability

In certain cases, the services become unavailable after the cross-connections related to the
services are configured. This topic describes the methods of troubleshooting service
unavailability.
Context
After the cross-connections are configured, the services are unavailable.
Impacts on the System

The services are unavailable.
Possible Causes
l Cause 1: The type of the logical board is different from the type of the physical board.
l Cause 2: The services are configured incorrectly.
l Cause 3: The other boards on the NE do not operate normally.
Tools, Instruments, and Materials

l U2000
Procedure
Step 1 Ensure that the type of the logical board configured on the U2000 is the same as the type of the
physical board. If the type of the logical board configured on the U2000 is different from the
type of the physical board, delete the current logical board and then add the correct logical board.

For the operations of deleting a logical board, see Deleting Boards. For the operations of adding
a logical board, see Adding Boards.
Step 2 Ensure that the cross-connect services are configured correctly and that the cross-connect
services are activated. If the cross-connect services are configured correctly, modify the
configuration of the cross-connect services. For details, see Modifying the Service Configuration
Data.
Step 3 Check whether all the boards on the NE operate normally and whether any critical or major
alarms are generated on the boards. For details, see Browsing Network-Wide Alarms.
Step 4 Switch the services from the working cross-connect board to the protection cross-connect board.
If the services are restored after the switching, replace the working cross-connect board. If the
services are still unavailable after the switching, perform Step 5.
Step 5 Contact Huawei technical support personnel.
----End
23.3 Troubleshooting the Clock Tracing Failure

In many cases, the equipment still fails to trace the clock after you configure the clock source
priority list. To locate the clock tracing problem, you need to check all the stations that the clock
travels along the clock tracing direction and from the source station to the sink station.
Prerequisite
l The NE must be connected to the serial port (COM1 or COM2) on the PC through an
RS-232 serial port cable.
l The U2000 software must be installed on the PC and the PC must be started.
Procedure
Step 1 Ensure that the clock source priority list is configured correctly.
If the problems are detected in Steps 1–13, correct the configurations according to the operations
in Configuring Clocks.
Step 2 Query the input mode of the external clock and ensure that the input mode of the external clock
source is set correctly. That is, ensure that the input mode of the external clock source is set to
the 2 MHz or 2 Mbit/s.
Step 3 Ensure that the SSM mode is enabled.
Step 4 Ensure that the clock source to be traced is available.
Step 5 If the line source is unavailable, check whether the LOS or LOF alarm occurs on the
corresponding optical port. If the LOS or LOF alarm occurs on the corresponding optical port,
clear the alarm. If the LOS or LOF alarm does not occur on the corresponding optical port, run
the test command to check whether the inter-board communication is normal. If the inter-board
communication is not normal, it indicates that the equipment fails to trace the clock due to the
abnormal inter-board communication.
Step 6 Check whether the external clock is derived from the BITS or other NEs. If the source of the
external clock is incorrect, set the correct external clock source.

Step 7 Check whether the clock source is locked. If the clock source is locked, unlock the clock source.
Step 8 Check whether the switching mode of the clock source is non-revertive on the U2000. If the
switching mode of the clock source is non-revertive, change the switching mode to revertive.
Step 9 Check whether any forced switching or manual switching is performed for other clock sources.
If a forced switching or manual switching is performed for other clock sources, clear the
switching.
Step 10 Check whether the S1 byte that carries the clock source signal is DNU. If the S1 byte that carries
the clock source signal is DNU, go to Step 13.
Step 11 Check whether the S1 byte is correct. If the S1 byte is incorrect, set the correct S1 byte.
Step 12 If the S1 byte is correct, check whether the external clock is derived from the BITS or other NEs.
If the source of the external clock is incorrect, set the correct external clock source. Check
whether the clock source is locked. If the clock source is locked, unlock the clock source. Check
whether any forced switching or manual switching is performed for other clock sources. If a
forced switching or manual switching is performed for other clock sources, clear the switching.
Step 13 In the case of the line clock source, check whether the timeslot for receiving the S1 byte is any
of sa4–sa8. If the timeslot for receiving the S1 byte is not any of sa4–sa8, set the timeslot for
receiving the S1 byte to any of sa4–sa8.
----End
23.4 Configuring the F&f Debugging Serial Port and OAM

NM Port
The OAM NM port provides the network management function and thus is used for remote
maintenance. The F&f debugging serial port is used for managing the external equipment such
as the COA, TDA, and DCU. The F&f debugging serial port supports a maximum transmission
distance of 15 m.
Prerequisite
l The PC must be connected to the equipment through a network cable. The PC must be
started.
l The U2000 must be started.
Procedure
Step 1 Open the NE whose F&f debugging serial port and OAM NM port need to be configured on the
U2000.
Step 2 Choose Communication > Access Control from the Function Tree. See Figure 23-1.

Figure 23-1 Configuring the F&f debugging serial port and OAM NM port
Step 3 Configure the OAM NM port. Select Enable OAM Access. This operation is optional.
Step 4 Configure the F&f debugging serial port. Select Enable Serial Port Access and set the baud
rate to 38400.
Step 5 Click Apply so that the settings can take effect.
----End
23.5 Testing the Frequency Accuracy of the Free-Run Clock

The frequency accuracy indicates the deviation of the actual clock frequency from the nominal
clock frequency, which is a highly stable frequency. Generally, the frequency accuracy is
represented by the relative frequency deviation.
Tools and Instruments

Frequency meter
Test Connection Diagram

Connect the frequency meter to the NE as shown in Figure 23-2.

Figure 23-2 Connection for testing the frequency accuracy of the free-run clock
2 MHz
Standard clock Equipment Frequency meter
Procedure
Step 1 Use the frequency meter to measure the frequency of the standard clock.
Step 2 Set the clock to be in free-run mode. Set the output mode of the external clock to the 2 MHz or
2 Mbit/s mode. Connect the output clock signal to the frequency meter for measurement.
Step 3 Use the frequency meter to measure the frequency of the free-run clock. Compare the actual
frequency of the free-run clock with the frequency of the standard clock to calculate the
frequency accuracy of the free-run clock.
Step 4 You can calculate the frequency deviation and thus determine the frequency accuracy only after
you check the clock frequencies at different time periods within several months and perform
frequency tests under different conditions. In addition, you need to perform the frequency tests
at appropriate time periods based on the actual situations.
----End
23.6 Testing the Clock Holdover Accuracy

The SDH equipment supports the clock holdover function. That is, the SDH equipment can retain
the clock accuracy of ±0.37 ppm or a higher clock accuracy (at a temperature from 20°C to 30°
C) relative to the clock frequency at the service interruption moment, within 24 hours after the
external clock source is interrupted.
Prerequisite
The following operations must be performed:
l The U2000 LCT must be started.
l You must log in to the NE.
Tools and Instruments

Frequency meter, SDH analyzer, and U2000 LCT
Test Connection Diagram

Connect the testing tools to the NE as shown in Figure 23-3.

Figure 23-3 Connection for testing the clock holdover accuracy
Standard clock K
Equipment Frequency
meter
SDH
analyzer
Procedure
Step 1 Turn on Switch K. Configure the standard clock source for the on the U2000 LCT.
Step 2 After performing all the preparations before locking the clock source, record the frequency.
Then, the equipment locks the standard clock source for 24 hours. Turn off Switch K. Then, the
clock of the changes to holdover mode. Then, record the clock frequency every other hour.
Step 3 Check the records in 24 hours. The test requires that the frequency stability of the standard clock
should be higher than 1x10–10/day.
----End
23.7 Checking Board Parameters

To learn about board parameter status, you can check board parameters. Before actual
configuration operations in networking, you need to check board parameters, to make sure that
the board parameter status meets the requirements of actual networking.
Procedure
Step 1 Check SDH board parameters. For the SDH board parameters, see Table 23-1.
Table 23-1 SDH board parameters
Boar
Paramete
d Navigation Path Application Scenario
r
Type
MSP 1. In the NE When configuring MSP shared services on an

sharing Explorer, optical interface of a board, enable this
select a board. parameter.
2. Choose
Laser When configuring services on an optical
Configuratio
Switch interface of a board, enable this parameter.
SDH n > SDH
Interface from
the Function
Tree.
3. Click By
Board/Port

Boar
Paramete
r
Type
Optical (channel) and l Non-loopback: It is a normal state. When the

(Electrical select Port equipment runs normally, set this parameter
)Interface from the drop- to non-loopback.
Loopback down list. l Inloop: The loop is performed toward the
local NE.
l Outloop: The loop is performed toward the
opposite NE. Inloop and outloop of an optical
interface affect services. They are used to
locate faults.
Hardware In the REG working mode, the board processes

REG only the framer header and regenerator section
Enable overheads. In the case of the non-REG service
configuration, set this parameter to Disabled.
Step 2 Check PDH board parameters. For the PDH board parameters, see Table 23-2.
Table 23-2 PDH board parameters

Boar
Paramete
r
Type
Tributary l Non-loopback: It is a normal state. When the

Loopback equipment runs normally, set this parameter
1. In the NE to non-loopback.
Explorer,
select a board. l Inloop: When input service signals reach the
tributary board of the target NE, the signals
2. Choose
revert to the original trail. This function is
Configuratio
used to locate faults of each service path.
n > PDH
Interface from l Outloop: When input service signals reach the
PDH the Function tributary board through the input port of the
Tree. local NE, the signals are looped back directly
to the service output end.
3. Click By
Service Board/Port l Non-loaded: The service path does not
Load (channel) and process the services that are carried, to
Indication select Port suppress alarms in non-loaded service paths.
from the drop-
down list. l Load: The service path processes the services
that are carried. In the case of a tributary board
that has services, set this parameter to Load.
Step 3 Check RTN board parameters. For the RTN board parameters, see Table 23-3.

Table 23-3 RTN board parameters

Boar
Paramete
r
Type
Radio Specifies the microwave working mode. Its

Work formats are service capacity, working bandwidth
Mode and modulation mode.
The transmit end and the receive end must have
the same settings of the microwave working
mode.
Radio Link Radio Link ID: 1 to 4094

ID
IF Port Sets the loopback status of an intermediate

Loopback frequency interface on the equipment.
Non-Loopback refers to the normal status. It is
not required to set loopback during normal
1. In the NE
equipment operation.
Explorer,
select a board. Outloop means that the input signal passes
through the ingress port and reaches the
2. Choose
intermediate frequency board at the local NE and
Configuratio
then is directly looped back to the service egress
n > IF
end.
Interface from
RTN the Function Inloop means that the input signal returns from
Tree. the intermediate frequency board of the
destination NE along the original trail.
3. Click By
Board/Port This function is usually used to locate faults for
(channel) and various IF interfaces. Performing loopback on an
select Port intermediate frequency interface is a diagnosis
from the drop- function that may affect services of related ports.
down list. Exercise caution before performing this function.
2M Enables or disables a 2 Mbit/s bypath service.

Wayside This parameter is available only when you set
Enable Radio Work Mode to STM-1,28MHz,
Status 128QAM.
ATPC When the ATPC is enabled, according to the

Enable current receive power of the ODU and the set
Status ATPC thresholds, the ATPC module inserts the
ATPC overhead. According to the ATPC
overhead, the opposite ODU adjusts the transmit
power.
When the ATPC is disabled, the ATPC module
does not insert any ATPC overhead.
Step 4 Check data board parameters. For the data board parameters, see Table 23-4.

Table 23-4 Data board parameters

Board Paramet
Navigation Path Application Scenario
Type er
Enabled/ When configuring Ethernet board port

Disabled services, set the port to Enabled.
Working Set the working mode of Ethernet ports

Mode according to networking configuration
requirements.
Maximu When a packet exceeds the maximum

m Frame frame length that is set, the packet is
Length discarded. Alternatively, the packet length
is minimized to satisfy the specified frame
1. In the NE Explorer, length. By default, the value is set to 1522,
select a board. unless otherwise specified.
2. Choose
MAC l Non-loopback: It is a normal state.
Configuration >
Loopbac When the equipment runs normally, set
Ethernet Interface
k this parameter to non-loopback.
Management >
Ethernet Interface l Inloop: Inside the equipment, services
from the Function from the cross-connect side are looped
Tree. back to the cross-connect side. This
3. Click External Port. operation affects services configured on
ports and is used to locate faults.
4. Click the Basic
NOTE
Ethern Attributes tab.
The EMS4 and EGs4 board do not support the
et function of MAC Loopback.
PHY l Non-loopback: It is a normal state.

Loopbac When the equipment runs normally, set
k this parameter to non-loopback.
l Inloop: Inside the equipment, services
from the cross-connect side are looped
back to the cross-connect side. This
operation affects services configured on
ports and is used to locate faults.
TAG 1. In the NE Explorer, l Tag Aware: If the client-side equipment

select a board. sends tag packets, set the TAG attribute
2. Choose of external ports to Tag Aware.
Configuration > l Access: If the client-side equipment
Ethernet Interface sends untagged packets, set the TAG
Management > attribute of external ports to Access.
Ethernet Interface l Hybrid: If the client-side equipment
from the Function sends tag and untagged packets, set the
Tree. TAG attribute of external ports to
3. Click External Port. Hybrid.
4. Click the TAG
Attributes tab.

Board Paramet
Navigation Path Application Scenario
Type er
Entry This parameter is used to identify tags in

Detection data packets. During the configuration of
VLAN services, set this parameter to
Enabled.
Port Type l UNI: The maximum number of VPI bits

is 8. The UNI is used on edge nodes
between the user network and ATM
network.
l NNI: The maximum number of VPI bits
is 12. The NNI is used between ATM
networks.
UPC/ l Enabled: When the traffic parameter is

1. In the NE Explorer,
NPC valid and strict control of traffic is
select a board.
Enabled/ required, set this parameter to
Disabled 2. Choose Enabled.
Configuration >
l Disabled: When the traffic parameter is
ATM Interface
ATM invalid (excepting the PCR of CBR
Management >
services) and service burst and
ATM Interface
grooming are permitted, set this
Management from
parameter to Disabled.
the Function Tree.
NOTE
3. Click External Port. The N1IDQ1A and N1IDL4A board do not
support the function of MAC Loopback.
Loopbac Inloop is used to locate faults. During

k normal service configuration, set this
parameter to No Loopback.
Laser This parameter is used to set the on/off

Switch status of a laser. During normal service
configuration, set this parameter to Open.
----End
23.8 Testing the SAN Service Channel

When a network carries services, you need to check the availability of the service channels.
Testing the Loopback Function When the FC Flow Control Function Is Disabled
Step 1 Connect the optical fibers to the equipment according to Figure 23-4. Ensure that the mode of
the GBIC optical module of the SmartBits and the mode of the SFP optical module of the MST4
match the mode of the optical fibers.

Figure 23-4 Connection for testing the loopback function when the FC flow control function is
disabled
NE1 NE2
SDH
network
SmartBits
Signal flow
Step 2 Disable the FC flow control function on both the local and remote MST4 boards.
Step 3 Loop back the port of the remote MST4 by using an optical fiber or set an inloop on the port of
the remote MST4.
Step 4 Connect the SmartBits to NE1 and set the SmartBits to the private Pt-2-Pt mode.
Step 5 Check whether the services are normal on the SmartBits.
Step 6 If the services are unavailable, configure an loopback to the remote MST4 on the cross-connect
board of NE1 and an loopback to the local MST4 on the cross-connect board of NE2. Then,
perform the test section by section to locate the fault.
----End
Testing the Connection to the FC Switch When the FC Flow Control Function Is
Disabled
Step 1 Connect the optical fibers to the equipment according to Figure 23-5 after ensuring that services
are available on the SmartBits when the FC flow control function is disabled. In addition, do not
modify the configuration of the boards.

Figure 23-5 Connection for testing the connection to the FC switch when the FC flow control
function is disabled
Switch A NE1 NE2 Switch B
SDH
network
SmartBits SmartBits
Step 2 Set the port of the SmartBits to the public Pt-2-Pt mode. Then, perform the following operations:
link_up, login, public, commit, and packet transmission.
l If an error occurs when you perform the link_up or login operation, check the connection
between the SmartBits and the switch. In addition, check the port rate.
l If an error occurs when you perform the public operation, check whether the mode of the
SFP optical module of the MST4, the mode of the SFP optical module that is installed on the
FC port to which the MST4 is connected, and the mode of the optical fibers match each other.
If the connection is correct, log in to the switch and issue the portcfgshow command to check
the configuration status of the switch port. The configuration of the port must meet the
requirement and the configurations of the ports at both ends must be consistent. Then, issue
the switchshow command to check the status of the FC switch and check whether the port
is in the Online state. In addition, you need to check whether WWW of the switch at the
opposite end, the downstream information, and the upstream information are displayed.
l If the configuration of the switch port is correct and WWW of the switch at the opposite end
is displayed but the downstream information and upstream information are not displayed,
check whether the configuration of the SmartBits is correct. In addition, check whether
WWN Src and WWN Dst are correctly set on the SmartBits.
l If the configuration of the SmartBits is correct, check whether network segments are set on
the FC switches. If network segments are set on the FC switches, ensure that the switch ports
to which the SmartBits is connected are in the same network segment.
----End

Hardware Description A Glossary
A Glossary
Terms and abbreviations are listed in an alphabetical order.

A.1 Numerics
A.2 A
A.3 B
A.4 C
A.5 D
A.6 E
A.7 F
A.8 G
A.9 H
A.10 I
A.11 J
A.12 L
A.13 M
A.14 N
A.15 O
A.16 P
A.17 Q
A.18 R
A.19 S
A.20 T
A.21 U
A.22 V
A.23 W
Issue 06 (2011-01-20) Huawei Proprietary and Confidential A-1

A Glossary Hardware Description
A-2 Huawei Proprietary and Confidential Issue 06 (2011-01-20)

A.1 Numerics
1+1 protection An architecture that has one normal traffic signal, one working SNC/trail, one protection
SNC/trail and a permanent bridge. At the source end, the normal traffic signal is
permanently bridged to both the working and protection SNC/trail. At the sink end, the
normal traffic signal is selected from the better of the two SNCs/trails. Due to the
permanent bridging, the 1+1 architecture does not allow an extra unprotected traffic
signal to be provided.
100BASE-T IEEE 802.3 Physical Layer specification for a 100 Mb/s CSMA/CD local area network.
100BASE-TX IEEE 802.3 Physical Layer specification for a 100 Mb/s CSMA/CD local area network
over two pairs of Category 5 unshielded twisted-pair (UTP) or shielded twisted-pair
(STP) wire.
10BASE-T Defined in IEEE 802.3, it is an Ethernet specification that uses the twist pair with the
maximum length of 100 meters at 10 Mbit/s for each network segment.
1:N protection A 1:N protection architecture has N normal service signals, N working SNCs/trails and
one protection SNC/trail. It may have one extra service signal.
1PPS Pulse per second, which, strictly speaking, is not a time synchronization signal. This is
because 1PPS provides only the "gauge" corresponding to the UTC second, but does not
provide the information about the day, month, or year. Therefore, 1PPS is used as the
reference for frequency synchronization. On certain occasions, 1PPS can also be used
on other interfaces for high precision timing.
3R Reshaping, Retiming, Regenerating.
A.2 A
ABR Available Bit Rate
AC Alternating Current
ACAP The Adjacent Channel Alternate Polarization (ACAP) operation provides orthogonal
polarizations between two adjacent communication channels.
Active/Standby If there are two cross-connect boards on the SDH equipment, which are in hot back-up
switching of cross- relation of each other, the operation reliability is improved. When both the cross-connect
connect board boards are in position, the one inserted first is in the working status. Unplug the active
board, the standby one will run in the working status automatically. When the active
cross-connect board fails in self-test, the board is pulled out, the board power supply
fails or the board hardware operation fails, the standby cross-connect board can
automatically take the place of the active one.
add/drop multiplexer A network element that adds/drops the PDH signal or STM-x (x < N) signal to/from the
STM-N signal on the SDH transport network.
ADM See add/drop multiplexer
ADM See optical add/drop multiplexing

Administrative Unit The information structure which provides adaptation between the higher order path layer
and the multiplex section layer. It consists of an information payload (the higher order
VC) and a AU pointer which indicates the offset of the payload frame start relative to
the multiplex section frame start.
Administrative Unit One or more Administrative Units occupying fixed, defined positions in an STM payload
Group are termed an Administrative Unit Group (AUG).An AUG-1 consists of a homogeneous
assembly of AU-3s or an AU-4.
Administrator A user who has authority to access all the Management Domains of the EMLCore
product. He has access to the whole network and to all the management functionalities.
aging time N/A
AIS Alarm Indication Signal
Alarm A means of alerting the operator that specified abnormal condition exists.
Alarm automatic When an alarm is generated on the device side, the alarm is reported to the N2000. Then,
report an alarm panel prompts and the user can view the details of the alarm.
alarm cable The cable for generation of visual or audio alarms.
alarm filtering The alarms are reported to the N2000 BMS, which decides whether to display and save
the alarms according to the filtering states of the alarms. The filtered alarms are not
displayed and saved on the N2000 BMS, but still monitored.
alarm indication On the cabinet of an NE, there are four indicators in different colors indicating the current
status of the NE. When the green indicator is on, it indicates that the NE is powered on.
When the red indicator is on, it indicates that a critical alarm is generated. When the
orange indicator is on, it indicates that a major alarm is generated. When the yellow
indicator is on, it indicates that a minor alarm is generated. The ALM alarm indicator on
the front panel of a board indicates the current status of the board. (Metro)
Alarm indication signal A code sent downstream in a digital network as an indication that an upstream failure
has been detected. It is associated with multiple transport layers.
Alarm inversion For the port that has already been configured but has no service, this function can be
used to avoid generating relevant alarm information, thus preventing alarm interference.
The alarm report condition of the NE port is related to the alarm inverse mode (not
inverse, automatic recovery and manual recovery) setting of the NE and the alarm
inversion status (Enable and Disable) setting of the port. When the alarm inversion mode
of NE is set to no inversion, alarms of the port will be reported as usual no matter whatever
the inversion status of the port is. When the alarm inversion mode of the NE is set to
automatic recovery, and the alarm inversion state of the port is set to Enabled, then the
alarm of the port will be suppressed. The alarm inversion status of the port will
automatically recover to "not inverse" after the alarm ends. For the port that has already
been configured but not actually loaded with services, this function can be used to avoid
generating relevant alarm information, thus preventing alarm interference. When the
alarm inverse mode of the NE is set as "not automatic recovery", if the alarm inversion
status of the port is set as Enable, the alarm of the port will be reported.
Alarm Masking Alarms are detected and reported to the N2000 UMS, and whether the alarm information
is displayed and stored is decided by the function of alarm masking. These alarms masked
are not displayed and stored on the N2000 UMS.
Alarm Severity Alarm severity is used to identify the impact of a fault on services. According to ITU-T
recommendations, the alarm is classified into four severities: Critical, Major, Minor,
Warning.

Alarm suppression When alarms of various levels occur at the same time, certain lower-level alarms are
suppressed by higher-level alarms, and thus will not be reported.
ALS See Automatic laser shutdown
APS See Automatic Protection Switching
asynchronous Pertaining to, being, or characteristic of something that is not dependent on timing.
Asynchronous A data transfer technology based on cell, in which packets allocation relies on channel
Transfer Mode demand. It supports fast packet switching to achieve efficient utilization of network
resources. The size of a cell is 53 bytes, which consist of 48-byte payload and 5-byte
header.
ATM See Asynchronous Transfer Mode
ATPC See Automatic Transmit Power Control
attenuation Reduction of signal magnitude or signal loss, usually expressed in decibels.
AU See Administrative Unit
AUG See Administrative Unit Group
auto-negotiation A mechanism that enables devices to negotiate the SPEED and MODE (duplex or half-
duplex) of an Ethernet Link.
Automatic laser A function that enables the shutdown of the laser when the optical interface board does
shutdown not carry services or the fiber is faulty. The automatic laser shutdown (ALS) function
shortens the working time of the laser and thus extends the service life of the laser. In
addition, the ALS prevents human injury caused by the laser beam.
Automatic Protection Automatic Protection Switching (APS) is the capability of a transmission system to
Switching detect a failure on a working facility and to switch to a standby facility to recover the
traffic.
Automatic Transmit A method of automatically adjusting the transmit power at the opposite end based on the
Power Control transmit signal detected at the receiver.
A.3 B
backplane A backplane is an electronic circuit board containing circuitry and sockets into which
additional electronic devices on other circuit boards or cards can be plugged; in a
computer, generally synonymous with or part of the motherboard.
backup A periodic operation performed on the data stored in the database for the purposes of
database recovery in case that the database is faulty. The backup also refers to data
synchronization between active and standby boards.
bandwidth A range of transmission frequencies that a transmission line or channel can carry in a
network. In fact, it is the difference between the highest and lowest frequencies the
transmission line or channel. The greater the bandwidth, the faster the data transfer rate.
BDI Backward Defect Indicator
BER See Bit Error Rate
Binding strap A component installed on two sides of the cabinet for binding various cables.
binding strap The binding strap is 12.7 mm wide, with one hook side (made of transparent
polypropylene material) and one mat side (made of black nylon material).

BIP BIP-X code is defined as a method of error monitoring. With even parity an X-bit code
is generated by the transmitting equipment over a specified portion of the signal in such
a manner that the first bit of the code provides even parity over the first bit of all X-bit
sequences in the covered portion of the signal, the second bit provides even parity over
the second bit of all X-bit sequences within the specified portion, etc. Even parity is
generated by setting the BIP-X bits so that there is an even number of 1s in each monitored
partition of the signal. A monitored partition comprises all bits which are in the same bit
position within the X-bit sequences in the covered portion of the signal. The covered
portion includes the BIP-X.
bit error An error that occurs in some bits in the digital code stream after being received, judged,
and regenerated, thus damaging the quality of the transmitted information
Bit Error Rate Bit error rate. Ratio of received bits that contain errors. BER is an important index used
to measure the communications quality of a network.
BITS See Building Integrated Timing Supply
bound path Binding several seriel paths into a parallel path, thus improving the data throughput
capacity.
BPDU Bridge Protocol Data Unit
bridge A device that connects two or more networks and forwards packets among them. Bridges
operate at the physical network level. Bridges differs from repeaters because bridges
store and forward complete packets, while repeaters forward all electrical signals.
Bridges differ from routers because bridges use physical addresses, while routers use IP
addresses.
broadcast The process of sending packets from a source to multiple destinations. All the ports of
the nodes in the network can receive packets.
Broadcast A means of delivering information to all members in a network. The broadcast range is
determined by the broadcast address.
BSC Base Station Controller
BSS Base Station Subsystem
Build-in WDM A function which integrates some simple WDM systems into products that belong to the
OSN series . That is, the OSN products can add or drop several wavelengths directly.
Building Integrated A building timing supply that minimizes the number of synchronization links entering
Timing Supply an office. Sometimes referred to as a synchronization supply unit.
BWS Backbone WDM System
A.4 C
cabling The method by which a group of insulated conductors is mechanically assembled or
twisted together.
cabling aperture A hole which is used for cable routing in the cabinet.
Cabling frame The frame which is used for cable routing over the cabinet.
cabling trough The trough which is used for cable routing in the cabinet.

captive nut Captive nuts (or as they are more correctly named, 'tee nuts') have a range of uses but
are more commonly used in the hobby for engine fixing (securing engine mounts to the
firewall), wing fixings, and undercarriage fixing.
CAR See committed access rate
CAS Channel Associated Signaling
CBR See Constant Bit Rate
CBS Committed Burst Size
CCDP Co-Channel Dual Polarization
CCM Continuity Check Message
CDR Clock and Data Recovery
CDVT See Cell Delay Variation Tolerance
Cell Delay Variation This parameter measures the tolerance level a network interface has to aggressive
Tolerance sending (back-to-back or very closely spaced cells) by a connected device, and does not
apply to end-systems.
Centralized alarm The system that gathers all the information about alarms into a certain terminal console.
system
CFM Connectivity Fault Management
Chain network One type of network that all network nodes are connected one after one to be in series.
channel A telecommunication path of a specific capacity and/or at a specific speed between two
or more locations in a network. The channel can be established through wire, radio
(microwave), fiber or a combination of the three.The amount of information transmitted
per second in a channel is the information transmission speed, expressed in bits per
second. For example, b/s (100 bit/s), kb/s (103 bit/s), Mb/s (106 bit/s), Gb/s (109 bit/s),
and Tb/s (1012 bit/s).
CIR Committed Information Rate
Circuit The circuit of the service port on the access device.
CIST Common and Internal Spanning Tree
class of service Class of service (CoS) is a technology or method used to classify services into different
categories according to the service quality.
Class of Service Class of Service is abbreviated to CoS. CoS is a rule for queuing. It classifies the packets
according to the service type field or the tag in packets, and specifies different priorities
for them. All the nodes in DiffServ domain forwards the packets according to their
priorities.
client A device that sends requests, receives responses, and obtains services from the server.
Clock Synchronization Also called frequency synchronization, clock synchronization means that the signal
frequency traces the reference frequency, but the start point need not be consistent.
Clock tracing The method to keep the time on each node being synchronized with a clock source in a
network.
CLP Cell Loss Priority
CM See Configuration Management

committed access rate A traffic control method that uses a set of rate limits to be applied to a router interface.
CAR is a configurable method by which incoming and outgoing packets can be classified
into QoS (Quality of Service) groups, and by which the input or output transmission rate
can be defined.
Concatenation A process that combines multiple virtual containers. The combined capacities can be
used a single capacity. The concatenation also keeps the integrity of bit sequence.
Configuration Data A command file for an NE which defines the configuration of the NE hardware. With
the file, the NE can coordinate with other NEs in the entire network. Configuration data
is the key factor for the normal running of the entire network.
Configuration In a network, a system for gathering current configuration information from all nodes in
Management a LAN.
Configure To set the basic parameters of an operation object.
congestion An extra intra-network or inter-network traffic resulting in decreasing network service
efficiency.
Connection point A reference point where the output of a trail termination source or a connection is bound
to the input of another connection, or where the output of a connection is bound to the
input of a trail termination sink or another connection. The connection point is
characterized by the information which passes across it. A bidirectional connection point
is formed by the association of a contradirectional pair.
Constant Bit Rate constant bit rate. A kind of service categories defined by the ATM forum. CBR transfers
cells based on the constant bandwidth. It is applicable to service connections that depend
on precise clocking to ensure undistorted transmission.
convergence It refers to the speed and capability for a group of networking devices to run a specific
routing protocol. It functions to keep the network topology consistent.
Convergence A process in which multiple channels of low-rate signals are multiplexed into one or
several channels of required signals.
Convergence service A service that provides enhancements to an underlying service in order to provide for
the specific requirements of the convergence service user.
Conversion In the context of message handling, a transmittal event in which an MTA transforms
parts of a message content from one encoded information type to another, or alters a
probe so it appears that the described messages were so modified.
corrugated tube N/A
CoS See class of service
CoS See Class of Service
CPU Central Processing Unit
CRC See Cyclic Redundancy Check
current alarm An alarm in unrecovered and unacknowledged state, unrecovered and acknowledged
state, or recovered and unacknowledged state. Treatment measures must be taken on
these alarms.
Current Performance Performance data stored in the current register. An NE provides two types registers for
Data each performance parameter of the performance monitoring entity. The registers are 15-
minute register and 24-hour register, which are used to accumulate the performance data
within the current monitoring period.

Cyclic Redundancy A procedure used in checking for errors in data transmission. CRC error checking uses
Check a complex calculation to generate a number based on the data transmitted. The sending
device performs the calculation before transmission and includes it in the packet that it
sends to the receiving device. The receiving device repeats the same calculation after
transmission. If both devices obtain the same result, it is assumed that the transmission
was error free. The procedure is known as a redundancy check because each transmission
includes not only data but extra (redundant) error-checking values. Communications
protocols such as XMODEM and Kermit use cyclical redundancy checking.
A.5 D
DC Direct Current
DCC Data Communication Channel
DCD Data Carrier Detect
DCE Data Circuit-terminal Equipment
DCN Data Communication Network
DDF See Digital Distribution Frame
DDN Digital Data Network
Defect A limited interruption in the ability of an item to perform a required function.
demultiplexing To separate from a common input into several outputs. Demultiplexing occurs at many
levels. Hardware demultiplexes signals from a transmission line based on time or carrier
frequency to allow multiple, simultaneous transmissions across a single physical cable.
Device set It is an aggregate of multiple managed equipments. Device set facilitates the authority
management on devices in the management domain of the U2000. If some operation
authorities over one device set are assigned to a user (user group), these operation
authorities over all devices of the device set are assigned to the user (user group), thus
eliminating the need to set the operation authorities over these devices respectively. It is
suggested to design device set according to such criteria as geographical region, network
level, device type, etc.
differentiated services Values for a 6-bit field defined for the IPv4 and IPv6 packet headers that enhance class
code point of service (CoS) distinctions in routers.
Differentiated Services Differentiated Services CodePoint. A marker in the header of each IP packet using bits
Code Point 0-6 in the DS field. Routers provide differentiated classes of services to various service
streams/flows based on this marker. In other words, routers select corresponding PHB
according to the DSCP value.
DiffServ Differentiated Services
Digital Distribution Digital Distribution Frame. A frame which is used to transfer cables.
Frame

digital signal A signal in which information is represented by a limited number of discrete states—for
example, high and low voltages—rather than by fluctuating levels in a continuous stream,
as in an analog signal. In the pulse code modulation (PCM) technology, the 8 kHz
sampling frequency is used and a byte contains 8 bits in length. Therefore, a digital signal
is also referred to as a byte-based code stream. Digital signals, with simple structures
and broad bandwidth, are easy to shape or regenerate, and are not easily affected by
external interference.
Distributed Link The distributed link aggregation group (DLAG) is a board-level port protection
Aggregation Group technology used to detect unidirectional fiber cuts and to negotiate with the opposite end.
In the case of a link down failure on a port or a hardware failure on a board, the services
can automatically be switched to the slave board, thus realizing 1+1 protection for the
inter-board ports.
DLAG See Distributed Link Aggregation Group
DNI See Dual Node Interconnection
domain A logical subscriber group based on which the subscriber rights are controlled.
DQDB Distributed Queue Dual Bus
DSCP See differentiated services code point
DSCP See Differentiated Services Code Point
DSL Digital Subscriber Line
DSLAM Digital Subscriber Line Access Multiplexer
DSR Data Set Ready
DTE Data Terminal Equipments
DTR Data Terminal Ready
Dual Node DNI provides an alternative physical interconnection point, between the rings, in case
Interconnection of an interconnection failure scenario.
DVB-ASI Digital Video Broadcast- Asynchronous Serial Interface
DVMRP Distance Vector Multicast Routing Protocol
DWDM Dense Wavelength Division Multiplexing
A.6 E
E-AGGR Ethernet-Aggregation
E-LAN Ethernet LAN
E-LAN A L2VPN service type that is provided for the user Ethernet in different domains over
the PSN network. For the user Ethernet, the entire PSN network serves as a Layer 2
switch.
E-Line Ethernet line. An point-to-point private service type that is provided for the user Ethernet
in different domains.
Ear bracket A component on the side of the subrack. It is used to install the subrack into a cabinet.
ECC See Embedded Control Channel

EFM Ethernet in the First Mile

ElectroStatic Discharge A sudden flow of electric current through a material that is normally an insulator.
Embedded Control An ECC provides a logical operations channel between SDH NEs, utilizing a data
Channel communications channel (DCC) as its physical layer.
EMS Element Management System
encapsulation The technique used by layered protocols to add header information and possibly tail
information to the protocol data unit.
Enterprise System A path protocol which connects the host with various control units in a storage system.
Connection It is a serial bit stream transmission protocol. The transmission rate is 200 Mbit/s.
Entity A part, device, subsystem, functional unit, equipment or system that can be individually
considered. For ETH-OAM, an OAM entity generally refers to a specified system or
subsystem that supports the OAM protocol. For example, a Huawei Ethernet service
processing board is an OAM entity.
EoD Ethernet over Dual Domains
EPL See Ethernet Private Line
EPLAN Ethernet Private LAN Service
ESCON See Enterprise System Connection
ESD See ElectroStatic Discharge
ESD jack Electrostatic discharge jack. A hole in the cabinet or shelf, which connect the shelf or
cabinet to the insertion of ESD wrist strap.
Ethernet A technology complemented in LAN. It adopts Carrier Sense Multiple Access/Collision
Detection. The speed of an Ethernet interface can be 10 Mbit/s, 100 Mbit/s, 1000 Mbit/
s or 10000 Mbit/s. The Ethernet network features high reliability and easy maintaining..
Ethernet Alarm Group The Ethernet alarm group periodically obtain the statistics value to compare with the
configured threshold. If the value exceeds the threshold, an event is reported.
Ethernet Private LAN Both a LAN service and a private service. Transport bandwidth is never shared between
different customers.
Ethernet Private Line A point-to-point interconnection between two UNIs without SDH bandwidth sharing.
Transport bandwidth is never shared between different customers.
ethernet virtual private An Ethernet service type, which carries Ethernet characteristic information over shared
line service bandwidth, point-to-point connections, provided by SDH, PDH, ATM, or MPLS server
layer networks.
ETSI European Telecommunications Standards Institute
EVPL See ethernet virtual private line service
Exercise Switching An operation to check if the protection switching protocol functions normally. The
protection switching is not really performed.
Exerciser - Ring This command exercises ring protection switching of the requested channel without
completing the actual bridge and switch. The command is issued and the responses are
checked, but no working traffic is affected.
Extended ID The number of the subnet that an NE belongs to, for identifying different network
segments in a WAN. The extended ID and ID form the physical ID of the NE.

extra traffic The traffic that is carried over the protection channels when that capacity is not used for
the protection of working traffic. Extra traffic is not protected.
A.7 F
Failure If the fault persists long enough to consider the ability of an item with a required function
to be terminated. The item may be considered as having failed; a fault has now been
detected.
Fairness For any link specified in a ring network, if the data packets transmitted by the source
node are constrained by the fairness algorithm, the source node is provided with certain
bandwidth capacities. This feature of RPR is called fairness.
fairness algorithm An algorithm designed to ensure the fair sharing of bandwidth among stations in the case
of congestion or overloading.
fault An accidental condition that causes a functinal unit to fail to perform its required
function.
FC Fiber Channel
FD See frequency diversity
FDDI See fiber distributed data interface
FDI Forward Defect Indicator
FE Fast Ethernet
feature code Code(s) used to select/activate a service feature (e.g. forwarding, using two or three digit
codes preceded by * or 11 or #, and which may precede subsequent digit selection).
FEC See forwarding equivalence class
FEC See Forward Error Correction
fiber A kind of fiber used for connections between the subrack and the ODF, and for
connections between subracks or inside a subrack.
Fiber Connect. A new generation connection protocol which connects the host with various control units.
It carries single byte command protocol through the physical path of fiber channel, and
provides higher rate and better performance than ESCON.
Fiber Connector A device installed at the end of a fiber, optical source or receive unit. It is used to couple
the optical wave to the fiber when connected to another device of the same type. A
connector can either connect two fiber ends or connect a fiber end and a optical source
(or a detector).
fiber distributed data A standard developed by the American National Standards Institute (ANSI) for high-
interface speed fiber-optic local area networks (LANs). FDDI provides specifications for
transmission rates of 100 megabits (100 million bits) per second on networks based on
the token ring network.

fiber/cable Fiber & Cable is the general name of optical fiber and cable. It refers to the physical
entities that connect the transmission equipment, carry transmission objects (user
information and network management information) and perform transmission function
in the transmission network. The optical fiber transmits optical signal, while the cable
transmits electrical signal. The fiber/cable between NEs represents the optical fiber
connection or cable connection between NEs. The fiber/cable between SDH NEs
represents the connection relation between NEs. At this time, the fiber/cable is of optical
fiber type.
FICON See Fiber Connect
FIFO First In First Out
Flow An aggregation of packets that have the same characteristics. On the T2000 or NE
software, flow is a group of classification rules. On boards, it is a group of packets that
have the same quality of service (QoS) operation. At present, two flows are supported:
port flow and port+VLAN flow. Port flow is based on port ID and port+VLAN flow is
based on port ID and VLAN ID. The two flows cannot coexist in the same port.
Forced switch This function forces the service to switch from the working channel to the protection
channel, with the service not to be restored automatically. This switch occurs regardless
of the state of the protection channels or boards, unless the protection channels or boards
are satisfying a higher priority bridge request.
Forward Error A bit error correction technology that adds the correction information to the payload at
Correction the transmit end. Based on the correction information, the bit errors generated during
transmission are corrected at the receive end.
forwarding equivalence A term used in Multiprotocol Label Switching (MPLS) to describe a set of packets with
class similar or identical characteristics which may be forwarded the same way; that is, they
may be bound to the same MPLS label.
FPGA Field Programmable Gate Array
frame A frame, starting with a header, is a string of bytes with a specified length. Frame length
is represented by the sampling circle or the total number of bytes sampled during a circle.
A header comprises one or a number of bytes with pre-specified values. In other words,
a header is a code segment that reflects the distribution (diagram) of the elements pre-
specified by the sending and receiving parties.
Free-run mode An operating condition of a clock, the output signal of which is strongly influenced by
the oscillating element and not controlled by servo phase-locking techniques. In this
mode the clock has never had a network reference input, or the clock has lost external
reference and has no access to stored data, that could be acquired from a previously
connected external reference. Free-run begins when the clock output no longer reflects
the influence of a connected external reference, or transition from it. Free-run terminates
when the clock output has achieved lock to an external reference.
frequency diversity A diversity scheme that enables two or more microwave frequencies with a certain
frequency interval are used to transmit/receive the same signal and selection is then
performed between the two signals to ease the impact of fading.
FTP File Transfer Protocol
Full duplex The system that can transmit information in both directions on a communication link.On
the communication link, both parties can send and receive data at the same time.

A.8 G
Gain The ratio between the optical power from the input optical interface of the optical
amplifier and the optical power from the output optical interface of the jumper fiber,
which expressed in dB.
Gateway IP When an NE accesses a remote network management system or NE, a router can be used
to enable the TCP/IP communication. In this case, the IP address of the router is the
gateway IP. Only the gateway NE requires the IP address. The IP address itself cannot
identify the uniqueness of an NE. The same IP addresses may exist in different TCP/IP
networks. An NE may have multiple IP addresses, for example, one IP address of the
network and one IP address of the Ethernet port.
Gateway Network Gateway NE refers to the NE that communicates with the NMS via Ethernet or serial
Element port line. The non-gateway NE communicates with the gateway NE via ECC and
communicates with the NMS via the gateway NE. The gateway NE is a communication
route that the U2000 must pass through when managing the entire network. The
communication status between the gateway NE and the U2000 can be:(1) Normal: The
current communication is efficient; (2) Connecting: The destination gateway responds,
and the communication is interrupted but is being connected; (3) Disconnected: The
destination gateway does not respond (Maybe the network cable is disconnected or not
within the same network segment), and the communication is unreachable or the gateway
is disabled manually.
GE Gigabit Ethernet
GFP Generic Framing Procedure
GFP GFP is a framing and encapsulated method which can be applied to any data type. It has
been standardized by ITU-T SG15.
GNE See Gateway Network Element
GPS Global Positioning System
GSM Global System for Mobile Communications
GTS Generic Traffic Shaping
GUI Graphic User Interface
A.9 H
half-duplex An operation mode of the Ethernet port. In half-duplex mode, a port can only send or
receive data at a time.
handle A component of the panel. It is used to insert or remove boards and RTMs in and out of
slots.
Hardware loopback A connection mode in which a fiber jumper is used to connect the input optical interface
to the output optical interface of a board to achieve signal loopback.
HDLC High level Data Link Control
HEC Header Error Control
History alarm The confirmed alarms that have been saved in the memory and other external memories.

History Performance The performance data that is stored in the history register or that is autoreported and
Data stored in the NMS.
HP Higher Order Path
HPT Higher Order Path Termination
A.10 I
IC Integrated Circuit
IDU Indoor Unit
IEEE Institute of Electrical and Electronics Engineers
IETF Internet Engineering Task Force
IF Intermediate Frequency
IGMP See Internet Group Management Protocol
IGMP Snooping IGMP proxy means that in some network topologies, the device does not set up the
multicast routes, but to learn the information about the accessed multicast group members
and forward it to the upstream multicast router. The upstream multicast router sets up
the multicast routes.
IMA frame The IMA frame is used as the unit of control in the IMA protocol. It is a logical frame
defined as M consecutive cells, numbered 0 to M-l, transmitted on each of the N links
in an IMA group.
Input jitter tolerance The maximum amplitude of sinusoidal jitter at a given jitter frequency, which, when
modulating the signal at an equipment input port, results in no more than two errored
seconds cumulative, where these errored seconds are integrated over successive 30
second measurement intervals.
Intelligent power The factors such as fiber cut, degradation of equipment, and removal of connectors may
adjusting result in the loss of the optical power signals. The function of intelligent power adjusting
(IPA) enables the ROP laser and booster amplifier (BA) of a section to be shut down
automatically. In this way, the maintainers, their eyes in particular, can be protected for
the exposed optical fibers when they are performing the repairs.
Interface board area The area for the interface boards on the subrack.
Internal cable The cables and optical fibers which are used for interconnecting electrical interfaces and
optical interfaces within the cabinet.
Internet Group The protocol for managing the membership of Internet Protocol multicast groups among
Management Protocol the TCP/IP protocols. It is used by IP hosts and adjacent multicast routers to establish
and maintain multicast group memberships.
IP Internet Protocol
IP address In the TCP/IP protocol, it is used to uniquely identify the 32-bit address of the
communication port, An IP address consists of a network ID and a unique host ID. An
IP address consists of the decimal values of its eight bytes, separated with periods; for
example,192.168.7.27.
IP over DCC The IP Over DCC follows TCP/IP telecommunications standards and controls the remote
NEs through the Internet. The IP Over DCC means that the IP over DCC uses overhead
DCC byte (the default is D1-D3) for communication.

IPA See Intelligent power adjusting

IS-IS Intermedia System-Intermedia System
ISDN Integrated Services Digital Network
ISO International Standard Organization
ISP Internet Service Provider
IST Internal Spanning Tree
ITU-T International Telecommunication Union Telecommunication Standardization
A.11 J
Jitter Short waveform variations caused by vibration, voltage fluctuations, and control system
instability.
jitter tolerance Jitter tolerance is defined as the peak-to-peak amplitude of sinusoidal jitter applied on
the input ATM-PON signal that causes a 1 dB optical power penalty at the optical
equipment.
A.12 L
label A mark on a cable, a subrack, or a cabinet for identification.
Label A short identifier that is of fixed length and local significance. A label is used to uniquely
identify the FEC to which a packet belongs. A label does not contain topology
information. It is carried in the header of a packet and does not contain topology
information.
LACP See Link Aggregation Control Protocol
LAG See link aggregation group
LAN Local Area Network
LAPS Link Access Procedure-SDH
Laser A component that generates directional optical waves of narrow wavelengths. The laser
light has better coherence than ordinary light. The fiber system takes the semi-conductor
laser as the light source.
Layer A concept used to allow the transport network functionality to be described hierarchically
as successive levels; each layer being solely concerned with the generation and transfer
of its characteristic information.
layer 2 switch A data forwarding method. In LAN, a network bridge or 802.3 Ethernet switch transmits
and distributes packet data based on the MAC address. Since the MAC address is the
second layer of the OSI model, this data forwarding method is called layer 2 switch.
LB See Loopback
LBM Loopback Message
LBR Loopback Reply
LC Lucent Connector

LCAS See Link Capacity Adjustment Scheme

LCD Liquid Crystal Display
LCT See Local craft terminal
License A permission that the vendor provides for the user with a specific function, capacity, and
durability of a product. A license can be a file or a serial number. Usually the license
consists of encrypted codes, and the operation authority varies with different level of
license.
Link In the topology view, a link is used to identify the physical or logical connection between
two topological nodes.
Link Aggregation Link Aggregation Control Protocol (LACP) is part of an IEEE specification (802.3ad)
Control Protocol that allows you to bundle several physical ports to form a single logical channel. LACP
allows a switch to negotiate an automatic bundle by sending LACP packets to the peer.
link aggregation group An aggregation that allows one or more links to be aggregated together to form a link
aggregation group so that a MAC client can treat the link aggregation group as if it were
a single link.
Link Capacity The Link Capacity Adjustment Scheme (LCAS) is designed to allow the dynamic
Adjustment Scheme provisioning of bandwidth, using VCAT, to meet customer requirements.
LLC Logical Link Control
Local craft terminal A single layer network management scheme that manages a transmission network
consisting of a maximum of five NEs. In this way, the comprehensive management of
the multi-service transmission network is achieved. Normally, the cross-over network
cables and serial port cables are used to connect the local craft terminal (LCT) to an NE.
Then, the LCT can configure and maintain a single NE.
Locked switching When the switching condition is satisfied, this function disables the service from being
switched from the working channel to the protection channel. When the service has been
switched, the function enables the service to be restored from the protection channel to
the working channel.
LOF Loss of frame
LOM Loss Of Multiframe
Loopback A troubleshooting technique that returns a transmitted signal to its source so that the
signal or message can be analyzed for errors.
LOS Loss Of Signal
Lower Threshold When the performance event count value is smaller than a certain value, a threshold-
crossing event occurs. The value is the lower threshold.
LP Lower Order Path
LPT Link State Pass Through
LSP Label Switched Path
LSR Label Switching Router
LT Link Trace

A.13 M
MA See Maintenance Association
MAC Medium Access Control
Maintenance That portion of a Service Instance, preferably all of it or as much as possible, the
Association connectivity of which is maintained by CFM. It is also a full mesh of Maintenance
Entities.
Maintenance Domain The network or the part of the network for which faults in connectivity are to be managed,
belonging to a single administration. The boundary of a Maintenance Domain is defined
by a set DSAPs, each of which may become a point of connectivity to a Service Instance.
MAN See Metropolitan Area Network
Manual switching A protection switching. When the protection path is normal and there is no request of a
higher level switching, the service is manually switched from the working path to the
protection path, to test whether the network still has the protection capability.
Mapping A procedure by which tributaries are adapted into virtual containers at the boundary of
an SDH network.
Marking-off template A quadrate cardboard with four holes. It is used to mark the positions of the installation
holes for the cabinet.
MBS Maximum Burst Size
MCF Message Communication Function
MCR Minimum Cell Rate
MD See Maintenance Domain
Mean launched power The average power of a pseudo-random data sequence coupled into the fibre by the
transmitter.
MEP Maintenance End Point
Metropolitan Area A metropolitan area network (MAN) is a network that interconnects users with computer
Network resources in a geographic area or region larger than that covered by even a large local
area network (LAN) but smaller than the area covered by a wide area network (WAN).
The term is applied to the interconnection of networks in a city into a single larger
network (which may then also offer efficient connection to a wide area network). It is
also used to mean the interconnection of several local area networks by bridging them
with backbone lines. The latter usage is also sometimes referred to as a campus network.
MIB Management Information Base
MIP Maintenance Intermediate Point
MODEM MOdulator-DEModulator
MP Maintenance Point
MPID Maintenance Point Identification
MPLS See Multi-Protocol Label Switch
MS Multiplex Section
MSA Multiplex Section Adaptation

MSOH See Multiplex Section Overhead

MSP See multiplex section protection
MST Multiplex Section Termination
MSTI Multiple Spanning Tree Instance
MSTP See Multi-service transmission platform
MSTP See Multiple spanning tree protocol
MTIE Maximum Time Interval Error
MTU Maximum Transmission Unit
Multi-Protocol Label A technology that uses short tags of fixed length to encapsulate packets in different link
Switch layers, and provides connection-oriented switching for the network layer on the basis of
IP routing and control protocols. It improves the cost performance and expandability of
networks, and is beneficial to routing.
Multi-service It is based on the SDH platform, capable of accessing, processing and transmitting TDM
transmission platform services, ATM services, and Ethernet services, and providing unified management of
these services.
Multicast A process of transmitting packets of data from one source to many destinations. The
destination address of the multicast packet uses Class D address, that is, the IP address
ranges from 224.0.0.0 to 239.255.255.255. Each multicast address represents a multicast
group rather than a host.
Multiple spanning tree The MSTP can be used in a loop network. Using an algorithm, the MSTP blocks
protocol redundant paths so that the loop network can be trimmed as a tree network. In this case,
the proliferation and endless cycling of packets is avoided in the loop network. The
protocol that introduces the mapping between VLANs and multiple spanning trees. This
solves the problem that data cannot be normally forwarded in a VLAN because in STP/
RSTP, only one spanning tree corresponds to all the VLANs.
Multiplex Section The overhead that comprises rows 5 to 9 of the SOH of the STM-N signal. See SOH
Overhead definition.
multiplex section A function, which is performed to provide capability for switching a signal between and
protection including two multiplex section termination (MST) functions, from a "working" to a
"protection" channel.
Multiplexing A procedure by which multiple lower order path layer signals are adapted into a higher
order path or the multiple higher order path layer signals are adapted into a multiplex
section.
A.14 N
N+1 protection A radio link protection system composed of N working channels and one protection
channel.
NE See network element
NE Explorer The main operation interface, of the U2000, which is used to manage the OptiX
equipment. In the NE Explorer, the user can configure, manage and maintain the NE,
boards, and ports on a per-NE basis.

network element A network element (NE) contains both the hardware and the software running on it. One
NE is at least equipped with one system control board which manages and monitors the
entire network element. The NE software runs on the system control board.
network node interface The interface at a network node which is used to interconnect with another network node.
network segment Network Segment means any discrete part of the Network.
NLP Normal Link Pulse
NMS Network Management System
NNI See network node interface
NPC Network Parameter Control
nrt-VBR Non Real-Time Variable Bit Rate
NRZ Non Return to Zero code
NSAP Network Service Access Point
NTP Network Time Protocol
A.15 O
OA See Optical Amplifier
OADM Optical Add/Drop Multiplexer
OAM Operations, Administration and Maintenance
OAM auto-discovery In the case of OAM auto-discovery, two interconnected ports, enabled with the Ethernet
in the First Mile OAM (EFM OAM) function, negotiate to determine whether the mutual

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HUAWEI TECHNOLOGIES CO., LTD.

Trademarks and Permissions

Huawei Technologies Co., Ltd.

Issue 06 (2011-01-20) Huawei Proprietary and Confidential i

About This Document

Product Name Version

OptiX OSN 2500 V100R010

This document is intended for:

l Network design and planning engineers

Indicates a hazard with a high level of risk, which if not

Indicates a hazard with a medium or low level of risk, which

Issue 06 (2011-01-20) Huawei Proprietary and Confidential iii

Indicates a potentially hazardous situation, which if not

NOTE Provides additional information to emphasize or supplement

Boldface Buttons, menus, parameters, tabs, window, and dialog titles

> Multi-level menus are in boldface and separated by the ">"

Updates in Issue 06 (2011-01-20) Based on Product Version

l Topic "EoS/EoP Boards" has the following changes:

iv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Updates in Issue 05 (2010-11-05) Based on Product Version

l Topic "EoS/EoP Boards" has the following changes:

Updates in Issue 04 (2010-06-20) Based on Product Version

Updates in Issue 03 (2010-03-31) Based on Product Version

l The topic "RPC Power Cable" is added.

Issue 06 (2011-01-20) Huawei Proprietary and Confidential v

Updates in Issue 02 (2010-02-12) Based on Product Version

Updates in Issue 01 (2009-12-30) Based on Product Version

l The description of the EFP0 is added to the topic "EoS/EoP Boards".

Updates in Issue 04 (2009-08-30) Based on Product Version

vi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Updates in Issue 03 (2009-06-30) Based on Product Version

Updates in Issue 02 (2009-03-30) Based on Product Version

Issue 06 (2011-01-20) Huawei Proprietary and Confidential vii

Updates in Issue 01 (2009-01-15) Based on Product Version

Updates in Issue 04 (2009-02-20) Based on Product Version

Update the "75-ohm 8xE1 Cable".

Several bugs are fixed.

Updates in Issue 03 (2008-07-30) Based on Product Version

Several bugs in this document of the previous version are fixed.

Updates in Issue 02 (2008-04-30) Based on Product Version

Descriptions of the N2EGS4A are added.

viii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Updates in Issue 01 (2007-12-25) Based on Product Version

Issue 06 (2011-01-20) Huawei Proprietary and Confidential ix

About This Document...................................................................................................................iii

4 Board List and Classification...................................................................................................4-1

5 Cross-Connect Boards and System Control Boards.............................................................5-1

Issue 06 (2011-01-20) Huawei Proprietary and Confidential xi

5.1.9 Configuring and Commissioning the Board.........................................................................................5-18

xii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Issue 06 (2011-01-20) Huawei Proprietary and Confidential xiii

6.1.1 Version Description................................................................................................................................6-4

xiv Huawei Proprietary and Confidential Issue 06 (2011-01-20)

Issue 06 (2011-01-20) Huawei Proprietary and Confidential xv

xvi Huawei Proprietary and Confidential Issue 06 (2011-01-20)

6.11.8 Parameter Settings............................................................................................................................6-119

Issue 06 (2011-01-20) Huawei Proprietary and Confidential xvii

6.15.10 Parameter Settings..........................................................................................................................6-159

xviii Huawei Proprietary and Confidential Issue 06 (2011-01-20)

6.18.4 Working Principle and Signal Flow.................................................................................................6-194

Issue 06 (2011-01-20) Huawei Proprietary and Confidential xix

7.2.10 Configuring and Commissioning the Board.......................................................................................7-22