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Multiple Choice Questions–

Chapter 3

Each question has four choices. Choose most appropriate choice of the answer.

1. In serial communication in synchronous mode (i) serial data input and clock
pulse-input can be on same input line (ii) can be on separate lines (iii) clock
pulses can encode the serial data bits suitably (iv) clock pulses can modulate the
serial data bits suitably (v) Receiver detects the clock pulses and receives data
bits after decoding or demodulating (vi) Synchronous serial input is also called
master output slave input (MOSI) when the SCLK is sent from the sender to the
receiver and slave is forced to synchronize sent inputs from the master as per the
master clock inputs. (vii) Synchronous serial input is also called master input
slave output (MISO) when the SCLK is sent to the sender

(a) all except i (b)i, ii, iv, vi and vii (c) all (d) i, iii, vi and vii

2. (a) UART mode communication is asynchronous and data transfer rate is


measured by baud/s (b) UART mode communication is synchronous, provides
start sync code and data transfer rate is measured by baud/s (c) UART mode
communication is synchronous and data transfer rate is measured by bit/s (d)
UART mode communication musts provide for parity bit before the stop bit.

3. COM port handshaking signals are (i) DCD, (ii) DSR, (iii) DTR, (iv) RTS, (v) CTS
(vi) start bit (vii) parity bit (viii) RxD, (ix) TxD and (x) INTR

(a) all except x (b) i, ii, iii, iv, v (c) all except viii and ix (d) iv, v and x

4. Example of (i) serial synchronous port output is writing to flash memory using
SDIO (Secure Data Association IO based card) (ii) serial asynchronous port is
multiprocessor communication (iii) serial synchronous communication is keypad
controller serial data-in (iv) serial synchronous output is output from modem (v)
parallel port input is signal on achieving preset pressure in a boiler, (vi) parallel
port output is pulses to an external circuit (vii) serial port output is output to LCD
controller for multilane LCD display matrix unit in a cellular phone to display on
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the screen the phone number, time, messages, character outputs or pictogram bit-
images

(a) all except vii (b) i, ii, iii, iv, v (c) all except v, vi and vii (d) i, v and vi

5. RS232CCOM port in personal computer has (i) UART mode communication on


serial lines TxD and RxD (ii) USB and not RS232C port is used for
communication between the mice and computer (iii) Voltage levels for TxD data
transmissions are − 5V to − 15 V for logic 0 (iv) Voltage levels for RxD data
receiver are − 3V to − 25 V for logic 0 (v) Bluetooth device in mobile phone can
be connected to the COM port (vi) mobile phone WiFi device can be connected to
the COM port.

(a) i, iii, iv and v (b) i, ii, v and vi (c) ii, v and vi (d) i, iv and vi

6. SP interface (SPI) signals are (a) at slave are SS, MOSI, MISO and SCLK and
are input, output, input and output, respectively (b) at master are SS, MOSI,
MISO and SCLK and are input, output, input and output, respectively (c) at
master are SS, MOSI, MISO and SCLK and are all outputs (d) at slave are SS,
MOSI, MISO and are all inputs

7. SDIO card (i) has parity check provision for transferred data (ii) has CRC check
on transferred data (iii) has SPI mode 50 Mbps (iv) has single bit SD mode 50 bps
(v) has 4-bit parallel for SD data transfer at 200 Mbps (vi) enhance serial transfer
rate 4-times by compromising between serial and parallel bits communication
(vii) specifications of additional tries by retransmission on error.

(a) i, iv and v (b ii, v and vi (c) ii, vi and vii (d) all

8. A parallel device port can have (i) parallel inputs (ii) parallel outputs (iii) bi-
directional (iv) quasi-bi-directional IOs (v) handshaking signals (vi) control pins
for control-signal outputs to external circuit (vii) status pins for inputs of status
signals to external circuit.

(a) i and ii (b i, ii, vi and viii (c) i, ii, iii and v (d) i, ii, either iii or iv, v, vii and
viii

9. A wireless device port (i) can have parallel inputs (ii) can have parallel outputs
(iii) can have serial inputs (iv) can have serial outputs (v) can have protocols
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named as FHSS or DSSS (vi) protocols named as Bluetooth or ZigBee or 802.11


or IrDA, (vii) cannot us ZigBee or 802.11 (viii) cannot use IrDA

(a) iii, iv, vii and viii (b i or iii, ii or iv and vi (c) i, ii, iii and iv (d) iii, iv and vi
10. A real time clock (a) can be stopped or reset after the system start and can be
programmed (b) can not be stopped or reset after the system start and uses the free
running counter and clock source (c) cannot be used for measuring timing interval
between two events (d) cannot be used by user programs

11. A watchdog timer is timing device such that it is (a) set for a preset time interval
by program and an event must occur during that interval else the device will
generate the timeout signal for the failure to get that event in the watched time
interval (b) internally preset for a time interval in a microcontroller and generates
the timeout signal for the event occurrence in the watched time interval (c) can be
used as real time clock (d) can be used to find variation in processor clock rate
during watched interval.

12. The I2C Bus (i) has two lines that carry its signals— one line is for the clock and
one is for bi-directional data (ii) has one line that carry its signal, which is clock
encoded bi-directional data (iii) has three Industrial 100 kbps I2C, 100 kbps SM
I2C, and 400 kbps I2C (iv) four Industrial 200 kbps I2C, 150 kbps SM I2C, and 400
kbps and 600 kbs I2C (v) each device has an address using which the data
transfers take place and master can address 127 other slaves at an instance. (vi)
master can address 255 other slaves at an instance (vii) master has at a processing
element functioning as bus controller or a microcontroller with I2C bus interface
circuit. (viii) master and slave both should have a processing element functioning
as bus controller or a microcontroller with I2C bus interface circuit (ix) at an
instance, master is one, which initiates a data transfer (x) at an instance, master or
slave can initiate a data transfer.

(a) ii, iii, vi, viii and x (b i, iii, vi, viii and x (c) i, iii, v, vii and ix (d) ii, iv, v and
x

13. CAN (i) serial line is uni-directional. (ii) A CAN device can simultaneously
receive and send a bit at an instance by operating at the maximum rate of 10
Mbps. (iii) It employs a coaxial pair connection to each node. (iv) the cable pair
runs up to a maximum length of 200 m. (v) CAN serial line is pulled to logic level
'1' by a resistor between the line and + 9 V to +12.3 V. Line is at logic '0' in its
idle state '
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(a) all (b) none (c) ii and v (d) i, ii and iv

14. (i) USB is a serial bus for interconnecting the systems (ii) USB is a parallel bus
(iii) Wireless USB 2.0 use 900 MHz frequencies (iv) Wireless USB 2.0 use UWB
(ultra wide band) (v) Wireless USB 2.0 use 3.1 to 10.6 GHz band. (vi) USB
device attached, detached and reattached to a system by USB controller (vii) USB
bus can be organized like a tree structure. (viii) USB bus can be organized like a
parallel structure (ix) USB is an independent requesting devices bus .

(a) ii, iii, vi, viii and ix (b) i and vi (c) i, v and ix (d) i, iv, v, vi and vii

15. FireWire is for interconnecting a system with multimedia streaming devices and
systems at (a) high speed 200 Mbps serial bus (b) a high speed 200 Mbps parallel
bus (c) a high speed 400 Mbps parallel bus (d) a high speed 800 Mbps serial bus.

16. PCI (i) is a parallel bus (ii) is a serial bus (iii) interconnects the IO devices and
peripherals over very shot distances and at high speed (iv) interconnects the IO
devices and peripherals up to 10m distances and at high speed (v) is a parallel
bus, which interfaces the system memory bus through a bridge or switching
circuit. (vi) system memory bus and I/O bus connects for simultaneous data
transfer to the memory and I/O devices.

(a) ii, iv and vi (b) i and vi (c) i, iv and v (d) i, iii and v

17. All Internet enabled devices communicate using (i) an IP protocol (ii) HTTP
protocol (iii) the transport layer data, which is to transmit on the network, divides
into the packets at the network layer using IP (iv) the transport layer data, which
is to transmit on the network, divides into the packets at the network layer using
TCP (v) packet has a maximum of 216 bytes (vi) packet has a maximum of 28
bytes . (vii) packet transmits through a chain of Ethernet LANs on the Internet
(viii) packet transmits through a chain of routers on the Internet. (ix) Several
packets form a source can reach a destination using different routes and can have
different delays. (x) packets should reach in sequence and routers ensure that.

(a) ii, iv, vi and ix (b) i and vii (c) i, iii, v, viii and ix (d) all except v

18. IrDA (Infrared Data Association) protocol suite as a standard in which (i) data
transfer rates of up to 16 Mbps (ii) uni-directional serial communication over viewing
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angle between ± 30° (iii) distance of up to nearly 10 m (iv) there should be no obstructions
or wall in between the source and receiver (v) 5 levels of communication, (vi) Level 1,
SyncML (synchronization markup language) based communication (vii) Level 2 access-
based communication, (viii) Level 3 is index-based communication. (ix) Level 4 is sync
communication (for example, ActiveSync or HotSync) (x) Level 5 minimum required
communication.

(a) i, ii, iii, iv, vi and vii (b) iii and iv (c) iv, v, vii, viii and ix (d) all except v and x

19. (i) Bluetooth is an IEEE standard 802.16.1 protocol. (ii) Physical layer radio
communicates at carrier frequencies in 3.1 GHz to 10 GHz band (iii) DSSS (direct
sequence spread spectrum) (iv) data transfer is between two devices or between a
device and multiple devices range up to 100 m low power and up to 500 m high power
(v) supports automatic self-discovery (vi) supports self-organization of network in
number of devices.

(a) i, ii, iii, iv and vi (b) i, iii and iv (c) v and vi (d) all

20. (a) Wireless LAN uses IEEE standards 802.11a to 802.11g. (b) Data transfer rates
are 16 Mbps and 32 Mbps. (c) The 802.11g is called wireless fidelity (WiFi) (d)
supports data rates of 15.5 Mbps by mapping 8 bits and 11 Mbps mapping 8 bits
simultaneously during modulation.

Solutions to Multiple Choice Questions–


Chapter 3
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
c a b d a b c d d b
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
a c b d d d c c c a

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