IEEE ELECTRON DEVICE LETTERS, VOL. 33, NO.

3, MARCH 2012 441

Measurement of Source Resistance in Top-Contact

Organic Thin-Film Transistors
Vinay K. Singh, Ashish K. Agrawal, and Baquer Mazhari

Abstract—A method for measurement of source resistance in

top-contact organic thin-film transistors is proposed, which uses
an additional floating contact adjacent to the source to sense
the channel voltage under the contact. This allows the source
resistance to be directly estimated from a single device structure.
Two-dimensional numerical simulation results are used to validate
the proposed method. Experimental results obtained with pen-
tacene thin-film transistors are presented to illustrate the proposed
measurement technique.
Index Terms—Contact resistance, organic thin-film transistor
(OTFT), pentacene.

I. I NTRODUCTION
Fig. 1. Schematic of the test structure proposed for estimation of the source

O RGANIC thin-film transistors (OTFTs) are being actively

pursued because of its potential for low-cost fabrication
of large-area circuits. Although considerable improvement in
resistance RS . The source contact has been enlarged to show the current flow
underneath it.

the performance of OTFTs has been achieved, the performance
of these devices still needs improvement for many applications.
Among the factors that limit performance is source contact
resistance, which reduces current and transconductance [1], [2].
It is important to have a simple and accurate technique for
estimation of source resistance in order to develop methods
to reduce its value and include its effect in device and cir-
cuit models. The commonly used transfer-line method (TLM)
[3]–[6] has the disadvantage that it involves measurement of
source–drain resistance of OTFTs of different channel lengths
and the assumption that contact resistance, mobility, etc., re-
main constant from one device to another. It also provides only
the sum of source–drain contact resistances and not their indi-
vidual values. An alternative technique is to use a gated four-
probe measurement [7]–[10], which uses the probes to estimate
channel resistance and then subtracts it from total resistance
to estimate source–drain resistances. Although the technique
uses a single test structure, the use of electrodes between
source/drain has to be carefully done and requires a special
layout to avoid distortion of transistor’s characteristics and is
also suitable only for longer channel lengths. These problems
are completely eliminated in the method proposed in this letter
where a floating electrode outside the channel is employed,
Manuscript received October 19, 2011; revised November 27, 2011;
accepted December 3, 2011. Date of publication January 23, 2012; date of
current version February 23, 2012. The review of this letter was arranged by
Editor A. Flewitt.
The authors are with the Department of Electrical Engineering and Samtel
Center of Display Technology, Indian Institute of Technology Kanpur, Kanpur
208016, India (e-mail: baquer@iitk.ac.in).
Color versions of one or more of the figures in this letter are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LED.2011.2179633
and the probe is used to obtain not the channel resistance but
important and useful information about the contact itself.
II. P ROPOSED M ETHOD
The three-electrode test structure for measurement of source
resistance in top-contact OTFTs is shown in Fig. 1. The test
structure can be viewed as two parallel OTFTs that share a
common-source terminal. The drain terminal D2 of the second
OTFT is biased at zero current so that its voltage is equal to the
voltage at the internal source node Sx . Resistance RSX can be
defined as
VSX
RSX = . (1)
IDS
A measurement of the drain voltage VD2 and the drain
current thus allows resistance RSX between the external source
terminal and the internal node voltage at SX to be directly mea-
sured. However, the actual source resistance RS is between the
internal source node Si ) and the external source terminal. Using
standard transmission-line analysis [11], this source resistance
RS can be expressed as
√
VSi rv × rh
RS = = coth(k × LS ) (2)
IDS W

where k = rh /rv , rv is vertical resistance (in ohms
centimeter-square) under the source contact due to injection and
transport through the bulk of the organic semiconductor, and
rh is the horizontal or lateral resistance (in ohms) due to the
accumulation layer. LS is the source contact length, and W is
the width of the device. This analysis is strictly valid for small
drain biases where injection and transport through the bulk,

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442 IEEE ELECTRON DEVICE LETTERS, VOL. 33, NO. 3, MARCH 2012

which can have nonlinear current voltage characteristics, can be

modeled as linear resistances [13]. However, these conditions
are also necessary for application of traditional TLM and gated
four-probe techniques. Using transmission-line analysis again,
resistance RSX can be expressed as
√
rv × rh
RSX × W = . (3)
sinh(k × LS )
The relationship between the two resistors can be expressed
using (2) and (3)
RSX
= cosh(k × LS ). (4)
RS
Fig. 2. Comparison of voltage VD2 at the floating contact terminal D2 with
First, (4) shows that the measured resistance RSX represents voltage VSX at the source end SX .
a lower bound for RS . Second, if the product kLS  1, then
the two resistors will be the same and can be expressed as
rv
RSX ∼ = RS ∼
= . (5)
W LS
Thus, in cases where source resistance is determined primar-
ily by contact and transport through the bulk of the organic film,
a measurement of RSX directly yields the source resistance. In
cases where this is not true, a measurement of RSX can still be
used for estimating the true source resistance. As an example,
first, a measurement of total resistance between source–drain in
the linear region can be used to estimate rh by initially assum-
ing that RS = RD = RSX . Then, (3) can be used to determine
rv , which can subsequently be used to obtain a revised estimate Fig. 3. Schematic of test structure of top-contact bottom-gate pentacene
of RS using (2). A few iterations of this process will lead to OTFTs fabricated on PVP dielectric.
consistent values of parameters rh , rv , and the source resistance
RS . The assumption of equal source–drain resistances can be
III. R ESULT AND D ISCUSSION
avoided through the use of another floating electrode adjacent
to drain as well to estimate RD and RS in a self-consistent To illustrate the usefulness of the proposed technique,
manner. This four electrode structure appears to be similar to top-contact pentacene thin-film transistors (see Fig. 3) with
the conventional gated four-probe structure, but it is important poly(4-vinylphenol) (PVP) gate dielectric were fabricated.
to note that the proposed technique crucially employs floating The indium–tin–oxide-coated glass substrates were cleaned
electrodes outside the channel region rather than within it and using standard RCA process. A PVP solution of 9 wt%
uses it to extract contact resistance in a very different manner, in poly(melamine-co-formaldehyde) methylated with 5 wt%
as compared with the gated four-probe techniques. crosslinking agent propylene glycol monomethyl ether acetate
In order to verify that the voltage at the floating contact (PGMEA) was spin coated at 1000 rpm, which results in a film
node (i.e., D2) accurately measures the voltage at node SX thickness of 320 nm. PVP was dried at 170 ◦ C for about 1 h
and validate the process for estimation of RS , a 2-D numerical in vacuum at a base pressure of 2 × 10−6 Torr, followed by
simulation was carried out using ATLAS from Silvaco [12]. The a thermal deposition of pentacene and gold through shadow
simulation results showed that incorporation of an additional masks [12]. The channel length L and width W of the fabricated
drain contact does not alter the current–voltage characteristics transistors were 100 μm and 1 mm, respectively.
of the transistor under investigation. Fig. 2 confirms that the Fig. 4 shows the output characteristics of the fabricated
voltage at the floating contact terminal matches with the voltage OTFT. A mobility of 0.026 cm2 V−1 s−1 and threshold voltage
at the internal source node SX as the drain bias is increased. of −9.3 V was estimated from the transfer characteristics. Fig. 5
From the slope of the VD2 versus IDS characteristics, the shows the variation of voltage at the floating drain terminal and
resistance Rsx is estimated to be 2.489 × 108 Ω. The total resis- drain current as a function of drain voltage for a constant gate
tance between source–drain was estimated to be 3.279 × 109 Ω source to bias of −40 V. From the slope of the VD2 versus IDS
from the slope of IDS versus VDS characteristics at low drain characteristics (see Fig. 5) at low drain bias voltage, RSX was
bias. Using the iterative parameter extraction process described estimated to be 1.3 × 106 Ω. Following application of the pa-
earlier, rv of 293.4 Ω · cm2 , rh of 2.066 × 107 Ω, and source rameter extraction process, an rv of 1.89 × 103 Ω · cm2 , an rh
resistance RS of 8.17 × 108 Ω were obtained. The true source of 4.5 × 107 Ω, and a source resistance RS of 3.2 × 106 Ω were
resistance estimated directly from the ratio of source voltage obtained. A k · LS product of 1.54 indicates that a moderate
at node Si and drain current was very close at 8.13 × 108 Ω, amount of current crowding occurs under the source contact
confirming the validity of the parameter extraction method. with 90% of current flowing over 85% of contact length.
SINGH et al.: MEASUREMENT OF SOURCE RESISTANCE IN TOP-CONTACT OTFTs
Fig. 4. Typical output characteristics of the fabricated pentacene OTFT.
Fig. 5. Experimentally measured voltage VD2 at the floating contact terminal
D2 and drain–source current as a function of drain–source voltage when gate-
to-source voltage was kept constant at −40 V.
Fig. 5 also indicates that resistance RSX is highly nonlinear,
implying the nonlinear nature of source resistance as well. As
a result, the value of extracted resistance is applicable in the
linear region of operation only, and suitable techniques need to
be developed for its estimation over entire range of operation.
IV. C ONCLUSION
In summary, a method for estimation of source resistance
in top-contact OTFTs from a single test structure has been
demonstrated. The method has the advantage that it leaves the
443
transistor structure and characteristics unchanged by incorpo-
rating a test electrode outside the channel to sense the voltage
under the source contact. The test structure is simple to fabricate
and requires no special care since it represents two adjacent
OTFTs that share a common-source electrode.
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