Differential Pair

iD1 iD2
M1 M2

DC = VG+v d/2 V1 V2 DC = VG-v d/2

ACMAG = 0.5 ACMAG = 0.5
ACPHASE = 0 ACPHASE = 180
0
0 0

IQ

Let
HW#6
Please design a differential-pair amplifier using 0.18um CMOS
model to meet the differential gain Av ≥ 20dB and f3dB ≥ 100MHz.
The DC bias voltage of output port is 0.9V. The loading
capacitance is 0.5pF.
(a). Please also write down its small-signal model parameters gm,
gds, Cgs, and Cgd values at your bias condition and calculate
the voltage gain and the f3dB using the OCTS method.
(b). Please specify all the device sizes, input DC bias voltage,
bias current, the simulated Gain and f3dB.
V3
1.8

R1 R2

C1 0
OUTn OUTp
0.5p
M1 W W M2
L L
DC V1 V2 DC
ACMA G = 0.5 nch nch ACMA G = 0.5
ACPHA SE = 0 ACPHA SE = 180
0
0 0

I1
DC

0
.option nomod brief post=2 probe acout=0
Example for differential input signals:
Vinp inp 0 DC '0.8+vd/2' AC=0.5,0
Vinn inn 0 DC '0.8-vd/2' AC=0.5,180

.param vd=0
.dc vd -2 2 1m
.measure AC gain FIND VdB(outp,outn) AT 1k
.measure AC f3dB WHEN VdB(outp,outn)='gain-3'

.probe dc i1(M1) i1(M2) V(outp) V(outn) V(cs)

.probe ac VdB(outp,outn)