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EC6013-Advanced Microprocessors and Microcontrollers PDF
EC6013-Advanced Microprocessors and Microcontrollers PDF
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Question Bank
Regulation – 2013
Prepared by
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UNIT I HIGH PERFORMANCE CISC ARCHITECTURE – PENTIUM
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CPU Architecture- Bus Operations – Pipelining – Branch predication – floating point unit- Operating Modes –Paging –
Multitasking – Exception and Interrupts – Instruction set – addressing modes – Programming the Pentium processor.
PART A
Q.No Questions BT Competence
Level
1. Compare RISC and CISC. BTL 4 Analyze
2. What is meant by paging? BTL 1 Remember
3. Define multitasking. BTL 1 Remember
4. What are the advantages of instruction pipelining? BTL 1 Remember
5. Investigate the effects of pipeline hazards during execution process? BTL 6 Create
6. Describe the operating modes of Pentium processor. BTL 2 Understand
7. Illustrate the merits of RISC. BTL 3 Apply
8. Discuss the limitations of paging mechanism. BTL 6 Create
9. How many memory banks are available in Pentium processor? BTL 2 Understand
10. Classify the addressing modes with its types. BTL 4 Analyze
11. Write down register indirect with post increment addressing modes. BTL 1 Remember
12. Differentiate page and segment. BTL 4 Analyze
13. Validate the need of page fault exception in memory management. BTL 5 Evaluate
14. List the general purpose registers of Pentium processor. BTL 1 Remember
15. What are the advantages of segmented memory? BTL 2 Understand
16. Recall the different types of pipeline hazards? BTL 1 Remember
17. Point out the system management mode of operation for the Pentium? BTL 2 Understand
18. How an interrupt is processed in a Pentium processor? BTL 3 Apply
19. Justify that Pentium is a super scalar processor. BTL 5 Evaluate
20. How do you apply branch prediction in Pentium processor? BTL 3 Apply
PART –B
1. (i) With suitable examples, explain the addressing modes available in BTL 1 Remember
Pentium processor? (10)
(ii) Write short notes on register file. (6)
2. (i) Evaluate the techniques used to minimize the hazards in a pipeline BTL 5 Evaluate
processor. (10)
(ii) Discuss about the structure and the details of IVT. (6)
3. (i) Discuss in detail about how the instruction level parallelism achieved in BTL2 Understand
microprocessor. (8)
(ii) Summarize the concepts of paging with respect to Pentium processor.(8)
4. Compare the following architectures in detail BTL 4 Analyze
(i)RISC(8)
(ii)CISC (8)
5. (i) Illustrate the design considerations of page size in paging system. (10) BTL 3 Apply
(ii) Sketch the CISC processor with main components? (6)
6. (i) Explain the different operating modes of Pentium processor? (8) BTL 4 Analyze
(ii) Differentiate multitasking from multithreading. (8)
7. Discuss the hardware signals and superscalar architecture of Pentium BTL 2 Understand
processor? (16)
8. Elaborate on the on chip floating point unit of Pentium processor? (16) BTL 6 Create
9. Write short notes on (i) Pipelining (8) BTL 1 Remember
(ii) Multitasking (8)
10. (i) Classify the different group of instructions in Pentium processor?(10) BTL 4 Analyze
(ii)Demonstrate on assembly language programming of Pentium processor
with examples. (6)
11. Discuss the integer and floating point pipeline operation in Pentium BTL 2 Understand
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processor? (16) www.vidyarthiplus.com
12. (i)How will you use multitasking environment in Pentium processor? (8) BTL 3 Apply
(ii) Illustrate on branch group instructions of Pentium. (8)
13. What are pipeline hazards? Discuss them in detail. (16) BTL 1 Remember
14. (i) List and explain the interrupt processing techniques in Pentium BTL 1 Remember
processor? (10)
(ii) Write about exceptions in Pentium processor. (6)
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processor?(6) www.vidyarthiplus.com
(ii)Explain the addressing modes of an ARM Processor with examples?
(10)
(i) Examine the implementation of branch, call and return instructions in BTL4 Analyze
6. ARM instruction set? (12)
(ii) Write a program to find the product of two numbers? (4)
Illustrate the thumb instruction set of ARM processor with examples in BTL2 Understanding
7.
detail (16)
Describe the organization of CPU of a high performance RISC BTL2 Understanding
8.
architecture.(16)
(ii)Write a program to arrange N number of data in ascending order (8) BTL6 Create
9. (ii)Write a code using ARM instructions to calculate square root using
Newton Raphson Iterations. (8)
(i) Choose an approach to remove the test for N being zero that occurs in a BTL3 Apply
10. for loop? (8)
(ii) Develop the points for the efficient use of C types (8)
How to construct loop structures BTL3 Apply
11. (i) using fixed number of iterations (8)
(ii) using variable number of iterations (8)
(i) Summarize the Transcendental functions in ARM processor. (8) BTL2 Understanding
12.
(ii) Outline the concept of converting divide into multiples. (8)
(i) Conclude on Optimizing the assembly code in ARM processor (12) BTL5 Evaluate
13.
(ii) Point out the factors that influence the efficiency of loops structure(4)
(i) Analyze the structure arrangement in programming ARM processor. (8) BTL4 Analyze
14.
(ii)Propose the accomplishment of Push and Pop instructions in ARM. (8)
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