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Prasad
Prasad
entity Vmachine is
Port ( dime : in STD_LOGIC;
nikel : in STD_LOGIC;
clk : in STD_LOGIC;
y : out STD_LOGIC);
end Vmachine;
when b=>
if (dime='0' and nikel='0') then
s<=b;
end if;
if (dime='1' and nikel='0') then
s<=e;
end if;
if (dime='0' and nikel='1') then
s<=d;
end if;
y<='0';
when c=>
if (dime='0' and nikel='0') then
s<=c;
end if;
if (dime='1' and nikel='0') then
s<=d;
end if;
if (dime='0' and nikel='1') then
s<=b;
end if;
y<='0';
when d=>
s<=a;
y<='1';
when e=>
s<=c;
y<='1';
when others=> null;
end case;
end if;
end process;
end Behavioral;
ENTITY Vmachine_tb IS
END Vmachine_tb;
COMPONENT Vmachine
PORT(
dime : IN std_logic;
nikel : IN std_logic;
clk : IN std_logic;
y : OUT std_logic
);
END COMPONENT;
--Inputs
signal dime : std_logic := '0';
signal nikel : std_logic := '0';
signal clk : std_logic := '0';
--Outputs
signal y : std_logic;
BEGIN
-- Stimulus process
stim_proc: process
begin
END;