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BOOLEAN ALGEBRA
2.1 INTRODUCTION
This table represents all that one needs to know about the
specific task of adding exactly two (not more!) single-digit
binary numbers. We can now examine and attempt to describe
the functional (see a later chapter for a formal definition of a
Of course, one can also look for logical patterns in such a set of
specifications, such as:
A A' A B AB A+B
0 1 0 0 0 0
1 0 0 1 0 1
1 0 0 1
1 1 1 1
A B A⊕B
0 0 0
0 1 1
1 0 1
1 1 0
Also NAND
A
B'
AB’
A⊕B
known as A
B
(AB)'
B
A'
A’B
an inverter
made from XOR circuit
an AND made up of
gate and an NOT, AND and
inverter OR gates
and: or:
p q p
Each of the laws stated below can be proven through the use of
truth tables. These should be examined carefully. While some
of them are the same as the laws of ordinary algebra, some of
them are not. In particular, one should note De Morgan’s laws,
the first distribution law, the idempotency laws, the first
domination law and the absorption laws.
USE OF BRACKETS
Without brackets, the order of operations is negation (‘),
conjunction (and) and finally, disjunction (+). Brackets should be
used whenever we wish to change the order or where there
could be any ambiguity of interpretation. Where there are sets of
nested brackets, operations on pairs of inner brackets are
executed ahead of those on pairs of outer brackets. For example,
the meaning of P+Q’ is "P or (not Q)" while (P+Q)’ means "not (P
or Q)".
Note that the variables A,B,C, … P,Q can each represent any
Boolean expression (single variable or compound statement).
A⊕(B⊕C)
= A’(BC’ + B’C) + A(BC’ + B’C)’ definitions
= A’(BC’ + B’C) + A[(BC’)’ (B’C)’] deMorgan
= A’(BC’ + B’C) + A[(B’+C) (B+C’)] deMorgan
= A’(BC’ + B’C) + A[B’B+B’C’+CB+CC’] distributive
= A’(BC’ + B’C) + A[0+B’C’+CB+0]inverse
= A’(BC’ + B’C) + A[B’C’+CB] identity
= A’BC’ + A’B’C + AB’C’+ABC distributive
= A’BC’ + AB’C’ + A’B’C + ABC commutative
= (A’B + AB’)C’ + (A’B’ + AB)C distributive
= (A⊕B)C’ + (A⊕B)’C definitions
*In our treatment on logic we will define the derived operation “if and only if” with a special
symbol ↔, so that (A⊕B)’ = A↔B
A
A B'
A' (AB’)'
which is A (AB)'
(AB)'' = AB B B'
A'
(A’B)'
A⊕B
(A'B')' = A+B
the same
B
B
as
A A'
Inputs Output
A B C F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
A B C G
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1
B' A'BC'
B
C' ABC'
AB’C’
C
ABC
1When each Boolean “product” term contains all of the available variables, in this case A,B and
C, then it is called a Boolean “sum of products”.
There are at least two other important formats for digital logic
design, the Boolean “OR-then-AND” and NAND formats.
Boolean functions can be converted between these various
formats using the laws of logic. Note that, although these are
different representations of the same function, the three formats
are logically equivalent (the truth table for the function remains
the same).
One could also have converted the result of Example 1 into OR-
then-AND format, by working from the 0’s, as follows:
G = (A’B’C’)’(ABC’)’
G = [[(A’B’C’)’(ABC’)’]’]’ (double-negation)
A A'
[(A’B’C’)’(ABC’)’]’
(A'B'C')'
[(A'B'C')'(ABC')']'
B B'
G
(ABC')'
C
C'
G = (A’B’C’)’(ABC’)’
G’ = A’B’C’ + ABC’ = (A’B’ + AB)C’ (DeMorgan,distrib’ve)
G = (A’B’ + AB)’ + C (negation, De Morgan)
G = A’B + AB’ +C (See page 2.10)
G = [A’B + AB’ +C]’’ (double-negation)
G = [(A’B)’(AB’)’C’]’ (DeMorgan)
DeMorgan
(inner brackets) double negation
F = [(A+B+C')' +
(A’+B’+C')'] F = F’’ = [(A’B’C) + (ABC)]’’
deMorgan deMorgan
NAND Format
F = [(A+B+C')(A’+B’+C')]' F = [(A’B’C)'(ABC)']'
deMorgan
(inner brackets)
negation
DeMorgan
(inner brackets) double negation
deMorgan deMorgan
NAND Format
F’ = [(A+B+C) (A+B’+C) (A+B’+C’) F’ = [(A’B’C’)’(A’BC’)’(A’BC)’
(A’+B+C) (A’+B+C’) (A’+B’+C)]’ deMorgan + (AB’C’)’(AB’C)’(ABC’)’]’
(inner brackets)
negation
i. F = AB + AB’
= A(B + B’) (Distributive)
= A(1) (Inverse)
=A (Identity)
The second way is to write the truth table for the given
statement F, and then read off the values of the variables that
make F true, namely, a truth-value of 1.
A B F=A+B
0 0 0
0 1 1
1 0 1
1 1 1
A B C F
0 0 0 0
0 0 1 1 A’B’C
0 1 0 1 A’B
0 1 1 1
1 0 0 1
1 0 1 1 A
1 1 0 1
1 1 1 1
Example 3: Given the following truth table, find and simplify the
Boolean expression.
minterms NAND
format
Don’t cares
Addition
11 10 9 8 7 6 5 4 3 2 1 0 Column number
0 1 1 1 1 1 1 1 1 1 1 0 Carry digit - C
0 0 1 1 1 1 1 0 1 0 1 1 First number - A 1003
0 0 0 1 1 1 1 1 0 1 0 1 Second number - B 501
0 1 0 1 1 1 1 0 0 0 0 0 Sum - S 1504
A D = A'B + AB'
D
B
S
C S
(A⊕B)C (i+1)th digit
A⊕B⊕C
B
A⊕B
AB
A
5 status lights
indicating
sound volume
So, given that there are 5 lights, and 6 levels, we will need more
than 2 bits to represent the 6 different input sound levels.
Therefore, we will need 3 bits, but we won’t need to use all 8
possible patterns that can be represented in 3 bits.
You will note that the table contains all possible three-digit
binary numbers, of which there are eight. We only need the six
that correspond to the six status conditions. The remaining two
correspond to “don’t care” conditions. There will not be an
input signal corresponding to these two conditions. We have
inserted X into the appropriate rows. The specifications S1
through S5 are in bold type while the “don’t care” conditions
D6 and D7 and the “off” condition, S0, are in plain type.
For each light, ask the question “what is it about the associated
rows that distinguishes them from the rest of the rows?” For
example, for L3, what is it about the input conditions S3, S4,
and S5 that distinguishes them from the other input conditions,
S0, S1, and S2? Note that we don’t need to distinguish them
from the “don’t care” conditions D6, D7.
Inputs B
C
AC
L1 L2 L3 L4 L5
C
AC
L5 = AC;
L4 = A;
L3 = A+BC;
L2 = A+B;
L1 = A+B+C = (A+B)+C.
Outputs
L1 L2 L3 L4 L5
A+BC
A
A+B
Inputs B
BC
C A+B+C
AC
4. (a) Show that the dual of the exclusive OR, S = A⊕B =A’B + AB’, is Sd =
A’B’ + AB. (In logic, this called the “if and only if” statement and is
represented using A↔B.)
(b) Show that the negation of S = A⊕B = Sd .
(c) The negation of a Boolean statement is not usually equivalent to its
dual. Verify this for the following pairs of dual Boolean expressions:
(A+B)’ vs. (AB)’; (A+B) vs. (AB); (A+B+C) vs. (ABC); (A+0) vs. (A1).
8. The following are several Boolean expressions related to the full adder.
Implement each of them in logic gates corresponding to the particular
Boolean operations represented in the expressions.
Si = Ai B’i C’i + A’i Bi C’i + A’i B’i Ci + Ai Bi Ci
Si = (Ai B’i + A’i Bi )C’i + (A’i B’i + Ai Bi ) Ci
Si = Ai ⊕ Bi ⊕ Ci (using XOR gates)
Ci+1 = Ai Bi C’i + Ai B’i Ci + A’i Bi Ci + Ai Bi Ci
Ci+1 = (Ai⊕ Bi) Ci + Ai Bi (using an XOR gate)
9. The table below defines two Boolean functions, b1(a1,a2,a3,a4) and b2(a1,a2,a3,a4). Each
row (line) gives the output for a specific combination of inputs (a1,a2,a3,a4). For each of
the two functions, write the equivalent Boolean expression, simplify it as much as
possible, and implement it by drawing logic gates.
a1 a2 a3 a4 b1 b2
0 0 0 0 1 0
0 0 0 1 1 0
0 0 1 0 0 0
0 0 1 1 0 1
0 1 0 0 1 0
0 1 0 1 1 0
0 1 1 0 0 1
0 1 1 1 0 1
1 0 0 0 0 0
1 0 0 1 0 0
1 0 1 0 0 0
1 0 1 1 0 1
1 1 0 0 0 0
1 1 0 1 0 0
1 1 1 0 0 1
1 1 1 1 0 1
(12) The table below defines two Boolean functions, f1(A,B,C) and f2(A,B,C). Each row
(line) gives the output for a specific combination of inputs (A,B,C).
(a) For each of the two functions, write the equivalent Boolean expression, and then
simplify your Boolean expression as much as possible.
(b) Then implement f2 by drawing logic gates.
A B C f1 f2
0 0 0 1 0
0 0 1 1 1
0 1 0 1 0
0 1 1 1 1
1 0 0 1 0
1 0 1 0 0
1 1 0 1 0
1 1 1 1 0
(13) Draw the Boolean circuit for G = [(A’B)’(AB’)’C’]’, using only NAND gates (each
gate having up to 3 inputs).
… Fi+1 = Fi = …
… … Ai = …
… … Bi = …