INTEGRATION, the VLSI journal ∎ (∎∎∎∎) ∎∎∎–∎∎∎

1 Contents lists available at ScienceDirect

2
3
4 INTEGRATION, the VLSI journal
5
6
journal homepage: www.elsevier.com/locate/vlsi
7
8
9
10
11
12
An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor
13 Network Applications
14
15
Q1 Atiyeh Karimlou a,n, Roya Jafarnejad b, Jafar Sobhi a
16
a
17 Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran
b
Faculty of Electrical and Computer Engineering, Tarbiat Modares University, Tehran, Iran
18
19
20
21 art ic l e i nf o a b s t r a c t
22
This paper presents a Sub-mW differential Common-Gate Low Noise Amplifier (CGLNA) for ZigBee
23
Keywords: standard. The circuit takes the advantage of shunt feedback and Dual Capacitive Cross Coupling (DCCC)
24
Low Noise Amplifier (LNA) to reduce power consumption and the bandwidth extension capacitors to support 2.4 GHz ISM band. An
25 amplifier employing these techniques has been designed and simulated in 0.18 mm TSMC CMOS
Inductor-less
26 Shunt feedback technology. The Simulation results show a gain of 18.2 dB, an IIP3 of
4.32 dBm and a noise figure of
27 Dual Capacitive Cross Coupling (DCCC) 3.38 dB at 2.4 GHz. The proposed LNA consumes only 967 mW from a 1-V supply.
28 Wireless Sensor Network (WSN) & 2015 Published by Elsevier B.V.
29
30
31 67
32
1. Introduction technique to improve the power consumption is presented in this 68
33 69
34 paper. The shunt feedback provides a new degree of freedom to
Wireless Sensor Networks (WSNs) are considered as one of the adjust the input impedance of the LNA; thus gm of the amplifying 70
35 71
36 most important technologies for the recent years which are used transistors can be further reduced that consequently results in the
in various fields such as: health monitoring, factory automation, lowering of the power dissipations. Also the DCCC technique is 72
37 73
38 and security surveillance [1]. WSN standards like IEEE 802.15.4 applied at the main transistors of the amplifying stage in order to
requires achieving simplicity, low cost, and low power consump- improve the effective transconductance of them. This low gm value 74
39 75
40 tion with the ability to operate months or even years [2]. Most of is obtained with low current consumption, resulting in lowering of
the circuits based on ZigBee standard are powered by battery. The the power dissipation. It also uses a bandwidth improvement 76
41 77
42 most important challenge of these networks is low power (LP) technique to support 2.4 GHz ISM band. This circuit supports other
design which is able of operating for several years using a single frequency bands of ZigBee standard and also various wireless 78
43 79
44 battery. The IEEE 802.15.4 standard uses the three license-free standards such as WLAN, GSM, DECT, Bluetooth, Wi-Fi and GPS
frequency bands of 860 MHz, 920 MHz and 2400 MHz [2] among due to its inductor-less nature. 80
45 81
46 which the 2.4 GHz band is operated worldwide.
The conventional LNA circuits use multiple inductors to sup- 82
47 83
48 port frequency bands such as 2.4 GHz [3–5] which causes the chip 2. Review of traditional inductor-less amplifiers
to take more space and expensive RFIC. Removing them leads to 84
49 85
50 reduce the costs. On the other hand low power inductor-less LNAs The conventional amplifiers which provide voltage gain and
cannot offer the narrowband and low noise figure (NF) as well as 86
51 input impedance matching without any inductors are the Resistor-
inductor-based LNAs [6]. So designing such low cost circuits that 87
52 terminated Common-Source (R-CS) amplifier, Shunt-Feedback
have small size and achieve large voltage gain in low power 88
53 (SFB) amplifier and Common-Gate (CG) amplifier (Fig. 1). Almost
condition is very challenging. 89
54 majority of published LNAs are based on either of these structures
LNA, as the first building block in the receiver, should qualify 90
55 or the combination of them [7–9]. The resistor-terminated com-
good impedance matching, high gain, and low noise figure (NF) 91
56 mon-source amplifier which provides input impedance matching
across the frequency band. Moreover, high linear, low area and low 92
57 using RT and achieves the lowest power consumption is shown in
power LNAs are needed for high-performance and low-cost 93
58 Fig. 1(a). In this circuit, the resistor RT adds its own thermal noise
94
59 applications. An inductor-less CGLNA with shunt feedback and increases the noise figure extremely, which is not tolerable for
95
60 Wireless Sensor Network Applications. Fig. 1(b) shows the im-
96
61 pedance-based SFB amplifier which in this case feedback impe-
97
62 n
Corresponding author. Tel.: þ 989141643150; fax: þ984436251149. dance provides real input impedance matching. In this circuit the
98
63 E-mail address: a.karimlou91@ms.tabrizu.ac.ir (A. Karimlou). input impedance matching is obtained because of the LNA voltage
99
64 http://dx.doi.org/10.1016/j.vlsi.2015.07.009 100
65 0167-9260/& 2015 Published by Elsevier B.V. 101
66

Please cite this article as: A. Karimlou, et al., An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications,
INTEGRATION, the VLSI journal (2015), http://dx.doi.org/10.1016/j.vlsi.2015.07.009i
 2 A. Karimlou et al. / INTEGRATION, the VLSI journal ∎ (∎∎∎∎) ∎∎∎–∎∎∎

1 67
VDD VDD VDD
2 68
3 69
4 RL RL RL 70
5 Vout 71
6 Vin
Vout RF Vout Vbias 72
7 M1 M1 73
8 Vin 74
M1
9 RT 75
Vin
10 76
11
I bias 77
12 78
13 Fig. 1. Traditional inductor-less amplifiers: (a) Resistor-terminated common-source amplifier; (b) shunt-feedback amplifier and (c) common-gate amplifier. 79
14 80
15 gain. The main disadvantage of impedance based SFB amplifiers is Fig. 2(c) indicates the Dual Capacitive Cross-Coupling CGLNA 81
16 degradation of the output impedance (RF ǁRL ) due to feedback path (DCCC-CGNA). The DCCC circuit is applied at the main transistors 82
17 which decreases the voltage gain of the LNA. Thus, to achieve high of trans-conductance stage by connecting body and gate nodes of 83
18 gain, larger gm value is needed and as a result, PDC increases. To each transistor to each other's source terminal in order to further 84
19 isolate the output from the feedback impedance authors in [10,11] reduction in power consumption [16]. The effective gm1 is 85
20 offer a feedback path with a source follower. Although the increased to 2(gm1 þgmb1) by using of DCCC technique. In this 86
21 disadvantage of last circuit has been solved, but in this case the circuit by assuming that the ratio of gmb1 to gm1 is about 15%, 87
22 feedback path needs extra power consumption which is not good effective gm1 can be improved to 15% without any additional 88
23 for low power purpose. power consumption in comparison of CCC technique. The 89
24 The basic CG circuit is shown in Fig. 1(c) [12]. Input impedance improved voltage gain resulted by this technique causes a better 90
25 of CG amplifier is the source terminal impedance (1/gm) of the noise performance of the LNA in low power design. 91
26 amplifying transistor, so the trans-conductance of the input This work offers an additional degree of freedom to obtain 92
27 transistor and thus the gain of the amplifier are set by the input input impedance matching of the LNA, consequently the gm of the 93
28 matching condition. CG circuit shows better linearity than SFB input transistor can be reduced more, resulting in the lowering of 94
29 since its input voltage gain is lower than SFB circuit. The available the power consumption. 95
30 accessibility of the gate terminal in CG circuit is another advantage 96
31 of it which cause low power operation. Actually, this node does not 3. Proposed LNA circuit topology and analysis 97
32 require being pure DC node for correct operation [6]. Therefore the 98
33 CG circuit is preferred due to achieving lowest possible power 3.1. Basic idea 99
34 dissipation. 100
35 Since the substrate of the LNA and baseband digital circuits are Fig. 3(a) shows the simplified single ended model for the 101
36 the same in CMOS process, in most of the systems a differential proposed inductor-less CGLNA with shunt feedback path to 102
37 structure is preferred to improve the second order nonlinearity improve the power dissipation of CGLNA. The main idea of shunt 103
38 and to eliminate the on-chip switching noise. The differential feedback path is to add a degree of freedom on input impedance 104
39 scheme of the CGLNA is shown in Fig. 2(a). In this circuit, the expression of the CGLNA. gm of the amplifying transistor (M1) can 105
40 differential voltage gain and the differential input impedance are be reduced more by using of the shunt feedback. This low gm value 106
41 given by: AV
dif f ¼ g m1 RL , Rin
dif f ¼ 2=g m1 , respectively [13]. The is obtained with low current consumption, resulting in lowering of 107
42 noise factor in the perfect matching condition (Rin ¼ 2Rs ¼ 100 Ω) the power dissipation. Also the DCCC technique is applied at the 108
43 is then given by: F ¼ 1 þ ðϒ =αÞ þ 4RS = RL which gm1 is the trans- main transistors of the amplifying stage in order to further 109
44 conductance of the input transistor M1, ϒ is the excess channel reduction in power dissipations. The differential configuration of 110
45 thermal noise coefficient, and α is the ratio between gm and the the proposed circuit is shown in Fig. 3(b). The main DCCC-CGLNA 111
46 zero-bias drain conductance gd0 [13]. With the low supply voltages is made by M1 and RL. The shunt feedback path which helps to 112
47 of modern CMOS processes, the load resistance must also be low improve the input impedance matching condition is made by M3 113
48 due to stringent headroom condition, resulting in low gain and and R3. Furthermore to have an acceptable voltage gain, with low 114
49 increased noise figure. Furthermore, due to input matching con- gm values the output impedance of the LNA must be high enough 115
50 ditions the constant trans-conductance of the common-gate which degrades the bandwidth of the LNA. In order to overcome 116
51 amplifier, prevents improvement of the noise figure and power this drawback, the outputs of the main and feedback path are 117
52 consumption. capacitively coupled through C4 for bandwidth enhancement 118
53 In order to overcome the disadvantages of the common-gate purpose [6,17]. The shunt feedback path which is used to satisfy 119
54 amplifier in terms of noise and power consumption the Capacitive input matching also reduces the effective trans-conductance of the 120
55 Cross-Coupling (CCC) technique was introduced [13–15]. The amplifying transistors. This low gm value can be achieved with low 121
56 Capacitive Cross-Coupling structure is shown in Fig. 2(b). Cross- current condition. So the voltage drop through RL will be reduced 122
57 coupling capacitors are used in circuit in the feedback path which degrades the limitations of the voltage headroom, thus the 123
58 between the gate and source nodes of the amplifying transistors power supply can be cut down which results in low power 124
59 (M1). The effective transconductance (gm1) is boosted to 2gm1, so consumption. The various metrics of proposed technique and the 125
60 the differential voltage gain and the
differential input impedance effect of low power supply are discussed in the next section. 126

61 are given by: AV ¼ 2g m1 RL , Rin ¼ 2= 2g m1 ¼ 1=g m1 , respectively. 127
62 The noise factor of this circuit is then given by: F ¼ 1 þ ðϒ =2αÞ þ 128
63 4RS = RL . As shown in the noise equations the impact of M1 noise is 3.2. Input matching 129
64 fallen by half. Furthermore gm1 value is half of the CGLNA due to 130
65 the input matching condition so the power consumption is red- The equivalent half circuit model for the proposed LNA is 131
66 uced by using of CCC technique. shown in Fig. 3(a). By applying the shunt feedback path to the 132

Please cite this article as: A. Karimlou, et al., An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications,
INTEGRATION, the VLSI journal (2015), http://dx.doi.org/10.1016/j.vlsi.2015.07.009i
 A. Karimlou et al. / INTEGRATION, the VLSI journal ∎ (∎∎∎∎) ∎∎∎–∎∎∎ 3

1 67
2 VDD VDD VDD 68
3 69
4 RL RL RL RL RL RL 70
5 Vop Von Vop Von Vop Von 71
6 72
M1 M1
7 Vb1 M1 M1 Vb1 M1 M1 C2 73
C2
8 74
9 C1 C1 C1 C1 75
10 76
2Rs Vs
11 2Rs Vs 2Rs Vs
77
12 IB IB IB IB IB IB 78
13 79
14 80
15 Fig. 2. (a) Conventional differential CGLNA (b) Capacitive Cross-Coupling CGLNA(c) Dual Capacitive Cross Coupling CGLNA. 81
16 82
17 83
18 84
VDD
19 VDD 85
20 RL RL 86
R3 C4 R3
21 RL R3 C4 87
22 88
23 M3 +out - M3 89
out -1 M3 C3 C3
24 M1 M1 90
M1
25 91
C1 C2 C2 C1
26 -1 92
Feedback
27 path 93
Rs in+ in-
28 2Rs 94
M2 V b2 M2
Vs M2
29 Vs Vb2 Vb2 95
30 96
31 97
32 Fig. 3. Schematic of the proposed CGLNA (a) Simplified single ended model, (b) differential implementation (biasing circuit not shown). 98
33 99
34 100
35 101
36 102
37 103
38 104
39 105
40 106
41 107
42 108
43 109
44 110
45 111
46 112
47 113
48 114
49 Fig. 4. Simulated Av for different C4 values. 115
50 116
51 Table 1 117
52 Effect of C4 on bandwidth and gain peaking. Fig. 5. Equivalent circuit for noise calculation.
118
53 119
C4 (fF) Bandwidth (GHz) Gain peaking (dB)
54 120
55 5 3.2 Under-damp
where A is defined as follow: 121
56 20 3.41 0.13   122
57 60 3.42 0.9 1 123
A ¼ g m3 þRL ð3Þ
58 2Gm1 124
59 125
Assuming perfect matching condition (Rin ¼ 2Rs ) results in:
60 DCCC-CGLNA circuit and assuming Gm1 as follow: 126
61 1
g m3 RS 127
Gm1 ¼ ðg m1 þ g mb1 Þ ð1Þ Gm1 ¼ ð4Þ
62 2RS ð1 þ g m3 RL Þ 128
63 The differential input impedance is given by: 129
64 By comparing this equation with the obtained matching con- 130
65 1 dition for the DCCC-CGLNA (Gm1 ¼1/2RS); it is obtained that the 131
Rin ¼ ð2Þ
66 Gm1 ð1 þ AÞ needed Gm1 value is less than DCCC-CGLNA by the term of 132

Please cite this article as: A. Karimlou, et al., An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications,
INTEGRATION, the VLSI journal (2015), http://dx.doi.org/10.1016/j.vlsi.2015.07.009i
 4 A. Karimlou et al. / INTEGRATION, the VLSI journal ∎ (∎∎∎∎) ∎∎∎–∎∎∎

1 67
2 68
3 69
4 70
5 71
6 72
7 73
8 74
9 75
10 76
11 77
12 78
13 79
14 80
15 81
16 82
17 83
18 84
Fig. 6. Simulated Stability factor for different C4 values. (a) differential mode stability factor (Kdd), and (b) common mode stability factor (Kcc).
19 85
20 86
21 87
22 88
23 89
24 90
25 91
26 92
27 93
28 94
29 95
30 96
31 97
32 98
33 99
34 100
35 101
36 Fig. 7. Layout of the LNA-core.
102
37 103
38 104
39 [(1
g m3 RS Þ=ð1 þ g m3 RL Þ. So the proposed circuit improves trade- 105
40 off between power and input matching condition. 106
41 107
42 3.3. Gain and bandwidth 108
43 109
44 In low power designs with low DC current and small transistor gm 110
45 values to reach acceptable gain and noise, large output impedances 111
46 are used and then degrades the bandwidth of the whole LNA. In the 112
47 proposed circuit the branches which are added to implement the 113
48 shunt feedback technique are capable to use of bandwidth extension 114
49 capacitors. For that reason, in this paper C4 is added for bandwidth 115
50 enhancement purpose. The details of the transfer function for entire 116
51 LNA gain and effect of C4 is discussed below which shows a 2nd 117
52 -order pole system with a common un-damped natural frequency 118
53 (wn ) and a damping ratio (ξ ). 119
54 120
1 þa1 s þa2 s2
55 AV ¼ AV
DC    2 ð5Þ Fig. 8. PostLayout simulated Sdd11 of the proposed LNA. 121
56 1 þ ω2ξn s þ ωsn 122
57 123
 
58 RL 1
g m3 RS g11, g33 and Cx are introduced as the following: 124
AV
DC ¼ ð6Þ
59 RS 1 þ g m3 RL 1 1
125
60 sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi sffiffiffiffiffiffiffiffiffiffiffiffiffiffi g 11 ¼ þ ð9Þ 126
RL r ds1
61 g 11 g 33 g 11 g 33 127
ωn ¼ ¼ ð7Þ
62 C gd3 ðC gd1 þ 2C 4 þC gs3 Þ Cx2 1 1 128
63 g 33 ¼ þ ð10Þ 129
R3 r ds3
64 g 11 C gd3 þ g 33 ðC gd1 þ C 4 þ C gs3 þ C gd3 Þ þ g m3 ðC gd3
C 4 Þ 130
65 ξ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ð8Þ 131
66 2 g 11 g 33 C x 2 C x 2 ¼ C gd3 ðC gd1 þ 2C 4 þ C gs3 Þ ð11Þ 132

Please cite this article as: A. Karimlou, et al., An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications,
INTEGRATION, the VLSI journal (2015), http://dx.doi.org/10.1016/j.vlsi.2015.07.009i
 A. Karimlou et al. / INTEGRATION, the VLSI journal ∎ (∎∎∎∎) ∎∎∎–∎∎∎ 5

1 As shown in Eqs. (7) and (8) with the C4 increasing, the value of 67
2 wn ; ξ will be reduced consequently. The overshoot in the transfer 68
3 function of the LNA will be added up by reducing the ξ value. The
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 69
4 resonant frequency which is given by wR ¼ wn 1
2ðξÞ2 reduces by 70
5 decreasing the wn . The flat overshoot in the transfer function and 71
6 bigger resonant frequency (wR ) are needed for bandwidth extension 72
7 purpose. So the C4 value must be selected quite accurately to reach 73
8 the highest possible bandwidth. 74
9 In rather simple term, as illustrated by the results of simulation, 75
10 the bandwidth extension capacitor (C4) helps to increase the 76
11 whole LNA bandwidth by creating an overshoot effect in AV . The 77
12 effect of C4 value on bandwidth and gain peaking is shown in 78
13 Fig. 4 and detailed in Table 1. As shown with C4 ¼20f F the system 79
14 is critically damped. The obtained gain peaking is kept small with 80
15 this capacitance value. Along with this bandwidth extension 81
Fig. 9. PostLayout simulated voltage gain of the proposed LNA.
16 capacitor it is possible to select large output impedance which is 82
17 resulted in large gain and less noise figure. 83
18 84
19 3.4. Noise figure 85
20 86
21 The body to source equivalent trans-conductance (gmb) is 87
22 ignored to simplify the analysis of noise figure. It is assumed that 88
23 the thermal noise of the transistors and the load are main noise 89
24 sources of the LNA. The coupling capacitors are replaced with 90
25 short circuit since they are much larger than the parasitic 91
26 capacitors of the transistors. It is assumed that the noise sources 92
27 of both half circuit are correlated. This leads to create a fully 93
28 differential noise at the LNA output. Assuming the most pessimis- 94
29 tic, common mode cancelation does not occur in the circuit. Thus 95
30 two half of the circuit has been separated from each other with 96
31 presented model in [6,9]. The simplified circuit is shown in Fig. 5. 97
32 Fig. 10. PostLayout simulated noise figure of the proposed LNA. The noise contribution of each component at the total noise figure 98
33 is separated as follow. By assuming perfect matching condition the 99
34 noise figure of the proposed LNA is then given by: 100
35 101
F ¼ 1 þF M1 þ F RL þ F M3 þ F R3 þ F M2 ð12Þ
36 102
37
 103
γ 1 þ g m3 RL RS
38 F  1þ 1
þ
2 104
2α1 1
g m3 RS RL 1
g m3 RS
39 105
40 γ3
 RS γ

106
þ g RS þ þ 2 g m2 RS ð13Þ
41 α3 m3 R3 α2 107
42 As it is evident from (13) the second and third terms represent 108
43 the noise contribution of the amplifying transistor (M1) and the 109
44 load resistor (RL), respectively. The fourth term accounts for the 110
45 noise contribution of feedback transistor (M3). These components 111
46 are the main noise sources of the proposed LNA. The noise 112
47 contribution of them are minimized when the gm3 value is low. 113
48 Fig. 11. PostLayout simulated IIP3 of the proposed LNA. On the other hand, under the input matching condition to reach 114
49 115
50 116
51 117
52 118
53 119
54 120
55 121
56 122
57 123
58 124
59 125
60 126
61 127
62 128
63 129
64 130
65 131
66 Fig. 12. Stability factor for the proposed CGLNA in the bandwidth (without buffer). (a) differential mode stability factor (Kdd), and (b) common mode stability factor (Kcc). 132

Please cite this article as: A. Karimlou, et al., An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications,
INTEGRATION, the VLSI journal (2015), http://dx.doi.org/10.1016/j.vlsi.2015.07.009i
 6 A. Karimlou et al. / INTEGRATION, the VLSI journal ∎ (∎∎∎∎) ∎∎∎–∎∎∎

1 Table 2 67
2 Comparison with recently published LNAs. 68
3 69
Year Circuit Technology (nm) Supply voltage(V) Voltage gain (dB) Bandwidth (GHz) NF (dB) IIP3 (dBm) Power cons. (mw) Core area (mm2) FOM
4 70
5 2011,2012 [6,17] 130 1.2 20a 0.1–2.7 4
12 1.32 0.007 0.82 71
6 2013 [11] 65 1 18.6a 0.2–4.5 3.2
11 5.6 0.2b 0.476 72
7 2011 [13] 90 2 23 0.1–1.77 1.85–2.35
2.85 2.8 0.03 8.2 73
2007 [15] 180 1.8 15 0.05–0.86 2.5 8.3 7.2 0.075 5.49
8 2012 [16] 250 0.863 9.5a 1.8 3.38
0.4c 2.16 1.23b 1.92
74
9 2010 [18]d 90 1 20.1 0.5–3 2.32–2.87
4.5,-1 5.5 – 5.17 75
10 2014 [19] 180 1.8 14.8a 2.4 3.7 8.6c 14.76 1.284b 4.81 76
11 2014 [20]d 180 1.8 24 0.5–2.5 2.35
2.5 17.3 0.11e 1.43 77
This workd @ 2.4 GHz 180 1 18.2 0.01–3.34 3.38
4.32 0.967 0.038 8.81
12 78
13 a
Power gain. 79
14 b
Total area. 80
c
15 Estimated from IIP3¼ IIP1 þ9.6 dB. 81
d
16 Simulation results. 82
e
Including bond pad.
17 83
18 84
19 85
20 the low power consumption low gm1 is needed which can be instead of the off-chip inductors, which decreases the DC voltage 86
21 achieved by large gm3 value from Eq. (4). Therefore there is a headroom across the load resistor and decreases the IIP3. 87
22 tradeoff between the noise figure and input matching of the pro- The layout of the designed LNA using 0.18 mm TSMC CMOS 88
23 posed circuit and so gm value of the transistors must be selected technology is shown in Fig. 7. The area of the LNA is 0.351  89
24 critically to have minimum noise figure along with the low power 0.11 mm2. It draws 967 mA from a 1-V power supply. For test 90
25 consumption. The simulated NF for the proposed circuit is as low purpose a voltage buffer which consumes 4.16 mA from the 1-V 91
26 as CGLNA but with lower power consumption which shows an power supply is used at the LNA output, to model the input 92
27 acceptable NF for WSN applications. parasitic capacitor of the following mixer. Results of the post- 93
28 layout simulations are shown which contain the effect of the 94
29 3.5. Stability layout parasites. The simulated differential mode input return loss 95
30 Sdd11 (equal to S11 for single input device [19]) is below
10 dB 96
31 By applying feedbacks and bandwidth extension capacitors in from 1 MHz to 3.6 GHz as shown in Fig. 8. The load resistors are 97
32 the proposed circuit the stability must be checked. The differential chosen large, to achieve high gain and low noise. The simulated 98
33 and common mode stability of the LNA at high frequency are voltage gain is shown in Fig. 9. The voltage gain is 19.5 dB in the 99
34 investigated by stability factors Kdd and Kcc, respectively [18] that pass-band with an upper 3-dB frequency of 3.34 GHz which 100
35 are obtained by using of the S-parameters of the LNA for both contains 2.4 GHz ISM Band. The simulated minimum NF is 101
36 modes which are given by: 3.29 dB at 1.5 GHz. Fig. 10 shows NF of the LNA with degraded 102
37 2 2 2 NF of 3.38 dB at 2.4 GHz because of LNA bandwidth limitation. 103
38 1
Sdd11
Sdd22 þ Sdd11 Sdd22
Sdd12 Sdd21 Fig. 11 shows the simulated IIP3 with a two-tone test at 2.4 GHz 104
K dd ¼ ð14Þ
39 2 Sdd12 Sdd21 with 50 MHz tone spacing. Under the low supply voltage condition 105
40 proposed circuit shows an IIP3 of
4.32 dBm which is good for 106
41 1
jSCC11 j2
jSCC22 j2 þ jSCC11 SCC22
SCC12 SCC21 j2 WSN applications. The differential and common mode stability 107
K CC ¼ ð15Þ
42 2jSCC12 jjSCC21 j factors of the LNA are above unity on the frequency band as shown 108
43 The important parameter that can cause instability due to in Fig. 12. 109
44 positive feedback effect is bandwidth extension capacitor (C4). Table 2 presents postlayout simulation results of the proposed 110
45 The effect of C4 on differential and common mode stability factors shunt feedback CG-LNA and the recently published LNAs [20–22]. 111
46 of the LNA are demonstrated in Fig. 6. As shown by increasing the The simulation results are displayed in 2.4 GHz ISM band. For this 112
47 C4 stability factors degrade but they are above unity for various comparison the input matching of the proposed amplifier includes 113
48 value of C4 and so the system is stable on the frequency band. the bond pad with ESD protection and the effect of the bond wire 114
49 parasitic. Also a voltage buffer is used at the LNA output, in order 115
50 to model the input parasitic of the following mixer. From Table 2, 116
51 4. Simulation results circuits that contains ISM band (BW
3 dB 42.4 GHz) exhibit higher 117
52 PDC and mostly have big size because of the use of bulky inductors. 118
53 The proposed LNA has been designed and simulated in 0.18 μm The proposed shunt feedback DCCC-CGLNA shows comparable 119
54 TSMC CMOS technology with the Cadence RF Spectre simulator. gm performance with considerably lower PDC and low area. To 120
55 of the M1 and M3 transistors under input matching condition to evaluate the performance of the LNA figure of merit (FOM) that 121
56 have minimum NF and low power dissipations are set to 6 mS is defined in (16) is being introduced for comparison purposes. 122
57 (IdcM1 ¼445 mA), 0.5 mS (IdcM3 ¼38.5 mA), respectively. Large out- 123
58 put impedances with the value of 850 Ω are chosen to achieve 124
Gain½Lin:IIP3½mW:Freq½GHz
59 high gain and low noise figure. The R3 resistors are chosen 4.3 kΩ FOM½GHz ¼ ð16Þ 125
P DC ½mW:ðF½Lin
1Þ
60 each, to achieve the required gain of shunt feedback path to 126
61 correct operation of bandwidth extension. These resistors value 127
62 are high enough which the noise contribution of them is very low. Based on the calculated FOM in Table 2, the proposed shunt 128
63 The transistors with minimum channel length of 0.18 mm are Feedback CG-LNA shows better performances than other circuits. 129
64 chosen to reduce the parasitic capacitance of the transistors and Although the proposed circuit has the best FOM, some degradation 130
65 achieve to flat noise at high frequencies. The M2 transistors with may be expected in a prototype version, and therefore it should be 131
66 the size of 9.8 mm/0.18 mm are used to bias of the proposed circuit somehow comparable to the other LNAs mentioned in Table 2. 132

Please cite this article as: A. Karimlou, et al., An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications,
INTEGRATION, the VLSI journal (2015), http://dx.doi.org/10.1016/j.vlsi.2015.07.009i
 A. Karimlou et al. / INTEGRATION, the VLSI journal ∎ (∎∎∎∎) ∎∎∎–∎∎∎ 7

1 5. Conclusion [18] T. LaRocca, J.-C. Liu, M.-C. Chang, 60 GHz CMOS amplifiers using transformer- 65
2 coupling and artificial dielectric differential transmission lines for compact 66
design, IEEE J. Solid-State Circuits 44 (2009) 1425–1435.
3 A new low power inductor-less CGLNA circuit with shunt feed- [19] D.E. Bockelman, W.R. Eisenstadt, Combined differential and common-mode 67
4 back and DCCC techniques has been presented in this paper. scattering parameters: Theory and simulation, IEEE Trans. Microw. Theory 68
5 Although this circuit is designed to operate at 2.4 GHz ISM Band, it Tech. 43 (1995) 1530–1539. 69
[20] G.Z. Fatin, Z. Koozehkanani, H. Sjöland, A technique for improving gain and
6 can support frequency band from 1 MHz to 3.34 GHz to Multi noise figure of common-gate wideband LNAs, Analog Integr. Circuits Signal
70
7 Standard applications, due to its inductor-less nature. The simulation Process. 65 (2010) 239–244. 71
8 results in 0.18 μm TSMC CMOS technology shows that this technique [21] S. Woo, J. Shao, H. Kim, A gm-boosted common-gate CMOS low-noise 72
amplifier with high P1dB, Analog Integr. Circuits Signal Process. 80 (2014)
9 can reduce the power consumption of the differential common gate 33–37.
73
10 LNA to 967 mW. In such low power condition with the given low gm [22] G.Z. Fatin, H.Z. Fatin, A wideband balun–LNA, AEU-Int. J. Electron. Commun. 68 74
11 value of the transistors to achieve acceptable gain for WSN applica- (2014) 653–657. 75
12 tions large output impedances are chosen. The main drawback of the 76
13 large output impedance is on the bandwidth of the LNA. This 77
14 drawback is reduced by using of the bandwidth extension capacitors. 78
Atiyeh Karimlou received B.Sc. degree in electrical
15 So by using of the large output impedance the voltage gain and NF of engineering from Islamic Azad University Tabriz Branch 79
16 the LNA in the bandwidth are bounded to 19.5 dB and 3.29 dB, in 2011. She is currently working toward the M.Sc. 80
degree in electrical engineering in University of Tabriz,
17 respectively. A shunt feedback DCCC-CGLNA has been proposed to 81
Iran. Her research interests are analog integrated cir-
18 optimize the performance tradeoffs better at such low power cuits and system design focused on low-power and 82
19 consumption. The core circuit occupies only 0.038 mm². low-cost RF transceivers for wireless communications. 83
20 84
21 References 85
22 86
23 [1] D. Ho, S. Mirabbasi, Low-voltage low-power low-noise amplifier for wireless 87
24 sensor networks, in: Proceedings of the Canadian Conference on Electrical and 88
Computer Engineering. CCECE'06. , IEEE, 2006, pp. 1494–1497.
25 89
[2] A. Wheeler, Commercial applications of wireless sensor networks using
26 ZigBee, Commun. Mag. IEEE 45 (2007) 70–77. 90
Roya Jafarnejad received B.Sc. and M.Sc. degree in
27 [3] C.-P. Chang, J.-H. Chen, Y.-H. Wang, A fully integrated 5 GHz low-voltage LNA electrical engineering from University of Tabriz in 91
28 using forward body bias technology, Microw. Wirel. Compon. Lett. IEEE 19 2009 and 2012, respectively. She is currently working 92
(2009) 176–178. toward the Ph.D. degree in electrical engineering in
29 [4] C. Lin, T. Kalkur, M. Morin, A 2.4 GHz Common-Gate LNA Using On-Chip 93
Tarbiat Modares University, Tehran, Iran. Her research
30 Differential Inductors in a 0.18 mm CMOS Technology, in: Proceedings of the interests cover analog integrated circuits focused on 94
31 International Conference on Electrical, Communications, and Computers, radio frequency, microwave and mm-wave integrated 95
2009. CONIELECOMP 2009, IEEE, 2009, pp. 183–188. circuits and low-power transceivers.
32 [5] T. Taris, A. Mabrouki, H. Kraimia, Y. Deval, J.-B. Begueret, Reconfigurable ultra 96
33 low power LNA for 2.4 GHz wireless sensor networks, in: Proceedings of the 97
34 17th IEEE International Conference on Electronics, Circuits, and Systems 98
(ICECS), IEEE, 2010, pp. 74–77.
35 [6] F. Belmas, F. Hameau, J. Fournier, A low power inductorless lna with double
99
36 enhancement in 130 nm CMOS, IEEE J. Solid-State Circuits 47 (2012) 100
37 1094–1103. 101
[7] F. Bruccoleri, E.A. Klumperink, B. Nauta, Wide-band CMOS low-noise amplifier
38 exploiting thermal noise canceling, IEEE J. Solid-State Circuits 39 (2004)
102
Jafar Sobhi was born in Tabriz, Iran. He received B.S.
39 275–282. degree in electrical engineering from University of 103
40 [8] S.B. Wang, A.M. Niknejad, R.W. Brodersen, A sub-mW 960-MHz ultra- Tabriz, Iran. He received M.Sc. and Ph.D. degree in 104
wideband CMOS LNA, in: Proceedings of the Radio Frequency integrated electrical engineering from Urmia University. His
41 105
Circuits (RFIC) Symposium, Digest of papers, IEEE, 2005, pp. 35–38. research interests are high-speed high-resolution Data
42 [9] S.B. Wang, A.M. Niknejad, R.W. Brodersen, Design of a sub-mW 960- MHz converter design, mixed signal circuits design and RF 106
43 UWB CMOS LNA, IEEE J. Solid-State Circuits 41 (2006) 2449–2456. integrated circuits design. He is currently with Electrical 107
44 [10] J. Borremans, P. Wambacq, C. Soens, Y. Rolain, M. Kuijk, Low-area active- Engineering department of University of Tabriz, Iran. 108
feedback low-noise amplifier design in scaled digital CMOS, IEEE Journal of
45 Solid-State Circuits 43 (2008) 2422–2433. 109
46 [11] C. Qin, L. Zhang, Y. Wang, Z. Yu, D. Zeng, An inductorless wideband low noise 110
47 amplifier with current reuse and linearity enhancement, in: Proceedings of the 111
IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2013,
48 pp. 389–392. 112
49 [12] T. Stucke, R. Kokozinski, S. Kolnsberg, B.J. Hosticka, Technology-caused 113
50 performance limitation of the common-gate LNA, in: Proceedings of the 114
18th European Conference on Circuit Theory and Design, ECCTD 2007 , IEEE,
51 2007, pp. 60–63.
115
52 [13] E.A. Sobhy, A.A. Helmy, S. Hoyos, K. Entesari, E. Sanchez-Sinencio, A 2.8-mW 116
53 Sub-2- dB noise-figure inductorless wideband CMOS LNA employing multiple 117
feedback, IEEE Transac. Microw. Theory Techn. 59 (2011) 3154–3161.
54 [14] W. Zhuo, X. Li, S. Shekhar, S. Embabi, J.P. De Gyvez, D. Allstot, E. Sanchez-
118
55 Sinencio, A capacitor cross-coupled common-gate low-noise amplifier, IEEE 119
56 Trans. Circuits Syst. II: Express Briefs 52 (2005) 875–879. 120
[15] Y. Liao, Z. Tang, H. Min, A CMOS wide-band low-noise amplifier with balun-
57 121
based noise-canceling technique, in: Proceedings of the Solid-State Circuits
58 Conference, ASSCC'07, IEEE Asian, IEEE, 2007, pp. 91–94. 122
59 [16] C.-H. Chang, T. Wang, C.F. Jou, Dual cross-coupling LNA with forward body bias 123
60 technique, Electron. Lett. 48 (2012) 1100–1102. 124
[17] F. Belmas, F. Hameau, J. Fournier, a 1.3 mw 20 db gain low power inductorless
61 lna with 4db noise figure for 2.45 ghz ism band, in, Proceedings of the Radio 125
62 Frequency Integrated Circuits Symposium (RFIC), IEEE, 2011. 126
63 127
64

Please cite this article as: A. Karimlou, et al., An inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications,
INTEGRATION, the VLSI journal (2015), http://dx.doi.org/10.1016/j.vlsi.2015.07.009i