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CURRICULUM VITAE

K.Jagadeeswara Reddy Mail Id: jagadeesh_kancharla@yahoo.co.in


(PCB layout engineer) contact: +91-8790230622

Career Objective:

Seeking a quality environment where my knowledge and experience can be shared


and enriched. Looking for a challenging career in PCB DESIGNING with a high
potential for advancement into Design architecture where I can improve my quality
and project designing skills.

Professional Summary:

 5+ years of Experience in High speed PCB designs


 Analog, mixed digital/analog and RF PCB Designs
 Experience in testing and debugging the different kinds of Boards
 High Layer count (14layers) and High density PCB Designs
 Designs with Micro Vias
 Signal Integrity , Cross talk, EMI analysis
 Board and system Level Thermal simulation and analysis
 Multiple Fine pitch BGA (0.8mm) of high pin count
 Having good Experience to working with PCB Fabricator to Match Design
requirement i.e. Impedance ,PCB Thickness, PCB material
 Power plane & Reference plane design.
 Power delivery impedance design criteria.
 Multi layer stack up design.
 Impedance requirements for interfaces.
 Length requirements for interfaces.
 RAM interfaces: lpddr,ddr2,ddr3
 Controlling constraints over on Display, storage, pci related interfaces.
 Land pattern creation using ipc 7351b standards
 DFA,DFT,DFM requirements
 Constraints management in different cad tools.

Core Competences:

 Comprehensive problem solving abilities and Willingness to learn.


 Strong team building, facilitation and mentoring skills with the ability to work
with cross functional teams and to jump in the gap where it is needed.

Education Summary
Degree and Date
Institute Major and Specialization
BTech
JNTUA Electronics and communication
DECE
SBTET ,AP Electronics and communication.
SSC
AP BOARD FIRST CLASS
Skill Set

CAD VENDOR TOOL EXPERTISE


MENTOR GRAPHICS PADS07, , HYPERLYNX SI,

ALTIUM ALTIUM DESIGNER 14

CADENCE Orcad, Allegro 16.6 PCB EDITOR

Employment Summary
DATE/WORK FIRM ROLE REASON FOR
LEAVING
From Aug 2015 Sapient systems personal
To nov2015  pcb designer
From aug2008 Stesalit limited To learn new
to june2015  Sr.pcb designer technologies
(product company)
FROM 2007 TO HELA (HBL&ELTA Closing of project
2008 MAY AVIONICS ISRAEL)  Trainee/projects
-product company

Working environment:

Design of printed circuit boards, including schematic generation, board layout, and
fabrication/assembly documentation using PCB tools

 Translation of design input from electrical and mechanical engineers into


detailed PCB designs to industry standard techniques
 Generation of complete board fabrication and assembly documentation
packages, including assembly, drill, silk screen, solder mask and solder paste
drawings, layer drawings, Gerber files, and Bills of Material
 Ensure designs follow SI constraints, EMI/RFI control, FCC, UL, and other
worldwide regulations
 Running SI,EMI, and Thermal analysis as per customer Or system requirement
 Talking to PCB Fabricator for Impedance requirement and actual PCB Stack up
 Assisting in manufacturing
 General documentation support, supporting cross-company documentation
requests and ECOs
 Testing and debugging the PCB.

In last 07 years I have done lot of PCB design Project. Some of the project described
below which I have done in earlier.

Experience Profile

Project#1

Company: stesalit
Project name: PDA development
No.of .pcbs: 08
Board titles: GSM, GPS, CPU, INPUT CONNECTOR BOARD, BL BOARD, CONNECTORS BOARD

Roles
 Capture board Requirement, Part selection
 Schematics drawing using OrCAD Capture 16.6 (Along with hardware engineer)
 Bill Of material and netlist creation
 Land pattern creation considering IPC Standard.
 Netlist Importing to the Layout
 Setting up the DRC rule as per PCB Fabricator capability
 Placement of the layout
 Done the routing acc. To Specs to with stand EMI & EMC compliances.
 Check the Layout after Routing with DFF & DFT methods
 Preparation of Gerber, NC Drill files for PCB fabrication
 Preparation of final release File for customer.
 Support to PCB manufacturer regarding stackup as this board having multiple
impedance requirement

Project#2

Board Name: Ruggedized Audio Video Recorder Module


Client: DRDO, Bangalore
TOOLS : cadence 16.5, Allegro PCB Editor 16.5
Team size: 02
Period : 4 weeks
Role: PCB Design Engineer
Project Details:
RAVR Board is a 12 layer board which is having , DSP processor ,DDR2 memory,
Ethernet controller, USB Controller,32 Mb NOR Flash and RS-232 Driver, SD ard etc

Contribution:

 Footprint creation considering IPC Standard.


 Testing of entire board
 Net list Importing to the Layout
 Setting up the DRC rule as per PCB Fabricator capability
 Placement of the layout and Complete Routing
 Check the Layout after Routing with DFF & DFT methods
 Preparation of Gerber, NC Drill files for PCB fabrication
 Preparation of final release File for customer

Project#2

Board Name: ERRU


TOOLS : cadence 16.5, Allegro PCB Editor 16.5Team
Team size: 01
Period : 3 weeks
Role: PCB Design Engineer
Project Details:
This involves the development of ARM7based electronic rectifying unit for RDSO

Contribution:

 Footprint creation considering IPC Standard.


 Testing of entire board
 Netlist Importing to the Layout
 Setting up the DRC rule as per PCB Fabricator capability
 Placement of the layout and Complete Routing
 Check the Layout after Routing with DFF & DFT methods
 Preparation of Gerber, NC Drill files for PCB fabrication
 Preparation of final release File for customer
Project#3

Board Name: ESLI Module board


Company: Stesalit
Team size: 02
Role: PCB Design Engineer
Project Details:
ESLI Module board is 6 layer board which is Two sensors, pressure, controllers, valves etc
Contribution:

 Footprint creation considering IPC Standard.


 Testing of entire board
 Netlist Importing to the Layout
 Setting up the DRC rule as per PCB Fabricator capability
 Placement of the layout and Complete Routing
 Check the Layout after Routing with DFF & DFT methods
 Preparation of Gerber, NC Drill files for PCB fabrication
 Preparation of final release File for customer

Other Information:
Notice Period: 1 week

Sex: Male

Date of birth 10-08-1986

Status: single

Location: Hyderabad

Passport file no: G7831960

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