E.G.S. PILLAY ENGINEERING COLLEGE Rev.

0
(An Autonomous Institution, Affiliated to Anna University, Chennai)
COE/2019/QB
Nagore Post, Nagapattinam – 611 002, Tamilnadu.

1702IT304 COMPUTER ORGANIZATION AND ARCHITECTURE

Academic Year : 2019-2020 Programme : B.Tech IT
Question Bank
Year / Semester : II/III Course Coordinator: K.Nagalakshmi

Course Objectives Course Outcomes

1. To make students understand the basic
structure and operation of digital
computer.
2. To study the concepts of pipelining.
3. To expose the students to the concept of
parallelism
4. To familiarize the students with
hierarchical memory system including
cache memories and virtual memory.
On completion of the course, students will be able to
CO1: Understand the concepts of structure of computers and
machine instructions
CO2: Explain the concepts of processing units
CO3: Design and analyze pipelined control units
CO4: Evaluate performance of memory systems
CO5: Understand disk storage and apply RAID concepts in real
time problems

PART – A ( 2 Mark Questions With Key) – K1/K2

S.No Questions Mark BTL
CO1 : Understand the concepts of structure of computers and machine instructions
1 Define Computer Architecture.
Computer Architecture is defined as the functional operation of the individual hardware unit K1
1
in a computer system and the flow of information to control the hardware units.
2 List the basic components of a computer system?
The components of a computer system are 2 K1
 Input Devices  Output Devices  Memory  CPU or processor  Network
3 What is super computer?
A class of computers with the highest performance and cost; they are configured as servers 2 K1
and typically cost millions of dollars.
4 What do you mean by dynamic power dissipation in a computer?
In CMOS (Complementary Metal Oxide Semiconductor), which is the dominant technology 1 K1
for integrated circuits, the primary source of power dissipation is so-called “dynamic
power”—that is, power that is consumed during switching. CMOS technology, unlike earlier
technologies, does not directly consume power when it is idle—hence the use of low clock
rates to allow a processor to “sleep” and conserve power.
The dynamic power dissipation depends on the capacitive loading of each transistor, the 1 K1
voltage applied, and the frequency that the transistor is switched:
Power = Capacitive load X Voltage2 X Frequency switched
5 Show the MIPS code produced by a compiler for the instruction
f = (g + h) – (i + j);
add t0,g,h # temporary variable t0 contains g + h 2 K2
add t1,i,j # temporary variable t1 contains i + j
sub f,t0,t1 # f gets t0 – t1, which is (g + h)–(i + j)
6 Write brief note on data transfer instruction.
A command that moves data between memory and registers. 1 K1
Example: load, store 1
7 Define address in computer architecture.
A value used to delineate the location of a specific data element within a memory array. 2 K1
 E.G.S. PILLAY ENGINEERING COLLEGE Rev.0
(An Autonomous Institution, Affiliated to Anna University, Chennai)
COE/2019/QB
Nagore Post, Nagapattinam – 611 002, Tamilnadu.

8 Define opcode
The field that denotes the operation and format of an instruction. 2 K1
9 Draw the structure of MIPS field for a R-Type instruction format.
op rs rt rd shamt funct 2 K1

6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

10 Show the MIPS code produced by a compiler for the instruction A[300] = h + A[300];
lw $t0,1200($t1) # Temporary reg $t0 gets A[300] 2 K2

add $t0,$s2,$t0 # Temporary reg $t0 gets h + A[300]

sw $t0,1200($t1) # Stores h + A[300] back into A[300]

11 Write any 4 logical operations performed by MIPS architecture
2 K1

12 What is stack pointer?

A value denoting the most recently allocated address in a stack that shows where registers 2 K1
should be spilled or where old register values can be found.
CO2 : Explain the concepts of processing units
1 What is the purpose of lui instruction in MIPS architecture?
The instruction load upper immediate (lui) specifically to set the upper 16 bits of a constant in 2
K1
a register, allowing a subsequent instruction to specify the lower 16 bits of the constant.
2 Draw the instruction format of the following j-type instruction bne $s0, $s1, Exit
2 K1

3 What do you mean by PC-relative addressing?

An addressing regime in which the address is the sum of the program counter (PC) and a 2 K1
constant in the instruction.
4 What is addressing mode?
The way in which the processor access the data 2 K1
5 List the different types of addressing modes in MIPS architecture?
1. Register addressing 2 K1
2. Base or displacement addressing
3. Immediate addressing
4. PC-relative addressing
5. Pseudo direct addressing,
6 What is complier?
The compiler is software which transforms the high level language into an assembly 2 K1
language program, a symbolic form of what the machine understands.
7 Write the function of assembler.
It converts assembly language into machine language 2 K1
8 What is symbol table?
A table that matches names of labels to the addresses of the memory words that instructions 2 K1
occupy.
 E.G.S. PILLAY ENGINEERING COLLEGE Rev.0
(An Autonomous Institution, Affiliated to Anna University, Chennai)
COE/2019/QB
Nagore Post, Nagapattinam – 611 002, Tamilnadu.

9 Define link editor.

A systems program that combines independently assembled machine language programs and 2 K1
resolves all undefined labels into an executable file.
10 What is executable file?
A functional program in the format of an object file that contains no unresolved references, 2 K1
relocation information, symbol table, or debugging information.
11 What is the function of loader?
A systems program that places an object program in main memory so that it is ready to 2 K1
execute.
12 Write the drawbacks in using static link libraries
If a new version of the library is released that fixes bugs or supports new hardware devices, 2 K1
the statically linked program keeps using the old version.
It loads the whole library even if the entire library is not used when the program is run.

PART – B
S.No Questions Mark BTL
CO1:
1 Briefly discuss about different types of computers 12
Desktop, Mainframe, workstation, Laptop, PDA 2
K2
Specifications and salient features 5
Applications of each type 5
2 Explain various types of operands of the Computer Hardware 12 K2
Register operand 4
Constant operand 4
Memory operand 4
3 What is instruction format? Explain different types of instruction formats used in MIPS 12 K2
architecture?
A form of representation of an instruction composed of fields of binary numbers. 2
R-Type 5
I-Type 5
4 Write short notes on the instruction in MIPS architecture to make decision. 12 K2
Definition for conditional branches 2
Different types of Loops 10
5 What is supporting procedure? Explain in detail with suitable examples 12 K2
Definition of supporting procedure 2
Explanation with examples 10
CO2: Explain the concepts of processing units
1 Explain various types of addressing modes in MIPS architectures. 12
Definition of addressing modes 2 K2
Different types of g modes with examples 10
2 Explain about the translation hierarchy for C with suitable diagram 12 K2
Diagram 8
Explanation 4
3 What is object file? Write its fields 12 K2
The assembler turns the assembly language program into an object file, which is a 2
combination of machine language instructions, data, and information needed to place
instructions properly in memory.
 E.G.S. PILLAY ENGINEERING COLLEGE Rev.0
(An Autonomous Institution, Affiliated to Anna University, Chennai)
COE/2019/QB
Nagore Post, Nagapattinam – 611 002, Tamilnadu.

Object file header 10

Text segment
Static data segment
Relocation information
Symbol table
Debugging information
4 What are the drawbacks in using statically linked libraries? How can you solve these 12 K2
issues using Dynamically Linked Libraries?
Drawbacks 4
Benefits of DLL 8
5 Explain about addressing in branches and jumps 12 K2
Explanation about jump (j-type) and branch (bne-type) 12

PART – C (20 Mark Questions with Key) - K3/K4

S.No Questions Mark BTL
CO1:
1 Explain each step associated with manufacturing Pentium 4 chips with necessary
20
diagram.
Introduction about Pentium 4 chips 5
K2
Diagram 5
Silicon ingot ---- Slicer----Blank wafer------Patterned wafers----Wafer tester
10
Dicer-----Bonding----Part tester ----- Ship to customers
2 Consider the Register $s0 contains the value 78 and $s1 contains 43. Write the MIPS 20 K3
code to perform the following operations to store the result in $t0
1. Shift $s0 register for 4 times in left direction
2. Shift $s1 register for 5 times in right direction
3. AND operation between $s0 and $s1
4. OR operation between $s0 and $s1
5. AND operation between $s0 and a constant 144
6. OR operation between $s1 and a constant 9
7. NOT Operation for $s1
8. NOR operation between $s0 and $s1
9. Mask the lest significant nibble of the value stored in $s1
10. Mask the most significant nibble of the value stored in $s1
CO2: Explain the concepts of processing units
1 How can you represent signed and unsigned numbers in MIPS format? 20
Bit wise representation for 32 bits 5 K3
LSB and MSB 5
232 bit combination 10
2 How can you perform addition and subtraction in MIPS architecture? Explain each step 20 K3
in detail.
32 bit binary addition with example 10
32 bit binary addition using 2’s complement 10