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Features General Description: 2A Switch Step Down Switching Regulator
Features General Description: 2A Switch Step Down Switching Regulator
OUT 1 8 VCC
Applications
SYNC 2 7 GND
INH 3 6 VREF
• Consumer: STB, DVD, TV, VCR, Car Radio,
COMP 4 5 FB
LCD monitors
• Networking: XDSL, Modems, DC-DC Modules
SOP-8-P (Top View)
• Computer: Printers, Audio/Graphic Cards,
Optical Storage, Hard Disk Drive
= Thermal Pad
• Industrial: Chargers, Car Battery DC-DC (connected to GND plane for better heat
Converters dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate
termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering
operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C
for MSL classification at lead-free peak reflow temperature.
Block Diagram VC C
D Q
OVP Ck
Oscillator
1.25V REF
Frequency
SYNC Shifter OUT
Inhibit
GND
INH
A logical signal (active high) disables the device. If INH not used the pin must be
3 INH
connected to GND. When it is open an internal pull-up disable the device.
7 GND Ground.
8 VCC Unregulated DC input voltage.
Thermal Characteristics
Symbol Parameter Value Unit
θJA Junction to ambient thermal resistance in free air 45.7 °C/W
* The area of the thermal pad is 4.5mm X 2mm and the GND plane is 60mm X 60mm. Connect the thermal
pad and the GND plane by 8 vias. TA = 25°C.
Electrical Characteristics
The * denotes the specifications that apply over TA = -40 ~ 85oC. Typical values are at TA = 25oC.
VCC = 12V unless otherwise specified.
APW1173
Symbol Parameter Test condition Unit
Min Typ Max
VCC Operating input voltage range V O = 1.235V; IO = 2A * 4.7 22 V
UVLO threshold voltage V CC rising * 3.8 4.2 4.6 V
V UVLO
Hysteresis 0.3 V
Vd Dropout voltage V CC = 4.8V; IO = 2A * 1.0 1.2 V
ILIM Maximum limiting current V CC = 4.8V to 22V * 3.3 3.8 4.3 A
* 400 500 600
fs Switching frequency Main design KHz
410 500 590
Duty cycle 0 100 %
APW1173
Symbol Parameter Test condition Unit
Min Typ Max
Dynamic Characteristics
APW1173
Symbol Parameter Test condition Unit
Min Typ Max
Reference Section
IREF = 0mA 3.234 3.3 3.366 V
VREF VREF Output Voltage IREF = 0mA to 5mA,VCC = 4.4A to
* 3.2 3.3 3.399 V
22V
Line Regulation IREF = 0mA,VCC = 4.4A to 22V 5 10 mV
Load Regulation IREF = 0mA to 5mA 8 15 mV
Short Circuit Current 10 18 30 mA
Other
Thermal Limiting Protection 160 °C
Hysteresis 30 °C
Over-Voltage Protection
VCOMP = 0.8V * 120 125 130 %
Threshold Voltage
D2
RC1 1N4148 APW1173
COUT D1 4.3K CIN VIN
100uF 1N5819
22uF 4.8V to 22V
R1 RF2 RF1
CC1 C1 137K
3.3K 5.6K
2.2nF 1uF
CC2
Soft Start
220pF
Circuit
1 OUT VCC 8
2 SYNC GND 7
RF1 L
3 6
5.6K 22uH INH VREF
4 5
COMP FB
RC1 APW1173
COUT2 RF2 COUT1 D1 4.3K CIN
47uF 3.3K 100uF 1N5819 VIN=5V
22uF
CC1 CC2
2.2nF 220pF
BuckBoost regulator
RC1 APW1173
RF2 RF1 COUT 4.3K CIN2 CIN1 VIN=5V
24K 2.7K 100uF 22uF25V 22uF
CC1 CC2
2.2nF 220pF
-2
10
-4
8
-6
6 -8
-10
4
-12
2
-14
0 -16
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
3.38
-2
3.36
Short circuit current (mA)
-4
3.34
-6
3.32
VREF (V)
-8 3.30
3.28
-10
3.26
-12
3.24
-14
3.22
-16 3.20
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
250
-0.5
Source current (uA)
150
-1.5
100
-2.0
50
0 -2.5
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
VCC=12V
80
10
70 VCC=12V
8 60
VCC=5V 50
Iqst-by (V)
IQ (mA)
6
40
4 30
20 VCC=5V
2
10
0 0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
o
Junction Temperature ( C) Junction Temperature ( C) o
Efficiency vs. Output Current at VIN=5V Efficiency vs. Output Current at VIN=12V
80% 90%
78% 88%
86%
76%
84%
74% 82%
80%
72%
78%
Efficiency (%)
70% 76%
Efficiency (%)
68% 74%
72%
66%
70%
64% 68%
62% 66%
64% VO=2.5V VO=3.3V VO=5V
60% VO=1.8V VO=2.5V VO=3.3V
62%
58% 60%
58%
56%
56%
54% 54%
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
1.240
1.4
1.239
1.3 VIN=5V
1.238
1.2
1.237
VCE (V)
VFB (V)
1.1 1.236
1.0 1.235
VIN=12V
1.234
0.9
1.233
0.8
1.232
0.7 1.231
0.0 0.5 1.0 1.5 2.0 2.5 3.0 -50 -25 0 25 50 75 100 125
o
ICE (A) Junction Temperature ( C)
Switching Frequency
585
565
Switching Frequenct (KHz)
545
525
505
485
465
445
425
-50 -25 0 25 50 75 100 125
Junction Temperature (o C)
Operating waveforms
1. Power ON (no SS) : 2. Power ON (external SS) :
- VIN = 12V,VOUT = 3.3V - VIN = 12V,VOUT = 3.3V
- CIN = 22µF, COUT = 220µF, L = 15 µH - CIN = 22µF, COUT = 220µF, L = 15 µH
IL
IL
V OUT V IN V OUT V IN
COMP COMP
IOUT
IOUT
V OUT
V OUT
COMP
Functional Description
Power-On-Reset
comparator and compared with internal saw tooth wave.
A Power-On-Reset circuit monitors input voltages at It generates a PWM control signal by the PWM
VCC pin to prevent wrong logic controls. The POR comparator. The PWM signal feeds into the logic
function initiates immediately by the inductor current circuit and turns on or off the pass element. The Buck
with it’s limit after the supply voltage exceed firstly it’s type output stage regulates the correct output voltage
threshold voltage after powering on. depends on the previous mechanism.
Output Voltage Regulation Current Limit
An error amplifier working with a temperature-compen- The APW1173 monitors the current flow through the
sated 1.235V reference. The error amplifier designed pass element and limits the maximum output current
with high bandwidth and DC gain provides very fast to prevent damages during overload or short-circuit
transient response and less load regulation. It compares conditions.
the reference with the feedback voltage and amplifies
Over-Voltage Protection (OVP)
the difference in it’s output called error signal. The
error signal feeds into the input terminal of PWM The over voltage protection is realized by using an
The Voltage Feed Forward is acting when VCC goes The Inhibit function disables when the Inhibit voltage
higher than 10V. This will increases the upper bond of lower than 1.3V. APW1173 entered the standby mode
the internal sawtooth wave and results duty keeping with Inhibit voltage higher than 1.4V. The quiescent
constant. The change of the upper bond is linear and current in the standby mode is less than 100uA to
proportion with VCC. saving power. If the Inhibit pin left floating, the Inhibit
voltage will be pull up by internal current source.
Frequency Fold Back
Application Description
Input Capacitor
sary to use low-ESR capacitors. More capacitance
The APW1173 requires proper input capacitors to sup- reduce the variations of the input voltage of VCC pin.
ply current surge during stepping load transients to
Inductor
prevent the input rail from dropping. Due to the wide
range of input voltage, the input capacitor must be Inductor is an important component in the application.
able to support the input operating voltage. Ultra-low- In the switching regulator, energy stored in the inductor
ESR capacitors, such as ceramic chip capacitors, by magnetic field when the pass element conducting.
are very good for the input capacitors. An aluminum This behavior cause the ripple current cycle by cycle,
electrolytic capacitor (>100µF, ESR<300mΩ) is the ripple current flowing through the output capacitor
recommended as the input capacitor. It is not neces- induce the output ripple voltage. In general, the ripple
Where TS is the period of whole cycle. It equal 1/FS In previously,use the parameter ∆I to decide the value
where FS is the switching frequency of APW1173. For of the inductor. As the same manner,use the parameter
example, VIN =12V, VO =3.3V, VD =0.7V, IO =3A, ripple ∆I to approximate the value of output capacitor.
current is IO(20%~40%) =0.6A~1.2A, VCE =1.2V, FS The first part of output ripple voltage,V1,is related to
=250KHz the ESR of output capacitor.It show as (5)
3.3V + 0.7V V1 = ESR × ∆I
D= = 34.78% by (2) (5)
12V − 1.2V + 0.7V
The second part of output ripple voltage,V2,can
Ton = DTS = 34.78% × 2µs = 0.696 µs by (3) calculated by (6)
∆I
For the worst case ripple current equal 0.6A ~ 1.2A V2 = TS (6)
12V − 1.2V − 3.3V 8C
L1 = 0.696µs = 8.7 µH
0.6 A These two parameters determine the value of output
for ripple current is 0.6A… … by (1) ripple voltage and the efficiency. More output ripple
12V − 1.2V − 3.3V voltage cause the efficiency decreased.The output
L2 = 0.696µs = 4.35µH ripple voltage means the energy loss in the ESR and
1.2 A
for ripple current is 1.2A… … by (1) the energy loss in the transition path while the energy
Use the worst case to approximate the minimum value stored and removed in the output capacitor.In other
of inductor. In worst ripple current condition, smaller aspect,the ESR and the value of output capacitor gen
46
component.
44
to Ambient ( o C/W)
Thermal Consideration 42
COMP PIN Consider the Figure-2, find the transfer function H(s)
EA
as:
1.235V
SCOUT ( ESR) + 1
RC1 H ( s) =
S LCOUT + SCOUT ( ESR) + 1
2
CC2
1
CC1 pole1, 2 =
2π LCOUT
1
zero1 =
Adding a resistor and a capacitor at the COMP pin is 2π( ESR)COUT
the simplest way to generate a zero. The placement 1 L
of the components is the show of Figure-1. The Q=
( ESR) COUT
frequency of the zero is
1 The pole1 and pole2 are the conjugate roots of the
f zero = (10)
2πRC1CC1 denominator and the zero1 is the root of the numerator.
The relation of the zero and the natural frequency is Find the Q factor from the quadratic function and the
description of Q factor as above.
f zero = 0.8 ⋅ f natural (11)
The frequency response of the output stage show as
Locate the zero before the natural frequency to com-
Figure-3.
pensate the phase. The another capacitor CC2 used to
bypass the noise. In general
0db
1 slope=-40db/
CC 2 = CC1 (12)
decade
10
In the other applications, use the ceramic capacitor as
the output capacitor is very popular. Because the small
dimension of the ceramic capacitor save the PCB 0d
(Printed Circuit Board) area, the low ESR(Equivalent phase
Series Resistance) of the ceramic one decrease the -90d
-135d
power dissipation of the output capacitor.But the -180d
serious drawbacks of the ceramic one is the stable f
Pole1,2 Zero1
Figure-3
Copyright ANPEC Electronics Corp. 15 www.anpec.com.tw
Rev. A.5 - Aug., 2005
APW1173
Frequency Compensation (Cont.) The frequency response of the PID compensator pre-
The problem is the phase nearly –180 degrees at the sented as Figure-5:
natural frequency especially in the high Q situation. If
the Q factor is high, the phase decrease vary sharp at slope=-20db/
0db
decade
the location of the double poles. This problem leads
the regulator oscillating when use ceramic one as the
output capacitor without compensation. The purpose
of the compensation is saving the phase. The manner
270d
is added additional zeros to achieve the goal. A zero phase
have the ability that contribute the maximum phase of 180d
90 degrees. According this characteristic, needs two
90d
zeros to compensate the phase loss. The PID 45d
compensator is good for this.It shows as Figure-4. 0d
C3 f
Zero2 Zero3 Pole3 Pole4
Figure-5
C2 R3
R2 C1 The assumption is 10(zero2)<zero3,10(zero3)<pole3,
10(pole3)<pole4.In order to compensate the phase,
FB
place the two zeros closely and located before the
R1 natural frequency. In general
EA
COMP zero 2 ≅ zero3 = k ⋅ pole1, 2 (11)
Vref
Where k is a constant, the value of k is almost 0.7 to
Figure-4 0.8.
The transfer function H(s) is The useful rules are:
1 R3 = (2π ⋅ C2 ⋅ k ⋅ pole1, 2 ) −1
zero2 =
2π ⋅ C2 R3 (3) Determine the value of C1 from 470pF to 1uF. This
1 range of C1 is for reference.
zero3 =
2π ⋅ C1 ( R1 + R2 ) (4) The range of pole3 is from 150KHz to 300KHz.
Use this range to find the value of R2.
1
pole3 = (5) Find R1 by the equation
2π ⋅ C1R2
C2 + C3 R1 = (2π ⋅ C1 ⋅ k ⋅ pole1,2 ) −1 − R2
pole4 =
2π ⋅ C2C3 R3 (6) The location of pole4 is 5 times pole3. Use this
result to find the value of R3.
Layout Consideration
1. Please solder the Exposed Pad on the PCB.The heat generated by the power consumption will conduct by
the thermal pad.
2. Please place the input capacitors for VCC pin nearly as close as possible.
3. Connect the switching inductor and the Schottky diode and OUT pin by a wide track.
4. Place the output capacitor close to the inductor as possible and with a wide and short track.
1 8
OUT VCC
L 2 7
SYNC GND
22uH 3 6
INH VREF
4 5
COMP FB
RC1 APW1173
COUT D1 4.3K
RF1 RF2 CIN V IN
100uF 1N5819
5.6K 3.3K 22uF 4.8V to 22V
CC1 CC2
2.2nF 220pF
Packaging Information
0.015X45
E1 E H
D1
e1 e2
A1
A 1
L
0.004max.
Millimeters Inches
Dim
Min. Max. Min. Max.
A 1.35 1.75 0.053 0.069
A1 0 0.15 0 0.006
D 4.80 5.00 0.189 0.197
D1 3.00REF 0.118REF
E 3.80 4.00 0.150 0.157
E1 2.60REF 0.102REF
H 5.80 6.20 0.228 0.244
L 0.40 1.27 0.016 0.050
e1 0.33 0.51 0.013 0.020
e2 1.27BSC 0.50BSC
φ1 8° 8°
Physical Specifications
Terminal Material Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Lead Solderability Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
TP tp
Critical Zone
T L to T P
Ramp-up
TL
tL
Temperature
Tsmax
Tsmin
Ramp-down
ts
Preheat
t 25 °C to Peak
25
Time
Carrier Tape
t
Po P D
E
P1
F Bo
W
Ko
Ao D1
Carrier Tape(Cont.)
T2
C
A B
T1
Application A B C J T1 T2 W P E
SOP-8-P 330±1 62 ± 1.5 12.75 + 2 + 0.5 12.4 +0.2 2± 0.2 12 + 0.3 8± 0.1 1.75± 0.1
0.1 5 - 0.1
Application F D D1 Po P1 Ao Bo Ko t
SOP-8-P 5.5 ± 0.1 1.55±0.1 1.55+ 0.25 4.0 ± 0.1 2.0 ± 0.1 6.4 ± 0.1 5.2± 0.1 2.1± 0.1 0.3±0.013
(mm)
Cover Tape Dimensions
Customer Service