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Abstract In this paper, a completely new concept has been brought to the controller design
for inverters. The capacitor C of the inverter LC filter is regarded as a part of the load and,
hence, the control plant for the inverter controller is just the inductor L. This reduces the order
of the control plant to be 1, reduces the variables to be measured for feedback to two, and
considerably simplifies the design and analysis of the controller. The inherent limitations of the
conventional droop control scheme are then revealed and it is proved that parallel-connected
inverters should have the same per-unit impedance in order for them to share the load accurately
in proportional to their power ratings if the conventional droop control scheme is adopted. The
droop controllers should also generate the same voltage set-point for the inverters. Both of these
two are impractical and difficult to meet, which results in errors in proportional load sharing.
An improved droop controller is then proposed to achieve accurate proportional load sharing.
It is robust against parameter drifts and component mismatches. The strategy also reduces the
output voltage drop due to the effect of loading and droop control so that the output voltage
can be maintained within the desired range around the rated value. Experimental results are
provided to verify the analysis and design. Copyright
c 2011 IFAC.
Keywords: Microgrids, droop control, parallel operation of inverters, proportional load sharing
proportional to their power ratings, the inverters should As is now well known, it is advantageous to force the
have the same per-unit impedance. It also requires that the output impedance of parallel-connected inverters to be
RMS voltage set-points for the inverters to be the same. resistive (Guerrero et al., 2005). The inverter consists of
Both are very strong conditions. A robust droop controller an LC filter and, to the best knowledge of the author, all
is then proposed to achieve accurate proportional load control strategies proposed in the literature have adopted
sharing among inverters connected in parallel in microgrids a second-order model for the inverter. Here, an important
operated in the standalone mode. The accuracy of sharing step forward has been made, that is to regard the capacitor
is no longer dependent on the output impedance of the C as a part of the load instead of a part of the inverter.
inverters originally designed nor on the RMS voltage set- This reduces the control plant to an H-bridge and an
point. Moreover, the controller is able to regulate the inductor, as shown in Figure 1(b). The advantages of this
output voltage to reduce the effect of the load and droop are: 1) it reduces the order of the control plant to be
control on the output voltage. In this paper, the robust 1; 2) it reduces the signals to be measured for feedback
droop controller is proposed for inverters with resistive to one(excluding the feedback for voltage/power control);
output impedances and it can be applied to inverters with and 3) it considerably simplifies the design and analysis of
inductive output impedances as well, by using the Q − E the controller, which facilitates the understanding of the
and P − ω droop. nature of inverter control.
An approach is also proposed in this paper to design Since the control plant is now of the first order, the con-
an inverter to have a resistive output impedance. Since troller can be designed with ease. The proposed controller,
there is normally an LC filter in an inverter to reduce as shown in Figure 2, involves the feedback of the inductor
the switching noise in the output voltage, the approaches current i with a proportional gain.
proposed in the literature all treat the LC filter as the
control plant and the controllers are all designed based + VDC -
on this fact, to the best knowledge of the author. Most uf i io vo
of them adopt the inductor current, the output current L CB
and the output voltage as feedback signals. Some adopt
u IGBT
the capacitor current as feedback. In this paper, a com- PWM C AC bus
bridge
pletely new concept is brought to the controller design
for inverters, based on the observation that the capacitor
can be regarded as a part of the load, instead of a part
of the control plant. Hence, the controller can be designed
(a) Used for physical implementation
according to the filter inductor only. This reduces the order
of the control plant to one and simplifies the control design + VDC -
and system analysis. Moreover, only two sensors (for the uf i vo
inductor current and the output voltage) are needed for L CB
feedback, which reduces the cost of the controller. Because u
of this, the inverter can be designed to have resistive PWM IGBT
C AC bus
bridge
output impedance over a wide range of frequencies, which
considerably facilitates the sharing of nonlinear loads. The
combination of the above leads to a very neat strategy to
achieve accurate proportional load sharing. (b) Used for controller design
Figure 1. A singe-phase inverter
2. CONTROLLER DESIGN FOR INDIVIDUAL
INVERTERS TO ACHIEVE RESISTIVE OUTPUT i
IMPEDANCE
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18th IFAC World Congress (IFAC'11)
Milano (Italy) August 28 - September 2, 2011
which gives E*
vo = vr − Zo (s) · i Ei - Pi vo
ni
with vr
Zo (s) = sL + Ki .
1 Qi i
If the gain Ki is chosen big enough, the effect of the mi
s
inductance is not significant and the output impedance ω it+δ i
can be made nearly purely resistive over a wide range of ω*
frequencies. Then, the output impedance is roughly
Figure 4. The conventional droop control scheme
Zo (s) ≈ Ki ,
Ei Vo cos δi − Vo2
which is independent of the inductance. Pi = , (2)
Roi
With the above control strategy, the inverter can be Ei Vo
Qi = − sin δi . (3)
approximated as a controlled ideal voltage supply vr Roi
cascaded with a resistive output impedance Ro described In order for the inverters to share the load, the conventio-
as nal droop controller
vo = vr − Ro i (1)
Ei = E ∗ − ni Pi , (4)
with
ω i = ω + mi Q i ,
∗
(5)
Ro = Ki . as shown in Figure 4, is widely used to generate the
amplitude and frequency of the voltage reference vri for
Note that vo ≈ u = vr if no load is connected.
each inverter (Guerrero et al., 2007), where ω ∗ is the rated
frequency. Note that the P − E and Q − ω droop is used
3. INHERENT LIMITATIONS OF THE because the output impedances are resistive. Otherwise,
CONVENTIONAL DROOP CONTROL SCHEME the P −ω and Q−E droop should be used when the output
impedances are inductive. The drooping coefficients ni and
Fig. 3 shows two inverters with resistive output impe- mi are normally determined by the desired voltage and
dances connected in parallel. The line impedances are frequency drops, respectively, at the rated active power
omitted because the output impedances of the inverters and reactive power. The frequency ωi is integrated to form
are designed to dominate the impedance from the inverter the phase of the voltage reference vri .
to the AC-bus. The reference voltages of the two inverters
are, respectively, In order for the inverters to share the load in proportio-
√ nal to their power ratings, the droop coefficients of the
vr1 = 2E1 sin(ω1 t + δ1 ), inverters should be in inverse proportional to their power
√
vr2 = 2E2 sin(ω2 t + δ2 ). ratings (Tuladhar et al., 1997), i.e., ni and mi should be
chosen to satisfy
The power ratings of the inverters are S1∗ = E ∗ I1∗ and
S2∗ = E ∗ I2∗ . They share the same output voltage vo . n1 S1∗ = n2 S2∗ = · · · = nn Sn∗ , (6)
Since the output impedances of the inverters are designed m1 S1∗ = m2 S2∗
= ··· = mn Sn∗ . (7)
to be resistive (constant) over a wide range of frequencies, It is easy to see that ni and mi also satisfy
all the harmonic current components can be shared among n1 n2 nn
the inverters in proportion to their power ratings. Hence, = = ··· = .
m1 m2 mn
proportional sharing can be achieved for linear and nonli-
near loads and the following analysis is applicable to both 3.1 Active power sharing
linear and nonlinear loads.
Substituting (4) into (2), the active power of the two
S1 = P1 + jQ1 S 2 = P2 + jQ2 inverters can be obtained as
E ∗ cos δi − Vo
Vo ∠0 o Pi = . (8)
ni cos δi + Roi /Vo
Ro1 Ro 2
Substituting (8) into (4), the voltage amplitude deviation
~ E ∠δ
1 1 Z E 2 ∠δ 2 ~ of the two inverters is
E ∗ cos δ1 − Vo E ∗ cos δ2 − Vo
∆E = E2 − E1 = Ro1
− . (9)
cos δ1 + n1 Vo cos δ2 + nR2o2
Vo
Figure 3. Two inverters with resistive output impedances It is known from (Tuladhar et al., 1997) that the voltage
connected in parallel deviation of the two units leads to considerable errors in
load sharing. In order for
The active and reactive power of each inverter injected P1 P2
n1 P1 = n2 P2 or = ∗
into the bus (Guerrero et al., 2005) are S1∗ S2
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18th IFAC World Congress (IFAC'11)
Milano (Italy) August 28 - September 2, 2011
to hold, the voltage deviation ∆E should be 0 according Proof. If (10) and E1 = E2 hold, then proportional active
to (4). This is a very strict condition because there are power sharing is achieved according to (4). As a result,
always numerical computational errors, disturbances, pa- (11) holds according to (9) and (13). Furthermore, reactive
rameter drifts and component mismatches. This condition power sharing proportional to their ratings is achieved and
is satisfied if (14) holds. Conversely, if (11) and (14) hold, then E1 = E2
n1 n2 according to (13). Furthermore, (10) holds according to
= (10)
Ro1 Ro2 (9). This completes the proof.
and This theorem indicates that if inverters with resistive
δ1 = δ2 . (11) output impedances are designed to achieve accurate pro-
portional active power sharing, then they also achieve
In other words, ni should be chosen to be proportional to proportional reactive power sharing in the ideal case. The
its output impedance Roi . converse is also true. However, it is almost impossible in
Taking (6) into account, in order to achieve accurate reality if this strategy is used. It is difficult to maintain
sharing of active power, the (resistive) output impedance E1 = E2 = · · · = En because there are always numerical
should be designed to satisfy computational errors, disturbances and noises. It is also
difficult to maintain γ1 = γ2 = · · · = γn because of pa-
Ro1 S1∗ = Ro2 S2∗ = · · · = Ron Sn∗ . (12) rameter drifts and component mismatches. A mechanism
is needed to guarantee that accurate proportional load
Since the per-unit output impedance of Inverter i is
sharing can be achieved.
Roi Roi Si∗
γi = ∗ ∗ = ,
E /Ii (E ∗ )2 4. ROBUST DROOP CONTROLLER TO ACHIEVE
ACCURATE PROPORTIONAL LOAD SHARING
there is
.
γ1 = γ2 = · · · = γn = γ. As a matter of fact, the voltage droop (4) can be re-written
as
This simply means that the per-unit output impedances
of all inverters should be the same in order to achieve ∆Ei = Ei − E ∗ = −ni Pi ,
accurate proportional active power sharing. Recall that
power transformers with different power ratings have more and the voltage Ei can be implemented via integrating
or less the same per-unit output impedances (although not ∆Ei , that is,
resistive). Zt
Ei = ∆Ei dt.
3.2 Reactive power sharing
0
When the system is in the steady state, the two inverters This works for the grid-connected mode where ∆Ei is
work under the same frequency, i.e., ω1 = ω2 . It is well eventually 0 (so that the desired power is sent to the grid
know that this guarantees the accuracy of reactive power without error), as proposed in (Marwali et al., 2004; Li
sharing for inverters with resistive output impedances (or et al., 2004; Dai et al., 2008). However, it does not work
the accuracy of active power sharing for inverters with for the standalone mode because the actual power Pi is
inductive output impedances); see e.g. (Li and Kao, 2009). determined by the load and ∆Ei cannot be 0. This is
Indeed, from (5), there is why different controllers had to be used for the standalone
m1 Q 1 = m2 Q 2 . mode and the grid-connected mode.
Since the coefficients mi are chosen to satisfy (7), reac- According to (1), the output voltage vo drops when the
tive power sharing proportional to their power ratings is load increases. It also drops due to the droop control,
(always) achieved, i.e., according to (4). In order to make sure that the output
Q1 Q2 voltage remains within a certain required range, the output
= ∗. voltage drop E ∗ − Vo can be added to ∆Ei via an
S1∗ S2 amplifier Ke . This actually results in an improved droop
According to (3), there is controller shown in Figure 5. It is able to eliminate (at least
considerably reduce) the impact of computational errors,
E1 Vo E2 Vo noises and disturbances. As to be explained below, it is also
m1 sin δ1 = m2 sin δ2 . (13)
Ro1 Ro2 able to maintain accurate proportional load sharing and
hence robust with respect to parameter drifts, component
If δ1 = δ2 and E1 = E2 then
m1 m2 mismatches and disturbances. In the steady state, the
= . (14) input to the integrator should be 0. Hence,
Ro1 Ro2
ni Pi = Ke (E ∗ − Vo ). (15)
Theorem For inverters designed to have resistive output
impedances, if the system is stable, then the following two The right-hand side of the above equation is always the
sets of conditions are equivalent: same for all inverters connected in parallel as long as Ke is
(
E1 = E2
(
δ1 = δ2 chosen the same, which can be easily met. Hence, accurate
n1 n2 ⇐⇒ m1 m2 . real power sharing can be achieved without having the
= = same Ei , which is more natural. The active power sharing
Ro1 Ro2 Ro1 Ro2
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18th IFAC World Congress (IFAC'11)
Milano (Italy) August 28 - September 2, 2011
Ke
-
RMS 0.5
0 i2
Ei 1 - ni Pi −0.5
s vo
vri −1
−1.5
1 Qi i 7.8 7.82 7.84 7.86 7.88
mi
s Time (sec)
ω it+δ i (b) Currents
ω*
Figure 6. Experimental results with a linear load
Figure 5. The proposed robust droop controller to obtain experiment. It can be seen that the two inverters shared
accurate proportional load sharing the load very accurately in the ratio of 2 : 1, although
E1 6= E2 . A prominent feature is that the voltage E1 and
5. EXPERIMENTAL RESULTS E2 are different and both are higher than the rated value
12V. There was no need to change the operation mode of
The above strategy has been verified in a laboratory Inverter 2 when connecting or disconnecting Inverter 1.
setup. It consists of two single-phase inverters controlled
by dSPACE kits and powered by separate 42V DC power 5.2 With a nonlinear load
supplies. The values of the inductors and capacitors are
2.35mH and 22µF, respectively. The switching frequency A nonlinear load, consisting of a rectifier loaded with
is 7.5kHz and the frequency of the system is 50Hz. The an LC filter and the same rheostat used in the previous
nominal output voltage is 12V RMS and Ke = 10. The experiment, was connected to Inverter 2 initially. Inverter 1
droop coefficients are: n1 = 0.4 and n2 = 0.8; m1 = 0.1 was connected to the system at around t = 2.7 second and
and m2 = 0.2. Hence, it is expected that P1 = 2P2 . In the was then disconnected at around t = 9.7 second. Figure
experiments, Ki was chosen as 4 for both inverters. Due 7 shows the relevant curves of the experiment. It can be
to the configuration of the hardware setup, the voltage for seen that the two inverters were still able to share the load
Inverter 2 was measured by the controller of Inverter 1 and very accurately in the ratio of 2 : 1, although E1 6= E2 .
then sent out via a DAC channel, which was then sampled The dynamic performance did not change much either.
by the controller of Inverter 2. This brought some latency
into the system but the effect was not noticeable. 6. CONCLUSIONS
5.1 With a linear load In this paper, it has been shown that the capacitor of the
inverter LC filter can be regarded as a part of the load
A linear load of about 9Ω was connected to Inverter instead of a part of the inverter, which considerably redu-
2 initially. Inverter 1 was connected to the system at ces the complexity of system analysis and controller design
around t = 2 second and was then disconnected at around and reduces the cost of the controller. The, the inherent
t = 7.5 second. Figure 6 shows the relevant curves of the limitations of the conventional droop control scheme has
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18th IFAC World Congress (IFAC'11)
Milano (Italy) August 28 - September 2, 2011
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