CONTENTS

Topics Page No
Acknowledgement i
Abstract ii
List of Figures v
List of Tables vi
Abbreviations vii
CHAPTER 1: OVERVIEW OF THE PROJECT 1-2
1.1 Introduction 1
1.2 Problem Statement 2
1.3 Motivation 2
1.4 Objective 2
1.5 Methodology Adopted 2
1.6 Tools Required 2
1.7 Organization of the Report 2
CHAPTER 2: LITERATURE SURVEY 3-5
2.1 Introduction 3
2.2 Genesis of the Report 3
2.3 Conclusion 5
CHAPTER 3: DOMINO LOGIC USING CLOCK GATING 6-8
3.1 Introduction 6
3.2 Domino logic 6
3.3 Clock gating 6
3.4 Full adder 6
3.5 Conclusion 8
CHAPTER 4: DOMINO LOGIC CIRCUIT DESIGNS 9-18
4.1 Introduction 9
4.2 CMOS inverter 9
4.3 NAND gate 11
4.4 Full adder 17
4.5 Conclusion 18
CHAPTER 5: RESULTS AND DISCUSSION 19-26
5.1 Introduction 19
5.2 CMOS inverter in domino logic 19
5.3 CMOS inverter waveforms 19
5.4 NAND gate using domino logic 20
5.5 NAND gate waveforms 21
5.6 Multiplexer with transmission gates 21
5.7 Multiplexer waveforms 22
5.8 NAND gate during standby mode 22
5.9 Two-input NAND gate waveforms 23
5.10 Multiplexer used in full adder 23
5.11 Multiplexer waveforms 24
5.12 Full adder circuit 24
5.13 Full adder waveforms 25
5.14 Comparison table 25
5.15 Conclusion 26
CHAPTER 6: CONCLUSION AND FUTURE SCOPE 27
6.1 Conclusion 27
6.2 Future scope 27
REFERENCES 28
APPENDIX