Professional Documents
Culture Documents
List of Experiments:
1. Verification of Maximum Power Transfer theorem
2. Verification of Thevenin’s and Norton’s theorems
3. Study of resonance in series RLC and parallel RLC circuits
4. Analysis of step-up and step-down transformer
5. Implement of series RC circuit as differentiator and integrator. Also perform
their analysis as low pass and high pass filters
6. Implementation of clipping and clamping circuits
7. Implementation of half-wave and full wave rectifier circuits
8. Application of LEDs in electronic circuits
9. Implementation of CE amplifying configuration. Plot gain vs frequency graph
10. Implementation of Adders and subtractors.
11. Implementation of JK and Toggle flip-flops. Subsequently implement 3-bit
asynchronous up-counter.
12. Measurement of power in single phase circuits using three voltmeter and
three ammeter method.
13. Experiments with common sensors
14. Experiment with embedded computers
ECC06: Electronics II
Total Hours: 34 Hours
No of
S. No. Topics
Hours
Differential amplifier and its dc and ac analysis using BJT and MOSFET,
3. 7 Hours
Differential amplifier with active load
SUGGESTED READINGS:
1. A Sedra and K Smith, ``Microelectronics Circuit,’’ Oxford University Press
2. Boylestad and Nashelsky, ``Electronics Devices and Circuits,’’ Prentice Hall India
3. Millman and Grabel, ``Microelectronics,’’ Tata McGraw Hill
LIST OF EXPERIMENT:
1. To perform and plot frequency response of inverting and non-inverting amplifier using Op-Amp
IC-741.
2. To study integrator and differentiator circuits using Op-Amp IC-741
3. To perform & study of the simple current mirror and Wilson Current Mirror circuit using IC-3086.
Also plot the graph between Iout and Vout and determine Rout.
4. To perform & study the circuit of the Differential Amplifier using IC-3086 / 3046. Find the voltage
gain and plot the frequency response curve.
5. To perform a RC Phase shift Oscillator Circuit using Op-Amp IC-741 and find out frequency of
oscillation.
6. To perform a Wein’s Bridge Oscillator Circuit using Op-Amp IC-741 and find out frequency of
oscillation.
7. To perform & study a square & triangular wave generator circuit using IC-741.
8. To perform and study the different feedback circuits in the following configurations :
a. Voltage series feedback amplifier (VCVS)
b. Voltage shunt feedback amplifier (CCVS)
c. Current series feedback amplifier (VCCS)
d. Current shunt feedback amplifier (CCCS)
Prof. Maneesha Gupta
Course Coordinator
References:
Books:
1. E. C. Jordan and G.B. Balmain, "Electromagnetics Waves and Radiating Systems", PHI, 2nd
edition.
2. David K Cheng, “Field and Wave Electromagnetics”, Pearson Education Inc, Delhi.
3. M.N.O. Sadiku, "Principles of Electromagnetics", 4th international Version, Oxford University
Press.
4. W. H. Hayt and J. A. Buck "Engineering Electromagnetics" Seventh Edition, McGraw Hill
Education.
Prof. D. K. Upadhyay
Course Coordinator
Books to be referred
1. A.S. Sedra and K.C. Smith, “Microelectronics circuits”, 5thEdition, Oxford University Press,
India.
2. J. Millman and A. Grabel, “Microelectronics”, 2nd Edition, Tata McGraw Hill.
3. Robert L. Boylestad, “Electronic Devices and Circuit Theory”, 8thEdition, Pearson.
1. To study and perform positive clipper, negative clipper and slicer circuit. Also draw output
waveform.
2. To study and perform positive clamper and negative clamper circuit. Also draw output waveform.
3. To perform and plot frequency response of inverting and non-inverting amplifier using Op-Amp
IC-741.
4. To perform a Wein Bridge Oscillator Circuit using Op-Amp IC-741and find out frequency of
oscillation.
5. To perform & plot the characteristics curve (ID/VDS) of MOSFET using CD4007.
6. To perform and plot frequency response of common source amplifier using CD4007.
7. To study and perform CE amplifier using BJT. Find the voltage gain and plot the frequency
response curve.
8. To perform & study of the simple current mirror and Wilson Current Mirror circuit using IC-3086 /
3046. Also plot the graph between Iout and Vvar and determine Rout.
Prof. A. K. Singh
Course Coordinator
ICC06: Electronics
S. No. Topics to be covered No. of Lectures
Books to be referred
Total lectures 34
Books to be referred
1. M M Mano, ``Digital logic and computer design ,’’ Prentice Hall India
2. Millman & Grabel, ``Microelectronics,’’ Tata McGraw Hill
3. Donald D. Givone, ``Digital principles & design,’’ Tata McGraw Hill
4. R. P. Jain, ``Modern digital electronics,’’ Tata McGraw Hill
4. Realization of Digital Filters: FIR filter structures: Direct form, cascade, linear-phase 03
structures. IIR filter structures: Direct form-I, direct form-II, cascade-form, parallel-
form structure.
6. IIR Digital Filters: Impulse Invariant method, Bilinear transformation method, IIR 04
filter specifications, Butterworth and Chebyshev filter, Frequency transformation in
analog and digital domain.
Total Lectures 36
Lab 24
Total 60
BOOKS:
2. Waveform Coding:
PAM, PPM, PWM their generation and detection circuits, Quantization 5
Noise, PCM, Companding, DPCM, DM and ADM (modulators and
demodulators), TDM and standards.
FIRST CLASS TEST 1
3. DIGITAL COMMUNICATION:
Gram-Schmidt orthogonalization Procedure, Maximum likelihood 11
Detection, Correlation Receiver, Matched Filter Receiver, Digital
Modulation format, Coherent Binary Modulation techniques, Coherent
Quardrature Modulation techniques. Detectors for ASK, PSK, FSK, QPSK,
QAM, DPSK. Performance analysis in presence of AWGN.
MID SEMESTER TEST
4 DIGITAL SIGNALING: 8
Error rate due to channel noise in a Matched-filter receiver, intersymbol
interference, Signal design for zero ISI, Nyquist’s criterion for distortionless
baseband binary transmission, Raised cosine spectrum, square root raised
cosine spectrum
5. SOURCE CODING TECHNIQUES:
Measure of information, entropy, properties of entropy, Lempel Ziv and 8
Shannon-Fano and Huffman Coding, Mutual information and its properties,
channel capacity, Shannon Theorem-I and II, Binary Symmetric Channel,
BEC, Repetition of signals.
Books Recommended:
1) Communication Systems by Haykins, Wiley Publication
2) Digital communication by Haykins, Wiley Publication
Evaluation Scheme: (15 marks)
i. Class tests : weightage- 5marks
ii. Teacher Assessment Quality: weightage 5 marks
iii. Assignments : weightage- 5 marks
Using Shannon Fano Encoding technique find the codes and the compression ratio.
1101000
0110100
10. Generate a (7,4) Linear Block Code given a generator matrix 𝐺 = [ ]. Assume that
1110010
1010001
the received vector is 1 0 0 1 0 0 1. Find the Syndrome.
Laboratory Experiments:
1. Introduction
The purpose of the ECC17 lab is to familiarize you with the working of an 8085 based microprocessor
system. Since the 8085 microprocessor is being introduced to you as part of the ECC17 course, it is
important that you are aware of the basic 8085 operations before you can perform any experiments on
the 8085 microprocessor and then understand the structure of a 8085 based system.
It is recommended that you have access to the book ’Microprocessor Architecture, Programming and
Applications with the 8085’ by Ramesh S. Gaonkar, 5th edition, published by Penram International for
this lab.
2. Basic Experiments
To begin with it is important to understand that the experiments for the 8085 microprocessor will be
performed on the 8085 Microprocessor kit available in the lab. This kit is made by Vinytics and is
similar to the kit discussed in Gaonkar’s book.
The first exercise that you must perform is to try and understand the operation of the kit, the various
components on the kit and their functions. It may be pertinent to point out here that this 8085 kit is a
computer in its own right. Consequently, like all computers, it has a control program stored in one of
the memory chips. When you power up this Kit, this control program starts running on the kit.
• Exercise 1
List out the major components that you see on the kit. Find out the function of these components and
classify these components into the various broad categories of components
Write a suitable report.
• Exercise 2
Read the manual supplied with the Vinytics kit. The keyboard on the kit has two groups of keys: red
keys and black keys. Understand the operation of all the red keys. The red keys are function keys and
the black keys are data keys.
Power up the kit and using the function keys store a few arbitrary numbers in the SRAM chip of the
kit. Now power off the kit for a few minutes and power it up again. Inspect the SRAM locations again
and verify that the contents of these SRAM locations have not changed even after you powered down
the Kit. Find out why. Give your suggestions for the implementation of a circuit that would help retain
the contents of the SRAM even if the main power is turned off. Can you replace the SRAM chips with
any other type of chip and still be able to modify the contents of those chips? What would be the
advantages or disadvantages of those alternatives? Write a report.
• Exercise 3
At this point you are familiar with the basic operation of the kit. Now, you must be aware of some of
the 8085 instructions to be able to perform the exercies in this groups.
Write a program to add a series of 10 numbers. These numbers are stored in consecutive memory
locations in the SRAM. The result should be stored in the memory locations following the input data.
What should be the size of the result location? What if you were to add a series of 1000 numbers? How
much result storage space would be sufficient? Write a report.
• Exercise 4
Write a program to arrange the above 10 numbers in SRAM memory in ascending order. Repeat you
experiment to arrange the data in descending order. Write a report.
• Exercise 5
Find out the meaning of checksum of a series of input data. Assume that the input data has 20 bytes.
Write a program to generate the checksum of the input data stored in some memory locations in the
SRAM. Store the checksum in a separate memory location. Write a report.
• Exercise 6
Understand the advantage of using subroutines. Rewrite the above programs using subroutines as much
as possible.
• Exercise 7
Develop a subroutine for a Multiply and divide operations.
• Exercise 8
Write routines to convert Binary to ASCII, ASCII to binary, binary to BCD, BCD to binary.
• Exercise 9
Write a program to test the RAM on the Kit.
• Exercise 10: N-point Averaging
An array in RAM contains input data. Write a subroutine to implement a 3-point averaging, i.e. Data(x)
= (Data(x-1) + Data(x) + Data(x+1))/3.
• Exercise 11
Write a program to generate a square wave on the SOD pin of the 8085.
• Exercise 12
Study the operation of 8255 Interface Card. As outlined in the 8255 Study Card Manual.
• Exercise 13
Study of 8259 Interface Card. As outlined in the 8259 Study Card Manual.
• Exercise 14
Reprogram the 8279 display and keyboard controller of the kit to operate in polling mode and read the
keyboard and display code of the Black Data keys that are pressed on the seven-segment display
• Exercise 15
Study of 8237 Interface Card. As outlined in the 8237 Study Card Manual.
Mr. D. V. Gadre
Course Coordinator
Reference Books:
1. Kraus, John D. & Mashefka, Ronald J. / “Antennas: For All Applications” / Tata McGraw Hill.
2. Jordan Edwards C. and Balmain Keith G./ “Electromagnetic Waves and Radiating Systems”
Prentice Hall (India)
3. Antenna Theory analysis and design by Balanis, TMH.
LIST OF EXPERIMENT
1) Introduction and hands on practice on ANSYS HFSS Full-wave EM Simulator.
2) Stripline Transmission line modeling for circuit Board using EM Simulator.
3) Design and Analyze the Dipole antenna using ANSYS HFSS.
4) Construct and Analyze the Monopole Antenna on EM Simulator.
5) Design and Analysis of the Patch antenna with Coaxial Probe feed.
6) Design and Analysis of Linear Array, using full wave EM Simulator.
7) The Measurement of S-parameters of any Device under test (DUT) like one, two and Three port
devices (which designed by students) using the vector Network Analyzer (VNA)
8) Minor Project assigned in the Lab.
References:
List of Experiments:
1. Bipolar Gilbert Multiplier: (i) determination of its transfer characteristics (ii) operation as a
squarer and frequency doubler (iii) Tone burst generator
6. Comparative performance evaluation of MOS Wilson Current mirror, Gilbert Mirror (cascode
current mirror) and Modified Wilson Current mirror, in respect of (i) error in current ratio (ii)
dynamic output resistance (iii) Compliance voltage range
7. Realisation and verification of a linearized CMOS grounded VCR and its application in
realizing a electronically-controllable filter
9. SPICE simulation studies on a CMOS CCII: determination of linear range and applications in
realizing various controlled sources
10. SPICE simulation studies on a BiCMOS CCCII: verification of the realizations of positive and
negative resistors
Lecture/tutorial
S.No
Topics to be covered L T
1 Introduction to number system and codes: Radix conversion 1
2 Binary codes (BCD, 2421, excess-3, 84-2-1, 5421, gray), 1 1
3 Conversion form binary to gray and vice-versa, 1
Simplification Using Boolean algebra and standard forms of
4 1
Boolean Expressions 1
5 Venn Diagram of boolean expression
6 DeMorgans Theorems and solve the problem and implementation 1
1
7 Hamming codes for error detection and error correction. 1
Parity checker and detector (EVEN/ODD) and Designing and 1
8 1
Implementation using GATE.
Sequential Machines: Introduction, flip-flops and excitation table.
9 3
Design of counters.
10 Synthesis of synchronous sequential machine, capabilities and
3 1
limitations of Finite State machine.
Class Test-I
11 Combinatorial System: Switching algebra, switching functions. 1 1
Isomorphic systems, Electronic gate networks, Design procedure,
12 2
Adders, Subs tractors, Code conversion, Binary parallel adder
13 Boolean Algebra: Axioms, Canonical & standard forms, Logic 1
gates, Simplification of Boolean functions (up to 5 variables)
2
using (i) K-map (ii) Tabulation (Quin-Mclusky) method, NAND
& NOR implementation
14 Minimization: Use of minimization techniques, minimal functions
1
and their properties
Mid-Term Examination
Quine-McCluskey method for determination of prime implicants 1
15 2
by tabulation procedure,
16 The prime implicant chart. 1
17 Heuristic two level circuit minimization 1 1
18 Multi output two-level circuit minimization 1
19 Synthesis of switching functions: use of logic gates, 2
1
20 logic design with integrated circuits, NAND and NOR circuits 1
21 Design of high speed adders 2
1
22 Analysis and synthesis of contact networks. 1
Class Test-II
Fault Diagnosis: Introduction, fault tolerance techniques, design
23 1
for testability. 1
24 Unicast and Multicast Routing 3
Finite Automata: Deterministic accepters and transition graphs,
25 2 1
Language and Dfa’s, Regular languages.
Non-deterministic finite accepters, Definition of non-deterministic
26 2 1
accepters, why non-determinism
Equivalence of deterministic and non-deterministic finite
27 1
accepters, Reduction of the number of states in finite automata.
SUGGESTED BOOKS:
5. Analyze the outgae performance for Rayleigh faded wireless communication systems.
6. Analyze the ergodic capacity performance for Rayleigh faded wireless communication systems.
7. Observe the impact of transmit diversity on the error performance of wireless communication
system.
8. Analyze the error and outage performance of receive diversity using selection combining.
9. Compare the performance for selection combining and Maximal Ratio Combining techniques.
10. Simulate the 2 X 2 wireless communication system utilizing Alamouti STBC and plot the BER
versus SNR performance over Rayleigh fading channel.
Dr. Ankur Bansal
Course Coordinator
ECD18: Cryptography
SUGGESTED READINGS:
Prof. S. P. Singh
Course Coordinator
M. Tech. Course (Odd Semester 2019-2020)
Suggested Readings
(a) K. Hoffman and R. Kunze, “Linear Algebra,” 2nd Edition, Prentice Hall Inc.
(b) Kato. T., “Perturbation theory for linear operators”, Springer-Verlag, Berlin, 1995.
(c) Parthasarathy, K. R., “Coding theorems of Classical and Quantum Information theory,” Hindustan
Book Agency, 2013..
(d) Amrein, W.O., “Hilbert space methods in Quantum mechanics,” CRC Press book, 2009.
(e) Steven Weinberg, “Gravitation and Cosmology: Principles and Applications of the General theory of
relativity,” Wiley (1972).
Books:
1. P. P. Vaidyanathan, “Multirate Systems and Filter Banks,” Prentice Hall.
2. S. K. Mitra, “Digital Signal Processing: A Computer Based Approach,”McGraw-Hill.
3. Tarun Kumar Rawat, “Digital Signal Processing,” Oxford University Press.
Mid-Sem Examination
Text Books:
References:
[R1] Simon O. S Theodoridis, K Koutroumbas, Pattern Recogntion, 4th Edition,
Academic Press, 2009.
[R2] Bishop, Pattern Recognition and Machine Learning, Springer, 1st ed. 2006
List of Experiments:
1. Calculate the output of a simple neuron
2. Create and view custom neural networks
3. Classification of linearly separable data with a perceptron
4. Classification of a 4-class problem with a 2-neuron perceptron
5. Classification of an XOR problem with a multilayer perceptron
6. Classification of a 4-class problem with a multilayer perceptron
7. Radial basis function networks for function approximation
8. Radial basis function networks for classification of XOR problem
9. Implementation of a deep neural network
10. Experiment on image processing using a Convolutional Neural Network
CLASS TEST I
b. CLASSICAL DETECTION THEORY (Contd.) 03
c. M-ary hypothesis testing problems.
3. ESTIMATION THEORY 08
a. Estimation of random parameters, Bayes estimation, Minimum mean square (MMS)
estimate and Maximum a posteriori (MAP) estimates. Properties of cost function,
Estimation of nonrandom parameters, Maximum likelihood (ML) estimate.
MID SEMESTER EXAMINATION
b. ESTIMATION THEORY (Contd.) 05
Course Coordinator
Dr. Ankur Bansal
SPD10: Speech Processing
S. Lecture syllabus Duration CO
No.
1. Introduction: The speech signal, classification, process of speech (3 hrs) [CO1]
production, acoustic phonetics, articulatory phonetics, Pitch,
formants, various applications.
2. Digital Model of Speech Signal: The process of Speech (8 hrs) [ CO1,
production, Sound propagation, tonal/ non-tonal components, CO2]
global threshold (MPEG- I), Uniform lossless tube model, digital
model.
3. Time domain models for speech processing: Time dependent (6 hrs) [CO3]
processing of Speech, Short time average energy, short time
average magnitude, short time average zero crossing rate, speech
Vs silence discrimination, pitch period estimation, short time auto
correlation function.
4. Short time Fourier analysis: Fourier transform interpretation, (6 hrs) [CO3]
Linear filtering Interpretation, filter bank summation method,
overlap addition method, Homomorphic speech processing.
References:
1. Digital processing of Speech signals by Rabiner and Schaffer
2. Speech Communication, Human and machine by Douglas O’ Shaugnessy.
Section Experiment Aim of the experiment
no.
Basics of speech 1 (a) Compare the time domain and frequency domain plots of a
data acquisition speech signal sampled at 44.5KHz, 16KHz and 8KHz
respectively and thus validate the view that speech signal can be
considered band limited to 4KHz.
1(b) To study the significance of bit resolution: Record a sentence
“Should we chase” using wavrecord at Fs = 8KHz and R = 16
bits/sample and R=8 bits/sample.
1(c) To study the significance of anti-aliasing filter: The sentence
“Should we chase” is recorded at R = 16 and fs = 8KHz. It is
re-sampled to 4KHz by
i) directly taking alternate samples
ii) first passing through anti aliasing lpf (cutoff <= 2KHz)
and then taking alternate samples. For all the three
signals time domain and frequency domain plots are
obtained.
Study of different 2(a) To study the time and frequency domain manifestations of
sound speech from different sound units in Hindi language.
Units in Indian 2(b) To study randomness of speech using statistical properties.
languages
Time domain 3(a) To study short term speech parameters in time domain—short
analysis term energy and zero crossing rate
3(b) Pitch estimation using short term autocorrelation
Frequency domain 4(a) Cepstral analysis of speech signal
analysis 4(b) Pitch determination using Cepstral analysis
4(c) To understand the concept of spectrum and STFT.
Digital Speech 5 To study compression of digital audio
Compression
Linear Predictive 6 To study of linear predictive coding of speech signal
coding
MID SEMESTER
CLASS TEST 2
SUGGESTED READINGS:
CMOS logic design: The CMOS Inverter, CMOS Logic Gates: NAND Gate, 08
NOR Gate, Compound Gates, Pass Transistors and Transmission Gates, Tristates,
Multiplexers, adders, multipliers. Sequential Circuits: Latches and flip-flops,
counters etc.
Mid Sem. Exam
Analog CMOS Sub circuits: MOS Switch, Active Resistor/Loads, Currents Sinks 08
and Sources, The Current Mirrors, Amplifiers, cascade amplifiers, Flip voltage
followers, Design of a two-stage CMOS OP-AMP. Operational Trans conductance
amplifiers and its application, MOS trans linear circuits
Second Class Test
Testing, Debugging, and Verification: Test vectors, Fault Models, Observability, 06
Controllability Repeatability, Survivability, Fault Coverage, Automatic Test
Pattern Generation (ATPG) Delay Fault Testing, Ad Hoc Testing,
Text Books:
1. Neil H. E. West & D M Harris, CMOS VLSI Design, Addison-Wesley, Fourth Edition.
2. B. A. Pucknell & K. Eshraghian, Basic VLSI Design, PHI, 3rd Edition
References:
List of Experiments:
1. Study of I-V characteristics of PMOS and NMOS Transistor.
Core of the Embedded System: General Purpose and Domain Specific Processors, ASICs, PLDs,
Commercial Off-The-Shelf Components (COTS). (5 classes)
Memory: ROM, RAM, Memory according to the type of Interface, Memory Shadowing, Memory
selection for Embedded Systems. (5 classes)
Communication Interface: Onboard and External Communication Interfaces such as UART, I2C, SPI
(5 classes)
Reset Circuit, Brown-out Protection Circuit, Oscillator Unit, Real Time Clock, Watchdog Timer,
(3
classes)
Operating System Basics, Types of Operating Systems, Tasks, Process and Threads, Multiprocessing
and Multitasking, Task Scheduling.
Shared Memory, Message Passing, Remote Procedure Call and
Sockets, Task Synchronization: Task Communication/Synchronization Issues, Task Synchronization
Techniques, Device Drivers, How to Choose an RTOS. (7 classes)
Reference Books:
1. Proposal of a standalone, microcontroller based hardware project that has suitable input and
output devices, sensors, intra-system communication protocols (I2C, SPI etc), memory storage
device, power supply and uses a modern microcontroller of your choice (AVR, MSP430, ARM
Cortex M0, M3, M4 etc) and this should achieve something useful.
2. Gantt’s chart for implementing the proposed project during the course of the semester. This
should include tasks such as visualization of the project, schematic capture, PCB design and
layout, PCB fabrication, code development, project fabrication and integration, testing and final
deployment as well as complete documentation and 2-minute long YouTube video.
3. Design and fabrication of the PCB either through external PCB services or using the resources
in CEDT.
4. Soldering and testing the project hardware.
5. Code integration and testing.
6. Final demonstration and submission.
List of Input, output, sensors and communication and memory storage devices:
Mr. D. V. Gadre
Course Coordinator
ECEVE01: Digital System Design
Week Theory
Lecture Topic (Including assignment/ test)
day
1st 1. Combinational circuits
2. Adders
3. Multipliers
2nd 4. Decoders
5. Encoders
6. Multiplexers
3rd 7. Verilog HDL
8. Timing diagrams
9. Gate delays and static hazards
4th 10. Universal shift register
11. Class Test
12. Flip flops
5th 13. Counters
14. Setup and hold time
15. Clock to output delay
6th 16. Timing issues
17. PLDs
18. Modelling of all circuits using HDL
MID TERM
7th 19. Finite state machine
20. Mealy and moore machine
21. Design and table graph
8th 22. State assignments
23. Sequence detector
24. Modelling of state machine using HDL
9th 25. Algorithmic state machine
26. ASM block
27. ASMD chart with design examples
28. Class test
29. Controller and hardware path design
10th 30. Controller design with multiplexers
31. FPGAs
32. ASIC design flow
11th 33. Logic synthesis
34. Discussion
Text books: 1. Verilog HDL A guide to Digital Design and Synthesis by Samir Palnitkar
2. Digital System Design Using VHDL (English, Paperback, Jr. Roth Charles H.)
3. Digital design by Morris Mano (Pearson).
List of Experiments
1. Implement full adder in all coding styles viz. structural, dataflow and behavioral using Verilog
HDL.
2. Implement 4 x 1 MUX in all coding styles using Verilog HDL.
3. Implement D-latch and D-Flip-flop with asynchronous and synchronous RESET using Verilog
HDL.
4. Implement N-bit SISO, SIPO, PISO, PIPO shift registers and universal shift register using Verilog
HDL.
5. Implement N-bit UP-DOWN counter using Verilog HDL.
6. Implement Mealy and Moore based FSMs in Verilog HDL for detecting a sequence ……..
(a) Using conventional coding style
(b) Huffman coding style
7. Implement a generalized Verilog HDL code to multiply two unsigned binary numbers by modelling
in terms of datapath and controller units (maximum number of bits in both the numbers limited to
16). Draw ASMD chart and clearly indicate the input signals, output signals and status signals. Also
mention the number of clock cycles needed to multiply a 12-bit binary number with 5-bit binary
number. Demonstrate the correct functionality by using FPGA board (Zedboard).
8. Implement a traffic light controller and elevator controller in Verilog HDL.
9. Implement a RISC processor consisting of datapath, controller and memory units.
10. Hardware experiment.
Reference books:
1. Harry Veendrick, “Deep-Submicron CMOS ICs,” Kluwer Academic publishers.
2. John Paul Uyemura, “Chip Design for Submicron VLSI,” Thomson/Nelson.
3. Wolfgang nebel and Jean mermet, “Low power design in deep submicron electronics,” NATO
ASI series, Kluwer Academic Publishers.
Unit-IV Programmable ASIC Interconnect, design software and low level design 4
entry, Actel ACT, Xilinx LCA, Xilinx EPLD, Altera MAX 5000 and
7000, Altera MAX 9000, Altera FLEX, design systems
Class Test II 21-10-2013-
25/10/2019
Logic synthesis, Half gate ASIC, Schematic entry, Low level design 4
language, PLA tools, EDIF, CFI design representation
ASIC construction, Floor planning, Placement and routing, system
partition,
Unit-V FPGA partitioning, partitioning methods, floor planning, placement, 4
physical design flow, global routing, detailed routing
special routing, circuit extraction, DRC 2
Total 36
Text books:
1. M.J.S. Smith, “Application - Specific Integrated Circuits,” Addison Wesley Longman Inc.
2. Keith Barr, “ASIC Design in the Silicon Sandbox: A Complete Guide to Building Mixed-Signal
Integrated Circuits,” McGraw Hill.
3. Himanshu Bhatnagar, “Advanced ASIC Chip Synthesis,” Kluwer Academic publishers
Prof. A. K. Singh
Course Coordinator
S.
Topics No of Hours
No.
Needs for Low Power VLSI Chips, Charging and Discharging
Capacitance, Short-circuit Current in CMOS Circuit, CMOS Leakage
1 10 Hours
Current, Static Current, Basic Principles of Low Power Design, Low
Power Figure of Merits, Gate-level Logic Simulation
SUGGESTED READINGS:
1. Gary K. Yeap, Farid N. Najm, “Low power VLSI design and technology,” World Scientific
Publishing Ltd.
2. Rabaey, Pedram, “Low power design methodologies,” Kluwer Academic.
3. Kaushik Roy, Sharat Prasad,“Low-Power CMOS VLSI Circuit Design,” Wiley.
4. Christian Piguet, “Low-power CMOS circuits: technology, logic design and CAD tools,” CRC
Press, Taylor & Francis Group.
List of Experiments:
1. To perform DC, AC and transient analysis of CMOS inverter.
2. To vary CL and slope of input pulse and study the variation in dynamic power consumed by
CMOS inverter.
3. To study the impact of process variations in power consumption of CMOS inverter via monte
Carlo and corner analysis.
4. To plot the transfer characteristics of n-Floating gate (FG) MOS.
5. Application of FGMOS as a CMOS inverter.
6. Application of FGMOS as a current mirror (CM).
7. To observe working of bulk driven amplifier.
8. To study bulk-driven differential amplifier.
Dr. Bhawna Agarwal
Course Coordinator
ECCNC01: Stochastic Process and Queuing Theory
Units Contents Lecture +
Tutorial
Text Books:
[T1] Papoulis, A., Probability, Random Variables and Stochastic Processes, Third
Edition, McGraw-Hill.
[T2] Kleinock, L. Queuing Systems Volume I: Theory, John Wiley and Sons
Reference Books:
[R1] K.S Trivedi: Probability and Statistics, PHI, 3rd Ed.
[R2] S.P Gupta, Statistical Methods, Sultan Chand and Sons.
[R3] V.K Kapoor and S.C Gupta, Fundamentals of Statistics, Sultan Chand and
Sons.
EVALUATION SCHEME FOR CONTINOUS ASSESMENT
Sr. No. Continuous Assessment Marks
1 Best 2 class tests out of 3 class tests 12 (6 marks for each test)
2 Three Assignments 6 marks (2 marks for each Assignment)
3 Attendance in Class+Tutorials 7 marks
Total 25 marks
Text Books:
List of Experiments
Prof. S. P. Singh
Course Coordinator