GbE architecture Layers:
MAC:
Data Encapsulation, Ethernet framing, Addressing.
Flow control, Error detection .
RS (Reconciliation sublayer): The RS converts the MAC serial data stream to the parallel data paths of
XGMII
PCS (Physical Coding sublayer):Encodes 32bit data & 4 bit control of XGMII to 10bit code groups for
communication with PMA (8b/10b encoding.
PMA (Physical Medium Attachment): Serialization /de-serialization of bits from PCS to the underlying
serial [Link] be used to connect to different PMDs. GBASE-KR, GBASE-SR,
PMD (Physical Medium Dependent): Transmission/reception of bit streams to/from the underlying
medium.
Examples: 10GBASE-SR fiber PMD to transmit/receive over 850nm fiber.
Provides signal detect and fault function to detect fault conditions
1Suffix C=Copper (twoaxial) S=Short L=Long
E=Extended Z=Ultra extended T=Copper(UTP)
2Suffix R= LAN PHY W=WAN PHY X=LAN PHY
3suffix 4 = 4 WWDM wavelengths or 4 XAUI lanes M = Multimode
10 Gigabit Ethernet :
Gigabit Ethernet defines only full-duplex point-to-point links.
CSMA/CD operation has not been carried , so half-duplex operation and repeater hubs do not exist.
Gigabit Ethernet standard encompasses a number of different physical layer (PHY) standards.
network interface controller may have different PHY types through pluggable PHY modules.(
SFP,SFP+,etc.)
PHY modules are not specified in an official standards body.
Optical fiber
There are two basic types of optical fiber used for 10 Gigabit Ethernet: single-mode (SMF) and multi-
mode (MMF).
10GBASE-SR
10GBASE-SR ("short range") is a port type for multi-mode fiber.
Its Physical Coding Sublayer (PCS) is 64b/66b. (Mac to PHY interface by GMII)
10GBASE-LR
10GBASE-LR (long reach) is a port type for single-mode fiber.
Its 64b/66b PCS is defined in IEEE 802.3
Copper
10GBASE-CX4
CX4, also known by its IEEE designation, 802.3ak, supports 10-Gigabit Ethernet data transfer
over 4-lanes (Lane means 1 tx and rx pair)of copper cabling in each direction (8-lanes total).
XAUI 4-lane PCS.
10GBASE-KX4
his operates over four backplane lanes and uses the same physical layer coding as as 10GBASE-
CX4.
HSS stands for High Speed SerDes:
Chelsio MAC LAYER:
PHY functions:
Encoder , scrambler,parallel to serial converter,NRZI , MLT3 converters.
Encoders : Used to eliminate long strings of 0 and 1 , to get clock recovery and receiver end.
NRZI : To cut down the frequeny.
MAC to PHY interface:
MII : tx 4 rx 4 clock is 25M (speed 100M)
GMII : tx 8bit rx 8bits clock 125M (8*125 = 1000M)
Xgmii : tx 32 bit rx 32 bit (Diffrential data rising falling edge data transfer) ( 32 * 300 appr. 10000M)
XAUI Interface : huge effort for the layout engineer to come up with the routing of these [Link]
interface 32bit signals. his is where the XGXS sub layer comes into consideration. The output of this sub-
layer is a serial differential interface with minimized signal count. This is called the XAUI interface.
Code :
From Moddule plugged read values from Specification Compliance Codes. Describe cable type.
The Extended Specification Compliance Codes identify the electronic or optical interfaces which are not
included in SFF-8472