ADC Guide, Part 2 – Sample Rate

By Sachin Gupta and Akshay Vijay Phatak, Cypress Semiconductor

Last time we discussed resolution and noise in an ideal ADC. This time we will cover the sample rate of an ADC.

The sample rate for an ADC is defined as the number of output samples available per unit time and is specified as samples
per second (SPS). Two aspects of sample rate that must be considered when selecting an ADC for a particular application are
the minimum sample rate and maximum sample rate.

Minimum sample rate: One may only look at the maximum supported sample rate of an ADC assuming that it will support all
the lower sample rates. However, for some ADCs available today, this is not true. For example, most high-speed ADCs do not
meet their specifications below a specified sample rate. This is due to the small capacitor used to hold charge at the input of
ADC during conversion to support high sample rates. These ADCs have a higher leakage and cannot hold change for long
time, thereby limiting the minimum sample rate for these ADCs. One way to address this is to ignore the samples in between
the required samples. For example, if the required sample rate is 1ksps and the ≈minimum sample rate supported is 2ksps,
then every second sample can be ignored. The downside of this approach is that the dynamic power consumption of ADCs is
proportional to the conversion rate. An ADC which is running at a lower speed may consume lesser power as compared to the
ADC running at a higher clock that is ignoring samples.

Maximum sample rate: This parameter needs to be looked at carefully when an ADC’s input channels are multiplexed. For
ADCs like Flash convertors and SAR, the sample rate for each channel can be calculated by dividing the specified sample rate
by the number of channels. However, in ADCs like Delta Sigma where the input is first sampled at a very high rate and then
decimated to provide the actual output, some samples need to be dropped to flush the decimator. This reduces the actual
sample rate for each channel. If channels are being switched frequently then the actual sample rate can turn out to be very low
for each channel.

Nyquist rate: As per the Nyquist sampling theorem, an analog signal should be sampled at least twice the maximum
frequency content of that signal to achieve a faithful representation:

Fsnyquist = 2*Fsignal

Where, Fsnyquist is the Nyquist sampling frequency and Fsignal is the signal frequency.

Aliasing/ Under-sampling: As per the Nyquist theorem, sample rate of an ADC must be at least twice the signal rate. For a
simple sine wave, the maximum signal frequency is equal to the frequency of sine itself. However, considering only the signal
frequency irrespective of its shape can be misleading. Analog signals are not always sine wave and are generally complex
waveforms with many high frequency components. To reconstruct the exact waveform, the required sample rate will be many
times higher than the Nyquist rate if only fundamental frequency is taken into consideration.

If the sample rate is less than half of the highest frequency component in the signal, output aliases into the frequency band of
interest. When an analog signal say ‘Fsignal’ is sampled at frequency say ‘Fsample’, it produces two components: Fsample –
Fsignal and Fsample + Fsignal (Figure 1 and 2).

ADC Guide, Part 2 – Sample Rate Page 1 of 3

Published in EE Times (http://www.eetimes.com) January 2012

 Figure 1. No Aliasing (Signal frequency <= Nyquist rate)

Figure 2. Aliasing (Signal frequency > Nyquist rate)

It is only lower frequency components generated by aliasing which can cause problems with valid measurements. As shown in
Figure 1, when a component of the input signal frequency is less than or equal to half the sample rate, there is no aliasing. As
shown in Figure 2, if the sample rate is less than twice of any component of signal frequency, this lower frequency component
of the sampled signal will alias into the frequency band of interest. To avoid the aliasing due to the high frequency components
in the input signal, anti aliasing filtering must be used before sampling the signal using an ADC. Anti aliasing filter is effectively
a low pass filter that removes unwanted high frequency components to prevent any aliasing caused by them. The type of filter
to use and basic anti aliasing filter design is out of scope of this article.

Up to this point, we have discussed only issues arising due to under-sampling. However, in some applications, under-sampling
can be used intentionally to reduce design complexity. The process of sampling produces sum and difference frequencies,
basically acting like a mixer. This property can be used to advantage in applications where a bandpass signal is to be
converted to digital information, such as is the case with modulated signals like FM radio. Basically, a sampling frequency
below the pass band of the bandpass signal is selected such that the alias of the pass band appears to be at the baseband.

ADC Guide, Part 2 – Sample Rate Page 2 of 3

Published in EE Times (http://www.eetimes.com) January 2012

This way, information can be recovered with a very low sampling rate compared to the Nyquist rate (see Figure -3). An
advantage of under-sampling is that processing can be done in firmware once these samples are obtained. This results in
overhead in circuit design such as a RF mixer for converting an RF signal to IF or baseband. Also, a low cost ADC which has
a sample rate less than Nyquist rate can be used.

Figure. 3 Recovering baseband signal from FM using aliasing

Oversampling: Oversampling is sampling the signal at a rate higher than required. This provides processing gain and
spreads noise over a wide frequency range. When the higher frequency components are filtered out, effective noise is
reduced. There are some ADCs – Delta Sigma, for example – which operate based on oversampling.

Maximum input signal frequency

This is another important parameter to examine carefully when selecting an ADC for a particular application. For example, one
might think that if the sample rate supported is 1MHz, the input signal frequency can be 500 KHz. This is not always true. A
Delta Sigma ADC has a frequency response which has null at several points based on the order of decimation filter being
using. This will be discussed in more detail when we discuss Delta Sigma ADCs.

The next part of this series will cover common mode rejection ratio, power supply rejection ratio, offset error, and gain error.

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ADC Guide, Part 2 – Sample Rate Page 3 of 3

Published in EE Times (http://www.eetimes.com) January 2012